Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all.dat	(revision 23)
+++ 	(revision )
@@ -1,13 +1,0 @@
-1.46 # x04_w08-01_e08-01  X4-1_1_4-8
-2.37 # x04_w08-04_e08-01  X4-1_2_2-8
-2.37 # x04_w08-04_e08-07  X4-1_2_2-4
-2.94 # x04_w08-07_e08-01  X4-1_4_1-8
-3.27 # x04_w08-07_e08-15  X4-1_4_1-2
-2.51 # x04_w08-08_e08-01  X4-2_1_2-8
-2.4  # x04_w08-08_e08-07  X4-2_1_2-4
-3.38 # x04_w08-11_e08-01  X4-2_2_1-8
-3.41 # x04_w08-11_e08-07b X4-2_2_1-4
-3.63 # x04_w08-11_e08-15  X4-2_2_1-2
-3.94 # x04_w08-15_e08-01  X4-4_1_1-8
-3.88 # x04_w08-15_e08-07  X4-4_1_1-4
-3.92 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all.p	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all.p	(revision 57)
@@ -8,26 +8,27 @@
 
 set data style boxes
-set boxwidth 0.5
+set boxwidth 2
 set style fill solid 1.000000 border -1
-
+   
 set grid
 set xlabel "Architecture"
-set ylabel "Speed Up MT/ST"
-set yrange [0:4]
+set ylabel "Ratio MT/ST"
+   set yrange [0:4.5]
    
-set xtics rotate by -25 ('X4-1_1_4-8'  0 , \
-			 'X4-1_2_2-8'  1 , \
-			 'X4-1_2_2-4'  2 , \
-			 'X4-1_4_1-8'  3 , \
-			 'X4-1_4_1-2'  4 , \
-			 'X4-2_1_2-8'  5 , \
-			 'X4-2_1_2-4'  6 , \
-			 'X4-2_2_1-8'  7 , \
-			 'X4-2_2_1-4'  8 , \
-			 'X4-2_2_1-2'  9 , \
-			 'X4-4_1_1-8'  10, \
-			 'X4-4_1_1-4'  11, \
-			 'X4-4_1_1-2'  12  )
+set xtics rotate by -25 ('X4-1_1_4-8'  0  , \
+			 'X4-1_2_2-8'  10 , \
+			 'X4-1_2_2-4'  20 , \
+			 'X4-2_1_2-8'  30 , \
+			 'X4-2_1_2-4'  40 , \
+			 'X4-1_4_1-8'  50 , \
+			 'X4-1_4_1-2'  60 , \
+			 'X4-2_2_1-8'  70 , \
+			 'X4-2_2_1-4'  80 , \
+			 'X4-2_2_1-2'  90 , \
+			 'X4-4_1_1-8'  100, \
+			 'X4-4_1_1-4'  110, \
+			 'X4-4_1_1-2'  120  )
 
-plot "simulation_all.dat" notitle
-     
+
+plot "simulation_all_perf.dat"    title "Gain de performance",\
+     "simulation_all_surface.dat" title "Augmentation surface"
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all_perf.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all_perf.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all_perf.dat	(revision 57)
@@ -0,0 +1,13 @@
+0   1.46 # x04_w08-01_e08-01  X4-1_1_4-8
+10  2.37 # x04_w08-04_e08-01  X4-1_2_2-8
+20  2.37 # x04_w08-04_e08-07  X4-1_2_2-4
+30  2.51 # x04_w08-08_e08-01  X4-2_1_2-8
+40  2.4  # x04_w08-08_e08-07  X4-2_1_2-4
+50  2.94 # x04_w08-07_e08-01  X4-1_4_1-8
+60  3.27 # x04_w08-07_e08-15  X4-1_4_1-2
+70  3.38 # x04_w08-11_e08-01  X4-2_2_1-8
+80  3.41 # x04_w08-11_e08-07b X4-2_2_1-4
+90  3.63 # x04_w08-11_e08-15  X4-2_2_1-2
+100 3.94 # x04_w08-15_e08-01  X4-4_1_1-8
+110 3.88 # x04_w08-15_e08-07  X4-4_1_1-4
+120 3.92 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all_surface.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all_surface.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_all_surface.dat	(revision 57)
@@ -0,0 +1,13 @@
+2   1.18 # x04_w08-01_e08-01  X4-1_1_4-8
+12  2.21 # x04_w08-04_e08-01  X4-1_2_2-8
+22  2.21 # x04_w08-04_e08-07  X4-1_2_2-4
+32  2.21 # x04_w08-08_e08-01  X4-2_1_2-8
+42  2.21 # x04_w08-08_e08-07  X4-2_1_2-4
+52  4.00 # x04_w08-07_e08-01  X4-1_4_1-8
+62  4.00 # x04_w08-07_e08-15  X4-1_4_1-2
+72  4.00 # x04_w08-11_e08-01  X4-2_2_1-8
+82  4.00 # x04_w08-11_e08-07b X4-2_2_1-4
+92  4.00 # x04_w08-11_e08-15  X4-2_2_1-2
+102 4.00 # x04_w08-15_e08-01  X4-4_1_1-8
+112 4.00 # x04_w08-15_e08-07  X4-4_1_1-4
+122 4.00 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_cachel1.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_cachel1.dat	(revision 23)
+++ 	(revision )
@@ -1,3 +1,0 @@
-2.94 # x04_w08-07_e08-01
-3.38 # x04_w08-11_e08-01
-3.94 # x04_w08-15_e08-01
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_cachel1.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_cachel1.p	(revision 23)
+++ 	(revision )
@@ -1,24 +1,0 @@
-set size 0.5, 1.0
-set terminal postscript eps enhanced color
-
-set out "../Schema_eps/simulation_cachel1.eps"
-
-unset label
-unset log
-
-set data style boxes
-set boxwidth 0.5
-set style fill solid 1.000000 border -1
-
-set grid
-set xlabel "Architecture"
-set ylabel "Speed Up MT/ST"
-set yrange [2:4]
-   
-set xtics rotate by -25 ('x04\_w08-07\_e08-01 '  0 , \
-			 'x04\_w08-11\_e08-01 '  1 , \
-			 'x04\_w08-15\_e08-01 '  2   \
-			 )
-
-plot "simulation_cachel1.dat" notitle
-     
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_operative.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_operative.dat	(revision 23)
+++ 	(revision )
@@ -1,5 +1,0 @@
-1.46 # x04_w08-01_e08-01
-2.37 # x04_w08-04_e08-01
-2.94 # x04_w08-07_e08-01
-3.38 # x04_w08-11_e08-01
-3.94 # x04_w08-15_e08-01
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_operative.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_operative.p	(revision 23)
+++ 	(revision )
@@ -1,26 +1,0 @@
-set size 0.5, 1.0
-set terminal postscript eps enhanced color
-
-set out "../Schema_eps/simulation_operative.eps"
-
-unset label
-unset log
-
-set data style boxes
-set boxwidth 0.5
-set style fill solid 1.000000 border -1
-
-set grid
-set xlabel "Architecture"
-set ylabel "Speed Up MT/ST"
-set yrange [0:4]
-   
-set xtics rotate by -25 ('x04\_w08-01\_e08-01 '  0 , \
-			 'x04\_w08-04\_e08-01 '  1 , \
-			 'x04\_w08-07\_e08-01 '  2 , \
-			 'x04\_w08-11\_e08-01 '  4 , \
-			 'x04\_w08-15\_e08-01 '  5   \
-			 )
-
-plot "simulation_operative.dat" notitle
-     
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance.p	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance.p	(revision 57)
@@ -0,0 +1,34 @@
+set size 1.0, 1.0
+set terminal postscript eps enhanced color
+
+set out "../Schema_eps/simulation_performance.eps"
+
+unset label
+unset log
+
+set data style boxes
+set boxwidth 4
+set style fill solid 1.000000 border -1
+   
+set grid
+set xlabel "Architecture"
+set ylabel "IPC"
+set yrange [0:5]
+   
+set xtics rotate by -25 ('X4-1_1_4-8'  0  , \
+			 'X4-1_2_2-8'  10 , \
+			 'X4-1_2_2-4'  20 , \
+			 'X4-2_1_2-8'  30 , \
+			 'X4-2_1_2-4'  40 , \
+			 'X4-1_4_1-8'  50 , \
+			 'X4-1_4_1-2'  60 , \
+			 'X4-2_2_1-8'  70 , \
+			 'X4-2_2_1-4'  80 , \
+			 'X4-2_2_1-2'  90 , \
+			 'X4-4_1_1-8'  100, \
+			 'X4-4_1_1-4'  110, \
+			 'X4-4_1_1-2'  120  )
+
+plot "simulation_performance_ST.dat" title "Performance ST",\
+     "simulation_performance_MT.dat" title "Performance MT"
+     
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance_MT.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance_MT.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance_MT.dat	(revision 57)
@@ -0,0 +1,13 @@
+  4 2.93 # x04_w08-01_e08-01  X4-1_1_4-8
+ 14 3.38 # x04_w08-04_e08-01  X4-1_2_2-8
+ 24 3.38 # x04_w08-04_e08-07  X4-1_2_2-4
+ 34 3.44 # x04_w08-08_e08-01  X4-2_1_2-8
+ 44 3.39 # x04_w08-08_e08-07  X4-2_1_2-4
+ 54 3.57 # x04_w08-07_e08-01  X4-1_4_1-8
+ 64 3.74 # x04_w08-07_e08-15  X4-1_4_1-2
+ 74 3.68 # x04_w08-11_e08-01  X4-2_2_1-8
+ 84 3.75 # x04_w08-11_e08-07b X4-2_2_1-4
+ 94 3.88 # x04_w08-11_e08-15  X4-2_2_1-2
+104 4.03 # x04_w08-15_e08-01  X4-4_1_1-8
+114 3.97 # x04_w08-15_e08-07  X4-4_1_1-4
+124 4.04 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance_ST.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance_ST.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_performance_ST.dat	(revision 57)
@@ -0,0 +1,13 @@
+  0 2.01 # x04_w08-01_e08-01  X4-1_1_4-8
+ 10 1.43 # x04_w08-04_e08-01  X4-1_2_2-8
+ 20 1.43 # x04_w08-04_e08-07  X4-1_2_2-4
+ 30 1.37 # x04_w08-08_e08-01  X4-2_1_2-8
+ 40 1.41 # x04_w08-08_e08-07  X4-2_1_2-4
+ 50 1.21 # x04_w08-07_e08-01  X4-1_4_1-8
+ 60 1.15 # x04_w08-07_e08-15  X4-1_4_1-2
+ 70 1.09 # x04_w08-11_e08-01  X4-2_2_1-8
+ 80 1.10 # x04_w08-11_e08-07b X4-2_2_1-4
+ 90 1.07 # x04_w08-11_e08-15  X4-2_2_1-2
+100 1.02 # x04_w08-15_e08-01  X4-4_1_1-8
+110 1.02 # x04_w08-15_e08-07  X4-4_1_1-4
+120 1.03 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ratio_performance_vs_surface.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ratio_performance_vs_surface.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ratio_performance_vs_surface.dat	(revision 57)
@@ -0,0 +1,13 @@
+0   1.46 # x04_w08-01_e08-01  X4-1_1_4-8
+10  1.16 # x04_w08-04_e08-01  X4-1_2_2-8
+20  1.16 # x04_w08-04_e08-07  X4-1_2_2-4
+30  1.23 # x04_w08-08_e08-01  X4-2_1_2-8
+40  1.17 # x04_w08-08_e08-07  X4-2_1_2-4
+50  0.73 # x04_w08-07_e08-01  X4-1_4_1-8
+60  0.82 # x04_w08-07_e08-15  X4-1_4_1-2
+70  0.84 # x04_w08-11_e08-01  X4-2_2_1-8
+80  0.85 # x04_w08-11_e08-07b X4-2_2_1-4
+90  0.91 # x04_w08-11_e08-15  X4-2_2_1-2
+100 0.98 # x04_w08-15_e08-01  X4-4_1_1-8
+110 0.97 # x04_w08-15_e08-07  X4-4_1_1-4
+120 0.98 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ratio_performance_vs_surface.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ratio_performance_vs_surface.p	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ratio_performance_vs_surface.p	(revision 57)
@@ -0,0 +1,32 @@
+set size 1.0, 1.0
+set terminal postscript eps enhanced color
+
+set out "../Schema_eps/simulation_ratio_performance_vs_surface.eps"
+
+unset label
+unset log
+
+set data style boxes
+set boxwidth 5
+set style fill solid 1.000000 border -1
+   
+set grid
+set xlabel "Architecture"
+set ylabel "Ratio MT/ST"
+   set yrange [0:1.5]
+   
+set xtics rotate by -25 ('X4-1_1_4-8'  0  , \
+			 'X4-1_2_2-8'  10 , \
+			 'X4-1_2_2-4'  20 , \
+			 'X4-2_1_2-8'  30 , \
+			 'X4-2_1_2-4'  40 , \
+			 'X4-1_4_1-8'  50 , \
+			 'X4-1_4_1-2'  60 , \
+			 'X4-2_2_1-8'  70 , \
+			 'X4-2_2_1-4'  80 , \
+			 'X4-2_2_1-2'  90 , \
+			 'X4-4_1_1-8'  100, \
+			 'X4-4_1_1-4'  110, \
+			 'X4-4_1_1-2'  120  )
+
+plot "simulation_ratio_performance_vs_surface.dat" notitle
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface.p	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface.p	(revision 57)
@@ -0,0 +1,34 @@
+set size 1.0, 1.0
+set terminal postscript eps enhanced color
+
+set out "../Schema_eps/simulation_surface.eps"
+
+unset label
+unset log
+
+set data style boxes
+set boxwidth 4
+set style fill solid 1.000000 border -1
+   
+set grid
+set xlabel "Architecture"
+set ylabel "Nb registers"
+set yrange [0:220000]
+   
+set xtics rotate by -25 ('X4-1_1_4-8'  0  , \
+			 'X4-1_2_2-8'  10 , \
+			 'X4-1_2_2-4'  20 , \
+			 'X4-2_1_2-8'  30 , \
+			 'X4-2_1_2-4'  40 , \
+			 'X4-1_4_1-8'  50 , \
+			 'X4-1_4_1-2'  60 , \
+			 'X4-2_2_1-8'  70 , \
+			 'X4-2_2_1-4'  80 , \
+			 'X4-2_2_1-2'  90 , \
+			 'X4-4_1_1-8'  100, \
+			 'X4-4_1_1-4'  110, \
+			 'X4-4_1_1-2'  120  )
+
+plot "simulation_surface_ST.dat" title "Surface ST",\
+     "simulation_surface_MT.dat" title "Surface MT"
+     
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface_MT.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface_MT.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface_MT.dat	(revision 57)
@@ -0,0 +1,26 @@
+  4 217359 # x04_w08-01_e08-01  X4-1_1_4-8
+ 14 189108 # x04_w08-04_e08-01  X4-1_2_2-8
+ 24 189108 # x04_w08-04_e08-07  X4-1_2_2-4
+ 34 189108 # x04_w08-08_e08-01  X4-2_1_2-8
+ 44 189108 # x04_w08-08_e08-07  X4-2_1_2-4
+ 54 171580 # x04_w08-07_e08-01  X4-1_4_1-8
+ 64 171580 # x04_w08-07_e08-15  X4-1_4_1-2
+ 74 171580 # x04_w08-11_e08-01  X4-2_2_1-8
+ 84 171580 # x04_w08-11_e08-07b X4-2_2_1-4
+ 94 171580 # x04_w08-11_e08-15  X4-2_2_1-2
+104 171580 # x04_w08-15_e08-01  X4-4_1_1-8
+114 171580 # x04_w08-15_e08-07  X4-4_1_1-4
+124 171580 # x04_w08-15_e08-15  X4-4_1_1-2
+#  4 100453 # x04_w08-01_e08-01  X4-1_1_4-8
+# 14  88000 # x04_w08-04_e08-01  X4-1_2_2-8
+# 24  88000 # x04_w08-04_e08-07  X4-1_2_2-4
+# 34  88000 # x04_w08-08_e08-01  X4-2_1_2-8
+# 44  88000 # x04_w08-08_e08-07  X4-2_1_2-4
+# 54  80000 # x04_w08-07_e08-01  X4-1_4_1-8
+# 64  80000 # x04_w08-07_e08-15  X4-1_4_1-2
+# 74  80000 # x04_w08-11_e08-01  X4-2_2_1-8
+# 84  80000 # x04_w08-11_e08-07b X4-2_2_1-4
+# 94  80000 # x04_w08-11_e08-15  X4-2_2_1-2
+#104  80000 # x04_w08-15_e08-01  X4-4_1_1-8
+#114  80000 # x04_w08-15_e08-07  X4-4_1_1-4
+#124  80000 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface_ST.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface_ST.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_surface_ST.dat	(revision 57)
@@ -0,0 +1,26 @@
+  0 180837 # x04_w08-01_e08-01  X4-1_1_4-8
+ 10  84532 # x04_w08-04_e08-01  X4-1_2_2-8
+ 20  84532 # x04_w08-04_e08-07  X4-1_2_2-4
+ 30  84532 # x04_w08-08_e08-01  X4-2_1_2-8
+ 40  84532 # x04_w08-08_e08-07  X4-2_1_2-4
+ 50  42849 # x04_w08-07_e08-01  X4-1_4_1-8
+ 60  42849 # x04_w08-07_e08-15  X4-1_4_1-2
+ 70  42849 # x04_w08-11_e08-01  X4-2_2_1-8
+ 80  42849 # x04_w08-11_e08-07b X4-2_2_1-4
+ 90  42849 # x04_w08-11_e08-15  X4-2_2_1-2
+100  42849 # x04_w08-15_e08-01  X4-4_1_1-8
+110  42849 # x04_w08-15_e08-07  X4-4_1_1-4
+120  42849 # x04_w08-15_e08-15  X4-4_1_1-2
+#  0 85000 # x04_w08-01_e08-01  X4-1_1_4-8
+# 10 40000 # x04_w08-04_e08-01  X4-1_2_2-8
+# 20 40000 # x04_w08-04_e08-07  X4-1_2_2-4
+# 30 40000 # x04_w08-08_e08-01  X4-2_1_2-8
+# 40 40000 # x04_w08-08_e08-07  X4-2_1_2-4
+# 50 20000 # x04_w08-07_e08-01  X4-1_4_1-8
+# 60 20000 # x04_w08-07_e08-15  X4-1_4_1-2
+# 70 20000 # x04_w08-11_e08-01  X4-2_2_1-8
+# 80 20000 # x04_w08-11_e08-07b X4-2_2_1-4
+# 90 20000 # x04_w08-11_e08-15  X4-2_2_1-2
+#100 20000 # x04_w08-15_e08-01  X4-4_1_1-8
+#110 20000 # x04_w08-15_e08-07  X4-4_1_1-4
+#120 20000 # x04_w08-15_e08-15  X4-4_1_1-2
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ue.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ue.dat	(revision 23)
+++ 	(revision )
@@ -1,4 +1,0 @@
-3.38 # x04_w08-11_e08-01
-3.64 # x04_w08-11_e08-07a
-3.41 # x04_w08-11_e08-07b
-3.63 # x04_w08-11_e08-15
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ue.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/simulation_ue.p	(revision 23)
+++ 	(revision )
@@ -1,25 +1,0 @@
-set size 0.5, 1.0
-set terminal postscript eps enhanced color
-
-set out "../Schema_eps/simulation_ue.eps"
-
-unset label
-unset log
-
-set data style boxes
-set boxwidth 0.5
-set style fill solid 1.000000 border -1
-
-set grid
-set xlabel "Architecture"
-set ylabel "Speed Up MT/ST"
-set yrange [2:4]
-   
-set xtics rotate by -25 ('x04\_w08-11\_e08-01 '  0 , \
-			 'x04\_w08-11\_e08-07a'  1 , \
-			 'x04\_w08-11\_e08-07b'  2 , \
-			 'x04\_w08-11\_e08-15 '  3   \
-			 )
-
-plot "simulation_ue.dat" notitle
-     
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile.p
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile.p	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile.p	(revision 57)
@@ -0,0 +1,32 @@
+set size 1.0, 1.0
+set terminal postscript eps enhanced color
+
+set out "../Schema_eps/synthese_FPGA-registerfile.eps"
+
+unset label
+unset log
+
+set data style boxes
+set boxwidth 10
+set style fill solid 1.000000 border -1
+   
+set grid
+set xlabel "Architecture"
+set ylabel "Nombre LUTs"
+set yrange [1:100000]
+unset logscale; set logscale y 
+set xtics rotate by -25 ('R:1  W:1'    0 , \
+			 'R:2  W:1'   60 , \
+			 'R:4  W:1'  120 , \
+			 'R:8  W:1'  180 , \
+			 'R:1  W:2'  240 , \
+			 'R:1  W:4'  300 , \
+			 'R:1  W:8'  360 )
+
+plot "synthese_FPGA-registerfile_monolithic.dat" title "monolithic",\
+     "synthese_FPGA-registerfile_1_bank.dat"     title "1 banc"    ,\
+     "synthese_FPGA-registerfile_2_bank.dat"     title "2 bancs"   ,\
+     "synthese_FPGA-registerfile_4_bank.dat"     title "4 bancs"   ,\
+     "synthese_FPGA-registerfile_8_bank.dat"     title "8 bancs"
+
+     
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_1_bank.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_1_bank.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_1_bank.dat	(revision 57)
@@ -0,0 +1,29 @@
+ 10  580  # R:1  W:1     0    96 (  32   64)
+ 10  512  # R:1  W:1     0    96 (  32   64)
+ 70  591  # R:2  W:1     0   103 (  39   64)
+ 70  512  # R:2  W:1     0   103 (  39   64)
+130  602  # R:4  W:1     0   110 (  46   64)
+130  512  # R:4  W:1     0   110 (  46   64)
+190  628  # R:8  W:1     0   127 (  63   64)
+190  512  # R:8  W:1     0   127 (  63   64)
+250  623  # R:1  W:2     0   135 (  71   64)
+250  512  # R:1  W:2     0   135 (  71   64)
+310  666  # R:1  W:4     0   174 ( 110   64)
+310  512  # R:1  W:4     0   174 ( 110   64)
+370  756  # R:1  W:8     0   256 ( 192   64)
+370  512  # R:1  W:8     0   256 ( 192   64)
+# 10   96  # R:1  W:1     0    96 (  32   64)
+# 10   64  # R:1  W:1     0    96 (  32   64)
+# 70  103  # R:2  W:1     0   103 (  39   64)
+# 70   64  # R:2  W:1     0   103 (  39   64)
+#130  110  # R:4  W:1     0   110 (  46   64)
+#130   64  # R:4  W:1     0   110 (  46   64)
+#190  127  # R:8  W:1     0   127 (  63   64)
+#190   64  # R:8  W:1     0   127 (  63   64)
+#250  135  # R:1  W:2     0   135 (  71   64)
+#250   64  # R:1  W:2     0   135 (  71   64)
+#310  174  # R:1  W:4     0   174 ( 110   64)
+#310   64  # R:1  W:4     0   174 ( 110   64)
+#370  256  # R:1  W:8     0   256 ( 192   64)
+#370   64  # R:1  W:8     0   256 ( 192   64)
+
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_2_bank.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_2_bank.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_2_bank.dat	(revision 57)
@@ -0,0 +1,28 @@
+ 20  618  # R:1  W:1     0   228 ( 100  128)
+ 20  512  # R:1  W:1     0   228 ( 100  128)
+ 80  672  # R:2  W:1     0   274 ( 146  128)
+ 80  512  # R:2  W:1     0   274 ( 146  128)
+140  760  # R:4  W:1     0   354 ( 226  128)
+140  512  # R:4  W:1     0   354 ( 226  128)
+200  942  # R:8  W:1     0   520 ( 392  128)
+200  512  # R:8  W:1     0   520 ( 392  128)
+260  705  # R:1  W:2     0   309 ( 181  128)
+260  512  # R:1  W:2     0   309 ( 181  128)
+320  795  # R:1  W:4     0   391 ( 263  128)
+320  512  # R:1  W:4     0   391 ( 263  128)
+380  979  # R:1  W:8     0   559 ( 431  128)
+380  512  # R:1  W:8     0   559 ( 431  128)
+# 20  228  # R:1  W:1     0   228 ( 100  128)
+# 20  128  # R:1  W:1     0   228 ( 100  128)
+# 80  274  # R:2  W:1     0   274 ( 146  128)
+# 80  128  # R:2  W:1     0   274 ( 146  128)
+#140  354  # R:4  W:1     0   354 ( 226  128)
+#140  128  # R:4  W:1     0   354 ( 226  128)
+#200  520  # R:8  W:1     0   520 ( 392  128)
+#200  128  # R:8  W:1     0   520 ( 392  128)
+#260  309  # R:1  W:2     0   309 ( 181  128)
+#260  128  # R:1  W:2     0   309 ( 181  128)
+#320  391  # R:1  W:4     0   391 ( 263  128)
+#320  128  # R:1  W:4     0   391 ( 263  128)
+#380  559  # R:1  W:8     0   559 ( 431  128)
+#380  128  # R:1  W:8     0   559 ( 431  128)
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_4_bank.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_4_bank.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_4_bank.dat	(revision 57)
@@ -0,0 +1,14 @@
+ 30  714  # R:1  W:1     0   456 ( 200  256)
+ 30  512  # R:1  W:1     0   456 ( 200  256)
+ 90  818  # R:2  W:1     0   544 ( 288  256)
+ 90  512  # R:2  W:1     0   544 ( 288  256)
+150  990  # R:4  W:1     0   700 ( 444  256)
+150  512  # R:4  W:1     0   700 ( 444  256)
+210 1090  # R:8  W:1     0   772 ( 516  256)
+210  512  # R:8  W:1     0   772 ( 516  256)
+270  883  # R:1  W:2     0   611 ( 355  256)
+270  512  # R:1  W:2     0   611 ( 355  256)
+330 1057  # R:1  W:4     0   769 ( 513  256)
+330  512  # R:1  W:4     0   769 ( 513  256)
+390 1413  # R:1  W:8     0  1093 ( 837  256)
+390  512  # R:1  W:8     0  1093 ( 837  256)
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_8_bank.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_8_bank.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_8_bank.dat	(revision 57)
@@ -0,0 +1,14 @@
+ 40  885  # R:1  W:1     0   881 ( 369  512)
+ 40  512  # R:1  W:1     0   881 ( 369  512)
+100 1120  # R:2  W:1     0  1084 ( 572  512)
+100  512  # R:2  W:1     0  1084 ( 572  512)
+160 1460  # R:4  W:1     0  1392 ( 880  512)
+160  512  # R:4  W:1     0  1392 ( 880  512)
+220 2163  # R:8  W:1     0  2024 (1512  512)
+220  512  # R:8  W:1     0  2024 (1512  512)
+280 1215  # R:1  W:2     0  1183 ( 671  512)
+280  512  # R:1  W:2     0  1183 ( 671  512)
+340 1555  # R:1  W:4     0  1491 ( 979  512)
+340  512  # R:1  W:4     0  1491 ( 979  512)
+400 2285  # R:1  W:8     0  2156 (1644  512)
+400  512  # R:1  W:8     0  2156 (1644  512)
Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_monolithic.dat
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_monolithic.dat	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph/synthese_FPGA-registerfile_monolithic.dat	(revision 57)
@@ -0,0 +1,28 @@
+  0   580  # R:1  W:1     0    96 (  32   64)
+  0   512  # R:1  W:1     0    96 (  32   64)
+ 60  1156  # R:2  W:1     0   192 (  64  128)
+ 60  1024  # R:2  W:1     0   192 (  64  128)
+120  2308  # R:4  W:1     0   384 ( 128  256)
+120  2048  # R:4  W:1     0   384 ( 128  256)
+180  4612  # R:8  W:1     0   768 ( 256  512)
+180  4096  # R:8  W:1     0   768 ( 256  512)
+240 23526  # R:1  W:2  1024  1476 (1476    0)
+240 16384  # R:1  W:2  1024  1476 (1476    0)
+300 43052  # R:1  W:4  1024  2639 (2639    0)
+300 16384  # R:1  W:4  1024  2639 (2639    0)
+360 90104  # R:1  W:8  1024  4597 (4597    0)
+360 16384  # R:1  W:8  1024  4597 (4597    0)
+#  0   96  # R:1  W:1     0    96 (  32   64)
+#  0   64  # R:1  W:1     0    96 (  32   64)
+# 60  192  # R:2  W:1     0   192 (  64  128)
+# 60  128  # R:2  W:1     0   192 (  64  128)
+#120  384  # R:4  W:1     0   384 ( 128  256)
+#120  256  # R:4  W:1     0   384 ( 128  256)
+#180  768  # R:8  W:1     0   768 ( 256  512)
+#180  512  # R:8  W:1     0   768 ( 256  512)
+#240 1476  # R:1  W:2  1024  1476 (1476    0)
+#240 1024  # R:1  W:2  1024  1476 (1476    0)
+#300 2639  # R:1  W:4  1024  2639 (2639    0)
+#300 1024  # R:1  W:4  1024  2639 (2639    0)
+#360 4597  # R:1  W:8  1024  4597 (4597    0)
+#360 1024  # R:1  W:8  1024  4597 (4597    0)
