Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp	(revision 57)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp	(revision 58)
@@ -82,9 +82,10 @@
 	    for (uint32_t k=0; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_read_by_bank*k+j;
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_read_by_bank*k+j);
 		string   separator = ((k==0)?" ":",");
-		
-		vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+"     \t=>\tinternal_READ_"+toString(i)+"_"+toString(num_port)+"_VAL");
-		vhdl->set_body("\t,out_ACK_"+toString(k)+"     \t=>\tinternal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+"_VAL");
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
+
+		vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+"     \t=>\tinternal_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL");
+		vhdl->set_body("\t,out_ACK_"+toString(k)+"     \t=>\tinternal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL");
 	      }
 	    vhdl->set_body(");");
@@ -100,9 +101,10 @@
 	    for (uint32_t k=0; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_write_by_bank*k+j;
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j);
 		string   separator = ((k==0)?" ":",");
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
 		
-		vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+"     \t=>\tinternal_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL");
-		vhdl->set_body("\t,out_ACK_"+toString(k)+"     \t=>\tinternal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL");
+		vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+"     \t=>\tinternal_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL");
+		vhdl->set_body("\t,out_ACK_"+toString(k)+"     \t=>\tinternal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL");
 	      }
 	    vhdl->set_body(");");
@@ -122,10 +124,10 @@
 	    uint32_t nb_port = (_param->_crossbar == FULL_CROSSBAR)?_param->_nb_port_read:((j<read_select_limit)?read_nb_select1:read_nb_select2);
 
-	    vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_VAL <= '0'");
+	    vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_VAL  <= '0'");
 	    for (uint32_t k=0; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_read_by_bank*k+j;
-
-		vhdl->set_body("\tor internal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+"_VAL");
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_read_by_bank*k+j);
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
+		vhdl->set_body("\tor internal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL");
 	      }
 	    vhdl->set_body(";");
@@ -138,7 +140,8 @@
 	    for (uint32_t k=0; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_write_by_bank*k+j;
-
-		vhdl->set_body("\tor internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL");
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j);
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
+
+		vhdl->set_body("\tor internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL");
 	      }
 	    vhdl->set_body(";");
@@ -157,10 +160,11 @@
 	    uint32_t nb_port = (_param->_crossbar == FULL_CROSSBAR)?_param->_nb_port_read:((j<read_select_limit)?read_nb_select1:read_nb_select2);
 
-	    vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_ADDRESS <=");
+	    vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_ADDRESS  <=");
 	    for (uint32_t k=1; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_read_by_bank*k+j;
-		
-		vhdl->set_body("\tin_READ_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_READ_"+toString(i)+"_"+toString(num_port)+"_VAL='1' else");
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_read_by_bank*k+j);
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
+				
+		vhdl->set_body("\tin_READ_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+"  when internal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL ='1' else");
 	      }
 	    vhdl->set_body("\tin_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+";");
@@ -174,7 +178,8 @@
 	    for (uint32_t k=1; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_write_by_bank*k+j;
-
-		vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL='1' else");
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j);
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
+
+		vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL='1' else");
 	      }
 	    vhdl->set_body("\tin_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+";");
@@ -197,7 +202,7 @@
 	    for (uint32_t k=1; k<nb_port; k++)
 	      {
-		uint32_t num_port  = _param->_nb_port_write_by_bank*k+j;
-
-		vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_DATA when internal_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL='1' else");
+		uint32_t num_port  = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j);
+		string   index     = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):"";
+		vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_DATA when internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL='1' else");
 	      }
 	    vhdl->set_body("\tin_WRITE_"+toString(j)+"_DATA;");
@@ -216,15 +221,50 @@
 	for (uint32_t j=0; j<_param->_nb_port_read; j ++)
 	  {
-	    string address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+")");
-
-	    vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_READ_"+toString(j)+"_VAL='1') "+address+"else '0';");
+	    string address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
+
+	    vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL  <= '1' when (in_READ_"+toString(j)+"_VAL ='1') "+address+"else '0';");
 	  }
 	for (uint32_t j=0; j<_param->_nb_port_write; j ++)
 	  {
-	    string address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+")");
-	    vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+address+" else '0';");
-	  }
-      }
-
+	    string address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
+	    vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+address+"else '0';");
+	  }
+      }
+
+    if (_param->_crossbar == FULL_CROSSBAR)
+      {
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  {
+	    for (uint32_t j=0; j<_param->_nb_port_read; j++)
+	      {
+		for (uint32_t k=0; k<_param->_nb_port_read_by_bank; k++)
+		  {
+		    vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL  <= internal_READ_"+toString(i)+"_"+toString(j)+"_VAL  and not");
+		    vhdl->set_body("\t('0'");
+		    for (uint32_t l=0; l<k; l++)
+		      {
+			vhdl->set_body("\tor internal_SELECT_READ_"+toString(i)+"_"+toString(j)+"_"+toString(l)+"_VAL"); 
+		      }
+		    
+		    vhdl->set_body("\t);");
+		  }
+	      }
+	    for (uint32_t j=0; j<_param->_nb_port_write; j++)
+	      {
+		for (uint32_t k=0; k<_param->_nb_port_write_by_bank; k++)
+		  {
+		    vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL <= internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL and not");
+		    vhdl->set_body("\t('0'");
+
+		      for (uint32_t l=0; l<k; l++)
+		      {
+			vhdl->set_body("\tor internal_SELECT_WRITE_"+toString(i)+"_"+toString(j)+"_"+toString(l)+"_VAL"); 
+		      }
+		    
+		    vhdl->set_body("\t);");
+		  }
+	      }
+	  }
+      }
     vhdl->set_body("");
     vhdl->set_body("-----------------------------------");
@@ -237,10 +277,10 @@
 	for (uint32_t i=0; i<_param->_nb_port_read; i ++)
 	  {
-	    vhdl->set_body("out_READ_"+toString(i)+"_ACK <= ");
+	    vhdl->set_body("out_READ_"+toString(i)+"_ACK  <= ");
 	    for (uint32_t j=0; j<_param->_nb_bank; j ++)
 	      {
 		for (uint32_t k=0; k<_param->_nb_port_read_by_bank; k ++)
 		  {
-		    vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_READ_"+toString(j)+"_"+toString(k)+"_VAL = '1' else");
+		    vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_ACK  when internal_SELECT_READ_"+toString(j)+"_"+toString(i)+"_"+toString(k)+"_VAL  = '1' else");
 		  }
 	      }
@@ -251,5 +291,5 @@
 		for (uint32_t k=0; k<_param->_nb_port_read_by_bank; k ++)
 		  {
-		    vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_DATA when internal_SELECT_READ_"+toString(j)+"_"+toString(k)+"_VAL = '1' else");
+		    vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_DATA when internal_SELECT_READ_"+toString(j)+"_"+toString(i)+"_"+toString(k)+"_VAL  = '1' else");
 		  }
 	      }
@@ -263,5 +303,5 @@
 		for (uint32_t k=0; k<_param->_nb_port_write_by_bank; k ++)
 		  {
-		    vhdl->set_body("\tinternal_BANK_WRITE_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_WRITE_"+toString(j)+"_"+toString(k)+"_VAL = '1' else");
+		    vhdl->set_body("\tinternal_BANK_WRITE_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_WRITE_"+toString(j)+"_"+toString(i)+"_"+toString(k)+"_VAL = '1' else");
 		  }
 	      }
@@ -275,8 +315,8 @@
 	    uint32_t link = _param->_link_port_read_to_bank_read[i];
 
-	    vhdl->set_body("out_READ_"+toString(i)+"_ACK <= ");
-	    for (uint32_t j=0; j<_param->_nb_bank; j ++)
-	      {
-		vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(link)+"_ACK when internal_SELECT_READ_"+toString(j)+"_"+toString(link)+"_VAL = '1' else");
+	    vhdl->set_body("out_READ_"+toString(i)+"_ACK  <= ");
+	    for (uint32_t j=0; j<_param->_nb_bank; j ++)
+	      {
+		vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(link)+"_ACK  when internal_SELECT_READ_"+toString(j)+"_"+toString(i)+"_VAL  = '1' else");
 	      }
 // 	    vhdl->set_body("\tinternal_BANK_READ_"+toString(0)+"_"+toString(link)+"_ACK;");
