Changeset 62 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked

Timestamp:

Dec 4, 2007, 2:31:54 PM (17 years ago)

Author:

rosiere

Message:

Modification en profondeur de Component-port_map.
Compilation ok pour Register_unit ... a tester (systemC et vhdl)

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked

Files:

• SelfTest/config-size.cfg (added)
• SelfTest/src/test.cpp (modified) (2 diffs)
• include/Parameters.h (modified) (1 diff)
• src/Parameters.cpp (modified) (4 diffs)
• src/RegisterFile_Multi_Banked.cpp (modified) (4 diffs)
• src/RegisterFile_Multi_Banked_allocation.cpp (modified) (4 diffs)
• src/RegisterFile_Multi_Banked_deallocation.cpp (modified) (2 diffs)
• src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp (modified) (1 diff)
• src/RegisterFile_Multi_Banked_full_crossbar_genMealy_write.cpp (modified) (1 diff)
• src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp (modified) (1 diff)
• src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_write.cpp (modified) (1 diff)
• src/RegisterFile_Multi_Banked_vhdl_body.cpp (modified) (4 diffs)
• src/RegisterFile_Multi_Banked_vhdl_declaration.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/src/test.cpp

@@ -80 +80 @@
       (*(_RegisterFile_Multi_Banked-> in_READ_VAL      [i]))        (READ_VAL      [i]);
       (*(_RegisterFile_Multi_Banked->out_READ_ACK      [i]))        (READ_ACK      [i]);
+      if (_param->_have_port_address==true)
       (*(_RegisterFile_Multi_Banked-> in_READ_ADDRESS  [i]))        (READ_ADDRESS  [i]);
       (*(_RegisterFile_Multi_Banked->out_READ_DATA     [i]))        (READ_DATA     [i]);
@@ -88 +89 @@
       (*(_RegisterFile_Multi_Banked-> in_WRITE_VAL     [i]))        (WRITE_VAL     [i]);
       (*(_RegisterFile_Multi_Banked->out_WRITE_ACK     [i]))        (WRITE_ACK     [i]);
+      if (_param->_have_port_address==true)
       (*(_RegisterFile_Multi_Banked-> in_WRITE_ADDRESS [i]))        (WRITE_ADDRESS [i]);
       (*(_RegisterFile_Multi_Banked-> in_WRITE_DATA    [i]))        (WRITE_DATA    [i]);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h

@@ -71 +71 @@
   public : const uint32_t    _nb_word_by_bank      ;
 
+  public : const bool        _have_port_address     ;
+  public : const bool        _have_bank_port_address;
+
     // A lot of table to the partial crossbar
   public :       uint32_t  * _link_port_read_to_bank_read  ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp

@@ -42 +42 @@
     _num_reg_shift         (0),
     _num_reg_mask          (gen_mask<Taddress_t>(_size_address_by_bank)),
-    _nb_word_by_bank       (_nb_word / _nb_bank)
+    _nb_word_by_bank       (_nb_word / _nb_bank),
+    _have_port_address     (_size_address         != 0),
+    _have_bank_port_address(_size_address_by_bank != 0)
   {
     log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","Begin");
@@ -48 +50 @@
     if (_crossbar == PARTIAL_CROSSBAR)
       {
-        log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","Case : _crossbar == PARTIAL_CROSSBAR");
+        log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","Case : _crossbar == PARTIAL_CROSSBAR");
 
         // All port_src is connected with one port_dest on each bank
@@ -68 +70 @@
 
 
-        log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_bank_read");
+        log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_bank_read");
         for (uint32_t i=0; i<_nb_port_read         ;i++)
           {
-          log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","   * Read  in  [%d] to out    [%d]",i,_link_port_read_to_bank_read          [i]);
-          printf("   * Read  in  [%d] to out    [%d]\n",i,_link_port_read_to_bank_read          [i]);
+            log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","   * Read  in  [%d] to out    [%d]",i,_link_port_read_to_bank_read          [i]);
           }
-        log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_bank_write");
+        log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_bank_write");
         for (uint32_t i=0; i<_nb_port_write        ;i++)
           {
-            log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","   * Write in  [%d] to out    [%d]",i,_link_port_write_to_bank_write          [i]);
-            printf("   * Write in  [%d] to out    [%d]\n",i,_link_port_write_to_bank_write          [i]);
+            log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","   * Write in  [%d] to out    [%d]",i,_link_port_write_to_bank_write          [i]);
           }
       }
@@ -102 +102 @@
     _num_reg_shift         (param._num_reg_shift        ),
     _num_reg_mask          (param._num_reg_mask         ),
-    _nb_word_by_bank       (param._nb_word_by_bank      )
+    _nb_word_by_bank       (param._nb_word_by_bank      ),
+    _have_port_address     (param._have_port_address     ),
+    _have_bank_port_address(param._have_bank_port_address)
   {
     log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters (copy)","Begin");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked.cpp

@@ -85 +85 @@
     sensitive_neg << *(in_CLOCK);
     for (uint32_t i=0; i<_param->_nb_port_read; i++)
-      sensitive << *( in_READ_VAL     [i])
-                << *( in_READ_ADDRESS [i]);
+      {
+        sensitive << *( in_READ_VAL     [i]);
+        if (_param->_have_port_address == true)
+          sensitive << *( in_READ_ADDRESS [i]);
+      }
 
 #ifdef SYSTEMCASS_SPECIFIC
@@ -93 +96 @@
       {
         (*(out_READ_ACK  [i])) (*( in_READ_VAL     [i]));
+        if (_param->_have_port_address == true)
         (*(out_READ_ACK  [i])) (*( in_READ_ADDRESS [i]));
         (*(out_READ_DATA [i])) (*( in_READ_VAL     [i]));
+        if (_param->_have_port_address == true)
         (*(out_READ_DATA [i])) (*( in_READ_ADDRESS [i]));
       }
@@ -109 +114 @@
     sensitive_neg << *(in_CLOCK);
     for (uint32_t i=0; i<_param->_nb_port_write; i++)
-      sensitive << *( in_WRITE_VAL     [i])
-                << *( in_WRITE_ADDRESS [i])
-                << *( in_WRITE_DATA    [i]);
+      {
+        sensitive << *( in_WRITE_VAL     [i])
+                  << *( in_WRITE_DATA    [i]);
+        if (_param->_have_port_address == true)
+          sensitive << *( in_WRITE_ADDRESS [i]);
+      }
 
 #ifdef SYSTEMCASS_SPECIFIC
@@ -118 +126 @@
       {
         (*(out_WRITE_ACK  [i])) (*( in_WRITE_VAL     [i]));
+        if (_param->_have_port_address == true)
         (*(out_WRITE_ACK  [i])) (*( in_WRITE_ADDRESS [i]));
         (*(out_WRITE_ACK  [i])) (*( in_WRITE_DATA    [i]));

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp

@@ -50 +50 @@
      in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param->_nb_port_read];
     out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read];
+    if (_param->_have_port_address == true)
      in_READ_ADDRESS     = new SC_IN (Taddress_t) * [_param->_nb_port_read];
     out_READ_DATA        = new SC_OUT(Tdata_t   ) * [_param->_nb_port_read];
@@ -65 +66 @@
          in_READ_VAL     [i]  = interface->set_signal_valack_in        ("val"    , VAL);
         out_READ_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
+        if (_param->_have_port_address == true)
          in_READ_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(log2(_param->_nb_word)));
         out_READ_DATA    [i]  = interface->set_signal_out <Tdata_t   > ("data"   , _param->_size_word);
@@ -73 +75 @@
      in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param->_nb_port_write];
     out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write];
+    if (_param->_have_port_address == true)
      in_WRITE_ADDRESS    = new SC_IN (Taddress_t) * [_param->_nb_port_write];
      in_WRITE_DATA       = new SC_IN (Tdata_t   ) * [_param->_nb_port_write];
@@ -88 +91 @@
          in_WRITE_VAL     [i]  = interface->set_signal_valack_in        ("val"    , VAL);
         out_WRITE_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
+        if (_param->_have_port_address == true)
          in_WRITE_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(log2(_param->_nb_word)));
          in_WRITE_DATA    [i]  = interface->set_signal_in  <Tdata_t   > ("data"   , _param->_size_word);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_deallocation.cpp

@@ -26 +26 @@
     delete []  in_READ_VAL    ;
     delete [] out_READ_ACK    ;
+    if (_param->_have_port_address == true)
     delete []  in_READ_ADDRESS;
     delete [] out_READ_DATA   ;
@@ -32 +33 @@
     delete []  in_WRITE_VAL    ;
     delete [] out_WRITE_ACK    ;
+    if (_param->_have_port_address == true)
     delete []  in_WRITE_ADDRESS;
     delete []  in_WRITE_DATA   ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp

@@ -37 +37 @@
           {
             // Compute the adress of the bank
-            Taddress_t address = PORT_READ(in_READ_ADDRESS[i]);
+            Taddress_t address;
+            if (_param->_have_port_address == true)
+              address = PORT_READ(in_READ_ADDRESS[i]);
+            else
+              address = 0;
+
             log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * address   : %d",address);
             Taddress_t bank    = address_bank    (address);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_write.cpp

@@ -38 +38 @@
             val                = false;
             // Compute the adress of the bank
-            Taddress_t address = PORT_READ(in_WRITE_ADDRESS[i]);
+            Taddress_t address;
+            if (_param->_have_port_address == true)
+              address = PORT_READ(in_WRITE_ADDRESS[i]);
+            else
+              address = 0;
             log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_write"," * address   : %d",address);
             Taddress_t bank    = address_bank    (address);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp

@@ -37 +37 @@
           {
             // Compute the adress of the bank
-            Taddress_t address = PORT_READ(in_READ_ADDRESS[i]);
+            Taddress_t address;
+            if (_param->_have_port_address == true)
+              address = PORT_READ(in_READ_ADDRESS[i]);
+            else
+              address = 0;
             log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * address   : %d",address);
             Taddress_t bank    = address_bank    (address);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_write.cpp

@@ -37 +37 @@
             val                = false;
             // Compute the adress of the bank
-            Taddress_t address = PORT_READ(in_WRITE_ADDRESS[i]);
+            Taddress_t address;
+            if (_param->_have_port_address == true)
+              address = PORT_READ(in_WRITE_ADDRESS[i]);
+            else
+              address = 0;
             log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write"," * address   : %d",address);
             Taddress_t bank    = address_bank    (address);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp

@@ -51 +51 @@
             vhdl->set_body("\t, in_READ_"+toString(j)+"_VAL     \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_VAL");
             vhdl->set_body("\t,out_READ_"+toString(j)+"_ACK     \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ACK");
+            if (_param->_have_bank_port_address == true)
             vhdl->set_body("\t, in_READ_"+toString(j)+"_ADDRESS \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ADDRESS");
             vhdl->set_body("\t,out_READ_"+toString(j)+"_DATA    \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_DATA");
@@ -58 +59 @@
             vhdl->set_body("\t, in_WRITE_"+toString(j)+"_VAL     \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_VAL");
             vhdl->set_body("\t,out_WRITE_"+toString(j)+"_ACK     \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ACK");
+            if (_param->_have_bank_port_address == true)
             vhdl->set_body("\t, in_WRITE_"+toString(j)+"_ADDRESS \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ADDRESS");
             vhdl->set_body("\t, in_WRITE_"+toString(j)+"_DATA    \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_DATA");
@@ -154 +156 @@
     vhdl->set_body("-----------------------------------");
     vhdl->set_body("");
+
+    if (_param->_have_bank_port_address == true)
     for (uint32_t i=0; i<_param->_nb_bank; i++)
       {
@@ -221 +225 @@
         for (uint32_t j=0; j<_param->_nb_port_read; j ++)
           {
-            string address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
-
-            vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL  <= '1' when (in_READ_"+toString(j)+"_VAL ='1') "+address+"else '0';");
+            string str_address;
+
+            if (_param->_have_bank_port_address == true)
+              str_address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
+            else
+              str_address = "";
+
+            vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL  <= '1' when (in_READ_"+toString(j)+"_VAL ='1') "+str_address+"else '0';");
           }
         for (uint32_t j=0; j<_param->_nb_port_write; j ++)
           {
-            string address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
-            vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+address+"else '0';");
+            string str_address;
+
+            if (_param->_have_port_address == true)
+              str_address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
+            else
+              str_address = "";
+
+            vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+str_address+"else '0';");
           }
       }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_declaration.cpp

@@ -41 +41 @@
             vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_VAL" ,1);
             vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ACK"    ,1);
+            if (_param->_have_bank_port_address == true)
             vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ADDRESS",_param->_size_address_by_bank);
             vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_DATA"   ,_param->_size_word);
@@ -64 +65 @@
             vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_VAL"    ,1);
             vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ACK"    ,1);
+            if (_param->_have_bank_port_address == true)
             vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ADDRESS",_param->_size_address_by_bank);
             vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_DATA"   ,_param->_size_word);