Changeset 69 for trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component

Timestamp:

Dec 12, 2007, 5:02:47 PM (17 years ago)

Author:

rosiere

Message:

Station de reservation : systemC et VHDL ok

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component

Files:

• include/New_Component.h (modified) (1 diff)
• src/New_Component_end_cycle.cpp (moved) (moved from trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_testbench_transition.cpp) (3 diffs)
• src/New_Component_transition.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h

@@ -108 +108 @@
 #endif                                         
                                                
-#ifdef VHDL_TESTBENCH                          
-  private : void     vhdl_testbench_transition (void);
-#endif
+  private : void     end_cycle                 (void);
   };
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_end_cycle.cpp

@@ -1 @@
-#ifdef VHDL_TESTBENCH
 /*
  * $Id$
@@ -9 +8 @@
 #include "Behavioural/@DIRECTORY/include/@COMPONENT.h"
 
-namespace morpheo                    {
+namespace morpheo {
 namespace behavioural {
 @NAMESPACE_BEGIN
 
 #undef  FUNCTION
-#define FUNCTION "@COMPONENT::vhdl_testbench_transition"
-  void @COMPONENT::vhdl_testbench_transition ()
+#define FUNCTION "@COMPONENT::end_cycle"
+void @COMPONENT::end_cycle ()
   {
     log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
 
+#ifdef STATISTICS
+    _stat->add();
+#endif    
+
+#ifdef VHDL_TESTBENCH
     // Evaluation before read the ouput signal
-//     sc_start(0);
-
+//  sc_start(0);
     _interfaces->testbench();
+#endif
 
     log_printf(FUNC,@COMPONENT,FUNCTION,"End");
@@ -30 +34 @@
 }; // end namespace behavioural
 }; // end namespace morpheo              
-#endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp

@@ -20 +20 @@
     log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
 
-#ifdef STATISTICS
-    _stat->add();
-#endif    
-
-#ifdef VHDL_TESTBENCH
-    vhdl_testbench_transition ();
-#endif
+    end_cycle ();
 
     log_printf(FUNC,@COMPONENT,FUNCTION,"End");