Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/config_min.cfg	(revision 69)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/config_min.cfg	(revision 69)
@@ -0,0 +1,17 @@
+Reservation_station
+1	16	*2	# size_queue    
+1	1	*4	# nb_inst_retire
+1	1	*4	# nb_context         
+1	1	*4	# nb_front_end       
+1	1	*4	# nb_ooo_engine
+256	256	*2	# nb_packet          
+16	16	+1	# size_general_data  
+16	16	+1	# size_special_data  
+8	8	*2	# nb_general_register
+8	8	+1	# nb_special_register
+4	4	+1	# nb_operation       
+4	4	+1	# nb_type            
+1	1	*2	# nb_gpr_write
+1	1	*2	# nb_spr_write
+0	0	*2	# nb_bypass_write 
+0	0	*2	# nb_bypass_memory
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration.cfg	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration.cfg	(revision 69)
@@ -1,14 +1,17 @@
 Reservation_station
-8	8	*2	# size_queue    
-4	4	*2	# nb_context         
-32	32	*2	# nb_packet          
+1 	1 	*2	# size_queue    
+1	1	*4	# nb_inst_retire
+1	1	*4	# nb_context         
+1	1	*4	# nb_front_end       
+4	4	*4	# nb_ooo_engine
+64 	64 	*2	# nb_packet          
 16	16	+1	# size_general_data  
-8	8	+1	# size_special_data  
-16	16	*2	# nb_general_register
-16	16	+1	# nb_special_register
-40	40	+1	# nb_operation       
-6	6	+1	# nb_type            
-4	4	*2	# nb_gpr_write
-2	2	*2	# nb_spr_write
-4	4	*2	# nb_bypass_write 
-2	2	*2	# nb_bypass_memory
+16	16	+1	# size_special_data  
+8 	8 	*2	# nb_general_register
+8 	8 	+1	# nb_special_register
+8	8	+1	# nb_operation       
+4	4	+1	# nb_type            
+1	1	*2	# nb_gpr_write
+1	1	*2	# nb_spr_write
+0	0	*2	# nb_bypass_write 
+0	0	*2	# nb_bypass_memory
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/main.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/main.cpp	(revision 69)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/include/test.h"
 
-#define NB_PARAMS 0
+#define NB_PARAMS 16
 
 void usage (int argc, char * argv[])
@@ -15,5 +15,8 @@
        << "list_params is :" << endl
        << " - size_queue          (unsigned int)" << endl
+       << " - nb_inst_retire      (unsigned int)" << endl
        << " - nb_context          (unsigned int)" << endl
+       << " - nb_front_end        (unsigned int)" << endl
+       << " - nb_ooo_engine       (unsigned int)" << endl
        << " - nb_packet           (unsigned int)" << endl
        << " - size_general_data   (unsigned int)" << endl
@@ -42,21 +45,25 @@
 #endif
 {
-  if (argc < 2+NB_PARAMS)
+  if (argc != 2+NB_PARAMS)
     usage (argc, argv);
 
-  const string   name      = argv[1];
-  const uint32_t size_queue          = atoi(argv[ 2]);
-  const uint32_t nb_context          = atoi(argv[ 3]);
-  const uint32_t nb_packet           = atoi(argv[ 4]);
-  const uint32_t size_general_data   = atoi(argv[ 5]);
-  const uint32_t size_special_data   = atoi(argv[ 6]);
-  const uint32_t nb_general_register = atoi(argv[ 7]);
-  const uint32_t nb_special_register = atoi(argv[ 8]);
-  const uint32_t nb_operation        = atoi(argv[ 9]);
-  const uint32_t nb_type             = atoi(argv[10]);
-  const uint32_t nb_gpr_write        = atoi(argv[11]);
-  const uint32_t nb_spr_write        = atoi(argv[12]);
-  const uint32_t nb_bypass_write     = atoi(argv[13]);
-  const uint32_t nb_bypass_memory    = atoi(argv[14]);
+  uint32_t x=1;
+  const string   name                =      argv[x++];
+  const uint32_t size_queue          = atoi(argv[x++]);
+  const uint32_t nb_inst_retire      = atoi(argv[x++]);
+  const uint32_t nb_context          = atoi(argv[x++]);
+  const uint32_t nb_front_end        = atoi(argv[x++]);
+  const uint32_t nb_ooo_engine       = atoi(argv[x++]);
+  const uint32_t nb_packet           = atoi(argv[x++]);
+  const uint32_t size_general_data   = atoi(argv[x++]);
+  const uint32_t size_special_data   = atoi(argv[x++]);
+  const uint32_t nb_general_register = atoi(argv[x++]);
+  const uint32_t nb_special_register = atoi(argv[x++]);
+  const uint32_t nb_operation        = atoi(argv[x++]);
+  const uint32_t nb_type             = atoi(argv[x++]);
+  const uint32_t nb_gpr_write        = atoi(argv[x++]);
+  const uint32_t nb_spr_write        = atoi(argv[x++]);
+  const uint32_t nb_bypass_write     = atoi(argv[x++]);
+  const uint32_t nb_bypass_memory    = atoi(argv[x++]);
   
   try 
@@ -64,5 +71,8 @@
       morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Parameters
 	(size_queue    
+	 ,nb_inst_retire     
 	 ,nb_context         
+	 ,nb_front_end       
+	 ,nb_ooo_engine
 	 ,nb_packet          
 	 ,size_general_data  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp	(revision 69)
@@ -10,6 +10,6 @@
 #include "Common/include/Test.h"
 
-#define NB_ITERATION  16
-#define CYCLE_MAX     (512*NB_ITERATION)
+#define NB_ITERATION  2
+#define CYCLE_MAX     (2048*NB_ITERATION)
 
 #define LABEL(str)                                                                       \
@@ -64,119 +64,125 @@
   sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_VAL            = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tcontrol_t        > * out_RESERVATION_STATION_IN_ACK            = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tcontext_t        > *  in_RESERVATION_STATION_IN_CONTEXT_ID     = new sc_signal<Tcontext_t        >;
-  sc_signal<Tpacket_t         > *  in_RESERVATION_STATION_IN_PACKET_ID      = new sc_signal<Tpacket_t         >;
-  sc_signal<Toperation_t      > *  in_RESERVATION_STATION_IN_OPERATION      = new sc_signal<Toperation_t      >;
-  sc_signal<Ttype_t           > *  in_RESERVATION_STATION_IN_TYPE           = new sc_signal<Ttype_t           >;
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_HAS_IMMEDIAT   = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tgeneral_data_t   > *  in_RESERVATION_STATION_IN_IMMEDIAT       = new sc_signal<Tgeneral_data_t   >;
-//sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_READ_RA        = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tgeneral_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RA     = new sc_signal<Tgeneral_address_t>;
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_DATA_RA_VAL    = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tgeneral_data_t   > *  in_RESERVATION_STATION_IN_DATA_RA        = new sc_signal<Tgeneral_data_t   >;
-//sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_READ_RB        = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tgeneral_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RB     = new sc_signal<Tgeneral_address_t>;
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_DATA_RB_VAL    = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tgeneral_data_t   > *  in_RESERVATION_STATION_IN_DATA_RB        = new sc_signal<Tgeneral_data_t   >;
-//sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_READ_RC        = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tspecial_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RC     = new sc_signal<Tspecial_address_t>;
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_DATA_RC_VAL    = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tspecial_data_t   > *  in_RESERVATION_STATION_IN_DATA_RC        = new sc_signal<Tspecial_data_t   >;
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_WRITE_RD       = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tgeneral_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RD     = new sc_signal<Tgeneral_address_t>;
-  sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_WRITE_RE       = new sc_signal<Tcontrol_t        >;
-  sc_signal<Tspecial_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RE     = new sc_signal<Tspecial_address_t>;
-
-  sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_VAL         = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
-  sc_signal<Tcontrol_t        > **  in_RESERVATION_STATION_OUT_ACK         = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
-  sc_signal<Tcontext_t        > ** out_RESERVATION_STATION_OUT_CONTEXT_ID  = new sc_signal<Tcontext_t        > * [_param->_size_queue];
-  sc_signal<Tpacket_t         > ** out_RESERVATION_STATION_OUT_PACKET_ID   = new sc_signal<Tpacket_t         > * [_param->_size_queue];
-  sc_signal<Toperation_t      > ** out_RESERVATION_STATION_OUT_OPERATION   = new sc_signal<Toperation_t      > * [_param->_size_queue];
-  sc_signal<Ttype_t           > ** out_RESERVATION_STATION_OUT_TYPE        = new sc_signal<Ttype_t           > * [_param->_size_queue];
-  sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_HAS_IMMEDIAT= new sc_signal<Tcontrol_t        > * [_param->_size_queue];
-  sc_signal<Tgeneral_data_t   > ** out_RESERVATION_STATION_OUT_IMMEDIAT    = new sc_signal<Tgeneral_data_t   > * [_param->_size_queue];
-  sc_signal<Tgeneral_data_t   > ** out_RESERVATION_STATION_OUT_DATA_RA     = new sc_signal<Tgeneral_data_t   > * [_param->_size_queue];
-  sc_signal<Tgeneral_data_t   > ** out_RESERVATION_STATION_OUT_DATA_RB     = new sc_signal<Tgeneral_data_t   > * [_param->_size_queue];
-  sc_signal<Tspecial_data_t   > ** out_RESERVATION_STATION_OUT_DATA_RC     = new sc_signal<Tspecial_data_t   > * [_param->_size_queue];
-  sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_WRITE_RD    = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
-  sc_signal<Tgeneral_address_t> ** out_RESERVATION_STATION_OUT_NUM_REG_RD  = new sc_signal<Tgeneral_address_t> * [_param->_size_queue];
-  sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_WRITE_RE    = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
-  sc_signal<Tspecial_address_t> ** out_RESERVATION_STATION_OUT_NUM_REG_RE  = new sc_signal<Tspecial_address_t> * [_param->_size_queue];
+  sc_signal<Tcontrol_t        > *  in_INSERT_VAL            = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tcontrol_t        > * out_INSERT_ACK            = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tcontext_t        > *  in_INSERT_CONTEXT_ID     = new sc_signal<Tcontext_t        >; 
+  sc_signal<Tcontext_t        > *  in_INSERT_FRONT_END_ID   = new sc_signal<Tcontext_t        >;
+  sc_signal<Tcontext_t        > *  in_INSERT_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        >;
+  sc_signal<Tpacket_t         > *  in_INSERT_ROB_ID         = new sc_signal<Tpacket_t         >;
+  sc_signal<Toperation_t      > *  in_INSERT_OPERATION      = new sc_signal<Toperation_t      >;
+  sc_signal<Ttype_t           > *  in_INSERT_TYPE           = new sc_signal<Ttype_t           >;
+  sc_signal<Tcontrol_t        > *  in_INSERT_HAS_IMMEDIAT   = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tgeneral_data_t   > *  in_INSERT_IMMEDIAT       = new sc_signal<Tgeneral_data_t   >;
+//sc_signal<Tcontrol_t        > *  in_INSERT_READ_RA        = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tgeneral_address_t> *  in_INSERT_NUM_REG_RA     = new sc_signal<Tgeneral_address_t>;
+  sc_signal<Tcontrol_t        > *  in_INSERT_DATA_RA_VAL    = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tgeneral_data_t   > *  in_INSERT_DATA_RA        = new sc_signal<Tgeneral_data_t   >;
+//sc_signal<Tcontrol_t        > *  in_INSERT_READ_RB        = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tgeneral_address_t> *  in_INSERT_NUM_REG_RB     = new sc_signal<Tgeneral_address_t>;
+  sc_signal<Tcontrol_t        > *  in_INSERT_DATA_RB_VAL    = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tgeneral_data_t   > *  in_INSERT_DATA_RB        = new sc_signal<Tgeneral_data_t   >;
+//sc_signal<Tcontrol_t        > *  in_INSERT_READ_RC        = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tspecial_address_t> *  in_INSERT_NUM_REG_RC     = new sc_signal<Tspecial_address_t>;
+  sc_signal<Tcontrol_t        > *  in_INSERT_DATA_RC_VAL    = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tspecial_data_t   > *  in_INSERT_DATA_RC        = new sc_signal<Tspecial_data_t   >;
+  sc_signal<Tcontrol_t        > *  in_INSERT_WRITE_RD       = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tgeneral_address_t> *  in_INSERT_NUM_REG_RD     = new sc_signal<Tgeneral_address_t>;
+  sc_signal<Tcontrol_t        > *  in_INSERT_WRITE_RE       = new sc_signal<Tcontrol_t        >;
+  sc_signal<Tspecial_address_t> *  in_INSERT_NUM_REG_RE     = new sc_signal<Tspecial_address_t>;
+
+  sc_signal<Tcontrol_t        > ** out_RETIRE_VAL            = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tcontrol_t        > **  in_RETIRE_ACK            = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tcontext_t        > ** out_RETIRE_CONTEXT_ID     = new sc_signal<Tcontext_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tcontext_t        > ** out_RETIRE_FRONT_END_ID   = new sc_signal<Tcontext_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tcontext_t        > ** out_RETIRE_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tpacket_t         > ** out_RETIRE_ROB_ID         = new sc_signal<Tpacket_t         > * [_param->_nb_inst_retire];
+  sc_signal<Toperation_t      > ** out_RETIRE_OPERATION      = new sc_signal<Toperation_t      > * [_param->_nb_inst_retire];
+  sc_signal<Ttype_t           > ** out_RETIRE_TYPE           = new sc_signal<Ttype_t           > * [_param->_nb_inst_retire];
+  sc_signal<Tcontrol_t        > ** out_RETIRE_HAS_IMMEDIAT   = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tgeneral_data_t   > ** out_RETIRE_IMMEDIAT       = new sc_signal<Tgeneral_data_t   > * [_param->_nb_inst_retire];
+  sc_signal<Tgeneral_data_t   > ** out_RETIRE_DATA_RA        = new sc_signal<Tgeneral_data_t   > * [_param->_nb_inst_retire];
+  sc_signal<Tgeneral_data_t   > ** out_RETIRE_DATA_RB        = new sc_signal<Tgeneral_data_t   > * [_param->_nb_inst_retire];
+  sc_signal<Tspecial_data_t   > ** out_RETIRE_DATA_RC        = new sc_signal<Tspecial_data_t   > * [_param->_nb_inst_retire];
+  sc_signal<Tcontrol_t        > ** out_RETIRE_WRITE_RD       = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tgeneral_address_t> ** out_RETIRE_NUM_REG_RD     = new sc_signal<Tgeneral_address_t> * [_param->_nb_inst_retire];
+  sc_signal<Tcontrol_t        > ** out_RETIRE_WRITE_RE       = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
+  sc_signal<Tspecial_address_t> ** out_RETIRE_NUM_REG_RE     = new sc_signal<Tspecial_address_t> * [_param->_nb_inst_retire];
     
-  for (uint32_t i=0; i<_param->_size_queue; i++)
+  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     {
-      out_RESERVATION_STATION_OUT_VAL          [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-       in_RESERVATION_STATION_OUT_ACK          [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      out_RESERVATION_STATION_OUT_CONTEXT_ID   [i] = new sc_signal<Tcontext_t        > (rename.c_str());
-      out_RESERVATION_STATION_OUT_PACKET_ID    [i] = new sc_signal<Tpacket_t         > (rename.c_str());
-      out_RESERVATION_STATION_OUT_OPERATION    [i] = new sc_signal<Toperation_t      > (rename.c_str());
-      out_RESERVATION_STATION_OUT_TYPE         [i] = new sc_signal<Ttype_t           > (rename.c_str());
-      out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      out_RESERVATION_STATION_OUT_IMMEDIAT     [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-      out_RESERVATION_STATION_OUT_DATA_RA      [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-      out_RESERVATION_STATION_OUT_DATA_RB      [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-      out_RESERVATION_STATION_OUT_DATA_RC      [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
-      out_RESERVATION_STATION_OUT_WRITE_RD     [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      out_RESERVATION_STATION_OUT_NUM_REG_RD   [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
-      out_RESERVATION_STATION_OUT_WRITE_RE     [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      out_RESERVATION_STATION_OUT_NUM_REG_RE   [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
+      out_RETIRE_VAL             [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+       in_RETIRE_ACK             [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      out_RETIRE_CONTEXT_ID      [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      out_RETIRE_FRONT_END_ID    [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      out_RETIRE_OOO_ENGINE_ID   [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      out_RETIRE_ROB_ID          [i] = new sc_signal<Tpacket_t         > (rename.c_str());
+      out_RETIRE_OPERATION       [i] = new sc_signal<Toperation_t      > (rename.c_str());
+      out_RETIRE_TYPE            [i] = new sc_signal<Ttype_t           > (rename.c_str());
+      out_RETIRE_HAS_IMMEDIAT    [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      out_RETIRE_IMMEDIAT        [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
+      out_RETIRE_DATA_RA         [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
+      out_RETIRE_DATA_RB         [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
+      out_RETIRE_DATA_RC         [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
+      out_RETIRE_WRITE_RD        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      out_RETIRE_NUM_REG_RD      [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
+      out_RETIRE_WRITE_RE        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      out_RETIRE_NUM_REG_RE      [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
     }
 
-  sc_signal<Tcontrol_t        > ** in_GPR_WRITE_VAL        = new sc_signal<Tcontrol_t        > * [_param->_nb_gpr_write];
-  sc_signal<Tcontext_t        > ** in_GPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t        > * [_param->_nb_gpr_write];
-  sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG    = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
-  sc_signal<Tgeneral_data_t   > ** in_GPR_WRITE_DATA       = new sc_signal<Tgeneral_data_t   > * [_param->_nb_gpr_write];
+  sc_signal<Tcontrol_t        > ** in_GPR_WRITE_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_gpr_write];
+  sc_signal<Tcontext_t        > ** in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_gpr_write];
+  sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
+  sc_signal<Tgeneral_data_t   > ** in_GPR_WRITE_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_gpr_write];
    
   for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
     {
-      in_GPR_WRITE_VAL        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      in_GPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
-      in_GPR_WRITE_NUM_REG    [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
-      in_GPR_WRITE_DATA       [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
+      in_GPR_WRITE_VAL           [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      in_GPR_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      in_GPR_WRITE_NUM_REG       [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
+      in_GPR_WRITE_DATA          [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     }
   
-  sc_signal<Tcontrol_t        > ** in_SPR_WRITE_VAL       = new sc_signal<Tcontrol_t        > * [_param->_nb_spr_write];
-  sc_signal<Tcontext_t        > ** in_SPR_WRITE_CONTEXT_ID= new sc_signal<Tcontext_t        > * [_param->_nb_spr_write];
-  sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG   = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
-  sc_signal<Tspecial_data_t   > ** in_SPR_WRITE_DATA      = new sc_signal<Tspecial_data_t   > * [_param->_nb_spr_write];
+  sc_signal<Tcontrol_t        > ** in_SPR_WRITE_VAL          = new sc_signal<Tcontrol_t        > * [_param->_nb_spr_write];
+  sc_signal<Tcontext_t        > ** in_SPR_WRITE_OOO_ENGINE_ID= new sc_signal<Tcontext_t        > * [_param->_nb_spr_write];
+  sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG      = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
+  sc_signal<Tspecial_data_t   > ** in_SPR_WRITE_DATA         = new sc_signal<Tspecial_data_t   > * [_param->_nb_spr_write];
    
   for (uint32_t i=0; i<_param->_nb_spr_write; i++)
     {
-      in_SPR_WRITE_VAL        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      in_SPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
-      in_SPR_WRITE_NUM_REG    [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
-      in_SPR_WRITE_DATA       [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
+      in_SPR_WRITE_VAL           [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      in_SPR_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      in_SPR_WRITE_NUM_REG       [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
+      in_SPR_WRITE_DATA          [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
     }
 
-  sc_signal<Tcontext_t        > ** in_BYPASS_WRITE_CONTEXT_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_write];
-  sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_GPR_VAL     = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
-  sc_signal<Tgeneral_address_t> ** in_BYPASS_WRITE_GPR_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_write];
-  sc_signal<Tgeneral_data_t   > ** in_BYPASS_WRITE_GPR_DATA    = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_write];
-  sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_SPR_VAL     = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
-  sc_signal<Tspecial_address_t> ** in_BYPASS_WRITE_SPR_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_bypass_write];
-  sc_signal<Tspecial_data_t   > ** in_BYPASS_WRITE_SPR_DATA    = new sc_signal<Tspecial_data_t   > * [_param->_nb_bypass_write];
+  sc_signal<Tcontext_t        > ** in_BYPASS_WRITE_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_write];
+  sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_GPR_VAL        = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
+  sc_signal<Tgeneral_address_t> ** in_BYPASS_WRITE_GPR_NUM_REG    = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_write];
+  sc_signal<Tgeneral_data_t   > ** in_BYPASS_WRITE_GPR_DATA       = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_write];
+  sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_SPR_VAL        = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
+  sc_signal<Tspecial_address_t> ** in_BYPASS_WRITE_SPR_NUM_REG    = new sc_signal<Tspecial_address_t> * [_param->_nb_bypass_write];
+  sc_signal<Tspecial_data_t   > ** in_BYPASS_WRITE_SPR_DATA       = new sc_signal<Tspecial_data_t   > * [_param->_nb_bypass_write];
 
   for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
     {
-      in_BYPASS_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
-      in_BYPASS_WRITE_GPR_VAL    [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      in_BYPASS_WRITE_GPR_NUM_REG[i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
-      in_BYPASS_WRITE_GPR_DATA   [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-      in_BYPASS_WRITE_SPR_VAL    [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      in_BYPASS_WRITE_SPR_NUM_REG[i] = new sc_signal<Tspecial_address_t> (rename.c_str());
-      in_BYPASS_WRITE_SPR_DATA   [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
+      in_BYPASS_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      in_BYPASS_WRITE_GPR_VAL       [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      in_BYPASS_WRITE_GPR_NUM_REG   [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
+      in_BYPASS_WRITE_GPR_DATA      [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
+      in_BYPASS_WRITE_SPR_VAL       [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      in_BYPASS_WRITE_SPR_NUM_REG   [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
+      in_BYPASS_WRITE_SPR_DATA      [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
     }
-  sc_signal<Tcontrol_t        > ** in_BYPASS_MEMORY_VAL         = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
-  sc_signal<Tcontext_t        > ** in_BYPASS_MEMORY_CONTEXT_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
-  sc_signal<Tgeneral_address_t> ** in_BYPASS_MEMORY_NUM_REG     = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
-  sc_signal<Tgeneral_data_t   > ** in_BYPASS_MEMORY_DATA        = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
+  sc_signal<Tcontrol_t        > ** in_BYPASS_MEMORY_VAL            = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tcontext_t        > ** in_BYPASS_MEMORY_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_address_t> ** in_BYPASS_MEMORY_NUM_REG        = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_data_t   > ** in_BYPASS_MEMORY_DATA           = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
 
   for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
     {
-      in_BYPASS_MEMORY_VAL        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
-      in_BYPASS_MEMORY_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
-      in_BYPASS_MEMORY_NUM_REG    [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
-      in_BYPASS_MEMORY_DATA       [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
+      in_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
+      in_BYPASS_MEMORY_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
+      in_BYPASS_MEMORY_NUM_REG       [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
+      in_BYPASS_MEMORY_DATA          [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     }
     
@@ -190,51 +196,64 @@
   (*(_Reservation_station->in_NRESET))       (*(in_NRESET));
 
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_VAL              )) (*( in_RESERVATION_STATION_IN_VAL              ));
-  (*(_Reservation_station->out_RESERVATION_STATION_IN_ACK              )) (*(out_RESERVATION_STATION_IN_ACK              ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_CONTEXT_ID       )) (*( in_RESERVATION_STATION_IN_CONTEXT_ID       ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_PACKET_ID        )) (*( in_RESERVATION_STATION_IN_PACKET_ID        ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_OPERATION        )) (*( in_RESERVATION_STATION_IN_OPERATION        ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_TYPE             )) (*( in_RESERVATION_STATION_IN_TYPE             ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_HAS_IMMEDIAT     )) (*( in_RESERVATION_STATION_IN_HAS_IMMEDIAT     ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_IMMEDIAT         )) (*( in_RESERVATION_STATION_IN_IMMEDIAT         ));
-//   (*(_Reservation_station-> in_RESERVATION_STATION_IN_READ_RA          )) (*( in_RESERVATION_STATION_IN_READ_RA          ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RA       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RA       ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RA_VAL      )) (*( in_RESERVATION_STATION_IN_DATA_RA_VAL      ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RA          )) (*( in_RESERVATION_STATION_IN_DATA_RA          ));
-//   (*(_Reservation_station-> in_RESERVATION_STATION_IN_READ_RB          )) (*( in_RESERVATION_STATION_IN_READ_RB          ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RB       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RB       ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RB_VAL      )) (*( in_RESERVATION_STATION_IN_DATA_RB_VAL      ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RB          )) (*( in_RESERVATION_STATION_IN_DATA_RB          ));
-//   (*(_Reservation_station-> in_RESERVATION_STATION_IN_READ_RC          )) (*( in_RESERVATION_STATION_IN_READ_RC          ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RC       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RC       ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RC_VAL      )) (*( in_RESERVATION_STATION_IN_DATA_RC_VAL      ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RC          )) (*( in_RESERVATION_STATION_IN_DATA_RC          ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_WRITE_RD         )) (*( in_RESERVATION_STATION_IN_WRITE_RD         ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RD       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RD       ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_WRITE_RE         )) (*( in_RESERVATION_STATION_IN_WRITE_RE         ));
-  (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RE       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RE       ));
-
-    for (uint32_t i=0; i<_param->_size_queue; i++)
+  (*(_Reservation_station-> in_INSERT_VAL              )) (*( in_INSERT_VAL              ));
+  (*(_Reservation_station->out_INSERT_ACK              )) (*(out_INSERT_ACK              ));
+  if (_param->_have_port_context_id)
+  (*(_Reservation_station-> in_INSERT_CONTEXT_ID       )) (*( in_INSERT_CONTEXT_ID       ));
+  if (_param->_have_port_front_end_id)
+  (*(_Reservation_station-> in_INSERT_FRONT_END_ID     )) (*( in_INSERT_FRONT_END_ID     ));
+  if (_param->_have_port_ooo_engine_id)
+  (*(_Reservation_station-> in_INSERT_OOO_ENGINE_ID    )) (*( in_INSERT_OOO_ENGINE_ID    ));
+  if (_param->_have_port_rob_id)
+  (*(_Reservation_station-> in_INSERT_ROB_ID           )) (*( in_INSERT_ROB_ID           ));
+  (*(_Reservation_station-> in_INSERT_OPERATION        )) (*( in_INSERT_OPERATION        ));
+  (*(_Reservation_station-> in_INSERT_TYPE             )) (*( in_INSERT_TYPE             ));
+  (*(_Reservation_station-> in_INSERT_HAS_IMMEDIAT     )) (*( in_INSERT_HAS_IMMEDIAT     ));
+  (*(_Reservation_station-> in_INSERT_IMMEDIAT         )) (*( in_INSERT_IMMEDIAT         ));
+//   (*(_Reservation_station-> in_INSERT_READ_RA          )) (*( in_INSERT_READ_RA          ));
+  (*(_Reservation_station-> in_INSERT_NUM_REG_RA       )) (*( in_INSERT_NUM_REG_RA       ));
+  (*(_Reservation_station-> in_INSERT_DATA_RA_VAL      )) (*( in_INSERT_DATA_RA_VAL      ));
+  (*(_Reservation_station-> in_INSERT_DATA_RA          )) (*( in_INSERT_DATA_RA          ));
+//   (*(_Reservation_station-> in_INSERT_READ_RB          )) (*( in_INSERT_READ_RB          ));
+  (*(_Reservation_station-> in_INSERT_NUM_REG_RB       )) (*( in_INSERT_NUM_REG_RB       ));
+  (*(_Reservation_station-> in_INSERT_DATA_RB_VAL      )) (*( in_INSERT_DATA_RB_VAL      ));
+  (*(_Reservation_station-> in_INSERT_DATA_RB          )) (*( in_INSERT_DATA_RB          ));
+//   (*(_Reservation_station-> in_INSERT_READ_RC          )) (*( in_INSERT_READ_RC          ));
+  (*(_Reservation_station-> in_INSERT_NUM_REG_RC       )) (*( in_INSERT_NUM_REG_RC       ));
+  (*(_Reservation_station-> in_INSERT_DATA_RC_VAL      )) (*( in_INSERT_DATA_RC_VAL      ));
+  (*(_Reservation_station-> in_INSERT_DATA_RC          )) (*( in_INSERT_DATA_RC          ));
+  (*(_Reservation_station-> in_INSERT_WRITE_RD         )) (*( in_INSERT_WRITE_RD         ));
+  (*(_Reservation_station-> in_INSERT_NUM_REG_RD       )) (*( in_INSERT_NUM_REG_RD       ));
+  (*(_Reservation_station-> in_INSERT_WRITE_RE         )) (*( in_INSERT_WRITE_RE         ));
+  (*(_Reservation_station-> in_INSERT_NUM_REG_RE       )) (*( in_INSERT_NUM_REG_RE       ));
+
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
       {
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_VAL          [i])) (*(out_RESERVATION_STATION_OUT_VAL          [i]));
-  (*(_Reservation_station-> in_RESERVATION_STATION_OUT_ACK          [i])) (*( in_RESERVATION_STATION_OUT_ACK          [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_CONTEXT_ID   [i])) (*(out_RESERVATION_STATION_OUT_CONTEXT_ID   [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_PACKET_ID    [i])) (*(out_RESERVATION_STATION_OUT_PACKET_ID    [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_OPERATION    [i])) (*(out_RESERVATION_STATION_OUT_OPERATION    [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_TYPE         [i])) (*(out_RESERVATION_STATION_OUT_TYPE         [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i])) (*(out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_IMMEDIAT     [i])) (*(out_RESERVATION_STATION_OUT_IMMEDIAT     [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_DATA_RA      [i])) (*(out_RESERVATION_STATION_OUT_DATA_RA      [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_DATA_RB      [i])) (*(out_RESERVATION_STATION_OUT_DATA_RB      [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_DATA_RC      [i])) (*(out_RESERVATION_STATION_OUT_DATA_RC      [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_WRITE_RD     [i])) (*(out_RESERVATION_STATION_OUT_WRITE_RD     [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_NUM_REG_RD   [i])) (*(out_RESERVATION_STATION_OUT_NUM_REG_RD   [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_WRITE_RE     [i])) (*(out_RESERVATION_STATION_OUT_WRITE_RE     [i]));
-  (*(_Reservation_station->out_RESERVATION_STATION_OUT_NUM_REG_RE   [i])) (*(out_RESERVATION_STATION_OUT_NUM_REG_RE   [i]));
+  (*(_Reservation_station->out_RETIRE_VAL            [i])) (*(out_RETIRE_VAL            [i]));
+  (*(_Reservation_station-> in_RETIRE_ACK            [i])) (*( in_RETIRE_ACK            [i]));
+  if (_param->_have_port_context_id)
+  (*(_Reservation_station->out_RETIRE_CONTEXT_ID     [i])) (*(out_RETIRE_CONTEXT_ID     [i]));
+  if (_param->_have_port_front_end_id)
+  (*(_Reservation_station->out_RETIRE_FRONT_END_ID   [i])) (*(out_RETIRE_FRONT_END_ID   [i]));
+  if (_param->_have_port_ooo_engine_id)
+  (*(_Reservation_station->out_RETIRE_OOO_ENGINE_ID  [i])) (*(out_RETIRE_OOO_ENGINE_ID  [i]));
+  if (_param->_have_port_rob_id)
+  (*(_Reservation_station->out_RETIRE_ROB_ID         [i])) (*(out_RETIRE_ROB_ID         [i]));
+  (*(_Reservation_station->out_RETIRE_OPERATION      [i])) (*(out_RETIRE_OPERATION      [i]));
+  (*(_Reservation_station->out_RETIRE_TYPE           [i])) (*(out_RETIRE_TYPE           [i]));
+  (*(_Reservation_station->out_RETIRE_HAS_IMMEDIAT   [i])) (*(out_RETIRE_HAS_IMMEDIAT   [i]));
+  (*(_Reservation_station->out_RETIRE_IMMEDIAT       [i])) (*(out_RETIRE_IMMEDIAT       [i]));
+  (*(_Reservation_station->out_RETIRE_DATA_RA        [i])) (*(out_RETIRE_DATA_RA        [i]));
+  (*(_Reservation_station->out_RETIRE_DATA_RB        [i])) (*(out_RETIRE_DATA_RB        [i]));
+  (*(_Reservation_station->out_RETIRE_DATA_RC        [i])) (*(out_RETIRE_DATA_RC        [i]));
+  (*(_Reservation_station->out_RETIRE_WRITE_RD       [i])) (*(out_RETIRE_WRITE_RD       [i]));
+  (*(_Reservation_station->out_RETIRE_NUM_REG_RD     [i])) (*(out_RETIRE_NUM_REG_RD     [i]));
+  (*(_Reservation_station->out_RETIRE_WRITE_RE       [i])) (*(out_RETIRE_WRITE_RE       [i]));
+  (*(_Reservation_station->out_RETIRE_NUM_REG_RE     [i])) (*(out_RETIRE_NUM_REG_RE     [i]));
       }
     for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
       {
   (*(_Reservation_station-> in_GPR_WRITE_VAL                        [i])) (*( in_GPR_WRITE_VAL                        [i]));
-  (*(_Reservation_station-> in_GPR_WRITE_CONTEXT_ID                 [i])) (*( in_GPR_WRITE_CONTEXT_ID                 [i]));
+  if (_param->_have_port_ooo_engine_id)
+  (*(_Reservation_station-> in_GPR_WRITE_OOO_ENGINE_ID              [i])) (*( in_GPR_WRITE_OOO_ENGINE_ID              [i]));
   (*(_Reservation_station-> in_GPR_WRITE_NUM_REG                    [i])) (*( in_GPR_WRITE_NUM_REG                    [i]));
   (*(_Reservation_station-> in_GPR_WRITE_DATA                       [i])) (*( in_GPR_WRITE_DATA                       [i]));
@@ -243,5 +262,6 @@
       {
   (*(_Reservation_station-> in_SPR_WRITE_VAL                        [i])) (*( in_SPR_WRITE_VAL                        [i]));
-  (*(_Reservation_station-> in_SPR_WRITE_CONTEXT_ID                 [i])) (*( in_SPR_WRITE_CONTEXT_ID                 [i]));
+  if (_param->_have_port_ooo_engine_id)
+  (*(_Reservation_station-> in_SPR_WRITE_OOO_ENGINE_ID              [i])) (*( in_SPR_WRITE_OOO_ENGINE_ID              [i]));
   (*(_Reservation_station-> in_SPR_WRITE_NUM_REG                    [i])) (*( in_SPR_WRITE_NUM_REG                    [i]));
   (*(_Reservation_station-> in_SPR_WRITE_DATA                       [i])) (*( in_SPR_WRITE_DATA                       [i]));
@@ -249,5 +269,6 @@
     for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
       {
-  (*(_Reservation_station-> in_BYPASS_WRITE_CONTEXT_ID              [i])) (*( in_BYPASS_WRITE_CONTEXT_ID              [i]));
+  if (_param->_have_port_ooo_engine_id)
+  (*(_Reservation_station-> in_BYPASS_WRITE_OOO_ENGINE_ID           [i])) (*( in_BYPASS_WRITE_OOO_ENGINE_ID           [i]));
   (*(_Reservation_station-> in_BYPASS_WRITE_GPR_VAL                 [i])) (*( in_BYPASS_WRITE_GPR_VAL                 [i]));
   (*(_Reservation_station-> in_BYPASS_WRITE_GPR_NUM_REG             [i])) (*( in_BYPASS_WRITE_GPR_NUM_REG             [i]));
@@ -260,5 +281,6 @@
       {
   (*(_Reservation_station-> in_BYPASS_MEMORY_VAL                    [i])) (*( in_BYPASS_MEMORY_VAL                    [i]));
-  (*(_Reservation_station-> in_BYPASS_MEMORY_CONTEXT_ID             [i])) (*( in_BYPASS_MEMORY_CONTEXT_ID             [i]));
+  if (_param->_have_port_ooo_engine_id)
+  (*(_Reservation_station-> in_BYPASS_MEMORY_OOO_ENGINE_ID          [i])) (*( in_BYPASS_MEMORY_OOO_ENGINE_ID          [i]));
   (*(_Reservation_station-> in_BYPASS_MEMORY_NUM_REG                [i])) (*( in_BYPASS_MEMORY_NUM_REG                [i]));
   (*(_Reservation_station-> in_BYPASS_MEMORY_DATA                   [i])) (*( in_BYPASS_MEMORY_DATA                   [i]));
@@ -275,9 +297,9 @@
 
   const uint32_t nb_request = _param->_nb_packet;
-//const uint32_t seed = 0;
-  const uint32_t seed = static_cast<uint32_t>(time(NULL));
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
   srand(seed);
 
-  Tcontext_t         _context_id [nb_request];
+  Tcontext_t         _ooo_engine_id [nb_request];
   Tcontrol_t         _read_ra    [nb_request];
   Tgeneral_address_t _num_reg_ra [nb_request];
@@ -288,15 +310,15 @@
 
   // emulation of registerFile
-  Tcontrol_t         _gpr_val    [_param->_nb_general_register][_param->_nb_context];
-  Tgeneral_data_t    _gpr        [_param->_nb_general_register][_param->_nb_context];
-  Tcontrol_t         _spr_val    [_param->_nb_special_register][_param->_nb_context];
-  Tspecial_data_t    _spr        [_param->_nb_special_register][_param->_nb_context];
+  Tcontrol_t         _gpr_val    [_param->_nb_general_register][_param->_nb_ooo_engine];
+  Tgeneral_data_t    _gpr        [_param->_nb_general_register][_param->_nb_ooo_engine];
+  Tcontrol_t         _spr_val    [_param->_nb_special_register][_param->_nb_ooo_engine];
+  Tspecial_data_t    _spr        [_param->_nb_special_register][_param->_nb_ooo_engine];
 
   SC_START(0);
 
   LABEL("Initialisation");
-  in_RESERVATION_STATION_IN_VAL ->write(0);
-  for (uint32_t i=0; i<_param->_size_queue      ; i++)
-    in_RESERVATION_STATION_OUT_ACK [i]->write(0);
+  in_INSERT_VAL ->write(0);
+  for (uint32_t i=0; i<_param->_nb_inst_retire  ; i++)
+    in_RETIRE_ACK [i]->write(0);
   for (uint32_t i=0; i<_param->_nb_gpr_write    ; i++)
     in_GPR_WRITE_VAL               [i]->write(0);
@@ -331,5 +353,5 @@
       for (uint32_t i=0; i<nb_request; i++)
 	{
-	  _context_id   [i] = rand()% _param->_nb_context            ;
+	  _ooo_engine_id   [i] = rand()% _param->_nb_ooo_engine            ;
 	  _read_ra      [i] = rand()% 2                              ;
 	  _num_reg_ra   [i] = rand()% _param->_nb_general_register   ;
@@ -341,10 +363,10 @@
       
       // emulation of registerFile
-      for (uint32_t j=0; j<_param->_nb_context; j++)
+      for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
 	{
 	  for (uint32_t i=0; i<_param->_nb_general_register; i++)
 	    {
 	      _gpr_val      [i][j] = ((rand()%100) < percent_registerfile_valid);
-	      _gpr          [i][j] = rand()%(1<<_param->_size_general_data);
+	      _gpr          [i][j] = rand()%((1<<_param->_size_general_data)-1);
 	    }
 	  for (uint32_t i=0; i<_param->_nb_special_register; i++)
@@ -362,52 +384,92 @@
       for (uint32_t i=0; i<nb_request; i++)
 	request_out_wait [i] = true;
+      
+      bool can_gpr_use [_param->_nb_ooo_engine][_param->_nb_general_register];
+      bool can_spr_use [_param->_nb_ooo_engine][_param->_nb_special_register];
+      bool need_gpr    [_param->_nb_ooo_engine][_param->_nb_general_register];
+      bool need_spr    [_param->_nb_ooo_engine][_param->_nb_special_register];
+
+      
+      for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
+	{
+	  for (uint32_t i=0; i<_param->_nb_general_register; i++)
+	    need_gpr [j][i] = false;
+	  for (uint32_t i=0; i<_param->_nb_special_register; i++)
+	    need_spr [j][i] = false;
+	}
 
       while (request_out < nb_request)
 	{
-	  if ((request_in < nb_request) and
-	      ((rand()%100) < percent_transaction_queue_in))
+	  for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
+	    {
+	      for (uint32_t i=0; i<_param->_nb_general_register; i++)
+		can_gpr_use [j][i] = true;
+	      for (uint32_t i=0; i<_param->_nb_special_register; i++)
+		can_spr_use [j][i] = true;
+	    }
+
+	  Tcontrol_t         insert_val = (request_in < nb_request) and ((rand()%100) < percent_transaction_queue_in);
+	  Tcontext_t         insert_ooo_engine_id;
+	  Tgeneral_address_t insert_num_reg_ra;
+	  Tgeneral_address_t insert_num_reg_rb;
+	  Tspecial_address_t insert_num_reg_rc;
+
+	  in_INSERT_VAL         ->write(insert_val);
+	  if (insert_val)
 	    {
 	      bool               data_val;
-	      Tgeneral_address_t gpr_addr;
-	      Tspecial_address_t spr_addr;
-	      Tcontext_t         ctxt    = _context_id [request_in];
-   	      in_RESERVATION_STATION_IN_VAL         ->write(1);
-   	      in_RESERVATION_STATION_IN_CONTEXT_ID  ->write(ctxt);
-   	      in_RESERVATION_STATION_IN_PACKET_ID   ->write(request_in);
-   	      in_RESERVATION_STATION_IN_OPERATION   ->write(0);
-   	      in_RESERVATION_STATION_IN_TYPE        ->write(0);
-   	      in_RESERVATION_STATION_IN_HAS_IMMEDIAT->write(0);
-   	      in_RESERVATION_STATION_IN_IMMEDIAT    ->write(0);
-// 	      in_RESERVATION_STATION_IN_READ_RA     ->write(_read_ra[request_in]);
-	      gpr_addr = _num_reg_ra [request_in];
-	      data_val = not(_read_ra[request_in]) or _gpr_val[gpr_addr][ctxt];
-	      in_RESERVATION_STATION_IN_NUM_REG_RA  ->write(gpr_addr);
-   	      in_RESERVATION_STATION_IN_DATA_RA_VAL ->write(data_val);
-   	      in_RESERVATION_STATION_IN_DATA_RA     ->write((data_val)?_gpr[gpr_addr][ctxt]:0);
-// 	      in_RESERVATION_STATION_IN_READ_RB     ->write(_read_rb[request_in]);
-	      gpr_addr = _num_reg_rb [request_in];
-	      data_val = not(_read_rb[request_in]) or _gpr_val[gpr_addr][ctxt];
-   	      in_RESERVATION_STATION_IN_NUM_REG_RB  ->write(gpr_addr);			       
-   	      in_RESERVATION_STATION_IN_DATA_RB_VAL ->write(data_val);			       
-   	      in_RESERVATION_STATION_IN_DATA_RB     ->write((data_val)?_gpr[gpr_addr][ctxt]:0);
-// 	      in_RESERVATION_STATION_IN_READ_RC     ->write(_read_rc[request_in]);
-	      spr_addr = _num_reg_rc [request_in];
-	      data_val = not(_read_rc[request_in]) or _spr_val[spr_addr][ctxt];
-   	      in_RESERVATION_STATION_IN_NUM_REG_RC  ->write(spr_addr);			       
-   	      in_RESERVATION_STATION_IN_DATA_RC_VAL ->write(data_val);			       
-   	      in_RESERVATION_STATION_IN_DATA_RC     ->write((data_val)?_spr[spr_addr][ctxt]:0);
-   	      in_RESERVATION_STATION_IN_WRITE_RD    ->write(0);
-   	      in_RESERVATION_STATION_IN_NUM_REG_RD  ->write(0);
-   	      in_RESERVATION_STATION_IN_WRITE_RE    ->write(0);
-   	      in_RESERVATION_STATION_IN_NUM_REG_RE  ->write(0);
-	    }
-	  else
-	    {
-	      in_RESERVATION_STATION_IN_VAL         ->write(0);
-	    }
-
-	  for (uint32_t i=0; i<_param->_size_queue      ; i++)
-	    in_RESERVATION_STATION_OUT_ACK[i]->write((rand()%100)<percent_transaction_queue_out);
-
+	      insert_ooo_engine_id = _ooo_engine_id [request_in];
+	      insert_num_reg_ra    = _num_reg_ra [request_in];
+	      insert_num_reg_rb    = _num_reg_rb [request_in];
+	      insert_num_reg_rc    = _num_reg_rc [request_in];
+
+	      if (_param->_have_port_context_id)
+              in_INSERT_CONTEXT_ID     ->write((2*insert_ooo_engine_id)%_param->_nb_context  );
+	      if (_param->_have_port_front_end_id)
+              in_INSERT_FRONT_END_ID   ->write((3*insert_ooo_engine_id)%_param->_nb_front_end);
+   	      if (_param->_have_port_ooo_engine_id)
+              in_INSERT_OOO_ENGINE_ID  ->write(insert_ooo_engine_id);
+   	      if (_param->_have_port_rob_id)
+              in_INSERT_ROB_ID      ->write(request_in);
+   	      in_INSERT_OPERATION   ->write(0);
+   	      in_INSERT_TYPE        ->write(0);
+   	      in_INSERT_HAS_IMMEDIAT->write(0);
+   	      in_INSERT_IMMEDIAT    ->write(0);
+// 	      in_INSERT_READ_RA     ->write(_read_ra[request_in]);
+	      data_val = not(_read_ra[request_in]) or _gpr_val[insert_num_reg_ra][insert_ooo_engine_id];
+
+	      need_gpr [insert_ooo_engine_id][insert_num_reg_ra] |= not data_val;
+
+	      in_INSERT_NUM_REG_RA  ->write(insert_num_reg_ra);
+   	      in_INSERT_DATA_RA_VAL ->write(data_val);
+   	      in_INSERT_DATA_RA     ->write((data_val)?_gpr[insert_num_reg_ra][insert_ooo_engine_id]:0);
+// 	      in_INSERT_READ_RB     ->write(_read_rb[request_in]);
+	      data_val = not(_read_rb[request_in]) or _gpr_val[insert_num_reg_rb][insert_ooo_engine_id];
+
+	      need_gpr [insert_ooo_engine_id][insert_num_reg_rb] |= not data_val;
+
+   	      in_INSERT_NUM_REG_RB  ->write(insert_num_reg_rb);			       
+   	      in_INSERT_DATA_RB_VAL ->write(data_val);			       
+   	      in_INSERT_DATA_RB     ->write((data_val)?_gpr[insert_num_reg_rb][insert_ooo_engine_id]:0);
+// 	      in_INSERT_READ_RC     ->write(_read_rc[request_in]);
+	      data_val = not(_read_rc[request_in]) or _spr_val[insert_num_reg_rc][insert_ooo_engine_id];
+
+	      need_spr [insert_ooo_engine_id][insert_num_reg_rc] |= not data_val;
+
+   	      in_INSERT_NUM_REG_RC  ->write(insert_num_reg_rc);			       
+   	      in_INSERT_DATA_RC_VAL ->write(data_val);			       
+   	      in_INSERT_DATA_RC     ->write((data_val)?_spr[insert_num_reg_rc][insert_ooo_engine_id]:0);
+   	      in_INSERT_WRITE_RD    ->write(0);
+   	      in_INSERT_NUM_REG_RD  ->write(0);
+   	      in_INSERT_WRITE_RE    ->write(0);
+   	      in_INSERT_NUM_REG_RE  ->write(0);
+
+	      can_gpr_use [insert_ooo_engine_id][insert_num_reg_ra] = false;
+	      can_gpr_use [insert_ooo_engine_id][insert_num_reg_rb] = false;
+	      can_spr_use [insert_ooo_engine_id][insert_num_reg_rc] = false;
+	    }
+	  	  
+	  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	    in_RETIRE_ACK[i]->write((rand()%100)<percent_transaction_queue_out);
 
 	  LABEL("Bypass Network :");
@@ -415,18 +477,25 @@
 	    {
 	      Tgeneral_address_t num_reg = rand()% _param->_nb_general_register;
-	      Tcontext_t         context = rand()% _param->_nb_context;
-	      Tcontrol_t         val     = (_gpr_val [num_reg][context]== 0)?((rand()%100) < percent_transaction_registerfile):0;
-	      Tgeneral_data_t    data    = rand()%(1<<_param->_size_general_data);
-	      
-	      in_GPR_WRITE_VAL        [i]->write(val);	      
-	      in_GPR_WRITE_CONTEXT_ID [i]->write(context);
-	      in_GPR_WRITE_NUM_REG    [i]->write(num_reg);
-	      in_GPR_WRITE_DATA       [i]->write(data);
+	      Tcontext_t         ooo_engine = rand()% _param->_nb_ooo_engine;
+	      Tcontrol_t         val     = (_gpr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_registerfile):0;
+	      Tgeneral_data_t    data    = rand()%((1<<_param->_size_general_data)-1);
+	    
+	      val = (val and can_gpr_use [ooo_engine][num_reg] and need_gpr [ooo_engine][num_reg]);
+
+	      in_GPR_WRITE_VAL            [i]->write(val);	      
+	      if (_param->_have_port_ooo_engine_id)
+              in_GPR_WRITE_OOO_ENGINE_ID  [i]->write(ooo_engine);
+	      in_GPR_WRITE_NUM_REG        [i]->write(num_reg);
+	      in_GPR_WRITE_DATA           [i]->write(data);
 
 	      if (val)
 		{
-		  LABEL(" * GPR_WRITE     ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(context)+"] <- "+toString(data));
-		  _gpr     [num_reg][context] = data;
-		  _gpr_val [num_reg][context] = 1;
+		  LABEL(" * GPR_WRITE     ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
+		  can_gpr_use [ooo_engine][num_reg] = false;
+		  need_gpr [ooo_engine][num_reg]    = false;
+
+
+		  _gpr     [num_reg][ooo_engine] = data;
+		  _gpr_val [num_reg][ooo_engine] = 1;
 		}
 	    }
@@ -434,18 +503,24 @@
 	    {
 	      Tspecial_address_t num_reg = rand()% _param->_nb_special_register;
-	      Tcontext_t         context = rand()% _param->_nb_context;
-	      Tcontrol_t         val     = (_spr_val [num_reg][context]== 0)?((rand()%100) < percent_transaction_registerfile):0;
+	      Tcontext_t         ooo_engine = rand()% _param->_nb_ooo_engine;
+	      Tcontrol_t         val     = (_spr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_registerfile):0;
 	      Tspecial_data_t    data    = rand()%(1<<_param->_size_special_data);
-	      
-	      in_SPR_WRITE_VAL        [i]->write(val);	      
-	      in_SPR_WRITE_CONTEXT_ID [i]->write(context);
-	      in_SPR_WRITE_NUM_REG    [i]->write(num_reg);
-	      in_SPR_WRITE_DATA       [i]->write(data);
+
+	      val = (val and can_spr_use [ooo_engine][num_reg] and need_spr[ooo_engine][num_reg]);
+
+	      in_SPR_WRITE_VAL            [i]->write(val);	      
+	      if (_param->_have_port_ooo_engine_id)
+              in_SPR_WRITE_OOO_ENGINE_ID  [i]->write(ooo_engine);
+	      in_SPR_WRITE_NUM_REG        [i]->write(num_reg);
+	      in_SPR_WRITE_DATA           [i]->write(data);
 
 	      if (val == 1)
 		{
-		  LABEL(" * SPR_WRITE     ["+toString(i)+"] - spr["+toString(num_reg)+"]["+toString(context)+"] <- "+toString(data));
-		  _spr     [num_reg][context] = data;
-		  _spr_val [num_reg][context] = 1;
+		  LABEL(" * SPR_WRITE     ["+toString(i)+"] - spr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
+		  can_spr_use [ooo_engine][num_reg] = false;
+		  need_spr[ooo_engine][num_reg]     = false;
+
+		  _spr     [num_reg][ooo_engine] = data;
+		  _spr_val [num_reg][ooo_engine] = 1;
 		}
 	    }
@@ -453,11 +528,14 @@
 	  for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
 	    {
-	      Tcontext_t         context     = rand()% _param->_nb_context;
-	      in_BYPASS_WRITE_CONTEXT_ID [i]->write(context);
+	      Tcontext_t         ooo_engine     = rand()% _param->_nb_ooo_engine;
+	      if (_param->_have_port_ooo_engine_id)
+              in_BYPASS_WRITE_OOO_ENGINE_ID [i]->write(ooo_engine);
 
 	      Tgeneral_address_t gpr_num_reg = rand()% _param->_nb_general_register;
-	      Tcontrol_t         gpr_val     = (_gpr_val [gpr_num_reg][context]== 0)?((rand()%100) < percent_transaction_bypass):0;
-	      Tgeneral_data_t    gpr_data    = rand()%(1<<_param->_size_general_data);
+	      Tcontrol_t         gpr_val     = (_gpr_val [gpr_num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
+	      Tgeneral_data_t    gpr_data    = rand()%((1<<_param->_size_general_data)-1);
 	      
+	      gpr_val = (gpr_val and can_gpr_use [ooo_engine][gpr_num_reg] and need_gpr[ooo_engine][gpr_num_reg]);
+
 	      in_BYPASS_WRITE_GPR_VAL    [i]->write(gpr_val);	      
 	      in_BYPASS_WRITE_GPR_NUM_REG[i]->write(gpr_num_reg);
@@ -466,13 +544,18 @@
 	      if (gpr_val)
 		{
-		  LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(context)+"] <- "+toString(gpr_data));
-		  _gpr     [gpr_num_reg][context] = gpr_data;
-		  _gpr_val [gpr_num_reg][context] = 1;
+		  LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(gpr_data));
+		  can_gpr_use [ooo_engine][gpr_num_reg] = false;
+		  need_gpr[ooo_engine][gpr_num_reg]     = false;
+
+		  _gpr     [gpr_num_reg][ooo_engine] = gpr_data;
+		  _gpr_val [gpr_num_reg][ooo_engine] = 1;
 		}
 
 	      Tspecial_address_t spr_num_reg = rand()% _param->_nb_special_register;
-	      Tcontrol_t         spr_val     = (_spr_val [spr_num_reg][context]== 0)?((rand()%100) < percent_transaction_bypass):0;
+	      Tcontrol_t         spr_val     = (_spr_val [spr_num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
 	      Tspecial_data_t    spr_data    = rand()%(1<<_param->_size_special_data);
 	      
+	      spr_val = (spr_val and can_spr_use [ooo_engine][spr_num_reg] and need_spr[ooo_engine][spr_num_reg]);
+
 	      in_BYPASS_WRITE_SPR_VAL    [i]->write(spr_val);	      
 	      in_BYPASS_WRITE_SPR_NUM_REG[i]->write(spr_num_reg);
@@ -481,7 +564,10 @@
 	      if (spr_val)
 		{
-		  LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - spr["+toString(spr_num_reg)+"]["+toString(context)+"] <- "+toString(spr_data));
-		  _spr     [spr_num_reg][context] = spr_data;
-		  _spr_val [spr_num_reg][context] = 1;
+		  LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - spr["+toString(spr_num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(spr_data));
+		  can_spr_use [ooo_engine][spr_num_reg] = false;
+		  need_spr[ooo_engine][spr_num_reg]     = false;
+
+		  _spr     [spr_num_reg][ooo_engine] = spr_data;
+		  _spr_val [spr_num_reg][ooo_engine] = 1;
 		}
 
@@ -490,57 +576,76 @@
 	  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	    {
-	      Tcontext_t         context     = rand()% _param->_nb_context;
-	      in_BYPASS_MEMORY_CONTEXT_ID [i]->write(context);
-
-	      Tgeneral_address_t gpr_num_reg = rand()% _param->_nb_general_register;
-	      Tcontrol_t         gpr_val     = (_gpr_val [gpr_num_reg][context]== 0)?((rand()%100) < percent_transaction_bypass):0;
-	      Tgeneral_data_t    gpr_data    = rand()%(1<<_param->_size_general_data);
+	      Tcontext_t         ooo_engine     = rand()% _param->_nb_ooo_engine;
+	      if (_param->_have_port_ooo_engine_id)
+              in_BYPASS_MEMORY_OOO_ENGINE_ID [i]->write(ooo_engine);
+
+	      Tgeneral_address_t num_reg = rand()% _param->_nb_general_register;
+	      Tcontrol_t         val     = (_gpr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
+	      Tgeneral_data_t    data    = rand()%((1<<_param->_size_general_data)-1);
 	      
-	      in_BYPASS_MEMORY_VAL    [i]->write(gpr_val);	      
-	      in_BYPASS_MEMORY_NUM_REG[i]->write(gpr_num_reg);
-	      in_BYPASS_MEMORY_DATA   [i]->write(gpr_data);
-
-	      if (gpr_val)
+	      val = (val and can_gpr_use [ooo_engine][num_reg] and need_gpr [ooo_engine][num_reg]);
+
+	      in_BYPASS_MEMORY_VAL    [i]->write(val);	      
+	      in_BYPASS_MEMORY_NUM_REG[i]->write(num_reg);
+	      in_BYPASS_MEMORY_DATA   [i]->write(data);
+
+	      if (val)
 		{
-		  LABEL(" * BYPASS_MEMORY ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(context)+"] <- "+toString(gpr_data));
-		  _gpr     [gpr_num_reg][context] = gpr_data;
-		  _gpr_val [gpr_num_reg][context] = 1;
+		  LABEL(" * BYPASS_MEMORY ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
+		  can_gpr_use [ooo_engine][num_reg] = false;
+		  need_gpr [ooo_engine][num_reg] = false;
+
+		  _gpr     [num_reg][ooo_engine] = data;
+		  _gpr_val [num_reg][ooo_engine] = 1;
 		}
 	    }
 	  SC_START(0); // to mealy function
 	  
-// 	  LABEL("Test     RESERVATION_STATION_IN  : "+toString(in_RESERVATION_STATION_IN_VAL->read())+","+toString(out_RESERVATION_STATION_IN_ACK->read()));
-	  if (( in_RESERVATION_STATION_IN_VAL->read() == 1) and
-	      (out_RESERVATION_STATION_IN_ACK->read() == 1))
-	    {
-	      LABEL("Accepted RESERVATION_STATION_IN  n°"+toString(request_in));
+// 	  LABEL("Test     INSERT  : "+toString(in_INSERT_VAL->read())+","+toString(out_INSERT_ACK->read()));
+	  if (( in_INSERT_VAL->read() == 1) and
+	      (out_INSERT_ACK->read() == 1))
+	    {
+	      LABEL("Accepted INSERT  number : "+toString(request_in));
 	      request_in  ++;
 	    }
 
-	  for (uint32_t i=0; i<_param->_size_queue      ; i++)
-	    {
- 	      LABEL("Test     RESERVATION_STATION_OUT "+toString(i)+" : "+toString(out_RESERVATION_STATION_OUT_VAL[i]->read())+","+toString(in_RESERVATION_STATION_OUT_ACK[i]->read()));
-	      if ((out_RESERVATION_STATION_OUT_VAL [i]->read() == 1) and
-		  ( in_RESERVATION_STATION_OUT_ACK [i]->read() == 1))
+	  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	    {
+ 	      LABEL("Test     RETIRE "+toString(i)+" : "+toString(out_RETIRE_VAL[i]->read())+","+toString(in_RETIRE_ACK[i]->read()));
+	      if ((out_RETIRE_VAL [i]->read() == 1) and
+		  ( in_RETIRE_ACK [i]->read() == 1))
 		{
-		  Tpacket_t  packet_id  = out_RESERVATION_STATION_OUT_PACKET_ID [i]->read();
-
-		  LABEL("Accepted RESERVATION_STATION_OUT ["+toString(i)+"] n°"+toString(packet_id)+", request n°"+toString(request_out));
-		  TEST(bool, request_out_wait [packet_id] , true);
+		  Tpacket_t  rob_id;
+		  if (_param->_have_port_rob_id)
+		    rob_id = out_RETIRE_ROB_ID [i]->read();
+		  else
+		    rob_id = 0;
+		  LABEL("Accepted RETIRE ["+toString(i)+"] number : "+toString(rob_id)+", request number : "+toString(request_out));
+		  TEST(bool, request_out_wait [rob_id] , true);
 
 		  request_out ++;
-		  request_out_wait [packet_id] = false;
-
-		  Tcontext_t context_id = _context_id [packet_id];
+		  request_out_wait [rob_id] = false;
+
+		  Tcontext_t ooo_engine_id = _ooo_engine_id [rob_id];
 		  
-		  TEST(Tcontext_t        ,out_RESERVATION_STATION_OUT_CONTEXT_ID[i]->read(),context_id);
-		  if (_read_ra [packet_id])
-		  TEST(Tgeneral_data_t   ,out_RESERVATION_STATION_OUT_DATA_RA   [i]->read(),_gpr[_num_reg_ra[packet_id]][context_id]);
+		  if (_param->_have_port_context_id)
+		  TEST(Tcontext_t        ,out_RETIRE_CONTEXT_ID   [i]->read(),(2*ooo_engine_id)%_param->_nb_context  );
+		  if (_param->_have_port_front_end_id)
+		  TEST(Tcontext_t        ,out_RETIRE_FRONT_END_ID [i]->read(),(3*ooo_engine_id)%_param->_nb_front_end);
+		  if (_param->_have_port_ooo_engine_id)
+		  TEST(Tcontext_t        ,out_RETIRE_OOO_ENGINE_ID[i]->read(),ooo_engine_id);
+
+		  if (_read_ra [rob_id])
+		  TEST(Tgeneral_data_t   ,out_RETIRE_DATA_RA   [i]->read(),_gpr[_num_reg_ra[rob_id]][ooo_engine_id]);
 		  
-		  if (_read_rb [packet_id])
-		  TEST(Tgeneral_data_t   ,out_RESERVATION_STATION_OUT_DATA_RB   [i]->read(),_gpr[_num_reg_rb[packet_id]][context_id]);
+		  if (_read_rb [rob_id])
+		  TEST(Tgeneral_data_t   ,out_RETIRE_DATA_RB   [i]->read(),_gpr[_num_reg_rb[rob_id]][ooo_engine_id]);
 		  
-		  if (_read_rc [packet_id])
-		  TEST(Tspecial_data_t   ,out_RESERVATION_STATION_OUT_DATA_RC   [i]->read(),_spr[_num_reg_rc[packet_id]][context_id]);
+		  if (_read_rc [rob_id])
+		  TEST(Tspecial_data_t   ,out_RETIRE_DATA_RC   [i]->read(),_spr[_num_reg_rc[rob_id]][ooo_engine_id]);
+
+// 		  need_gpr [ooo_engine_id][_num_reg_ra[rob_id]]= true;
+// 		  need_gpr [ooo_engine_id][_num_reg_rb[rob_id]]= true;
+// 		  need_spr [ooo_engine_id][_num_reg_rc[rob_id]]= true;
 		}
 	    }
@@ -561,56 +666,71 @@
   delete     in_NRESET;
 
-  delete     in_RESERVATION_STATION_IN_VAL         ;
-  delete    out_RESERVATION_STATION_IN_ACK         ;
-  delete     in_RESERVATION_STATION_IN_CONTEXT_ID  ;
-  delete     in_RESERVATION_STATION_IN_PACKET_ID   ;
-  delete     in_RESERVATION_STATION_IN_OPERATION   ;
-  delete     in_RESERVATION_STATION_IN_TYPE        ;
-  delete     in_RESERVATION_STATION_IN_HAS_IMMEDIAT;
-  delete     in_RESERVATION_STATION_IN_IMMEDIAT    ;
-//delete     in_RESERVATION_STATION_IN_READ_RA     ;
-  delete     in_RESERVATION_STATION_IN_NUM_REG_RA  ;
-  delete     in_RESERVATION_STATION_IN_DATA_RA_VAL ;
-  delete     in_RESERVATION_STATION_IN_DATA_RA     ;
-//delete     in_RESERVATION_STATION_IN_READ_RB     ;
-  delete     in_RESERVATION_STATION_IN_NUM_REG_RB  ;
-  delete     in_RESERVATION_STATION_IN_DATA_RB_VAL ;
-  delete     in_RESERVATION_STATION_IN_DATA_RB     ;
-//delete     in_RESERVATION_STATION_IN_READ_RC     ;
-  delete     in_RESERVATION_STATION_IN_NUM_REG_RC  ;
-  delete     in_RESERVATION_STATION_IN_DATA_RC_VAL ;
-  delete     in_RESERVATION_STATION_IN_DATA_RC     ;
-  delete     in_RESERVATION_STATION_IN_WRITE_RD    ;
-  delete     in_RESERVATION_STATION_IN_NUM_REG_RD  ;
-  delete     in_RESERVATION_STATION_IN_WRITE_RE    ;
-  delete     in_RESERVATION_STATION_IN_NUM_REG_RE  ;
-  
-  delete [] out_RESERVATION_STATION_OUT_VAL         ;
-  delete []  in_RESERVATION_STATION_OUT_ACK         ;
-  delete [] out_RESERVATION_STATION_OUT_CONTEXT_ID  ;
-  delete [] out_RESERVATION_STATION_OUT_PACKET_ID   ;
-  delete [] out_RESERVATION_STATION_OUT_OPERATION   ;
-  delete [] out_RESERVATION_STATION_OUT_TYPE        ;
-  delete [] out_RESERVATION_STATION_OUT_HAS_IMMEDIAT;
-  delete [] out_RESERVATION_STATION_OUT_IMMEDIAT    ;
-  delete [] out_RESERVATION_STATION_OUT_DATA_RA     ;
-  delete [] out_RESERVATION_STATION_OUT_DATA_RB     ;
-  delete [] out_RESERVATION_STATION_OUT_DATA_RC     ;
-  delete [] out_RESERVATION_STATION_OUT_WRITE_RD    ;
-  delete [] out_RESERVATION_STATION_OUT_NUM_REG_RD  ;
-  delete [] out_RESERVATION_STATION_OUT_WRITE_RE    ;
-  delete [] out_RESERVATION_STATION_OUT_NUM_REG_RE  ;
+  delete     in_INSERT_VAL         ;
+  delete    out_INSERT_ACK         ;
+  if (_param->_have_port_context_id)  
+  delete     in_INSERT_CONTEXT_ID  ;
+  if (_param->_have_port_front_end_id)  
+  delete     in_INSERT_FRONT_END_ID   ;
+  if (_param->_have_port_ooo_engine_id)  
+  delete     in_INSERT_OOO_ENGINE_ID  ;
+  if (_param->_have_port_rob_id)  
+  delete     in_INSERT_ROB_ID      ;
+  delete     in_INSERT_OPERATION   ;
+  delete     in_INSERT_TYPE        ;
+  delete     in_INSERT_HAS_IMMEDIAT;
+  delete     in_INSERT_IMMEDIAT    ;
+//delete     in_INSERT_READ_RA     ;
+  delete     in_INSERT_NUM_REG_RA  ;
+  delete     in_INSERT_DATA_RA_VAL ;
+  delete     in_INSERT_DATA_RA     ;
+//delete     in_INSERT_READ_RB     ;
+  delete     in_INSERT_NUM_REG_RB  ;
+  delete     in_INSERT_DATA_RB_VAL ;
+  delete     in_INSERT_DATA_RB     ;
+//delete     in_INSERT_READ_RC     ;
+  delete     in_INSERT_NUM_REG_RC  ;
+  delete     in_INSERT_DATA_RC_VAL ;
+  delete     in_INSERT_DATA_RC     ;
+  delete     in_INSERT_WRITE_RD    ;
+  delete     in_INSERT_NUM_REG_RD  ;
+  delete     in_INSERT_WRITE_RE    ;
+  delete     in_INSERT_NUM_REG_RE  ;
+  
+  delete [] out_RETIRE_VAL         ;
+  delete []  in_RETIRE_ACK         ;
+  if (_param->_have_port_context_id)  
+  delete [] out_RETIRE_CONTEXT_ID  ;
+  if (_param->_have_port_front_end_id)  
+  delete [] out_RETIRE_FRONT_END_ID;
+  if (_param->_have_port_ooo_engine_id)  
+  delete [] out_RETIRE_OOO_ENGINE_ID  ;
+  if (_param->_have_port_rob_id)  
+  delete [] out_RETIRE_ROB_ID   ;
+  delete [] out_RETIRE_OPERATION   ;
+  delete [] out_RETIRE_TYPE        ;
+  delete [] out_RETIRE_HAS_IMMEDIAT;
+  delete [] out_RETIRE_IMMEDIAT    ;
+  delete [] out_RETIRE_DATA_RA     ;
+  delete [] out_RETIRE_DATA_RB     ;
+  delete [] out_RETIRE_DATA_RC     ;
+  delete [] out_RETIRE_WRITE_RD    ;
+  delete [] out_RETIRE_NUM_REG_RD  ;
+  delete [] out_RETIRE_WRITE_RE    ;
+  delete [] out_RETIRE_NUM_REG_RE  ;
   
   delete []  in_GPR_WRITE_VAL       ;
-  delete []  in_GPR_WRITE_CONTEXT_ID;
+  if (_param->_have_port_ooo_engine_id)  
+  delete []  in_GPR_WRITE_OOO_ENGINE_ID;
   delete []  in_GPR_WRITE_NUM_REG   ;
   delete []  in_GPR_WRITE_DATA      ;
   
   delete []  in_SPR_WRITE_VAL       ;
-  delete []  in_SPR_WRITE_CONTEXT_ID;
+  if (_param->_have_port_ooo_engine_id)  
+  delete []  in_SPR_WRITE_OOO_ENGINE_ID;
   delete []  in_SPR_WRITE_NUM_REG   ;
   delete []  in_SPR_WRITE_DATA      ;
   
-  delete []  in_BYPASS_WRITE_CONTEXT_ID ;
+  if (_param->_have_port_ooo_engine_id)  
+  delete []  in_BYPASS_WRITE_OOO_ENGINE_ID ;
   delete []  in_BYPASS_WRITE_GPR_VAL    ;
   delete []  in_BYPASS_WRITE_GPR_NUM_REG;
@@ -621,5 +741,6 @@
   
   delete []  in_BYPASS_MEMORY_VAL       ;
-  delete []  in_BYPASS_MEMORY_CONTEXT_ID;
+  if (_param->_have_port_ooo_engine_id)  
+  delete []  in_BYPASS_MEMORY_OOO_ENGINE_ID;
   delete []  in_BYPASS_MEMORY_NUM_REG   ;
   delete []  in_BYPASS_MEMORY_DATA      ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h	(revision 69)
@@ -27,5 +27,8 @@
     //-----[ fields ]------------------------------------------------------------
   public : const uint32_t    _size_queue           ;
+  public : const uint32_t    _nb_inst_retire       ;
   public : const uint32_t    _nb_context           ;
+  public : const uint32_t    _nb_front_end         ;
+  public : const uint32_t    _nb_ooo_engine        ;
   public : const uint32_t    _nb_packet            ;
   public : const uint32_t    _size_general_data    ;
@@ -48,5 +51,7 @@
     */
   public : const uint32_t    _size_context_id      ;
-  public : const uint32_t    _size_packet_id       ;
+  public : const uint32_t    _size_front_end_id    ;
+  public : const uint32_t    _size_ooo_engine_id   ;
+  public : const uint32_t    _size_rob_id          ;
   public : const uint32_t    _size_general_register;
   public : const uint32_t    _size_special_register;
@@ -54,7 +59,15 @@
   public : const uint32_t    _size_type            ;
 
+  public : const bool        _have_port_context_id   ;
+  public : const bool        _have_port_front_end_id ;
+  public : const bool        _have_port_ooo_engine_id;
+  public : const bool        _have_port_rob_id       ;
+
     //-----[ methods ]-----------------------------------------------------------
   public : Parameters  (uint32_t size_queue         ,
+			uint32_t nb_inst_retire     ,
 			uint32_t nb_context         ,
+			uint32_t nb_front_end       ,
+			uint32_t nb_ooo_engine      ,
 			uint32_t nb_packet          ,
 			uint32_t size_general_data  ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h	(revision 69)
@@ -17,7 +17,9 @@
 #include "Common/include/Debug.h"
 
+#ifndef  SYSTEMC_VHDL_COMPATIBILITY
 #include "Behavioural/Generic/Queue_Control/include/Queue_Control.h"
+#endif
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h"
+#include "Behavioural/include/Types.h"
 #ifdef STATISTICS
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Statistics.h"
@@ -42,6 +44,8 @@
   class Treservation_station_entry_t
   {
-  public    : Tcontext_t         _context_id  ;
-  public    : Tpacket_t          _packet_id   ;
+  public    : Tcontext_t         _context_id     ;
+  public    : Tcontext_t         _front_end_id   ;
+  public    : Tcontext_t         _ooo_engine_id  ;
+  public    : Tpacket_t          _rob_id         ;
   public    : Toperation_t       _operation   ;
   public    : Ttype_t            _type        ;
@@ -68,26 +72,28 @@
 				morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Treservation_station_entry_t & x)
     {
-      output_stream << " * _context_id  : " << toString(x._context_id  ) << endl
-		    << " * _packet_id   : " << toString(x._packet_id   ) << endl
-		    << " * _operation   : " << toString(x._operation   ) << endl
-		    << " * _type        : " << toString(x._type        ) << endl
-		    << " * _has_immediat: " << toString(x._has_immediat) << endl
-		    << " * _immediat    : " << toString(x._immediat    ) << endl
-// 		    << " * _read_ra     : " << toString(x._read_ra     ) << endl
-		    << " * _num_reg_ra  : " << toString(x._num_reg_ra  ) << endl
-		    << " * _data_ra_val : " << toString(x._data_ra_val ) << endl
-		    << " * _data_ra     : " << toString(x._data_ra     ) << endl
-// 		    << " * _read_rb     : " << toString(x._read_rb     ) << endl
-		    << " * _num_reg_rb  : " << toString(x._num_reg_rb  ) << endl
-		    << " * _data_rb_val : " << toString(x._data_rb_val ) << endl
-		    << " * _data_rb     : " << toString(x._data_rb     ) << endl
-// 		    << " * _read_rc     : " << toString(x._read_rc     ) << endl
-		    << " * _num_reg_rc  : " << toString(x._num_reg_rc  ) << endl
-		    << " * _data_rc_val : " << toString(x._data_rc_val ) << endl
-		    << " * _data_rc     : " << toString(x._data_rc     ) << endl
-		    << " * _write_rd    : " << toString(x._write_rd    ) << endl
-		    << " * _num_reg_rd  : " << toString(x._num_reg_rd  ) << endl
-		    << " * _write_re    : " << toString(x._write_re    ) << endl
-		    << " * _num_reg_re  : " << toString(x._num_reg_re  ) << endl;
+      output_stream << " * _context_id     : " << toString(x._context_id     ) << endl
+		    << " * _front_end_id   : " << toString(x._front_end_id   ) << endl
+		    << " * _ooo_engine_id  : " << toString(x._ooo_engine_id  ) << endl
+		    << " * _rob_id         : " << toString(x._rob_id         ) << endl
+		    << " * _operation      : " << toString(x._operation      ) << endl
+		    << " * _type           : " << toString(x._type           ) << endl
+		    << " * _has_immediat   : " << toString(x._has_immediat   ) << endl
+		    << " * _immediat       : " << toString(x._immediat       ) << endl
+// 		    << " * _read_ra        : " << toString(x._read_ra        ) << endl
+		    << " * _num_reg_ra     : " << toString(x._num_reg_ra     ) << endl
+		    << " * _data_ra_val    : " << toString(x._data_ra_val    ) << endl
+		    << " * _data_ra        : " << toString(x._data_ra        ) << endl
+// 		    << " * _read_rb        : " << toString(x._read_rb        ) << endl
+		    << " * _num_reg_rb     : " << toString(x._num_reg_rb     ) << endl
+		    << " * _data_rb_val    : " << toString(x._data_rb_val    ) << endl
+		    << " * _data_rb        : " << toString(x._data_rb        ) << endl
+// 		    << " * _read_rc        : " << toString(x._read_rc        ) << endl
+		    << " * _num_reg_rc     : " << toString(x._num_reg_rc     ) << endl
+		    << " * _data_rc_val    : " << toString(x._data_rc_val    ) << endl
+		    << " * _data_rc        : " << toString(x._data_rc        ) << endl
+		    << " * _write_rd       : " << toString(x._write_rd       ) << endl
+		    << " * _num_reg_rd     : " << toString(x._num_reg_rd     ) << endl
+		    << " * _write_re       : " << toString(x._write_re       ) << endl
+		    << " * _num_reg_re     : " << toString(x._num_reg_re     ) << endl;
 
       return output_stream;
@@ -123,77 +129,81 @@
   public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
 
-    // ~~~~~[ Interface "reservation_station_in" ]~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_VAL         ;
-  public    : SC_OUT(Tcontrol_t        )    * out_RESERVATION_STATION_IN_ACK         ;
-  public    : SC_IN (Tcontext_t        )    *  in_RESERVATION_STATION_IN_CONTEXT_ID  ;
-  public    : SC_IN (Tpacket_t         )    *  in_RESERVATION_STATION_IN_PACKET_ID   ;
-  public    : SC_IN (Toperation_t      )    *  in_RESERVATION_STATION_IN_OPERATION   ;
-  public    : SC_IN (Ttype_t           )    *  in_RESERVATION_STATION_IN_TYPE        ;
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_HAS_IMMEDIAT;
-  public    : SC_IN (Tgeneral_data_t   )    *  in_RESERVATION_STATION_IN_IMMEDIAT    ;
-//public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_READ_RA     ;
-  public    : SC_IN (Tgeneral_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RA  ;
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_DATA_RA_VAL ;
-  public    : SC_IN (Tgeneral_data_t   )    *  in_RESERVATION_STATION_IN_DATA_RA     ;
-//public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_READ_RB     ;
-  public    : SC_IN (Tgeneral_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RB  ;
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_DATA_RB_VAL ;
-  public    : SC_IN (Tgeneral_data_t   )    *  in_RESERVATION_STATION_IN_DATA_RB     ;
-//public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_READ_RC     ;
-  public    : SC_IN (Tspecial_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RC  ;
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_DATA_RC_VAL ;
-  public    : SC_IN (Tspecial_data_t   )    *  in_RESERVATION_STATION_IN_DATA_RC     ;
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_WRITE_RD    ;
-  public    : SC_IN (Tgeneral_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RD  ;
-  public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_WRITE_RE    ;
-  public    : SC_IN (Tspecial_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RE  ;
-
-    // ~~~~~[ Interface "reservation_station_out" ]~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_VAL         ;
-  public    : SC_IN (Tcontrol_t        )   **  in_RESERVATION_STATION_OUT_ACK         ;
-  public    : SC_OUT(Tcontext_t        )   ** out_RESERVATION_STATION_OUT_CONTEXT_ID  ;
-  public    : SC_OUT(Tpacket_t         )   ** out_RESERVATION_STATION_OUT_PACKET_ID   ;
-  public    : SC_OUT(Toperation_t      )   ** out_RESERVATION_STATION_OUT_OPERATION   ;
-  public    : SC_OUT(Ttype_t           )   ** out_RESERVATION_STATION_OUT_TYPE        ;
-  public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_HAS_IMMEDIAT;
-  public    : SC_OUT(Tgeneral_data_t   )   ** out_RESERVATION_STATION_OUT_IMMEDIAT    ;
-  public    : SC_OUT(Tgeneral_data_t   )   ** out_RESERVATION_STATION_OUT_DATA_RA     ;
-  public    : SC_OUT(Tgeneral_data_t   )   ** out_RESERVATION_STATION_OUT_DATA_RB     ;
-  public    : SC_OUT(Tspecial_data_t   )   ** out_RESERVATION_STATION_OUT_DATA_RC     ;
-  public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_WRITE_RD    ;
-  public    : SC_OUT(Tgeneral_address_t)   ** out_RESERVATION_STATION_OUT_NUM_REG_RD  ;
-  public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_WRITE_RE    ;
-  public    : SC_OUT(Tspecial_address_t)   ** out_RESERVATION_STATION_OUT_NUM_REG_RE  ;
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_VAL            ;
+  public    : SC_OUT(Tcontrol_t        )    * out_INSERT_ACK            ;
+  public    : SC_IN (Tcontext_t        )    *  in_INSERT_CONTEXT_ID     ;
+  public    : SC_IN (Tcontext_t        )    *  in_INSERT_FRONT_END_ID   ;
+  public    : SC_IN (Tcontext_t        )    *  in_INSERT_OOO_ENGINE_ID  ;
+  public    : SC_IN (Tpacket_t         )    *  in_INSERT_ROB_ID         ;
+  public    : SC_IN (Toperation_t      )    *  in_INSERT_OPERATION      ;
+  public    : SC_IN (Ttype_t           )    *  in_INSERT_TYPE           ;
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_HAS_IMMEDIAT   ;
+  public    : SC_IN (Tgeneral_data_t   )    *  in_INSERT_IMMEDIAT       ;
+//public    : SC_IN (Tcontrol_t        )    *  in_INSERT_READ_RA        ;
+  public    : SC_IN (Tgeneral_address_t)    *  in_INSERT_NUM_REG_RA     ;
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_DATA_RA_VAL    ;
+  public    : SC_IN (Tgeneral_data_t   )    *  in_INSERT_DATA_RA        ;
+//public    : SC_IN (Tcontrol_t        )    *  in_INSERT_READ_RB        ;
+  public    : SC_IN (Tgeneral_address_t)    *  in_INSERT_NUM_REG_RB     ;
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_DATA_RB_VAL    ;
+  public    : SC_IN (Tgeneral_data_t   )    *  in_INSERT_DATA_RB        ;
+//public    : SC_IN (Tcontrol_t        )    *  in_INSERT_READ_RC        ;
+  public    : SC_IN (Tspecial_address_t)    *  in_INSERT_NUM_REG_RC     ;
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_DATA_RC_VAL    ;
+  public    : SC_IN (Tspecial_data_t   )    *  in_INSERT_DATA_RC        ;
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_WRITE_RD       ;
+  public    : SC_IN (Tgeneral_address_t)    *  in_INSERT_NUM_REG_RD     ;
+  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_WRITE_RE       ;
+  public    : SC_IN (Tspecial_address_t)    *  in_INSERT_NUM_REG_RE     ;
+
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_VAL            ;
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_ACK            ;
+  public    : SC_OUT(Tcontext_t        )   ** out_RETIRE_CONTEXT_ID     ;
+  public    : SC_OUT(Tcontext_t        )   ** out_RETIRE_FRONT_END_ID   ;
+  public    : SC_OUT(Tcontext_t        )   ** out_RETIRE_OOO_ENGINE_ID  ;
+  public    : SC_OUT(Tpacket_t         )   ** out_RETIRE_ROB_ID         ;
+  public    : SC_OUT(Toperation_t      )   ** out_RETIRE_OPERATION      ;
+  public    : SC_OUT(Ttype_t           )   ** out_RETIRE_TYPE           ;
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_HAS_IMMEDIAT   ;
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_RETIRE_IMMEDIAT       ;
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_RETIRE_DATA_RA        ;
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_RETIRE_DATA_RB        ;
+  public    : SC_OUT(Tspecial_data_t   )   ** out_RETIRE_DATA_RC        ;
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_WRITE_RD       ;
+  public    : SC_OUT(Tgeneral_address_t)   ** out_RETIRE_NUM_REG_RD     ;
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_WRITE_RE       ;
+  public    : SC_OUT(Tspecial_address_t)   ** out_RETIRE_NUM_REG_RE     ;
 
     // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-  public    : SC_IN (Tcontrol_t        )   **  in_GPR_WRITE_VAL       ; // val and ack
-  public    : SC_IN (Tcontext_t        )   **  in_GPR_WRITE_CONTEXT_ID;
-  public    : SC_IN (Tgeneral_address_t)   **  in_GPR_WRITE_NUM_REG   ;
-  public    : SC_IN (Tgeneral_data_t   )   **  in_GPR_WRITE_DATA      ;
+  public    : SC_IN (Tcontrol_t        )   **  in_GPR_WRITE_VAL          ; // val and ack
+  public    : SC_IN (Tcontext_t        )   **  in_GPR_WRITE_OOO_ENGINE_ID;
+  public    : SC_IN (Tgeneral_address_t)   **  in_GPR_WRITE_NUM_REG      ;
+  public    : SC_IN (Tgeneral_data_t   )   **  in_GPR_WRITE_DATA         ;
 
     // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-  public    : SC_IN (Tcontrol_t        )   **  in_SPR_WRITE_VAL       ; // val and ack
-  public    : SC_IN (Tcontext_t        )   **  in_SPR_WRITE_CONTEXT_ID;
-  public    : SC_IN (Tspecial_address_t)   **  in_SPR_WRITE_NUM_REG   ;
-  public    : SC_IN (Tspecial_data_t   )   **  in_SPR_WRITE_DATA      ;
+  public    : SC_IN (Tcontrol_t        )   **  in_SPR_WRITE_VAL          ; // val and ack
+  public    : SC_IN (Tcontext_t        )   **  in_SPR_WRITE_OOO_ENGINE_ID;
+  public    : SC_IN (Tspecial_address_t)   **  in_SPR_WRITE_NUM_REG      ;
+  public    : SC_IN (Tspecial_data_t   )   **  in_SPR_WRITE_DATA         ;
 
     // ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-  public    : SC_IN (Tcontext_t        )   **  in_BYPASS_WRITE_CONTEXT_ID ;
-  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_GPR_VAL    ;
-  public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_WRITE_GPR_NUM_REG; // RD
-  public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_WRITE_GPR_DATA   ;
-  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_SPR_VAL    ;
-  public    : SC_IN (Tspecial_address_t)   **  in_BYPASS_WRITE_SPR_NUM_REG; // RE
-  public    : SC_IN (Tspecial_data_t   )   **  in_BYPASS_WRITE_SPR_DATA   ;
+  public    : SC_IN (Tcontext_t        )   **  in_BYPASS_WRITE_OOO_ENGINE_ID ;
+  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_GPR_VAL       ;
+  public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_WRITE_GPR_NUM_REG   ; // RD
+  public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_WRITE_GPR_DATA      ;
+  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_SPR_VAL       ;
+  public    : SC_IN (Tspecial_address_t)   **  in_BYPASS_WRITE_SPR_NUM_REG   ; // RE
+  public    : SC_IN (Tspecial_data_t   )   **  in_BYPASS_WRITE_SPR_DATA      ;
 
     // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_MEMORY_VAL       ;
-  public    : SC_IN (Tcontext_t        )   **  in_BYPASS_MEMORY_CONTEXT_ID;
-  public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_MEMORY_NUM_REG   ;
-  public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_MEMORY_DATA      ;
+  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_MEMORY_VAL          ;
+  public    : SC_IN (Tcontext_t        )   **  in_BYPASS_MEMORY_OOO_ENGINE_ID;
+  public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_MEMORY_NUM_REG      ;
+  public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_MEMORY_DATA         ;
 
 
@@ -203,9 +213,15 @@
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+  protected : bool                          *  _queue_valid;
+  protected : uint32_t                         internal_INSERT_SLOT;
+#else
   protected : morpheo::behavioural::generic::queue_control::Queue_Control * _queue_control;
+#endif
   protected : Treservation_station_entry_t  *  _queue;
 
-  protected : Tcontrol_t                       internal_RESERVATION_STATION_IN_ACK;
-  protected : Tcontrol_t                    *  internal_RESERVATION_STATION_OUT_VAL;
+  protected : Tcontrol_t                       internal_INSERT_ACK;
+  protected : Tcontrol_t                    *  internal_RETIRE_VAL;
+  protected : uint32_t                      *  internal_RETIRE_SLOT;
 #endif
 
@@ -244,7 +260,5 @@
 #endif					       
 					       
-#ifdef VHDL_TESTBENCH			       
-  private : void     vhdl_testbench_transition (void);
-#endif
+  private : void     end_cycle                 (void);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h	(revision 68)
+++ 	(revision )
@@ -1,41 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_read_unit_read_unit_reservation_station_Type_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_read_unit_read_unit_reservation_station_Type_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Common/include/Types.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_read_unit {
-namespace read_unit {
-namespace reservation_station {
-
-  typedef uint32_t Tgeneral_data_t   ;
-  typedef uint32_t Tspecial_data_t   ;
-  typedef uint32_t Tgeneral_address_t;
-  typedef uint32_t Tspecial_address_t;
-  typedef uint32_t Tcontext_t        ;
-  typedef uint32_t Tpacket_t         ;
-//typedef uint32_t Toperation_t      ; // Constant_OpenRISC.h
-  typedef uint32_t Ttype_t           ;
-
-}; // end namespace reservation_station
-}; // end namespace read_unit
-}; // end namespace multi_read_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp	(revision 69)
@@ -21,5 +21,8 @@
 #define FUNCTION "Reservation_station::Parameters"
   Parameters::Parameters (uint32_t size_queue         ,
+			  uint32_t nb_inst_retire     ,
 			  uint32_t nb_context         ,
+			  uint32_t nb_front_end       ,
+			  uint32_t nb_ooo_engine      ,
 			  uint32_t nb_packet          ,
 			  uint32_t size_general_data  ,
@@ -34,5 +37,8 @@
 			  uint32_t nb_bypass_memory   ):
     _size_queue            (size_queue           ),
+    _nb_inst_retire        (nb_inst_retire       ),
     _nb_context            (nb_context           ),
+    _nb_front_end          (nb_front_end         ),
+    _nb_ooo_engine         (nb_ooo_engine        ),
     _nb_packet             (nb_packet            ),
     _size_general_data     (size_general_data    ),
@@ -48,9 +54,16 @@
 
     _size_context_id       (static_cast<uint32_t>(log2(_nb_context         ))),
-    _size_packet_id        (static_cast<uint32_t>(log2(_nb_packet          ))),
+    _size_front_end_id     (static_cast<uint32_t>(log2(_nb_front_end       ))),
+    _size_ooo_engine_id    (static_cast<uint32_t>(log2(_nb_ooo_engine      ))),
+    _size_rob_id           (static_cast<uint32_t>(log2(_nb_packet          ))),
     _size_general_register (static_cast<uint32_t>(log2(_nb_general_register))),
     _size_special_register (static_cast<uint32_t>(log2(_nb_special_register))),
     _size_operation        (static_cast<uint32_t>(log2(_nb_operation       ))),
-    _size_type             (static_cast<uint32_t>(log2(_nb_type            )))
+    _size_type             (static_cast<uint32_t>(log2(_nb_type            ))),
+
+    _have_port_context_id    (_size_context_id    > 0),
+    _have_port_front_end_id  (_size_front_end_id  > 0),
+    _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
+    _have_port_rob_id        (_size_rob_id        > 0)
   {
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
@@ -63,5 +76,8 @@
   Parameters::Parameters (Parameters & param):
     _size_queue            (param._size_queue            ),
+    _nb_inst_retire        (param._nb_inst_retire        ),
     _nb_context            (param._nb_context            ),
+    _nb_front_end          (param._nb_front_end          ),
+    _nb_ooo_engine         (param._nb_ooo_engine         ),
     _nb_packet             (param._nb_packet             ),
     _size_general_data     (param._size_general_data     ),
@@ -77,9 +93,16 @@
 
     _size_context_id       (param._size_context_id       ),
-    _size_packet_id        (param._size_packet_id        ),
+    _size_front_end_id     (param._size_front_end_id     ),
+    _size_ooo_engine_id    (param._size_ooo_engine_id    ),
+    _size_rob_id           (param._size_rob_id           ),
     _size_general_register (param._size_general_register ),
     _size_special_register (param._size_special_register ),
     _size_operation        (param._size_operation        ),
-    _size_type             (param._size_type             )
+    _size_type             (param._size_type             ),
+
+    _have_port_context_id    (param._have_port_context_id   ),
+    _have_port_front_end_id  (param._have_port_front_end_id ),
+    _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
+    _have_port_rob_id        (param._have_port_rob_id       )
   {
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp	(revision 69)
@@ -7,5 +7,4 @@
 
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h"
 #include <sstream>
 using namespace std;
@@ -29,10 +28,15 @@
     string msg = "";
 
-    if (_size_queue < 2)
+//     if (_size_queue < 2)
+//       {
+//         msg += "  - The reservation_station must be have less a depth of 2";
+//         msg += "    * size_queue                      : " + toString(_size_queue)    + "\n";
+//       }
+
+    if (_size_queue < _nb_inst_retire)
       {
-        msg += "  - The reservation_station must be have less a depth of 2";
-        msg += "    * size_queue                      : " + toString(_size_queue)    + "\n";
+        msg += "  - The reservation_station can't have more retire port than entry in the queue.";
       }
-
+    
     return msg;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_print.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_print.cpp	(revision 69)
@@ -30,5 +30,8 @@
     xml.balise_open("reservation_station");
     xml.singleton_begin("size_queue         "); xml.attribut("value",toString(_size_queue         )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_retire     "); xml.attribut("value",toString(_nb_inst_retire     )); xml.singleton_end();
     xml.singleton_begin("nb_context         "); xml.attribut("value",toString(_nb_context         )); xml.singleton_end();
+    xml.singleton_begin("nb_front_end       "); xml.attribut("value",toString(_nb_front_end       )); xml.singleton_end();
+    xml.singleton_begin("nb_ooo_engine      "); xml.attribut("value",toString(_nb_ooo_engine      )); xml.singleton_end();
     xml.singleton_begin("nb_packet          "); xml.attribut("value",toString(_nb_packet          )); xml.singleton_end();
     xml.singleton_begin("size_general_data  "); xml.attribut("value",toString(_size_general_data  )); xml.singleton_end();
@@ -38,5 +41,5 @@
     xml.singleton_begin("nb_operation       "); xml.attribut("value",toString(_nb_operation       )); xml.singleton_end();
     xml.singleton_begin("nb_type            "); xml.attribut("value",toString(_nb_type            )); xml.singleton_end();
-    xml.singleton_begin("nb_gpr_write       "); xml.attribut("value",toString(_nb_gpr_write       )); xml.singleton_end();    
+    xml.singleton_begin("nb_gpr_write       "); xml.attribut("value",toString(_nb_gpr_write       )); xml.singleton_end();
     xml.singleton_begin("nb_spr_write       "); xml.attribut("value",toString(_nb_spr_write       )); xml.singleton_end();
     xml.singleton_begin("nb_bypass_write    "); xml.attribut("value",toString(_nb_bypass_write    )); xml.singleton_end();
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp	(revision 69)
@@ -52,7 +52,7 @@
      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
 
-    // ~~~~~[ Interface : "reservation_station_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      Interface_fifo * interface = _interfaces->set_interface("reservation_station_in"
+      Interface_fifo * interface = _interfaces->set_interface("insert"
 #ifdef POSITION
 							       ,IN
@@ -62,50 +62,62 @@
 							       );
       
-       in_RESERVATION_STATION_IN_VAL            = interface->set_signal_valack_in  (VAL);
-      out_RESERVATION_STATION_IN_ACK            = interface->set_signal_valack_out (ACK);
-       in_RESERVATION_STATION_IN_CONTEXT_ID     = interface->set_signal_in <Tcontext_t        > ("context_id"  ,_param->_size_context_id       );
-       in_RESERVATION_STATION_IN_PACKET_ID      = interface->set_signal_in <Tpacket_t         > ("packet_id"   ,_param->_size_packet_id        );
-       in_RESERVATION_STATION_IN_OPERATION      = interface->set_signal_in <Toperation_t      > ("operation"   ,_param->_size_operation        );
-       in_RESERVATION_STATION_IN_TYPE           = interface->set_signal_in <Ttype_t           > ("type"        ,_param->_size_type             );
-       in_RESERVATION_STATION_IN_HAS_IMMEDIAT   = interface->set_signal_in <Tcontrol_t        > ("has_immediat",1                             );
-       in_RESERVATION_STATION_IN_IMMEDIAT       = interface->set_signal_in <Tgeneral_data_t   > ("immediat"    ,_param->_size_general_data     );
-//     in_RESERVATION_STATION_IN_READ_RA        = interface->set_signal_in <Tcontrol_t        > ("read_ra"     ,1                             );
-       in_RESERVATION_STATION_IN_NUM_REG_RA     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_ra"  ,_param->_size_general_register );
-       in_RESERVATION_STATION_IN_DATA_RA_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_ra_val" ,1                             );
-       in_RESERVATION_STATION_IN_DATA_RA        = interface->set_signal_in <Tgeneral_data_t   > ("data_ra"     ,_param->_size_general_data     );
-//     in_RESERVATION_STATION_IN_READ_RB        = interface->set_signal_in <Tcontrol_t        > ("read_rb"     ,1                             );
-       in_RESERVATION_STATION_IN_NUM_REG_RB     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rb"  ,_param->_size_general_register );
-       in_RESERVATION_STATION_IN_DATA_RB_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rb_val" ,1                             );
-       in_RESERVATION_STATION_IN_DATA_RB        = interface->set_signal_in <Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data     );
-//     in_RESERVATION_STATION_IN_READ_RC        = interface->set_signal_in <Tcontrol_t        > ("read_rc"     ,1                             );
-       in_RESERVATION_STATION_IN_NUM_REG_RC     = interface->set_signal_in <Tspecial_address_t> ("num_reg_rc"  ,_param->_size_special_register );
-       in_RESERVATION_STATION_IN_DATA_RC_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rc_val" ,1                             );
-       in_RESERVATION_STATION_IN_DATA_RC        = interface->set_signal_in <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
-       in_RESERVATION_STATION_IN_WRITE_RD       = interface->set_signal_in <Tcontrol_t        > ("write_rd"    ,1                             );
-       in_RESERVATION_STATION_IN_NUM_REG_RD     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd"  ,_param->_size_general_register );
-       in_RESERVATION_STATION_IN_WRITE_RE       = interface->set_signal_in <Tcontrol_t        > ("write_re"    ,1                             );
-       in_RESERVATION_STATION_IN_NUM_REG_RE     = interface->set_signal_in <Tspecial_address_t> ("num_reg_re"  ,_param->_size_special_register );      
+       in_INSERT_VAL            = interface->set_signal_valack_in  (VAL);
+      out_INSERT_ACK            = interface->set_signal_valack_out (ACK);
+      if (_param->_have_port_context_id)
+       in_INSERT_CONTEXT_ID     = interface->set_signal_in <Tcontext_t        > ("context_id"     ,_param->_size_context_id       );
+      if (_param->_have_port_front_end_id)
+       in_INSERT_FRONT_END_ID   = interface->set_signal_in <Tcontext_t        > ("front_end_id"   ,_param->_size_front_end_id     );
+      if (_param->_have_port_ooo_engine_id)
+       in_INSERT_OOO_ENGINE_ID  = interface->set_signal_in <Tcontext_t        > ("ooo_engine_id"  ,_param->_size_ooo_engine_id    );
+      if (_param->_have_port_rob_id)
+       in_INSERT_ROB_ID         = interface->set_signal_in <Tpacket_t         > ("rob_id"         ,_param->_size_rob_id        );
+       in_INSERT_OPERATION      = interface->set_signal_in <Toperation_t      > ("operation"      ,_param->_size_operation        );
+       in_INSERT_TYPE           = interface->set_signal_in <Ttype_t           > ("type"           ,_param->_size_type             );
+       in_INSERT_HAS_IMMEDIAT   = interface->set_signal_in <Tcontrol_t        > ("has_immediat"   ,1                             );
+       in_INSERT_IMMEDIAT       = interface->set_signal_in <Tgeneral_data_t   > ("immediat"       ,_param->_size_general_data     );
+//     in_INSERT_READ_RA        = interface->set_signal_in <Tcontrol_t        > ("read_ra"        ,1                             );
+       in_INSERT_NUM_REG_RA     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_ra"     ,_param->_size_general_register );
+       in_INSERT_DATA_RA_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_ra_val"    ,1                             );
+       in_INSERT_DATA_RA        = interface->set_signal_in <Tgeneral_data_t   > ("data_ra"        ,_param->_size_general_data     );
+//     in_INSERT_READ_RB        = interface->set_signal_in <Tcontrol_t        > ("read_rb"        ,1                             );
+       in_INSERT_NUM_REG_RB     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rb"     ,_param->_size_general_register );
+       in_INSERT_DATA_RB_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rb_val"    ,1                             );
+       in_INSERT_DATA_RB        = interface->set_signal_in <Tgeneral_data_t   > ("data_rb"        ,_param->_size_general_data     );
+//     in_INSERT_READ_RC        = interface->set_signal_in <Tcontrol_t        > ("read_rc"        ,1                             );
+       in_INSERT_NUM_REG_RC     = interface->set_signal_in <Tspecial_address_t> ("num_reg_rc"     ,_param->_size_special_register );
+       in_INSERT_DATA_RC_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rc_val"    ,1                             );
+       in_INSERT_DATA_RC        = interface->set_signal_in <Tspecial_data_t   > ("data_rc"        ,_param->_size_special_data     );
+       in_INSERT_WRITE_RD       = interface->set_signal_in <Tcontrol_t        > ("write_rd"       ,1                             );
+       in_INSERT_NUM_REG_RD     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd"     ,_param->_size_general_register );
+       in_INSERT_WRITE_RE       = interface->set_signal_in <Tcontrol_t        > ("write_re"       ,1                             );
+       in_INSERT_NUM_REG_RE     = interface->set_signal_in <Tspecial_address_t> ("num_reg_re"     ,_param->_size_special_register );      
      }
 
-    // ~~~~~[ Interface : "reservation_station_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~
-    out_RESERVATION_STATION_OUT_VAL         = new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
-     in_RESERVATION_STATION_OUT_ACK         = new SC_IN (Tcontrol_t        ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_CONTEXT_ID  = new SC_OUT(Tcontext_t        ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_PACKET_ID   = new SC_OUT(Tpacket_t         ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_OPERATION   = new SC_OUT(Toperation_t      ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_TYPE        = new SC_OUT(Ttype_t           ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_HAS_IMMEDIAT= new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_IMMEDIAT    = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_DATA_RA     = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_DATA_RB     = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_DATA_RC     = new SC_OUT(Tspecial_data_t   ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_WRITE_RD    = new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_NUM_REG_RD  = new SC_OUT(Tgeneral_address_t) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_WRITE_RE    = new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
-    out_RESERVATION_STATION_OUT_NUM_REG_RE  = new SC_OUT(Tspecial_address_t) * [_param->_size_queue];
+    // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~
+    out_RETIRE_VAL            = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
+     in_RETIRE_ACK            = new SC_IN (Tcontrol_t        ) * [_param->_nb_inst_retire];
+    if (_param->_have_port_context_id)
+    out_RETIRE_CONTEXT_ID     = new SC_OUT(Tcontext_t        ) * [_param->_nb_inst_retire];
+    if (_param->_have_port_front_end_id)
+    out_RETIRE_FRONT_END_ID   = new SC_OUT(Tcontext_t        ) * [_param->_nb_inst_retire];
+    if (_param->_have_port_ooo_engine_id)
+    out_RETIRE_OOO_ENGINE_ID  = new SC_OUT(Tcontext_t        ) * [_param->_nb_inst_retire];
+    if (_param->_have_port_rob_id)
+    out_RETIRE_ROB_ID         = new SC_OUT(Tpacket_t         ) * [_param->_nb_inst_retire];
+    out_RETIRE_OPERATION      = new SC_OUT(Toperation_t      ) * [_param->_nb_inst_retire];
+    out_RETIRE_TYPE           = new SC_OUT(Ttype_t           ) * [_param->_nb_inst_retire];
+    out_RETIRE_HAS_IMMEDIAT   = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
+    out_RETIRE_IMMEDIAT       = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_inst_retire];
+    out_RETIRE_DATA_RA        = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_inst_retire];
+    out_RETIRE_DATA_RB        = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_inst_retire];
+    out_RETIRE_DATA_RC        = new SC_OUT(Tspecial_data_t   ) * [_param->_nb_inst_retire];
+    out_RETIRE_WRITE_RD       = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
+    out_RETIRE_NUM_REG_RD     = new SC_OUT(Tgeneral_address_t) * [_param->_nb_inst_retire];
+    out_RETIRE_WRITE_RE       = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
+    out_RETIRE_NUM_REG_RE     = new SC_OUT(Tspecial_address_t) * [_param->_nb_inst_retire];
     
-    for (uint32_t i=0; i<_param->_size_queue; i++)
-      {
-	Interface_fifo * interface = _interfaces->set_interface("reservation_station_out_"+toString(i)
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	Interface_fifo * interface = _interfaces->set_interface("retire_"+toString(i)
 #ifdef POSITION
 								,OUT
@@ -114,26 +126,33 @@
 #endif
 								);
-	out_RESERVATION_STATION_OUT_VAL          [i] = interface->set_signal_valack_out(VAL);
-	 in_RESERVATION_STATION_OUT_ACK          [i] = interface->set_signal_valack_in (ACK);
-	out_RESERVATION_STATION_OUT_CONTEXT_ID   [i] = interface->set_signal_out<Tcontext_t        > ("context_id"  ,_param->_size_context_id);
-	out_RESERVATION_STATION_OUT_PACKET_ID    [i] = interface->set_signal_out<Tpacket_t         > ("packet_id"   ,_param->_size_packet_id);
-	out_RESERVATION_STATION_OUT_OPERATION    [i] = interface->set_signal_out<Toperation_t      > ("operation"   ,_param->_size_operation);
-	out_RESERVATION_STATION_OUT_TYPE         [i] = interface->set_signal_out<Ttype_t           > ("type"        ,_param->_size_type);
-	out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t        > ("has_immediat",1);
-	out_RESERVATION_STATION_OUT_IMMEDIAT     [i] = interface->set_signal_out<Tgeneral_data_t   > ("immediat"    ,_param->_size_general_data);
-	out_RESERVATION_STATION_OUT_DATA_RA      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_ra"     ,_param->_size_general_data);
-	out_RESERVATION_STATION_OUT_DATA_RB      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data);
-	out_RESERVATION_STATION_OUT_DATA_RC      [i] = interface->set_signal_out<Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data);
-	out_RESERVATION_STATION_OUT_WRITE_RD     [i] = interface->set_signal_out<Tcontrol_t        > ("write_rd"    ,1);
-	out_RESERVATION_STATION_OUT_NUM_REG_RD   [i] = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd"  ,_param->_size_general_register);
-	out_RESERVATION_STATION_OUT_WRITE_RE     [i] = interface->set_signal_out<Tcontrol_t        > ("write_re"    ,1);
-	out_RESERVATION_STATION_OUT_NUM_REG_RE   [i] = interface->set_signal_out<Tspecial_address_t> ("num_reg_re"  ,_param->_size_special_register);
+	out_RETIRE_VAL          [i] = interface->set_signal_valack_out(VAL);
+	 in_RETIRE_ACK          [i] = interface->set_signal_valack_in (ACK);
+	if (_param->_have_port_context_id)
+	out_RETIRE_CONTEXT_ID   [i] = interface->set_signal_out<Tcontext_t        > ("context_id"   ,_param->_size_context_id);
+	if (_param->_have_port_front_end_id)
+	out_RETIRE_FRONT_END_ID [i] = interface->set_signal_out<Tcontext_t        > ("front_end_id" ,_param->_size_front_end_id);
+	if (_param->_have_port_ooo_engine_id)
+	out_RETIRE_OOO_ENGINE_ID[i] = interface->set_signal_out<Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
+	if (_param->_have_port_rob_id)
+	out_RETIRE_ROB_ID       [i] = interface->set_signal_out<Tpacket_t         > ("rob_id"       ,_param->_size_rob_id);
+	out_RETIRE_OPERATION    [i] = interface->set_signal_out<Toperation_t      > ("operation"    ,_param->_size_operation);
+	out_RETIRE_TYPE         [i] = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type);
+	out_RETIRE_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t        > ("has_immediat" ,1);
+	out_RETIRE_IMMEDIAT     [i] = interface->set_signal_out<Tgeneral_data_t   > ("immediat"     ,_param->_size_general_data);
+	out_RETIRE_DATA_RA      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_ra"      ,_param->_size_general_data);
+	out_RETIRE_DATA_RB      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_rb"      ,_param->_size_general_data);
+	out_RETIRE_DATA_RC      [i] = interface->set_signal_out<Tspecial_data_t   > ("data_rc"      ,_param->_size_special_data);
+	out_RETIRE_WRITE_RD     [i] = interface->set_signal_out<Tcontrol_t        > ("write_rd"     ,1);
+	out_RETIRE_NUM_REG_RD   [i] = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd"   ,_param->_size_general_register);
+	out_RETIRE_WRITE_RE     [i] = interface->set_signal_out<Tcontrol_t        > ("write_re"     ,1);
+	out_RETIRE_NUM_REG_RE   [i] = interface->set_signal_out<Tspecial_address_t> ("num_reg_re"   ,_param->_size_special_register);
       }
 
     // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-     in_GPR_WRITE_VAL       = new SC_IN (Tcontrol_t        ) * [_param->_nb_gpr_write];
-     in_GPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_gpr_write];
-     in_GPR_WRITE_NUM_REG   = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write];
-     in_GPR_WRITE_DATA      = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_gpr_write];
+     in_GPR_WRITE_VAL          = new SC_IN (Tcontrol_t        ) * [_param->_nb_gpr_write];
+     if (_param->_have_port_ooo_engine_id)
+     in_GPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_gpr_write];
+     in_GPR_WRITE_NUM_REG      = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write];
+     in_GPR_WRITE_DATA         = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_gpr_write];
 
     for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
@@ -147,15 +166,17 @@
                                                                 );
 
-	 in_GPR_WRITE_VAL        [i] = interface->set_signal_valack_in (VAL);
-	 in_GPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id",_param->_size_context_id);
-	 in_GPR_WRITE_NUM_REG    [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"   ,_param->_size_general_register);
-	 in_GPR_WRITE_DATA       [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"      ,_param->_size_general_data);
+	 in_GPR_WRITE_VAL           [i] = interface->set_signal_valack_in (VAL);
+	 if (_param->_have_port_ooo_engine_id)
+	 in_GPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
+	 in_GPR_WRITE_NUM_REG       [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"      ,_param->_size_general_register);
+	 in_GPR_WRITE_DATA          [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"         ,_param->_size_general_data);
       }
 
     // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-     in_SPR_WRITE_VAL       = new SC_IN (Tcontrol_t        ) * [_param->_nb_spr_write];
-     in_SPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_spr_write];
-     in_SPR_WRITE_NUM_REG   = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write];
-     in_SPR_WRITE_DATA      = new SC_IN (Tspecial_data_t   ) * [_param->_nb_spr_write];
+     in_SPR_WRITE_VAL          = new SC_IN (Tcontrol_t        ) * [_param->_nb_spr_write];
+     if (_param->_have_port_ooo_engine_id)
+     in_SPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_spr_write];
+     in_SPR_WRITE_NUM_REG      = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write];
+     in_SPR_WRITE_DATA         = new SC_IN (Tspecial_data_t   ) * [_param->_nb_spr_write];
 
     for (uint32_t i=0; i<_param->_nb_spr_write; i++)
@@ -169,18 +190,20 @@
                                                                 );
 
-	 in_SPR_WRITE_VAL        [i] = interface->set_signal_valack_in (VAL);
-	 in_SPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id",_param->_size_context_id);
-	 in_SPR_WRITE_NUM_REG    [i] = interface->set_signal_in  <Tspecial_address_t> ("num_reg"   ,_param->_size_special_register);
-	 in_SPR_WRITE_DATA       [i] = interface->set_signal_in  <Tspecial_data_t   > ("data"      ,_param->_size_special_data);
+	 in_SPR_WRITE_VAL           [i] = interface->set_signal_valack_in (VAL);
+	 if (_param->_have_port_ooo_engine_id)
+         in_SPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
+	 in_SPR_WRITE_NUM_REG       [i] = interface->set_signal_in  <Tspecial_address_t> ("num_reg"      ,_param->_size_special_register);
+	 in_SPR_WRITE_DATA          [i] = interface->set_signal_in  <Tspecial_data_t   > ("data"         ,_param->_size_special_data);
       }
 
     // ~~~~~[ Interface : "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-     in_BYPASS_WRITE_CONTEXT_ID  = new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_write];
-     in_BYPASS_WRITE_GPR_VAL     = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
-     in_BYPASS_WRITE_GPR_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_write];
-     in_BYPASS_WRITE_GPR_DATA    = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_write];
-     in_BYPASS_WRITE_SPR_VAL     = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
-     in_BYPASS_WRITE_SPR_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_bypass_write];
-     in_BYPASS_WRITE_SPR_DATA    = new SC_IN (Tspecial_data_t   ) * [_param->_nb_bypass_write];
+     if (_param->_have_port_ooo_engine_id)
+     in_BYPASS_WRITE_OOO_ENGINE_ID  = new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_write];
+     in_BYPASS_WRITE_GPR_VAL        = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
+     in_BYPASS_WRITE_GPR_NUM_REG    = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_write];
+     in_BYPASS_WRITE_GPR_DATA       = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_write];
+     in_BYPASS_WRITE_SPR_VAL        = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
+     in_BYPASS_WRITE_SPR_NUM_REG    = new SC_IN (Tspecial_address_t) * [_param->_nb_bypass_write];
+     in_BYPASS_WRITE_SPR_DATA       = new SC_IN (Tspecial_data_t   ) * [_param->_nb_bypass_write];
 
     for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
@@ -194,18 +217,20 @@
                                                                 );
 
-	 in_BYPASS_WRITE_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id" ,_param->_size_context_id);
-	 in_BYPASS_WRITE_GPR_VAL    [i] = interface->set_signal_valack_in ("gpr_val",VAL);
-	 in_BYPASS_WRITE_GPR_NUM_REG[i] = interface->set_signal_in  <Tgeneral_address_t> ("gpr_num_reg",_param->_size_general_register);
-	 in_BYPASS_WRITE_GPR_DATA   [i] = interface->set_signal_in  <Tgeneral_data_t   > ("gpr_data"   ,_param->_size_general_data);
-	 in_BYPASS_WRITE_SPR_VAL    [i] = interface->set_signal_valack_in ("spr_val",VAL);
-	 in_BYPASS_WRITE_SPR_NUM_REG[i] = interface->set_signal_in  <Tspecial_address_t> ("spr_num_reg",_param->_size_general_register);
-	 in_BYPASS_WRITE_SPR_DATA   [i] = interface->set_signal_in  <Tspecial_data_t   > ("spr_data"   ,_param->_size_general_data);
+	 if (_param->_have_port_ooo_engine_id)
+         in_BYPASS_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id" ,_param->_size_ooo_engine_id);
+	 in_BYPASS_WRITE_GPR_VAL       [i] = interface->set_signal_valack_in ("gpr_val",VAL);		     
+	 in_BYPASS_WRITE_GPR_NUM_REG   [i] = interface->set_signal_in  <Tgeneral_address_t> ("gpr_num_reg"   ,_param->_size_general_register);
+	 in_BYPASS_WRITE_GPR_DATA      [i] = interface->set_signal_in  <Tgeneral_data_t   > ("gpr_data"      ,_param->_size_general_data);
+	 in_BYPASS_WRITE_SPR_VAL       [i] = interface->set_signal_valack_in ("spr_val",VAL);		     
+	 in_BYPASS_WRITE_SPR_NUM_REG   [i] = interface->set_signal_in  <Tspecial_address_t> ("spr_num_reg"   ,_param->_size_general_register);
+	 in_BYPASS_WRITE_SPR_DATA      [i] = interface->set_signal_in  <Tspecial_data_t   > ("spr_data"      ,_param->_size_general_data);
       }
 
     // ~~~~~[ Interface : "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-     in_BYPASS_MEMORY_VAL         = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_memory];
-     in_BYPASS_MEMORY_CONTEXT_ID  = new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_memory];
-     in_BYPASS_MEMORY_NUM_REG     = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_memory];
-     in_BYPASS_MEMORY_DATA        = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_memory];
+     in_BYPASS_MEMORY_VAL          = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_memory];
+     if (_param->_have_port_ooo_engine_id)
+     in_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_memory];
+     in_BYPASS_MEMORY_NUM_REG      = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_memory];
+     in_BYPASS_MEMORY_DATA         = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_memory];
 
     for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
@@ -219,13 +244,15 @@
                                                                 );
 
-	 in_BYPASS_MEMORY_VAL        [i] = interface->set_signal_valack_in (VAL);
-	 in_BYPASS_MEMORY_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id" ,_param->_size_context_id);
-	 in_BYPASS_MEMORY_NUM_REG    [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"    ,_param->_size_general_register);
-	 in_BYPASS_MEMORY_DATA       [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"       ,_param->_size_general_data);
+	 in_BYPASS_MEMORY_VAL          [i] = interface->set_signal_valack_in (VAL);
+	 if (_param->_have_port_ooo_engine_id)
+         in_BYPASS_MEMORY_OOO_ENGINE_ID[i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
+	 in_BYPASS_MEMORY_NUM_REG      [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"      ,_param->_size_general_register);
+	 in_BYPASS_MEMORY_DATA         [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"         ,_param->_size_general_data);
       }
 
 
     // ~~~~~[ internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
-    internal_RESERVATION_STATION_OUT_VAL = new Tcontrol_t [_param->_size_queue];
+    internal_RETIRE_VAL  = new Tcontrol_t [_param->_nb_inst_retire];
+    internal_RETIRE_SLOT = new uint32_t   [_param->_nb_inst_retire];
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
@@ -234,5 +261,9 @@
     _component->generate_file();
 #endif
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+    _queue_valid   = new bool [_param->_size_queue];
+#else
     _queue_control = new morpheo::behavioural::generic::queue_control::Queue_Control::Queue_Control(_param->_size_queue);
+#endif
     _queue         = new Treservation_station_entry_t [_param->_size_queue];
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp	(revision 69)
@@ -31,56 +31,71 @@
     delete     in_NRESET;
 
-    delete     in_RESERVATION_STATION_IN_VAL         ;
-    delete    out_RESERVATION_STATION_IN_ACK         ;
-    delete     in_RESERVATION_STATION_IN_CONTEXT_ID  ;
-    delete     in_RESERVATION_STATION_IN_PACKET_ID   ;
-    delete     in_RESERVATION_STATION_IN_OPERATION   ;
-    delete     in_RESERVATION_STATION_IN_TYPE        ;
-    delete     in_RESERVATION_STATION_IN_HAS_IMMEDIAT;
-    delete     in_RESERVATION_STATION_IN_IMMEDIAT    ;
-//     delete     in_RESERVATION_STATION_IN_READ_RA     ;
-    delete     in_RESERVATION_STATION_IN_NUM_REG_RA  ;
-    delete     in_RESERVATION_STATION_IN_DATA_RA_VAL ;
-    delete     in_RESERVATION_STATION_IN_DATA_RA     ;
-//     delete     in_RESERVATION_STATION_IN_READ_RB     ;
-    delete     in_RESERVATION_STATION_IN_NUM_REG_RB  ;
-    delete     in_RESERVATION_STATION_IN_DATA_RB_VAL ;
-    delete     in_RESERVATION_STATION_IN_DATA_RB     ;
-//     delete     in_RESERVATION_STATION_IN_READ_RC     ;
-    delete     in_RESERVATION_STATION_IN_NUM_REG_RC  ;
-    delete     in_RESERVATION_STATION_IN_DATA_RC_VAL ;
-    delete     in_RESERVATION_STATION_IN_DATA_RC     ;
-    delete     in_RESERVATION_STATION_IN_WRITE_RD    ;
-    delete     in_RESERVATION_STATION_IN_NUM_REG_RD  ;
-    delete     in_RESERVATION_STATION_IN_WRITE_RE    ;
-    delete     in_RESERVATION_STATION_IN_NUM_REG_RE  ;
+    delete     in_INSERT_VAL           ;
+    delete    out_INSERT_ACK           ;
+    if (_param->_have_port_context_id)
+    delete     in_INSERT_CONTEXT_ID    ;
+    if (_param->_have_port_front_end_id)
+    delete     in_INSERT_FRONT_END_ID  ;
+    if (_param->_have_port_ooo_engine_id)
+    delete     in_INSERT_OOO_ENGINE_ID ;
+    if (_param->_have_port_rob_id)
+    delete     in_INSERT_ROB_ID        ;
+    delete     in_INSERT_OPERATION     ;
+    delete     in_INSERT_TYPE          ;
+    delete     in_INSERT_HAS_IMMEDIAT  ;
+    delete     in_INSERT_IMMEDIAT      ;
+//  delete     in_INSERT_READ_RA       ;
+    delete     in_INSERT_NUM_REG_RA    ;
+    delete     in_INSERT_DATA_RA_VAL   ;
+    delete     in_INSERT_DATA_RA       ;
+//  delete     in_INSERT_READ_RB       ;
+    delete     in_INSERT_NUM_REG_RB    ;
+    delete     in_INSERT_DATA_RB_VAL   ;
+    delete     in_INSERT_DATA_RB       ;
+//  delete     in_INSERT_READ_RC       ;
+    delete     in_INSERT_NUM_REG_RC    ;
+    delete     in_INSERT_DATA_RC_VAL   ;
+    delete     in_INSERT_DATA_RC       ;
+    delete     in_INSERT_WRITE_RD      ;
+    delete     in_INSERT_NUM_REG_RD    ;
+    delete     in_INSERT_WRITE_RE      ;
+    delete     in_INSERT_NUM_REG_RE    ;
     
-    delete [] out_RESERVATION_STATION_OUT_VAL         ;
-    delete []  in_RESERVATION_STATION_OUT_ACK         ;
-    delete [] out_RESERVATION_STATION_OUT_CONTEXT_ID  ;
-    delete [] out_RESERVATION_STATION_OUT_PACKET_ID   ;
-    delete [] out_RESERVATION_STATION_OUT_OPERATION   ;
-    delete [] out_RESERVATION_STATION_OUT_TYPE        ;
-    delete [] out_RESERVATION_STATION_OUT_HAS_IMMEDIAT;
-    delete [] out_RESERVATION_STATION_OUT_IMMEDIAT    ;
-    delete [] out_RESERVATION_STATION_OUT_DATA_RA     ;
-    delete [] out_RESERVATION_STATION_OUT_DATA_RB     ;
-    delete [] out_RESERVATION_STATION_OUT_DATA_RC     ;
-    delete [] out_RESERVATION_STATION_OUT_WRITE_RD    ;
-    delete [] out_RESERVATION_STATION_OUT_NUM_REG_RD  ;
-    delete [] out_RESERVATION_STATION_OUT_WRITE_RE    ;
-    delete [] out_RESERVATION_STATION_OUT_NUM_REG_RE  ;
+    delete [] out_RETIRE_VAL           ;
+    delete []  in_RETIRE_ACK           ;
+    if (_param->_have_port_context_id)
+    delete [] out_RETIRE_CONTEXT_ID    ;
+    if (_param->_have_port_front_end_id)
+    delete [] out_RETIRE_FRONT_END_ID  ;
+    if (_param->_have_port_ooo_engine_id)
+    delete [] out_RETIRE_OOO_ENGINE_ID ;
+    if (_param->_have_port_rob_id)
+    delete [] out_RETIRE_ROB_ID        ;
+    delete [] out_RETIRE_OPERATION     ;
+    delete [] out_RETIRE_TYPE          ;
+    delete [] out_RETIRE_HAS_IMMEDIAT  ;
+    delete [] out_RETIRE_IMMEDIAT      ;
+    delete [] out_RETIRE_DATA_RA       ;
+    delete [] out_RETIRE_DATA_RB       ;
+    delete [] out_RETIRE_DATA_RC       ;
+    delete [] out_RETIRE_WRITE_RD      ;
+    delete [] out_RETIRE_NUM_REG_RD    ;
+    delete [] out_RETIRE_WRITE_RE      ;
+    delete [] out_RETIRE_NUM_REG_RE    ;
     
-    delete []  in_GPR_WRITE_VAL       ;
-    delete []  in_GPR_WRITE_CONTEXT_ID;
-    delete []  in_GPR_WRITE_NUM_REG   ;
-    delete []  in_GPR_WRITE_DATA      ;
+    delete []  in_GPR_WRITE_VAL         ;
+    if (_param->_have_port_ooo_engine_id)
+    delete []  in_GPR_WRITE_OOO_ENGINE_ID;
+    delete []  in_GPR_WRITE_NUM_REG     ;
+    delete []  in_GPR_WRITE_DATA        ;
     
     delete []  in_SPR_WRITE_VAL       ;
-    delete []  in_SPR_WRITE_CONTEXT_ID;
+    if (_param->_have_port_ooo_engine_id)
+    delete []  in_SPR_WRITE_OOO_ENGINE_ID;
     delete []  in_SPR_WRITE_NUM_REG   ;
     delete []  in_SPR_WRITE_DATA      ;
     
-    delete []  in_BYPASS_WRITE_CONTEXT_ID ;
+    if (_param->_have_port_ooo_engine_id)
+    delete []  in_BYPASS_WRITE_OOO_ENGINE_ID;
     delete []  in_BYPASS_WRITE_GPR_VAL    ;
     delete []  in_BYPASS_WRITE_GPR_NUM_REG;
@@ -91,15 +106,20 @@
     
     delete []  in_BYPASS_MEMORY_VAL       ;
-    delete []  in_BYPASS_MEMORY_CONTEXT_ID;
+    if (_param->_have_port_ooo_engine_id)
+    delete []  in_BYPASS_MEMORY_OOO_ENGINE_ID;
     delete []  in_BYPASS_MEMORY_NUM_REG   ;
     delete []  in_BYPASS_MEMORY_DATA      ;
     
     // ~~~~~[ internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
-    delete []  internal_RESERVATION_STATION_OUT_VAL;
+    delete []  internal_RETIRE_VAL;
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
     delete    _component;
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+    delete [] _queue_valid  ;
+#else
     delete    _queue_control;
+#endif
     delete [] _queue        ;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_end_cycle.cpp	(revision 69)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_end_cycle.cpp	(revision 69)
@@ -0,0 +1,46 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_read_unit {
+namespace read_unit {
+namespace reservation_station {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reservation_station::end_cycle"
+  void Reservation_station::end_cycle ()
+  {
+    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
+
+#ifdef STATISTICS
+    _stat->add();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//     sc_start(0);
+    _interfaces->testbench();
+#endif
+    log_printf(FUNC,Reservation_station,FUNCTION,"End");
+  };
+
+}; // end namespace reservation_station
+}; // end namespace read_unit
+}; // end namespace multi_read_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp	(revision 69)
@@ -26,42 +26,86 @@
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
 
-    // ~~~~~[ Interface "reservation_station_in" ]~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~
     
     // accept a new instructions when reservation_station is not full
-    internal_RESERVATION_STATION_IN_ACK = not _queue_control->full();
-    
-    PORT_WRITE(out_RESERVATION_STATION_IN_ACK, internal_RESERVATION_STATION_IN_ACK);
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+    for (internal_INSERT_SLOT=0; (internal_INSERT_SLOT<_param->_size_queue) and (_queue_valid[internal_INSERT_SLOT]==true); internal_INSERT_SLOT++);
+    internal_INSERT_ACK = (internal_INSERT_SLOT<_param->_size_queue);
+#else
+    internal_INSERT_ACK = not _queue_control->full();
+#endif    
+    PORT_WRITE(out_INSERT_ACK, internal_INSERT_ACK);
 
-    // ~~~~~[ Interface "reservation_station_out" ]~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~
 
-    for (uint32_t i=0; i<_param->_size_queue; i++)
+    uint32_t nb_slot_find = 0;
+    for (uint32_t i=0; (
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+			(i<_param->_size_queue) 
+#else
+			(i<_queue_control->nb_elt())
+#endif
+			and (nb_slot_find < _param->_nb_inst_retire)
+
+			)
+			; i++)
       {
-	bool     val   = i <_queue_control->nb_elt();
-	uint32_t index = (*_queue_control)[i];
-	
+	uint32_t index;
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	index = i;
+#else
+	index = (*_queue_control)[i];
+#endif
+	bool     val   = 
+	  (
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	   _queue_valid [i]           and
+#endif
+	   _queue[index]._data_ra_val and 
+	   _queue[index]._data_rb_val and 
+	   _queue[index]._data_rc_val);
+
 	if (val == true)
 	  {
-	    // valid if all data is present
- 	    val = (_queue[index]._data_ra_val and 
-		   _queue[index]._data_rb_val and 
-		   _queue[index]._data_rc_val);
+	    internal_RETIRE_SLOT [nb_slot_find] = i;
+	    nb_slot_find ++;
+	  }
+      }
 
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_CONTEXT_ID  [index],_queue[index]._context_id);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_PACKET_ID   [index],_queue[index]._packet_id);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_OPERATION   [index],_queue[index]._operation);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_TYPE        [index],_queue[index]._type);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_HAS_IMMEDIAT[index],_queue[index]._has_immediat);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_IMMEDIAT    [index],_queue[index]._immediat);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_DATA_RA     [index],_queue[index]._data_ra);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_DATA_RB     [index],_queue[index]._data_rb);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_DATA_RC     [index],_queue[index]._data_rc);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_WRITE_RD    [index],_queue[index]._write_rd);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_NUM_REG_RD  [index],_queue[index]._num_reg_rd);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_WRITE_RE    [index],_queue[index]._write_re);
-	    PORT_WRITE(out_RESERVATION_STATION_OUT_NUM_REG_RE  [index],_queue[index]._num_reg_re);
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	bool val                = i<nb_slot_find;
+	internal_RETIRE_VAL [i] = val;
+
+	PORT_WRITE(out_RETIRE_VAL [i], val);
+
+	if (val)
+	  {
+	    uint32_t index;
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	    index = internal_RETIRE_SLOT [i];
+#else
+	    index = (*_queue_control)[internal_RETIRE_SLOT [i]];
+#endif
+	    if (_param->_have_port_context_id)
+	    PORT_WRITE(out_RETIRE_CONTEXT_ID    [i],_queue[index]._context_id);
+	    if (_param->_have_port_front_end_id)
+	    PORT_WRITE(out_RETIRE_FRONT_END_ID  [i],_queue[index]._front_end_id);
+	    if (_param->_have_port_ooo_engine_id)
+	    PORT_WRITE(out_RETIRE_OOO_ENGINE_ID [i],_queue[index]._ooo_engine_id);
+	    if (_param->_have_port_rob_id)
+	    PORT_WRITE(out_RETIRE_ROB_ID        [i],_queue[index]._rob_id);
+	    PORT_WRITE(out_RETIRE_OPERATION     [i],_queue[index]._operation);
+	    PORT_WRITE(out_RETIRE_TYPE          [i],_queue[index]._type);
+	    PORT_WRITE(out_RETIRE_HAS_IMMEDIAT  [i],_queue[index]._has_immediat);
+	    PORT_WRITE(out_RETIRE_IMMEDIAT      [i],_queue[index]._immediat);
+	    PORT_WRITE(out_RETIRE_DATA_RA       [i],_queue[index]._data_ra);
+	    PORT_WRITE(out_RETIRE_DATA_RB       [i],_queue[index]._data_rb);
+	    PORT_WRITE(out_RETIRE_DATA_RC       [i],_queue[index]._data_rc);
+	    PORT_WRITE(out_RETIRE_WRITE_RD      [i],_queue[index]._write_rd);
+	    PORT_WRITE(out_RETIRE_NUM_REG_RD    [i],_queue[index]._num_reg_rd);
+	    PORT_WRITE(out_RETIRE_WRITE_RE      [i],_queue[index]._write_re);
+	    PORT_WRITE(out_RETIRE_NUM_REG_RE    [i],_queue[index]._num_reg_re);
 	  }
-	
-	internal_RESERVATION_STATION_OUT_VAL [index] = val;
-	PORT_WRITE(out_RESERVATION_STATION_OUT_VAL [index], internal_RESERVATION_STATION_OUT_VAL [index]);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp	(revision 69)
@@ -19,4 +19,25 @@
 namespace reservation_station {
 
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+#define dump_queue() \
+  do\
+  {\
+   log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\
+   log_printf(TRACE,Reservation_station,FUNCTION,"   * nb_elt : %d",_queue_nb_elt);\
+   for (uint32_t j=0;j<_param->_size_queue; j++)\
+   {\
+     cout << "\t"\
+          << "[" << j << "] "\
+          << "{" << _queue[j]._rob_id << " - "<< _queue[j]._context_id << "} " << " - "<< _queue[j]._front_end_id << "} " << " - "<< _queue[j]._ooo_engine_id << "} "\
+          << _queue[j]._data_ra_val << ", "\
+          << _queue[j]._num_reg_ra  << " - "\
+          << _queue[j]._data_rb_val << ","\
+          << _queue[j]._num_reg_rb  << " - "\
+          << _queue[j]._data_rc_val << ","\
+          << _queue[j]._num_reg_rc  \
+          << endl;\
+    }\
+  } while (0) 
+#else
 #define dump_queue() \
   do\
@@ -28,5 +49,5 @@
      cout << "\t"\
           << "[" << (*_queue_control)[j] << "] "\
-          << "{" << _queue[(*_queue_control)[j]]._packet_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} "\
+          << "{" << _queue[(*_queue_control)[j]]._rob_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} " << " - "<< _queue[(*_queue_control)[j]]._front_end_id << "} " << " - "<< _queue[(*_queue_control)[j]]._ooo_engine_id << "} "\
           << _queue[(*_queue_control)[j]]._data_ra_val << ", "\
           << _queue[(*_queue_control)[j]]._num_reg_ra  << " - "\
@@ -38,4 +59,5 @@
     }\
   } while (0) 
+#endif
 
 #undef  FUNCTION
@@ -47,58 +69,33 @@
     if (PORT_READ(in_NRESET) == 0)
       {
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	for (uint32_t i=0; i<_param->_size_queue; i++)
+	  _queue_valid [i] = false;
+#else
 	_queue_control->clear();
+#endif
       }
     else
       {
-	// ***** PUSH to reservation station
-	if ((PORT_READ(in_RESERVATION_STATION_IN_VAL) == 1) and
-	    (    internal_RESERVATION_STATION_IN_ACK  == 1))
+	// ***** POP from reservation station
+
+	// scan in reverse order, because when we pop the queue there are an auto reorder
+	//for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--)
+	for (int32_t i=(static_cast<int32_t>(_param->_nb_inst_retire))-1;i>=0; i--)
 	  {
-	    log_printf(TRACE,Reservation_station,FUNCTION,"PUSH");
-
-	    // Write in reservation station
-	    uint32_t index = _queue_control->push();
-
-	    log_printf(TRACE,Reservation_station,FUNCTION," * index         : %d",index);
-
-  	    _queue[index]._context_id   = PORT_READ(in_RESERVATION_STATION_IN_CONTEXT_ID  );
-  	    _queue[index]._packet_id    = PORT_READ(in_RESERVATION_STATION_IN_PACKET_ID   );
-  	    _queue[index]._operation    = PORT_READ(in_RESERVATION_STATION_IN_OPERATION   );
-  	    _queue[index]._type         = PORT_READ(in_RESERVATION_STATION_IN_TYPE        );
-  	    _queue[index]._has_immediat = PORT_READ(in_RESERVATION_STATION_IN_HAS_IMMEDIAT);
-  	    _queue[index]._immediat     = PORT_READ(in_RESERVATION_STATION_IN_IMMEDIAT    );
-//	    _queue[index]._read_ra      = PORT_READ(in_RESERVATION_STATION_IN_READ_RA     );
-  	    _queue[index]._num_reg_ra   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RA  );
-  	    _queue[index]._data_ra_val  = PORT_READ(in_RESERVATION_STATION_IN_DATA_RA_VAL );
-  	    _queue[index]._data_ra      = PORT_READ(in_RESERVATION_STATION_IN_DATA_RA     );
-//	    _queue[index]._read_rb      = PORT_READ(in_RESERVATION_STATION_IN_READ_RB     );
-  	    _queue[index]._num_reg_rb   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RB  );
-  	    _queue[index]._data_rb_val  = PORT_READ(in_RESERVATION_STATION_IN_DATA_RB_VAL );
-  	    _queue[index]._data_rb      = PORT_READ(in_RESERVATION_STATION_IN_DATA_RB     );
-//	    _queue[index]._read_rc      = PORT_READ(in_RESERVATION_STATION_IN_READ_RC     );
-  	    _queue[index]._num_reg_rc   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RC  );
-  	    _queue[index]._data_rc_val  = PORT_READ(in_RESERVATION_STATION_IN_DATA_RC_VAL );
-  	    _queue[index]._data_rc      = PORT_READ(in_RESERVATION_STATION_IN_DATA_RC     );
-  	    _queue[index]._write_rd     = PORT_READ(in_RESERVATION_STATION_IN_WRITE_RD    );
-  	    _queue[index]._num_reg_rd   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RD  );
-  	    _queue[index]._write_re     = PORT_READ(in_RESERVATION_STATION_IN_WRITE_RE    );
-  	    _queue[index]._num_reg_re   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RE  );
-// 	    dump_queue();
-	  }
-
-	// ***** POP from reservation station
-
-	// scan in reverse order, because when we pop the queue there are an auto reorder
-	for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--)
-	  {
-	    uint32_t index = (*_queue_control)[i];
-	    
-	    if ((    internal_RESERVATION_STATION_OUT_VAL [index]  == 1) and
-		(PORT_READ(in_RESERVATION_STATION_OUT_ACK [index]) == 1))
-	      {
+	    if ((    internal_RETIRE_VAL [i]  == 1) and
+		(PORT_READ(in_RETIRE_ACK [i]) == 1))
+	      {
+		//uint32_t index = (*_queue_control)[i];
+
 		log_printf(TRACE,Reservation_station,FUNCTION,"POP  [%d]",i);
 
-		_queue_control->pop(i);
-
+		uint32_t index  = internal_RETIRE_SLOT[i];
+
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+		_queue_valid [index] = false;
+#else
+		_queue_control->pop(index);
+#endif
 		log_printf(TRACE,Reservation_station,FUNCTION," * index         : %d",index);
 // 		dump_queue();
@@ -110,13 +107,29 @@
 	
 	// scan all entry
-	for (uint32_t i=0; i<_queue_control->nb_elt(); i++)
+	for (uint32_t i=0; 
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	     i<_param->_size_queue;
+#else
+	     i<_queue_control->nb_elt();
+#endif
+	     i++)
 	  {
-	    uint32_t index = (*_queue_control)[i];
+	    uint32_t index;
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	    index = i;
+#else
+	    index = (*_queue_control)[i];
+#endif
 
 	    // ***** bypass - gpr_write
 	    for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
 	      {
-		if ((PORT_READ(in_GPR_WRITE_VAL        [j]) == 1) and
-		    (PORT_READ(in_GPR_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id))
+		bool cmp;
+		if (_param->_have_port_ooo_engine_id)
+		  cmp = (PORT_READ(in_GPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
+		else
+		  cmp = true;
+
+		if ((PORT_READ(in_GPR_WRITE_VAL        [j]) == 1) and cmp)
 		  {
 		    if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_ra)
@@ -137,7 +150,13 @@
 	    for (uint32_t j=0; j<_param->_nb_spr_write; j++)
 	      {
-		if ((PORT_READ(in_SPR_WRITE_VAL        [j]) == 1)                         and
-		    (PORT_READ(in_SPR_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id) and
-		    (PORT_READ(in_SPR_WRITE_NUM_REG    [j]) == _queue[index]._num_reg_rc))
+		bool cmp;
+		if (_param->_have_port_ooo_engine_id)
+		  cmp = (PORT_READ(in_SPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
+		else
+		  cmp = true;
+		
+		if ((PORT_READ(in_SPR_WRITE_VAL           [j]) == 1) and
+		    cmp and
+		    (PORT_READ(in_SPR_WRITE_NUM_REG       [j]) == _queue[index]._num_reg_rc))
 		  {
 		    log_printf(TRACE,Reservation_station,FUNCTION," -> SPR_WRITE     [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc);
@@ -149,5 +168,11 @@
 	    for (uint32_t j=0; j<_param->_nb_bypass_write; j++)
 	      {
-		if (PORT_READ(in_BYPASS_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id)
+		bool cmp;
+		if (_param->_have_port_ooo_engine_id)
+		  cmp = (PORT_READ(in_BYPASS_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
+		else
+		  cmp = true;
+
+		if (cmp)
 		  {
 		    if (PORT_READ(in_BYPASS_WRITE_GPR_VAL    [j]) == 1)
@@ -178,6 +203,11 @@
 	    for (uint32_t j=0; j<_param->_nb_bypass_memory; j++)
 	      {
-		if ((PORT_READ(in_BYPASS_MEMORY_VAL        [j]) == 1) and
-		    (PORT_READ(in_BYPASS_MEMORY_CONTEXT_ID [j]) == _queue[index]._context_id))
+		bool cmp;
+		if (_param->_have_port_ooo_engine_id)
+		  cmp = (PORT_READ(in_BYPASS_MEMORY_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
+		else
+		  cmp = true;
+
+		if ((PORT_READ(in_BYPASS_MEMORY_VAL           [j]) == 1) and cmp)
 		  {
 		    if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_ra)
@@ -196,13 +226,54 @@
 	      }
 	  }
+	// ***** PUSH to reservation station
+	if ((PORT_READ(in_INSERT_VAL) == 1) and
+	    (    internal_INSERT_ACK  == 1))
+	  {
+	    log_printf(TRACE,Reservation_station,FUNCTION,"PUSH");
+
+	    // Write in reservation station
+	    uint32_t index;
+
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+	    index = internal_INSERT_SLOT;
+	    _queue_valid [internal_INSERT_SLOT] = true;
+#else
+	    index = _queue_control->push();
+#endif
+	    log_printf(TRACE,Reservation_station,FUNCTION," * index         : %d",index);
+
+  	    if (_param->_have_port_context_id)
+	    _queue[index]._context_id      = PORT_READ(in_INSERT_CONTEXT_ID     );
+  	    if (_param->_have_port_front_end_id)
+	    _queue[index]._front_end_id    = PORT_READ(in_INSERT_FRONT_END_ID   );
+  	    if (_param->_have_port_ooo_engine_id)
+	    _queue[index]._ooo_engine_id   = PORT_READ(in_INSERT_OOO_ENGINE_ID  );
+  	    if (_param->_have_port_rob_id)
+	    _queue[index]._rob_id          = PORT_READ(in_INSERT_ROB_ID         );
+  	    _queue[index]._operation       = PORT_READ(in_INSERT_OPERATION      );
+  	    _queue[index]._type            = PORT_READ(in_INSERT_TYPE           );
+  	    _queue[index]._has_immediat    = PORT_READ(in_INSERT_HAS_IMMEDIAT   );
+  	    _queue[index]._immediat        = PORT_READ(in_INSERT_IMMEDIAT       );
+//	    _queue[index]._read_ra         = PORT_READ(in_INSERT_READ_RA        );
+  	    _queue[index]._num_reg_ra      = PORT_READ(in_INSERT_NUM_REG_RA     );
+  	    _queue[index]._data_ra_val     = PORT_READ(in_INSERT_DATA_RA_VAL    );
+  	    _queue[index]._data_ra         = PORT_READ(in_INSERT_DATA_RA        );
+//	    _queue[index]._read_rb         = PORT_READ(in_INSERT_READ_RB        );
+  	    _queue[index]._num_reg_rb      = PORT_READ(in_INSERT_NUM_REG_RB     );
+  	    _queue[index]._data_rb_val     = PORT_READ(in_INSERT_DATA_RB_VAL    );
+  	    _queue[index]._data_rb         = PORT_READ(in_INSERT_DATA_RB        );
+//	    _queue[index]._read_rc         = PORT_READ(in_INSERT_READ_RC        );
+  	    _queue[index]._num_reg_rc      = PORT_READ(in_INSERT_NUM_REG_RC     );
+  	    _queue[index]._data_rc_val     = PORT_READ(in_INSERT_DATA_RC_VAL    );
+  	    _queue[index]._data_rc         = PORT_READ(in_INSERT_DATA_RC        );
+  	    _queue[index]._write_rd        = PORT_READ(in_INSERT_WRITE_RD       );
+  	    _queue[index]._num_reg_rd      = PORT_READ(in_INSERT_NUM_REG_RD     );
+  	    _queue[index]._write_re        = PORT_READ(in_INSERT_WRITE_RE       );
+  	    _queue[index]._num_reg_re      = PORT_READ(in_INSERT_NUM_REG_RE     );
+// 	    dump_queue();
+	  }
       }
 
-#ifdef STATISTICS
-    _stat->add();
-#endif    
-
-#ifdef VHDL_TESTBENCH
-    vhdl_testbench_transition ();
-#endif
+    end_cycle ();
 
     log_printf(FUNC,Reservation_station,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_body.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_body.cpp	(revision 69)
@@ -18,11 +18,296 @@
 namespace reservation_station {
 
-
 #undef  FUNCTION
 #define FUNCTION "Reservation_station::vhdl_body"
   void Reservation_station::vhdl_body (Vhdl * & vhdl)
   {
+    string range_retire, range_insert;
+
+    if (_param->_size_queue == 1)
+      range_insert = "(0)";
+    else
+      range_insert = "(conv_integer(internal_INSERT_SLOT"+std_logic_range(log2(_param->_size_queue))+"))";
+
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
-    vhdl->set_body ("");
+
+    vhdl->set_body ("-----------------------------------");
+    vhdl->set_body ("-- interface 'INSERT'");
+    vhdl->set_body ("-----------------------------------");
+    vhdl->set_body ("");
+    vhdl->set_body ("     out_INSERT_ACK          <= not internal_FULL;");
+    vhdl->set_body ("internal_INSERT_TRANSACTION  <= not internal_FULL and in_INSERT_VAL;");
+    
+    vhdl->set_body ("internal_INSERT_SLOT         <=");
+    for (uint32_t i=0; i<_param->_size_queue; i++)
+      {
+	vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),i)+" when reg_VAL("+toString(i)+")='0' else");
+      }
+    vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";");
+
+    vhdl->set_body ("");
+    vhdl->set_body ("-----------------------------------");
+    vhdl->set_body ("-- interface 'RETIRE'");
+    vhdl->set_body ("-----------------------------------");
+    vhdl->set_body ("");
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      vhdl->set_body ("internal_RETIRE_TRANSACTION_"+toString(i)+"<= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+" and in_RETIRE_"+toString(i)+"_ACK;");
+    vhdl->set_body ("");
+
+    uint32_t nb_slot_scan = _param->_size_queue-_param->_nb_inst_retire+1;
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	vhdl->set_body ("internal_RETIRE_SLOT_"+toString(i)+"       <= ");
+	for (uint32_t j=i; j<nb_slot_scan+i; j++)
+	  {
+	    vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),j)+" when");
+	    for (uint32_t k=0; k<i; k++)
+	      {
+		vhdl->set_body ("\t\tnot (internal_RETIRE_SLOT_"+toString(k)+" = "+std_logic_conv(log2(_param->_size_queue),j)+std_logic_range(log2(_param->_size_queue))+") and");
+	      }
+	    vhdl->set_body ("\t\t(reg_VAL        ("+toString(j)+")='1') and");
+	    vhdl->set_body ("\t\t(reg_DATA_RA_VAL("+toString(j)+")='1') and");
+	    vhdl->set_body ("\t\t(reg_DATA_RB_VAL("+toString(j)+")='1') and");
+	    vhdl->set_body ("\t\t(reg_DATA_RC_VAL("+toString(j)+")='1') else");
+	  }
+	vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";");
+	vhdl->set_body ("");
+      }
+
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	if (_param->_size_queue == 1)
+	  range_retire = "(0)";
+	else
+	  range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))";
+
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_VAL             <= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+";");
+	if (_param->_have_port_context_id)			    
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_CONTEXT_ID      <= reg_CONTEXT_ID   "+range_retire+";");
+	if (_param->_have_port_front_end_id)			    
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_FRONT_END_ID    <= reg_FRONT_END_ID "+range_retire+";");
+	if (_param->_have_port_ooo_engine_id)			    
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_OOO_ENGINE_ID   <= reg_OOO_ENGINE_ID"+range_retire+";");
+	if (_param->_have_port_rob_id)				    
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_ROB_ID          <= reg_ROB_ID       "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_OPERATION       <= reg_OPERATION    "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_TYPE            <= reg_TYPE         "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT    <= reg_HAS_IMMEDIAT "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_IMMEDIAT        <= reg_IMMEDIAT     "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RA         <= reg_DATA_RA      "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RB         <= reg_DATA_RB      "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RC         <= reg_DATA_RC      "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RD        <= reg_WRITE_RD     "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RD      <= reg_NUM_REG_RD   "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RE        <= reg_WRITE_RE     "+range_retire+";");
+	vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RE      <= reg_NUM_REG_RE   "+range_retire+";");
+	vhdl->set_body ("");
+      }
+
+//     vhdl->set_body ("-----------------------------------");
+//     vhdl->set_body ("-- flags");
+//     vhdl->set_body ("-----------------------------------");
+//     vhdl->set_body ("");
+//     vhdl->set_body ("internal_EMPTY <=");
+//     for (uint32_t i=_param->_size_queue-1; i>0; i--)
+//       vhdl->set_body ("\tnot reg_VAL ("+toString(i)+") and");
+//     vhdl->set_body ("\tnot reg_VAL (0);");
+//     vhdl->set_body ("internal_FULL  <=");
+//     for (uint32_t i=_param->_size_queue-1; i>0; i--)
+//       vhdl->set_body ("\t    reg_VAL ("+toString(i)+") and");
+//     vhdl->set_body ("\t    reg_VAL (0);");
+
+    vhdl->set_body ("");
+    vhdl->set_body ("-----------------------------------");
+    vhdl->set_body ("-- transition");
+    vhdl->set_body ("-----------------------------------");
+    vhdl->set_body ("");
+    vhdl->set_body ("transition: process (in_CLOCK)");
+    vhdl->set_body ("begin  -- process transition");
+    vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then");
+    vhdl->set_body ("");
+    vhdl->set_body ("\t\tif (in_NRESET = '0') then");    
+    for (uint32_t i=0; i<_param->_size_queue; i++)
+      {
+	vhdl->set_body ("\t\t\treg_VAL ("+toString(i)+")<= '0';");
+      }
+    vhdl->set_body ("\t\telse");
+
+
+    vhdl->set_body ("");
+    vhdl->set_body ("\t\t\t-----------------------------------");
+    vhdl->set_body ("\t\t\t-- bypass");
+    vhdl->set_body ("\t\t\t-----------------------------------");
+    vhdl->set_body ("");
+    vhdl->set_body ("\t\t\t-- interface : 'GPR_WRITE'");
+    for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
+      {
+	vhdl->set_body ("\t\t\tif (in_GPR_WRITE_"+toString(i)+"_VAL = '1') then");
+	vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
+	for (uint32_t j=0; j<_param->_size_queue; j++)
+	  {
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA     ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB     ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tend if;");    
+	  }
+	vhdl->set_body ("\t\t\tend if;");    
+      }
+
+    vhdl->set_body ("\t\t\t-- interface : 'SPR_WRITE'");
+    for (uint32_t i=0; i<_param->_nb_spr_write; i++)
+      {
+	vhdl->set_body ("\t\t\tif (in_SPR_WRITE_"+toString(i)+"_VAL = '1') then");
+	vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
+	for (uint32_t j=0; j<_param->_size_queue; j++)
+	  {
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC     ("+toString(j)+") <= in_SPR_WRITE_"+toString(i)+"_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tend if;");    
+	  }
+	vhdl->set_body ("\t\t\tend if;");    
+      }
+
+    vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_GPR'");
+    for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
+      {
+	vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_VAL = '1') then");
+	vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
+	for (uint32_t j=0; j<_param->_size_queue; j++)
+	  {
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA     ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB     ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tend if;");    
+	  }
+	vhdl->set_body ("\t\t\tend if;");    
+      }
+
+    vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_SPR'");
+    for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
+      {
+	vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_VAL = '1') then");
+	vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
+	for (uint32_t j=0; j<_param->_size_queue; j++)
+	  {
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC     ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_SPR_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tend if;");    
+	  }
+	vhdl->set_body ("\t\t\tend if;");    
+      }
+
+    vhdl->set_body ("\t\t\t-- interface : 'BYPASS_MEMORY_GPR'");
+    for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
+      {
+	vhdl->set_body ("\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_VAL = '1') then");
+	vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
+	for (uint32_t j=0; j<_param->_size_queue; j++)
+	  {
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA     ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';");
+	    vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB     ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;");
+	    vhdl->set_body ("\t\t\t\t\tend if;");    
+
+	    if (_param->_have_port_ooo_engine_id)
+	      vhdl->set_body ("\t\t\t\tend if;");    
+	  }
+	vhdl->set_body ("\t\t\tend if;");    
+      }
+
+    vhdl->set_body ("");
+    vhdl->set_body ("\t\t\t-- interface : 'INSERT'");
+    vhdl->set_body ("\t\t\tif (internal_INSERT_TRANSACTION = '1') then");
+
+
+
+    vhdl->set_body ("\t\t\t\treg_VAL           "+range_insert+" <= '1';");
+
+    if (_param->_have_port_context_id)
+    vhdl->set_body ("\t\t\t\treg_CONTEXT_ID    "+range_insert+" <= in_INSERT_CONTEXT_ID   ;");
+    if (_param->_have_port_front_end_id)
+    vhdl->set_body ("\t\t\t\treg_FRONT_END_ID  "+range_insert+" <= in_INSERT_FRONT_END_ID ;");
+    if (_param->_have_port_ooo_engine_id)
+    vhdl->set_body ("\t\t\t\treg_OOO_ENGINE_ID "+range_insert+" <= in_INSERT_OOO_ENGINE_ID;");
+    if (_param->_have_port_rob_id)
+    vhdl->set_body ("\t\t\t\treg_ROB_ID        "+range_insert+" <= in_INSERT_ROB_ID       ;");
+    vhdl->set_body ("\t\t\t\treg_OPERATION     "+range_insert+" <= in_INSERT_OPERATION    ;");
+    vhdl->set_body ("\t\t\t\treg_TYPE          "+range_insert+" <= in_INSERT_TYPE         ;");
+    vhdl->set_body ("\t\t\t\treg_HAS_IMMEDIAT  "+range_insert+" <= in_INSERT_HAS_IMMEDIAT ;");
+    vhdl->set_body ("\t\t\t\treg_IMMEDIAT      "+range_insert+" <= in_INSERT_IMMEDIAT     ;");
+    vhdl->set_body ("\t\t\t\treg_NUM_REG_RA    "+range_insert+" <= in_INSERT_NUM_REG_RA   ;");
+    vhdl->set_body ("\t\t\t\treg_DATA_RA_VAL   "+range_insert+" <= in_INSERT_DATA_RA_VAL  ;");
+    vhdl->set_body ("\t\t\t\treg_DATA_RA       "+range_insert+" <= in_INSERT_DATA_RA      ;");
+    vhdl->set_body ("\t\t\t\treg_NUM_REG_RB    "+range_insert+" <= in_INSERT_NUM_REG_RB   ;");
+    vhdl->set_body ("\t\t\t\treg_DATA_RB_VAL   "+range_insert+" <= in_INSERT_DATA_RB_VAL  ;");
+    vhdl->set_body ("\t\t\t\treg_DATA_RB       "+range_insert+" <= in_INSERT_DATA_RB      ;");
+    vhdl->set_body ("\t\t\t\treg_NUM_REG_RC    "+range_insert+" <= in_INSERT_NUM_REG_RC   ;");
+    vhdl->set_body ("\t\t\t\treg_DATA_RC_VAL   "+range_insert+" <= in_INSERT_DATA_RC_VAL  ;");
+    vhdl->set_body ("\t\t\t\treg_DATA_RC       "+range_insert+" <= in_INSERT_DATA_RC      ;");
+    vhdl->set_body ("\t\t\t\treg_WRITE_RD      "+range_insert+" <= in_INSERT_WRITE_RD     ;");
+    vhdl->set_body ("\t\t\t\treg_NUM_REG_RD    "+range_insert+" <= in_INSERT_NUM_REG_RD   ;");
+    vhdl->set_body ("\t\t\t\treg_WRITE_RE      "+range_insert+" <= in_INSERT_WRITE_RE     ;");
+    vhdl->set_body ("\t\t\t\treg_NUM_REG_RE    "+range_insert+" <= in_INSERT_NUM_REG_RE   ;");
+    vhdl->set_body ("\t\t\tend if;");    
+
+    vhdl->set_body ("");
+    vhdl->set_body ("\t\t\t-- interface : 'RETIRE'");
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	if (_param->_size_queue == 1)
+	  range_retire = "(0)";
+	else
+	  range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))";
+
+	vhdl->set_body ("\t\t\tif (internal_RETIRE_TRANSACTION_"+toString(i)+" = '1') then");
+	
+	vhdl->set_body ("\t\t\t\treg_VAL "+range_retire+" <= '0';");
+	vhdl->set_body ("\t\t\tend if;");    
+      }
+
+    vhdl->set_body ("");
+    vhdl->set_body ("\t\tend if;");
+    vhdl->set_body ("");
+    vhdl->set_body ("\tend if;");
+    vhdl->set_body ("end process transition;");
+
     log_printf(FUNC,Reservation_station,FUNCTION,"End");
   };
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_declaration.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_declaration.cpp	(revision 69)
@@ -24,4 +24,63 @@
   {
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
+
+    vhdl->set_type ("Tcontrol        ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(1));
+    if (_param->_have_port_context_id)            
+    vhdl->set_type ("Tcontext_id     ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_context_id));
+    if (_param->_have_port_front_end_id)          
+    vhdl->set_type ("Tfront_end_id   ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_front_end_id));
+    if (_param->_have_port_ooo_engine_id)         
+    vhdl->set_type ("Tooo_engine_id  ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_ooo_engine_id));
+    if (_param->_have_port_rob_id)	          
+    vhdl->set_type ("Trob_id         ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_rob_id));
+    vhdl->set_type ("Toperation      ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_operation));
+    vhdl->set_type ("Ttype           ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_type));
+    vhdl->set_type ("Tgeneral_data   ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_general_data));
+    vhdl->set_type ("Tspecial_data   ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_special_data));    
+    vhdl->set_type ("Tgeneral_address","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_general_register));
+    vhdl->set_type ("Tspecial_address","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_special_register));    
+
+    vhdl->set_signal("reg_VAL                     ","Tcontrol");
+    if (_param->_have_port_context_id)            
+    vhdl->set_signal("reg_CONTEXT_ID              ","Tcontext_id");
+    if (_param->_have_port_front_end_id)          
+    vhdl->set_signal("reg_FRONT_END_ID            ","Tfront_end_id");
+    if (_param->_have_port_ooo_engine_id)         
+    vhdl->set_signal("reg_OOO_ENGINE_ID           ","Tooo_engine_id");
+    if (_param->_have_port_rob_id)	          
+    vhdl->set_signal("reg_ROB_ID                  ","Trob_id");
+    vhdl->set_signal("reg_OPERATION               ","Toperation");
+    vhdl->set_signal("reg_TYPE                    ","Ttype");
+    vhdl->set_signal("reg_HAS_IMMEDIAT            ","Tcontrol");
+    vhdl->set_signal("reg_IMMEDIAT                ","Tgeneral_data");
+    vhdl->set_signal("reg_NUM_REG_RA              ","Tgeneral_address");
+    vhdl->set_signal("reg_DATA_RA_VAL             ","Tcontrol");
+    vhdl->set_signal("reg_DATA_RA                 ","Tgeneral_data");
+    vhdl->set_signal("reg_NUM_REG_RB              ","Tgeneral_address");
+    vhdl->set_signal("reg_DATA_RB_VAL             ","Tcontrol");
+    vhdl->set_signal("reg_DATA_RB                 ","Tgeneral_data");
+    vhdl->set_signal("reg_NUM_REG_RC              ","Tspecial_address");
+    vhdl->set_signal("reg_DATA_RC_VAL             ","Tcontrol");
+    vhdl->set_signal("reg_DATA_RC                 ","Tspecial_data");
+    vhdl->set_signal("reg_WRITE_RD                ","Tcontrol");
+    vhdl->set_signal("reg_NUM_REG_RD              ","Tgeneral_address");
+    vhdl->set_signal("reg_WRITE_RE                ","Tcontrol");
+    vhdl->set_signal("reg_NUM_REG_RE              ","Tspecial_address");
+
+    if (_param->_size_queue == 1)
+      vhdl->set_alias(" internal_FULL               ",1,"internal_INSERT_SLOT","");
+    else
+      vhdl->set_alias(" internal_FULL               ",1,"internal_INSERT_SLOT","("+toString(log2(_param->_size_queue))+")");
+//  vhdl->set_signal("internal_EMPTY              ",1);
+
+    vhdl->set_signal("internal_INSERT_TRANSACTION ",1);
+    vhdl->set_signal("internal_INSERT_SLOT        ",log2(_param->_size_queue)+1);
+
+    
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	vhdl->set_signal("internal_RETIRE_TRANSACTION_"+toString(i),1);
+	vhdl->set_signal("internal_RETIRE_SLOT_"+toString(i)+"      ",log2(_param->_size_queue)+1);
+      }
     log_printf(FUNC,Reservation_station,FUNCTION,"End");
   };
@@ -33,5 +92,4 @@
 }; // end namespace multi_execute_loop
 }; // end namespace core
-
 }; // end namespace behavioural
 }; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_testbench_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_testbench_transition.cpp	(revision 68)
+++ 	(revision )
@@ -1,44 +1,0 @@
-#ifdef VHDL_TESTBENCH
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_read_unit {
-namespace read_unit {
-namespace reservation_station {
-
-
-#undef  FUNCTION
-#define FUNCTION "Reservation_station::vhdl_testbench_transition"
-  void Reservation_station::vhdl_testbench_transition ()
-  {
-    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
-
-    // Evaluation before read the ouput signal
-//     sc_start(0);
-
-    _interfaces->testbench();
-
-    log_printf(FUNC,Reservation_station,FUNCTION,"End");
-  };
-
-}; // end namespace reservation_station
-}; // end namespace read_unit
-}; // end namespace multi_read_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf	(revision 69)
@@ -3,40 +3,15 @@
 #
 
-all: _Generic/Queue/SelfTest _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest _Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest _Generic/Select/Select_Priority_Fixed/SelfTest _Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest _Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
+all: _Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
 
-_Generic/Queue/SelfTest:
-	make all -C Generic/Queue/SelfTest
-
-_Generic/RegisterFile/RegisterFile_Monolithic/SelfTest:
-	make all -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
-
-_Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest:
-	make all -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
-
-_Generic/Select/Select_Priority_Fixed/SelfTest:
-	make all -C Generic/Select/Select_Priority_Fixed/SelfTest
-
-_Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest:
-	make all -C Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
-
-_Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest:
-	make all -C Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
+_Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest:
+	make all -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
 
 clean:
-	make clean -C Generic/Queue/SelfTest
-	make clean -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
-	make clean -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
-	make clean -C Generic/Select/Select_Priority_Fixed/SelfTest
-	make clean -C Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
-	make clean -C Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
+	make clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
 
 re: clean all
 
 install:
-	make install -C Generic/Queue/SelfTest
-	make install -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
-	make install -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
-	make install -C Generic/Select/Select_Priority_Fixed/SelfTest
-	make install -C Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
-	make install -C Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
+	make install -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h	(revision 69)
@@ -108,7 +108,5 @@
 #endif					       
 					       
-#ifdef VHDL_TESTBENCH			       
-  private : void     vhdl_testbench_transition (void);
-#endif
+  private : void     end_cycle                 (void);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_end_cycle.cpp	(revision 69)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_end_cycle.cpp	(revision 69)
@@ -0,0 +1,35 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/@DIRECTORY/include/@COMPONENT.h"
+
+namespace morpheo {
+namespace behavioural {
+@NAMESPACE_BEGIN
+
+#undef  FUNCTION
+#define FUNCTION "@COMPONENT::end_cycle"
+void @COMPONENT::end_cycle ()
+  {
+    log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
+
+#ifdef STATISTICS
+    _stat->add();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    _interfaces->testbench();
+#endif
+
+    log_printf(FUNC,@COMPONENT,FUNCTION,"End");
+  };
+
+@NAMESPACE_END
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp	(revision 69)
@@ -20,11 +20,5 @@
     log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
 
-#ifdef STATISTICS
-    _stat->add();
-#endif    
-
-#ifdef VHDL_TESTBENCH
-    vhdl_testbench_transition ();
-#endif
+    end_cycle ();
 
     log_printf(FUNC,@COMPONENT,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_testbench_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_testbench_transition.cpp	(revision 68)
+++ 	(revision )
@@ -1,32 +1,0 @@
-#ifdef VHDL_TESTBENCH
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/@DIRECTORY/include/@COMPONENT.h"
-
-namespace morpheo                    {
-namespace behavioural {
-@NAMESPACE_BEGIN
-
-#undef  FUNCTION
-#define FUNCTION "@COMPONENT::vhdl_testbench_transition"
-  void @COMPONENT::vhdl_testbench_transition ()
-  {
-    log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
-
-    // Evaluation before read the ouput signal
-//     sc_start(0);
-
-    _interfaces->testbench();
-
-    log_printf(FUNC,@COMPONENT,FUNCTION,"End");
-  };
-
-@NAMESPACE_END
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h	(revision 69)
@@ -24,6 +24,6 @@
 #define         DEBUG_Multi_Read_unit				  false
 #define           DEBUG_Read_unit				  false
-#define             DEBUG_Read_queue                              true 
-#define             DEBUG_Reservation_station                     false
+#define             DEBUG_Read_queue                              false
+#define             DEBUG_Reservation_station                     true 
 #define         DEBUG_Register_unit				  false
 #define           DEBUG_Register_unit_Glue			  false
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h	(revision 69)
@@ -113,4 +113,8 @@
 							    string      name2                 ,
 							    string      range2                );
+  public    : void             set_alias                   (string      name1                 ,
+							    uint32_t    size1                 ,
+							    string      name2                 ,
+							    string      range2                );
 
   public    : string           get_list                    (list<string> liste                ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info	(revision 69)
@@ -15,11 +15,12 @@
 
 # build src directory content
-target_dep		all		Generic/Queue/SelfTest
-target_dep		all		Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
-target_dep		all		Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
-target_dep		all		Generic/Select/Select_Priority_Fixed/SelfTest
-target_dep		all		Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest
-target_dep		all		Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
-target_dep		all		Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
+#target_dep		all		Generic/Queue/SelfTest
+#target_dep		all		Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
+#target_dep		all		Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
+#target_dep		all		Generic/Select/Select_Priority_Fixed/SelfTest
+#target_dep		all		Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest
+target_dep		all		Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
+#target_dep		all		Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
+#target_dep		all		Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
 # mkf include path
 var_define		_mkf_path	include_mkf
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_alias.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_alias.cpp	(revision 68)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_alias.cpp	(revision 69)
@@ -27,4 +27,14 @@
     log_printf(FUNC,Behavioural,FUNCTION,"End");
   };
+
+  void Vhdl::set_alias (string      name1 ,
+			uint32_t    size1 ,
+			string      name2 ,
+			string      range2)
+  {
+    log_printf(FUNC,Behavioural,FUNCTION,"Begin");
+    set_alias(name1, std_logic(size1),name2,range2);
+    log_printf(FUNC,Behavioural,FUNCTION,"End");
+  };
   
 }; // end namespace behavioural          
