Changeset 72 for trunk/IPs/systemC/processor/Morpheo
- Timestamp:
- Jan 29, 2008, 1:34:47 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo
- Files:
-
- 73 added
- 15 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/Memory.h
r71 r72 79 79 morpheo::behavioural::Tdcache_data_t rdata; 80 80 81 if (type == DCACHE_ LOAD)81 if (type == DCACHE_TYPE_LOAD) 82 82 rdata = read (context, address, type); 83 83 else 84 if ((type == DCACHE_ STORE_8 ) or85 (type == DCACHE_ STORE_16) or86 (type == DCACHE_ STORE_32) or87 (type == DCACHE_ STORE_64) )84 if ((type == DCACHE_TYPE_STORE_8 ) or 85 (type == DCACHE_TYPE_STORE_16) or 86 (type == DCACHE_TYPE_STORE_32) or 87 (type == DCACHE_TYPE_STORE_64) ) 88 88 rdata = write (context, address, type, data); 89 89 else … … 186 186 // 3 24 187 187 188 uint32_t memory_size = ((type==DCACHE_ STORE_16)?MEMORY_SIZE_16:189 ((type==DCACHE_ STORE_32)?MEMORY_SIZE_32:190 ((type==DCACHE_ STORE_64 )?MEMORY_SIZE_64:MEMORY_SIZE_8)));188 uint32_t memory_size = ((type==DCACHE_TYPE_STORE_16)?MEMORY_SIZE_16: 189 ((type==DCACHE_TYPE_STORE_32)?MEMORY_SIZE_32: 190 ((type==DCACHE_TYPE_STORE_64 )?MEMORY_SIZE_64:MEMORY_SIZE_8))); 191 191 192 192 uint32_t index_min = LSB<<3; // *8 … … 265 265 switch(i->_type) 266 266 { 267 case DCACHE_ LOAD : std::cout << "DCACHE_LOAD "; break;268 case DCACHE_ LOCK : std::cout << "DCACHE_LOCK "; break;269 case DCACHE_ INVALIDATE : std::cout << "DCACHE_INVALIDATE "; break;270 case DCACHE_ PREFETCH : std::cout << "DCACHE_PREFETCH "; break;271 case DCACHE_ FLUSH : std::cout << "DCACHE_FLUSH "; break;272 case DCACHE_ SYNCHRONIZATION : std::cout << "DCACHE_SYNCHRONIZATION"; break;273 case DCACHE_ STORE_8 : std::cout << "DCACHE_STORE_8 "; break;274 case DCACHE_ STORE_16 : std::cout << "DCACHE_STORE_16 "; break;275 case DCACHE_ STORE_32 : std::cout << "DCACHE_STORE_32 "; break;276 case DCACHE_ STORE_64 : std::cout << "DCACHE_STORE_64 "; break;267 case DCACHE_TYPE_LOAD : std::cout << "DCACHE_TYPE_LOAD "; break; 268 case DCACHE_TYPE_LOCK : std::cout << "DCACHE_TYPE_LOCK "; break; 269 case DCACHE_TYPE_INVALIDATE : std::cout << "DCACHE_TYPE_INVALIDATE "; break; 270 case DCACHE_TYPE_PREFETCH : std::cout << "DCACHE_TYPE_PREFETCH "; break; 271 case DCACHE_TYPE_FLUSH : std::cout << "DCACHE_TYPE_FLUSH "; break; 272 case DCACHE_TYPE_SYNCHRONIZATION : std::cout << "DCACHE_TYPE_SYNCHRONIZATION"; break; 273 case DCACHE_TYPE_STORE_8 : std::cout << "DCACHE_TYPE_STORE_8 "; break; 274 case DCACHE_TYPE_STORE_16 : std::cout << "DCACHE_TYPE_STORE_16 "; break; 275 case DCACHE_TYPE_STORE_32 : std::cout << "DCACHE_TYPE_STORE_32 "; break; 276 case DCACHE_TYPE_STORE_64 : std::cout << "DCACHE_TYPE_STORE_64 "; break; 277 277 } 278 278 std::cout << " - " … … 294 294 Memory_t * memory = new Memory_t (_nb_context, _nb_word, _size_word); 295 295 296 memory -> access (2, 0x10, DCACHE_ STORE_32, 0xdeadbeef);297 memory -> access (2, 0x14, DCACHE_ STORE_16, 0xdada5678);298 memory -> access (2, 0x16, DCACHE_ STORE_16, 0xbead1234);299 memory -> access (2, 0x18, DCACHE_ STORE_8 , 0x45675681);300 memory -> access (2, 0x19, DCACHE_ STORE_8 , 0x1f311219);301 memory -> access (2, 0x1a, DCACHE_ STORE_8 , 0x2e075607);302 memory -> access (2, 0x1b, DCACHE_ STORE_8 , 0x19811221);303 304 TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_ LOAD, 0), 0xdeadbeef);305 TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x14, DCACHE_ LOAD, 0), 0x12345678);306 TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x18, DCACHE_ LOAD, 0), 0x21071981);296 memory -> access (2, 0x10, DCACHE_TYPE_STORE_32, 0xdeadbeef); 297 memory -> access (2, 0x14, DCACHE_TYPE_STORE_16, 0xdada5678); 298 memory -> access (2, 0x16, DCACHE_TYPE_STORE_16, 0xbead1234); 299 memory -> access (2, 0x18, DCACHE_TYPE_STORE_8 , 0x45675681); 300 memory -> access (2, 0x19, DCACHE_TYPE_STORE_8 , 0x1f311219); 301 memory -> access (2, 0x1a, DCACHE_TYPE_STORE_8 , 0x2e075607); 302 memory -> access (2, 0x1b, DCACHE_TYPE_STORE_8 , 0x19811221); 303 304 TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_TYPE_LOAD, 0), 0xdeadbeef); 305 TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x14, DCACHE_TYPE_LOAD, 0), 0x12345678); 306 TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x18, DCACHE_TYPE_LOAD, 0), 0x21071981); 307 307 308 308 TEST(morpheo::behavioural::Tdcache_data_t, memory -> read_lsq (2, 0x10, OPERATION_MEMORY_LOAD_8_Z ), 0x000000ef); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
r71 r72 629 629 LABEL(" * rdata : " + toString(rdata)); 630 630 631 if ((out_DCACHE_REQ_TYPE->read() == DCACHE_ SYNCHRONIZATION) or632 (out_DCACHE_REQ_TYPE->read() == DCACHE_ LOAD))631 if ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_SYNCHRONIZATION) or 632 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD)) 633 633 { 634 634 LABEL(" * have_dcache_rsp"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp
r71 r72 657 657 { 658 658 // Bus error 659 error = 1;659 error = DCACHE_ERROR_BUS_ERROR; 660 660 rdata = address; // convention : cache return the address fautive ! 661 661 } … … 667 667 668 668 // test type : send or not a respons ! 669 if ((out_DCACHE_REQ_TYPE->read() == DCACHE_ SYNCHRONIZATION) or670 (out_DCACHE_REQ_TYPE->read() == DCACHE_ LOAD) or671 ((error == 1) and ((out_DCACHE_REQ_TYPE->read() == DCACHE_STORE_8 ) or672 (out_DCACHE_REQ_TYPE->read() == DCACHE_STORE_16) or673 (out_DCACHE_REQ_TYPE->read() == DCACHE_STORE_32) or674 (out_DCACHE_REQ_TYPE->read() == DCACHE_STORE_64) )))669 if ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_SYNCHRONIZATION) or 670 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD) or 671 ((error != DCACHE_ERROR_NONE) and ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_8 ) or 672 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_16) or 673 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_32) or 674 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_64) ))) 675 675 { 676 676 LABEL(" * have_dcache_rsp"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
r71 r72 114 114 // out_MEMORY_OUT_DATA_RE = interface->set_signal_out <Tspecial_data_t > ("data_re" ,_param->_size_general_data ); 115 115 out_MEMORY_OUT_EXCEPTION = interface->set_signal_out <Texception_t > ("exception" ,_param->_size_exception ); 116 117 116 } 118 117 … … 132 131 out_DCACHE_REQ_CONTEXT_ID = interface->set_signal_out <Tcontext_t > ("context_id",_param->_size_dcache_context_id ); 133 132 out_DCACHE_REQ_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_dcache_packet_id ); 134 out_DCACHE_REQ_ADDRESS = interface->set_signal_out <Tdcache_address_t > ("address" ,_param->_size_ dcache_address);133 out_DCACHE_REQ_ADDRESS = interface->set_signal_out <Tdcache_address_t > ("address" ,_param->_size_general_data); 135 134 out_DCACHE_REQ_TYPE = interface->set_signal_out <Tdcache_type_t > ("type" ,_param->_size_dcache_type ); 136 135 out_DCACHE_REQ_WDATA = interface->set_signal_out <Tdcache_data_t > ("wdata" ,_param->_size_general_data); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r71 r72 620 620 621 621 622 if (error != 0)622 if (error != DCACHE_ERROR_NONE) 623 623 { 624 624 log_printf(TRACE,Load_store_unit,FUNCTION," * have a bus error !!!"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags
r71 r72 16 16 #-----[ Flags ]-------------------------------------------- 17 17 MORPHEO_FLAGS = -DSYSTEMC \ 18 -DVHDL \19 -DVHDL_TESTBENCH \20 -DVHDL_TESTBENCH_ASSERT \21 18 -DSTATISTICS \ 22 19 -DDEBUG=DEBUG_TRACE 23 20 # 24 21 # 22 # -DVHDL \ 23 # -DVHDL_TESTBENCH \ 24 # -DVHDL_TESTBENCH_ASSERT \ 25 25 # -DCONFIGURATION \ 26 26 # -DPOSITION \ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/src/main.cpp
r71 r72 40 40 ); 41 41 42 msg(_("%s"),param->print(1).c_str()) :42 msg(_("%s"),param->print(1).c_str()); 43 43 44 44 test (name,param); … … 46 46 catch (morpheo::ErrorMorpheo & error) 47 47 { 48 msg (_("<%s> : %s.\n"),name , error.what ());48 msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); 49 49 exit (EXIT_FAILURE); 50 50 } 51 51 catch (...) 52 52 { 53 54 err (_("<%s> : This test must generate a error.\n"),name); 53 err (_("<%s> : This test must generate a error.\n"),name.c_str()); 55 54 exit (EXIT_FAILURE); 56 55 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/src/test.cpp
r71 r72 13 13 #define CYCLE_MAX (128*NB_ITERATION) 14 14 15 #define LABEL(str ) \15 #define LABEL(str...) \ 16 16 { \ 17 msg (_("{%d} %s\n"),static_cast<uint32_t>(sc_simulation_time()),str); \ 18 } while(0) 17 msg (_("{%d} "),static_cast<uint32_t>(sc_simulation_time())); \ 18 msg (str); \ 19 msg (_("\n")); \ 20 } while(0) 19 21 20 22 #define SC_START(cycle_offset) \ … … 100 102 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) 101 103 { 102 LABEL("Iteration "+toString(iteration));104 LABEL("Iteration %d",iteration); 103 105 104 106 SC_START(1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/Parameters.h
r44 r72 26 26 public : ~Parameters () ; 27 27 28 public : string msg_error(void);28 public : std::string msg_error (void); 29 29 30 public : st ring print (uint32_t depth);31 public : friend ostream& operator<< (ostream& output_stream,32 30 public : std::string print (uint32_t depth); 31 public : friend std::ostream& operator<< (std::ostream& output_stream, 32 morpheo::behavioural::@NAMESPACE_USE::Parameters & x); 33 33 }; 34 34 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/Parameters_print.cpp
r71 r72 32 32 #undef FUNCTION 33 33 #define FUNCTION "@COMPONENT::operator<<" 34 ostream& operator<< (ostream& output_stream ,35 34 std::stringostream& operator<< (std::stringostream& output_stream , 35 morpheo::behavioural::@NAMESPACE_USE::Parameters & x) 36 36 { 37 37 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h
r71 r72 6 6 7 7 //=========================================================[ Type ]===== 8 #define TYPE_MEMORY 0x1 // 00001 8 # define TYPE_ALU 0x0 // 000000 - unit multiple 9 # define TYPE_BRANCH 0x1 // 000001 - unit multiple, to a special routing 10 # define TYPE_MEMORY 0x2 // 000010 - unit uniq 11 # define TYPE_MAC 0x4 // 000100 - unit uniq 12 # define TYPE_TIMER 0x8 // 001000 - unit uniq 13 # define TYPE_CUSTOM 0x10 // 010000 - unit uniq 9 14 10 15 //====================================================[ Operation ]===== 11 16 12 17 //-------------------------------------------------------[ Memory ]----- 13 # define OPERATION_MEMORY_LOAD 0x0// 000_000014 # define OPERATION_MEMORY_LOAD_8_Z 0x0// 000_000015 # define OPERATION_MEMORY_LOAD_16_Z 0x20// 010_000016 # define OPERATION_MEMORY_LOAD_32_Z 0x40// 100_000017 # define OPERATION_MEMORY_LOAD_64_Z 0x60// 110_000018 # define OPERATION_MEMORY_LOAD_8_S 0x10// 001_000019 # define OPERATION_MEMORY_LOAD_16_S 0x30// 011_000020 # define OPERATION_MEMORY_LOAD_32_S 0x50// 101_000021 # define OPERATION_MEMORY_LOAD_64_S 0x70// 111_000022 23 # define OPERATION_MEMORY_STORE_8 0x8// 000_100024 # define OPERATION_MEMORY_STORE_16 0x9// 000_100125 # define OPERATION_MEMORY_STORE_32 0xa// 000_101026 # define OPERATION_MEMORY_STORE_64 0xb// 000_101127 # define OPERATION_MEMORY_STORE_HEAD_OK 0xc// 000_110028 # define OPERATION_MEMORY_STORE_HEAD_KO 0xd// 000_110129 30 # define OPERATION_MEMORY_LOCK 0x1// 000_000131 # define OPERATION_MEMORY_INVALIDATE 0x2// 000_001032 # define OPERATION_MEMORY_PREFETCH 0x3// 000_001133 # define OPERATION_MEMORY_FLUSH 0x6// 000_011034 # define OPERATION_MEMORY_SYNCHRONIZATION 0x7// 000_011135 18 # define OPERATION_MEMORY_LOAD 0x0 // 000_0000 19 # define OPERATION_MEMORY_LOAD_8_Z 0x0 // 000_0000 20 # define OPERATION_MEMORY_LOAD_16_Z 0x20 // 010_0000 21 # define OPERATION_MEMORY_LOAD_32_Z 0x40 // 100_0000 22 # define OPERATION_MEMORY_LOAD_64_Z 0x60 // 110_0000 23 # define OPERATION_MEMORY_LOAD_8_S 0x10 // 001_0000 24 # define OPERATION_MEMORY_LOAD_16_S 0x30 // 011_0000 25 # define OPERATION_MEMORY_LOAD_32_S 0x50 // 101_0000 26 # define OPERATION_MEMORY_LOAD_64_S 0x70 // 111_0000 27 28 # define OPERATION_MEMORY_STORE_8 0x8 // 000_1000 29 # define OPERATION_MEMORY_STORE_16 0x9 // 000_1001 30 # define OPERATION_MEMORY_STORE_32 0xa // 000_1010 31 # define OPERATION_MEMORY_STORE_64 0xb // 000_1011 32 # define OPERATION_MEMORY_STORE_HEAD_OK 0xc // 000_1100 33 # define OPERATION_MEMORY_STORE_HEAD_KO 0xd // 000_1101 34 35 # define OPERATION_MEMORY_LOCK 0x1 // 000_0001 36 # define OPERATION_MEMORY_INVALIDATE 0x2 // 000_0010 37 # define OPERATION_MEMORY_PREFETCH 0x3 // 000_0011 38 # define OPERATION_MEMORY_FLUSH 0x6 // 000_0110 39 # define OPERATION_MEMORY_SYNCHRONIZATION 0x7 // 000_0111 40 36 41 #define is_operation_memory_load(x) \ 37 ((x == OPERATION_MEMORY_LOAD_8_Z ) or\38 (x == OPERATION_MEMORY_LOAD_16_Z) or\39 (x == OPERATION_MEMORY_LOAD_32_Z) or\40 (x == OPERATION_MEMORY_LOAD_64_Z) or\41 (x == OPERATION_MEMORY_LOAD_8_S ) or\42 (x == OPERATION_MEMORY_LOAD_16_S) or\43 (x == OPERATION_MEMORY_LOAD_32_S) or\44 45 46 #define is_operation_memory_store(x) 47 48 49 50 51 52 53 54 #define is_operation_memory_store_head(x) 55 56 57 42 ((x == OPERATION_MEMORY_LOAD_8_Z ) or \ 43 (x == OPERATION_MEMORY_LOAD_16_Z) or \ 44 (x == OPERATION_MEMORY_LOAD_32_Z) or \ 45 (x == OPERATION_MEMORY_LOAD_64_Z) or \ 46 (x == OPERATION_MEMORY_LOAD_8_S ) or \ 47 (x == OPERATION_MEMORY_LOAD_16_S) or \ 48 (x == OPERATION_MEMORY_LOAD_32_S) or \ 49 (x == OPERATION_MEMORY_LOAD_64_S) ) 50 51 #define is_operation_memory_store(x) \ 52 ((x == OPERATION_MEMORY_STORE_8 ) or \ 53 (x == OPERATION_MEMORY_STORE_16 ) or \ 54 (x == OPERATION_MEMORY_STORE_32 ) or \ 55 (x == OPERATION_MEMORY_STORE_64 ) or \ 56 (x == OPERATION_MEMORY_STORE_HEAD_OK) or \ 57 (x == OPERATION_MEMORY_STORE_HEAD_KO)) 58 59 #define is_operation_memory_store_head(x) \ 60 ((x == OPERATION_MEMORY_STORE_HEAD_OK) or \ 61 (x == OPERATION_MEMORY_STORE_HEAD_KO)) 62 58 63 #define is_operation_memory_load_signed(x) \ 59 ((x == OPERATION_MEMORY_LOAD_8_S ) or \ 60 (x == OPERATION_MEMORY_LOAD_16_S) or \ 61 (x == OPERATION_MEMORY_LOAD_32_S) or \ 62 (x == OPERATION_MEMORY_LOAD_64_S) ) 63 64 #define MEMORY_ACCESS_8 0x0 65 #define MEMORY_ACCESS_16 0x1 66 #define MEMORY_ACCESS_32 0x2 67 #define MEMORY_ACCESS_64 0x3 68 69 #define MEMORY_SIZE_8 8 70 #define MEMORY_SIZE_16 16 71 #define MEMORY_SIZE_32 32 72 #define MEMORY_SIZE_64 64 73 74 #define MASK_MEMORY_ACCESS_8 0x0 75 #define MASK_MEMORY_ACCESS_16 0x1 76 #define MASK_MEMORY_ACCESS_32 0x3 77 #define MASK_MEMORY_ACCESS_64 0x7 78 79 #define memory_size(x) \ 80 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 81 (x==OPERATION_MEMORY_LOAD_16_S)or \ 82 (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_SIZE_16: \ 83 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 84 (x==OPERATION_MEMORY_LOAD_32_S)or \ 85 (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_SIZE_32: \ 86 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 87 (x==OPERATION_MEMORY_LOAD_64_S)or \ 88 (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_SIZE_64:MEMORY_SIZE_8))) 89 90 #define memory_access(x) \ 91 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 92 (x==OPERATION_MEMORY_LOAD_16_S)or \ 93 (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_ACCESS_16: \ 94 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 95 (x==OPERATION_MEMORY_LOAD_32_S)or \ 96 (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_ACCESS_32: \ 97 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 98 (x==OPERATION_MEMORY_LOAD_64_S)or \ 99 (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_ACCESS_64:MEMORY_ACCESS_8))) 100 101 #define mask_memory_access(x) \ 102 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 103 (x==OPERATION_MEMORY_LOAD_16_S)or \ 104 (x==OPERATION_MEMORY_STORE_16 ))?MASK_MEMORY_ACCESS_16: \ 105 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 106 (x==OPERATION_MEMORY_LOAD_32_S)or \ 107 (x==OPERATION_MEMORY_STORE_32 ))?MASK_MEMORY_ACCESS_32: \ 108 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 109 (x==OPERATION_MEMORY_LOAD_64_S)or \ 110 (x==OPERATION_MEMORY_STORE_64 ))?MASK_MEMORY_ACCESS_64:MASK_MEMORY_ACCESS_8))) 111 64 ((x == OPERATION_MEMORY_LOAD_8_S ) or \ 65 (x == OPERATION_MEMORY_LOAD_16_S) or \ 66 (x == OPERATION_MEMORY_LOAD_32_S) or \ 67 (x == OPERATION_MEMORY_LOAD_64_S) ) 68 69 # define MEMORY_ACCESS_8 0x0 70 # define MEMORY_ACCESS_16 0x1 71 # define MEMORY_ACCESS_32 0x2 72 # define MEMORY_ACCESS_64 0x3 73 74 # define MEMORY_SIZE_8 8 75 # define MEMORY_SIZE_16 16 76 # define MEMORY_SIZE_32 32 77 # define MEMORY_SIZE_64 64 78 79 # define MASK_MEMORY_ACCESS_8 0x0 80 # define MASK_MEMORY_ACCESS_16 0x1 81 # define MASK_MEMORY_ACCESS_32 0x3 82 # define MASK_MEMORY_ACCESS_64 0x7 83 84 #define memory_size(x) \ 85 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 86 (x==OPERATION_MEMORY_LOAD_16_S)or \ 87 (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_SIZE_16: \ 88 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 89 (x==OPERATION_MEMORY_LOAD_32_S)or \ 90 (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_SIZE_32: \ 91 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 92 (x==OPERATION_MEMORY_LOAD_64_S)or \ 93 (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_SIZE_64:MEMORY_SIZE_8))) 94 95 #define memory_access(x) \ 96 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 97 (x==OPERATION_MEMORY_LOAD_16_S)or \ 98 (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_ACCESS_16: \ 99 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 100 (x==OPERATION_MEMORY_LOAD_32_S)or \ 101 (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_ACCESS_32: \ 102 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 103 (x==OPERATION_MEMORY_LOAD_64_S)or \ 104 (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_ACCESS_64:MEMORY_ACCESS_8))) 105 106 #define mask_memory_access(x) \ 107 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 108 (x==OPERATION_MEMORY_LOAD_16_S)or \ 109 (x==OPERATION_MEMORY_STORE_16 ))?MASK_MEMORY_ACCESS_16: \ 110 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 111 (x==OPERATION_MEMORY_LOAD_32_S)or \ 112 (x==OPERATION_MEMORY_STORE_32 ))?MASK_MEMORY_ACCESS_32: \ 113 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 114 (x==OPERATION_MEMORY_LOAD_64_S)or \ 115 (x==OPERATION_MEMORY_STORE_64 ))?MASK_MEMORY_ACCESS_64:MASK_MEMORY_ACCESS_8))) 116 117 //---------------------------------------------[ Functionnal Unit ]----- 118 # define OPERATION_ALU_L_ADD 0x0 // 000_0000 l.add , l.addi 119 # define OPERATION_ALU_L_ADDC 0x1 // 000_0000 l.addc , l.addic 120 # define OPERATION_ALU_L_SUB 0x2 // 000_0000 l.sub 121 # define OPERATION_ALU_L_MUL 0x3 // 000_0000 l.mul , l.muli 122 # define OPERATION_ALU_L_MULU 0x4 // 000_0000 l.mulu 123 # define OPERATION_ALU_L_DIV 0x5 // 000_0000 l.div 124 # define OPERATION_ALU_L_DIVU 0x6 // 000_0000 l.divu 125 # define OPERATION_ALU_L_AND 0x7 // 000_0000 l.and , l.andi 126 # define OPERATION_ALU_L_OR 0x8 // 000_0000 l.or , l.ori 127 # define OPERATION_ALU_L_XOR 0x9 // 000_0000 l.xor , l.xori 128 # define OPERATION_ALU_L_TEST_F 0xa // 000_0000 l.bf 129 # define OPERATION_ALU_L_TEST_NF 0xb // 000_0000 l.bnf 130 # define OPERATION_ALU_L_JALR 0xc // 000_0000 l.jal , l.jalr , l.jr 131 # define OPERATION_ALU_L_SLL 0xd // 000_0000 l.sll , l.slli 132 # define OPERATION_ALU_L_SRA 0xe // 000_0000 l.sra , l.srai 133 # define OPERATION_ALU_L_SRL 0xf // 000_0000 l.srl , l.srli 134 # define OPERATION_ALU_L_ROR 0x10 // 000_0000 l.ror , l.rori 135 # define OPERATION_ALU_L_MOVHI 0x11 // 000_0000 l.movhi 136 # define OPERATION_ALU_L_EXTEND_S 0x12 // 000_0000 l.extbs , l.exths, l.extws 137 # define OPERATION_ALU_L_EXTEND_Z 0x13 // 000_0000 l.extbz , l.exthz, l.extwz 138 # define OPERATION_ALU_L_CMOV 0x14 // 000_0000 l.cmov 139 # define OPERATION_ALU_L_FF1 0x15 // 000_0000 l.ff1 140 # define OPERATION_ALU_L_FL1 0x16 // 000_0000 l.fl1 141 # define OPERATION_ALU_L_MFSPR 0x17 // 000_0000 l.mfspr 142 # define OPERATION_ALU_L_MTSPR 0x18 // 000_0000 l.mtspr 143 # define OPERATION_ALU_L_SFGES 0x19 // 000_0000 l.sfges , l.sfges 144 # define OPERATION_ALU_L_SFGEU 0x1a // 000_0000 l.sfgeu , l.sfgeu 145 # define OPERATION_ALU_L_SFGTS 0x1b // 000_0000 L.sfgts , l.sfgts 146 # define OPERATION_ALU_L_SFGTU 0x1c // 000_0000 l.sfgtu , l.sfgtu 147 # define OPERATION_ALU_L_SFLES 0x1d // 000_0000 l.sfles , l.sfles 148 # define OPERATION_ALU_L_SFLEU 0x1e // 000_0000 l.sfleu , l.sfleu 149 # define OPERATION_ALU_L_SFLTS 0x1f // 000_0000 l.sflts , l.sflts 150 # define OPERATION_ALU_L_SFLTU 0x20 // 000_0000 l.sfltu , l.sfltu 151 # define OPERATION_ALU_L_SFEQ 0x21 // 000_0000 l.sfeq , l.sfeqi 152 # define OPERATION_ALU_L_SFNE 0x22 // 000_0000 l.sfne , l.sfnei 153 # define OPERATION_ALU_L_MAC 0x23 // 000_0000 l.mac , l.maci 154 # define OPERATION_ALU_L_MACRC 0x24 // 000_0000 l.macrc 155 # define OPERATION_ALU_L_MSB 0x25 // 000_0000 l.msb 156 157 //-------------------------------------------------------[ Custom ]----- 158 159 # define OPERATION_CUSTOM_L_1 0x40 // 100_0000 160 # define OPERATION_CUSTOM_L_2 0x41 // 100_0001 161 # define OPERATION_CUSTOM_L_3 0x42 // 100_0010 162 # define OPERATION_CUSTOM_L_4 0x43 // 100_0011 163 # define OPERATION_CUSTOM_L_5 0x44 // 100_0100 164 # define OPERATION_CUSTOM_L_6 0x45 // 100_0101 165 # define OPERATION_CUSTOM_L_7 0x46 // 100_0110 166 # define OPERATION_CUSTOM_L_8 0x47 // 100_0111 167 # define OPERATION_CUSTOM_LF_1_D 0x48 // 100_1000 168 # define OPERATION_CUSTOM_LF_1_S 0x49 // 100_1001 169 # define OPERATION_CUSTOM_LV_1 0x4c // 100_1100 170 # define OPERATION_CUSTOM_LV_2 0x4d // 100_1101 171 # define OPERATION_CUSTOM_LV_3 0x4e // 100_1110 172 # define OPERATION_CUSTOM_LV_4 0x4f // 100_1111 173 174 # define MAX_OPERATION 0x80 175 112 176 //====================================================[ Exception ]===== 113 177 // Exception - OpenRISC 114 178 115 #define EXCEPTION_NONE 0x00 // none exception 116 #define EXCEPTION_RESET 0x01 // software or hardware reset 117 #define EXCEPTION_BUS_ERROR 0x02 // Access at a invalid physical adress 118 #define EXCEPTION_DATA_PAGE 0x03 // No matching or page violation protection in pages tables 119 #define EXCEPTION_INSTRUCTION_PAGE 0x04 // No matching or page violation protection in pages tables 120 #define EXCEPTION_TICK_TIMER 0x05 // Tick timer interruption 121 #define EXCEPTION_ALIGNMENT 0x06 // Load/Store access is not aligned 122 #define EXCEPTION_ILLEGAL_INSTRUCTION 0x07 // Instruction is illegal (no implemented) 123 #define EXCEPTION_INTERRUPT 0x08 // External interruption 124 #define EXCEPTION_DATA_TLB 0x09 // DTLB miss 125 #define EXCEPTION_INSTRUCTION_TLB 0x0a // ITLB miss 126 #define EXCEPTION_RANGE 0x0b // Overflow or access at a unimplemented register or context 127 #define EXCEPTION_SYSCALL 0x0c // System Call 128 #define EXCEPTION_FLOATING_POINT 0x0d // Caused by a floating instruction 129 #define EXCEPTION_TRAP 0x0e // L.trap or debug unit 130 #define EXCEPTION_RESERVED_0 0x0f // Reserved for a futur usage 131 #define EXCEPTION_RESERVED_1 0x10 // Reserved for a futur usage 132 #define EXCEPTION_RESERVED_2 0x11 // Reserved for a futur usage 133 #define EXCEPTION_RESERVED_3 0x12 // Reserved for a futur usage 134 #define EXCEPTION_RESERVED_4 0x13 // Reserved for a futur usage 135 #define EXCEPTION_RESERVED_5 0x14 // Reserved for a futur usage 136 #define EXCEPTION_RESERVED_6 0x15 // Reserved for implemented specific exceptions 137 #define EXCEPTION_RESERVED_7 0x16 // Reserved for implemented specific exceptions 138 #define EXCEPTION_RESERVED_8 0x17 // Reserved for implemented specific exceptions 139 #define EXCEPTION_RESERVED_9 0x18 // Reserved for implemented specific exceptions 140 #define EXCEPTION_CUSTOM_0 0x19 // Reserved for custom exceptions 141 #define EXCEPTION_CUSTOM_1 0x1a // Reserved for custom exceptions 142 #define EXCEPTION_CUSTOM_2 0x1b // Reserved for custom exceptions 143 #define EXCEPTION_CUSTOM_3 0x1c // Reserved for custom exceptions 144 #define EXCEPTION_CUSTOM_4 0x1d // Reserved for custom exceptions 145 #define EXCEPTION_CUSTOM_5 0x1e // Reserved for custom exceptions 146 #define EXCEPTION_CUSTOM_6 0x1f // Reserved for custom exceptions 179 # define SIZE_EXCEPTION 5 180 181 # define EXCEPTION_NONE 0x00 // none exception 182 # define EXCEPTION_RESET 0x01 // software or hardware reset 183 # define EXCEPTION_BUS_ERROR 0x02 // Access at a invalid physical adress 184 # define EXCEPTION_DATA_PAGE 0x03 // No matching or page violation protection in pages tables 185 # define EXCEPTION_INSTRUCTION_PAGE 0x04 // No matching or page violation protection in pages tables 186 # define EXCEPTION_TICK_TIMER 0x05 // Tick timer interruption 187 # define EXCEPTION_ALIGNMENT 0x06 // Load/Store access is not aligned 188 # define EXCEPTION_ILLEGAL_INSTRUCTION 0x07 // Instruction is illegal (no implemented) 189 # define EXCEPTION_INTERRUPT 0x08 // External interruption 190 # define EXCEPTION_DATA_TLB 0x09 // DTLB miss 191 # define EXCEPTION_INSTRUCTION_TLB 0x0a // ITLB miss 192 # define EXCEPTION_RANGE 0x0b // Overflow or access at a unimplemented register or context 193 # define EXCEPTION_SYSCALL 0x0c // System Call 194 # define EXCEPTION_FLOATING_POINT 0x0d // Caused by a floating instruction 195 # define EXCEPTION_TRAP 0x0e // L.trap or debug unit 196 # define EXCEPTION_RESERVED_0 0x0f // Reserved for a futur usage 197 # define EXCEPTION_RESERVED_1 0x10 // Reserved for a futur usage 198 # define EXCEPTION_RESERVED_2 0x11 // Reserved for a futur usage 199 # define EXCEPTION_RESERVED_3 0x12 // Reserved for a futur usage 200 # define EXCEPTION_RESERVED_4 0x13 // Reserved for a futur usage 201 # define EXCEPTION_RESERVED_5 0x14 // Reserved for a futur usage 202 # define EXCEPTION_RESERVED_6 0x15 // Reserved for implemented specific exceptions 203 # define EXCEPTION_RESERVED_7 0x16 // Reserved for implemented specific exceptions 204 # define EXCEPTION_RESERVED_8 0x17 // Reserved for implemented specific exceptions 205 # define EXCEPTION_RESERVED_9 0x18 // Reserved for implemented specific exceptions 206 # define EXCEPTION_CUSTOM_0 0x19 // Reserved for custom exceptions 207 # define EXCEPTION_CUSTOM_1 0x1a // Reserved for custom exceptions 208 # define EXCEPTION_CUSTOM_2 0x1b // Reserved for custom exceptions 209 # define EXCEPTION_CUSTOM_3 0x1c // Reserved for custom exceptions 210 # define EXCEPTION_CUSTOM_4 0x1d // Reserved for custom exceptions 211 # define EXCEPTION_CUSTOM_5 0x1e // Reserved for custom exceptions 212 # define EXCEPTION_CUSTOM_6 0x1f // Reserved for custom exceptions 213 214 #define exception_to_address(x) (x<<8) 147 215 148 216 // Exception Execution 149 #define EXCEPTION_MEMORY_NONE 0x0 // Load/Store access is not aligned 150 #define EXCEPTION_MEMORY_ALIGNMENT 0x1 // Load/Store access is not aligned 151 #define EXCEPTION_MEMORY_DATA_TLB 0x2 // DTLB miss 152 #define EXCEPTION_MEMORY_DATA_PAGE 0x3 // No matching or page violation protection in pages tables 153 #define EXCEPTION_MEMORY_BUS_ERROR 0x4 // Access at a invalid physical address 154 #define EXCEPTION_MEMORY_MISS_SPECULATION 0x5 // Load miss speculation 155 #define EXCEPTION_MEMORY_LOAD_SPECULATIVE 0x6 // The load is speculative : write in register file, but don't commit 156 157 //==================================================[ dcache_type ]===== 158 # define DCACHE_LOAD 0x0 // 0000 159 # define DCACHE_LOCK 0x1 // 0001 160 # define DCACHE_INVALIDATE 0x2 // 0010 161 # define DCACHE_PREFETCH 0x3 // 0011 162 //#define DCACHE_ 0x4 // 0100 163 //#define DCACHE_ 0x5 // 0101 164 # define DCACHE_FLUSH 0x6 // 0110 165 # define DCACHE_SYNCHRONIZATION 0x7 // 0111 166 # define DCACHE_STORE_8 0x8 // 1000 167 # define DCACHE_STORE_16 0x9 // 1001 168 # define DCACHE_STORE_32 0xa // 1010 169 # define DCACHE_STORE_64 0xb // 1011 170 //#define DCACHE_ 0xc // 1100 171 //#define DCACHE_ 0xd // 1101 172 //#define DCACHE_ 0xe // 1110 173 //#define DCACHE_ 0xf // 1111 174 217 # define EXCEPTION_MEMORY_NONE 0x0 // Load/Store generate none exception 218 # define EXCEPTION_MEMORY_ALIGNMENT 0x1 // Load/Store access is not aligned 219 # define EXCEPTION_MEMORY_DATA_TLB 0x2 // DTLB miss 220 # define EXCEPTION_MEMORY_DATA_PAGE 0x3 // No matching or page violation protection in pages tables 221 # define EXCEPTION_MEMORY_BUS_ERROR 0x4 // Access at a invalid physical address 222 # define EXCEPTION_MEMORY_MISS_SPECULATION 0x5 // Load miss speculation 223 # define EXCEPTION_MEMORY_LOAD_SPECULATIVE 0x6 // The load is speculative : write in register file, but don't commit 224 225 # define EXCEPTION_CUSTOM_NONE 0x1 // Custom unit generate none exception 226 # define EXCEPTION_CUSTOM_CUST_0 0x1 // Reserved for custom exceptions 227 # define EXCEPTION_CUSTOM_CUST_1 0x2 // Reserved for custom exceptions 228 # define EXCEPTION_CUSTOM_CUST_2 0x3 // Reserved for custom exceptions 229 # define EXCEPTION_CUSTOM_CUST_3 0x4 // Reserved for custom exceptions 230 # define EXCEPTION_CUSTOM_CUST_4 0x5 // Reserved for custom exceptions 231 # define EXCEPTION_CUSTOM_CUST_5 0x6 // Reserved for custom exceptions 232 # define EXCEPTION_CUSTOM_CUST_6 0x7 // Reserved for custom exceptions 233 234 # define EXCEPTION_ALU_NONE 0x0 // Functionnal unit generate none exception 235 # define EXCEPTION_ALU_RANGE 0x1 // 236 # define EXCEPTION_ALU_SPR_ACCESS_INVALID 0x2 // SPR present in ALU but not compatible privilege 237 # define EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE 0x3 // SPR not present in ALU 238 239 //=======================================================[ dcache ]===== 240 241 //--------------------------------------------------[ dcache_type ]----- 242 243 # define SIZE_DCACHE_TYPE 4 244 245 # define DCACHE_TYPE_LOAD 0x0 // 0000 246 # define DCACHE_TYPE_LOCK 0x1 // 0001 247 # define DCACHE_TYPE_INVALIDATE 0x2 // 0010 248 # define DCACHE_TYPE_PREFETCH 0x3 // 0011 249 //#define DCACHE_TYPE_ 0x4 // 0100 250 //#define DCACHE_TYPE_ 0x5 // 0101 251 # define DCACHE_TYPE_FLUSH 0x6 // 0110 252 # define DCACHE_TYPE_SYNCHRONIZATION 0x7 // 0111 253 # define DCACHE_TYPE_STORE_8 0x8 // 1000 254 # define DCACHE_TYPE_STORE_16 0x9 // 1001 255 # define DCACHE_TYPE_STORE_32 0xa // 1010 256 # define DCACHE_TYPE_STORE_64 0xb // 1011 257 //#define DCACHE_TYPE_ 0xc // 1100 258 //#define DCACHE_TYPE_ 0xd // 1101 259 //#define DCACHE_TYPE_ 0xe // 1110 260 //#define DCACHE_TYPE_ 0xf // 1111 175 261 176 262 // just take the 4 less significative bits. 177 263 #define operation_to_dcache_type(x) (x&0xf) 264 265 //-------------------------------------------------[ dcache_error ]----- 266 267 # define SIZE_DCACHE_ERROR 1 268 269 # define DCACHE_ERROR_NONE 0x0 270 # define DCACHE_ERROR_BUS_ERROR 0x1 271 272 //=================================================[ special_data ]===== 273 274 # define SIZE_SPECIAL_DATA 2 275 276 // Position of flag in "rename register SR" (NOT IN "SR") 277 # define FLAG_POSITION_F 0x0 // Conditionnal branch flag 278 # define FLAG_POSITION_CY 0x1 // Carry was produced by last arithmetic operation 279 # define FLAG_POSITION_OV 0x0 // Overflow occured during last arithmetic operation 280 281 # define FLAG_F (1<<FLAG_POSITION_F ) // Conditionnal branch flag 282 # define FLAG_CY (1<<FLAG_POSITION_CY) // Carry was produced by last arithmetic operation 283 # define FLAG_OV (1<<FLAG_POSITION_OV) // Overflow occured during last arithmetic operation 284 285 //==========================================================[ spr ]===== 286 287 enum 288 { 289 GROUP_SYSTEM_AND_CONTROL, // 0 290 GROUP_DMMU, // 1 291 GROUP_IMMU, // 2 292 GROUP_DCACHE, // 3 293 GROUP_ICACHE, // 4 294 GROUP_MAC, // 5 295 GROUP_DEBUG, // 6 296 GROUP_PERFORMANCE_COUNTER, // 7 297 GROUP_POWER_MANAGEMENT, // 8 298 GROUP_PIC, // 9 299 GROUP_TICK_TIMER, // 10 300 GROUP_FLOATING_POINT, // 11 301 GROUP_RESERVED_1, // 12 302 GROUP_RESERVED_2, // 13 303 GROUP_RESERVED_3, // 14 304 GROUP_RESERVED_4, // 15 305 GROUP_RESERVED_5, // 16 306 GROUP_RESERVED_6, // 17 307 GROUP_RESERVED_7, // 18 308 GROUP_RESERVED_8, // 19 309 GROUP_RESERVED_9, // 20 310 GROUP_RESERVED_10, // 21 311 GROUP_RESERVED_11, // 22 312 GROUP_RESERVED_12, // 23 313 GROUP_CUSTOM_1, // 24 314 GROUP_CUSTOM_2, // 25 315 GROUP_CUSTOM_3, // 26 316 GROUP_CUSTOM_4, // 27 317 GROUP_CUSTOM_5, // 28 318 GROUP_CUSTOM_6, // 29 319 GROUP_CUSTOM_7, // 30 320 GROUP_CUSTOM_8 // 31 321 }; 322 323 # define NB_GROUP 32 324 # define NB_REG_GROUP_SYSTEM_AND_CONTROL 1536 325 # define NB_REG_GROUP_DMMU 1536 326 # define NB_REG_GROUP_IMMU 1536 327 # define NB_REG_GROUP_DCACHE 6 328 # define NB_REG_GROUP_ICACHE 4 329 # define NB_REG_GROUP_MAC 3 330 # define NB_REG_GROUP_DEBUG 22 331 # define NB_REG_GROUP_PERFORMANCE_COUNTER 16 332 # define NB_REG_GROUP_POWER_MANAGEMENT 1 333 # define NB_REG_GROUP_PIC 3 334 # define NB_REG_GROUP_TICK_TIMER 2 335 # define NB_REG_GROUP_FLOATING_POINT 0 336 # define NB_REG_GROUP_RESERVED_1 0 337 # define NB_REG_GROUP_RESERVED_2 0 338 # define NB_REG_GROUP_RESERVED_3 0 339 # define NB_REG_GROUP_RESERVED_4 0 340 # define NB_REG_GROUP_RESERVED_5 0 341 # define NB_REG_GROUP_RESERVED_6 0 342 # define NB_REG_GROUP_RESERVED_7 0 343 # define NB_REG_GROUP_RESERVED_8 0 344 # define NB_REG_GROUP_RESERVED_9 0 345 # define NB_REG_GROUP_RESERVED_10 0 346 # define NB_REG_GROUP_RESERVED_11 0 347 # define NB_REG_GROUP_RESERVED_12 0 348 # define NB_REG_GROUP_CUSTOM_1 0 349 # define NB_REG_GROUP_CUSTOM_2 0 350 # define NB_REG_GROUP_CUSTOM_3 0 351 # define NB_REG_GROUP_CUSTOM_4 0 352 # define NB_REG_GROUP_CUSTOM_5 0 353 # define NB_REG_GROUP_CUSTOM_6 0 354 # define NB_REG_GROUP_CUSTOM_7 0 355 # define NB_REG_GROUP_CUSTOM_8 0 356 357 358 // GROUP_MAC 359 # define SPR_MACLO 1 // MAC Low 360 # define SPR_MACHI 2 // MAC High 361 362 //----------------------------------------------[ spr_mode_access ]----- 363 364 # define SPR_ACCESS_MODE_NONE 0x0 // 000 365 # define SPR_ACCESS_MODE_READ_ONLY 0x1 // 001 366 # define SPR_ACCESS_MODE_WRITE_ONLY 0x2 // 010 367 # define SPR_ACCESS_MODE_READ_WRITE 0x3 // 011 368 # define SPR_ACCESS_MODE_READ_ONLY_COND 0x5 // 101 special read 178 369 179 370 /* -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r71 r72 21 21 #define DEBUG_Multi_Execute_unit false 22 22 #define DEBUG_Execute_unit false 23 #define DEBUG_Load_store_unit true 23 #define DEBUG_Functionnal_unit true 24 #define DEBUG_Load_store_unit false 24 25 #define DEBUG_Multi_Read_unit false 25 26 #define DEBUG_Read_unit false -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h
r71 r72 13 13 #include <math.h> 14 14 #include "Behavioural/include/Environnement.h" 15 #include "Behavioural/include/Constants.h" 15 16 #include "Common/include/ErrorMorpheo.h" 16 17 #include "Common/include/ToString.h" … … 25 26 { 26 27 // -----[ fields ]---------------------------------------------------- 27 public : static const uint32_t _size_exception = 4 ; 28 public : static const uint32_t _size_dcache_address = 32; 29 public : static const uint32_t _size_dcache_type = 4; 30 public : static const uint32_t _size_dcache_error = 1; 28 public : static const uint32_t _size_exception = SIZE_EXCEPTION; 29 public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; 30 public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; 31 31 32 32 // -----[ methods ]--------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h
r66 r72 42 42 typedef uint32_t Tdcache_type_t; 43 43 44 //----------------------------------------------[ spr_mode_access ]----- 45 class spr_access_mode_t 46 { 47 public : uint8_t _user_access_mode ; 48 public : uint8_t _supervisor_access_mode; 49 50 public : spr_access_mode_t (uint32_t user_access_mode = SPR_ACCESS_MODE_NONE, 51 uint32_t supervisor_access_mode = SPR_ACCESS_MODE_NONE) 52 { 53 _user_access_mode = user_access_mode ; 54 _supervisor_access_mode = supervisor_access_mode; 55 } 56 }; 57 58 44 59 }; // end namespace behavioural 45 60 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Common/include/BitManipulation.h
r71 r72 189 189 T range (T data, uint32_t index_max, uint32_t index_min) 190 190 { 191 return gen_mask<T>(index_max-index_min+1) & (data <<index_min);191 return (mask<T>(data,index_max,index_min) >> index_min); 192 192 } 193 193
Note: See TracChangeset
for help on using the changeset viewer.