Changeset 72 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src
- Timestamp:
- Jan 29, 2008, 1:34:47 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
r71 r72 114 114 // out_MEMORY_OUT_DATA_RE = interface->set_signal_out <Tspecial_data_t > ("data_re" ,_param->_size_general_data ); 115 115 out_MEMORY_OUT_EXCEPTION = interface->set_signal_out <Texception_t > ("exception" ,_param->_size_exception ); 116 117 116 } 118 117 … … 132 131 out_DCACHE_REQ_CONTEXT_ID = interface->set_signal_out <Tcontext_t > ("context_id",_param->_size_dcache_context_id ); 133 132 out_DCACHE_REQ_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_dcache_packet_id ); 134 out_DCACHE_REQ_ADDRESS = interface->set_signal_out <Tdcache_address_t > ("address" ,_param->_size_ dcache_address);133 out_DCACHE_REQ_ADDRESS = interface->set_signal_out <Tdcache_address_t > ("address" ,_param->_size_general_data); 135 134 out_DCACHE_REQ_TYPE = interface->set_signal_out <Tdcache_type_t > ("type" ,_param->_size_dcache_type ); 136 135 out_DCACHE_REQ_WDATA = interface->set_signal_out <Tdcache_data_t > ("wdata" ,_param->_size_general_data); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r71 r72 620 620 621 621 622 if (error != 0)622 if (error != DCACHE_ERROR_NONE) 623 623 { 624 624 log_printf(TRACE,Load_store_unit,FUNCTION," * have a bus error !!!");
Note: See TracChangeset
for help on using the changeset viewer.