Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/Makefile.deps	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/Makefile.deps	(revision 74)
@@ -34,10 +34,10 @@
 #-----[ Rules ]--------------------------------------------
 
-.NOTPARALLEL			: Read_queue_library Read_queue_library_clean
+#.NOTPARALLEL			: Read_queue_library Read_queue_library_clean
 
 Read_queue_library		: $(Read_queue_DEPENDENCIES)
 				@\
 				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue --makefile=Makefile;
-	
+
 Read_queue_library_clean	: $(Read_queue_CLEAN)
 				@\
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/Makefile.deps	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/Makefile.deps	(revision 74)
@@ -14,24 +14,27 @@
 endif
 
+#-----[ Directory ]----------------------------------------
+
+Execute_queue_DIR		=	$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue
+
 #-----[ Library ]------------------------------------------
 Execute_queue_LIBRARY		= 	-lExecute_queue	\
 					$(Behavioural_LIBRARY)	
 
-Execute_queue_DIR_LIBRARY		=	-L$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/lib	\
+Execute_queue_DIR_LIBRARY	=	-L$(Execute_queue_DIR)/lib	\
 					$(Behavioural_DIR_LIBRARY)
 
-Execute_queue_DEPENDENCIES		=	Behavioural_library
+Execute_queue_DEPENDENCIES	=	Behavioural_library
 
 Execute_queue_CLEAN        	=	Behavioural_library_clean
 
 #-----[ Rules ]--------------------------------------------
-
-.NOTPARALLEL			: Execute_queue_library Execute_queue_library_clean
+#.NOTPARALLEL			: Execute_queue_library Execute_queue_library_clean
 
 Execute_queue_library		: $(Execute_queue_DEPENDENCIES)
 				@\
-				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue --makefile=Makefile;
+				$(MAKE) --directory=$(Execute_queue_DIR) --makefile=Makefile;
 
 Execute_queue_library_clean	: $(Execute_queue_CLEAN)
 				@\
-				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue --makefile=Makefile clean;
+				$(MAKE) --directory=$(Execute_queue_DIR) --makefile=Makefile clean;
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h	(revision 74)
@@ -90,5 +90,5 @@
 
 #ifdef STATISTICS
-  private   : Stat                           * _stat;
+  public    : Stat                           * _stat;
 
   private   : counter_t                      * _stat_use_queue;
@@ -172,5 +172,4 @@
 #ifdef STATISTICS
   public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
-  public  : std::string statistics_print          (uint32_t depth);
 #endif
 					       
Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_statistics_print.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_statistics_print.cpp	(revision 73)
+++ 	(revision )
@@ -1,43 +1,0 @@
-#ifdef STATISTICS
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_write_unit {
-namespace write_unit {
-namespace execute_queue {
-
-
-#undef  FUNCTION
-#define FUNCTION "Execute_queue::statistics_print"
-  std::string Execute_queue::statistics_print (uint32_t depth)
-  {
-    log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
-
-    std::string txt = _stat->print(depth);
-    
-    log_printf(FUNC,Execute_queue,FUNCTION,"End");
-
-    return txt;
-  };
-
-}; // end namespace execute_queue
-}; // end namespace write_unit
-}; // end namespace multi_write_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp	(revision 74)
@@ -59,25 +59,25 @@
 #define FUNCTION "Execute_queue::Parameters (copy)"
   Parameters::Parameters (Parameters & param):
-    _size_queue              (_size_queue             ),
-    _nb_context              (_nb_context             ),
-    _nb_front_end            (_nb_front_end           ),
-    _nb_ooo_engine           (_nb_ooo_engine          ),
-    _nb_packet               (_nb_packet              ),
-    _size_general_data       (_size_general_data      ),
-    _size_special_data       (_size_special_data      ),
-    _nb_operation            (_nb_operation           ),
-    _nb_type                 (_nb_type                ),
+    _size_queue              (param._size_queue             ),
+    _nb_context              (param._nb_context             ),
+    _nb_front_end            (param._nb_front_end           ),
+    _nb_ooo_engine           (param._nb_ooo_engine          ),
+    _nb_packet               (param._nb_packet              ),
+    _size_general_data       (param._size_general_data      ),
+    _size_special_data       (param._size_special_data      ),
+    _nb_operation            (param._nb_operation           ),
+    _nb_type                 (param._nb_type                ),
 
-    _size_context_id         (_size_context_id        ),
-    _size_front_end_id       (_size_front_end_id      ),
-    _size_ooo_engine_id      (_size_ooo_engine_id     ),
-    _size_packet_id          (_size_packet_id         ),
-    _size_operation          (_size_operation         ),
-    _size_type               (_size_type              ),
+    _size_context_id         (param._size_context_id        ),
+    _size_front_end_id       (param._size_front_end_id      ),
+    _size_ooo_engine_id      (param._size_ooo_engine_id     ),
+    _size_packet_id          (param._size_packet_id         ),
+    _size_operation          (param._size_operation         ),
+    _size_type               (param._size_type              ),
 
-    _have_port_context_id    (_have_port_context_id   ),
-    _have_port_front_end_id  (_have_port_front_end_id ),
-    _have_port_ooo_engine_id (_have_port_ooo_engine_id),
-    _have_port_packet_id     (_have_port_packet_id    )
+    _have_port_context_id    (param._have_port_context_id   ),
+    _have_port_front_end_id  (param._have_port_front_end_id ),
+    _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
+    _have_port_packet_id     (param._have_port_packet_id    )
   {
     log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile	(revision 74)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libWrite_unit.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.defs
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.defs	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.defs	(revision 74)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.deps	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.deps	(revision 74)
@@ -0,0 +1,55 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Write_unit			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Write_queue
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps
+endif
+ifndef Execute_queue
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Write_unit_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit
+
+#-----[ Library ]------------------------------------------
+Write_unit_LIBRARY		= 	-lWrite_unit		\
+					$(Behavioural_LIBRARY)	\
+					$(Write_queue_LIBRARY)	\
+					$(Execute_queue_LIBRARY)
+
+Write_unit_DIR_LIBRARY		=	-L$(Write_unit_DIR)/lib		\
+					$(Behavioural_DIR_LIBRARY)	\
+					$(Write_queue_DIR_LIBRARY)	\
+					$(Execute_queue_DIR_LIBRARY)
+
+Write_unit_DEPENDENCIES		=	Behavioural_library		\
+					Write_queue_library		\
+					Execute_queue_library
+
+Write_unit_CLEAN        	=	Behavioural_library_clean	\
+					Write_queue_library_clean	\
+					Execute_queue_library_clean
+
+#-----[ Rules ]--------------------------------------------
+
+#.NOTPARALLEL			: Write_unit_library Write_unit_library_clean
+
+Write_unit_library		: $(Write_unit_DEPENDENCIES)
+				@\
+				$(MAKE) --directory=$(Write_unit_DIR) --makefile=Makefile;
+
+Write_unit_library_clean	: $(Write_unit_CLEAN)
+				@\
+				$(MAKE) --directory=$(Write_unit_DIR) --makefile=Makefile clean;
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/Makefile
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/Makefile	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/Makefile	(revision 74)
@@ -0,0 +1,30 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Write_unit_LIBRARY)
+
+DIR_LIBRARY			= $(Write_unit_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Write_unit_library
+
+library_clean			: Write_unit_library_clean
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg	(revision 74)
@@ -0,0 +1,14 @@
+Write_unit
+8	8	*2 # uint32_t size_write_queue         
+4	4	*2 # uint32_t size_execute_queue         
+1	1	*2 # uint32_t nb_context         
+1	1	*2 # uint32_t nb_front_end       
+1	4	*4 # uint32_t nb_ooo_engine      
+32	32	*2 # uint32_t nb_packet          
+32	32	*2 # uint32_t size_general_data  
+64	64	*2 # uint32_t nb_general_register
+2	2	*2 # uint32_t size_special_data  
+16	16	*2 # uint32_t nb_special_register
+10	10	*2 # uint32_t nb_operation       
+4	4	*2 # uint32_t nb_type            
+1	8	*2 # uint32_t nb_bypass_write  
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg	(revision 74)
@@ -0,0 +1,14 @@
+Write_unit
+8	8	*2 # uint32_t size_write_queue         
+0	0	*2 # uint32_t size_execute_queue         
+1	1	*2 # uint32_t nb_context         
+1	1	*2 # uint32_t nb_front_end       
+1	4	*4 # uint32_t nb_ooo_engine      
+32	32	*2 # uint32_t nb_packet          
+32	32	*2 # uint32_t size_general_data  
+64	64	*2 # uint32_t nb_general_register
+2	2	*2 # uint32_t size_special_data  
+16	16	*2 # uint32_t nb_special_register
+10	10	*2 # uint32_t nb_operation       
+4	4	*2 # uint32_t nb_type            
+8	8	*2 # uint32_t nb_bypass_write  
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/test.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/test.h	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/test.h	(revision 74)
@@ -0,0 +1,31 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include <string>
+#include <iostream>
+#include <sys/time.h>
+
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_execute_loop;
+using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop;
+using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit;
+
+using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * param);
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp	(revision 74)
@@ -0,0 +1,93 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/test.h"
+
+#define NB_PARAMS 13
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * size_write_queue    (uint32_t)\n"));
+  err (_(" * size_execute_queue  (uint32_t)\n"));
+  err (_(" * nb_context          (uint32_t)\n"));
+  err (_(" * nb_front_end        (uint32_t)\n"));
+  err (_(" * nb_ooo_engine       (uint32_t)\n"));
+  err (_(" * nb_packet           (uint32_t)\n"));
+  err (_(" * size_general_data   (uint32_t)\n"));
+  err (_(" * nb_general_register (uint32_t)\n"));
+  err (_(" * size_special_data   (uint32_t)\n"));
+  err (_(" * nb_special_register (uint32_t)\n"));
+  err (_(" * nb_operation        (uint32_t)\n"));
+  err (_(" * nb_type             (uint32_t)\n"));
+  err (_(" * nb_bypass_write     (uint32_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc != 2+NB_PARAMS)
+    usage (argc, argv);
+
+  uint32_t       x = 1;
+
+  const string   name                =      argv[x++];
+  const uint32_t size_write_queue    = atoi(argv[x++]);
+  const uint32_t size_execute_queue  = atoi(argv[x++]);
+  const uint32_t nb_context          = atoi(argv[x++]);
+  const uint32_t nb_front_end        = atoi(argv[x++]);
+  const uint32_t nb_ooo_engine       = atoi(argv[x++]);
+  const uint32_t nb_packet           = atoi(argv[x++]);
+  const uint32_t size_general_data   = atoi(argv[x++]);
+  const uint32_t nb_general_register = atoi(argv[x++]);
+  const uint32_t size_special_data   = atoi(argv[x++]);
+  const uint32_t nb_special_register = atoi(argv[x++]);
+  const uint32_t nb_operation        = atoi(argv[x++]);
+  const uint32_t nb_type             = atoi(argv[x++]);
+  const uint32_t nb_bypass_write     = atoi(argv[x++]);
+
+  try 
+    {
+      morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters
+	(size_write_queue   ,
+	 size_execute_queue ,
+	 nb_context         ,
+	 nb_front_end       ,
+	 nb_ooo_engine      ,
+	 nb_packet          ,
+	 size_general_data  ,
+	 nb_general_register,
+	 size_special_data  ,
+	 nb_special_register,
+	 nb_operation       ,
+	 nb_type            ,
+	 nb_bypass_write    );
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> : %s.\n"),name.c_str(), error.what ());
+      exit (EXIT_FAILURE);
+    }
+  catch (...)
+    {
+      err (_("<%s> : This test must generate a error.\n"),name.c_str());
+      exit (EXIT_FAILURE);
+    }
+
+  return (EXIT_SUCCESS);
+}
+
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/test.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/test.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/test.cpp	(revision 74)
@@ -0,0 +1,537 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/test.h"
+#include "Common/include/Test.h"
+#include "Common/include/BitManipulation.h"
+#include "Behavioural/include/Allocation.h"
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (128*NB_ITERATION)
+
+#define LABEL(str...)							\
+  {									\
+    msg (_("{%d} "),static_cast<uint32_t>(sc_simulation_time()));	\
+    msg (str);								\
+    msg (_("\n"));							\
+  } while(0)
+
+#define SC_START(cycle_offset)                                                       \
+  do									             \
+    {									             \
+      /*cout << "SC_START (begin)" << endl;*/				             \
+									             \
+      uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time());          \
+      if (cycle_offset != 0)						             \
+	{								             \
+	  cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \
+	}								             \
+									             \
+      if (cycle_current > CYCLE_MAX)					             \
+	{								             \
+	  TEST_KO("Maximal cycles Reached");				             \
+	}								             \
+									             \
+      sc_start(cycle_offset);						             \
+									             \
+      /*cout << "SC_START (end  )" << endl;*/				             \
+    } while(0)
+
+  class entry_t
+  {
+  public  : Tcontext_t         _context_id   ;
+  public  : Tcontext_t         _front_end_id ;
+  public  : Tcontext_t         _ooo_engine_id;
+  public  : Tpacket_t          _packet_id    ;
+//public  : Toperation_t       _operation    ;
+//public  : Ttype_t            _type         ;
+  public  : Tcontrol_t         _write_rd     ;
+  public  : Tgeneral_address_t _num_reg_rd   ;
+  public  : Tgeneral_data_t    _data_rd      ;
+  public  : Tcontrol_t         _write_re     ;
+  public  : Tspecial_address_t _num_reg_re   ;
+  public  : Tspecial_data_t    _data_re      ;
+  public  : Texception_t       _exception    ;
+  public  : Tcontrol_t         _no_sequence  ;
+  public  : Tgeneral_data_t    _address      ;
+    
+  public  : entry_t (Tcontext_t         context_id   ,
+		     Tcontext_t         front_end_id ,
+		     Tcontext_t         ooo_engine_id,
+		     Tpacket_t          packet_id    ,
+		     //Toperation_t       operation    ,
+		     //Ttype_t            type         ,
+		     Tcontrol_t         write_rd     ,
+		     Tgeneral_address_t num_reg_rd   ,
+		     Tgeneral_data_t    data_rd      ,
+		     Tcontrol_t         write_re     ,
+		     Tspecial_address_t num_reg_re   ,
+		     Tspecial_data_t    data_re      ,
+		     Texception_t       exception    ,
+		     Tcontrol_t         no_sequence  ,
+		     Tgeneral_data_t    address      )
+    {
+      _context_id    = context_id   ;
+      _front_end_id  = front_end_id ;
+      _ooo_engine_id = ooo_engine_id;
+      _packet_id     = packet_id    ;
+    //_operation     = operation    ;
+    //_type          = type         ;
+      _write_rd      = write_rd     ;
+      _num_reg_rd    = num_reg_rd   ;
+      _data_rd       = data_rd      ;
+      _write_re      = write_re     ;
+      _num_reg_re    = num_reg_re   ;
+      _data_re       = data_re      ;
+      _exception     = exception    ;
+      _no_sequence   = no_sequence  ;
+      _address       = address      ;
+    };
+
+    friend std::ostream& operator<< (std::ostream& output_stream,
+				     entry_t & x)
+    {
+      output_stream << " * _context_id    : " << toString(x._context_id   ) << std::endl
+		    << " * _front_end_id  : " << toString(x._front_end_id ) << std::endl
+		    << " * _ooo_engine_id : " << toString(x._ooo_engine_id) << std::endl
+		    << " * _packet_id     : " << toString(x._packet_id    ) << std::endl
+		  //<< " * _operation     : " << toString(x._operation    ) << std::endl
+		  //<< " * _type          : " << toString(x._type         ) << std::endl
+		    << " * _write_rd      : " << toString(x._write_rd     ) << std::endl
+		    << " * _num_reg_rd    : " << toString(x._num_reg_rd   ) << std::endl
+		    << " * _data_rd       : " << toString(x._data_rd      ) << std::endl
+		    << " * _write_re      : " << toString(x._write_re     ) << std::endl
+		    << " * _num_reg_re    : " << toString(x._num_reg_re   ) << std::endl
+		    << " * _data_re       : " << toString(x._data_re      ) << std::endl
+		    << " * _exception     : " << toString(x._exception    ) << std::endl
+		    << " * _no_sequence   : " << toString(x._no_sequence  ) << std::endl
+		    << " * _address       : " << toString(x._address      ) << std::endl;
+
+      return output_stream;
+    }
+  };
+
+
+void test (string name,
+	   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
+#endif
+
+  Write_unit * _Write_unit = new Write_unit (name.c_str(),
+#ifdef STATISTICS
+					     _parameters_statistics,
+#endif
+					     _param);
+  
+#ifdef SYSTEMC
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_VAL           ," in_WRITE_UNIT_IN_VAL"           , Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_IN_ACK           ,"out_WRITE_UNIT_IN_ACK"           , Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_CONTEXT_ID    ," in_WRITE_UNIT_IN_CONTEXT_ID"    , Tcontext_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_FRONT_END_ID  ," in_WRITE_UNIT_IN_FRONT_END_ID"  , Tcontext_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_OOO_ENGINE_ID ," in_WRITE_UNIT_IN_OOO_ENGINE_ID" , Tcontext_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_PACKET_ID     ," in_WRITE_UNIT_IN_PACKET_ID"     , Tpacket_t         );
+//ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_OPERATION     ," in_WRITE_UNIT_IN_OPERATION"     , Toperation_t      );
+//ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_TYPE          ," in_WRITE_UNIT_IN_TYPE"          , Ttype_t           );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_WRITE_RD      ," in_WRITE_UNIT_IN_WRITE_RD"      , Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_NUM_REG_RD    ," in_WRITE_UNIT_IN_NUM_REG_RD"    , Tgeneral_address_t);
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_DATA_RD       ," in_WRITE_UNIT_IN_DATA_RD"       , Tgeneral_data_t   );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_WRITE_RE      ," in_WRITE_UNIT_IN_WRITE_RE"      , Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_NUM_REG_RE    ," in_WRITE_UNIT_IN_NUM_REG_RE"    , Tspecial_address_t);
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_DATA_RE       ," in_WRITE_UNIT_IN_DATA_RE"       , Tspecial_data_t   );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_EXCEPTION     ," in_WRITE_UNIT_IN_EXCEPTION"     , Texception_t      );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_NO_SEQUENCE   ," in_WRITE_UNIT_IN_NO_SEQUENCE"   , Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_IN_ADDRESS       ," in_WRITE_UNIT_IN_ADDRESS"       , Tgeneral_data_t   );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_VAL          ,"out_WRITE_UNIT_OUT_VAL"          , Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_WRITE_UNIT_OUT_ACK          ," in_WRITE_UNIT_OUT_ACK"          , Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_CONTEXT_ID   ,"out_WRITE_UNIT_OUT_CONTEXT_ID"   , Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_FRONT_END_ID ,"out_WRITE_UNIT_OUT_FRONT_END_ID" , Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_OOO_ENGINE_ID,"out_WRITE_UNIT_OUT_OOO_ENGINE_ID", Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_PACKET_ID    ,"out_WRITE_UNIT_OUT_PACKET_ID"    , Tpacket_t         );
+//ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_OPERATION    ,"out_WRITE_UNIT_OUT_OPERATION"    , Toperation_t      );
+//ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_TYPE         ,"out_WRITE_UNIT_OUT_TYPE"         , Ttype_t           );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_FLAGS        ,"out_WRITE_UNIT_OUT_FLAGS"        , Tspecial_data_t   );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_EXCEPTION    ,"out_WRITE_UNIT_OUT_EXCEPTION"    , Texception_t      );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_NO_SEQUENCE  ,"out_WRITE_UNIT_OUT_NO_SEQUENCE"  , Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_WRITE_UNIT_OUT_ADDRESS      ,"out_WRITE_UNIT_OUT_ADDRESS"      , Tgeneral_data_t   );
+  ALLOC1_SC_SIGNAL(out_GPR_WRITE_VAL                ,"out_GPR_WRITE_VAL"                , Tcontrol_t        , _param->_nb_gpr_write);
+  ALLOC1_SC_SIGNAL( in_GPR_WRITE_ACK                ," in_GPR_WRITE_ACK"                , Tcontrol_t        , _param->_nb_gpr_write);
+  ALLOC1_SC_SIGNAL(out_GPR_WRITE_OOO_ENGINE_ID      ,"out_GPR_WRITE_OOO_ENGINE_ID"      , Tcontext_t        , _param->_nb_gpr_write);
+  ALLOC1_SC_SIGNAL(out_GPR_WRITE_NUM_REG            ,"out_GPR_WRITE_NUM_REG"            , Tgeneral_address_t, _param->_nb_gpr_write);
+  ALLOC1_SC_SIGNAL(out_GPR_WRITE_DATA               ,"out_GPR_WRITE_DATA"               , Tgeneral_data_t   , _param->_nb_gpr_write);
+  ALLOC1_SC_SIGNAL(out_SPR_WRITE_VAL                ,"out_SPR_WRITE_VAL"                , Tcontrol_t        , _param->_nb_spr_write);
+  ALLOC1_SC_SIGNAL( in_SPR_WRITE_ACK                ," in_SPR_WRITE_ACK"                , Tcontrol_t        , _param->_nb_spr_write);
+  ALLOC1_SC_SIGNAL(out_SPR_WRITE_OOO_ENGINE_ID      ,"out_SPR_WRITE_OOO_ENGINE_ID"      , Tcontext_t        , _param->_nb_spr_write);
+  ALLOC1_SC_SIGNAL(out_SPR_WRITE_NUM_REG            ,"out_SPR_WRITE_NUM_REG"            , Tspecial_address_t, _param->_nb_spr_write);
+  ALLOC1_SC_SIGNAL(out_SPR_WRITE_DATA               ,"out_SPR_WRITE_DATA"               , Tspecial_data_t   , _param->_nb_spr_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_OOO_ENGINE_ID   ,"out_BYPASS_WRITE_OOO_ENGINE_ID"   , Tcontext_t        , _param->_nb_bypass_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_GPR_VAL         ,"out_BYPASS_WRITE_GPR_VAL"         , Tcontrol_t        , _param->_nb_bypass_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_GPR_NUM_REG     ,"out_BYPASS_WRITE_GPR_NUM_REG"     , Tgeneral_address_t, _param->_nb_bypass_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_GPR_DATA        ,"out_BYPASS_WRITE_GPR_DATA"        , Tgeneral_data_t   , _param->_nb_bypass_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_SPR_VAL         ,"out_BYPASS_WRITE_SPR_VAL"         , Tcontrol_t        , _param->_nb_bypass_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_SPR_NUM_REG     ,"out_BYPASS_WRITE_SPR_NUM_REG"     , Tspecial_address_t, _param->_nb_bypass_write);
+  ALLOC1_SC_SIGNAL(out_BYPASS_WRITE_SPR_DATA        ,"out_BYPASS_WRITE_SPR_DATA"        , Tspecial_data_t   , _param->_nb_bypass_write);
+  
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Write_unit.\n"),name.c_str());
+
+  (*(_Write_unit->in_CLOCK))        (*(in_CLOCK));
+  (*(_Write_unit->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_VAL           );
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_IN_ACK           );
+  if (_param->_have_port_context_id)
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_CONTEXT_ID    );
+  if (_param->_have_port_front_end_id)
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_FRONT_END_ID  );
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_OOO_ENGINE_ID );
+  if (_param->_have_port_packet_id)
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_PACKET_ID     );
+//INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_OPERATION     );
+//INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_TYPE          );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_WRITE_RD      );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_NUM_REG_RD    );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_DATA_RD       );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_WRITE_RE      );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_NUM_REG_RE    );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_DATA_RE       );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_EXCEPTION     );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_NO_SEQUENCE   );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_IN_ADDRESS       );
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_VAL          );
+  INSTANCE_SC_SIGNAL (_Write_unit,  in_WRITE_UNIT_OUT_ACK          );
+  if (_param->_have_port_context_id)
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_CONTEXT_ID   );
+  if (_param->_have_port_front_end_id)
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_FRONT_END_ID );
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_OOO_ENGINE_ID);
+  if (_param->_have_port_packet_id)
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_PACKET_ID    );
+//INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_OPERATION    );
+//INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_TYPE         );
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_FLAGS        );
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_EXCEPTION    );
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_NO_SEQUENCE  );
+  INSTANCE_SC_SIGNAL (_Write_unit, out_WRITE_UNIT_OUT_ADDRESS      );
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_GPR_WRITE_VAL                , _param->_nb_gpr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit,  in_GPR_WRITE_ACK                , _param->_nb_gpr_write);
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_GPR_WRITE_OOO_ENGINE_ID      , _param->_nb_gpr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_GPR_WRITE_NUM_REG            , _param->_nb_gpr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_GPR_WRITE_DATA               , _param->_nb_gpr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_SPR_WRITE_VAL                , _param->_nb_spr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit,  in_SPR_WRITE_ACK                , _param->_nb_spr_write);
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_SPR_WRITE_OOO_ENGINE_ID      , _param->_nb_spr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_SPR_WRITE_NUM_REG            , _param->_nb_spr_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_SPR_WRITE_DATA               , _param->_nb_spr_write);
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_OOO_ENGINE_ID   , _param->_nb_bypass_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_GPR_VAL         , _param->_nb_bypass_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_GPR_NUM_REG     , _param->_nb_bypass_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_GPR_DATA        , _param->_nb_bypass_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_SPR_VAL         , _param->_nb_bypass_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_SPR_NUM_REG     , _param->_nb_bypass_write);
+  INSTANCE1_SC_SIGNAL(_Write_unit, out_BYPASS_WRITE_SPR_DATA        , _param->_nb_bypass_write);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+  
+  const  int32_t percent_transaction_write_unit_in  = 75;
+  const  int32_t percent_transaction_write_unit_out = 75;
+  const  int32_t percent_transaction_gpr             = 75;
+  const  int32_t percent_transaction_spr             = 75;
+
+  bool            gpr_val [_param->_nb_ooo_engine][_param->_nb_general_register];
+  bool            gpr_use [_param->_nb_ooo_engine][_param->_nb_general_register];
+  Tgeneral_data_t gpr     [_param->_nb_ooo_engine][_param->_nb_general_register];
+  bool            spr_val [_param->_nb_ooo_engine][_param->_nb_special_register];
+  bool            spr_use [_param->_nb_ooo_engine][_param->_nb_special_register];
+  Tgeneral_data_t spr     [_param->_nb_ooo_engine][_param->_nb_special_register];
+
+  entry_t *       request [_param->_nb_packet];
+  
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
+	{
+	  for (uint32_t j=0; j<_param->_nb_general_register; j++)
+	    {
+	      gpr_val [i][j] = 0;
+	      gpr_use [i][j] = 0;
+	      gpr     [i][j] = rand();
+	    }
+	  for (uint32_t j=0; j<_param->_nb_special_register; j++)
+	    {
+	      spr_val [i][j] = 0;
+	      spr_use [i][j] = 0;
+	      spr     [i][j] = rand();
+	    }
+	}
+
+      for (uint32_t i=0; i<_param->_nb_packet; i++)
+	{
+	  request [i] = new entry_t (range<Tcontext_t        >(rand(),_param->_size_context_id      ),
+				     range<Tcontext_t        >(rand(),_param->_size_front_end_id    ),
+				     range<Tcontext_t        >(rand(),_param->_size_ooo_engine_id   ),
+				     i,
+				   //range<Toperation_t      >(rand(),_param->_size_operation       ),
+				   //range<Ttype_t           >(rand(),_param->_size_type            ),
+				     range<Tcontrol_t        >(rand(),1                             ),
+				     range<Tgeneral_address_t>(rand(),_param->_size_general_register),
+				     range<Tgeneral_data_t   >(rand(),_param->_size_general_data    ),
+				     range<Tcontrol_t        >(rand(),1                             ),
+				     range<Tspecial_address_t>(rand(),_param->_size_special_register),
+				     range<Tspecial_data_t   >(rand(),_param->_size_special_data    ),
+				     range<Texception_t      >(rand(),_param->_size_exception       ),
+				     range<Tcontrol_t        >(rand(),1                             ),
+				     range<Tgeneral_data_t   >(rand(),_param->_size_general_data    ));
+	}
+
+      uint32_t nb_request_in  = 0;
+      uint32_t nb_request_out = 0;
+
+      while (nb_request_out < _param->_nb_packet)
+      {
+	bool val = (((rand()%100)<percent_transaction_write_unit_in) and
+		    (nb_request_in < _param->_nb_packet) and
+		    not (request [nb_request_in]->_write_rd and 
+			 gpr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd]) and
+		    not (request [nb_request_in]->_write_re and 
+			 spr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re]));
+	
+	in_WRITE_UNIT_IN_VAL          ->write(val);
+	if (val)
+	  {
+	    in_WRITE_UNIT_IN_CONTEXT_ID   ->write(request [nb_request_in]->_context_id   );
+	    in_WRITE_UNIT_IN_FRONT_END_ID ->write(request [nb_request_in]->_front_end_id );
+	    in_WRITE_UNIT_IN_OOO_ENGINE_ID->write(request [nb_request_in]->_ooo_engine_id);
+	    in_WRITE_UNIT_IN_PACKET_ID    ->write(request [nb_request_in]->_packet_id    );
+	  //in_WRITE_UNIT_IN_OPERATION    ->write(request [nb_request_in]->_operation    );
+	  //in_WRITE_UNIT_IN_TYPE         ->write(request [nb_request_in]->_type         );
+	    in_WRITE_UNIT_IN_WRITE_RD     ->write(request [nb_request_in]->_write_rd     );
+	    in_WRITE_UNIT_IN_NUM_REG_RD   ->write(request [nb_request_in]->_num_reg_rd   );
+	    in_WRITE_UNIT_IN_DATA_RD      ->write(request [nb_request_in]->_data_rd      );
+	    in_WRITE_UNIT_IN_WRITE_RE     ->write(request [nb_request_in]->_write_re     );
+	    in_WRITE_UNIT_IN_NUM_REG_RE   ->write(request [nb_request_in]->_num_reg_re   );
+	    in_WRITE_UNIT_IN_DATA_RE      ->write(request [nb_request_in]->_data_re      );
+	    in_WRITE_UNIT_IN_EXCEPTION    ->write(request [nb_request_in]->_exception    );
+	    in_WRITE_UNIT_IN_NO_SEQUENCE  ->write(request [nb_request_in]->_no_sequence  );
+	    in_WRITE_UNIT_IN_ADDRESS      ->write(request [nb_request_in]->_address      );
+	  }
+	in_WRITE_UNIT_OUT_ACK         ->write((rand()%100)<percent_transaction_write_unit_out);
+	in_GPR_WRITE_ACK [0]           ->write((rand()%100)<percent_transaction_gpr);
+	in_SPR_WRITE_ACK [0]           ->write((rand()%100)<percent_transaction_spr);
+	    
+	SC_START(0);
+
+	// ======================================================================
+	// ======================================================================
+	// ======================================================================
+	if (out_GPR_WRITE_VAL [0]->read() and
+	     in_GPR_WRITE_ACK [0]->read())
+	  {
+	    Tcontext_t         ooo_engine_id = (_param->_have_port_ooo_engine_id)?out_GPR_WRITE_OOO_ENGINE_ID[0]->read():0;
+	    Tgeneral_address_t num_reg       = out_GPR_WRITE_NUM_REG      [0]->read();
+	    Tgeneral_data_t    data          = out_GPR_WRITE_DATA         [0]->read();
+	    
+	    LABEL(" * Accepted GPR_WRITE     in register [%d][%d]", ooo_engine_id,num_reg);
+
+	    TEST(bool           , gpr_val [ooo_engine_id][num_reg], 0);
+	    TEST(bool           , gpr_use [ooo_engine_id][num_reg], 1);
+	    TEST(Tgeneral_data_t, gpr     [ooo_engine_id][num_reg], data);
+	    
+	    gpr_val [ooo_engine_id][num_reg] = 1;
+	  }
+
+	// ======================================================================
+	// ======================================================================
+	// ======================================================================
+	if (out_SPR_WRITE_VAL [0]->read() and
+	     in_SPR_WRITE_ACK [0]->read())
+	  {
+	    Tcontext_t         ooo_engine_id = (_param->_have_port_ooo_engine_id)?out_SPR_WRITE_OOO_ENGINE_ID[0]->read():0;
+	    Tspecial_address_t num_reg       = out_SPR_WRITE_NUM_REG      [0]->read();
+	    Tspecial_data_t    data          = out_SPR_WRITE_DATA         [0]->read();
+	    
+	    LABEL(" * Accepted SPR_WRITE     in register [%d][%d]", ooo_engine_id,num_reg);
+
+	    TEST(bool           , spr_val [ooo_engine_id][num_reg], 0);
+	    TEST(bool           , spr_use [ooo_engine_id][num_reg], 1);
+	    TEST(Tgeneral_data_t, spr     [ooo_engine_id][num_reg], data);
+	    
+	    spr_val [ooo_engine_id][num_reg] = 1;
+	  }
+
+	// ======================================================================
+	// ======================================================================
+	// ======================================================================
+	for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
+	  {
+	    Tcontext_t         ooo_engine_id  = (_param->_have_port_ooo_engine_id)?out_BYPASS_WRITE_OOO_ENGINE_ID[i]->read():0;
+	    
+	    if (out_BYPASS_WRITE_GPR_VAL      [i]->read())
+	      {
+		Tgeneral_address_t num_reg    = out_BYPASS_WRITE_GPR_NUM_REG  [i]->read(); // RD
+		Tgeneral_data_t    data       = out_BYPASS_WRITE_GPR_DATA     [i]->read();
+
+		LABEL(" * Accepted BYPASS_WRITE  in register [%d][%d] (GPR)", ooo_engine_id,num_reg);
+			    
+
+		TEST(bool           , gpr_use [ooo_engine_id][num_reg], 1);
+		TEST(Tgeneral_data_t, gpr     [ooo_engine_id][num_reg], data);
+	      }
+	    if (out_BYPASS_WRITE_SPR_VAL      [i]->read())
+	      {
+		Tspecial_address_t num_reg    = out_BYPASS_WRITE_SPR_NUM_REG  [i]->read(); // RE
+		Tspecial_data_t    data       = out_BYPASS_WRITE_SPR_DATA     [i]->read();
+
+		LABEL(" * Accepted BYPASS_WRITE  in register [%d][%d] (SPR)", ooo_engine_id,num_reg);
+
+		TEST(bool           , spr_use [ooo_engine_id][num_reg], 1);
+		TEST(Tspecial_data_t, spr     [ooo_engine_id][num_reg], data);
+	      }
+	  }
+	
+	// ======================================================================
+	// ======================================================================
+	// ======================================================================
+	if ( in_WRITE_UNIT_IN_VAL->read() and
+	    out_WRITE_UNIT_IN_ACK->read())
+	  {
+	    LABEL(" * Accepted WRITE_UNIT_IN  [%d]",nb_request_in);
+// 	    std::cout << *request [nb_request_in] << std::endl;
+
+	    if (request [nb_request_in]->_write_rd)
+	      {
+		gpr_val [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd] = 0;
+		gpr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd] = 1;
+		gpr     [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd] = request [nb_request_in]->_data_rd;
+	      }
+	    if (request [nb_request_in]->_write_re)
+	      {
+		spr_val [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re] = 0;
+		spr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re] = 1;
+		spr     [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re] = request [nb_request_in]->_data_re;
+	      }
+	    nb_request_in ++;
+	  }
+	
+	// ======================================================================
+	// ======================================================================
+	// ======================================================================
+	if (out_WRITE_UNIT_OUT_VAL->read() and
+	     in_WRITE_UNIT_OUT_ACK->read())
+	  {
+	    Tcontext_t packet;
+	    if (_param->_have_port_packet_id)
+	      packet = out_WRITE_UNIT_OUT_PACKET_ID->read();
+	    else
+	      packet = 0;
+
+	    LABEL(" * Accepted WRITE_UNIT_OUT [%d]",packet);
+// 	    std::cout << *request [packet] << std::endl;
+
+	    if (request [packet]->_write_rd)
+	      {
+		TEST(bool, gpr_val [request [packet]->_ooo_engine_id][request [packet]->_num_reg_rd], 1);
+		TEST(bool, gpr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_rd], 1);
+		gpr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_rd] = 0;
+	      }
+	    if (request [packet]->_write_re)
+	      {
+		TEST(bool, spr_val [request [packet]->_ooo_engine_id][request [packet]->_num_reg_re], 1);
+		TEST(bool, spr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_re], 1);
+		spr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_re] = 0;
+	      }
+
+	    if (_param->_have_port_context_id)
+	    TEST(Tcontext_t     , out_WRITE_UNIT_OUT_CONTEXT_ID   ->read(), request [packet]->_context_id   );
+	    if (_param->_have_port_front_end_id)
+	    TEST(Tcontext_t     , out_WRITE_UNIT_OUT_FRONT_END_ID ->read(), request [packet]->_front_end_id );
+	    if (_param->_have_port_ooo_engine_id)
+	    TEST(Tcontext_t     , out_WRITE_UNIT_OUT_OOO_ENGINE_ID->read(), request [packet]->_ooo_engine_id);
+	    
+	  //TEST(Toperation_t   , out_WRITE_UNIT_OUT_OPERATION    ->read(), request [packet]->_operation    );
+	  //TEST(Ttype_t        , out_WRITE_UNIT_OUT_TYPE         ->read(), request [packet]->_type         );
+	    TEST(Tcontrol_t     , out_WRITE_UNIT_OUT_FLAGS        ->read(), request [packet]->_data_re      );
+	    TEST(Texception_t   , out_WRITE_UNIT_OUT_EXCEPTION    ->read(), request [packet]->_exception    );
+	    TEST(Tcontrol_t     , out_WRITE_UNIT_OUT_NO_SEQUENCE  ->read(), request [packet]->_no_sequence  );
+	    TEST(Tgeneral_data_t, out_WRITE_UNIT_OUT_ADDRESS      ->read(), request [packet]->_address      );
+
+	    nb_request_out ++;
+	  }
+
+	SC_START(1);
+      }
+
+      for (uint32_t i=0; i<_param->_nb_packet; i++)
+	delete request [i];
+
+    }
+
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+#endif
+
+  delete _Write_unit;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/VERSION
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/VERSION	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/VERSION	(revision 74)
@@ -0,0 +1,4 @@
+v0.6
+
+0.5 modif vhdl_port et vhdl_testbench_port -> ajout d'une macro
+0.6 ajout de la documentation
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps	(revision 74)
@@ -14,24 +14,27 @@
 endif
 
+#-----[ Directory ]----------------------------------------
+
+Write_queue_DIR			= 	$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue
+
 #-----[ Library ]------------------------------------------
 Write_queue_LIBRARY		= 	-lWrite_queue	\
 					$(Behavioural_LIBRARY)	
 
-Write_queue_DIR_LIBRARY		=	-L$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/lib	\
+Write_queue_DIR_LIBRARY		=	-L$(Write_queue_DIR)/lib	\
 					$(Behavioural_DIR_LIBRARY)
 
-Write_queue_DEPENDENCIES		=	Behavioural_library
+Write_queue_DEPENDENCIES	=	Behavioural_library
 
 Write_queue_CLEAN        	=	Behavioural_library_clean
 
 #-----[ Rules ]--------------------------------------------
-
-.NOTPARALLEL			: Write_queue_library Write_queue_library_clean
+#.NOTPARALLEL			: Write_queue_library Write_queue_library_clean
 
 Write_queue_library		: $(Write_queue_DEPENDENCIES)
 				@\
-				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue --makefile=Makefile;
+				$(MAKE) --directory=$(Write_queue_DIR) --makefile=Makefile;
 
 Write_queue_library_clean	: $(Write_queue_CLEAN)
 				@\
-				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue --makefile=Makefile clean;
+				$(MAKE) --directory=$(Write_queue_DIR) --makefile=Makefile clean;
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/test.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/test.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/test.cpp	(revision 74)
@@ -42,5 +42,4 @@
       /*cout << "SC_START (end  )" << endl;*/				             \
     } while(0)
-
 
   class entry_t
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h	(revision 74)
@@ -103,5 +103,5 @@
 
 #ifdef STATISTICS
-  private   : Stat                           * _stat;
+  public    : Stat                           * _stat;
 
   private   : counter_t                      * _stat_use_queue;
@@ -216,6 +216,5 @@
 #endif					       
 #ifdef STATISTICS
-  public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
-  public  : std::string statistics_print          (uint32_t depth);
+  public  : void     statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
 #endif
 					       
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp	(revision 74)
@@ -70,33 +70,33 @@
 #define FUNCTION "Write_queue::Parameters (copy)"
   Parameters::Parameters (Parameters & param):
-    _size_queue              (_size_queue             ),
-    _nb_context              (_nb_context             ),
-    _nb_front_end            (_nb_front_end           ),
-    _nb_ooo_engine           (_nb_ooo_engine          ),
-    _nb_packet               (_nb_packet              ),
-    _size_general_data       (_size_general_data      ),
-    _nb_general_register     (_nb_general_register    ),
-    _size_special_data       (_size_special_data      ),
-    _nb_special_register     (_nb_special_register    ),
-    _nb_operation            (_nb_operation           ),
-    _nb_type                 (_nb_type                ),
-    _nb_bypass_write         (_nb_bypass_write        ),
+    _size_queue              (param._size_queue             ),
+    _nb_context              (param._nb_context             ),
+    _nb_front_end            (param._nb_front_end           ),
+    _nb_ooo_engine           (param._nb_ooo_engine          ),
+    _nb_packet               (param._nb_packet              ),
+    _size_general_data       (param._size_general_data      ),
+    _nb_general_register     (param._nb_general_register    ),
+    _size_special_data       (param._size_special_data      ),
+    _nb_special_register     (param._nb_special_register    ),
+    _nb_operation            (param._nb_operation           ),
+    _nb_type                 (param._nb_type                ),
+    _nb_bypass_write         (param._nb_bypass_write        ),
 
-    _nb_gpr_write            (_nb_gpr_write           ),
-    _nb_spr_write            (_nb_spr_write           ),
+    _nb_gpr_write            (param._nb_gpr_write           ),
+    _nb_spr_write            (param._nb_spr_write           ),
 
-    _size_context_id         (_size_context_id        ),
-    _size_front_end_id       (_size_front_end_id      ),
-    _size_ooo_engine_id      (_size_ooo_engine_id     ),
-    _size_packet_id          (_size_packet_id         ),
-    _size_general_register   (_size_general_register  ),
-    _size_special_register   (_size_special_register  ),
-    _size_operation          (_size_operation         ),
-    _size_type               (_size_type              ),
+    _size_context_id         (param._size_context_id        ),
+    _size_front_end_id       (param._size_front_end_id      ),
+    _size_ooo_engine_id      (param._size_ooo_engine_id     ),
+    _size_packet_id          (param._size_packet_id         ),
+    _size_general_register   (param._size_general_register  ),
+    _size_special_register   (param._size_special_register  ),
+    _size_operation          (param._size_operation         ),
+    _size_type               (param._size_type              ),
 
-    _have_port_context_id    (_have_port_context_id   ),
-    _have_port_front_end_id  (_have_port_front_end_id ),
-    _have_port_ooo_engine_id (_have_port_ooo_engine_id),
-    _have_port_packet_id     (_have_port_packet_id    )
+    _have_port_context_id    (param._have_port_context_id   ),
+    _have_port_front_end_id  (param._have_port_front_end_id ),
+    _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
+    _have_port_packet_id     (param._have_port_packet_id    )
   {
     log_printf(FUNC,Write_queue,FUNCTION,"Begin");
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp	(revision 74)
@@ -28,4 +28,7 @@
     std::string msg = "";
 
+    if (_nb_bypass_write > _size_queue)
+      msg += " * The write_queue can't have more bypass_write than entry in the queue.";
+
     return msg;
 
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp	(revision 74)
@@ -126,5 +126,5 @@
     // -----[ Interface "bypass_write" ]----------------------------------
      {
-       ALLOC1_INTERFACE("bypass_write", OUT, NORTH ,"Output of internal write_queue", _param->_size_queue);
+       ALLOC1_INTERFACE("bypass_write", OUT, NORTH ,"Output of internal write_queue", _param->_nb_bypass_write);
        
        if(_param->_have_port_ooo_engine_id)
Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_statistics_print.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_statistics_print.cpp	(revision 73)
+++ 	(revision )
@@ -1,43 +1,0 @@
-#ifdef STATISTICS
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_write_unit {
-namespace write_unit {
-namespace write_queue {
-
-
-#undef  FUNCTION
-#define FUNCTION "Write_queue::statistics_print"
-  std::string Write_queue::statistics_print (uint32_t depth)
-  {
-    log_printf(FUNC,Write_queue,FUNCTION,"Begin");
-
-    std::string txt = _stat->print(depth);
-    
-    log_printf(FUNC,Write_queue,FUNCTION,"End");
-
-    return txt;
-  };
-
-}; // end namespace write_queue
-}; // end namespace write_unit
-}; // end namespace multi_write_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp	(revision 74)
@@ -76,5 +76,5 @@
 
 #ifdef STATISTICS
-    *(_stat_use_write_queue) += _queue->size();
+    *(_stat_use_queue) += _queue->size();
 #endif
 
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/Makefile
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/Makefile	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/Makefile	(revision 74)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/Write_unit.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/Write_unit.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/Write_unit.tex	(revision 74)
@@ -0,0 +1,38 @@
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/sty/header.sty
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/sty/header.sty	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/sty/header.sty	(revision 74)
@@ -0,0 +1,12 @@
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Write_unit}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/01_introduction.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/01_introduction.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/01_introduction.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Introduction}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/02_features.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/02_features.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/02_features.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Features}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/03_description.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/03_description.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/03_description.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Functional Description}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/04_pinout.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/04_pinout.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/04_pinout.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Pin out}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/05_parameters.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/05_parameters.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/05_parameters.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Parameters}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/06_performance.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/06_performance.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/06_performance.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Performance}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/07_details.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/07_details.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/07_details.tex	(revision 74)
@@ -0,0 +1,1 @@
+\Section{Details}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/08_history.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/08_history.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/08_history.tex	(revision 74)
@@ -0,0 +1,10 @@
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/root.tex
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/root.tex	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/doc/tex/root.tex	(revision 74)
@@ -0,0 +1,8 @@
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h	(revision 74)
@@ -0,0 +1,98 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Parameters_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Common/include/Debug.h"
+#include "Behavioural/include/Parameters.h"
+#include <math.h>
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : const uint32_t            _size_write_queue             ;
+  public : const uint32_t            _size_execute_queue           ;
+  public : const uint32_t            _nb_context                   ;
+  public : const uint32_t            _nb_front_end                 ;
+  public : const uint32_t            _nb_ooo_engine                ;
+  public : const uint32_t            _nb_packet                    ;
+  public : const uint32_t            _size_general_data            ;
+  public : const uint32_t            _nb_general_register          ;
+  public : const uint32_t            _size_special_data            ;
+  public : const uint32_t            _nb_special_register          ;
+  public : const uint32_t            _nb_operation                 ;
+  public : const uint32_t            _nb_type                      ;
+  public : const uint32_t            _nb_bypass_write              ;
+
+  public : const uint32_t            _nb_gpr_write                 ;
+  public : const uint32_t            _nb_spr_write                 ;
+
+  public : const uint32_t            _size_context_id              ;
+  public : const uint32_t            _size_front_end_id            ;
+  public : const uint32_t            _size_ooo_engine_id           ;
+  public : const uint32_t            _size_packet_id               ;
+  public : const uint32_t            _size_general_register        ;
+  public : const uint32_t            _size_special_register        ;
+  public : const uint32_t            _size_operation               ;
+  public : const uint32_t            _size_type                    ;
+
+  public : const bool                _have_component_execute_queue ;
+  public : const bool                _have_port_context_id         ;
+  public : const bool                _have_port_front_end_id       ;
+  public : const bool                _have_port_ooo_engine_id      ;
+  public : const bool                _have_port_packet_id          ;
+
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue  ::Parameters * _param_write_queue;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Parameters * _param_execute_queue;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t size_write_queue   ,
+			uint32_t size_execute_queue ,
+			uint32_t nb_context         ,
+			uint32_t nb_front_end       ,
+			uint32_t nb_ooo_engine      ,
+			uint32_t nb_packet          ,
+			uint32_t size_general_data  ,
+			uint32_t nb_general_register,
+			uint32_t size_special_data  ,
+			uint32_t nb_special_register,
+			uint32_t nb_operation       ,
+			uint32_t nb_type            ,
+			uint32_t nb_bypass_write    );
+  public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        std::string   msg_error  (void);
+
+  public :        std::string   print      (uint32_t depth);
+  public : friend std::ostream& operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters & x);
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h	(revision 74)
@@ -0,0 +1,189 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Write_unit_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Write_unit_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include <iostream>
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+#include "Behavioural/include/Types.h"
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+  class Write_unit 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // Interface
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // -----[ Interface "write_unit_in" ]---------------------------------    
+  public    : SC_IN (Tcontrol_t        )    *  in_WRITE_UNIT_IN_VAL          ;
+  public    : SC_OUT(Tcontrol_t        )    * out_WRITE_UNIT_IN_ACK          ;
+  public    : SC_IN (Tcontext_t        )    *  in_WRITE_UNIT_IN_CONTEXT_ID   ;
+  public    : SC_IN (Tcontext_t        )    *  in_WRITE_UNIT_IN_FRONT_END_ID ;
+  public    : SC_IN (Tcontext_t        )    *  in_WRITE_UNIT_IN_OOO_ENGINE_ID;
+  public    : SC_IN (Tpacket_t         )    *  in_WRITE_UNIT_IN_PACKET_ID    ;
+//public    : SC_IN (Toperation_t      )    *  in_WRITE_UNIT_IN_OPERATION    ;
+//public    : SC_IN (Ttype_t           )    *  in_WRITE_UNIT_IN_TYPE         ;
+  public    : SC_IN (Tcontrol_t        )    *  in_WRITE_UNIT_IN_WRITE_RD     ;
+  public    : SC_IN (Tgeneral_address_t)    *  in_WRITE_UNIT_IN_NUM_REG_RD   ;
+  public    : SC_IN (Tgeneral_data_t   )    *  in_WRITE_UNIT_IN_DATA_RD      ;
+  public    : SC_IN (Tcontrol_t        )    *  in_WRITE_UNIT_IN_WRITE_RE     ;
+  public    : SC_IN (Tspecial_address_t)    *  in_WRITE_UNIT_IN_NUM_REG_RE   ;
+  public    : SC_IN (Tspecial_data_t   )    *  in_WRITE_UNIT_IN_DATA_RE      ;
+  public    : SC_IN (Texception_t      )    *  in_WRITE_UNIT_IN_EXCEPTION    ;
+  public    : SC_IN (Tcontrol_t        )    *  in_WRITE_UNIT_IN_NO_SEQUENCE  ;
+  public    : SC_IN (Tgeneral_data_t   )    *  in_WRITE_UNIT_IN_ADDRESS      ;
+
+    // -----[ Interface "write_unit_out" ]--------------------------------    
+  public    : SC_OUT(Tcontrol_t        )    * out_WRITE_UNIT_OUT_VAL          ;
+  public    : SC_IN (Tcontrol_t        )    *  in_WRITE_UNIT_OUT_ACK          ;
+  public    : SC_OUT(Tcontext_t        )    * out_WRITE_UNIT_OUT_CONTEXT_ID   ;
+  public    : SC_OUT(Tcontext_t        )    * out_WRITE_UNIT_OUT_FRONT_END_ID ;
+  public    : SC_OUT(Tcontext_t        )    * out_WRITE_UNIT_OUT_OOO_ENGINE_ID;
+  public    : SC_OUT(Tpacket_t         )    * out_WRITE_UNIT_OUT_PACKET_ID    ;
+//public    : SC_OUT(Toperation_t      )    * out_WRITE_UNIT_OUT_OPERATION    ;
+//public    : SC_OUT(Ttype_t           )    * out_WRITE_UNIT_OUT_TYPE         ;
+  public    : SC_OUT(Tspecial_data_t   )    * out_WRITE_UNIT_OUT_FLAGS        ;
+  public    : SC_OUT(Texception_t      )    * out_WRITE_UNIT_OUT_EXCEPTION    ;
+  public    : SC_OUT(Tcontrol_t        )    * out_WRITE_UNIT_OUT_NO_SEQUENCE  ;
+  public    : SC_OUT(Tgeneral_data_t   )    * out_WRITE_UNIT_OUT_ADDRESS      ;
+
+    // -----[ Interface "gpr_write" ]-------------------------------------
+  public    : SC_OUT(Tcontrol_t        )   ** out_GPR_WRITE_VAL               ;
+  public    : SC_IN (Tcontrol_t        )   **  in_GPR_WRITE_ACK               ;
+  public    : SC_OUT(Tcontext_t        )   ** out_GPR_WRITE_OOO_ENGINE_ID     ;
+  public    : SC_OUT(Tgeneral_address_t)   ** out_GPR_WRITE_NUM_REG           ;
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_GPR_WRITE_DATA              ;
+    
+    // -----[ Interface "spr_write" ]-------------------------------------
+  public    : SC_OUT(Tcontrol_t        )   ** out_SPR_WRITE_VAL               ;
+  public    : SC_IN (Tcontrol_t        )   **  in_SPR_WRITE_ACK               ;
+  public    : SC_OUT(Tcontext_t        )   ** out_SPR_WRITE_OOO_ENGINE_ID     ;
+  public    : SC_OUT(Tspecial_address_t)   ** out_SPR_WRITE_NUM_REG           ;
+  public    : SC_OUT(Tspecial_data_t   )   ** out_SPR_WRITE_DATA              ;
+
+    // -----[ Interface "bypass_write" ]----------------------------------
+  public    : SC_OUT(Tcontext_t        )   ** out_BYPASS_WRITE_OOO_ENGINE_ID ;
+  public    : SC_OUT(Tcontrol_t        )   ** out_BYPASS_WRITE_GPR_VAL       ;
+  public    : SC_OUT(Tgeneral_address_t)   ** out_BYPASS_WRITE_GPR_NUM_REG   ; // RD
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_BYPASS_WRITE_GPR_DATA      ;
+  public    : SC_OUT(Tcontrol_t        )   ** out_BYPASS_WRITE_SPR_VAL       ;
+  public    : SC_OUT(Tspecial_address_t)   ** out_BYPASS_WRITE_SPR_NUM_REG   ; // RE
+  public    : SC_OUT(Tspecial_data_t   )   ** out_BYPASS_WRITE_SPR_DATA      ;
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+  private   : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue  ::Write_queue   * component_write_queue  ;
+  private   : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Execute_queue * component_execute_queue;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Write_unit);
+#endif
+  public  :          Write_unit              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage=USE_ALL
+   );
+  public  :          ~Write_unit             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+//#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  public  : void        transition                (void);
+//#endif
+#endif					       
+#ifdef STATISTICS
+  public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
+#endif
+					       
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+					       
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp	(revision 74)
@@ -0,0 +1,162 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::Parameters"
+  Parameters::Parameters (uint32_t size_write_queue   ,
+			  uint32_t size_execute_queue ,
+			  uint32_t nb_context         ,
+			  uint32_t nb_front_end       ,
+			  uint32_t nb_ooo_engine      ,
+			  uint32_t nb_packet          ,
+			  uint32_t size_general_data  ,
+			  uint32_t nb_general_register,
+			  uint32_t size_special_data  ,
+			  uint32_t nb_special_register,
+			  uint32_t nb_operation       ,
+			  uint32_t nb_type            ,
+			  uint32_t nb_bypass_write    ):
+    _size_write_queue        (size_write_queue   ),
+    _size_execute_queue      (size_execute_queue ),
+    _nb_context              (nb_context         ),
+    _nb_front_end            (nb_front_end       ),
+    _nb_ooo_engine           (nb_ooo_engine      ),
+    _nb_packet               (nb_packet          ),
+    _size_general_data       (size_general_data  ),
+    _nb_general_register     (nb_general_register),
+    _size_special_data       (size_special_data  ),
+    _nb_special_register     (nb_special_register),
+    _nb_operation            (nb_operation       ),
+    _nb_type                 (nb_type            ),
+    _nb_bypass_write         (nb_bypass_write    ),
+
+    _nb_gpr_write            (1),
+    _nb_spr_write            (1),
+
+    _size_context_id         (log2(_nb_context         )),
+    _size_front_end_id       (log2(_nb_front_end       )),
+    _size_ooo_engine_id      (log2(_nb_ooo_engine      )),
+    _size_packet_id          (log2(_nb_packet          )),
+    _size_general_register   (log2(_nb_general_register)),
+    _size_special_register   (log2(_nb_special_register)),
+    _size_operation          (log2(_nb_operation       )),
+    _size_type               (log2(_nb_type            )),
+
+    _have_component_execute_queue (_size_execute_queue > 0),
+    _have_port_context_id         (_size_context_id    > 0),
+    _have_port_front_end_id       (_size_front_end_id  > 0),
+    _have_port_ooo_engine_id      (_size_ooo_engine_id > 0),
+    _have_port_packet_id          (_size_packet_id     > 0)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    _param_write_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue  ::Parameters(size_write_queue   ,
+																		    nb_context         ,
+																		    nb_front_end       ,
+																		    nb_ooo_engine      ,
+																		    nb_packet          ,
+																		    size_general_data  ,
+																		    nb_general_register,
+																		    size_special_data  ,
+																		    nb_special_register,
+																		    nb_operation       ,
+																		    nb_type            ,
+																		    nb_bypass_write    );
+    
+    if (_have_component_execute_queue)
+      _param_execute_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Parameters(size_execute_queue   ,
+																			nb_context         ,
+																			nb_front_end       ,
+																			nb_ooo_engine      ,
+																			nb_packet          ,
+																			size_general_data  ,
+																			size_special_data  ,
+																			nb_operation       ,
+																			nb_type            );
+
+    test();
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+  
+#undef  FUNCTION
+#define FUNCTION "Write_unit::Parameters (copy)"
+  Parameters::Parameters (Parameters & param):
+    _size_write_queue        (param._size_write_queue       ),
+    _size_execute_queue      (param._size_execute_queue     ),
+    _nb_context              (param._nb_context             ),
+    _nb_front_end            (param._nb_front_end           ),
+    _nb_ooo_engine           (param._nb_ooo_engine          ),
+    _nb_packet               (param._nb_packet              ),
+    _size_general_data       (param._size_general_data      ),
+    _nb_general_register     (param._nb_general_register    ),
+    _size_special_data       (param._size_special_data      ),
+    _nb_special_register     (param._nb_special_register    ),
+    _nb_operation            (param._nb_operation           ),
+    _nb_type                 (param._nb_type                ),
+    _nb_bypass_write         (param._nb_bypass_write        ),
+
+    _nb_gpr_write            (param._nb_gpr_write           ),
+    _nb_spr_write            (param._nb_spr_write           ),
+
+    _size_context_id         (param._size_context_id        ),
+    _size_front_end_id       (param._size_front_end_id      ),
+    _size_ooo_engine_id      (param._size_ooo_engine_id     ),
+    _size_packet_id          (param._size_packet_id         ),
+    _size_general_register   (param._size_general_register  ),
+    _size_special_register   (param._size_special_register  ),
+    _size_operation          (param._size_operation         ),
+    _size_type               (param._size_type              ),
+
+    _have_component_execute_queue (param._have_component_execute_queue),
+    _have_port_context_id         (param._have_port_context_id        ),
+    _have_port_front_end_id       (param._have_port_front_end_id      ),
+    _have_port_ooo_engine_id      (param._have_port_ooo_engine_id     ),
+    _have_port_packet_id          (param._have_port_packet_id         )
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+    
+    _param_write_queue   = param._param_write_queue  ;
+    _param_execute_queue = param._param_execute_queue;
+
+    test();
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::~Parameters"
+  Parameters::~Parameters () 
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    delete _param_write_queue;
+
+    if (_have_component_execute_queue)
+      delete _param_execute_queue;
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp	(revision 74)
@@ -0,0 +1,42 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::msg_error"
+  std::string Parameters::msg_error(void)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    std::string msg = "";
+
+    if (_size_write_queue == 0)
+      msg += " * Write queue must have a less one entry.";
+
+    return msg;
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_print.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_print.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_print.cpp	(revision 74)
@@ -0,0 +1,70 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    XML xml ("write_unit");
+
+    xml.balise_open("write_unit");
+    xml.singleton_begin("size_write_queue   "); xml.attribut("value",toString(_size_write_queue   )); xml.singleton_end();
+    xml.singleton_begin("size_execute_queue "); xml.attribut("value",toString(_size_execute_queue )); xml.singleton_end();
+    xml.singleton_begin("nb_context         "); xml.attribut("value",toString(_nb_context         )); xml.singleton_end();
+    xml.singleton_begin("nb_front_end       "); xml.attribut("value",toString(_nb_front_end       )); xml.singleton_end();
+    xml.singleton_begin("nb_ooo_engine      "); xml.attribut("value",toString(_nb_ooo_engine      )); xml.singleton_end();
+    xml.singleton_begin("nb_packet          "); xml.attribut("value",toString(_nb_packet          )); xml.singleton_end();
+    xml.singleton_begin("size_general_data  "); xml.attribut("value",toString(_size_general_data  )); xml.singleton_end();
+    xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end();
+    xml.singleton_begin("size_special_data  "); xml.attribut("value",toString(_size_special_data  )); xml.singleton_end();
+    xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end();
+    xml.singleton_begin("nb_operation       "); xml.attribut("value",toString(_nb_operation       )); xml.singleton_end();
+    xml.singleton_begin("nb_type            "); xml.attribut("value",toString(_nb_type            )); xml.singleton_end();
+    xml.singleton_begin("nb_bypass_write    "); xml.attribut("value",toString(_nb_bypass_write    )); xml.singleton_end();
+    xml.balise_close();
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters & x)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    output_stream << x.print(0);
+    
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+
+    return output_stream;
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit.cpp	(revision 74)
@@ -0,0 +1,113 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::Write_unit"
+  Write_unit::Write_unit 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    log_printf(INFO,Write_unit,FUNCTION,"Allocation");
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (_usage & USE_STATISTICS)
+      {	
+	log_printf(INFO,Write_unit,FUNCTION,"Allocation of statistics");
+
+	statistics_declaration(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (_usage & USE_VHDL)
+      {
+	// generate the vhdl
+	log_printf(INFO,Write_unit,FUNCTION,"Generate the vhdl");
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (_usage & USE_SYSTEMC)
+      {
+	log_printf(INFO,Write_unit,FUNCTION,"Method - transition");
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Write_unit::~Write_unit"
+  Write_unit::~Write_unit (void)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+#ifdef STATISTICS
+    if (_usage & USE_STATISTICS)
+      {
+	log_printf(INFO,Write_unit,FUNCTION,"Generate Statistics file");
+
+	delete _stat;
+      }
+#endif
+
+    log_printf(INFO,Write_unit,FUNCTION,"Deallocation");
+    deallocation ();
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp	(revision 74)
@@ -0,0 +1,396 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::allocation"
+  void Write_unit::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Write_unit"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 "Generalist interface"
+#endif
+							 );
+
+     in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+     in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+
+    // -----[ Interface "write_unit_in" ]--------------------------------    
+     {
+       ALLOC_INTERFACE ("write_unit_in", IN, WEST, "Input of write_unit");
+       
+       ALLOC_VAL_IN    ( in_WRITE_UNIT_IN_VAL);
+       ALLOC_ACK_OUT   (out_WRITE_UNIT_IN_ACK);
+       if(_param->_have_port_context_id)
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id       );
+       if(_param->_have_port_front_end_id)
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id     );
+       if(_param->_have_port_ooo_engine_id)
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id    );
+       if(_param->_have_port_packet_id)
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_PACKET_ID    ,"packet_id"    ,Tpacket_t         ,_param->_size_packet_id        );
+//     ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_OPERATION    ,"operation"    ,Toperation_t      ,_param->_size_operation        );
+//     ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type             );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_WRITE_RD     ,"write_rd"     ,Tcontrol_t        ,1                              );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_NUM_REG_RD   ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_DATA_RD      ,"data_rd"      ,Tgeneral_data_t   ,_param->_size_general_data     );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_WRITE_RE     ,"write_re"     ,Tcontrol_t        ,1                              );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_NUM_REG_RE   ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_DATA_RE      ,"data_re"      ,Tspecial_data_t   ,_param->_size_special_data     );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_EXCEPTION    ,"exception"    ,Texception_t      ,_param->_size_exception        );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t        ,1                              );
+       ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_ADDRESS      ,"address"      ,Tgeneral_data_t   ,_param->_size_general_data     );
+     }
+
+    // -----[ Interface "write_unit_out" ]-------------------------------
+     {
+       ALLOC_INTERFACE ("write_unit_out", OUT, EAST, "Output of write_unit");
+       
+       ALLOC_VAL_OUT   (out_WRITE_UNIT_OUT_VAL);
+       ALLOC_ACK_IN    ( in_WRITE_UNIT_OUT_ACK);
+       if(_param->_have_port_context_id)
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id   );
+       if(_param->_have_port_front_end_id)
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t     ,_param->_size_front_end_id );
+       if(_param->_have_port_ooo_engine_id)
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t     ,_param->_size_ooo_engine_id);
+       if(_param->_have_port_packet_id)
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_PACKET_ID    ,"packet_id"    ,Tpacket_t      ,_param->_size_packet_id    );
+//     ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_OPERATION    ,"operation"    ,Toperation_t   ,_param->_size_operation    );
+//     ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_TYPE         ,"type"         ,Ttype_t        ,_param->_size_type         );
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_FLAGS        ,"flags"        ,Tspecial_data_t,_param->_size_special_data );
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_EXCEPTION    ,"exception"    ,Texception_t   ,_param->_size_exception    );
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t     ,1                          );
+       ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_ADDRESS      ,"address"      ,Tgeneral_data_t,_param->_size_general_data );
+     }
+
+    // -----[ Interface "gpr_write" ]-------------------------------------
+     {
+       ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_gpr_write);
+
+       ALLOC1_VAL_OUT   (out_GPR_WRITE_VAL          ,_param->_nb_gpr_write);
+       ALLOC1_ACK_IN    ( in_GPR_WRITE_ACK          ,_param->_nb_gpr_write);
+       if(_param->_have_port_ooo_engine_id)
+       ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   ,_param->_nb_gpr_write);
+       ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_gpr_write);
+       ALLOC1_SIGNAL_OUT(out_GPR_WRITE_DATA         ,"data"         ,Tgeneral_data_t   ,_param->_size_general_data    ,_param->_nb_gpr_write);
+     }
+
+    // -----[ Interface "spr_write" ]-------------------------------------
+     {
+       ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_spr_write);
+
+       ALLOC1_VAL_OUT   (out_SPR_WRITE_VAL          ,_param->_nb_spr_write);
+       ALLOC1_ACK_IN    ( in_SPR_WRITE_ACK          ,_param->_nb_spr_write);
+       if(_param->_have_port_ooo_engine_id)
+       ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   ,_param->_nb_spr_write);
+       ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tspecial_address_t,_param->_size_special_register,_param->_nb_spr_write);
+       ALLOC1_SIGNAL_OUT(out_SPR_WRITE_DATA         ,"data"         ,Tspecial_data_t   ,_param->_size_special_data    ,_param->_nb_spr_write);
+     }
+
+    // -----[ Interface "bypass_write" ]----------------------------------
+     {
+       ALLOC1_INTERFACE("bypass_write", OUT, NORTH ,"Output of internal write_unit", _param->_nb_bypass_write);
+       
+       if(_param->_have_port_ooo_engine_id)
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   , _param->_nb_bypass_write);
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_VAL      ,"gpr_val"      ,Tcontrol_t        ,1                             , _param->_nb_bypass_write);
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_NUM_REG  ,"gpr_num_reg"  ,Tgeneral_address_t,_param->_size_general_register, _param->_nb_bypass_write);
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_DATA     ,"gpr_data"     ,Tgeneral_data_t   ,_param->_size_general_data    , _param->_nb_bypass_write);
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_VAL      ,"spr_val"      ,Tcontrol_t        ,1                             , _param->_nb_bypass_write);
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_NUM_REG  ,"spr_num_reg"  ,Tspecial_address_t,_param->_size_special_register, _param->_nb_bypass_write);
+       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_DATA     ,"spr_data"     ,Tspecial_data_t   ,_param->_size_special_data    , _param->_nb_bypass_write);
+     }
+
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+     string name;
+
+     {
+       name = _name+"_write_queue";
+       
+       component_write_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue (name.c_str()
+#ifdef STATISTICS
+																			  ,param_statistics
+#endif
+																			  ,_param->_param_write_queue);
+       
+       _component->set_component (component_write_queue->_component
+#ifdef POSITION
+				  , 50, 50, 10, 10
+#endif
+				  );
+     }
+
+     if (_param->_have_component_execute_queue)
+     {
+       name = _name+"_execute_queue";
+       
+       component_execute_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Execute_queue (name.c_str()
+#ifdef STATISTICS
+																				,param_statistics
+#endif
+																				,_param->_param_execute_queue);
+       
+       _component->set_component (component_execute_queue->_component
+#ifdef POSITION
+				  , 50, 50, 10, 10
+#endif
+				  );
+     }
+
+    // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+     {
+       name = _name+"_write_queue";
+       cout << "Instance : " << name << endl;
+	
+#ifdef POSITION
+       _component->interface_map (name ,"",
+				  _name,"");
+#endif
+
+       _component->port_map(name,"in_CLOCK" , _name, "in_CLOCK");
+       _component->port_map(name,"in_NRESET", _name, "in_NRESET");
+
+
+#ifdef POSITION
+       _component->interface_map (name ,"WRITE_QUEUE_IN",
+				  _name,"WRITE_UNIT_IN");
+#endif
+
+       _component->port_map(name, "in_WRITE_QUEUE_IN_VAL"          , _name, "in_WRITE_UNIT_IN_VAL"          );
+       _component->port_map(name,"out_WRITE_QUEUE_IN_ACK"          , _name,"out_WRITE_UNIT_IN_ACK"          );
+       if (_param->_have_port_context_id)
+       _component->port_map(name, "in_WRITE_QUEUE_IN_CONTEXT_ID"   , _name, "in_WRITE_UNIT_IN_CONTEXT_ID"   );
+       if (_param->_have_port_front_end_id)
+       _component->port_map(name, "in_WRITE_QUEUE_IN_FRONT_END_ID" , _name, "in_WRITE_UNIT_IN_FRONT_END_ID" );
+       if (_param->_have_port_ooo_engine_id)
+       _component->port_map(name, "in_WRITE_QUEUE_IN_OOO_ENGINE_ID", _name, "in_WRITE_UNIT_IN_OOO_ENGINE_ID");
+       if (_param->_have_port_packet_id)
+       _component->port_map(name, "in_WRITE_QUEUE_IN_PACKET_ID"    , _name, "in_WRITE_UNIT_IN_PACKET_ID"    );
+     //_component->port_map(name, "in_WRITE_QUEUE_IN_OPERATION"    , _name, "in_WRITE_UNIT_IN_OPERATION"    );
+     //_component->port_map(name, "in_WRITE_QUEUE_IN_TYPE"         , _name, "in_WRITE_UNIT_IN_TYPE"         );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_WRITE_RD"     , _name, "in_WRITE_UNIT_IN_WRITE_RD"     );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_NUM_REG_RD"   , _name, "in_WRITE_UNIT_IN_NUM_REG_RD"   );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_DATA_RD"      , _name, "in_WRITE_UNIT_IN_DATA_RD"      );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_WRITE_RE"     , _name, "in_WRITE_UNIT_IN_WRITE_RE"     );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_NUM_REG_RE"   , _name, "in_WRITE_UNIT_IN_NUM_REG_RE"   );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_DATA_RE"      , _name, "in_WRITE_UNIT_IN_DATA_RE"      );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_EXCEPTION"    , _name, "in_WRITE_UNIT_IN_EXCEPTION"    );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_NO_SEQUENCE"  , _name, "in_WRITE_UNIT_IN_NO_SEQUENCE"  );
+       _component->port_map(name, "in_WRITE_QUEUE_IN_ADDRESS"      , _name, "in_WRITE_UNIT_IN_ADDRESS"      );
+
+
+       if (_param->_have_component_execute_queue)
+	 {
+#ifdef POSITION
+	   _component->interface_map (name ,"WRITE_QUEUE_OUT",
+				      _name+"_execute_queue", "EXECUTE_QUEUE_IN");
+#endif
+
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_VAL"          , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_VAL"          );
+	   _component->port_map(name, "in_WRITE_QUEUE_OUT_ACK"          , _name+"_execute_queue","out_EXECUTE_QUEUE_IN_ACK"          );
+	   if (_param->_have_port_context_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_CONTEXT_ID"   , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_CONTEXT_ID"   );
+	   if (_param->_have_port_front_end_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_FRONT_END_ID" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_FRONT_END_ID" );
+	   if (_param->_have_port_ooo_engine_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_OOO_ENGINE_ID", _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID");
+	   if (_param->_have_port_packet_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_PACKET_ID"    , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_PACKET_ID"    );
+	 //_component->port_map(name,"out_WRITE_QUEUE_OUT_OPERATION"    , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_OPERATION"    );
+	 //_component->port_map(name,"out_WRITE_QUEUE_OUT_TYPE"         , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_TYPE"         );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_FLAGS"        , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_FLAGS"        );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_EXCEPTION"    , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_EXCEPTION"    );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_NO_SEQUENCE"  , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_NO_SEQUENCE"  );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_ADDRESS"      , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_ADDRESS"      );
+	 }
+       else
+	 {
+#ifdef POSITION
+	   _component->interface_map (name ,"WRITE_QUEUE_OUT",
+				      _name,"WRITE_UNIT_OUT");
+#endif
+
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_VAL"          , _name,"out_WRITE_UNIT_OUT_VAL"          );
+	   _component->port_map(name, "in_WRITE_QUEUE_OUT_ACK"          , _name, "in_WRITE_UNIT_OUT_ACK"          );
+	   if (_param->_have_port_context_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_CONTEXT_ID"   , _name,"out_WRITE_UNIT_OUT_CONTEXT_ID"   );
+	   if (_param->_have_port_front_end_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_FRONT_END_ID" , _name,"out_WRITE_UNIT_OUT_FRONT_END_ID" );
+	   if (_param->_have_port_ooo_engine_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_OOO_ENGINE_ID", _name,"out_WRITE_UNIT_OUT_OOO_ENGINE_ID");
+	   if (_param->_have_port_packet_id)
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_PACKET_ID"    , _name,"out_WRITE_UNIT_OUT_PACKET_ID"    );
+	 //_component->port_map(name,"out_WRITE_QUEUE_OUT_OPERATION"    , _name,"out_WRITE_UNIT_OUT_OPERATION"    );
+	 //_component->port_map(name,"out_WRITE_QUEUE_OUT_TYPE"         , _name,"out_WRITE_UNIT_OUT_TYPE"         );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_FLAGS"        , _name,"out_WRITE_UNIT_OUT_FLAGS"        );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_EXCEPTION"    , _name,"out_WRITE_UNIT_OUT_EXCEPTION"    );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_NO_SEQUENCE"  , _name,"out_WRITE_UNIT_OUT_NO_SEQUENCE"  );
+	   _component->port_map(name,"out_WRITE_QUEUE_OUT_ADDRESS"      , _name,"out_WRITE_UNIT_OUT_ADDRESS"      );
+	 }	 
+
+       for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
+	 {
+#ifdef POSITION
+	   _component->interface_map (name ,"GPR_WRITE_"+toString(i),
+				      _name,"GPR_WRITE_"+toString(i));
+#endif	   
+	   
+	   _component->port_map(name,"out_GPR_WRITE_"+toString(i)+"_VAL"          ,_name,"out_GPR_WRITE_"+toString(i)+"_VAL"          );
+	   _component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_ACK"          ,_name, "in_GPR_WRITE_"+toString(i)+"_ACK"          );
+	   if (_param->_have_port_ooo_engine_id)
+	   _component->port_map(name,"out_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",_name,"out_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
+	   _component->port_map(name,"out_GPR_WRITE_"+toString(i)+"_NUM_REG"      ,_name,"out_GPR_WRITE_"+toString(i)+"_NUM_REG"      );
+	   _component->port_map(name,"out_GPR_WRITE_"+toString(i)+"_DATA"         ,_name,"out_GPR_WRITE_"+toString(i)+"_DATA"         );
+	 }
+
+       for (uint32_t i=0; i<_param->_nb_spr_write; i++)
+	 {
+#ifdef POSITION
+	   _component->interface_map (name ,"SPR_WRITE_"+toString(i),
+				      _name,"SPR_WRITE_"+toString(i));
+#endif	   
+	   
+	   _component->port_map(name,"out_SPR_WRITE_"+toString(i)+"_VAL"          ,_name,"out_SPR_WRITE_"+toString(i)+"_VAL"          );
+	   _component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_ACK"          ,_name, "in_SPR_WRITE_"+toString(i)+"_ACK"          );
+	   if (_param->_have_port_ooo_engine_id)
+	   _component->port_map(name,"out_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",_name,"out_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
+	   _component->port_map(name,"out_SPR_WRITE_"+toString(i)+"_NUM_REG"      ,_name,"out_SPR_WRITE_"+toString(i)+"_NUM_REG"      );
+	   _component->port_map(name,"out_SPR_WRITE_"+toString(i)+"_DATA"         ,_name,"out_SPR_WRITE_"+toString(i)+"_DATA"         );
+	 }
+
+
+       for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
+	 {
+#ifdef POSITION
+	   _component->interface_map (name ,"BYPASS_WRITE_"+toString(i),
+				      _name,"BYPASS_WRITE_"+toString(i));
+#endif	   
+
+	   if (_param->_have_port_ooo_engine_id)
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID",_name,"out_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_GPR_VAL"      ,_name,"out_BYPASS_WRITE_"+toString(i)+"_GPR_VAL"      );
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG"  ,_name,"out_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG"  );
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_GPR_DATA"     ,_name,"out_BYPASS_WRITE_"+toString(i)+"_GPR_DATA"     );
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_SPR_VAL"      ,_name,"out_BYPASS_WRITE_"+toString(i)+"_SPR_VAL"      );
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG"  ,_name,"out_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG"  );
+	   _component->port_map(name,"out_BYPASS_WRITE_"+toString(i)+"_SPR_DATA"     ,_name,"out_BYPASS_WRITE_"+toString(i)+"_SPR_DATA"     );
+	 }
+     }
+
+     if (_param->_have_component_execute_queue)
+       {
+	 name = _name+"_execute_queue";
+	 cout << "Instance : " << name << endl;
+	 
+#ifdef POSITION
+	 _component->interface_map (name ,"",
+				    _name,"");
+#endif
+	 
+	 _component->port_map(name,"in_CLOCK" , _name, "in_CLOCK");
+	 _component->port_map(name,"in_NRESET", _name, "in_NRESET");
+	 
+
+#ifdef POSITION
+	 _component->interface_map (name ,"WRITE_QUEUE_IN",
+				    _name+"_write_queue","WRITE_UNIT_IN");
+#endif
+
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_VAL"          , _name+"_write_queue","out_WRITE_QUEUE_OUT_VAL"          );
+         _component->port_map(name,"out_EXECUTE_QUEUE_IN_ACK"          , _name+"_write_queue", "in_WRITE_QUEUE_OUT_ACK"          );
+         if (_param->_have_port_context_id)
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_CONTEXT_ID"   , _name+"_write_queue","out_WRITE_QUEUE_OUT_CONTEXT_ID"   );
+         if (_param->_have_port_front_end_id)
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_FRONT_END_ID" , _name+"_write_queue","out_WRITE_QUEUE_OUT_FRONT_END_ID" );
+         if (_param->_have_port_ooo_engine_id)
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID", _name+"_write_queue","out_WRITE_QUEUE_OUT_OOO_ENGINE_ID");
+         if (_param->_have_port_packet_id)
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_PACKET_ID"    , _name+"_write_queue","out_WRITE_QUEUE_OUT_PACKET_ID"    );
+       //_component->port_map(name, "in_EXECUTE_QUEUE_IN_OPERATION"    , _name+"_write_queue","out_WRITE_QUEUE_OUT_OPERATION"    );
+       //_component->port_map(name, "in_EXECUTE_QUEUE_IN_TYPE"         , _name+"_write_queue","out_WRITE_QUEUE_OUT_TYPE"         );
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_FLAGS"        , _name+"_write_queue","out_WRITE_QUEUE_OUT_FLAGS"        );
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_EXCEPTION"    , _name+"_write_queue","out_WRITE_QUEUE_OUT_EXCEPTION"    );
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_NO_SEQUENCE"  , _name+"_write_queue","out_WRITE_QUEUE_OUT_NO_SEQUENCE"  );
+         _component->port_map(name, "in_EXECUTE_QUEUE_IN_ADDRESS"      , _name+"_write_queue","out_WRITE_QUEUE_OUT_ADDRESS"      );
+
+#ifdef POSITION
+	   _component->interface_map (name ,"EXECUTE_QUEUE_OUT",
+				      _name,"WRITE_UNIT_OUT_");
+#endif
+
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_VAL"          , _name,"out_WRITE_UNIT_OUT_VAL"          );
+	   _component->port_map(name, "in_EXECUTE_QUEUE_OUT_ACK"          , _name, "in_WRITE_UNIT_OUT_ACK"          );
+	   if (_param->_have_port_context_id)
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID"   , _name,"out_WRITE_UNIT_OUT_CONTEXT_ID"   );
+	   if (_param->_have_port_front_end_id)
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID" , _name,"out_WRITE_UNIT_OUT_FRONT_END_ID" );
+	   if (_param->_have_port_ooo_engine_id)
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID", _name,"out_WRITE_UNIT_OUT_OOO_ENGINE_ID");
+	   if (_param->_have_port_packet_id)
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_PACKET_ID"    , _name,"out_WRITE_UNIT_OUT_PACKET_ID"    );
+	 //_component->port_map(name,"out_EXECUTE_QUEUE_OUT_OPERATION"    , _name,"out_WRITE_UNIT_OUT_OPERATION"    );
+	 //_component->port_map(name,"out_EXECUTE_QUEUE_OUT_TYPE"         , _name,"out_WRITE_UNIT_OUT_TYPE"         );
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_FLAGS"        , _name,"out_WRITE_UNIT_OUT_FLAGS"        );
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_EXCEPTION"    , _name,"out_WRITE_UNIT_OUT_EXCEPTION"    );
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_NO_SEQUENCE"  , _name,"out_WRITE_UNIT_OUT_NO_SEQUENCE"  );
+	   _component->port_map(name,"out_EXECUTE_QUEUE_OUT_ADDRESS"      , _name,"out_WRITE_UNIT_OUT_ADDRESS"      );
+       }
+
+#ifdef POSITION
+    _component->generate_file();
+#endif
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp	(revision 74)
@@ -0,0 +1,116 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::deallocation"
+  void Write_unit::deallocation (void)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    if (_usage & USE_SYSTEMC)
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+	// -----[ Interface "write_unit_in" ]--------------------------------    
+	delete      in_WRITE_UNIT_IN_VAL          ;
+	delete     out_WRITE_UNIT_IN_ACK          ;
+	if (_param->_have_port_context_id)
+	delete      in_WRITE_UNIT_IN_CONTEXT_ID   ;
+	if (_param->_have_port_front_end_id)
+	delete      in_WRITE_UNIT_IN_FRONT_END_ID ;
+	if (_param->_have_port_ooo_engine_id)
+	delete      in_WRITE_UNIT_IN_OOO_ENGINE_ID;
+        if (_param->_have_port_packet_id)
+	delete      in_WRITE_UNIT_IN_PACKET_ID    ;
+//      delete      in_WRITE_UNIT_IN_OPERATION    ;
+//      delete      in_WRITE_UNIT_IN_TYPE         ;
+        delete      in_WRITE_UNIT_IN_WRITE_RD     ;
+        delete      in_WRITE_UNIT_IN_NUM_REG_RD   ;
+        delete      in_WRITE_UNIT_IN_DATA_RD      ;
+        delete      in_WRITE_UNIT_IN_WRITE_RE     ;
+        delete      in_WRITE_UNIT_IN_NUM_REG_RE   ;
+        delete      in_WRITE_UNIT_IN_DATA_RE      ;
+        delete      in_WRITE_UNIT_IN_EXCEPTION    ;
+        delete      in_WRITE_UNIT_IN_NO_SEQUENCE  ;
+        delete      in_WRITE_UNIT_IN_ADDRESS      ;
+
+	// -----[ Interface "write_unit_out" ]-------------------------------    
+        delete     out_WRITE_UNIT_OUT_VAL          ;
+        delete      in_WRITE_UNIT_OUT_ACK          ;
+        if (_param->_have_port_context_id)
+	delete     out_WRITE_UNIT_OUT_CONTEXT_ID   ;
+        if (_param->_have_port_front_end_id)
+	delete     out_WRITE_UNIT_OUT_FRONT_END_ID ;
+        if (_param->_have_port_ooo_engine_id)
+	delete     out_WRITE_UNIT_OUT_OOO_ENGINE_ID;
+        if (_param->_have_port_packet_id)
+	delete     out_WRITE_UNIT_OUT_PACKET_ID    ;
+//      delete     out_WRITE_UNIT_OUT_OPERATION    ;
+//      delete     out_WRITE_UNIT_OUT_TYPE         ;
+        delete     out_WRITE_UNIT_OUT_FLAGS        ;
+        delete     out_WRITE_UNIT_OUT_EXCEPTION    ;
+        delete     out_WRITE_UNIT_OUT_NO_SEQUENCE  ;
+        delete     out_WRITE_UNIT_OUT_ADDRESS      ;
+
+	// -----[ Interface "gpr_write" ]-------------------------------------
+        delete []  out_GPR_WRITE_VAL               ;
+        delete []   in_GPR_WRITE_ACK               ;
+        if (_param->_have_port_ooo_engine_id)
+	delete []  out_GPR_WRITE_OOO_ENGINE_ID     ;
+        delete []  out_GPR_WRITE_NUM_REG           ;
+        delete []  out_GPR_WRITE_DATA              ;
+	
+	// -----[ Interface "spr_write" ]-------------------------------------
+        delete []  out_SPR_WRITE_VAL               ;
+        delete []   in_SPR_WRITE_ACK               ;
+        if (_param->_have_port_ooo_engine_id)
+	delete []  out_SPR_WRITE_OOO_ENGINE_ID     ;
+        delete []  out_SPR_WRITE_NUM_REG           ;
+        delete []  out_SPR_WRITE_DATA              ;
+
+	// -----[ Interface "bypass_write" ]----------------------------------
+        if (_param->_have_port_ooo_engine_id)
+	delete []  out_BYPASS_WRITE_OOO_ENGINE_ID ;
+        delete []  out_BYPASS_WRITE_GPR_VAL       ;
+        delete []  out_BYPASS_WRITE_GPR_NUM_REG   ;
+        delete []  out_BYPASS_WRITE_GPR_DATA      ;
+        delete []  out_BYPASS_WRITE_SPR_VAL       ;
+        delete []  out_BYPASS_WRITE_SPR_NUM_REG   ;
+        delete []  out_BYPASS_WRITE_SPR_DATA      ;
+
+      }
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    delete component_write_queue;
+    if (_param->_have_component_execute_queue)
+      delete component_execute_queue;
+
+    delete _component;
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_end_cycle.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_end_cycle.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_end_cycle.cpp	(revision 74)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::end_cycle"
+void Write_unit::end_cycle ()
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+#ifdef STATISTICS
+    _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    _interfaces->testbench();
+#endif
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_statistics_declaration.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_statistics_declaration.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_statistics_declaration.cpp	(revision 74)
@@ -0,0 +1,45 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::statistics_declaration"
+  void Write_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    _stat       = new Stat (static_cast<string>(_name),
+			    "Write_unit",
+			    param_statistics);
+
+    _stat->add_stat(component_write_queue->_stat);
+    if (_param->_have_component_execute_queue)
+      _stat->add_stat(component_execute_queue->_stat);
+	
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_transition.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_transition.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_transition.cpp	(revision 74)
@@ -0,0 +1,43 @@
+#ifdef SYSTEMC
+//#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::transition"
+  void Write_unit::transition (void)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
+//#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl.cpp	(revision 74)
@@ -0,0 +1,50 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::vhdl"
+  void Write_unit::vhdl (void)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl_body.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl_body.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl_body.cpp	(revision 74)
@@ -0,0 +1,37 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::vhdl_body"
+  void Write_unit::vhdl_body (Vhdl * & vhdl)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+    vhdl->set_body ("");
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl_declaration.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl_declaration.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_vhdl_declaration.cpp	(revision 74)
@@ -0,0 +1,36 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_unit::vhdl_declaration"
+  void Write_unit::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_printf(FUNC,Write_unit,FUNCTION,"Begin");
+    log_printf(FUNC,Write_unit,FUNCTION,"End");
+  };
+
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Makefile.deps	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Makefile.deps	(revision 74)
@@ -42,5 +42,5 @@
 #-----[ Rules ]--------------------------------------------
 
-.NOTPARALLEL			: Register_unit_library Register_unit_library_clean	
+#.NOTPARALLEL			: Register_unit_library Register_unit_library_clean	
 
 Register_unit_library		: $(Register_unit_DEPENDENCIES)
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/Makefile.deps	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/Makefile.deps	(revision 74)
@@ -34,5 +34,5 @@
 #-----[ Rules ]--------------------------------------------
 
-.NOTPARALLEL			: Queue_library Queue_library_clean
+#.NOTPARALLEL			: Queue_library Queue_library_clean
 
 Queue_library			: $(Queue_DEPENDENCIES)
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/Makefile.deps
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/Makefile.deps	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/Makefile.deps	(revision 74)
@@ -14,9 +14,13 @@
 endif
 
+#-----[ Directory ]----------------------------------------
+
+@COMPONENT_DIR			=	$(DIR_MORPHEO)/Behavioural/@DIRECTORY
+
 #-----[ Library ]------------------------------------------
 @COMPONENT_LIBRARY		= 	-l@COMPONENT	\
 					$(Behavioural_LIBRARY)	
 
-@COMPONENT_DIR_LIBRARY		=	-L$(DIR_MORPHEO)/Behavioural/@DIRECTORY/lib	\
+@COMPONENT_DIR_LIBRARY		=	-L$(@COMPONENT_DIR)/lib	\
 					$(Behavioural_DIR_LIBRARY)
 
@@ -27,11 +31,11 @@
 #-----[ Rules ]--------------------------------------------
 
-.NOTPARALLEL			: @COMPONENT_library @COMPONENT_library_clean
+#.NOTPARALLEL			: @COMPONENT_library @COMPONENT_library_clean
 
 @COMPONENT_library		: $(@COMPONENT_DEPENDENCIES)
 				@\
-				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/@DIRECTORY --makefile=Makefile;
+				$(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile;
 
 @COMPONENT_library_clean	: $(@COMPONENT_CLEAN)
 				@\
-				$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/@DIRECTORY --makefile=Makefile clean;
+				$(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile clean;
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h	(revision 74)
@@ -45,5 +45,5 @@
 
 #ifdef STATISTICS
-  private   : Stat                           * _stat;
+  public    : Stat                           * _stat;
 #endif
 
@@ -84,25 +84,29 @@
   public  :          ~@COMPONENT             (void);
 					       
-  private : void     allocation                (void);
-  private : void     deallocation              (void);
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
 					       
 #ifdef SYSTEMC				       
-//#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
-  public  : void     transition                (void);
-//#endif
+  public  : void        transition                (void);
+//public  : void        genMoore                  (void);
 #endif					       
 #ifdef STATISTICS
   public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
-  public  : std::string statistics_print          (uint32_t depth);
 #endif
 					       
 #if VHDL				       
-  public  : void     vhdl                      (void);
-  private : void     vhdl_declaration          (Vhdl * & vhdl);
-  private : void     vhdl_body                 (Vhdl * & vhdl);
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
 #endif					       
 					       
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
-  private : void     end_cycle                 (void);
+  private : void        end_cycle                 (void);
 #endif
   };
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component.cpp	(revision 74)
@@ -34,5 +34,10 @@
 
     log_printf(INFO,@COMPONENT,FUNCTION,"Allocation");
-    allocation ();
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
 
 #ifdef STATISTICS
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp	(revision 74)
@@ -16,5 +16,11 @@
 #undef  FUNCTION
 #define FUNCTION "@COMPONENT::allocation"
-  void @COMPONENT::allocation (void)
+  void @COMPONENT::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
   {
     string rename;
Index: unk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_statistics_print.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_statistics_print.cpp	(revision 73)
+++ 	(revision )
@@ -1,31 +1,0 @@
-#ifdef STATISTICS
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/@DIRECTORY/include/@COMPONENT.h"
-
-namespace morpheo {
-namespace behavioural {
-@NAMESPACE_BEGIN
-
-#undef  FUNCTION
-#define FUNCTION "@COMPONENT::statistics_print"
-  std::string @COMPONENT::statistics_print (uint32_t depth)
-  {
-    log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
-
-    std::string txt = _stat->print(depth);
-    
-    log_printf(FUNC,@COMPONENT,FUNCTION,"End");
-
-    return txt;
-  };
-
-@NAMESPACE_END
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp	(revision 74)
@@ -1,4 +1,3 @@
 #ifdef SYSTEMC
-//#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
 /*
  * $Id$
@@ -31,3 +30,2 @@
 }; // end namespace morpheo              
 #endif
-//#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h	(revision 74)
@@ -56,4 +56,8 @@
       counter_t                    * _cycle;
 
+      std::list<Stat *>            * _list_stat;
+
+      bool                           _generate_file;
+
     public :                     Stat            (std::string name_instance,
 						  std::string name_component,
@@ -90,4 +94,6 @@
     private : void               generate_file   (void);
 
+    public  : void               add_stat        (Stat * stat);
+
     public  : std::string        print           (uint32_t depth=0);
     };
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp	(revision 74)
@@ -16,7 +16,10 @@
     _list_operand  = new std::map<std::string, var_t>;
     _list_expr     = new std::list<expr_t>;
+    _list_stat     = new std::list<Stat *>;
 
     _cycle         = create_variable("cycle");
     *_cycle        = 0; // for the first period
+
+    _generate_file = true;
   }
 
@@ -33,12 +36,16 @@
     _list_operand  = new std::map<std::string, var_t>;
     _list_expr     = new std::list<expr_t>;
+    _list_stat     = new std::list<Stat *>;
 
     _cycle         = create_variable("cycle");
     *_cycle        = 0; // for the first period
+
+    _generate_file = true;
   }
 
   Stat::~Stat (void)
   {
-    generate_file();
+    if (_generate_file)
+      generate_file();
 
     // parcourir la liste et desallouer les counters
@@ -59,4 +66,5 @@
       }
     delete _list_expr;
+    delete _list_stat;
   }
 };
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_add_stat.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_add_stat.cpp	(revision 74)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_add_stat.cpp	(revision 74)
@@ -0,0 +1,15 @@
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+
+namespace morpheo {
+namespace behavioural {  
+
+  void Stat::add_stat (Stat * stat)
+  {
+    stat->_generate_file = false;
+
+    _list_stat->push_back(stat);
+  }
+};  
+};
+#endif
Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_print.cpp
===================================================================
--- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_print.cpp	(revision 73)
+++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_print.cpp	(revision 74)
@@ -16,4 +16,11 @@
     xml.attribut("name",_name_instance);
     xml.balise_open_end();
+
+    // Print component
+    for (std::list<Stat *>::iterator stat=_list_stat->begin();
+	 stat != _list_stat->end();
+	 stat ++)
+      xml.text((*stat)->print(depth+1));
+    
 
     // Test special case
