Changeset 76 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include
- Timestamp:
- Feb 2, 2008, 12:39:01 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h
r75 r76 42 42 public : const uint32_t _nb_bypass_write ;//if nb_bypass=0, then bypass is desactivated 43 43 public : const uint32_t _nb_bypass_memory ;//if nb_bypass=0, then bypass is desactivated 44 public : const uint32_t _size_store_queue ; 45 public : const uint32_t _size_load_queue ; 46 44 47 /* 45 48 public : const bool _have_immediat ; … … 80 83 uint32_t nb_spr_write , 81 84 uint32_t nb_bypass_write , 82 uint32_t nb_bypass_memory ); 85 uint32_t nb_bypass_memory , 86 uint32_t size_store_queue , 87 uint32_t size_load_queue ); 83 88 84 89 public : Parameters (Parameters & param) ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h
r75 r76 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 47 47 public : Toperation_t _operation ; 48 48 public : Ttype_t _type ; 49 public : Tlsq_ptr_t _store_queue_ptr_write; 50 public : Tlsq_ptr_t _load_queue_ptr_write ; 49 51 public : Tcontrol_t _has_immediat; 50 52 public : Tgeneral_data_t _immediat ; … … 69 71 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Treservation_station_entry_t & x) 70 72 { 71 output_stream << " * _context_id : " << toString(x._context_id ) << std::endl 72 << " * _front_end_id : " << toString(x._front_end_id ) << std::endl 73 << " * _ooo_engine_id : " << toString(x._ooo_engine_id ) << std::endl 74 << " * _rob_id : " << toString(x._rob_id ) << std::endl 75 << " * _operation : " << toString(x._operation ) << std::endl 76 << " * _type : " << toString(x._type ) << std::endl 77 << " * _has_immediat : " << toString(x._has_immediat ) << std::endl 78 << " * _immediat : " << toString(x._immediat ) << std::endl 79 // << " * _read_ra : " << toString(x._read_ra ) << std::endl 80 << " * _num_reg_ra : " << toString(x._num_reg_ra ) << std::endl 81 << " * _data_ra_val : " << toString(x._data_ra_val ) << std::endl 82 << " * _data_ra : " << toString(x._data_ra ) << std::endl 83 // << " * _read_rb : " << toString(x._read_rb ) << std::endl 84 << " * _num_reg_rb : " << toString(x._num_reg_rb ) << std::endl 85 << " * _data_rb_val : " << toString(x._data_rb_val ) << std::endl 86 << " * _data_rb : " << toString(x._data_rb ) << std::endl 87 // << " * _read_rc : " << toString(x._read_rc ) << std::endl 88 << " * _num_reg_rc : " << toString(x._num_reg_rc ) << std::endl 89 << " * _data_rc_val : " << toString(x._data_rc_val ) << std::endl 90 << " * _data_rc : " << toString(x._data_rc ) << std::endl 91 << " * _write_rd : " << toString(x._write_rd ) << std::endl 92 << " * _num_reg_rd : " << toString(x._num_reg_rd ) << std::endl 93 << " * _write_re : " << toString(x._write_re ) << std::endl 94 << " * _num_reg_re : " << toString(x._num_reg_re ) << std::endl; 73 output_stream << " * _context_id : " << toString(x._context_id ) << std::endl 74 << " * _front_end_id : " << toString(x._front_end_id ) << std::endl 75 << " * _ooo_engine_id : " << toString(x._ooo_engine_id ) << std::endl 76 << " * _rob_id : " << toString(x._rob_id ) << std::endl 77 << " * _operation : " << toString(x._operation ) << std::endl 78 << " * _type : " << toString(x._type ) << std::endl 79 << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl 80 << " * _load_queue_ptr_write : " << toString(x._load_queue_ptr_write ) << std::endl 81 << " * _has_immediat : " << toString(x._has_immediat ) << std::endl 82 << " * _immediat : " << toString(x._immediat ) << std::endl 83 // << " * _read_ra : " << toString(x._read_ra ) << std::endl 84 << " * _num_reg_ra : " << toString(x._num_reg_ra ) << std::endl 85 << " * _data_ra_val : " << toString(x._data_ra_val ) << std::endl 86 << " * _data_ra : " << toString(x._data_ra ) << std::endl 87 // << " * _read_rb : " << toString(x._read_rb ) << std::endl 88 << " * _num_reg_rb : " << toString(x._num_reg_rb ) << std::endl 89 << " * _data_rb_val : " << toString(x._data_rb_val ) << std::endl 90 << " * _data_rb : " << toString(x._data_rb ) << std::endl 91 // << " * _read_rc : " << toString(x._read_rc ) << std::endl 92 << " * _num_reg_rc : " << toString(x._num_reg_rc ) << std::endl 93 << " * _data_rc_val : " << toString(x._data_rc_val ) << std::endl 94 << " * _data_rc : " << toString(x._data_rc ) << std::endl 95 << " * _write_rd : " << toString(x._write_rd ) << std::endl 96 << " * _num_reg_rd : " << toString(x._num_reg_rd ) << std::endl 97 << " * _write_re : " << toString(x._write_re ) << std::endl 98 << " * _num_reg_re : " << toString(x._num_reg_re ) << std::endl; 95 99 96 100 return output_stream; 97 101 } 98 99 102 }; 100 103 … … 104 107 #endif 105 108 { 106 // -----[ 109 // -----[ fields ]---------------------------------------------------- 107 110 // Parameters 108 111 protected : const std::string _name; … … 118 121 119 122 #ifdef SYSTEMC 120 // ~~~~~[ 123 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 121 124 // Interface 122 125 public : SC_CLOCK * in_CLOCK ; 123 126 public : SC_IN (Tcontrol_t) * in_NRESET ; 124 127 125 // ~~~~~[ 128 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~ 126 129 public : SC_IN (Tcontrol_t ) * in_INSERT_VAL ; 127 130 public : SC_OUT(Tcontrol_t ) * out_INSERT_ACK ; … … 132 135 public : SC_IN (Toperation_t ) * in_INSERT_OPERATION ; 133 136 public : SC_IN (Ttype_t ) * in_INSERT_TYPE ; 137 public : SC_IN (Tlsq_ptr_t ) * in_INSERT_STORE_QUEUE_PTR_WRITE; 138 public : SC_IN (Tlsq_ptr_t ) * in_INSERT_LOAD_QUEUE_PTR_WRITE ; 134 139 public : SC_IN (Tcontrol_t ) * in_INSERT_HAS_IMMEDIAT ; 135 140 public : SC_IN (Tgeneral_data_t ) * in_INSERT_IMMEDIAT ; … … 151 156 public : SC_IN (Tspecial_address_t) * in_INSERT_NUM_REG_RE ; 152 157 153 // ~~~~~[ 158 // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~ 154 159 public : SC_OUT(Tcontrol_t ) ** out_RETIRE_VAL ; 155 160 public : SC_IN (Tcontrol_t ) ** in_RETIRE_ACK ; … … 160 165 public : SC_OUT(Toperation_t ) ** out_RETIRE_OPERATION ; 161 166 public : SC_OUT(Ttype_t ) ** out_RETIRE_TYPE ; 167 public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_STORE_QUEUE_PTR_WRITE; 168 public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 162 169 public : SC_OUT(Tcontrol_t ) ** out_RETIRE_HAS_IMMEDIAT ; 163 170 public : SC_OUT(Tgeneral_data_t ) ** out_RETIRE_IMMEDIAT ; … … 170 177 public : SC_OUT(Tspecial_address_t) ** out_RETIRE_NUM_REG_RE ; 171 178 172 // ~~~~~[ 179 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 173 180 174 181 public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_VAL ; // val and ack … … 177 184 public : SC_IN (Tgeneral_data_t ) ** in_GPR_WRITE_DATA ; 178 185 179 // ~~~~~[ 186 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 180 187 181 188 public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_VAL ; // val and ack … … 184 191 public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; 185 192 186 // ~~~~~[ 193 // ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 187 194 188 195 public : SC_IN (Tcontext_t ) ** in_BYPASS_WRITE_OOO_ENGINE_ID ; … … 194 201 public : SC_IN (Tspecial_data_t ) ** in_BYPASS_WRITE_SPR_DATA ; 195 202 196 // ~~~~~[ 203 // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 197 204 198 205 public : SC_IN (Tcontrol_t ) ** in_BYPASS_MEMORY_VAL ; … … 202 209 203 210 204 // ~~~~~[ 205 206 // ~~~~~[ 207 208 // ~~~~~[ 211 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 212 213 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 214 215 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 209 216 #ifdef SYSTEMC_VHDL_COMPATIBILITY 210 217 protected : bool * _queue_valid; … … 220 227 #endif 221 228 222 // -----[ 229 // -----[ methods ]--------------------------------------------------- 223 230 224 231 #ifdef SYSTEMC
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