Changeset 77 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src
- Timestamp:
- Feb 5, 2008, 5:21:20 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
r74 r77 29 29 uint32_t size_special_data , 30 30 uint32_t nb_special_register, 31 uint32_t nb_operation ,32 uint32_t nb_type ,33 31 uint32_t nb_bypass_write ): 34 32 _size_queue (size_queue ), … … 41 39 _size_special_data (size_special_data ), 42 40 _nb_special_register (nb_special_register), 43 _nb_operation (nb_operation ),44 _nb_type (nb_type ),45 41 _nb_bypass_write (nb_bypass_write ), 46 42 … … 54 50 _size_general_register (log2(_nb_general_register)), 55 51 _size_special_register (log2(_nb_special_register)), 56 _size_operation (log2(_nb_operation )),57 _size_type (log2(_nb_type )),58 52 59 53 _have_port_context_id (_size_context_id > 0), … … 79 73 _size_special_data (param._size_special_data ), 80 74 _nb_special_register (param._nb_special_register ), 81 _nb_operation (param._nb_operation ),82 _nb_type (param._nb_type ),83 75 _nb_bypass_write (param._nb_bypass_write ), 84 76 … … 92 84 _size_general_register (param._size_general_register ), 93 85 _size_special_register (param._size_special_register ), 94 _size_operation (param._size_operation ),95 _size_type (param._size_type ),96 86 97 87 _have_port_context_id (param._have_port_context_id ), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp
r73 r77 37 37 xml.singleton_begin("size_special_data "); xml.attribut("value",toString(_size_special_data )); xml.singleton_end(); 38 38 xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); 39 xml.singleton_begin("nb_operation "); xml.attribut("value",toString(_nb_operation )); xml.singleton_end();40 xml.singleton_begin("nb_type "); xml.attribut("value",toString(_nb_type )); xml.singleton_end();41 39 xml.singleton_begin("nb_bypass_write "); xml.attribut("value",toString(_nb_bypass_write )); xml.singleton_end(); 42 40 xml.balise_close(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp
r76 r77 60 60 ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id ); 61 61 // ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 62 //ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type );62 ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 63 63 ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 64 64 ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_deallocation.cpp
r73 r77 41 41 delete in_WRITE_QUEUE_IN_PACKET_ID ; 42 42 // delete in_WRITE_QUEUE_IN_OPERATION ; 43 //delete in_WRITE_QUEUE_IN_TYPE ;43 delete in_WRITE_QUEUE_IN_TYPE ; 44 44 delete in_WRITE_QUEUE_IN_WRITE_RD ; 45 45 delete in_WRITE_QUEUE_IN_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp
r74 r77 53 53 (_param->_have_port_packet_id )?PORT_READ(in_WRITE_QUEUE_IN_PACKET_ID ):0, 54 54 //PORT_READ(in_WRITE_QUEUE_IN_OPERATION ), 55 //PORT_READ(in_WRITE_QUEUE_IN_TYPE ),55 PORT_READ(in_WRITE_QUEUE_IN_TYPE ), 56 56 PORT_READ(in_WRITE_QUEUE_IN_WRITE_RD ), 57 57 PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RD ), … … 67 67 } 68 68 69 // Test if pop 70 if (internal_WRITE_QUEUE_OUT_VAL and PORT_READ(in_WRITE_QUEUE_OUT_ACK)) 69 // Test if pop : 70 // * transaction on write_queue_out interface 71 // * have a speculative load and all register is write in registerfile 72 if ( (internal_WRITE_QUEUE_OUT_VAL and PORT_READ(in_WRITE_QUEUE_OUT_ACK)) or 73 ((_queue->empty() == false) and 74 (_queue->front()->_type == TYPE_MEMORY) and 75 (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE) and 76 (_queue->front()->_write_rd == 0) and 77 (_queue->front()->_write_re == 0))) 71 78 { 72 79 delete _queue->front();
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