Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps	(revision 78)
@@ -20,4 +20,5 @@
 Functionnal_unit_LIBRARY	= 	-lFunctionnal_unit	\
 					$(Custom_LIBRARY)	\
+					-lFunctionnal_unit	\
 					$(Behavioural_LIBRARY)	
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile	(revision 78)
@@ -0,0 +1,23 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libOperation.a
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs	(revision 78)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps	(revision 78)
@@ -0,0 +1,30 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Operation		= yes
+
+#-----[ Directory ]----------------------------------------
+
+Operation_DIR           =       $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation
+
+#-----[ Library ]------------------------------------------
+
+Operation_LIBRARY	= 	-lOperation
+
+Operation_DIR_LIBRARY	=	-L$(Operation_DIR)/lib
+
+#-----[ Rules ]--------------------------------------------
+
+Operation_library	:
+			@\
+			$(MAKE) --directory=$(Operation_DIR) --makefile=Makefile;
+
+Operation_library_clean	:
+			@\
+			$(MAKE) --directory=$(Operation_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h	(revision 78)
@@ -0,0 +1,75 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+#include "Common/include/ErrorMorpheo.h"
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_execute_unit {
+namespace execute_unit {
+namespace functionnal_unit {
+
+  void operation_unimplemented   (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_add           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_addc          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sub           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_mul           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_mulu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_div           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_divu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_and           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_or            (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_xor           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_test_f        (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_test_nf       (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_jalr          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sll           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sra           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_srl           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_ror           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_movhi         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_extend_s      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_extend_z      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_cmov          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_ff1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_fl1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_mfspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_mtspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfeq          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfne          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfgeu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfgtu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfleu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfltu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfges         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfgts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfles         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sflts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_mac           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_msb           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_macrc         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+
+}; // end namespace functionnal_unit
+}; // end namespace execute_unit
+}; // end namespace multi_execute_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h	(revision 78)
@@ -0,0 +1,168 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include "Common/include/BitManipulation.h"
+#include "Behavioural/include/SPR_access_mode.h"
+#include "Behavioural/include/Types.h"
+#include "Behavioural/include/Parameters.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_execute_unit {
+namespace execute_unit {
+namespace functionnal_unit {
+
+  class execute_timing_t
+  {
+    // if delay   > 0, can't accepted a transaction on EXECUTE_IN's  interface.
+  public : uint32_t        _delay  ;
+    // if latence > 0, can't initiate a transaction on EXECUTE_OUT's interface.
+  public : uint32_t        _latence;
+
+  public : execute_timing_t (uint32_t delay=0, uint32_t latence=0)
+    {
+      _delay   = delay;
+      _latence = latence;
+    };
+  };
+
+  typedef struct 
+  {
+    execute_timing_t   _timing      ;
+
+    Tcontext_t         _context_id   ;
+    Tcontext_t         _front_end_id ;
+    Tcontext_t         _ooo_engine_id;
+    Tpacket_t          _packet_id ;
+
+    Toperation_t       _operation   ;
+    Ttype_t            _type        ;
+    Tcontrol_t         _has_immediat;
+    Tgeneral_data_t    _immediat    ;
+    Tgeneral_data_t    _data_ra     ;
+    Tgeneral_data_t    _data_rb     ;
+    Tspecial_data_t    _data_rc     ;
+    Tgeneral_data_t    _data_rd     ;
+    Tspecial_data_t    _data_re     ;
+
+    Tcontrol_t         _write_rd  ;
+    Tgeneral_address_t _num_reg_rd;
+    Tcontrol_t         _write_re  ;
+    Tspecial_address_t _num_reg_re;
+
+    Texception_t       _exception   ;
+    Tcontrol_t         _no_sequence ;
+    Tgeneral_data_t    _address     ;
+  } execute_operation_t;
+
+  class execute_param_t
+  {
+  public : const uint32_t            _size_data;
+  public : const Tgeneral_data_t     _mask_data;
+  public : const Tgeneral_data_t     _mask_shift;
+  public :       execute_timing_t ** _timing;
+
+  public : execute_param_t (const uint32_t      size_data,
+			    execute_timing_t ** timing):
+    _size_data (size_data),
+    _mask_data (gen_mask<Tgeneral_data_t> (size_data)),
+    _mask_shift(gen_mask<Tgeneral_data_t> (log2(size_data)))
+    {
+      _timing = timing;
+    };
+  public : ~execute_param_t (void)
+    {
+    };
+  } ;
+
+  class execute_register_t
+  {
+    // information to custom group : 
+    //  * perhalps a custom group start an operation after a access at a internal's group register
+  public : bool               _i_read_spr;
+  public : bool               _i_write_spr;
+  public : uint32_t           _access_num_group;
+  public : uint32_t           _access_num_register;
+  public : Tgeneral_data_t    _spr_old;
+  public : Tgeneral_data_t ** _spr;
+  public : SPR_access_mode  * _spr_access_mode;
+    
+  public : execute_register_t (void)
+    {
+      _spr               = new Tgeneral_data_t * [NB_GROUP];
+      _spr_access_mode   = new SPR_access_mode;
+  
+      for (uint32_t i=0; i<NB_GROUP; i++)
+	{
+	  _spr               [i] = NULL;
+	}
+    }
+
+  public : ~execute_register_t (void)
+    {
+      for (uint32_t x=0; x<NB_GROUP; x++)
+	if (_spr[x] != NULL)
+	  delete _spr[x];
+      delete _spr;
+      delete _spr_access_mode;
+    }
+
+  public : void implement_group (uint32_t num_group, uint32_t nb_reg)
+    {
+      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
+	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
+
+      if (nb_reg > 0)
+	{
+	  _spr [num_group] = new Tgeneral_data_t [nb_reg];
+
+	  if (num_group >= GROUP_CUSTOM_1)
+	    _spr_access_mode ->implement_group(num_group, nb_reg);
+	}
+    }
+
+  public : void implement_group (uint32_t num_group)
+    {
+      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
+	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
+
+      uint32_t nb_reg = _spr_access_mode ->implement_group(num_group);
+
+      if (nb_reg > 0)
+	_spr [num_group] = new Tgeneral_data_t [nb_reg];
+    }
+  };
+  
+  typedef void function_execute_t 
+  (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, 
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
+  
+  typedef void function_execute_end_cycle_t 
+  (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
+
+  
+}; // end namespace functionnal_unit
+}; // end namespace execute_unit
+}; // end namespace multi_execute_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp	(revision 78)
@@ -0,0 +1,836 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"
+
+#define neg(data)                  (~(data)+1)
+#define sign(data)                 ((data)>>(param->_size_data-1))
+#define unsigned(data)             (data)
+#define signed(data)               ((sign(data)==0)?(data):neg(data))
+#define ovf(op1, op2, res)         ((sign(op1) == sign(op2))?(sign(op1) xor sign(res)):0)
+#define carry(op1, op2, res)       (((res)<(op1)) or ((res)<(op2)))
+#define set_flag(data,flag,is_set) (((is_set)==1)?((data)|(flag)):((data)&~(flag)))
+#define get_flag(data,flag)	   (((data)&(flag))!=0)
+#define concatenation_bool(a,b)    (((a)<<1) | (b))
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_execute_unit {
+namespace execute_unit {
+namespace functionnal_unit {
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_unimplemented"
+  void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : unimplemented");
+
+    throw ERRORMORPHEO(FUNCTION,"The operation '"+toString(op->_operation)+"' is not implemented in this Functionnal_unit");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_add"
+  void operation_l_add         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_add");
+
+    Tgeneral_data_t gpr1      = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2      = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    
+    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
+
+    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
+    bool            carry_out = carry(gpr1,gpr2,gpr3);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+    op->_data_re      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
+    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
+    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_addc"
+  void operation_l_addc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_addc");
+
+    Tgeneral_data_t carry_in   = get_flag(op->_data_rc,FLAG_CY);
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = param->_mask_data & (gpr1 + gpr2 + carry_in);
+
+    bool            overflow   = ovf  (gpr1,gpr2,gpr3);
+    bool            carry_out  = carry(gpr1,gpr2,gpr3);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+    op->_data_re      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
+    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
+    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sub"
+  void operation_l_sub         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sub");
+
+    Tgeneral_data_t gpr1      =     unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2      = neg(unsigned(op->_data_rb));
+    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
+
+    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
+    bool            carry_out = carry(gpr1,gpr2,gpr3);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+    op->_data_re      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
+    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
+    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_and"
+  void operation_l_and         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_and");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = (gpr1 & gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_or"
+  void operation_l_or          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_or");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = (gpr1 | gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_xor"
+  void operation_l_xor         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_xor");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = (gpr1 ^ gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_movhi"
+  void operation_l_movhi       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_movhi");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_immediat);
+    Tgeneral_data_t gpr2       = param->_mask_data & (gpr1<<16);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_cmov"
+  void operation_l_cmov        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_cmov");
+
+    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
+    Tgeneral_data_t gpr3       = ((f_in==0)?gpr2:gpr1);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_test_f"
+  void operation_l_test_f      (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_f");
+
+    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = f_in != 0;
+    op->_address      = imm;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_test_nf"
+  void operation_l_test_nf     (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_nf");
+
+    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = f_in == 0;
+    op->_address      = imm;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_jalr"
+  void operation_l_jalr        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_jalr");
+    // jal  : has_imm = 1, write_rd = 1, read_rb = 0
+    // jalr : has_imm = 1, write_rd = 1, read_rb = 1
+    // jr   : has_imm = 0, write_rd = 0, read_rb = 1
+
+
+    Tgeneral_data_t gpr        = unsigned(op->_data_rb);
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = imm;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 1;
+    op->_address      = gpr;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_extend_s"
+  void operation_l_extend_s    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_s");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, true , imm);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_extend_z"
+  void operation_l_extend_z    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_z");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, false , imm);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sll"
+  void operation_l_sll         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sll");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = shift_logic_left<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_srl"
+  void operation_l_srl         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_srl");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = shift_logic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sra"
+  void operation_l_sra         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sra");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = shift_arithmetic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_ror"
+  void operation_l_ror         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ror");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = rotate_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_ff1"
+  void operation_l_ff1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ff1");
+
+    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
+    Tgeneral_data_t index;
+
+    for (index=0; (index<param->_size_data) and (((gpr>>index)&1)!= 1); index++);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = (index==param->_size_data)?0:(index+1);
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_fl1"
+  void operation_l_fl1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_fl1");
+
+    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
+    Tgeneral_data_t index;
+
+    for (index=param->_size_data; (index>0) and (((gpr>>(index-1))&1)!= 1); index--);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = index;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfeq"
+  void operation_l_sfeq        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfeq");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 == gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfne"
+  void operation_l_sfne        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfne");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 != gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfgeu"
+  void operation_l_sfgeu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgeu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 >= gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfgtu"
+  void operation_l_sfgtu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgtu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 >  gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfleu"
+  void operation_l_sfleu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfleu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 <= gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfltu"
+  void operation_l_sfltu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfltu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 <  gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfges"
+  void operation_l_sfges       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfges");
+
+    Tgeneral_data_t gpr1       =   op->_data_ra;
+    Tgeneral_data_t gpr2       =   (op->_has_immediat==1)?op->_immediat:op->_data_rb;
+    
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra  : %.8x",unsigned(op->_data_ra));
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ras : %.8x",  signed(op->_data_ra));
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb  : %.8x",unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb));
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rbs : %.8x",  signed((op->_has_immediat==1)?op->_immediat:op->_data_rb));
+    
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 1                               ; break;
+      case 2 /*b10*/ : f_out = 0                               ; break;
+      default        : f_out = signed(gpr1) >= signed(gpr2); break;
+      }
+
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * f_out    : %.8x",f_out);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfgts"
+  void operation_l_sfgts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgts");
+
+    Tgeneral_data_t gpr1       = op->_data_ra ;
+    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
+
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 1; break;
+      case 2 /*b10*/ : f_out = 0; break;
+      default        : f_out = signed(gpr1) >  signed(gpr2); break;
+      }
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfles"
+  void operation_l_sfles       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfles");
+
+    Tgeneral_data_t gpr1       = op->_data_ra ;
+    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
+
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 0; break;
+      case 2 /*b10*/ : f_out = 1; break;
+      default        : f_out = signed(gpr1) <= signed(gpr2); break;
+      }
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sflts"
+  void operation_l_sflts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sflts");
+
+    Tgeneral_data_t gpr1       = op->_data_ra ;
+    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb;
+
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 0; break;
+      case 2 /*b10*/ : f_out = 1; break;
+      default        : f_out = signed(gpr1) <  signed(gpr2); break;
+      }
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_mtspr"
+  void operation_l_mtspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mtspr");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
+    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
+
+    Texception_t    exception;
+
+    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
+    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
+    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
+
+    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
+    
+    // Test if this group is implemented in this functionnal_unit
+    if (reg->_spr_access_mode->valid(spr_addr))
+      {
+	if (reg->_spr_access_mode->write(spr_addr, flag_SM, flag_SUMRA))
+	  {
+	    reg->_i_write_spr         = true;
+	    reg->_access_num_group    = spr_addr._group;
+	    reg->_access_num_register = spr_addr._register;
+	    reg->_spr_old             = reg->_spr[spr_addr._group][spr_addr._register];
+	    reg->_spr[spr_addr._group][spr_addr._register] = gpr2;
+
+	    exception = EXCEPTION_ALU_NONE;
+	  }
+	else
+	  {
+	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
+	  }
+      }
+    else
+      {
+	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
+      }
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2; // data_rb
+  //op->_data_re      = 0;
+    op->_exception    = exception;
+    op->_no_sequence  = 0;
+    op->_address      = addr; // data_ra or imm
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_mfspr"
+  void operation_l_mfspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mfspr");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = 0;
+    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
+
+    Texception_t    exception;
+
+    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
+    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
+    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
+
+    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
+    
+    // Test if this group is implemented in this functionnal_unit
+    if (reg->_spr_access_mode->valid(spr_addr))
+      {
+	if (reg->_spr_access_mode->read(spr_addr, flag_SM, flag_SUMRA))
+	  {
+	    reg->_i_read_spr          = true;
+	    reg->_access_num_group    = spr_addr._group;
+	    reg->_access_num_register = spr_addr._register;
+	    
+	    gpr2 = reg->_spr[spr_addr._group][spr_addr._register];
+
+	    exception = EXCEPTION_ALU_NONE;
+	  }
+	else
+	  {
+	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
+	  }
+      }
+    else
+      {
+	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
+      }
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_write_rd     = (exception == EXCEPTION_ALU_NONE);
+    op->_data_rd      = gpr2; // spr
+  //op->_data_re      = 0;
+    op->_exception    = exception;
+    op->_no_sequence  = 0;
+    op->_address      = addr; // data_ra or imm
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_macrc"
+  void operation_l_macrc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_macrc");
+
+    Tgeneral_data_t gpr = static_cast<Tgeneral_data_t>(range<uint64_t>((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO]), param->_size_data));
+
+    reg->_spr[GROUP_MAC][SPR_MACLO] = 0;
+    reg->_spr[GROUP_MAC][SPR_MACHI] = 0;
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_mac"
+  void operation_l_mac          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mac");
+
+    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
+
+    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) + temp;
+
+    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
+    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_msb"
+  void operation_l_msb          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_msb");
+
+    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
+
+    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) - temp;
+
+    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
+    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+}; // end namespace functionnal_unit
+}; // end namespace execute_unit
+}; // end namespace multi_execute_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg	(revision 78)
@@ -8,2 +8,4 @@
 2 	2 	+1	# size_special_data  
 16	16	+1	# nb_special_register
+4 	4 	*2	# size_store_queue
+1 	4 	*4	# size_load_queue
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp	(revision 78)
@@ -9,5 +9,5 @@
 #include "Behavioural/Custom/include/Custom_example.h"
 
-#define NB_PARAMS 8
+#define NB_PARAMS 10
 
 void usage (int argc, char * argv[])
@@ -23,4 +23,6 @@
   err (_("  * size_special_data   (uint32_t)\n"));
   err (_("  * nb_special_register (uint32_t)\n"));
+  err (_("  * size_store_queue    (uint32_t)\n"));
+  err (_("  * size_load_queue     (uint32_t)\n"));
   exit (1);
 }
@@ -46,4 +48,6 @@
   const uint32_t size_special_data   = atoi(argv[x++]);
   const uint32_t nb_special_register = atoi(argv[x++]);
+  const uint32_t size_store_queue    = atoi(argv[x++]);
+  const uint32_t size_load_queue     = atoi(argv[x++]);
 
   execute_timing_t ** timing = new execute_timing_t * [MAX_TYPE];
@@ -68,4 +72,6 @@
 	 size_special_data   ,
 	 nb_special_register ,
+	 size_store_queue    ,
+	 size_load_queue     ,
 	 timing              ,
 	 &(morpheo::behavioural::custom::example_get_custom_information)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp	(revision 78)
@@ -142,4 +142,6 @@
   sc_signal<Toperation_t      >  in_EXECUTE_IN_OPERATION      (rename.c_str());
   sc_signal<Ttype_t           >  in_EXECUTE_IN_TYPE           (rename.c_str());
+  sc_signal<Tlsq_ptr_t        >  in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE (rename.c_str());
+  sc_signal<Tlsq_ptr_t        >  in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE  (rename.c_str());
   sc_signal<Tcontrol_t        >  in_EXECUTE_IN_HAS_IMMEDIAT   (rename.c_str());
   sc_signal<Tgeneral_data_t   >  in_EXECUTE_IN_IMMEDIAT       (rename.c_str());
@@ -160,5 +162,5 @@
   sc_signal<Tpacket_t         > out_EXECUTE_OUT_PACKET_ID      (rename.c_str());
 //sc_signal<Toperation_t      > out_EXECUTE_OUT_OPERATION      (rename.c_str());
-//sc_signal<Ttype_t           > out_EXECUTE_OUT_TYPE           (rename.c_str());
+  sc_signal<Ttype_t           > out_EXECUTE_OUT_TYPE           (rename.c_str());
   sc_signal<Tcontrol_t        > out_EXECUTE_OUT_WRITE_RD       (rename.c_str());
   sc_signal<Tgeneral_address_t> out_EXECUTE_OUT_NUM_REG_RD     (rename.c_str());
@@ -191,4 +193,7 @@
   (*(_Functionnal_unit-> in_EXECUTE_IN_OPERATION     )) ( in_EXECUTE_IN_OPERATION     );
   (*(_Functionnal_unit-> in_EXECUTE_IN_TYPE          )) ( in_EXECUTE_IN_TYPE          );
+  (*(_Functionnal_unit-> in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE)) ( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE);
+  if (_param->_have_port_load_queue_ptr)
+  (*(_Functionnal_unit-> in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE )) ( in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE );
   (*(_Functionnal_unit-> in_EXECUTE_IN_HAS_IMMEDIAT  )) ( in_EXECUTE_IN_HAS_IMMEDIAT  );
   (*(_Functionnal_unit-> in_EXECUTE_IN_IMMEDIAT      )) ( in_EXECUTE_IN_IMMEDIAT      );
@@ -212,5 +217,5 @@
   (*(_Functionnal_unit->out_EXECUTE_OUT_PACKET_ID    )) (out_EXECUTE_OUT_PACKET_ID    );
 //(*(_Functionnal_unit->out_EXECUTE_OUT_OPERATION    )) (out_EXECUTE_OUT_OPERATION    );
-//(*(_Functionnal_unit->out_EXECUTE_OUT_TYPE         )) (out_EXECUTE_OUT_TYPE         );
+  (*(_Functionnal_unit->out_EXECUTE_OUT_TYPE         )) (out_EXECUTE_OUT_TYPE         );
   (*(_Functionnal_unit->out_EXECUTE_OUT_WRITE_RD     )) (out_EXECUTE_OUT_WRITE_RD     );
   (*(_Functionnal_unit->out_EXECUTE_OUT_NUM_REG_RD   )) (out_EXECUTE_OUT_NUM_REG_RD   );
@@ -616,4 +621,7 @@
 	      in_EXECUTE_IN_OPERATION     .write(transaction_in.front()._operation    );
 	      in_EXECUTE_IN_TYPE          .write(transaction_in.front()._type         );
+	      in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE.write(0);
+	      if (_param->_have_port_load_queue_ptr)
+	      in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE .write(0);
 	      in_EXECUTE_IN_HAS_IMMEDIAT  .write(transaction_in.front()._has_immediat );
 	      in_EXECUTE_IN_IMMEDIAT      .write(transaction_in.front()._immediat     );
@@ -641,5 +649,5 @@
 	      TEST(Tcontext_t        , out_EXECUTE_OUT_OOO_ENGINE_ID.read(), transaction_out.front()._ooo_engine_id);
 	    //TEST(Toperation_t      , out_EXECUTE_OUT_OPERATION    .read(), transaction_out.front()._operation    );
-	    //TEST(Ttype_t           , out_EXECUTE_OUT_TYPE         .read(), transaction_out.front()._type         );
+	      TEST(Ttype_t           , out_EXECUTE_OUT_TYPE         .read(), transaction_out.front()._type         );
 	      TEST(Tcontrol_t        , out_EXECUTE_OUT_WRITE_RE     .read(), transaction_out.front()._write_re     );
 	      TEST(Tgeneral_address_t, out_EXECUTE_OUT_NUM_REG_RD   .read(), transaction_out.front()._num_reg_rd   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h	(revision 78)
@@ -10,6 +10,4 @@
  */
 
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h"
-
 #ifdef SYSTEMC
 #include "systemc.h"
@@ -20,7 +18,9 @@
 #include "Common/include/Debug.h"
 #include "Behavioural/include/Types.h"
+#include "Behavioural/include/Identification.h"
 
+#include "Behavioural/include/Types.h"
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"
 #ifdef STATISTICS
 #include "Behavioural/include/Stat.h"
@@ -86,4 +86,6 @@
   public    : SC_IN (Toperation_t      )    *  in_EXECUTE_IN_OPERATION      ;
   public    : SC_IN (Ttype_t           )    *  in_EXECUTE_IN_TYPE           ;
+  public    : SC_IN (Tlsq_ptr_t        )    *  in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE;
+  public    : SC_IN (Tlsq_ptr_t        )    *  in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE;
   public    : SC_IN (Tcontrol_t        )    *  in_EXECUTE_IN_HAS_IMMEDIAT   ;
   public    : SC_IN (Tgeneral_data_t   )    *  in_EXECUTE_IN_IMMEDIAT       ;
@@ -104,5 +106,5 @@
   public    : SC_OUT(Tpacket_t         )    * out_EXECUTE_OUT_PACKET_ID      ;
 //public    : SC_OUT(Toperation_t      )    * out_EXECUTE_OUT_OPERATION      ;
-//public    : SC_OUT(Ttype_t           )    * out_EXECUTE_OUT_TYPE           ;
+  public    : SC_OUT(Ttype_t           )    * out_EXECUTE_OUT_TYPE           ;
   public    : SC_OUT(Tcontrol_t        )    * out_EXECUTE_OUT_WRITE_RD       ;
   public    : SC_OUT(Tgeneral_address_t)    * out_EXECUTE_OUT_NUM_REG_RD     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h	(revision 77)
+++ 	(revision )
@@ -1,75 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Common/include/ToString.h"
-#include "Common/include/Debug.h"
-#include "Common/include/ErrorMorpheo.h"
-#include "Behavioural/include/Types.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_execute_unit {
-namespace execute_unit {
-namespace functionnal_unit {
-
-  void operation_unimplemented   (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_add           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_addc          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sub           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_mul           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_mulu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_div           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_divu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_and           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_or            (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_xor           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_test_f        (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_test_nf       (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_jalr          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sll           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sra           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_srl           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_ror           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_movhi         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_extend_s      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_extend_z      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_cmov          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_ff1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_fl1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_mfspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_mtspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfeq          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfne          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfgeu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfgtu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfleu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfltu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfges         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfgts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfles         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sflts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_mac           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_msb           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_macrc         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-
-}; // end namespace functionnal_unit
-}; // end namespace execute_unit
-}; // end namespace multi_execute_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-}; // end namespace morpheo              
-
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h	(revision 78)
@@ -11,6 +11,7 @@
 #include "Common/include/Debug.h"
 #include "Behavioural/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h"
 #include "Behavioural/Custom/include/Custom.h"
+#include "Behavioural/Custom/include/Custom_default.h"
 #include <math.h>
 
@@ -36,4 +37,7 @@
   public : const uint32_t            _size_special_data            ;
   public : const uint32_t            _nb_special_register          ;
+  public : const uint32_t            _size_store_queue             ;
+  public : const uint32_t            _size_load_queue              ;
+
   public :       execute_timing_t ** _timing                       ;
   public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t);
@@ -50,4 +54,5 @@
   public : const bool                _have_port_ooo_engine_id      ;
   public : const bool                _have_port_packet_id          ;
+  public : const bool                _have_port_load_queue_ptr     ;
 
   public : const bool                _have_groupe_MAC              ;
@@ -62,4 +67,6 @@
 			uint32_t           size_special_data  ,
 			uint32_t           nb_special_register,
+			uint32_t           size_store_queue   ,
+			uint32_t           size_load_queue    ,
 			execute_timing_t** timing             ,
 			morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t));
@@ -67,5 +74,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h	(revision 77)
+++ 	(revision )
@@ -1,166 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#ifdef SYSTEMC
-#include "systemc.h"
-#endif
-
-#include "Common/include/BitManipulation.h"
-#include "Behavioural/include/SPR_access_mode.h"
-#include "Behavioural/include/Types.h"
-#include "Behavioural/include/Parameters.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_execute_unit {
-namespace execute_unit {
-namespace functionnal_unit {
-
-  class execute_timing_t
-  {
-    // if delay   > 0, can't accepted a transaction on EXECUTE_IN's  interface.
-  public : uint32_t        _delay  ;
-    // if latence > 0, can't initiate a transaction on EXECUTE_OUT's interface.
-  public : uint32_t        _latence;
-
-  public : execute_timing_t (uint32_t delay=0, uint32_t latence=0)
-    {
-      _delay   = delay;
-      _latence = latence;
-    };
-  };
-
-  typedef struct 
-  {
-    execute_timing_t   _timing      ;
-
-    Tcontext_t         _context_id   ;
-    Tcontext_t         _front_end_id ;
-    Tcontext_t         _ooo_engine_id;
-    Tpacket_t          _packet_id ;
-
-    Toperation_t       _operation   ;
-    Ttype_t            _type        ;
-    Tcontrol_t         _has_immediat;
-    Tgeneral_data_t    _immediat    ;
-    Tgeneral_data_t    _data_ra     ;
-    Tgeneral_data_t    _data_rb     ;
-    Tspecial_data_t    _data_rc     ;
-    Tgeneral_data_t    _data_rd     ;
-    Tspecial_data_t    _data_re     ;
-
-    Tcontrol_t         _write_rd  ;
-    Tgeneral_address_t _num_reg_rd;
-    Tcontrol_t         _write_re  ;
-    Tspecial_address_t _num_reg_re;
-
-    Texception_t       _exception   ;
-    Tcontrol_t         _no_sequence ;
-    Tgeneral_data_t    _address     ;
-  } execute_operation_t;
-
-  class execute_param_t
-  {
-  public : const uint32_t            _size_data;
-  public : const Tgeneral_data_t     _mask_data;
-  public : const Tgeneral_data_t     _mask_shift;
-  public :       execute_timing_t ** _timing;
-
-  public : execute_param_t (const uint32_t      size_data,
-			    execute_timing_t ** timing):
-    _size_data (size_data),
-    _mask_data (gen_mask<Tgeneral_data_t> (size_data)),
-    _mask_shift(gen_mask<Tgeneral_data_t> (log2(size_data)))
-    {
-      _timing = timing;
-    };
-  public : ~execute_param_t (void)
-    {
-    };
-  } ;
-
-  class execute_register_t
-  {
-    // information to custom group : 
-    //  * perhalps a custom group start an operation after a access at a internal's group register
-  public : bool               _i_read_spr;
-  public : bool               _i_write_spr;
-  public : uint32_t           _access_num_group;
-  public : uint32_t           _access_num_register;
-  public : Tgeneral_data_t    _spr_old;
-  public : Tgeneral_data_t ** _spr;
-  public : SPR_access_mode  * _spr_access_mode;
-    
-  public : execute_register_t (void)
-    {
-      _spr               = new Tgeneral_data_t * [NB_GROUP];
-      _spr_access_mode   = new SPR_access_mode;
-  
-      for (uint32_t i=0; i<NB_GROUP; i++)
-	{
-	  _spr               [i] = NULL;
-	}
-    }
-
-  public : ~execute_register_t (void)
-    {
-      for (uint32_t x=0; x<NB_GROUP; x++)
-	if (_spr[x] != NULL)
-	  delete _spr[x];
-      delete _spr;
-      delete _spr_access_mode;
-    }
-
-  public : void implement_group (uint32_t num_group, uint32_t nb_reg)
-    {
-      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
-	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
-
-      if (nb_reg > 0)
-	{
-	  _spr [num_group] = new Tgeneral_data_t [nb_reg];
-
-	  if (num_group >= GROUP_CUSTOM_1)
-	    _spr_access_mode ->implement_group(num_group, nb_reg);
-	}
-    }
-
-  public : void implement_group (uint32_t num_group)
-    {
-      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
-	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
-
-      uint32_t nb_reg = _spr_access_mode ->implement_group(num_group);
-
-      if (nb_reg > 0)
-	_spr [num_group] = new Tgeneral_data_t [nb_reg];
-    }
-  };
-  
-  typedef void function_execute_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, 
-				   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
-				   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
-
-  typedef void function_execute_end_cycle_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
-					     morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
-
-  
-}; // end namespace functionnal_unit
-}; // end namespace execute_unit
-}; // end namespace multi_execute_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp	(revision 78)
@@ -71,4 +71,7 @@
        in_EXECUTE_IN_OPERATION     = interface->set_signal_in <Toperation_t      > ("operation"    , _param->_size_operation    );
        in_EXECUTE_IN_TYPE          = interface->set_signal_in <Ttype_t           > ("type"         , _param->_size_type         );
+       in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write",log2(_param->_size_store_queue));
+       if (_param->_have_port_load_queue_ptr)
+       in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue));
        in_EXECUTE_IN_HAS_IMMEDIAT  = interface->set_signal_in <Tcontrol_t        > ("has_immediat" , 1);
        in_EXECUTE_IN_IMMEDIAT      = interface->set_signal_in <Tgeneral_data_t   > ("immediat"     , _param->_size_general_data);
@@ -102,5 +105,5 @@
        out_EXECUTE_OUT_PACKET_ID      = interface->set_signal_out<Tpacket_t         > ("packet_id"    ,_param->_size_packet_id    );
      //out_EXECUTE_OUT_OPERATION      = interface->set_signal_out<Toperation_t      > ("operation"    ,_param->_size_operation    );
-     //out_EXECUTE_OUT_TYPE           = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type         );
+       out_EXECUTE_OUT_TYPE           = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type         );
        out_EXECUTE_OUT_WRITE_RD       = interface->set_signal_out<Tcontrol_t        > ("write_rd"     ,1);
        out_EXECUTE_OUT_NUM_REG_RD     = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd"   ,_param->_size_general_register);
@@ -111,5 +114,5 @@
        out_EXECUTE_OUT_EXCEPTION      = interface->set_signal_out<Texception_t      > ("exception"    ,_param->_size_exception);
        out_EXECUTE_OUT_NO_SEQUENCE    = interface->set_signal_out<Tcontrol_t        > ("no_sequence"  ,1);
-       out_EXECUTE_OUT_ADDRESS        = interface->set_signal_out<Tgeneral_data_t   > ("address     " ,_param->_size_general_data);
+       out_EXECUTE_OUT_ADDRESS        = interface->set_signal_out<Tgeneral_data_t   > ("address"      ,_param->_size_general_data);
      }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp	(revision 78)
@@ -41,4 +41,7 @@
 	delete  in_EXECUTE_IN_OPERATION     ;
 	delete  in_EXECUTE_IN_TYPE          ;
+	delete  in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
+	delete  in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE ;
 	delete  in_EXECUTE_IN_HAS_IMMEDIAT  ;
 	delete  in_EXECUTE_IN_IMMEDIAT      ;
@@ -62,5 +65,5 @@
 	delete out_EXECUTE_OUT_PACKET_ID      ; 
       //delete out_EXECUTE_OUT_OPERATION      ; 
-      //delete out_EXECUTE_OUT_TYPE           ; 
+	delete out_EXECUTE_OUT_TYPE           ; 
 	delete out_EXECUTE_OUT_WRITE_RD       ; 
 	delete out_EXECUTE_OUT_NUM_REG_RD     ; 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp	(revision 78)
@@ -37,5 +37,5 @@
     PORT_WRITE(out_EXECUTE_OUT_PACKET_ID    ,_execute_operation->_packet_id    );
   //PORT_WRITE(out_EXECUTE_OUT_OPERATION    ,_execute_operation->_operation    );
-  //PORT_WRITE(out_EXECUTE_OUT_TYPE         ,_execute_operation->_type         );
+    PORT_WRITE(out_EXECUTE_OUT_TYPE         ,_execute_operation->_type         );
     PORT_WRITE(out_EXECUTE_OUT_WRITE_RD     ,_execute_operation->_write_rd     );
     PORT_WRITE(out_EXECUTE_OUT_NUM_REG_RD   ,_execute_operation->_num_reg_rd   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Operation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Operation.cpp	(revision 77)
+++ 	(revision )
@@ -1,836 +1,0 @@
-#ifdef SYSTEMC
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h"
-
-#define neg(data)                  (~(data)+1)
-#define sign(data)                 ((data)>>(param->_size_data-1))
-#define unsigned(data)             (data)
-#define signed(data)               ((sign(data)==0)?(data):neg(data))
-#define ovf(op1, op2, res)         ((sign(op1) == sign(op2))?(sign(op1) xor sign(res)):0)
-#define carry(op1, op2, res)       (((res)<(op1)) or ((res)<(op2)))
-#define set_flag(data,flag,is_set) (((is_set)==1)?((data)|(flag)):((data)&~(flag)))
-#define get_flag(data,flag)	   (((data)&(flag))!=0)
-#define concatenation_bool(a,b)    (((a)<<1) | (b))
-
-namespace morpheo                    {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_execute_unit {
-namespace execute_unit {
-namespace functionnal_unit {
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_unimplemented"
-  void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : unimplemented");
-
-    throw ERRORMORPHEO(FUNCTION,"The operation '"+toString(op->_operation)+"' is not implemented in this Functionnal_unit");
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_add"
-  void operation_l_add         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_add");
-
-    Tgeneral_data_t gpr1      = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2      = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    
-    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
-
-    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
-    bool            carry_out = carry(gpr1,gpr2,gpr3);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-    op->_data_re      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
-    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
-    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_addc"
-  void operation_l_addc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_addc");
-
-    Tgeneral_data_t carry_in   = get_flag(op->_data_rc,FLAG_CY);
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = param->_mask_data & (gpr1 + gpr2 + carry_in);
-
-    bool            overflow   = ovf  (gpr1,gpr2,gpr3);
-    bool            carry_out  = carry(gpr1,gpr2,gpr3);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-    op->_data_re      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
-    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
-    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sub"
-  void operation_l_sub         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sub");
-
-    Tgeneral_data_t gpr1      =     unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2      = neg(unsigned(op->_data_rb));
-    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
-
-    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
-    bool            carry_out = carry(gpr1,gpr2,gpr3);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-    op->_data_re      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
-    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
-    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_and"
-  void operation_l_and         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_and");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = (gpr1 & gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_or"
-  void operation_l_or          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_or");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = (gpr1 | gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_xor"
-  void operation_l_xor         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_xor");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = (gpr1 ^ gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_movhi"
-  void operation_l_movhi       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_movhi");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_immediat);
-    Tgeneral_data_t gpr2       = param->_mask_data & (gpr1<<16);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_cmov"
-  void operation_l_cmov        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_cmov");
-
-    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
-    Tgeneral_data_t gpr3       = ((f_in==0)?gpr2:gpr1);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_test_f"
-  void operation_l_test_f      (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_f");
-
-    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = f_in != 0;
-    op->_address      = imm;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_test_nf"
-  void operation_l_test_nf     (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_nf");
-
-    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = f_in == 0;
-    op->_address      = imm;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_jalr"
-  void operation_l_jalr        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_jalr");
-    // jal  : has_imm = 1, write_rd = 1, read_rb = 0
-    // jalr : has_imm = 1, write_rd = 1, read_rb = 1
-    // jr   : has_imm = 0, write_rd = 0, read_rb = 1
-
-
-    Tgeneral_data_t gpr        = unsigned(op->_data_rb);
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = imm;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 1;
-    op->_address      = gpr;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_extend_s"
-  void operation_l_extend_s    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_s");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, true , imm);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_extend_z"
-  void operation_l_extend_z    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_z");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, false , imm);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sll"
-  void operation_l_sll         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sll");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = shift_logic_left<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_srl"
-  void operation_l_srl         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_srl");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = shift_logic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sra"
-  void operation_l_sra         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sra");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = shift_arithmetic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_ror"
-  void operation_l_ror         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ror");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = rotate_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_ff1"
-  void operation_l_ff1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ff1");
-
-    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
-    Tgeneral_data_t index;
-
-    for (index=0; (index<param->_size_data) and (((gpr>>index)&1)!= 1); index++);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = (index==param->_size_data)?0:(index+1);
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_fl1"
-  void operation_l_fl1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_fl1");
-
-    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
-    Tgeneral_data_t index;
-
-    for (index=param->_size_data; (index>0) and (((gpr>>(index-1))&1)!= 1); index--);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = index;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfeq"
-  void operation_l_sfeq        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfeq");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 == gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfne"
-  void operation_l_sfne        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfne");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 != gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfgeu"
-  void operation_l_sfgeu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgeu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 >= gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfgtu"
-  void operation_l_sfgtu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgtu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 >  gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfleu"
-  void operation_l_sfleu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfleu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 <= gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfltu"
-  void operation_l_sfltu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfltu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 <  gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfges"
-  void operation_l_sfges       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfges");
-
-    Tgeneral_data_t gpr1       =   op->_data_ra;
-    Tgeneral_data_t gpr2       =   (op->_has_immediat==1)?op->_immediat:op->_data_rb;
-    
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra  : %.8x",unsigned(op->_data_ra));
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ras : %.8x",  signed(op->_data_ra));
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb  : %.8x",unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb));
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rbs : %.8x",  signed((op->_has_immediat==1)?op->_immediat:op->_data_rb));
-    
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 1                               ; break;
-      case 2 /*b10*/ : f_out = 0                               ; break;
-      default        : f_out = signed(gpr1) >= signed(gpr2); break;
-      }
-
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * f_out    : %.8x",f_out);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfgts"
-  void operation_l_sfgts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgts");
-
-    Tgeneral_data_t gpr1       = op->_data_ra ;
-    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
-
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 1; break;
-      case 2 /*b10*/ : f_out = 0; break;
-      default        : f_out = signed(gpr1) >  signed(gpr2); break;
-      }
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfles"
-  void operation_l_sfles       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfles");
-
-    Tgeneral_data_t gpr1       = op->_data_ra ;
-    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
-
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 0; break;
-      case 2 /*b10*/ : f_out = 1; break;
-      default        : f_out = signed(gpr1) <= signed(gpr2); break;
-      }
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sflts"
-  void operation_l_sflts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sflts");
-
-    Tgeneral_data_t gpr1       = op->_data_ra ;
-    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb;
-
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 0; break;
-      case 2 /*b10*/ : f_out = 1; break;
-      default        : f_out = signed(gpr1) <  signed(gpr2); break;
-      }
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_mtspr"
-  void operation_l_mtspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mtspr");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
-    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
-
-    Texception_t    exception;
-
-    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
-    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
-    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
-
-    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
-    
-    // Test if this group is implemented in this functionnal_unit
-    if (reg->_spr_access_mode->valid(spr_addr))
-      {
-	if (reg->_spr_access_mode->write(spr_addr, flag_SM, flag_SUMRA))
-	  {
-	    reg->_i_write_spr         = true;
-	    reg->_access_num_group    = spr_addr._group;
-	    reg->_access_num_register = spr_addr._register;
-	    reg->_spr_old             = reg->_spr[spr_addr._group][spr_addr._register];
-	    reg->_spr[spr_addr._group][spr_addr._register] = gpr2;
-
-	    exception = EXCEPTION_ALU_NONE;
-	  }
-	else
-	  {
-	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
-	  }
-      }
-    else
-      {
-	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
-      }
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2; // data_rb
-  //op->_data_re      = 0;
-    op->_exception    = exception;
-    op->_no_sequence  = 0;
-    op->_address      = addr; // data_ra or imm
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_mfspr"
-  void operation_l_mfspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mfspr");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = 0;
-    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
-
-    Texception_t    exception;
-
-    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
-    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
-    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
-
-    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
-    
-    // Test if this group is implemented in this functionnal_unit
-    if (reg->_spr_access_mode->valid(spr_addr))
-      {
-	if (reg->_spr_access_mode->read(spr_addr, flag_SM, flag_SUMRA))
-	  {
-	    reg->_i_read_spr          = true;
-	    reg->_access_num_group    = spr_addr._group;
-	    reg->_access_num_register = spr_addr._register;
-	    
-	    gpr2 = reg->_spr[spr_addr._group][spr_addr._register];
-
-	    exception = EXCEPTION_ALU_NONE;
-	  }
-	else
-	  {
-	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
-	  }
-      }
-    else
-      {
-	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
-      }
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_write_rd     = (exception == EXCEPTION_ALU_NONE);
-    op->_data_rd      = gpr2; // spr
-  //op->_data_re      = 0;
-    op->_exception    = exception;
-    op->_no_sequence  = 0;
-    op->_address      = addr; // data_ra or imm
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_macrc"
-  void operation_l_macrc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_macrc");
-
-    Tgeneral_data_t gpr = static_cast<Tgeneral_data_t>(range<uint64_t>((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO]), param->_size_data));
-
-    reg->_spr[GROUP_MAC][SPR_MACLO] = 0;
-    reg->_spr[GROUP_MAC][SPR_MACHI] = 0;
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_mac"
-  void operation_l_mac          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mac");
-
-    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
-
-    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) + temp;
-
-    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
-    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_msb"
-  void operation_l_msb          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_msb");
-
-    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
-
-    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) - temp;
-
-    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
-    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-}; // end namespace functionnal_unit
-}; // end namespace execute_unit
-}; // end namespace multi_execute_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp	(revision 78)
@@ -28,4 +28,6 @@
 			  uint32_t           size_special_data  ,
 			  uint32_t           nb_special_register,
+			  uint32_t           size_store_queue   ,
+			  uint32_t           size_load_queue    ,
 			  execute_timing_t** timing             ,
 			  morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)) :
@@ -38,11 +40,13 @@
     _size_special_data       (size_special_data     ),
     _nb_special_register     (nb_special_register   ),
-    
+    _size_store_queue        (size_store_queue      ),
+    _size_load_queue         (size_load_queue       ),
+
     _size_context_id         (log2(nb_context      )),
     _size_front_end_id       (log2(nb_front_end    )),
     _size_ooo_engine_id      (log2(nb_ooo_engine   )),
     _size_packet_id          (log2(nb_packet       )),
-    _size_general_register   (log2(_size_general_register)),
-    _size_special_register   (log2(_size_special_register)),
+    _size_general_register   (log2(nb_general_register)),
+    _size_special_register   (log2(nb_special_register)),
 
     _have_port_context_id    (_size_context_id    > 0),
@@ -50,4 +54,5 @@
     _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
     _have_port_packet_id     (_size_packet_id     > 0),
+    _have_port_load_queue_ptr(_size_load_queue    > 1),
 
     _have_groupe_MAC         ( (timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC  ]._latence > 0) or
@@ -58,5 +63,9 @@
 
     _timing                 = timing;
-    _get_custom_information = get_custom_information;
+
+    if (get_custom_information == NULL)
+      _get_custom_information = &(morpheo::behavioural::custom::default_get_custom_information);
+    else
+      _get_custom_information = get_custom_information;
 
     test();
@@ -76,4 +85,6 @@
     _size_special_data       (param._size_special_data      ),
     _nb_special_register     (param._nb_special_register    ),
+    _size_store_queue        (param._size_store_queue       ),
+    _size_load_queue         (param._size_load_queue        ),
 
     _size_context_id         (param._size_context_id        ),
@@ -88,4 +99,5 @@
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     _have_port_packet_id     (param._have_port_packet_id    ),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr),
 
     _have_groupe_MAC         (param._have_groupe_MAC        )
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -22,23 +22,23 @@
 #undef  FUNCTION
 #define FUNCTION "Functionnal_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
+    Parameters_test test("Functionnal_unit");
 
     for (uint32_t i=0; i<_nb_type; i++)
       for (uint32_t j=0; j<_nb_operation; j++)
 	if (_timing[i][j]._delay != _timing[i][j]._latence)
-	  msg = "  - For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal.";
+	  test.error("For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal.");
 
     if (_have_groupe_MAC and ((_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC  ]._latence == 0) or
 			      (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MACRC]._latence == 0) or
 			      (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MSB  ]._latence == 0)))
-      msg = "  - The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.";
-
-    return msg;
+      test.error("The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.");
 
     log_printf(FUNC,Functionnal_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg	(revision 78)
@@ -5,4 +5,5 @@
 2	2	+1	# nb_port_check
 2	2	+1	# speculative_load       {none,access,commit,bypass}
+0	0	+1	# bypass_memory
 2	2	*2	# nb_context             1	1	*2	
 2	2	*2	# nb_front_end		 1	1	*2	
@@ -10,3 +11,5 @@
 64	64	*2	# nb_packet              
 32	32	*2	# size_general_data      
+2	2	*2	# size_special_data      
 32	32	*2	# nb_general_register    
+16	16	*2	# nb_special_register    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp	(revision 78)
@@ -10,5 +10,5 @@
 #define number_of_test 2
 
-#define NB_PARAMS 11
+#define NB_PARAMS 14
 
 void usage (int argc, char * argv[])
@@ -21,4 +21,5 @@
        << " - nb_port_check           (uint32_t)" << endl
        << " - speculative_load        (uint32_t)" << endl
+       << " - nb_bypass_memory        (uint32_t)" << endl
        << " - nb_context              (uint32_t)" << endl
        << " - nb_front_end            (uint32_t)" << endl
@@ -26,5 +27,7 @@
        << " - nb_packet               (uint32_t)" << endl
        << " - size_general_data       (uint32_t)" << endl
+       << " - size_special_data       (uint32_t)" << endl
        << " - nb_general_register     (uint32_t)" << endl
+       << " - nb_special_register     (uint32_t)" << endl
        << "" << endl;
 
@@ -58,4 +61,5 @@
 	const uint32_t            _nb_port_check           = atoi(argv[x++]);
 	const Tspeculative_load_t _speculative_load        = fromString<Tspeculative_load_t>(argv[x++]);
+	const uint32_t            _nb_bypass_memory        = atoi(argv[x++]);
 	const uint32_t            _nb_context              = atoi(argv[x++]);
 	const uint32_t            _nb_front_end            = atoi(argv[x++]);
@@ -63,5 +67,7 @@
 	const uint32_t            _nb_packet               = atoi(argv[x++]);
 	const uint32_t            _size_general_data       = atoi(argv[x++]);
+	const uint32_t            _size_special_data       = atoi(argv[x++]);
 	const uint32_t            _nb_general_register     = atoi(argv[x++]);
+	const uint32_t            _nb_special_register     = atoi(argv[x++]);
 	
 	try 
@@ -74,4 +80,5 @@
 	       _nb_port_check          ,
 	       _speculative_load       ,
+	       _nb_bypass_memory       ,
 	       _nb_context             ,
 	       _nb_front_end           ,
@@ -79,5 +86,7 @@
 	       _nb_packet              ,
 	       _size_general_data      ,
-	       _nb_general_register    );
+	       _size_special_data      ,
+	       _nb_general_register    ,
+	       _nb_special_register    );
 	    
 	    cout << param->print(1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp	(revision 78)
@@ -73,13 +73,13 @@
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_IMMEDIAT              = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RA               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RB               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  //sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
-//   sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_address_t> *   in_MEMORY_IN_NUM_REG_RD            = new sc_signal<Tgeneral_address_t> (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
-  //sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
 
   sc_signal<Tcontrol_t	      > *  out_MEMORY_OUT_VAL           = new sc_signal<Tcontrol_t	  >(rename.c_str());
@@ -89,11 +89,15 @@
   sc_signal<Tcontext_t        > *  out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t        >(rename.c_str());
   sc_signal<Tpacket_t         > *  out_MEMORY_OUT_PACKET_ID     = new sc_signal<Tpacket_t         >(rename.c_str());
+//   sc_signal<Toperation_t      > *  out_MEMORY_OUT_OPERATION     = new sc_signal<Toperation_t      >(rename.c_str());
+  sc_signal<Ttype_t           > *  out_MEMORY_OUT_TYPE          = new sc_signal<Ttype_t           >(rename.c_str());
   sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RD      = new sc_signal<Tcontrol_t        >(rename.c_str());
   sc_signal<Tgeneral_address_t> *  out_MEMORY_OUT_NUM_REG_RD    = new sc_signal<Tgeneral_address_t>(rename.c_str());
   sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_DATA_RD       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-  //sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
-  //sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
-  //sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
+  sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
   sc_signal<Texception_t      > *  out_MEMORY_OUT_EXCEPTION     = new sc_signal<Texception_t      >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_NO_SEQUENCE   = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_ADDRESS       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
 
   sc_signal<Tcontrol_t        > * out_DCACHE_REQ_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -112,10 +116,10 @@
   sc_signal<Tdcache_error_t   > *  in_DCACHE_RSP_ERROR      = new sc_signal<Tdcache_error_t   >(rename.c_str());
   
-  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_size_load_queue];
-  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_size_load_queue];
-  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue];
-  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_size_load_queue];
+  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
     
-  for (uint32_t i=0; i<_param->_size_load_queue; i++)
+  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
     {
       out_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -137,41 +141,47 @@
   (*(_Load_store_unit->out_MEMORY_IN_ACK                  ))(*(out_MEMORY_IN_ACK                  ));
   if (_param->_have_port_context_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID           ))(*( in_MEMORY_IN_CONTEXT_ID           ));
+  (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID           ))(*( in_MEMORY_IN_CONTEXT_ID           ));
   if (_param->_have_port_front_end_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID         ))(*( in_MEMORY_IN_FRONT_END_ID         ));
+  (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID         ))(*( in_MEMORY_IN_FRONT_END_ID         ));
   if (_param->_have_port_ooo_engine_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID        ))(*( in_MEMORY_IN_OOO_ENGINE_ID        ));
+  (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID        ))(*( in_MEMORY_IN_OOO_ENGINE_ID        ));
   if (_param->_have_port_packet_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
+  (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
   (*(_Load_store_unit-> in_MEMORY_IN_OPERATION            ))(*( in_MEMORY_IN_OPERATION            ));
+  (*(_Load_store_unit-> in_MEMORY_IN_TYPE                 ))(*( in_MEMORY_IN_TYPE                 ));
   (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
+  (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
   (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT             ))(*( in_MEMORY_IN_IMMEDIAT             ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA              ))(*( in_MEMORY_IN_DATA_RA              ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB              ))(*( in_MEMORY_IN_DATA_RB              ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
-//   (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
   (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD           ))(*( in_MEMORY_IN_NUM_REG_RD           ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
   
   (*(_Load_store_unit->out_MEMORY_OUT_VAL           ))(*(out_MEMORY_OUT_VAL           ));
   (*(_Load_store_unit-> in_MEMORY_OUT_ACK           ))(*( in_MEMORY_OUT_ACK           ));
   if (_param->_have_port_context_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID    ))(*(out_MEMORY_OUT_CONTEXT_ID    ));
+  (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID    ))(*(out_MEMORY_OUT_CONTEXT_ID    ));
   if (_param->_have_port_front_end_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID  ))(*(out_MEMORY_OUT_FRONT_END_ID  ));
+  (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID  ))(*(out_MEMORY_OUT_FRONT_END_ID  ));
   if (_param->_have_port_ooo_engine_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID ));
+  (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID ));
   if (_param->_have_port_packet_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
+//   (*(_Load_store_unit->out_MEMORY_OUT_OPERATION     ))(*(out_MEMORY_OUT_OPERATION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_TYPE          ))(*(out_MEMORY_OUT_TYPE          ));
   (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD      ))(*(out_MEMORY_OUT_WRITE_RD      ));
   (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD    ))(*(out_MEMORY_OUT_NUM_REG_RD    ));
   (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD       ))(*(out_MEMORY_OUT_DATA_RD       ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
+  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
+  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
   (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION     ))(*(out_MEMORY_OUT_EXCEPTION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE   ))(*(out_MEMORY_OUT_NO_SEQUENCE   ));
+  (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS       ))(*(out_MEMORY_OUT_ADDRESS       ));
 
   (*(_Load_store_unit->out_DCACHE_REQ_VAL       ))(*(out_DCACHE_REQ_VAL       ));
@@ -192,7 +202,6 @@
   (*(_Load_store_unit-> in_DCACHE_RSP_ERROR     ))(*( in_DCACHE_RSP_ERROR     ));
 
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
-      for (uint32_t i=0; i<_param->_size_load_queue; i++)
+      for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	{
 	  (*(_Load_store_unit->out_BYPASS_MEMORY_VAL           [i]))(*(out_BYPASS_MEMORY_VAL           [i]));
@@ -486,4 +495,5 @@
 	      in_MEMORY_IN_TYPE                 ->write (fifo_request.top()._type                 );
 	      in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);
+	      if (_param->_have_port_load_queue_ptr)
 	      in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );
 	      in_MEMORY_IN_IMMEDIAT             ->write (fifo_request.top()._immediat             );
@@ -563,4 +573,6 @@
 		  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id);
 		  TEST(Tpacket_t         , out_MEMORY_OUT_PACKET_ID    ->read(), tab_request[packet_id]._packet_id    );
+// 		  TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    ->read(), tab_request[packet_id]._operation    );
+		  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         ->read(), TYPE_MEMORY                          );
 		  TEST(Tcontrol_t        , out_MEMORY_OUT_WRITE_RD     ->read(), tab_request[packet_id]._write_rd     );
 		  TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD   ->read(), tab_request[packet_id]._num_reg_rd   );
@@ -682,13 +694,13 @@
   delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-  //delete     in_MEMORY_IN_HAS_IMMEDIAT;
+  delete     in_MEMORY_IN_HAS_IMMEDIAT;
   delete     in_MEMORY_IN_IMMEDIAT    ;
   delete     in_MEMORY_IN_DATA_RA     ;
   delete     in_MEMORY_IN_DATA_RB     ;
-  //delete     in_MEMORY_IN_DATA_RC     ;
-//   delete     in_MEMORY_IN_WRITE_RD    ;
+  delete     in_MEMORY_IN_DATA_RC     ;
+  delete     in_MEMORY_IN_WRITE_RD    ;
   delete     in_MEMORY_IN_NUM_REG_RD  ;
-  //delete     in_MEMORY_IN_WRITE_RE    ;
-  //delete     in_MEMORY_IN_NUM_REG_RE  ;
+  delete     in_MEMORY_IN_WRITE_RE    ;
+  delete     in_MEMORY_IN_NUM_REG_RE  ;
     
   delete    out_MEMORY_OUT_VAL       ;
@@ -698,11 +710,15 @@
   delete    out_MEMORY_OUT_OOO_ENGINE_ID;
   delete    out_MEMORY_OUT_PACKET_ID ;
+//   delete    out_MEMORY_OUT_OPERATION ;
+  delete    out_MEMORY_OUT_TYPE      ;
   delete    out_MEMORY_OUT_WRITE_RD  ;
   delete    out_MEMORY_OUT_NUM_REG_RD;
   delete    out_MEMORY_OUT_DATA_RD   ;
-  //delete    out_MEMORY_OUT_WRITE_RE  ;
-  //delete    out_MEMORY_OUT_NUM_REG_RE;
-  //delete    out_MEMORY_OUT_DATA_RE   ;
+  delete    out_MEMORY_OUT_WRITE_RE  ;
+  delete    out_MEMORY_OUT_NUM_REG_RE;
+  delete    out_MEMORY_OUT_DATA_RE   ;
   delete    out_MEMORY_OUT_EXCEPTION ;
+  delete    out_MEMORY_OUT_NO_SEQUENCE;
+  delete    out_MEMORY_OUT_ADDRESS   ;
   
   delete    out_DCACHE_REQ_VAL       ;
@@ -721,5 +737,4 @@
   delete     in_DCACHE_RSP_ERROR     ;
   
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
       delete [] out_BYPASS_MEMORY_VAL       ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 78)
@@ -52,4 +52,5 @@
 	 2,  //_nb_port_check          
 	 SPECULATIVE_LOAD_COMMIT,  //_speculative_load       
+	 0,  //_nb_bypass_memory
 	 1,  //_nb_context             
 	 1,  //_nb_front_end           
@@ -57,5 +58,7 @@
 	 128,//_nb_packet              
 	 32, //_size_general_data      
-	 64  //_nb_general_register    
+	 2 , //_size_special_data      
+	 64, //_nb_general_register    
+	 16  //_nb_special_register    
         );
 
@@ -89,13 +92,13 @@
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_IMMEDIAT              = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RA               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RB               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  //sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
-//   sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_address_t> *   in_MEMORY_IN_NUM_REG_RD            = new sc_signal<Tgeneral_address_t> (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
-  //sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
 
   sc_signal<Tcontrol_t	      > *  out_MEMORY_OUT_VAL           = new sc_signal<Tcontrol_t	  >(rename.c_str());
@@ -105,11 +108,15 @@
   sc_signal<Tcontext_t        > *  out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t        >(rename.c_str());
   sc_signal<Tpacket_t         > *  out_MEMORY_OUT_PACKET_ID     = new sc_signal<Tpacket_t         >(rename.c_str());
+//   sc_signal<Toperation_t      > *  out_MEMORY_OUT_OPERATION     = new sc_signal<Toperation_t      >(rename.c_str());
+  sc_signal<Ttype_t           > *  out_MEMORY_OUT_TYPE          = new sc_signal<Ttype_t           >(rename.c_str());
   sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RD      = new sc_signal<Tcontrol_t        >(rename.c_str());
   sc_signal<Tgeneral_address_t> *  out_MEMORY_OUT_NUM_REG_RD    = new sc_signal<Tgeneral_address_t>(rename.c_str());
   sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_DATA_RD       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-  //sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
-  //sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
-  //sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
+  sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
   sc_signal<Texception_t      > *  out_MEMORY_OUT_EXCEPTION     = new sc_signal<Texception_t      >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_NO_SEQUENCE   = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_ADDRESS       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
 
   sc_signal<Tcontrol_t        > * out_DCACHE_REQ_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -128,10 +135,10 @@
   sc_signal<Tdcache_error_t   > *  in_DCACHE_RSP_ERROR      = new sc_signal<Tdcache_error_t   >(rename.c_str());
   
-  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_size_load_queue];
-  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_size_load_queue];
-  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue];
-  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_size_load_queue];
+  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
     
-  for (uint32_t i=0; i<_param->_size_load_queue; i++)
+  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
     {
       out_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -161,15 +168,17 @@
     (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
   (*(_Load_store_unit-> in_MEMORY_IN_OPERATION            ))(*( in_MEMORY_IN_OPERATION            ));
+  (*(_Load_store_unit-> in_MEMORY_IN_TYPE                 ))(*( in_MEMORY_IN_TYPE                 ));
   (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
+  (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
   (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT             ))(*( in_MEMORY_IN_IMMEDIAT             ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA              ))(*( in_MEMORY_IN_DATA_RA              ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB              ))(*( in_MEMORY_IN_DATA_RB              ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
-//   (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
   (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD           ))(*( in_MEMORY_IN_NUM_REG_RD           ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
   
   (*(_Load_store_unit->out_MEMORY_OUT_VAL           ))(*(out_MEMORY_OUT_VAL           ));
@@ -183,11 +192,15 @@
   if (_param->_have_port_packet_id)
     (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
+//   (*(_Load_store_unit->out_MEMORY_OUT_OPERATION     ))(*(out_MEMORY_OUT_OPERATION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_TYPE          ))(*(out_MEMORY_OUT_TYPE          ));
   (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD      ))(*(out_MEMORY_OUT_WRITE_RD      ));
   (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD    ))(*(out_MEMORY_OUT_NUM_REG_RD    ));
   (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD       ))(*(out_MEMORY_OUT_DATA_RD       ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
+  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
+  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
   (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION     ))(*(out_MEMORY_OUT_EXCEPTION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE   ))(*(out_MEMORY_OUT_NO_SEQUENCE   ));
+  (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS       ))(*(out_MEMORY_OUT_ADDRESS       ));
 
   (*(_Load_store_unit->out_DCACHE_REQ_VAL       ))(*(out_DCACHE_REQ_VAL       ));
@@ -208,7 +221,6 @@
   (*(_Load_store_unit-> in_DCACHE_RSP_ERROR     ))(*( in_DCACHE_RSP_ERROR     ));
 
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
-      for (uint32_t i=0; i<_param->_size_load_queue; i++)
+      for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	{
 	  (*(_Load_store_unit->out_BYPASS_MEMORY_VAL           [i]))(*(out_BYPASS_MEMORY_VAL           [i]));
@@ -448,4 +460,5 @@
 		  in_MEMORY_IN_TYPE                 ->write (fifo_request.top()._type                 );
 		  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);
+		  if (_param->_have_port_load_queue_ptr)
 		  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );
 		  in_MEMORY_IN_IMMEDIAT             ->write (fifo_request.top()._immediat             );
@@ -533,4 +546,6 @@
 		  TEST(Tcontext_t        , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id );
 		  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id);
+// 		  TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    ->read(), tab_request[packet_id]._operation    );
+		  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         ->read(), TYPE_MEMORY                          );
 
 		  if (is_operation_memory_load (tab_request[packet_id]._operation))
@@ -721,13 +736,13 @@
   delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-  //delete     in_MEMORY_IN_HAS_IMMEDIAT;
+  delete     in_MEMORY_IN_HAS_IMMEDIAT;
   delete     in_MEMORY_IN_IMMEDIAT    ;
   delete     in_MEMORY_IN_DATA_RA     ;
   delete     in_MEMORY_IN_DATA_RB     ;
-  //delete     in_MEMORY_IN_DATA_RC     ;
-//   delete     in_MEMORY_IN_WRITE_RD    ;
+  delete     in_MEMORY_IN_DATA_RC     ;
+  delete     in_MEMORY_IN_WRITE_RD    ;
   delete     in_MEMORY_IN_NUM_REG_RD  ;
-  //delete     in_MEMORY_IN_WRITE_RE    ;
-  //delete     in_MEMORY_IN_NUM_REG_RE  ;
+  delete     in_MEMORY_IN_WRITE_RE    ;
+  delete     in_MEMORY_IN_NUM_REG_RE  ;
     
   delete    out_MEMORY_OUT_VAL       ;
@@ -737,11 +752,15 @@
   delete    out_MEMORY_OUT_OOO_ENGINE_ID;
   delete    out_MEMORY_OUT_PACKET_ID ;
+//   delete    out_MEMORY_OUT_OPERATION ;
+  delete    out_MEMORY_OUT_TYPE      ;
   delete    out_MEMORY_OUT_WRITE_RD  ;
   delete    out_MEMORY_OUT_NUM_REG_RD;
   delete    out_MEMORY_OUT_DATA_RD   ;
-  //delete    out_MEMORY_OUT_WRITE_RE  ;
-  //delete    out_MEMORY_OUT_NUM_REG_RE;
-  //delete    out_MEMORY_OUT_DATA_RE   ;
+  delete    out_MEMORY_OUT_WRITE_RE  ;
+  delete    out_MEMORY_OUT_NUM_REG_RE;
+  delete    out_MEMORY_OUT_DATA_RE   ;
   delete    out_MEMORY_OUT_EXCEPTION ;
+  delete    out_MEMORY_OUT_NO_SEQUENCE;
+  delete    out_MEMORY_OUT_ADDRESS   ;
   
   delete    out_DCACHE_REQ_VAL       ;
@@ -760,5 +779,4 @@
   delete     in_DCACHE_RSP_ERROR     ;
   
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
       delete [] out_BYPASS_MEMORY_VAL       ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h	(revision 78)
@@ -5,5 +5,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  * Ce composant peut être amélioré en placant deux ptr de lecture au lieu d'un : un pour l'accès au cache et un pour le commit
@@ -46,5 +46,5 @@
 #endif
   {
-    // -----[ fields ]----------------------------------------------------
+    // -----[ fields ]----------------------------------------------------
     // Parameters
   protected : const std::string       _name;
@@ -53,5 +53,5 @@
 
 #ifdef STATISTICS
-  private   : Stat                           * _stat;
+  public    : Stat                           * _stat;
 
   private   : counter_t                      * _stat_use_store_queue;
@@ -83,10 +83,10 @@
 
 #ifdef SYSTEMC
-    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     // Interface
   public    : SC_CLOCK                      *  in_CLOCK        ;
   public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
 
-    // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_VAL         ;
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_IN_ACK         ;
@@ -96,18 +96,18 @@
   public    : SC_IN (Tpacket_t         )    *  in_MEMORY_IN_PACKET_ID   ;
   public    : SC_IN (Toperation_t      )    *  in_MEMORY_IN_OPERATION   ;
-//public    : SC_IN (Ttype_t           )    *  in_MEMORY_IN_TYPE        ;
+  public    : SC_IN (Ttype_t           )    *  in_MEMORY_IN_TYPE        ;
   public    : SC_IN (Tlsq_ptr_t        )    *  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   public    : SC_IN (Tlsq_ptr_t        )    *  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-//public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_HAS_IMMEDIAT;
+  public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_HAS_IMMEDIAT;
   public    : SC_IN (Tgeneral_data_t   )    *  in_MEMORY_IN_IMMEDIAT    ; // memory address
   public    : SC_IN (Tgeneral_data_t   )    *  in_MEMORY_IN_DATA_RA     ; // memory address
   public    : SC_IN (Tgeneral_data_t   )    *  in_MEMORY_IN_DATA_RB     ; // data        (store)
-//public    : SC_IN (Tspecial_data_t   )    *  in_MEMORY_IN_DATA_RC     ;
-//public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RD    ; // = (operation==load)
+  public    : SC_IN (Tspecial_data_t   )    *  in_MEMORY_IN_DATA_RC     ;
+  public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RD    ; // = (operation==load)
   public    : SC_IN (Tgeneral_address_t)    *  in_MEMORY_IN_NUM_REG_RD  ; // destination (load)
-//public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RE    ;
-//public    : SC_IN (Tspecial_address_t)    *  in_MEMORY_IN_NUM_REG_RE  ;
-
-    // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RE    ;
+  public    : SC_IN (Tspecial_address_t)    *  in_MEMORY_IN_NUM_REG_RE  ;
+
+    // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_VAL       ;
   public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_OUT_ACK       ;
@@ -116,13 +116,18 @@
   public    : SC_OUT(Tcontext_t        )    * out_MEMORY_OUT_OOO_ENGINE_ID;
   public    : SC_OUT(Tpacket_t         )    * out_MEMORY_OUT_PACKET_ID ;
+//public    : SC_OUT(Toperation_t      )    * out_MEMORY_OUT_OPERATION ;
+  public    : SC_OUT(Ttype_t           )    * out_MEMORY_OUT_TYPE      ;
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RD  ; // = (operation==load)
   public    : SC_OUT(Tgeneral_address_t)    * out_MEMORY_OUT_NUM_REG_RD; // destination (load)
   public    : SC_OUT(Tgeneral_data_t   )    * out_MEMORY_OUT_DATA_RD   ; // data        (load)
-//public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RE  ;
-//public    : SC_OUT(Tspecial_address_t)    * out_MEMORY_OUT_NUM_REG_RE;
-//public    : SC_OUT(Tspecial_data_t   )    * out_MEMORY_OUT_DATA_RE   ;
+  public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RE  ;
+  public    : SC_OUT(Tspecial_address_t)    * out_MEMORY_OUT_NUM_REG_RE;
+  public    : SC_OUT(Tspecial_data_t   )    * out_MEMORY_OUT_DATA_RE   ;
   public    : SC_OUT(Texception_t      )    * out_MEMORY_OUT_EXCEPTION ;
-
-    // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_NO_SEQUENCE;
+  public    : SC_OUT(Tgeneral_data_t   )    * out_MEMORY_OUT_ADDRESS   ;
+    
+
+    // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_OUT(Tcontrol_t        )    * out_DCACHE_REQ_VAL       ;
   public    : SC_IN (Tcontrol_t        )    *  in_DCACHE_REQ_ACK       ;
@@ -133,5 +138,5 @@
   public    : SC_OUT(Tdcache_data_t    )    * out_DCACHE_REQ_WDATA     ;
 
-    // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )    *  in_DCACHE_RSP_VAL       ;
   public    : SC_OUT(Tcontrol_t        )    * out_DCACHE_RSP_ACK       ;
@@ -141,5 +146,5 @@
   public    : SC_IN (Tdcache_error_t   )    *  in_DCACHE_RSP_ERROR     ;
 
-    // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_OUT(Tcontrol_t        )   ** out_BYPASS_MEMORY_VAL       ;
   public    : SC_OUT(Tcontext_t        )   ** out_BYPASS_MEMORY_OOO_ENGINE_ID;
@@ -147,5 +152,5 @@
   public    : SC_OUT(Tgeneral_data_t   )   ** out_BYPASS_MEMORY_DATA      ;
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
   protected : Tstore_queue_entry_t                                        * _store_queue;
   protected : Tload_queue_entry_t                                         * _load_queue;
@@ -160,7 +165,7 @@
   public    : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit::*function_genMealy_retire) (void);
 
-    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-
-    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
     // Registers
@@ -182,5 +187,5 @@
 #endif
 
-    // -----[ methods ]---------------------------------------------------
+    // -----[ methods ]---------------------------------------------------
 
 #ifdef SYSTEMC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h	(revision 78)
@@ -32,4 +32,5 @@
   public : const uint32_t            _nb_port_check                ;
   public : const Tspeculative_load_t _speculative_load             ;
+  public : const uint32_t            _nb_bypass_memory             ;
 //public : const uint32_t            _nb_cache_port                ;
   public : const uint32_t            _nb_context                   ;
@@ -38,5 +39,7 @@
   public : const uint32_t            _nb_packet                    ;
   public : const uint32_t            _size_general_data            ;
+  public : const uint32_t            _size_special_data            ;
   public : const uint32_t            _nb_general_register          ;
+  public : const uint32_t            _nb_special_register          ;
 
   public : const uint32_t            _size_address_store_queue             ;
@@ -48,4 +51,5 @@
   public : const uint32_t            _size_packet_id                       ;
   public : const uint32_t            _size_general_register                ;
+  public : const uint32_t            _size_special_register                ;
   public : const uint32_t            _size_dcache_context_id               ;
   public : const uint32_t            _size_dcache_packet_id                ;
@@ -56,4 +60,5 @@
   public : const bool                _have_port_packet_id                  ;
   public : const bool                _have_port_dcache_context_id          ;
+  public : const bool                _have_port_load_queue_ptr             ;
 
   public : const Tdcache_address_t   _mask_address_lsb                     ;
@@ -66,4 +71,5 @@
 			uint32_t            nb_port_check          ,
 			Tspeculative_load_t speculative_load       ,
+			uint32_t            nb_bypass_memory       ,
 			uint32_t            nb_context             ,
 			uint32_t            nb_front_end           ,
@@ -71,10 +77,12 @@
 			uint32_t            nb_packet              ,
 			uint32_t            size_general_data      ,
-			uint32_t            nb_general_register    );
+			uint32_t            size_special_data      ,
+			uint32_t            nb_general_register    ,
+			uint32_t            nb_special_register    );
 
   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
 
-  public : std::string msg_error (void);
+  public : Parameters_test msg_error (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h	(revision 78)
@@ -33,8 +33,8 @@
   typedef enum 
     {
-      NO_SPECULATIVE_LOAD    , //each load wait all previous store before the data cache access
-      SPECULATIVE_LOAD_ACCESS, //each load wait all previous store before the commiting
-      SPECULATIVE_LOAD_COMMIT, //each load commit the result before the end of dependence's check
-      SPECULATIVE_LOAD_BYPASS  //each load bypass the result before the end of dependence's check
+       NO_SPECULATIVE_LOAD     //each load wait all previous store before the data cache access
+      ,SPECULATIVE_LOAD_ACCESS //each load wait all previous store before the commiting
+      ,SPECULATIVE_LOAD_COMMIT //each load commit the result before the end of dependence's check
+    //,SPECULATIVE_LOAD_BYPASS //each load bypass the result before the end of dependence's check
     } Tspeculative_load_t; 
   
@@ -212,5 +212,5 @@
       case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_ACCESS : return "speculative_load_access"; break;
       case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT : return "speculative_load_commit"; break;
-      case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break;
+//       case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break;
       default    : return ""      ; break;
       }
@@ -228,7 +228,7 @@
          (x.compare("speculative_load_commit") == 0))
       return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT;
-    if ( (x.compare("3")                       == 0) or
-         (x.compare("speculative_load_bypass") == 0))
-      return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS;
+//     if ( (x.compare("3")                       == 0) or
+//          (x.compare("speculative_load_bypass") == 0))
+//       return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS;
     
     throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\""));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp	(revision 78)
@@ -69,5 +69,5 @@
       case NO_SPECULATIVE_LOAD     :
       case SPECULATIVE_LOAD_ACCESS :
-      case SPECULATIVE_LOAD_BYPASS :
+	//case SPECULATIVE_LOAD_BYPASS :
       default                      :
 	{
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp	(revision 78)
@@ -72,15 +72,17 @@
    in_MEMORY_IN_PACKET_ID             = interface->set_signal_in  <Tpacket_t         > ("packet_id"    ,_param->_size_packet_id       );
    in_MEMORY_IN_OPERATION             = interface->set_signal_in  <Toperation_t      > ("operation"   ,_param->_size_operation        );
+   in_MEMORY_IN_TYPE                  = interface->set_signal_in  <Ttype_t           > ("type"        ,_param->_size_type             );
    in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in  <Tlsq_ptr_t        > ("store_queue_ptr_write" ,_param->_size_address_store_queue+1); // +1 cf load_queue usage
+   if (_param->_have_port_load_queue_ptr)
    in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in  <Tlsq_ptr_t        > ("load_queue_ptr_write"  ,_param->_size_address_load_queue );
-// in_MEMORY_IN_HAS_IMMEDIAT          = interface->set_signal_in  <Tcontrol_t        > ("has_immediat",1                              );
+   in_MEMORY_IN_HAS_IMMEDIAT          = interface->set_signal_in  <Tcontrol_t        > ("has_immediat",1                              );
    in_MEMORY_IN_IMMEDIAT              = interface->set_signal_in  <Tgeneral_data_t   > ("immediat"    ,_param->_size_general_data     );
    in_MEMORY_IN_DATA_RA               = interface->set_signal_in  <Tgeneral_data_t   > ("data_ra"     ,_param->_size_general_data     );
    in_MEMORY_IN_DATA_RB               = interface->set_signal_in  <Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data     );
-// in_MEMORY_IN_DATA_RC               = interface->set_signal_in  <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
-//    in_MEMORY_IN_WRITE_RD              = interface->set_signal_in  <Tcontrol_t        > ("write_rd"    ,1                              );
+   in_MEMORY_IN_DATA_RC               = interface->set_signal_in  <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
+   in_MEMORY_IN_WRITE_RD              = interface->set_signal_in  <Tcontrol_t        > ("write_rd"    ,1                              );
    in_MEMORY_IN_NUM_REG_RD            = interface->set_signal_in  <Tgeneral_address_t> ("num_reg_rd"  ,1                              );
-// in_MEMORY_IN_WRITE_RE              = interface->set_signal_in  <Tcontrol_t        > ("write_re"    ,1                              );
-// in_MEMORY_IN_NUM_REG_RE            = interface->set_signal_in  <Tspecial_address_t> ("num_reg_re"  ,1                              );
+   in_MEMORY_IN_WRITE_RE              = interface->set_signal_in  <Tcontrol_t        > ("write_re"    ,1                              );
+   in_MEMORY_IN_NUM_REG_RE            = interface->set_signal_in  <Tspecial_address_t> ("num_reg_re"  ,1                              );
     }
 
@@ -105,11 +107,15 @@
       if (_param->_have_port_packet_id)       
       out_MEMORY_OUT_PACKET_ID     = interface->set_signal_out <Tpacket_t         > ("packet_id"     ,_param->_size_packet_id        );
+//    out_MEMORY_OUT_OPERATION     = interface->set_signal_out <Toperation_t      > ("operation"     ,_param->_size_operation        );
+      out_MEMORY_OUT_TYPE          = interface->set_signal_out <Ttype_t           > ("type"          ,_param->_size_type             );
       out_MEMORY_OUT_WRITE_RD      = interface->set_signal_out <Tcontrol_t        > ("write_rd"      ,1                              );
       out_MEMORY_OUT_NUM_REG_RD    = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd"    ,_param->_size_general_register );
       out_MEMORY_OUT_DATA_RD       = interface->set_signal_out <Tgeneral_data_t   > ("data_rd"       ,_param->_size_general_data     );
-//    out_MEMORY_OUT_WRITE_RE      = interface->set_signal_out <Tcontrol_t        > ("write_rd"      ,1                              );
-//    out_MEMORY_OUT_NUM_REG_RE    = interface->set_signal_out <Tspecial_address_t> ("num_reg_re"    ,_param->_size_general_register );
-//    out_MEMORY_OUT_DATA_RE       = interface->set_signal_out <Tspecial_data_t   > ("data_re"       ,_param->_size_general_data     );
+      out_MEMORY_OUT_WRITE_RE      = interface->set_signal_out <Tcontrol_t        > ("write_re"      ,1                              );
+      out_MEMORY_OUT_NUM_REG_RE    = interface->set_signal_out <Tspecial_address_t> ("num_reg_re"    ,_param->_size_general_register );
+      out_MEMORY_OUT_DATA_RE       = interface->set_signal_out <Tspecial_data_t   > ("data_re"       ,_param->_size_general_data     );
       out_MEMORY_OUT_EXCEPTION     = interface->set_signal_out <Texception_t      > ("exception"     ,_param->_size_exception        );
+      out_MEMORY_OUT_NO_SEQUENCE   = interface->set_signal_out <Tcontrol_t        > ("no_sequence"   ,1                              );
+      out_MEMORY_OUT_ADDRESS       = interface->set_signal_out <Tgeneral_data_t   > ("address"       ,_param->_size_general_data     );
     }
 
@@ -153,13 +159,13 @@
     // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-    if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
+//  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
       {
-	out_BYPASS_MEMORY_VAL          = new SC_OUT(Tcontrol_t        ) * [_param->_size_load_queue];
+	out_BYPASS_MEMORY_VAL          = new SC_OUT(Tcontrol_t        ) * [_param->_nb_bypass_memory];
 	if (_param->_have_port_ooo_engine_id)    
-	out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t        ) * [_param->_size_load_queue];
-	out_BYPASS_MEMORY_NUM_REG      = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue];
-	out_BYPASS_MEMORY_DATA         = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_load_queue];
+	out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t        ) * [_param->_nb_bypass_memory];
+	out_BYPASS_MEMORY_NUM_REG      = new SC_OUT(Tgeneral_address_t) * [_param->_nb_bypass_memory];
+	out_BYPASS_MEMORY_DATA         = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_bypass_memory];
 	
-	for (uint32_t i=0; i<_param->_size_load_queue; i++)
+	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	  {
 	    Interface_fifo * interface = _interfaces->set_interface("memory_out"
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp	(revision 78)
@@ -44,15 +44,17 @@
     delete     in_MEMORY_IN_PACKET_ID   ;
     delete     in_MEMORY_IN_OPERATION   ;
+    delete     in_MEMORY_IN_TYPE        ;
     delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
+    if (_param->_have_port_load_queue_ptr)
     delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-//  delete     in_MEMORY_IN_HAS_IMMEDIAT;
+    delete     in_MEMORY_IN_HAS_IMMEDIAT;
     delete     in_MEMORY_IN_IMMEDIAT    ;
     delete     in_MEMORY_IN_DATA_RA     ;
     delete     in_MEMORY_IN_DATA_RB     ;
-//  delete     in_MEMORY_IN_DATA_RC     ;
-//  delete     in_MEMORY_IN_WRITE_RD    ;
+    delete     in_MEMORY_IN_DATA_RC     ;
+    delete     in_MEMORY_IN_WRITE_RD    ;
     delete     in_MEMORY_IN_NUM_REG_RD  ;
-//  delete     in_MEMORY_IN_WRITE_RE    ;
-//  delete     in_MEMORY_IN_NUM_REG_RE  ;
+    delete     in_MEMORY_IN_WRITE_RE    ;
+    delete     in_MEMORY_IN_NUM_REG_RE  ;
     
     delete    out_MEMORY_OUT_VAL       ;
@@ -66,11 +68,15 @@
     if (_param->_have_port_packet_id)
     delete    out_MEMORY_OUT_PACKET_ID ;
+//  delete    out_MEMORY_OUT_OPERATION ;
+    delete    out_MEMORY_OUT_TYPE      ;
     delete    out_MEMORY_OUT_WRITE_RD  ;
     delete    out_MEMORY_OUT_NUM_REG_RD;
     delete    out_MEMORY_OUT_DATA_RD   ;
-//  delete    out_MEMORY_OUT_WRITE_RE  ;
-//  delete    out_MEMORY_OUT_NUM_REG_RE;
-//  delete    out_MEMORY_OUT_DATA_RE   ;
+    delete    out_MEMORY_OUT_WRITE_RE  ;
+    delete    out_MEMORY_OUT_NUM_REG_RE;
+    delete    out_MEMORY_OUT_DATA_RE   ;
     delete    out_MEMORY_OUT_EXCEPTION ;
+    delete    out_MEMORY_OUT_NO_SEQUENCE;
+    delete    out_MEMORY_OUT_ADDRESS   ;
     
     delete    out_DCACHE_REQ_VAL       ;
@@ -91,12 +97,9 @@
     delete     in_DCACHE_RSP_ERROR     ;
     
-    if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
-      {
-	delete [] out_BYPASS_MEMORY_VAL       ;
-	if (_param->_have_port_ooo_engine_id)    
-	delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID;
-	delete [] out_BYPASS_MEMORY_NUM_REG   ;
-	delete [] out_BYPASS_MEMORY_DATA      ;
-      }
+    delete [] out_BYPASS_MEMORY_VAL       ;
+    if (_param->_have_port_ooo_engine_id)    
+    delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID;
+    delete [] out_BYPASS_MEMORY_NUM_REG   ;
+    delete [] out_BYPASS_MEMORY_DATA      ;
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp	(revision 78)
@@ -120,4 +120,6 @@
     if (_param->_have_port_packet_id)
     PORT_WRITE(out_MEMORY_OUT_PACKET_ID    , memory_out_packet_id    );
+//  PORT_WRITE(out_MEMORY_OUT_OPERATION    , memory_out_operation    );
+    PORT_WRITE(out_MEMORY_OUT_TYPE         , TYPE_MEMORY             );
     PORT_WRITE(out_MEMORY_OUT_WRITE_RD     , memory_out_write_rd     );
     PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD   , memory_out_num_reg_rd   );
@@ -126,6 +128,10 @@
 //  PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   , memory_out_num_reg_re   );
 //  PORT_WRITE(out_MEMORY_OUT_DATA_RE      , memory_out_data_re      );
+    PORT_WRITE(out_MEMORY_OUT_WRITE_RE     , 0);
+    PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   , 0);
+    PORT_WRITE(out_MEMORY_OUT_DATA_RE      , 0);
     PORT_WRITE(out_MEMORY_OUT_EXCEPTION    , memory_out_exception    );
-
+    PORT_WRITE(out_MEMORY_OUT_NO_SEQUENCE  , 0);
+    PORT_WRITE(out_MEMORY_OUT_ADDRESS      , 0);
     // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 78)
@@ -265,4 +265,8 @@
 	    //  others in speculation_access_queue
 
+#ifdef DEBUG_TEST
+	    if (PORT_READ(in_MEMORY_IN_TYPE) != TYPE_MEMORY)
+	      throw ERRORMORPHEO(FUNCTION,"The type is different at 'TYPE_MEMORY'");
+#endif
 	    Toperation_t    operation            = PORT_READ(in_MEMORY_IN_OPERATION);
 	    Tgeneral_data_t address              = (PORT_READ(in_MEMORY_IN_IMMEDIAT) +
@@ -376,5 +380,5 @@
 		    _store_queue [index]._packet_id            = (not _param->_have_port_packet_id    )?0:PORT_READ(in_MEMORY_IN_PACKET_ID   );
 		    _store_queue [index]._operation            = operation;
-		    _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
+		    _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
 		    _store_queue [index]._address              = address;
 
@@ -415,5 +419,5 @@
 
 		_speculative_access_queue [index]._operation            = operation;
-		_speculative_access_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
+		_speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
 		_speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE);
 		_speculative_access_queue [index]._address              = address;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp	(revision 78)
@@ -25,4 +25,5 @@
 			  uint32_t            nb_port_check          ,
 			  Tspeculative_load_t speculative_load       ,
+			  uint32_t            nb_bypass_memory       ,
 			  uint32_t            nb_context             ,
 			  uint32_t            nb_front_end           ,
@@ -30,5 +31,7 @@
 			  uint32_t            nb_packet              ,
 			  uint32_t            size_general_data      ,
-			  uint32_t            nb_general_register    ):
+			  uint32_t            size_special_data      ,
+			  uint32_t            nb_general_register    ,
+			  uint32_t            nb_special_register    ):
     _size_store_queue        (size_store_queue       ),
     _size_load_queue         (size_load_queue        ),
@@ -36,4 +39,5 @@
     _nb_port_check           (nb_port_check          ),
     _speculative_load        (speculative_load       ),
+    _nb_bypass_memory        (nb_bypass_memory       ),
     _nb_context              (nb_context             ),
     _nb_front_end            (nb_front_end           ),
@@ -41,5 +45,7 @@
     _nb_packet               (nb_packet              ),
     _size_general_data       (size_general_data      ),
+    _size_special_data       (size_special_data      ),
     _nb_general_register     (nb_general_register    ),
+    _nb_special_register     (nb_special_register    ),
     
     _size_address_store_queue              (log2(size_store_queue             )),
@@ -52,4 +58,5 @@
     _size_packet_id          (log2(nb_packet          )),
     _size_general_register   (log2(nb_general_register)),
+    _size_special_register   (log2(nb_special_register)),
     _size_dcache_context_id  (_size_context_id + _size_front_end_id + _size_ooo_engine_id),
     _size_dcache_packet_id   ((log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue))+1),
@@ -60,4 +67,5 @@
     _have_port_packet_id         (_size_packet_id    >0),
     _have_port_dcache_context_id (_size_dcache_context_id>0),
+    _have_port_load_queue_ptr    (_size_load_queue>1),
 
     _mask_address_lsb            (gen_mask<Tdcache_address_t>(log2(size_general_data/8))),
@@ -77,4 +85,5 @@
     _nb_port_check           (param._nb_port_check          ),
     _speculative_load        (param._speculative_load       ),
+    _nb_bypass_memory        (param._nb_bypass_memory       ),
     _nb_context              (param._nb_context             ),
     _nb_front_end            (param._nb_front_end           ),
@@ -82,5 +91,7 @@
     _nb_packet               (param._nb_packet              ),
     _size_general_data       (param._size_general_data      ),
+    _size_special_data       (param._size_special_data      ),
     _nb_general_register     (param._nb_general_register    ),
+    _nb_special_register     (param._nb_special_register    ),
 
     _size_address_store_queue              (param._size_address_store_queue             ),
@@ -93,4 +104,5 @@
     _size_packet_id          (param._size_packet_id         ),
     _size_general_register   (param._size_general_register  ),
+    _size_special_register   (param._size_special_register  ),
     _size_dcache_context_id  (param._size_dcache_context_id ),
     _size_dcache_packet_id   (param._size_dcache_packet_id  ),
@@ -100,6 +112,6 @@
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     _have_port_packet_id     (param._have_port_packet_id    ),
-
     _have_port_dcache_context_id(param._have_port_dcache_context_id),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr),
 
     _mask_address_lsb        (param._mask_address_lsb),
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,9 +21,9 @@
 #undef  FUNCTION
 #define FUNCTION "Load_store_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Load_store_unit,FUNCTION,"Begin");
     
-    std::string msg = "";
+    Parameters_test test("Load_store_unit");
 
     switch (_speculative_load)
@@ -31,19 +31,32 @@
       case SPECULATIVE_LOAD_COMMIT :
 	{
+	  if (not (_nb_bypass_memory == 0))
+	    test.error("Bypass memory is not supported. Please wait a next revision.");
+ 
 	  break;
 	}
       case NO_SPECULATIVE_LOAD     :
       case SPECULATIVE_LOAD_ACCESS :
-      case SPECULATIVE_LOAD_BYPASS :
+      // case SPECULATIVE_LOAD_BYPASS :
       default                      :
 	{
-	  msg += "  - Speculative load scheme is not supported : " +toString(_speculative_load);
+	  if (not (_nb_bypass_memory == 0))
+	    test.error("In the load scheme '"+toString(_speculative_load)+"', they have none bypass.");
+
+	  test.error("Speculative load scheme '"+toString(_speculative_load)+"' is not supported. Please wait a next revision.");
 	  break;
 	}
       }
 
-    return msg;
+    if (not (_size_store_queue >= 2))
+      test.error("Store queue must have at less two slot.");
+
+    if (not (_nb_bypass_memory <= _size_load_queue))
+      test.error("Bypass number must be less than load_queue's size.");
 
     log_printf(FUNC,Load_store_unit,FUNCTION,"End");
+
+    return test;
+
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp	(revision 78)
@@ -33,4 +33,5 @@
     xml.singleton_begin("nb_port_check                "); xml.attribut("value",toString(_nb_port_check                )); xml.singleton_end();
     xml.singleton_begin("speculative_load             "); xml.attribut("value",toString(_speculative_load             )); xml.singleton_end();
+    xml.singleton_begin("nb_bypass_memory             "); xml.attribut("value",toString(_nb_bypass_memory             )); xml.singleton_end();
     xml.singleton_begin("nb_context                   "); xml.attribut("value",toString(_nb_context                   )); xml.singleton_end();
     xml.singleton_begin("nb_front_end                 "); xml.attribut("value",toString(_nb_front_end                 )); xml.singleton_end();
