Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile	(revision 78)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libExecute_loop.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.defs	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.defs	(revision 78)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.deps	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.deps	(revision 78)
@@ -0,0 +1,90 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Execute_loop			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Read_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Makefile.deps
+endif
+ifndef Functionnal_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps
+endif
+ifndef Load_store_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/Makefile.deps
+endif
+ifndef Write_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.deps
+endif
+ifndef Register_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Makefile.deps
+endif
+ifndef Read_unit_to_Execution_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/Makefile.deps
+endif
+ifndef Execution_unit_to_Write_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Execute_loop_DIR		=	$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop
+
+#-----[ Library ]------------------------------------------
+
+Execute_loop_LIBRARY		= 	-lExecute_loop				\
+					$(Behavioural_LIBRARY)			\
+					$(Read_unit_LIBRARY)			\
+					$(Functionnal_unit_LIBRARY)		\
+					$(Load_store_unit_LIBRARY)		\
+					$(Write_unit_LIBRARY)			\
+					$(Register_unit_LIBRARY)		\
+					$(Read_unit_to_Execution_unit_LIBRARY)	\
+					$(Execution_unit_to_Write_unit_LIBRARY)	
+
+
+Execute_loop_DIR_LIBRARY	=	-L$(Execute_loop_DIR)/lib			\
+					$(Behavioural_DIR_LIBRARY)			\
+					$(Behavioural_DIR_LIBRARY)			\
+					$(Read_unit_DIR_LIBRARY)			\
+					$(Functionnal_unit_DIR_LIBRARY)			\
+					$(Load_store_unit_DIR_LIBRARY)			\
+					$(Write_unit_DIR_LIBRARY)			\
+					$(Register_unit_DIR_LIBRARY)			\
+					$(Read_unit_to_Execution_unit_DIR_LIBRARY)	\
+					$(Execution_unit_to_Write_unit_DIR_LIBRARY)	
+
+
+#-----[ Rules ]--------------------------------------------
+
+Execute_loop_library		:
+				@\
+				$(MAKE) Behavioural_library;			\
+				$(MAKE) Read_unit_library;			\
+				$(MAKE) Functionnal_unit_library;		\
+				$(MAKE) Load_store_unit_library;		\
+				$(MAKE) Write_unit_library;			\
+				$(MAKE) Register_unit_library;			\
+				$(MAKE) Read_unit_to_Execution_unit_library;	\
+				$(MAKE) Execution_unit_to_Write_unit_library;	\
+				$(MAKE) --directory=$(Execute_loop_DIR) --makefile=Makefile;
+
+Execute_loop_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;			\
+				$(MAKE) Read_unit_library_clean;			\
+				$(MAKE) Functionnal_unit_library_clean;			\
+				$(MAKE) Load_store_unit_library_clean;			\
+				$(MAKE) Write_unit_library_clean;			\
+				$(MAKE) Register_unit_library_clean;			\
+				$(MAKE) Read_unit_to_Execution_unit_library_clean;	\
+				$(MAKE) Execution_unit_to_Write_unit_library_clean;	\
+				$(MAKE) --directory=$(Execute_loop_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps	(revision 78)
@@ -20,4 +20,5 @@
 Functionnal_unit_LIBRARY	= 	-lFunctionnal_unit	\
 					$(Custom_LIBRARY)	\
+					-lFunctionnal_unit	\
 					$(Behavioural_LIBRARY)	
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile	(revision 78)
@@ -0,0 +1,23 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libOperation.a
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs	(revision 78)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps	(revision 78)
@@ -0,0 +1,30 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Operation		= yes
+
+#-----[ Directory ]----------------------------------------
+
+Operation_DIR           =       $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation
+
+#-----[ Library ]------------------------------------------
+
+Operation_LIBRARY	= 	-lOperation
+
+Operation_DIR_LIBRARY	=	-L$(Operation_DIR)/lib
+
+#-----[ Rules ]--------------------------------------------
+
+Operation_library	:
+			@\
+			$(MAKE) --directory=$(Operation_DIR) --makefile=Makefile;
+
+Operation_library_clean	:
+			@\
+			$(MAKE) --directory=$(Operation_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h	(revision 78)
@@ -0,0 +1,75 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+#include "Common/include/ErrorMorpheo.h"
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_execute_unit {
+namespace execute_unit {
+namespace functionnal_unit {
+
+  void operation_unimplemented   (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_add           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_addc          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sub           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_mul           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_mulu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_div           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+//void operation_l_divu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_and           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_or            (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_xor           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_test_f        (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_test_nf       (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_jalr          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sll           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sra           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_srl           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_ror           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_movhi         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_extend_s      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_extend_z      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_cmov          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_ff1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_fl1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_mfspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_mtspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfeq          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfne          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfgeu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfgtu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfleu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfltu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfges         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfgts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sfles         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_sflts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_mac           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_msb           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+  void operation_l_macrc         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
+
+}; // end namespace functionnal_unit
+}; // end namespace execute_unit
+}; // end namespace multi_execute_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h	(revision 78)
@@ -0,0 +1,168 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include "Common/include/BitManipulation.h"
+#include "Behavioural/include/SPR_access_mode.h"
+#include "Behavioural/include/Types.h"
+#include "Behavioural/include/Parameters.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_execute_unit {
+namespace execute_unit {
+namespace functionnal_unit {
+
+  class execute_timing_t
+  {
+    // if delay   > 0, can't accepted a transaction on EXECUTE_IN's  interface.
+  public : uint32_t        _delay  ;
+    // if latence > 0, can't initiate a transaction on EXECUTE_OUT's interface.
+  public : uint32_t        _latence;
+
+  public : execute_timing_t (uint32_t delay=0, uint32_t latence=0)
+    {
+      _delay   = delay;
+      _latence = latence;
+    };
+  };
+
+  typedef struct 
+  {
+    execute_timing_t   _timing      ;
+
+    Tcontext_t         _context_id   ;
+    Tcontext_t         _front_end_id ;
+    Tcontext_t         _ooo_engine_id;
+    Tpacket_t          _packet_id ;
+
+    Toperation_t       _operation   ;
+    Ttype_t            _type        ;
+    Tcontrol_t         _has_immediat;
+    Tgeneral_data_t    _immediat    ;
+    Tgeneral_data_t    _data_ra     ;
+    Tgeneral_data_t    _data_rb     ;
+    Tspecial_data_t    _data_rc     ;
+    Tgeneral_data_t    _data_rd     ;
+    Tspecial_data_t    _data_re     ;
+
+    Tcontrol_t         _write_rd  ;
+    Tgeneral_address_t _num_reg_rd;
+    Tcontrol_t         _write_re  ;
+    Tspecial_address_t _num_reg_re;
+
+    Texception_t       _exception   ;
+    Tcontrol_t         _no_sequence ;
+    Tgeneral_data_t    _address     ;
+  } execute_operation_t;
+
+  class execute_param_t
+  {
+  public : const uint32_t            _size_data;
+  public : const Tgeneral_data_t     _mask_data;
+  public : const Tgeneral_data_t     _mask_shift;
+  public :       execute_timing_t ** _timing;
+
+  public : execute_param_t (const uint32_t      size_data,
+			    execute_timing_t ** timing):
+    _size_data (size_data),
+    _mask_data (gen_mask<Tgeneral_data_t> (size_data)),
+    _mask_shift(gen_mask<Tgeneral_data_t> (log2(size_data)))
+    {
+      _timing = timing;
+    };
+  public : ~execute_param_t (void)
+    {
+    };
+  } ;
+
+  class execute_register_t
+  {
+    // information to custom group : 
+    //  * perhalps a custom group start an operation after a access at a internal's group register
+  public : bool               _i_read_spr;
+  public : bool               _i_write_spr;
+  public : uint32_t           _access_num_group;
+  public : uint32_t           _access_num_register;
+  public : Tgeneral_data_t    _spr_old;
+  public : Tgeneral_data_t ** _spr;
+  public : SPR_access_mode  * _spr_access_mode;
+    
+  public : execute_register_t (void)
+    {
+      _spr               = new Tgeneral_data_t * [NB_GROUP];
+      _spr_access_mode   = new SPR_access_mode;
+  
+      for (uint32_t i=0; i<NB_GROUP; i++)
+	{
+	  _spr               [i] = NULL;
+	}
+    }
+
+  public : ~execute_register_t (void)
+    {
+      for (uint32_t x=0; x<NB_GROUP; x++)
+	if (_spr[x] != NULL)
+	  delete _spr[x];
+      delete _spr;
+      delete _spr_access_mode;
+    }
+
+  public : void implement_group (uint32_t num_group, uint32_t nb_reg)
+    {
+      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
+	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
+
+      if (nb_reg > 0)
+	{
+	  _spr [num_group] = new Tgeneral_data_t [nb_reg];
+
+	  if (num_group >= GROUP_CUSTOM_1)
+	    _spr_access_mode ->implement_group(num_group, nb_reg);
+	}
+    }
+
+  public : void implement_group (uint32_t num_group)
+    {
+      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
+	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
+
+      uint32_t nb_reg = _spr_access_mode ->implement_group(num_group);
+
+      if (nb_reg > 0)
+	_spr [num_group] = new Tgeneral_data_t [nb_reg];
+    }
+  };
+  
+  typedef void function_execute_t 
+  (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, 
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
+  
+  typedef void function_execute_end_cycle_t 
+  (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
+
+  
+}; // end namespace functionnal_unit
+}; // end namespace execute_unit
+}; // end namespace multi_execute_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp	(revision 78)
@@ -0,0 +1,836 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"
+
+#define neg(data)                  (~(data)+1)
+#define sign(data)                 ((data)>>(param->_size_data-1))
+#define unsigned(data)             (data)
+#define signed(data)               ((sign(data)==0)?(data):neg(data))
+#define ovf(op1, op2, res)         ((sign(op1) == sign(op2))?(sign(op1) xor sign(res)):0)
+#define carry(op1, op2, res)       (((res)<(op1)) or ((res)<(op2)))
+#define set_flag(data,flag,is_set) (((is_set)==1)?((data)|(flag)):((data)&~(flag)))
+#define get_flag(data,flag)	   (((data)&(flag))!=0)
+#define concatenation_bool(a,b)    (((a)<<1) | (b))
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_execute_unit {
+namespace execute_unit {
+namespace functionnal_unit {
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_unimplemented"
+  void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : unimplemented");
+
+    throw ERRORMORPHEO(FUNCTION,"The operation '"+toString(op->_operation)+"' is not implemented in this Functionnal_unit");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_add"
+  void operation_l_add         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_add");
+
+    Tgeneral_data_t gpr1      = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2      = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    
+    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
+
+    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
+    bool            carry_out = carry(gpr1,gpr2,gpr3);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+    op->_data_re      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
+    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
+    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_addc"
+  void operation_l_addc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_addc");
+
+    Tgeneral_data_t carry_in   = get_flag(op->_data_rc,FLAG_CY);
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = param->_mask_data & (gpr1 + gpr2 + carry_in);
+
+    bool            overflow   = ovf  (gpr1,gpr2,gpr3);
+    bool            carry_out  = carry(gpr1,gpr2,gpr3);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+    op->_data_re      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
+    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
+    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sub"
+  void operation_l_sub         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sub");
+
+    Tgeneral_data_t gpr1      =     unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2      = neg(unsigned(op->_data_rb));
+    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
+
+    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
+    bool            carry_out = carry(gpr1,gpr2,gpr3);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+    op->_data_re      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
+    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
+    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_and"
+  void operation_l_and         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_and");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = (gpr1 & gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_or"
+  void operation_l_or          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_or");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = (gpr1 | gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_xor"
+  void operation_l_xor         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_xor");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = (gpr1 ^ gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_movhi"
+  void operation_l_movhi       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_movhi");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_immediat);
+    Tgeneral_data_t gpr2       = param->_mask_data & (gpr1<<16);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_cmov"
+  void operation_l_cmov        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_cmov");
+
+    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
+    Tgeneral_data_t gpr3       = ((f_in==0)?gpr2:gpr1);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_test_f"
+  void operation_l_test_f      (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_f");
+
+    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = f_in != 0;
+    op->_address      = imm;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_test_nf"
+  void operation_l_test_nf     (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_nf");
+
+    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = f_in == 0;
+    op->_address      = imm;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_jalr"
+  void operation_l_jalr        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_jalr");
+    // jal  : has_imm = 1, write_rd = 1, read_rb = 0
+    // jalr : has_imm = 1, write_rd = 1, read_rb = 1
+    // jr   : has_imm = 0, write_rd = 0, read_rb = 1
+
+
+    Tgeneral_data_t gpr        = unsigned(op->_data_rb);
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = imm;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 1;
+    op->_address      = gpr;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_extend_s"
+  void operation_l_extend_s    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_s");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, true , imm);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_extend_z"
+  void operation_l_extend_z    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_z");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, false , imm);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sll"
+  void operation_l_sll         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sll");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = shift_logic_left<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_srl"
+  void operation_l_srl         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_srl");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = shift_logic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sra"
+  void operation_l_sra         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sra");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = shift_arithmetic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_ror"
+  void operation_l_ror         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ror");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    Tgeneral_data_t gpr3       = rotate_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr3;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_ff1"
+  void operation_l_ff1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ff1");
+
+    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
+    Tgeneral_data_t index;
+
+    for (index=0; (index<param->_size_data) and (((gpr>>index)&1)!= 1); index++);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = (index==param->_size_data)?0:(index+1);
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_fl1"
+  void operation_l_fl1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_fl1");
+
+    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
+    Tgeneral_data_t index;
+
+    for (index=param->_size_data; (index>0) and (((gpr>>(index-1))&1)!= 1); index--);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = index;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfeq"
+  void operation_l_sfeq        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfeq");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 == gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfne"
+  void operation_l_sfne        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfne");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 != gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfgeu"
+  void operation_l_sfgeu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgeu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 >= gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfgtu"
+  void operation_l_sfgtu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgtu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 >  gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfleu"
+  void operation_l_sfleu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfleu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 <= gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfltu"
+  void operation_l_sfltu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfltu");
+
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+
+    bool            f_out      = (gpr1 <  gpr2);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfges"
+  void operation_l_sfges       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfges");
+
+    Tgeneral_data_t gpr1       =   op->_data_ra;
+    Tgeneral_data_t gpr2       =   (op->_has_immediat==1)?op->_immediat:op->_data_rb;
+    
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra  : %.8x",unsigned(op->_data_ra));
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ras : %.8x",  signed(op->_data_ra));
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb  : %.8x",unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb));
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rbs : %.8x",  signed((op->_has_immediat==1)?op->_immediat:op->_data_rb));
+    
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 1                               ; break;
+      case 2 /*b10*/ : f_out = 0                               ; break;
+      default        : f_out = signed(gpr1) >= signed(gpr2); break;
+      }
+
+    log_printf(TRACE,Functionnal_unit,FUNCTION," * f_out    : %.8x",f_out);
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfgts"
+  void operation_l_sfgts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgts");
+
+    Tgeneral_data_t gpr1       = op->_data_ra ;
+    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
+
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 1; break;
+      case 2 /*b10*/ : f_out = 0; break;
+      default        : f_out = signed(gpr1) >  signed(gpr2); break;
+      }
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sfles"
+  void operation_l_sfles       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfles");
+
+    Tgeneral_data_t gpr1       = op->_data_ra ;
+    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
+
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 0; break;
+      case 2 /*b10*/ : f_out = 1; break;
+      default        : f_out = signed(gpr1) <= signed(gpr2); break;
+      }
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_sflts"
+  void operation_l_sflts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sflts");
+
+    Tgeneral_data_t gpr1       = op->_data_ra ;
+    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb;
+
+    bool            f_out;
+
+    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
+      {
+      case 1 /*b01*/ : f_out = 0; break;
+      case 2 /*b10*/ : f_out = 1; break;
+      default        : f_out = signed(gpr1) <  signed(gpr2); break;
+      }
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_mtspr"
+  void operation_l_mtspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mtspr");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
+    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
+
+    Texception_t    exception;
+
+    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
+    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
+    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
+
+    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
+    
+    // Test if this group is implemented in this functionnal_unit
+    if (reg->_spr_access_mode->valid(spr_addr))
+      {
+	if (reg->_spr_access_mode->write(spr_addr, flag_SM, flag_SUMRA))
+	  {
+	    reg->_i_write_spr         = true;
+	    reg->_access_num_group    = spr_addr._group;
+	    reg->_access_num_register = spr_addr._register;
+	    reg->_spr_old             = reg->_spr[spr_addr._group][spr_addr._register];
+	    reg->_spr[spr_addr._group][spr_addr._register] = gpr2;
+
+	    exception = EXCEPTION_ALU_NONE;
+	  }
+	else
+	  {
+	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
+	  }
+      }
+    else
+      {
+	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
+      }
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr2; // data_rb
+  //op->_data_re      = 0;
+    op->_exception    = exception;
+    op->_no_sequence  = 0;
+    op->_address      = addr; // data_ra or imm
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_mfspr"
+  void operation_l_mfspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mfspr");
+
+    Tgeneral_data_t imm        = unsigned(op->_immediat);
+    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2       = 0;
+    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
+
+    Texception_t    exception;
+
+    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
+    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
+    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
+
+    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
+    
+    // Test if this group is implemented in this functionnal_unit
+    if (reg->_spr_access_mode->valid(spr_addr))
+      {
+	if (reg->_spr_access_mode->read(spr_addr, flag_SM, flag_SUMRA))
+	  {
+	    reg->_i_read_spr          = true;
+	    reg->_access_num_group    = spr_addr._group;
+	    reg->_access_num_register = spr_addr._register;
+	    
+	    gpr2 = reg->_spr[spr_addr._group][spr_addr._register];
+
+	    exception = EXCEPTION_ALU_NONE;
+	  }
+	else
+	  {
+	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
+	  }
+      }
+    else
+      {
+	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
+      }
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_write_rd     = (exception == EXCEPTION_ALU_NONE);
+    op->_data_rd      = gpr2; // spr
+  //op->_data_re      = 0;
+    op->_exception    = exception;
+    op->_no_sequence  = 0;
+    op->_address      = addr; // data_ra or imm
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_macrc"
+  void operation_l_macrc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_macrc");
+
+    Tgeneral_data_t gpr = static_cast<Tgeneral_data_t>(range<uint64_t>((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO]), param->_size_data));
+
+    reg->_spr[GROUP_MAC][SPR_MACLO] = 0;
+    reg->_spr[GROUP_MAC][SPR_MACHI] = 0;
+
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+    op->_data_rd      = gpr;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_mac"
+  void operation_l_mac          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mac");
+
+    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
+
+    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) + temp;
+
+    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
+    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Functionnal_unit::operation_l_msb"
+  void operation_l_msb          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
+  {
+    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_msb");
+
+    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
+    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
+    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
+
+    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) - temp;
+
+    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
+    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
+    
+    // Result
+    op->_timing       = param->_timing[op->_type][op->_operation];
+  //op->_data_rd      = 0;
+  //op->_data_re      = 0;
+    op->_exception    = EXCEPTION_ALU_NONE;
+    op->_no_sequence  = 0;
+  //op->_address      = 0;
+  };
+
+}; // end namespace functionnal_unit
+}; // end namespace execute_unit
+}; // end namespace multi_execute_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg	(revision 78)
@@ -8,2 +8,4 @@
 2 	2 	+1	# size_special_data  
 16	16	+1	# nb_special_register
+4 	4 	*2	# size_store_queue
+1 	4 	*4	# size_load_queue
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp	(revision 78)
@@ -9,5 +9,5 @@
 #include "Behavioural/Custom/include/Custom_example.h"
 
-#define NB_PARAMS 8
+#define NB_PARAMS 10
 
 void usage (int argc, char * argv[])
@@ -23,4 +23,6 @@
   err (_("  * size_special_data   (uint32_t)\n"));
   err (_("  * nb_special_register (uint32_t)\n"));
+  err (_("  * size_store_queue    (uint32_t)\n"));
+  err (_("  * size_load_queue     (uint32_t)\n"));
   exit (1);
 }
@@ -46,4 +48,6 @@
   const uint32_t size_special_data   = atoi(argv[x++]);
   const uint32_t nb_special_register = atoi(argv[x++]);
+  const uint32_t size_store_queue    = atoi(argv[x++]);
+  const uint32_t size_load_queue     = atoi(argv[x++]);
 
   execute_timing_t ** timing = new execute_timing_t * [MAX_TYPE];
@@ -68,4 +72,6 @@
 	 size_special_data   ,
 	 nb_special_register ,
+	 size_store_queue    ,
+	 size_load_queue     ,
 	 timing              ,
 	 &(morpheo::behavioural::custom::example_get_custom_information)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp	(revision 78)
@@ -142,4 +142,6 @@
   sc_signal<Toperation_t      >  in_EXECUTE_IN_OPERATION      (rename.c_str());
   sc_signal<Ttype_t           >  in_EXECUTE_IN_TYPE           (rename.c_str());
+  sc_signal<Tlsq_ptr_t        >  in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE (rename.c_str());
+  sc_signal<Tlsq_ptr_t        >  in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE  (rename.c_str());
   sc_signal<Tcontrol_t        >  in_EXECUTE_IN_HAS_IMMEDIAT   (rename.c_str());
   sc_signal<Tgeneral_data_t   >  in_EXECUTE_IN_IMMEDIAT       (rename.c_str());
@@ -160,5 +162,5 @@
   sc_signal<Tpacket_t         > out_EXECUTE_OUT_PACKET_ID      (rename.c_str());
 //sc_signal<Toperation_t      > out_EXECUTE_OUT_OPERATION      (rename.c_str());
-//sc_signal<Ttype_t           > out_EXECUTE_OUT_TYPE           (rename.c_str());
+  sc_signal<Ttype_t           > out_EXECUTE_OUT_TYPE           (rename.c_str());
   sc_signal<Tcontrol_t        > out_EXECUTE_OUT_WRITE_RD       (rename.c_str());
   sc_signal<Tgeneral_address_t> out_EXECUTE_OUT_NUM_REG_RD     (rename.c_str());
@@ -191,4 +193,7 @@
   (*(_Functionnal_unit-> in_EXECUTE_IN_OPERATION     )) ( in_EXECUTE_IN_OPERATION     );
   (*(_Functionnal_unit-> in_EXECUTE_IN_TYPE          )) ( in_EXECUTE_IN_TYPE          );
+  (*(_Functionnal_unit-> in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE)) ( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE);
+  if (_param->_have_port_load_queue_ptr)
+  (*(_Functionnal_unit-> in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE )) ( in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE );
   (*(_Functionnal_unit-> in_EXECUTE_IN_HAS_IMMEDIAT  )) ( in_EXECUTE_IN_HAS_IMMEDIAT  );
   (*(_Functionnal_unit-> in_EXECUTE_IN_IMMEDIAT      )) ( in_EXECUTE_IN_IMMEDIAT      );
@@ -212,5 +217,5 @@
   (*(_Functionnal_unit->out_EXECUTE_OUT_PACKET_ID    )) (out_EXECUTE_OUT_PACKET_ID    );
 //(*(_Functionnal_unit->out_EXECUTE_OUT_OPERATION    )) (out_EXECUTE_OUT_OPERATION    );
-//(*(_Functionnal_unit->out_EXECUTE_OUT_TYPE         )) (out_EXECUTE_OUT_TYPE         );
+  (*(_Functionnal_unit->out_EXECUTE_OUT_TYPE         )) (out_EXECUTE_OUT_TYPE         );
   (*(_Functionnal_unit->out_EXECUTE_OUT_WRITE_RD     )) (out_EXECUTE_OUT_WRITE_RD     );
   (*(_Functionnal_unit->out_EXECUTE_OUT_NUM_REG_RD   )) (out_EXECUTE_OUT_NUM_REG_RD   );
@@ -616,4 +621,7 @@
 	      in_EXECUTE_IN_OPERATION     .write(transaction_in.front()._operation    );
 	      in_EXECUTE_IN_TYPE          .write(transaction_in.front()._type         );
+	      in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE.write(0);
+	      if (_param->_have_port_load_queue_ptr)
+	      in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE .write(0);
 	      in_EXECUTE_IN_HAS_IMMEDIAT  .write(transaction_in.front()._has_immediat );
 	      in_EXECUTE_IN_IMMEDIAT      .write(transaction_in.front()._immediat     );
@@ -641,5 +649,5 @@
 	      TEST(Tcontext_t        , out_EXECUTE_OUT_OOO_ENGINE_ID.read(), transaction_out.front()._ooo_engine_id);
 	    //TEST(Toperation_t      , out_EXECUTE_OUT_OPERATION    .read(), transaction_out.front()._operation    );
-	    //TEST(Ttype_t           , out_EXECUTE_OUT_TYPE         .read(), transaction_out.front()._type         );
+	      TEST(Ttype_t           , out_EXECUTE_OUT_TYPE         .read(), transaction_out.front()._type         );
 	      TEST(Tcontrol_t        , out_EXECUTE_OUT_WRITE_RE     .read(), transaction_out.front()._write_re     );
 	      TEST(Tgeneral_address_t, out_EXECUTE_OUT_NUM_REG_RD   .read(), transaction_out.front()._num_reg_rd   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h	(revision 78)
@@ -10,6 +10,4 @@
  */
 
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h"
-
 #ifdef SYSTEMC
 #include "systemc.h"
@@ -20,7 +18,9 @@
 #include "Common/include/Debug.h"
 #include "Behavioural/include/Types.h"
+#include "Behavioural/include/Identification.h"
 
+#include "Behavioural/include/Types.h"
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"
 #ifdef STATISTICS
 #include "Behavioural/include/Stat.h"
@@ -86,4 +86,6 @@
   public    : SC_IN (Toperation_t      )    *  in_EXECUTE_IN_OPERATION      ;
   public    : SC_IN (Ttype_t           )    *  in_EXECUTE_IN_TYPE           ;
+  public    : SC_IN (Tlsq_ptr_t        )    *  in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE;
+  public    : SC_IN (Tlsq_ptr_t        )    *  in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE;
   public    : SC_IN (Tcontrol_t        )    *  in_EXECUTE_IN_HAS_IMMEDIAT   ;
   public    : SC_IN (Tgeneral_data_t   )    *  in_EXECUTE_IN_IMMEDIAT       ;
@@ -104,5 +106,5 @@
   public    : SC_OUT(Tpacket_t         )    * out_EXECUTE_OUT_PACKET_ID      ;
 //public    : SC_OUT(Toperation_t      )    * out_EXECUTE_OUT_OPERATION      ;
-//public    : SC_OUT(Ttype_t           )    * out_EXECUTE_OUT_TYPE           ;
+  public    : SC_OUT(Ttype_t           )    * out_EXECUTE_OUT_TYPE           ;
   public    : SC_OUT(Tcontrol_t        )    * out_EXECUTE_OUT_WRITE_RD       ;
   public    : SC_OUT(Tgeneral_address_t)    * out_EXECUTE_OUT_NUM_REG_RD     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h	(revision 77)
+++ 	(revision )
@@ -1,75 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Common/include/ToString.h"
-#include "Common/include/Debug.h"
-#include "Common/include/ErrorMorpheo.h"
-#include "Behavioural/include/Types.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_execute_unit {
-namespace execute_unit {
-namespace functionnal_unit {
-
-  void operation_unimplemented   (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_add           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_addc          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sub           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_mul           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_mulu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_div           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-//void operation_l_divu          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_and           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_or            (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_xor           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_test_f        (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_test_nf       (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_jalr          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sll           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sra           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_srl           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_ror           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_movhi         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_extend_s      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_extend_z      (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_cmov          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_ff1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_fl1           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_mfspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_mtspr         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfeq          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfne          (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfgeu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfgtu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfleu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfltu         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfges         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfgts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sfles         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_sflts         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_mac           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_msb           (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-  void operation_l_macrc         (execute_operation_t * op, execute_register_t  * reg, execute_param_t * param);
-
-}; // end namespace functionnal_unit
-}; // end namespace execute_unit
-}; // end namespace multi_execute_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-}; // end namespace morpheo              
-
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h	(revision 78)
@@ -11,6 +11,7 @@
 #include "Common/include/Debug.h"
 #include "Behavioural/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h"
 #include "Behavioural/Custom/include/Custom.h"
+#include "Behavioural/Custom/include/Custom_default.h"
 #include <math.h>
 
@@ -36,4 +37,7 @@
   public : const uint32_t            _size_special_data            ;
   public : const uint32_t            _nb_special_register          ;
+  public : const uint32_t            _size_store_queue             ;
+  public : const uint32_t            _size_load_queue              ;
+
   public :       execute_timing_t ** _timing                       ;
   public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t);
@@ -50,4 +54,5 @@
   public : const bool                _have_port_ooo_engine_id      ;
   public : const bool                _have_port_packet_id          ;
+  public : const bool                _have_port_load_queue_ptr     ;
 
   public : const bool                _have_groupe_MAC              ;
@@ -62,4 +67,6 @@
 			uint32_t           size_special_data  ,
 			uint32_t           nb_special_register,
+			uint32_t           size_store_queue   ,
+			uint32_t           size_load_queue    ,
 			execute_timing_t** timing             ,
 			morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t));
@@ -67,5 +74,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h	(revision 77)
+++ 	(revision )
@@ -1,166 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#ifdef SYSTEMC
-#include "systemc.h"
-#endif
-
-#include "Common/include/BitManipulation.h"
-#include "Behavioural/include/SPR_access_mode.h"
-#include "Behavioural/include/Types.h"
-#include "Behavioural/include/Parameters.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_execute_unit {
-namespace execute_unit {
-namespace functionnal_unit {
-
-  class execute_timing_t
-  {
-    // if delay   > 0, can't accepted a transaction on EXECUTE_IN's  interface.
-  public : uint32_t        _delay  ;
-    // if latence > 0, can't initiate a transaction on EXECUTE_OUT's interface.
-  public : uint32_t        _latence;
-
-  public : execute_timing_t (uint32_t delay=0, uint32_t latence=0)
-    {
-      _delay   = delay;
-      _latence = latence;
-    };
-  };
-
-  typedef struct 
-  {
-    execute_timing_t   _timing      ;
-
-    Tcontext_t         _context_id   ;
-    Tcontext_t         _front_end_id ;
-    Tcontext_t         _ooo_engine_id;
-    Tpacket_t          _packet_id ;
-
-    Toperation_t       _operation   ;
-    Ttype_t            _type        ;
-    Tcontrol_t         _has_immediat;
-    Tgeneral_data_t    _immediat    ;
-    Tgeneral_data_t    _data_ra     ;
-    Tgeneral_data_t    _data_rb     ;
-    Tspecial_data_t    _data_rc     ;
-    Tgeneral_data_t    _data_rd     ;
-    Tspecial_data_t    _data_re     ;
-
-    Tcontrol_t         _write_rd  ;
-    Tgeneral_address_t _num_reg_rd;
-    Tcontrol_t         _write_re  ;
-    Tspecial_address_t _num_reg_re;
-
-    Texception_t       _exception   ;
-    Tcontrol_t         _no_sequence ;
-    Tgeneral_data_t    _address     ;
-  } execute_operation_t;
-
-  class execute_param_t
-  {
-  public : const uint32_t            _size_data;
-  public : const Tgeneral_data_t     _mask_data;
-  public : const Tgeneral_data_t     _mask_shift;
-  public :       execute_timing_t ** _timing;
-
-  public : execute_param_t (const uint32_t      size_data,
-			    execute_timing_t ** timing):
-    _size_data (size_data),
-    _mask_data (gen_mask<Tgeneral_data_t> (size_data)),
-    _mask_shift(gen_mask<Tgeneral_data_t> (log2(size_data)))
-    {
-      _timing = timing;
-    };
-  public : ~execute_param_t (void)
-    {
-    };
-  } ;
-
-  class execute_register_t
-  {
-    // information to custom group : 
-    //  * perhalps a custom group start an operation after a access at a internal's group register
-  public : bool               _i_read_spr;
-  public : bool               _i_write_spr;
-  public : uint32_t           _access_num_group;
-  public : uint32_t           _access_num_register;
-  public : Tgeneral_data_t    _spr_old;
-  public : Tgeneral_data_t ** _spr;
-  public : SPR_access_mode  * _spr_access_mode;
-    
-  public : execute_register_t (void)
-    {
-      _spr               = new Tgeneral_data_t * [NB_GROUP];
-      _spr_access_mode   = new SPR_access_mode;
-  
-      for (uint32_t i=0; i<NB_GROUP; i++)
-	{
-	  _spr               [i] = NULL;
-	}
-    }
-
-  public : ~execute_register_t (void)
-    {
-      for (uint32_t x=0; x<NB_GROUP; x++)
-	if (_spr[x] != NULL)
-	  delete _spr[x];
-      delete _spr;
-      delete _spr_access_mode;
-    }
-
-  public : void implement_group (uint32_t num_group, uint32_t nb_reg)
-    {
-      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
-	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
-
-      if (nb_reg > 0)
-	{
-	  _spr [num_group] = new Tgeneral_data_t [nb_reg];
-
-	  if (num_group >= GROUP_CUSTOM_1)
-	    _spr_access_mode ->implement_group(num_group, nb_reg);
-	}
-    }
-
-  public : void implement_group (uint32_t num_group)
-    {
-      if ((num_group > NB_GROUP) or (_spr[num_group] != NULL))
-	throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented.");
-
-      uint32_t nb_reg = _spr_access_mode ->implement_group(num_group);
-
-      if (nb_reg > 0)
-	_spr [num_group] = new Tgeneral_data_t [nb_reg];
-    }
-  };
-  
-  typedef void function_execute_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, 
-				   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
-				   morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
-
-  typedef void function_execute_end_cycle_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t  *,
-					     morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t     *);
-
-  
-}; // end namespace functionnal_unit
-}; // end namespace execute_unit
-}; // end namespace multi_execute_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp	(revision 78)
@@ -71,4 +71,7 @@
        in_EXECUTE_IN_OPERATION     = interface->set_signal_in <Toperation_t      > ("operation"    , _param->_size_operation    );
        in_EXECUTE_IN_TYPE          = interface->set_signal_in <Ttype_t           > ("type"         , _param->_size_type         );
+       in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write",log2(_param->_size_store_queue));
+       if (_param->_have_port_load_queue_ptr)
+       in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue));
        in_EXECUTE_IN_HAS_IMMEDIAT  = interface->set_signal_in <Tcontrol_t        > ("has_immediat" , 1);
        in_EXECUTE_IN_IMMEDIAT      = interface->set_signal_in <Tgeneral_data_t   > ("immediat"     , _param->_size_general_data);
@@ -102,5 +105,5 @@
        out_EXECUTE_OUT_PACKET_ID      = interface->set_signal_out<Tpacket_t         > ("packet_id"    ,_param->_size_packet_id    );
      //out_EXECUTE_OUT_OPERATION      = interface->set_signal_out<Toperation_t      > ("operation"    ,_param->_size_operation    );
-     //out_EXECUTE_OUT_TYPE           = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type         );
+       out_EXECUTE_OUT_TYPE           = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type         );
        out_EXECUTE_OUT_WRITE_RD       = interface->set_signal_out<Tcontrol_t        > ("write_rd"     ,1);
        out_EXECUTE_OUT_NUM_REG_RD     = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd"   ,_param->_size_general_register);
@@ -111,5 +114,5 @@
        out_EXECUTE_OUT_EXCEPTION      = interface->set_signal_out<Texception_t      > ("exception"    ,_param->_size_exception);
        out_EXECUTE_OUT_NO_SEQUENCE    = interface->set_signal_out<Tcontrol_t        > ("no_sequence"  ,1);
-       out_EXECUTE_OUT_ADDRESS        = interface->set_signal_out<Tgeneral_data_t   > ("address     " ,_param->_size_general_data);
+       out_EXECUTE_OUT_ADDRESS        = interface->set_signal_out<Tgeneral_data_t   > ("address"      ,_param->_size_general_data);
      }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp	(revision 78)
@@ -41,4 +41,7 @@
 	delete  in_EXECUTE_IN_OPERATION     ;
 	delete  in_EXECUTE_IN_TYPE          ;
+	delete  in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
+	delete  in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE ;
 	delete  in_EXECUTE_IN_HAS_IMMEDIAT  ;
 	delete  in_EXECUTE_IN_IMMEDIAT      ;
@@ -62,5 +65,5 @@
 	delete out_EXECUTE_OUT_PACKET_ID      ; 
       //delete out_EXECUTE_OUT_OPERATION      ; 
-      //delete out_EXECUTE_OUT_TYPE           ; 
+	delete out_EXECUTE_OUT_TYPE           ; 
 	delete out_EXECUTE_OUT_WRITE_RD       ; 
 	delete out_EXECUTE_OUT_NUM_REG_RD     ; 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp	(revision 78)
@@ -37,5 +37,5 @@
     PORT_WRITE(out_EXECUTE_OUT_PACKET_ID    ,_execute_operation->_packet_id    );
   //PORT_WRITE(out_EXECUTE_OUT_OPERATION    ,_execute_operation->_operation    );
-  //PORT_WRITE(out_EXECUTE_OUT_TYPE         ,_execute_operation->_type         );
+    PORT_WRITE(out_EXECUTE_OUT_TYPE         ,_execute_operation->_type         );
     PORT_WRITE(out_EXECUTE_OUT_WRITE_RD     ,_execute_operation->_write_rd     );
     PORT_WRITE(out_EXECUTE_OUT_NUM_REG_RD   ,_execute_operation->_num_reg_rd   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Operation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Operation.cpp	(revision 77)
+++ 	(revision )
@@ -1,836 +1,0 @@
-#ifdef SYSTEMC
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h"
-
-#define neg(data)                  (~(data)+1)
-#define sign(data)                 ((data)>>(param->_size_data-1))
-#define unsigned(data)             (data)
-#define signed(data)               ((sign(data)==0)?(data):neg(data))
-#define ovf(op1, op2, res)         ((sign(op1) == sign(op2))?(sign(op1) xor sign(res)):0)
-#define carry(op1, op2, res)       (((res)<(op1)) or ((res)<(op2)))
-#define set_flag(data,flag,is_set) (((is_set)==1)?((data)|(flag)):((data)&~(flag)))
-#define get_flag(data,flag)	   (((data)&(flag))!=0)
-#define concatenation_bool(a,b)    (((a)<<1) | (b))
-
-namespace morpheo                    {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace multi_execute_unit {
-namespace execute_unit {
-namespace functionnal_unit {
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_unimplemented"
-  void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : unimplemented");
-
-    throw ERRORMORPHEO(FUNCTION,"The operation '"+toString(op->_operation)+"' is not implemented in this Functionnal_unit");
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_add"
-  void operation_l_add         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_add");
-
-    Tgeneral_data_t gpr1      = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2      = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    
-    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
-
-    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
-    bool            carry_out = carry(gpr1,gpr2,gpr3);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-    op->_data_re      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
-    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
-    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_addc"
-  void operation_l_addc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_addc");
-
-    Tgeneral_data_t carry_in   = get_flag(op->_data_rc,FLAG_CY);
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = param->_mask_data & (gpr1 + gpr2 + carry_in);
-
-    bool            overflow   = ovf  (gpr1,gpr2,gpr3);
-    bool            carry_out  = carry(gpr1,gpr2,gpr3);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-    op->_data_re      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
-    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
-    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sub"
-  void operation_l_sub         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sub");
-
-    Tgeneral_data_t gpr1      =     unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2      = neg(unsigned(op->_data_rb));
-    Tgeneral_data_t gpr3      = param->_mask_data & (gpr1 + gpr2);
-
-    bool            overflow  = ovf  (gpr1,gpr2,gpr3);
-    bool            carry_out = carry(gpr1,gpr2,gpr3);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-    op->_data_re      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_OV,overflow );
-    op->_data_re      = set_flag(op->_data_re,FLAG_CY,carry_out);
-    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_and"
-  void operation_l_and         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_and");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = (gpr1 & gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_or"
-  void operation_l_or          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_or");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = (gpr1 | gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_xor"
-  void operation_l_xor         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_xor");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = (gpr1 ^ gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_movhi"
-  void operation_l_movhi       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_movhi");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_immediat);
-    Tgeneral_data_t gpr2       = param->_mask_data & (gpr1<<16);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_cmov"
-  void operation_l_cmov        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_cmov");
-
-    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
-    Tgeneral_data_t gpr3       = ((f_in==0)?gpr2:gpr1);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_test_f"
-  void operation_l_test_f      (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_f");
-
-    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = f_in != 0;
-    op->_address      = imm;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_test_nf"
-  void operation_l_test_nf     (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_nf");
-
-    Tgeneral_data_t f_in       = get_flag(op->_data_rc,FLAG_F);
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = f_in == 0;
-    op->_address      = imm;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_jalr"
-  void operation_l_jalr        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_jalr");
-    // jal  : has_imm = 1, write_rd = 1, read_rb = 0
-    // jalr : has_imm = 1, write_rd = 1, read_rb = 1
-    // jr   : has_imm = 0, write_rd = 0, read_rb = 1
-
-
-    Tgeneral_data_t gpr        = unsigned(op->_data_rb);
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = imm;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 1;
-    op->_address      = gpr;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_extend_s"
-  void operation_l_extend_s    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_s");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, true , imm);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_extend_z"
-  void operation_l_extend_z    (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_z");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = extend<Tgeneral_data_t>(param->_size_data, gpr1, false , imm);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sll"
-  void operation_l_sll         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sll");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = shift_logic_left<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_srl"
-  void operation_l_srl         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_srl");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = shift_logic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sra"
-  void operation_l_sra         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sra");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = shift_arithmetic_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_ror"
-  void operation_l_ror         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ror");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    Tgeneral_data_t gpr3       = rotate_right<Tgeneral_data_t>(param->_size_data, gpr1, gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr3;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_ff1"
-  void operation_l_ff1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ff1");
-
-    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
-    Tgeneral_data_t index;
-
-    for (index=0; (index<param->_size_data) and (((gpr>>index)&1)!= 1); index++);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = (index==param->_size_data)?0:(index+1);
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_fl1"
-  void operation_l_fl1         (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_fl1");
-
-    Tgeneral_data_t gpr        = unsigned(op->_data_ra);
-    Tgeneral_data_t index;
-
-    for (index=param->_size_data; (index>0) and (((gpr>>(index-1))&1)!= 1); index--);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = index;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfeq"
-  void operation_l_sfeq        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfeq");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 == gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfne"
-  void operation_l_sfne        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfne");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 != gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfgeu"
-  void operation_l_sfgeu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgeu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 >= gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfgtu"
-  void operation_l_sfgtu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgtu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 >  gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfleu"
-  void operation_l_sfleu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfleu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 <= gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfltu"
-  void operation_l_sfltu       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfltu");
-
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-
-    bool            f_out      = (gpr1 <  gpr2);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfges"
-  void operation_l_sfges       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfges");
-
-    Tgeneral_data_t gpr1       =   op->_data_ra;
-    Tgeneral_data_t gpr2       =   (op->_has_immediat==1)?op->_immediat:op->_data_rb;
-    
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra  : %.8x",unsigned(op->_data_ra));
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ras : %.8x",  signed(op->_data_ra));
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb  : %.8x",unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb));
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rbs : %.8x",  signed((op->_has_immediat==1)?op->_immediat:op->_data_rb));
-    
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 1                               ; break;
-      case 2 /*b10*/ : f_out = 0                               ; break;
-      default        : f_out = signed(gpr1) >= signed(gpr2); break;
-      }
-
-    log_printf(TRACE,Functionnal_unit,FUNCTION," * f_out    : %.8x",f_out);
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfgts"
-  void operation_l_sfgts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgts");
-
-    Tgeneral_data_t gpr1       = op->_data_ra ;
-    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
-
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 1; break;
-      case 2 /*b10*/ : f_out = 0; break;
-      default        : f_out = signed(gpr1) >  signed(gpr2); break;
-      }
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sfles"
-  void operation_l_sfles       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfles");
-
-    Tgeneral_data_t gpr1       = op->_data_ra ;
-    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb ;
-
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 0; break;
-      case 2 /*b10*/ : f_out = 1; break;
-      default        : f_out = signed(gpr1) <= signed(gpr2); break;
-      }
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_sflts"
-  void operation_l_sflts       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sflts");
-
-    Tgeneral_data_t gpr1       = op->_data_ra ;
-    Tgeneral_data_t gpr2       = (op->_has_immediat==1)?op->_immediat:op->_data_rb;
-
-    bool            f_out;
-
-    switch (concatenation_bool(sign(gpr1),sign(gpr2)))
-      {
-      case 1 /*b01*/ : f_out = 0; break;
-      case 2 /*b10*/ : f_out = 1; break;
-      default        : f_out = signed(gpr1) <  signed(gpr2); break;
-      }
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-    op->_data_re      = set_flag(op->_data_re,FLAG_F,f_out);
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_mtspr"
-  void operation_l_mtspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mtspr");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = unsigned(op->_data_rb);
-    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
-
-    Texception_t    exception;
-
-    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
-    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
-    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
-
-    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
-    
-    // Test if this group is implemented in this functionnal_unit
-    if (reg->_spr_access_mode->valid(spr_addr))
-      {
-	if (reg->_spr_access_mode->write(spr_addr, flag_SM, flag_SUMRA))
-	  {
-	    reg->_i_write_spr         = true;
-	    reg->_access_num_group    = spr_addr._group;
-	    reg->_access_num_register = spr_addr._register;
-	    reg->_spr_old             = reg->_spr[spr_addr._group][spr_addr._register];
-	    reg->_spr[spr_addr._group][spr_addr._register] = gpr2;
-
-	    exception = EXCEPTION_ALU_NONE;
-	  }
-	else
-	  {
-	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
-	  }
-      }
-    else
-      {
-	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
-      }
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr2; // data_rb
-  //op->_data_re      = 0;
-    op->_exception    = exception;
-    op->_no_sequence  = 0;
-    op->_address      = addr; // data_ra or imm
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_mfspr"
-  void operation_l_mfspr       (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mfspr");
-
-    Tgeneral_data_t imm        = unsigned(op->_immediat);
-    Tgeneral_data_t gpr1       = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2       = 0;
-    Tgeneral_data_t addr       = range<Tgeneral_data_t>(gpr1|imm,16);
-
-    Texception_t    exception;
-
-    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
-    Tcontrol_t      flag_SM    = get_flag(op->_num_reg_re, 0x1);
-    Tcontrol_t      flag_SUMRA = get_flag(op->_num_reg_re, 0x2);
-
-    spr_address_t   spr_addr   = reg->_spr_access_mode->translate_address(addr);
-    
-    // Test if this group is implemented in this functionnal_unit
-    if (reg->_spr_access_mode->valid(spr_addr))
-      {
-	if (reg->_spr_access_mode->read(spr_addr, flag_SM, flag_SUMRA))
-	  {
-	    reg->_i_read_spr          = true;
-	    reg->_access_num_group    = spr_addr._group;
-	    reg->_access_num_register = spr_addr._register;
-	    
-	    gpr2 = reg->_spr[spr_addr._group][spr_addr._register];
-
-	    exception = EXCEPTION_ALU_NONE;
-	  }
-	else
-	  {
-	    exception = EXCEPTION_ALU_SPR_ACCESS_INVALID;
-	  }
-      }
-    else
-      {
-	exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE;
-      }
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_write_rd     = (exception == EXCEPTION_ALU_NONE);
-    op->_data_rd      = gpr2; // spr
-  //op->_data_re      = 0;
-    op->_exception    = exception;
-    op->_no_sequence  = 0;
-    op->_address      = addr; // data_ra or imm
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_macrc"
-  void operation_l_macrc        (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_macrc");
-
-    Tgeneral_data_t gpr = static_cast<Tgeneral_data_t>(range<uint64_t>((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO]), param->_size_data));
-
-    reg->_spr[GROUP_MAC][SPR_MACLO] = 0;
-    reg->_spr[GROUP_MAC][SPR_MACHI] = 0;
-
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-    op->_data_rd      = gpr;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_mac"
-  void operation_l_mac          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mac");
-
-    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
-
-    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) + temp;
-
-    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
-    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-#undef  FUNCTION
-#define FUNCTION "Functionnal_unit::operation_l_msb"
-  void operation_l_msb          (execute_operation_t * op, execute_register_t * reg, execute_param_t * param)
-  {
-    log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_msb");
-
-    Tgeneral_data_t gpr1 = unsigned(op->_data_ra);
-    Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb);
-    uint64_t        temp = range<uint64_t>(gpr1 * gpr2, 32);
-
-    temp = ((static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast<uint64_t>(reg->_spr[GROUP_MAC][SPR_MACLO])) - temp;
-
-    reg->_spr[GROUP_MAC][SPR_MACLO] = range<Tgeneral_data_t>(temp    ,32);
-    reg->_spr[GROUP_MAC][SPR_MACHI] = range<Tgeneral_data_t>(temp>>32,32);
-    
-    // Result
-    op->_timing       = param->_timing[op->_type][op->_operation];
-  //op->_data_rd      = 0;
-  //op->_data_re      = 0;
-    op->_exception    = EXCEPTION_ALU_NONE;
-    op->_no_sequence  = 0;
-  //op->_address      = 0;
-  };
-
-}; // end namespace functionnal_unit
-}; // end namespace execute_unit
-}; // end namespace multi_execute_unit
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp	(revision 78)
@@ -28,4 +28,6 @@
 			  uint32_t           size_special_data  ,
 			  uint32_t           nb_special_register,
+			  uint32_t           size_store_queue   ,
+			  uint32_t           size_load_queue    ,
 			  execute_timing_t** timing             ,
 			  morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)) :
@@ -38,11 +40,13 @@
     _size_special_data       (size_special_data     ),
     _nb_special_register     (nb_special_register   ),
-    
+    _size_store_queue        (size_store_queue      ),
+    _size_load_queue         (size_load_queue       ),
+
     _size_context_id         (log2(nb_context      )),
     _size_front_end_id       (log2(nb_front_end    )),
     _size_ooo_engine_id      (log2(nb_ooo_engine   )),
     _size_packet_id          (log2(nb_packet       )),
-    _size_general_register   (log2(_size_general_register)),
-    _size_special_register   (log2(_size_special_register)),
+    _size_general_register   (log2(nb_general_register)),
+    _size_special_register   (log2(nb_special_register)),
 
     _have_port_context_id    (_size_context_id    > 0),
@@ -50,4 +54,5 @@
     _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
     _have_port_packet_id     (_size_packet_id     > 0),
+    _have_port_load_queue_ptr(_size_load_queue    > 1),
 
     _have_groupe_MAC         ( (timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC  ]._latence > 0) or
@@ -58,5 +63,9 @@
 
     _timing                 = timing;
-    _get_custom_information = get_custom_information;
+
+    if (get_custom_information == NULL)
+      _get_custom_information = &(morpheo::behavioural::custom::default_get_custom_information);
+    else
+      _get_custom_information = get_custom_information;
 
     test();
@@ -76,4 +85,6 @@
     _size_special_data       (param._size_special_data      ),
     _nb_special_register     (param._nb_special_register    ),
+    _size_store_queue        (param._size_store_queue       ),
+    _size_load_queue         (param._size_load_queue        ),
 
     _size_context_id         (param._size_context_id        ),
@@ -88,4 +99,5 @@
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     _have_port_packet_id     (param._have_port_packet_id    ),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr),
 
     _have_groupe_MAC         (param._have_groupe_MAC        )
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -22,23 +22,23 @@
 #undef  FUNCTION
 #define FUNCTION "Functionnal_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
+    Parameters_test test("Functionnal_unit");
 
     for (uint32_t i=0; i<_nb_type; i++)
       for (uint32_t j=0; j<_nb_operation; j++)
 	if (_timing[i][j]._delay != _timing[i][j]._latence)
-	  msg = "  - For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal.";
+	  test.error("For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal.");
 
     if (_have_groupe_MAC and ((_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC  ]._latence == 0) or
 			      (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MACRC]._latence == 0) or
 			      (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MSB  ]._latence == 0)))
-      msg = "  - The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.";
-
-    return msg;
+      test.error("The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.");
 
     log_printf(FUNC,Functionnal_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg	(revision 78)
@@ -5,4 +5,5 @@
 2	2	+1	# nb_port_check
 2	2	+1	# speculative_load       {none,access,commit,bypass}
+0	0	+1	# bypass_memory
 2	2	*2	# nb_context             1	1	*2	
 2	2	*2	# nb_front_end		 1	1	*2	
@@ -10,3 +11,5 @@
 64	64	*2	# nb_packet              
 32	32	*2	# size_general_data      
+2	2	*2	# size_special_data      
 32	32	*2	# nb_general_register    
+16	16	*2	# nb_special_register    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp	(revision 78)
@@ -10,5 +10,5 @@
 #define number_of_test 2
 
-#define NB_PARAMS 11
+#define NB_PARAMS 14
 
 void usage (int argc, char * argv[])
@@ -21,4 +21,5 @@
        << " - nb_port_check           (uint32_t)" << endl
        << " - speculative_load        (uint32_t)" << endl
+       << " - nb_bypass_memory        (uint32_t)" << endl
        << " - nb_context              (uint32_t)" << endl
        << " - nb_front_end            (uint32_t)" << endl
@@ -26,5 +27,7 @@
        << " - nb_packet               (uint32_t)" << endl
        << " - size_general_data       (uint32_t)" << endl
+       << " - size_special_data       (uint32_t)" << endl
        << " - nb_general_register     (uint32_t)" << endl
+       << " - nb_special_register     (uint32_t)" << endl
        << "" << endl;
 
@@ -58,4 +61,5 @@
 	const uint32_t            _nb_port_check           = atoi(argv[x++]);
 	const Tspeculative_load_t _speculative_load        = fromString<Tspeculative_load_t>(argv[x++]);
+	const uint32_t            _nb_bypass_memory        = atoi(argv[x++]);
 	const uint32_t            _nb_context              = atoi(argv[x++]);
 	const uint32_t            _nb_front_end            = atoi(argv[x++]);
@@ -63,5 +67,7 @@
 	const uint32_t            _nb_packet               = atoi(argv[x++]);
 	const uint32_t            _size_general_data       = atoi(argv[x++]);
+	const uint32_t            _size_special_data       = atoi(argv[x++]);
 	const uint32_t            _nb_general_register     = atoi(argv[x++]);
+	const uint32_t            _nb_special_register     = atoi(argv[x++]);
 	
 	try 
@@ -74,4 +80,5 @@
 	       _nb_port_check          ,
 	       _speculative_load       ,
+	       _nb_bypass_memory       ,
 	       _nb_context             ,
 	       _nb_front_end           ,
@@ -79,5 +86,7 @@
 	       _nb_packet              ,
 	       _size_general_data      ,
-	       _nb_general_register    );
+	       _size_special_data      ,
+	       _nb_general_register    ,
+	       _nb_special_register    );
 	    
 	    cout << param->print(1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp	(revision 78)
@@ -73,13 +73,13 @@
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_IMMEDIAT              = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RA               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RB               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  //sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
-//   sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_address_t> *   in_MEMORY_IN_NUM_REG_RD            = new sc_signal<Tgeneral_address_t> (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
-  //sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
 
   sc_signal<Tcontrol_t	      > *  out_MEMORY_OUT_VAL           = new sc_signal<Tcontrol_t	  >(rename.c_str());
@@ -89,11 +89,15 @@
   sc_signal<Tcontext_t        > *  out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t        >(rename.c_str());
   sc_signal<Tpacket_t         > *  out_MEMORY_OUT_PACKET_ID     = new sc_signal<Tpacket_t         >(rename.c_str());
+//   sc_signal<Toperation_t      > *  out_MEMORY_OUT_OPERATION     = new sc_signal<Toperation_t      >(rename.c_str());
+  sc_signal<Ttype_t           > *  out_MEMORY_OUT_TYPE          = new sc_signal<Ttype_t           >(rename.c_str());
   sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RD      = new sc_signal<Tcontrol_t        >(rename.c_str());
   sc_signal<Tgeneral_address_t> *  out_MEMORY_OUT_NUM_REG_RD    = new sc_signal<Tgeneral_address_t>(rename.c_str());
   sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_DATA_RD       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-  //sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
-  //sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
-  //sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
+  sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
   sc_signal<Texception_t      > *  out_MEMORY_OUT_EXCEPTION     = new sc_signal<Texception_t      >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_NO_SEQUENCE   = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_ADDRESS       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
 
   sc_signal<Tcontrol_t        > * out_DCACHE_REQ_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -112,10 +116,10 @@
   sc_signal<Tdcache_error_t   > *  in_DCACHE_RSP_ERROR      = new sc_signal<Tdcache_error_t   >(rename.c_str());
   
-  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_size_load_queue];
-  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_size_load_queue];
-  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue];
-  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_size_load_queue];
+  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
     
-  for (uint32_t i=0; i<_param->_size_load_queue; i++)
+  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
     {
       out_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -137,41 +141,47 @@
   (*(_Load_store_unit->out_MEMORY_IN_ACK                  ))(*(out_MEMORY_IN_ACK                  ));
   if (_param->_have_port_context_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID           ))(*( in_MEMORY_IN_CONTEXT_ID           ));
+  (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID           ))(*( in_MEMORY_IN_CONTEXT_ID           ));
   if (_param->_have_port_front_end_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID         ))(*( in_MEMORY_IN_FRONT_END_ID         ));
+  (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID         ))(*( in_MEMORY_IN_FRONT_END_ID         ));
   if (_param->_have_port_ooo_engine_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID        ))(*( in_MEMORY_IN_OOO_ENGINE_ID        ));
+  (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID        ))(*( in_MEMORY_IN_OOO_ENGINE_ID        ));
   if (_param->_have_port_packet_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
+  (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
   (*(_Load_store_unit-> in_MEMORY_IN_OPERATION            ))(*( in_MEMORY_IN_OPERATION            ));
+  (*(_Load_store_unit-> in_MEMORY_IN_TYPE                 ))(*( in_MEMORY_IN_TYPE                 ));
   (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
+  (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
   (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT             ))(*( in_MEMORY_IN_IMMEDIAT             ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA              ))(*( in_MEMORY_IN_DATA_RA              ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB              ))(*( in_MEMORY_IN_DATA_RB              ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
-//   (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
   (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD           ))(*( in_MEMORY_IN_NUM_REG_RD           ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
   
   (*(_Load_store_unit->out_MEMORY_OUT_VAL           ))(*(out_MEMORY_OUT_VAL           ));
   (*(_Load_store_unit-> in_MEMORY_OUT_ACK           ))(*( in_MEMORY_OUT_ACK           ));
   if (_param->_have_port_context_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID    ))(*(out_MEMORY_OUT_CONTEXT_ID    ));
+  (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID    ))(*(out_MEMORY_OUT_CONTEXT_ID    ));
   if (_param->_have_port_front_end_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID  ))(*(out_MEMORY_OUT_FRONT_END_ID  ));
+  (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID  ))(*(out_MEMORY_OUT_FRONT_END_ID  ));
   if (_param->_have_port_ooo_engine_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID ));
+  (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID ));
   if (_param->_have_port_packet_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
+//   (*(_Load_store_unit->out_MEMORY_OUT_OPERATION     ))(*(out_MEMORY_OUT_OPERATION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_TYPE          ))(*(out_MEMORY_OUT_TYPE          ));
   (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD      ))(*(out_MEMORY_OUT_WRITE_RD      ));
   (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD    ))(*(out_MEMORY_OUT_NUM_REG_RD    ));
   (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD       ))(*(out_MEMORY_OUT_DATA_RD       ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
+  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
+  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
   (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION     ))(*(out_MEMORY_OUT_EXCEPTION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE   ))(*(out_MEMORY_OUT_NO_SEQUENCE   ));
+  (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS       ))(*(out_MEMORY_OUT_ADDRESS       ));
 
   (*(_Load_store_unit->out_DCACHE_REQ_VAL       ))(*(out_DCACHE_REQ_VAL       ));
@@ -192,7 +202,6 @@
   (*(_Load_store_unit-> in_DCACHE_RSP_ERROR     ))(*( in_DCACHE_RSP_ERROR     ));
 
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
-      for (uint32_t i=0; i<_param->_size_load_queue; i++)
+      for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	{
 	  (*(_Load_store_unit->out_BYPASS_MEMORY_VAL           [i]))(*(out_BYPASS_MEMORY_VAL           [i]));
@@ -486,4 +495,5 @@
 	      in_MEMORY_IN_TYPE                 ->write (fifo_request.top()._type                 );
 	      in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);
+	      if (_param->_have_port_load_queue_ptr)
 	      in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );
 	      in_MEMORY_IN_IMMEDIAT             ->write (fifo_request.top()._immediat             );
@@ -563,4 +573,6 @@
 		  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id);
 		  TEST(Tpacket_t         , out_MEMORY_OUT_PACKET_ID    ->read(), tab_request[packet_id]._packet_id    );
+// 		  TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    ->read(), tab_request[packet_id]._operation    );
+		  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         ->read(), TYPE_MEMORY                          );
 		  TEST(Tcontrol_t        , out_MEMORY_OUT_WRITE_RD     ->read(), tab_request[packet_id]._write_rd     );
 		  TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD   ->read(), tab_request[packet_id]._num_reg_rd   );
@@ -682,13 +694,13 @@
   delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-  //delete     in_MEMORY_IN_HAS_IMMEDIAT;
+  delete     in_MEMORY_IN_HAS_IMMEDIAT;
   delete     in_MEMORY_IN_IMMEDIAT    ;
   delete     in_MEMORY_IN_DATA_RA     ;
   delete     in_MEMORY_IN_DATA_RB     ;
-  //delete     in_MEMORY_IN_DATA_RC     ;
-//   delete     in_MEMORY_IN_WRITE_RD    ;
+  delete     in_MEMORY_IN_DATA_RC     ;
+  delete     in_MEMORY_IN_WRITE_RD    ;
   delete     in_MEMORY_IN_NUM_REG_RD  ;
-  //delete     in_MEMORY_IN_WRITE_RE    ;
-  //delete     in_MEMORY_IN_NUM_REG_RE  ;
+  delete     in_MEMORY_IN_WRITE_RE    ;
+  delete     in_MEMORY_IN_NUM_REG_RE  ;
     
   delete    out_MEMORY_OUT_VAL       ;
@@ -698,11 +710,15 @@
   delete    out_MEMORY_OUT_OOO_ENGINE_ID;
   delete    out_MEMORY_OUT_PACKET_ID ;
+//   delete    out_MEMORY_OUT_OPERATION ;
+  delete    out_MEMORY_OUT_TYPE      ;
   delete    out_MEMORY_OUT_WRITE_RD  ;
   delete    out_MEMORY_OUT_NUM_REG_RD;
   delete    out_MEMORY_OUT_DATA_RD   ;
-  //delete    out_MEMORY_OUT_WRITE_RE  ;
-  //delete    out_MEMORY_OUT_NUM_REG_RE;
-  //delete    out_MEMORY_OUT_DATA_RE   ;
+  delete    out_MEMORY_OUT_WRITE_RE  ;
+  delete    out_MEMORY_OUT_NUM_REG_RE;
+  delete    out_MEMORY_OUT_DATA_RE   ;
   delete    out_MEMORY_OUT_EXCEPTION ;
+  delete    out_MEMORY_OUT_NO_SEQUENCE;
+  delete    out_MEMORY_OUT_ADDRESS   ;
   
   delete    out_DCACHE_REQ_VAL       ;
@@ -721,5 +737,4 @@
   delete     in_DCACHE_RSP_ERROR     ;
   
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
       delete [] out_BYPASS_MEMORY_VAL       ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 78)
@@ -52,4 +52,5 @@
 	 2,  //_nb_port_check          
 	 SPECULATIVE_LOAD_COMMIT,  //_speculative_load       
+	 0,  //_nb_bypass_memory
 	 1,  //_nb_context             
 	 1,  //_nb_front_end           
@@ -57,5 +58,7 @@
 	 128,//_nb_packet              
 	 32, //_size_general_data      
-	 64  //_nb_general_register    
+	 2 , //_size_special_data      
+	 64, //_nb_general_register    
+	 16  //_nb_special_register    
         );
 
@@ -89,13 +92,13 @@
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
   sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_IMMEDIAT              = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RA               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
   sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RB               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  //sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
-//   sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
   sc_signal<Tgeneral_address_t> *   in_MEMORY_IN_NUM_REG_RD            = new sc_signal<Tgeneral_address_t> (rename.c_str());
-  //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
-  //sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
+  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
+  sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
 
   sc_signal<Tcontrol_t	      > *  out_MEMORY_OUT_VAL           = new sc_signal<Tcontrol_t	  >(rename.c_str());
@@ -105,11 +108,15 @@
   sc_signal<Tcontext_t        > *  out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t        >(rename.c_str());
   sc_signal<Tpacket_t         > *  out_MEMORY_OUT_PACKET_ID     = new sc_signal<Tpacket_t         >(rename.c_str());
+//   sc_signal<Toperation_t      > *  out_MEMORY_OUT_OPERATION     = new sc_signal<Toperation_t      >(rename.c_str());
+  sc_signal<Ttype_t           > *  out_MEMORY_OUT_TYPE          = new sc_signal<Ttype_t           >(rename.c_str());
   sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RD      = new sc_signal<Tcontrol_t        >(rename.c_str());
   sc_signal<Tgeneral_address_t> *  out_MEMORY_OUT_NUM_REG_RD    = new sc_signal<Tgeneral_address_t>(rename.c_str());
   sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_DATA_RD       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-  //sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
-  //sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
-  //sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
+  sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
   sc_signal<Texception_t      > *  out_MEMORY_OUT_EXCEPTION     = new sc_signal<Texception_t      >(rename.c_str());
+  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_NO_SEQUENCE   = new sc_signal<Tcontrol_t        >(rename.c_str());
+  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_ADDRESS       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
 
   sc_signal<Tcontrol_t        > * out_DCACHE_REQ_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -128,10 +135,10 @@
   sc_signal<Tdcache_error_t   > *  in_DCACHE_RSP_ERROR      = new sc_signal<Tdcache_error_t   >(rename.c_str());
   
-  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_size_load_queue];
-  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_size_load_queue];
-  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue];
-  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_size_load_queue];
+  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
+  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
     
-  for (uint32_t i=0; i<_param->_size_load_queue; i++)
+  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
     {
       out_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        >(rename.c_str());
@@ -161,15 +168,17 @@
     (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
   (*(_Load_store_unit-> in_MEMORY_IN_OPERATION            ))(*( in_MEMORY_IN_OPERATION            ));
+  (*(_Load_store_unit-> in_MEMORY_IN_TYPE                 ))(*( in_MEMORY_IN_TYPE                 ));
   (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
+  (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
   (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT             ))(*( in_MEMORY_IN_IMMEDIAT             ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA              ))(*( in_MEMORY_IN_DATA_RA              ));
   (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB              ))(*( in_MEMORY_IN_DATA_RB              ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
-//   (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
   (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD           ))(*( in_MEMORY_IN_NUM_REG_RD           ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
-  //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
+  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
+  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
   
   (*(_Load_store_unit->out_MEMORY_OUT_VAL           ))(*(out_MEMORY_OUT_VAL           ));
@@ -183,11 +192,15 @@
   if (_param->_have_port_packet_id)
     (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
+//   (*(_Load_store_unit->out_MEMORY_OUT_OPERATION     ))(*(out_MEMORY_OUT_OPERATION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_TYPE          ))(*(out_MEMORY_OUT_TYPE          ));
   (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD      ))(*(out_MEMORY_OUT_WRITE_RD      ));
   (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD    ))(*(out_MEMORY_OUT_NUM_REG_RD    ));
   (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD       ))(*(out_MEMORY_OUT_DATA_RD       ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
-  //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
+  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
+  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
   (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION     ))(*(out_MEMORY_OUT_EXCEPTION     ));
+  (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE   ))(*(out_MEMORY_OUT_NO_SEQUENCE   ));
+  (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS       ))(*(out_MEMORY_OUT_ADDRESS       ));
 
   (*(_Load_store_unit->out_DCACHE_REQ_VAL       ))(*(out_DCACHE_REQ_VAL       ));
@@ -208,7 +221,6 @@
   (*(_Load_store_unit-> in_DCACHE_RSP_ERROR     ))(*( in_DCACHE_RSP_ERROR     ));
 
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
-      for (uint32_t i=0; i<_param->_size_load_queue; i++)
+      for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	{
 	  (*(_Load_store_unit->out_BYPASS_MEMORY_VAL           [i]))(*(out_BYPASS_MEMORY_VAL           [i]));
@@ -448,4 +460,5 @@
 		  in_MEMORY_IN_TYPE                 ->write (fifo_request.top()._type                 );
 		  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);
+		  if (_param->_have_port_load_queue_ptr)
 		  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );
 		  in_MEMORY_IN_IMMEDIAT             ->write (fifo_request.top()._immediat             );
@@ -533,4 +546,6 @@
 		  TEST(Tcontext_t        , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id );
 		  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id);
+// 		  TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    ->read(), tab_request[packet_id]._operation    );
+		  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         ->read(), TYPE_MEMORY                          );
 
 		  if (is_operation_memory_load (tab_request[packet_id]._operation))
@@ -721,13 +736,13 @@
   delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-  //delete     in_MEMORY_IN_HAS_IMMEDIAT;
+  delete     in_MEMORY_IN_HAS_IMMEDIAT;
   delete     in_MEMORY_IN_IMMEDIAT    ;
   delete     in_MEMORY_IN_DATA_RA     ;
   delete     in_MEMORY_IN_DATA_RB     ;
-  //delete     in_MEMORY_IN_DATA_RC     ;
-//   delete     in_MEMORY_IN_WRITE_RD    ;
+  delete     in_MEMORY_IN_DATA_RC     ;
+  delete     in_MEMORY_IN_WRITE_RD    ;
   delete     in_MEMORY_IN_NUM_REG_RD  ;
-  //delete     in_MEMORY_IN_WRITE_RE    ;
-  //delete     in_MEMORY_IN_NUM_REG_RE  ;
+  delete     in_MEMORY_IN_WRITE_RE    ;
+  delete     in_MEMORY_IN_NUM_REG_RE  ;
     
   delete    out_MEMORY_OUT_VAL       ;
@@ -737,11 +752,15 @@
   delete    out_MEMORY_OUT_OOO_ENGINE_ID;
   delete    out_MEMORY_OUT_PACKET_ID ;
+//   delete    out_MEMORY_OUT_OPERATION ;
+  delete    out_MEMORY_OUT_TYPE      ;
   delete    out_MEMORY_OUT_WRITE_RD  ;
   delete    out_MEMORY_OUT_NUM_REG_RD;
   delete    out_MEMORY_OUT_DATA_RD   ;
-  //delete    out_MEMORY_OUT_WRITE_RE  ;
-  //delete    out_MEMORY_OUT_NUM_REG_RE;
-  //delete    out_MEMORY_OUT_DATA_RE   ;
+  delete    out_MEMORY_OUT_WRITE_RE  ;
+  delete    out_MEMORY_OUT_NUM_REG_RE;
+  delete    out_MEMORY_OUT_DATA_RE   ;
   delete    out_MEMORY_OUT_EXCEPTION ;
+  delete    out_MEMORY_OUT_NO_SEQUENCE;
+  delete    out_MEMORY_OUT_ADDRESS   ;
   
   delete    out_DCACHE_REQ_VAL       ;
@@ -760,5 +779,4 @@
   delete     in_DCACHE_RSP_ERROR     ;
   
-  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
     {
       delete [] out_BYPASS_MEMORY_VAL       ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h	(revision 78)
@@ -5,5 +5,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  * Ce composant peut être amélioré en placant deux ptr de lecture au lieu d'un : un pour l'accès au cache et un pour le commit
@@ -46,5 +46,5 @@
 #endif
   {
-    // -----[ fields ]----------------------------------------------------
+    // -----[ fields ]----------------------------------------------------
     // Parameters
   protected : const std::string       _name;
@@ -53,5 +53,5 @@
 
 #ifdef STATISTICS
-  private   : Stat                           * _stat;
+  public    : Stat                           * _stat;
 
   private   : counter_t                      * _stat_use_store_queue;
@@ -83,10 +83,10 @@
 
 #ifdef SYSTEMC
-    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     // Interface
   public    : SC_CLOCK                      *  in_CLOCK        ;
   public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
 
-    // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_VAL         ;
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_IN_ACK         ;
@@ -96,18 +96,18 @@
   public    : SC_IN (Tpacket_t         )    *  in_MEMORY_IN_PACKET_ID   ;
   public    : SC_IN (Toperation_t      )    *  in_MEMORY_IN_OPERATION   ;
-//public    : SC_IN (Ttype_t           )    *  in_MEMORY_IN_TYPE        ;
+  public    : SC_IN (Ttype_t           )    *  in_MEMORY_IN_TYPE        ;
   public    : SC_IN (Tlsq_ptr_t        )    *  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   public    : SC_IN (Tlsq_ptr_t        )    *  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-//public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_HAS_IMMEDIAT;
+  public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_HAS_IMMEDIAT;
   public    : SC_IN (Tgeneral_data_t   )    *  in_MEMORY_IN_IMMEDIAT    ; // memory address
   public    : SC_IN (Tgeneral_data_t   )    *  in_MEMORY_IN_DATA_RA     ; // memory address
   public    : SC_IN (Tgeneral_data_t   )    *  in_MEMORY_IN_DATA_RB     ; // data        (store)
-//public    : SC_IN (Tspecial_data_t   )    *  in_MEMORY_IN_DATA_RC     ;
-//public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RD    ; // = (operation==load)
+  public    : SC_IN (Tspecial_data_t   )    *  in_MEMORY_IN_DATA_RC     ;
+  public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RD    ; // = (operation==load)
   public    : SC_IN (Tgeneral_address_t)    *  in_MEMORY_IN_NUM_REG_RD  ; // destination (load)
-//public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RE    ;
-//public    : SC_IN (Tspecial_address_t)    *  in_MEMORY_IN_NUM_REG_RE  ;
-
-    // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_IN_WRITE_RE    ;
+  public    : SC_IN (Tspecial_address_t)    *  in_MEMORY_IN_NUM_REG_RE  ;
+
+    // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_VAL       ;
   public    : SC_IN (Tcontrol_t        )    *  in_MEMORY_OUT_ACK       ;
@@ -116,13 +116,18 @@
   public    : SC_OUT(Tcontext_t        )    * out_MEMORY_OUT_OOO_ENGINE_ID;
   public    : SC_OUT(Tpacket_t         )    * out_MEMORY_OUT_PACKET_ID ;
+//public    : SC_OUT(Toperation_t      )    * out_MEMORY_OUT_OPERATION ;
+  public    : SC_OUT(Ttype_t           )    * out_MEMORY_OUT_TYPE      ;
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RD  ; // = (operation==load)
   public    : SC_OUT(Tgeneral_address_t)    * out_MEMORY_OUT_NUM_REG_RD; // destination (load)
   public    : SC_OUT(Tgeneral_data_t   )    * out_MEMORY_OUT_DATA_RD   ; // data        (load)
-//public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RE  ;
-//public    : SC_OUT(Tspecial_address_t)    * out_MEMORY_OUT_NUM_REG_RE;
-//public    : SC_OUT(Tspecial_data_t   )    * out_MEMORY_OUT_DATA_RE   ;
+  public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RE  ;
+  public    : SC_OUT(Tspecial_address_t)    * out_MEMORY_OUT_NUM_REG_RE;
+  public    : SC_OUT(Tspecial_data_t   )    * out_MEMORY_OUT_DATA_RE   ;
   public    : SC_OUT(Texception_t      )    * out_MEMORY_OUT_EXCEPTION ;
-
-    // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_NO_SEQUENCE;
+  public    : SC_OUT(Tgeneral_data_t   )    * out_MEMORY_OUT_ADDRESS   ;
+    
+
+    // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_OUT(Tcontrol_t        )    * out_DCACHE_REQ_VAL       ;
   public    : SC_IN (Tcontrol_t        )    *  in_DCACHE_REQ_ACK       ;
@@ -133,5 +138,5 @@
   public    : SC_OUT(Tdcache_data_t    )    * out_DCACHE_REQ_WDATA     ;
 
-    // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )    *  in_DCACHE_RSP_VAL       ;
   public    : SC_OUT(Tcontrol_t        )    * out_DCACHE_RSP_ACK       ;
@@ -141,5 +146,5 @@
   public    : SC_IN (Tdcache_error_t   )    *  in_DCACHE_RSP_ERROR     ;
 
-    // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_OUT(Tcontrol_t        )   ** out_BYPASS_MEMORY_VAL       ;
   public    : SC_OUT(Tcontext_t        )   ** out_BYPASS_MEMORY_OOO_ENGINE_ID;
@@ -147,5 +152,5 @@
   public    : SC_OUT(Tgeneral_data_t   )   ** out_BYPASS_MEMORY_DATA      ;
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
   protected : Tstore_queue_entry_t                                        * _store_queue;
   protected : Tload_queue_entry_t                                         * _load_queue;
@@ -160,7 +165,7 @@
   public    : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit::*function_genMealy_retire) (void);
 
-    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-
-    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
     // Registers
@@ -182,5 +187,5 @@
 #endif
 
-    // -----[ methods ]---------------------------------------------------
+    // -----[ methods ]---------------------------------------------------
 
 #ifdef SYSTEMC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h	(revision 78)
@@ -32,4 +32,5 @@
   public : const uint32_t            _nb_port_check                ;
   public : const Tspeculative_load_t _speculative_load             ;
+  public : const uint32_t            _nb_bypass_memory             ;
 //public : const uint32_t            _nb_cache_port                ;
   public : const uint32_t            _nb_context                   ;
@@ -38,5 +39,7 @@
   public : const uint32_t            _nb_packet                    ;
   public : const uint32_t            _size_general_data            ;
+  public : const uint32_t            _size_special_data            ;
   public : const uint32_t            _nb_general_register          ;
+  public : const uint32_t            _nb_special_register          ;
 
   public : const uint32_t            _size_address_store_queue             ;
@@ -48,4 +51,5 @@
   public : const uint32_t            _size_packet_id                       ;
   public : const uint32_t            _size_general_register                ;
+  public : const uint32_t            _size_special_register                ;
   public : const uint32_t            _size_dcache_context_id               ;
   public : const uint32_t            _size_dcache_packet_id                ;
@@ -56,4 +60,5 @@
   public : const bool                _have_port_packet_id                  ;
   public : const bool                _have_port_dcache_context_id          ;
+  public : const bool                _have_port_load_queue_ptr             ;
 
   public : const Tdcache_address_t   _mask_address_lsb                     ;
@@ -66,4 +71,5 @@
 			uint32_t            nb_port_check          ,
 			Tspeculative_load_t speculative_load       ,
+			uint32_t            nb_bypass_memory       ,
 			uint32_t            nb_context             ,
 			uint32_t            nb_front_end           ,
@@ -71,10 +77,12 @@
 			uint32_t            nb_packet              ,
 			uint32_t            size_general_data      ,
-			uint32_t            nb_general_register    );
+			uint32_t            size_special_data      ,
+			uint32_t            nb_general_register    ,
+			uint32_t            nb_special_register    );
 
   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
 
-  public : std::string msg_error (void);
+  public : Parameters_test msg_error (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h	(revision 78)
@@ -33,8 +33,8 @@
   typedef enum 
     {
-      NO_SPECULATIVE_LOAD    , //each load wait all previous store before the data cache access
-      SPECULATIVE_LOAD_ACCESS, //each load wait all previous store before the commiting
-      SPECULATIVE_LOAD_COMMIT, //each load commit the result before the end of dependence's check
-      SPECULATIVE_LOAD_BYPASS  //each load bypass the result before the end of dependence's check
+       NO_SPECULATIVE_LOAD     //each load wait all previous store before the data cache access
+      ,SPECULATIVE_LOAD_ACCESS //each load wait all previous store before the commiting
+      ,SPECULATIVE_LOAD_COMMIT //each load commit the result before the end of dependence's check
+    //,SPECULATIVE_LOAD_BYPASS //each load bypass the result before the end of dependence's check
     } Tspeculative_load_t; 
   
@@ -212,5 +212,5 @@
       case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_ACCESS : return "speculative_load_access"; break;
       case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT : return "speculative_load_commit"; break;
-      case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break;
+//       case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break;
       default    : return ""      ; break;
       }
@@ -228,7 +228,7 @@
          (x.compare("speculative_load_commit") == 0))
       return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT;
-    if ( (x.compare("3")                       == 0) or
-         (x.compare("speculative_load_bypass") == 0))
-      return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS;
+//     if ( (x.compare("3")                       == 0) or
+//          (x.compare("speculative_load_bypass") == 0))
+//       return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS;
     
     throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\""));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp	(revision 78)
@@ -69,5 +69,5 @@
       case NO_SPECULATIVE_LOAD     :
       case SPECULATIVE_LOAD_ACCESS :
-      case SPECULATIVE_LOAD_BYPASS :
+	//case SPECULATIVE_LOAD_BYPASS :
       default                      :
 	{
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp	(revision 78)
@@ -72,15 +72,17 @@
    in_MEMORY_IN_PACKET_ID             = interface->set_signal_in  <Tpacket_t         > ("packet_id"    ,_param->_size_packet_id       );
    in_MEMORY_IN_OPERATION             = interface->set_signal_in  <Toperation_t      > ("operation"   ,_param->_size_operation        );
+   in_MEMORY_IN_TYPE                  = interface->set_signal_in  <Ttype_t           > ("type"        ,_param->_size_type             );
    in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in  <Tlsq_ptr_t        > ("store_queue_ptr_write" ,_param->_size_address_store_queue+1); // +1 cf load_queue usage
+   if (_param->_have_port_load_queue_ptr)
    in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in  <Tlsq_ptr_t        > ("load_queue_ptr_write"  ,_param->_size_address_load_queue );
-// in_MEMORY_IN_HAS_IMMEDIAT          = interface->set_signal_in  <Tcontrol_t        > ("has_immediat",1                              );
+   in_MEMORY_IN_HAS_IMMEDIAT          = interface->set_signal_in  <Tcontrol_t        > ("has_immediat",1                              );
    in_MEMORY_IN_IMMEDIAT              = interface->set_signal_in  <Tgeneral_data_t   > ("immediat"    ,_param->_size_general_data     );
    in_MEMORY_IN_DATA_RA               = interface->set_signal_in  <Tgeneral_data_t   > ("data_ra"     ,_param->_size_general_data     );
    in_MEMORY_IN_DATA_RB               = interface->set_signal_in  <Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data     );
-// in_MEMORY_IN_DATA_RC               = interface->set_signal_in  <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
-//    in_MEMORY_IN_WRITE_RD              = interface->set_signal_in  <Tcontrol_t        > ("write_rd"    ,1                              );
+   in_MEMORY_IN_DATA_RC               = interface->set_signal_in  <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
+   in_MEMORY_IN_WRITE_RD              = interface->set_signal_in  <Tcontrol_t        > ("write_rd"    ,1                              );
    in_MEMORY_IN_NUM_REG_RD            = interface->set_signal_in  <Tgeneral_address_t> ("num_reg_rd"  ,1                              );
-// in_MEMORY_IN_WRITE_RE              = interface->set_signal_in  <Tcontrol_t        > ("write_re"    ,1                              );
-// in_MEMORY_IN_NUM_REG_RE            = interface->set_signal_in  <Tspecial_address_t> ("num_reg_re"  ,1                              );
+   in_MEMORY_IN_WRITE_RE              = interface->set_signal_in  <Tcontrol_t        > ("write_re"    ,1                              );
+   in_MEMORY_IN_NUM_REG_RE            = interface->set_signal_in  <Tspecial_address_t> ("num_reg_re"  ,1                              );
     }
 
@@ -105,11 +107,15 @@
       if (_param->_have_port_packet_id)       
       out_MEMORY_OUT_PACKET_ID     = interface->set_signal_out <Tpacket_t         > ("packet_id"     ,_param->_size_packet_id        );
+//    out_MEMORY_OUT_OPERATION     = interface->set_signal_out <Toperation_t      > ("operation"     ,_param->_size_operation        );
+      out_MEMORY_OUT_TYPE          = interface->set_signal_out <Ttype_t           > ("type"          ,_param->_size_type             );
       out_MEMORY_OUT_WRITE_RD      = interface->set_signal_out <Tcontrol_t        > ("write_rd"      ,1                              );
       out_MEMORY_OUT_NUM_REG_RD    = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd"    ,_param->_size_general_register );
       out_MEMORY_OUT_DATA_RD       = interface->set_signal_out <Tgeneral_data_t   > ("data_rd"       ,_param->_size_general_data     );
-//    out_MEMORY_OUT_WRITE_RE      = interface->set_signal_out <Tcontrol_t        > ("write_rd"      ,1                              );
-//    out_MEMORY_OUT_NUM_REG_RE    = interface->set_signal_out <Tspecial_address_t> ("num_reg_re"    ,_param->_size_general_register );
-//    out_MEMORY_OUT_DATA_RE       = interface->set_signal_out <Tspecial_data_t   > ("data_re"       ,_param->_size_general_data     );
+      out_MEMORY_OUT_WRITE_RE      = interface->set_signal_out <Tcontrol_t        > ("write_re"      ,1                              );
+      out_MEMORY_OUT_NUM_REG_RE    = interface->set_signal_out <Tspecial_address_t> ("num_reg_re"    ,_param->_size_general_register );
+      out_MEMORY_OUT_DATA_RE       = interface->set_signal_out <Tspecial_data_t   > ("data_re"       ,_param->_size_general_data     );
       out_MEMORY_OUT_EXCEPTION     = interface->set_signal_out <Texception_t      > ("exception"     ,_param->_size_exception        );
+      out_MEMORY_OUT_NO_SEQUENCE   = interface->set_signal_out <Tcontrol_t        > ("no_sequence"   ,1                              );
+      out_MEMORY_OUT_ADDRESS       = interface->set_signal_out <Tgeneral_data_t   > ("address"       ,_param->_size_general_data     );
     }
 
@@ -153,13 +159,13 @@
     // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-    if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
+//  if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
       {
-	out_BYPASS_MEMORY_VAL          = new SC_OUT(Tcontrol_t        ) * [_param->_size_load_queue];
+	out_BYPASS_MEMORY_VAL          = new SC_OUT(Tcontrol_t        ) * [_param->_nb_bypass_memory];
 	if (_param->_have_port_ooo_engine_id)    
-	out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t        ) * [_param->_size_load_queue];
-	out_BYPASS_MEMORY_NUM_REG      = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue];
-	out_BYPASS_MEMORY_DATA         = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_load_queue];
+	out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t        ) * [_param->_nb_bypass_memory];
+	out_BYPASS_MEMORY_NUM_REG      = new SC_OUT(Tgeneral_address_t) * [_param->_nb_bypass_memory];
+	out_BYPASS_MEMORY_DATA         = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_bypass_memory];
 	
-	for (uint32_t i=0; i<_param->_size_load_queue; i++)
+	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
 	  {
 	    Interface_fifo * interface = _interfaces->set_interface("memory_out"
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp	(revision 78)
@@ -44,15 +44,17 @@
     delete     in_MEMORY_IN_PACKET_ID   ;
     delete     in_MEMORY_IN_OPERATION   ;
+    delete     in_MEMORY_IN_TYPE        ;
     delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
+    if (_param->_have_port_load_queue_ptr)
     delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-//  delete     in_MEMORY_IN_HAS_IMMEDIAT;
+    delete     in_MEMORY_IN_HAS_IMMEDIAT;
     delete     in_MEMORY_IN_IMMEDIAT    ;
     delete     in_MEMORY_IN_DATA_RA     ;
     delete     in_MEMORY_IN_DATA_RB     ;
-//  delete     in_MEMORY_IN_DATA_RC     ;
-//  delete     in_MEMORY_IN_WRITE_RD    ;
+    delete     in_MEMORY_IN_DATA_RC     ;
+    delete     in_MEMORY_IN_WRITE_RD    ;
     delete     in_MEMORY_IN_NUM_REG_RD  ;
-//  delete     in_MEMORY_IN_WRITE_RE    ;
-//  delete     in_MEMORY_IN_NUM_REG_RE  ;
+    delete     in_MEMORY_IN_WRITE_RE    ;
+    delete     in_MEMORY_IN_NUM_REG_RE  ;
     
     delete    out_MEMORY_OUT_VAL       ;
@@ -66,11 +68,15 @@
     if (_param->_have_port_packet_id)
     delete    out_MEMORY_OUT_PACKET_ID ;
+//  delete    out_MEMORY_OUT_OPERATION ;
+    delete    out_MEMORY_OUT_TYPE      ;
     delete    out_MEMORY_OUT_WRITE_RD  ;
     delete    out_MEMORY_OUT_NUM_REG_RD;
     delete    out_MEMORY_OUT_DATA_RD   ;
-//  delete    out_MEMORY_OUT_WRITE_RE  ;
-//  delete    out_MEMORY_OUT_NUM_REG_RE;
-//  delete    out_MEMORY_OUT_DATA_RE   ;
+    delete    out_MEMORY_OUT_WRITE_RE  ;
+    delete    out_MEMORY_OUT_NUM_REG_RE;
+    delete    out_MEMORY_OUT_DATA_RE   ;
     delete    out_MEMORY_OUT_EXCEPTION ;
+    delete    out_MEMORY_OUT_NO_SEQUENCE;
+    delete    out_MEMORY_OUT_ADDRESS   ;
     
     delete    out_DCACHE_REQ_VAL       ;
@@ -91,12 +97,9 @@
     delete     in_DCACHE_RSP_ERROR     ;
     
-    if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
-      {
-	delete [] out_BYPASS_MEMORY_VAL       ;
-	if (_param->_have_port_ooo_engine_id)    
-	delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID;
-	delete [] out_BYPASS_MEMORY_NUM_REG   ;
-	delete [] out_BYPASS_MEMORY_DATA      ;
-      }
+    delete [] out_BYPASS_MEMORY_VAL       ;
+    if (_param->_have_port_ooo_engine_id)    
+    delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID;
+    delete [] out_BYPASS_MEMORY_NUM_REG   ;
+    delete [] out_BYPASS_MEMORY_DATA      ;
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp	(revision 78)
@@ -120,4 +120,6 @@
     if (_param->_have_port_packet_id)
     PORT_WRITE(out_MEMORY_OUT_PACKET_ID    , memory_out_packet_id    );
+//  PORT_WRITE(out_MEMORY_OUT_OPERATION    , memory_out_operation    );
+    PORT_WRITE(out_MEMORY_OUT_TYPE         , TYPE_MEMORY             );
     PORT_WRITE(out_MEMORY_OUT_WRITE_RD     , memory_out_write_rd     );
     PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD   , memory_out_num_reg_rd   );
@@ -126,6 +128,10 @@
 //  PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   , memory_out_num_reg_re   );
 //  PORT_WRITE(out_MEMORY_OUT_DATA_RE      , memory_out_data_re      );
+    PORT_WRITE(out_MEMORY_OUT_WRITE_RE     , 0);
+    PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   , 0);
+    PORT_WRITE(out_MEMORY_OUT_DATA_RE      , 0);
     PORT_WRITE(out_MEMORY_OUT_EXCEPTION    , memory_out_exception    );
-
+    PORT_WRITE(out_MEMORY_OUT_NO_SEQUENCE  , 0);
+    PORT_WRITE(out_MEMORY_OUT_ADDRESS      , 0);
     // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 78)
@@ -265,4 +265,8 @@
 	    //  others in speculation_access_queue
 
+#ifdef DEBUG_TEST
+	    if (PORT_READ(in_MEMORY_IN_TYPE) != TYPE_MEMORY)
+	      throw ERRORMORPHEO(FUNCTION,"The type is different at 'TYPE_MEMORY'");
+#endif
 	    Toperation_t    operation            = PORT_READ(in_MEMORY_IN_OPERATION);
 	    Tgeneral_data_t address              = (PORT_READ(in_MEMORY_IN_IMMEDIAT) +
@@ -376,5 +380,5 @@
 		    _store_queue [index]._packet_id            = (not _param->_have_port_packet_id    )?0:PORT_READ(in_MEMORY_IN_PACKET_ID   );
 		    _store_queue [index]._operation            = operation;
-		    _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
+		    _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
 		    _store_queue [index]._address              = address;
 
@@ -415,5 +419,5 @@
 
 		_speculative_access_queue [index]._operation            = operation;
-		_speculative_access_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
+		_speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
 		_speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE);
 		_speculative_access_queue [index]._address              = address;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp	(revision 78)
@@ -25,4 +25,5 @@
 			  uint32_t            nb_port_check          ,
 			  Tspeculative_load_t speculative_load       ,
+			  uint32_t            nb_bypass_memory       ,
 			  uint32_t            nb_context             ,
 			  uint32_t            nb_front_end           ,
@@ -30,5 +31,7 @@
 			  uint32_t            nb_packet              ,
 			  uint32_t            size_general_data      ,
-			  uint32_t            nb_general_register    ):
+			  uint32_t            size_special_data      ,
+			  uint32_t            nb_general_register    ,
+			  uint32_t            nb_special_register    ):
     _size_store_queue        (size_store_queue       ),
     _size_load_queue         (size_load_queue        ),
@@ -36,4 +39,5 @@
     _nb_port_check           (nb_port_check          ),
     _speculative_load        (speculative_load       ),
+    _nb_bypass_memory        (nb_bypass_memory       ),
     _nb_context              (nb_context             ),
     _nb_front_end            (nb_front_end           ),
@@ -41,5 +45,7 @@
     _nb_packet               (nb_packet              ),
     _size_general_data       (size_general_data      ),
+    _size_special_data       (size_special_data      ),
     _nb_general_register     (nb_general_register    ),
+    _nb_special_register     (nb_special_register    ),
     
     _size_address_store_queue              (log2(size_store_queue             )),
@@ -52,4 +58,5 @@
     _size_packet_id          (log2(nb_packet          )),
     _size_general_register   (log2(nb_general_register)),
+    _size_special_register   (log2(nb_special_register)),
     _size_dcache_context_id  (_size_context_id + _size_front_end_id + _size_ooo_engine_id),
     _size_dcache_packet_id   ((log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue))+1),
@@ -60,4 +67,5 @@
     _have_port_packet_id         (_size_packet_id    >0),
     _have_port_dcache_context_id (_size_dcache_context_id>0),
+    _have_port_load_queue_ptr    (_size_load_queue>1),
 
     _mask_address_lsb            (gen_mask<Tdcache_address_t>(log2(size_general_data/8))),
@@ -77,4 +85,5 @@
     _nb_port_check           (param._nb_port_check          ),
     _speculative_load        (param._speculative_load       ),
+    _nb_bypass_memory        (param._nb_bypass_memory       ),
     _nb_context              (param._nb_context             ),
     _nb_front_end            (param._nb_front_end           ),
@@ -82,5 +91,7 @@
     _nb_packet               (param._nb_packet              ),
     _size_general_data       (param._size_general_data      ),
+    _size_special_data       (param._size_special_data      ),
     _nb_general_register     (param._nb_general_register    ),
+    _nb_special_register     (param._nb_special_register    ),
 
     _size_address_store_queue              (param._size_address_store_queue             ),
@@ -93,4 +104,5 @@
     _size_packet_id          (param._size_packet_id         ),
     _size_general_register   (param._size_general_register  ),
+    _size_special_register   (param._size_special_register  ),
     _size_dcache_context_id  (param._size_dcache_context_id ),
     _size_dcache_packet_id   (param._size_dcache_packet_id  ),
@@ -100,6 +112,6 @@
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     _have_port_packet_id     (param._have_port_packet_id    ),
-
     _have_port_dcache_context_id(param._have_port_dcache_context_id),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr),
 
     _mask_address_lsb        (param._mask_address_lsb),
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,9 +21,9 @@
 #undef  FUNCTION
 #define FUNCTION "Load_store_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Load_store_unit,FUNCTION,"Begin");
     
-    std::string msg = "";
+    Parameters_test test("Load_store_unit");
 
     switch (_speculative_load)
@@ -31,19 +31,32 @@
       case SPECULATIVE_LOAD_COMMIT :
 	{
+	  if (not (_nb_bypass_memory == 0))
+	    test.error("Bypass memory is not supported. Please wait a next revision.");
+ 
 	  break;
 	}
       case NO_SPECULATIVE_LOAD     :
       case SPECULATIVE_LOAD_ACCESS :
-      case SPECULATIVE_LOAD_BYPASS :
+      // case SPECULATIVE_LOAD_BYPASS :
       default                      :
 	{
-	  msg += "  - Speculative load scheme is not supported : " +toString(_speculative_load);
+	  if (not (_nb_bypass_memory == 0))
+	    test.error("In the load scheme '"+toString(_speculative_load)+"', they have none bypass.");
+
+	  test.error("Speculative load scheme '"+toString(_speculative_load)+"' is not supported. Please wait a next revision.");
 	  break;
 	}
       }
 
-    return msg;
+    if (not (_size_store_queue >= 2))
+      test.error("Store queue must have at less two slot.");
+
+    if (not (_nb_bypass_memory <= _size_load_queue))
+      test.error("Bypass number must be less than load_queue's size.");
 
     log_printf(FUNC,Load_store_unit,FUNCTION,"End");
+
+    return test;
+
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp	(revision 78)
@@ -33,4 +33,5 @@
     xml.singleton_begin("nb_port_check                "); xml.attribut("value",toString(_nb_port_check                )); xml.singleton_end();
     xml.singleton_begin("speculative_load             "); xml.attribut("value",toString(_speculative_load             )); xml.singleton_end();
+    xml.singleton_begin("nb_bypass_memory             "); xml.attribut("value",toString(_nb_bypass_memory             )); xml.singleton_end();
     xml.singleton_begin("nb_context                   "); xml.attribut("value",toString(_nb_context                   )); xml.singleton_end();
     xml.singleton_begin("nb_front_end                 "); xml.attribut("value",toString(_nb_front_end                 )); xml.singleton_end();
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg	(revision 78)
@@ -12,3 +12,3 @@
 2	2	*2	# nb_spr_write
 4	4	*2	# size_store_queue
-4	4	*2	# size_load_queue    
+1	4	*4	# size_load_queue    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp	(revision 78)
@@ -231,4 +231,5 @@
   (*(_Read_queue-> in_READ_QUEUE_IN_TYPE           )) (*(READ_QUEUE_IN_TYPE           ));
   (*(_Read_queue-> in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE)) (*(READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Read_queue-> in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE )) (*(READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ));
   (*(_Read_queue-> in_READ_QUEUE_IN_HAS_IMMEDIAT   )) (*(READ_QUEUE_IN_HAS_IMMEDIAT   ));
@@ -258,4 +259,5 @@
   (*(_Read_queue->out_READ_QUEUE_OUT_TYPE          )) (*(READ_QUEUE_OUT_TYPE          )); 
   (*(_Read_queue->out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE)) (*(READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE)); 
+  if (_param->_have_port_load_queue_ptr)
   (*(_Read_queue->out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE )) (*(READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE )); 
   (*(_Read_queue->out_READ_QUEUE_OUT_HAS_IMMEDIAT  )) (*(READ_QUEUE_OUT_HAS_IMMEDIAT  )); 
@@ -417,4 +419,5 @@
 	      READ_QUEUE_IN_TYPE        ->write(0);
 	      READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE->write(0);
+	      if (_param->_have_port_load_queue_ptr)
 	      READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ->write(0);
 	      READ_QUEUE_IN_HAS_IMMEDIAT->write(0);
@@ -592,4 +595,5 @@
    delete    READ_QUEUE_IN_TYPE         ;
    delete    READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE;
+   if (_param->_have_port_load_queue_ptr)
    delete    READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ;
    delete    READ_QUEUE_IN_HAS_IMMEDIAT ;
@@ -619,4 +623,5 @@
    delete    READ_QUEUE_OUT_TYPE        ;
    delete    READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE;
+   if (_param->_have_port_load_queue_ptr)
    delete    READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE ;
    delete    READ_QUEUE_OUT_HAS_IMMEDIAT;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h	(revision 78)
@@ -55,4 +55,5 @@
   public : const bool        _have_port_ooo_engine_id;
   public : const bool        _have_port_rob_id       ;
+  public : const bool        _have_port_load_queue_ptr;
 
   public : const uint32_t    _size_internal_queue;
@@ -76,5 +77,5 @@
   public : ~Parameters () ;
 
-  public : std::string          msg_error (void);
+  public : Parameters_test      msg_error (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp	(revision 78)
@@ -58,4 +58,5 @@
     _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
     _have_port_rob_id        (_size_rob_id        > 0),
+    _have_port_load_queue_ptr(_size_load_queue    > 1),
 
     _size_internal_queue     (  _size_context_id       //_context_id   
@@ -116,4 +117,5 @@
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     _have_port_rob_id        (param._have_port_rob_id       ),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr),
 
     _size_internal_queue     (param._size_internal_queue    )
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp	(revision 78)
@@ -19,29 +19,19 @@
 
 
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Read_queue,"msg_error","Begin");
 
-    std::string msg = "";
-
-//     if (_size_queue < 2)
-//       {
-//         msg += "  - The read_queue must be have less a depth of 2";
-//         msg += "    * size_queue                      : " + toString(_size_queue)    + "\n";
-//       }
+    Parameters_test test ("Read_queue");
 
     if (_nb_type < 2)
-      {
-        msg += "  - The number of type must be > 1";
-      }
+      test.error("The number of type must be > 1");
+
     if (_nb_operation < 2)
-      {
-        msg += "  - The number of operation must be > 1";
-      }
-    
-
-    return msg;
+      test.error("The number of operation must be > 1");
 
     log_printf(FUNC,Read_queue,"msg_error","End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp	(revision 78)
@@ -71,4 +71,5 @@
        in_READ_QUEUE_IN_TYPE           = interface->set_signal_in  <Ttype_t           > ("type"        ,_param->_size_type             );
        in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in  <Tlsq_ptr_t> ("store_queue_ptr_write", log2(_param->_size_store_queue));
+       if (_param->_have_port_load_queue_ptr)
        in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in  <Tlsq_ptr_t> ("load_queue_ptr_write" , log2(_param->_size_load_queue ));
        in_READ_QUEUE_IN_HAS_IMMEDIAT   = interface->set_signal_in  <Tcontrol_t        > ("has_immediat",1                             );
@@ -110,4 +111,5 @@
       out_READ_QUEUE_OUT_TYPE           = interface->set_signal_out <Ttype_t           > ("type"        ,_param->_size_type             );
       out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE = interface->set_signal_out <Tlsq_ptr_t> ("store_queue_ptr_write", log2(_param->_size_store_queue));
+      if (_param->_have_port_load_queue_ptr)
       out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_out <Tlsq_ptr_t> ("load_queue_ptr_write" , log2(_param->_size_load_queue ));
       out_READ_QUEUE_OUT_HAS_IMMEDIAT   = interface->set_signal_out <Tcontrol_t        > ("has_immediat",1                             );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp	(revision 78)
@@ -42,4 +42,5 @@
     delete     in_READ_QUEUE_IN_TYPE           ;
     delete     in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE;
+    if (_param->_have_port_load_queue_ptr)
     delete     in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ;
     delete     in_READ_QUEUE_IN_HAS_IMMEDIAT   ;
@@ -71,4 +72,5 @@
     delete    out_READ_QUEUE_OUT_TYPE           ;
     delete    out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE;
+    if (_param->_have_port_load_queue_ptr)
     delete    out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE ;
     delete    out_READ_QUEUE_OUT_HAS_IMMEDIAT   ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp	(revision 78)
@@ -44,4 +44,5 @@
     PORT_WRITE (out_READ_QUEUE_OUT_TYPE        , _queue_head->_type        );
     PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE, _queue_head->_store_queue_ptr_write);
+    if (_param->_have_port_load_queue_ptr)
     PORT_WRITE (out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE , _queue_head->_load_queue_ptr_write );
     PORT_WRITE (out_READ_QUEUE_OUT_HAS_IMMEDIAT, _queue_head->_has_immediat);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp	(revision 78)
@@ -67,4 +67,5 @@
 	    entry->_type         = PORT_READ(in_READ_QUEUE_IN_TYPE        );
 	    entry->_store_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE);
+	    if (_param->_have_port_load_queue_ptr)
 	    entry->_load_queue_ptr_write  = PORT_READ(in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE );
 	    entry->_has_immediat = PORT_READ(in_READ_QUEUE_IN_HAS_IMMEDIAT);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg	(revision 78)
@@ -15,3 +15,3 @@
 0	0	*2	# nb_bypass_memory
 4	4	*2	# size_store_queue
-4	4	*2	# size_load_queue 
+1	4	*4	# size_load_queue 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp	(revision 78)
@@ -216,4 +216,5 @@
   (*(_Reservation_station-> in_INSERT_TYPE             )) (*( in_INSERT_TYPE             ));
   (*(_Reservation_station-> in_INSERT_STORE_QUEUE_PTR_WRITE)) (*( in_INSERT_STORE_QUEUE_PTR_WRITE));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Reservation_station-> in_INSERT_LOAD_QUEUE_PTR_WRITE )) (*( in_INSERT_LOAD_QUEUE_PTR_WRITE ));
   (*(_Reservation_station-> in_INSERT_HAS_IMMEDIAT     )) (*( in_INSERT_HAS_IMMEDIAT     ));
@@ -251,4 +252,5 @@
   (*(_Reservation_station->out_RETIRE_TYPE           [i])) (*(out_RETIRE_TYPE           [i]));
   (*(_Reservation_station->out_RETIRE_STORE_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_STORE_QUEUE_PTR_WRITE [i]));
+  if (_param->_have_port_load_queue_ptr)
   (*(_Reservation_station->out_RETIRE_LOAD_QUEUE_PTR_WRITE  [i])) (*(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [i]));
   (*(_Reservation_station->out_RETIRE_HAS_IMMEDIAT   [i])) (*(out_RETIRE_HAS_IMMEDIAT   [i]));
@@ -446,4 +448,5 @@
    	      in_INSERT_TYPE        ->write(0);
    	      in_INSERT_STORE_QUEUE_PTR_WRITE->write(0);
+	      if (_param->_have_port_load_queue_ptr)
    	      in_INSERT_LOAD_QUEUE_PTR_WRITE ->write(0);
    	      in_INSERT_HAS_IMMEDIAT->write(0);
@@ -692,4 +695,5 @@
   delete     in_INSERT_TYPE        ;
   delete     in_INSERT_STORE_QUEUE_PTR_WRITE;
+  if (_param->_have_port_load_queue_ptr)
   delete     in_INSERT_LOAD_QUEUE_PTR_WRITE ;
   delete     in_INSERT_HAS_IMMEDIAT;
@@ -725,4 +729,5 @@
   delete [] out_RETIRE_TYPE        ;
   delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE;
+  if (_param->_have_port_load_queue_ptr)
   delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ;
   delete [] out_RETIRE_HAS_IMMEDIAT;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h	(revision 78)
@@ -62,4 +62,5 @@
   public : const bool        _have_port_ooo_engine_id;
   public : const bool        _have_port_rob_id       ;
+  public : const bool        _have_port_load_queue_ptr;
 
     //-----[ methods ]-----------------------------------------------------------
@@ -84,5 +85,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp	(revision 78)
@@ -63,5 +63,6 @@
     _have_port_front_end_id  (_size_front_end_id  > 0),
     _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
-    _have_port_rob_id        (_size_rob_id        > 0)
+    _have_port_rob_id        (_size_rob_id        > 0),
+    _have_port_load_queue_ptr(_size_load_queue    > 1)
   {
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
@@ -100,5 +101,6 @@
     _have_port_front_end_id  (param._have_port_front_end_id ),
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
-    _have_port_rob_id        (param._have_port_rob_id       )
+    _have_port_rob_id        (param._have_port_rob_id       ),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr)
   {
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,24 +21,16 @@
 #undef  FUNCTION
 #define FUNCTION "Reservation_station::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
 
-    std::string msg = "";
-
-//     if (_size_queue < 2)
-//       {
-//         msg += "  - The reservation_station must be have less a depth of 2";
-//         msg += "    * size_queue                      : " + toString(_size_queue)    + "\n";
-//       }
+    Parameters_test test ("Reservation_station");
 
     if (_size_queue < _nb_inst_retire)
-      {
-        msg += "  - The reservation_station can't have more retire port than entry in the queue.";
-      }
-    
-    return msg;
+      test.error("The reservation_station can't have more retire port than entry in the queue.");
 
     log_printf(FUNC,Reservation_station,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp	(revision 78)
@@ -73,4 +73,5 @@
        in_INSERT_TYPE           = interface->set_signal_in <Ttype_t           > ("type"           ,_param->_size_type             );
        in_INSERT_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write" ,log2(_param->_size_store_queue));
+       if (_param->_have_port_load_queue_ptr)
        in_INSERT_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write"  ,log2(_param->_size_load_queue) );
        in_INSERT_HAS_IMMEDIAT   = interface->set_signal_in <Tcontrol_t        > ("has_immediat"   ,1                             );
@@ -108,4 +109,5 @@
     out_RETIRE_TYPE           = new SC_OUT(Ttype_t           ) * [_param->_nb_inst_retire];
     out_RETIRE_STORE_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire];
+    if (_param->_have_port_load_queue_ptr)
     out_RETIRE_LOAD_QUEUE_PTR_WRITE  = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire];
     out_RETIRE_HAS_IMMEDIAT   = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
@@ -141,4 +143,5 @@
 	out_RETIRE_TYPE         [i] = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type);
 	out_RETIRE_STORE_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("store_queue_ptr_write" ,log2(_param->_size_store_queue));
+	if (_param->_have_port_load_queue_ptr)
 	out_RETIRE_LOAD_QUEUE_PTR_WRITE  [i] = interface->set_signal_out<Tlsq_ptr_t> ("load_queue_ptr_write"  ,log2(_param->_size_load_queue) );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp	(revision 78)
@@ -44,4 +44,5 @@
     delete     in_INSERT_TYPE          ;
     delete     in_INSERT_STORE_QUEUE_PTR_WRITE;
+    if (_param->_have_port_load_queue_ptr)
     delete     in_INSERT_LOAD_QUEUE_PTR_WRITE ;
     delete     in_INSERT_HAS_IMMEDIAT  ;
@@ -77,4 +78,5 @@
     delete [] out_RETIRE_TYPE          ;
     delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE;
+    if (_param->_have_port_load_queue_ptr)
     delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ;
     delete [] out_RETIRE_HAS_IMMEDIAT  ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp	(revision 78)
@@ -102,4 +102,5 @@
 	    PORT_WRITE(out_RETIRE_TYPE          [i],_queue[index_find]._type);
 	    PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [i],_queue[index_find]._store_queue_ptr_write);
+	    if (_param->_have_port_load_queue_ptr)
 	    PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [i],_queue[index_find]._load_queue_ptr_write );
 	    PORT_WRITE(out_RETIRE_HAS_IMMEDIAT  [i],_queue[index_find]._has_immediat);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp	(revision 78)
@@ -259,4 +259,5 @@
   	    _queue[index]._type            = PORT_READ(in_INSERT_TYPE           );
   	    _queue[index]._store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE);
+	    if (_param->_have_port_load_queue_ptr)
   	    _queue[index]._load_queue_ptr_write  = PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE );
   	    _queue[index]._has_immediat    = PORT_READ(in_INSERT_HAS_IMMEDIAT   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg	(revision 78)
@@ -13,5 +13,5 @@
 2	2	*2	# nb_spr_write            
 4	4	*2	# size_store_queue        
-4	4	*2	# size_load_queue         
+1	4	*4	# size_load_queue         
 2	2	*2	# nb_inst_retire          
 2	2	*2	# nb_bypass_write         
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp	(revision 78)
@@ -161,4 +161,5 @@
   INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_TYPE                  );
   INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE );
+  if (_param->_have_port_load_queue_ptr)
   INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE  );
   INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_HAS_IMMEDIAT          );
@@ -187,4 +188,5 @@
   INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_TYPE                 ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire);
+  if (_param->_have_port_load_queue_ptr)
   INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_HAS_IMMEDIAT         ,_param->_nb_inst_retire);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h	(revision 78)
@@ -57,4 +57,5 @@
   public : const bool        _have_port_ooo_engine_id ;
   public : const bool        _have_port_packet_id     ;
+  public : const bool        _have_port_load_queue_ptr;
 
   public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue         ::Parameters * _param_read_queue;
@@ -82,5 +83,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp	(revision 78)
@@ -66,5 +66,6 @@
     _have_port_front_end_id   (_size_front_end_id >0),
     _have_port_ooo_engine_id  (_size_ooo_engine_id>0),
-    _have_port_packet_id      (_size_packet_id    >0)
+    _have_port_packet_id      (_size_packet_id    >0),
+    _have_port_load_queue_ptr (_size_load_queue   >1)
   {
     log_printf(FUNC,Read_unit,FUNCTION,"Begin");
@@ -144,5 +145,6 @@
     _have_port_front_end_id   (param._have_port_front_end_id  ),
     _have_port_ooo_engine_id  (param._have_port_ooo_engine_id ),
-    _have_port_packet_id      (param._have_port_packet_id     )
+    _have_port_packet_id      (param._have_port_packet_id     ),
+    _have_port_load_queue_ptr (param._have_port_load_queue_ptr)
   {
     log_printf(FUNC,Read_unit,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,13 +21,13 @@
 #undef  FUNCTION
 #define FUNCTION "Read_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Read_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
-
-    return msg;
+    Parameters_test test ("Read_unit");
 
     log_printf(FUNC,Read_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp	(revision 78)
@@ -59,6 +59,6 @@
        ALLOC_INTERFACE("read_unit_in", IN, WEST, "Enter of new operation");
 
-       ALLOC_VAL_IN    ( in_READ_UNIT_IN_VAL);
-       ALLOC_ACK_OUT   (out_READ_UNIT_IN_ACK);
+       ALLOC_VALACK_IN    ( in_READ_UNIT_IN_VAL,VAL);
+       ALLOC_VALACK_OUT   (out_READ_UNIT_IN_ACK,ACK);
        ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id   );
        ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id );
@@ -67,6 +67,6 @@
        ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation    );
        ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type         );
-       ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue  );
-       ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue   );
+       ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,log2(_param->_size_store_queue));
+       ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,log2(_param->_size_load_queue));
        ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1);
        ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data);
@@ -87,6 +87,6 @@
        ALLOC1_INTERFACE("read_unit_out", OUT, EAST, "Output of operation. All operand is valid.", _param->_nb_inst_retire);
 
-       ALLOC1_VAL_OUT   (out_READ_UNIT_OUT_VAL);
-       ALLOC1_ACK_IN    ( in_READ_UNIT_OUT_ACK);
+       ALLOC1_VALACK_OUT   (out_READ_UNIT_OUT_VAL,VAL);
+       ALLOC1_VALACK_IN    ( in_READ_UNIT_OUT_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id      );
        ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id    );
@@ -95,6 +95,6 @@
        ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation       );
        ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type            );
-       ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue     );
-       ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue      );
+       ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,log2(_param->_size_store_queue));
+       ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,log2(_param->_size_load_queue ));
        ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data    );
@@ -112,6 +112,6 @@
        ALLOC1_INTERFACE("gpr_read", OUT, SOUTH, "Read port.", _param->_nb_gpr_read);
 
-       ALLOC1_VAL_OUT   (out_GPR_READ_VAL);
-       ALLOC1_ACK_IN    ( in_GPR_READ_ACK);
+       ALLOC1_VALACK_OUT   (out_GPR_READ_VAL,VAL);
+       ALLOC1_VALACK_IN    ( in_GPR_READ_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_GPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_OUT(out_GPR_READ_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_data    );
@@ -124,6 +124,6 @@
        ALLOC1_INTERFACE("spr_read", OUT, SOUTH, "Read port.", _param->_nb_spr_read);
 
-       ALLOC1_VAL_OUT   (out_SPR_READ_VAL);
-       ALLOC1_ACK_IN    ( in_SPR_READ_ACK);
+       ALLOC1_VALACK_OUT   (out_SPR_READ_VAL,VAL);
+       ALLOC1_VALACK_IN    ( in_SPR_READ_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_SPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG      ,"num_reg"      ,Tspecial_address_t,_param->_size_special_data    );
@@ -136,5 +136,5 @@
        ALLOC1_INTERFACE("gpr_write", IN , SOUTH, "Write port.", _param->_nb_gpr_write);
 
-       ALLOC1_VAL_IN    ( in_GPR_WRITE_VAL);
+       ALLOC1_VALACK_IN    ( in_GPR_WRITE_VAL,VAL);
        ALLOC1_SIGNAL_IN ( in_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_IN ( in_GPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_data    );
@@ -146,5 +146,5 @@
        ALLOC1_INTERFACE("spr_write", IN , SOUTH, "Write port.", _param->_nb_spr_write);
 
-       ALLOC1_VAL_IN    ( in_SPR_WRITE_VAL);
+       ALLOC1_VALACK_IN    ( in_SPR_WRITE_VAL,VAL);
        ALLOC1_SIGNAL_IN ( in_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tspecial_address_t,_param->_size_special_data    );
@@ -216,5 +216,4 @@
        name = _name+"_read_queue";
        std::cout << "Instance : " << name << std::endl;
-	
        {
 #ifdef POSITION
@@ -248,4 +247,5 @@
 	 _component->port_map(name, "in_READ_QUEUE_IN_TYPE"                 ,dest, "in_READ_UNIT_IN_TYPE"                 );
 	 _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE",dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE");
+	 if (_param->_have_port_load_queue_ptr)
 	 _component->port_map(name, "in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE" ,dest, "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" );
 	 _component->port_map(name, "in_READ_QUEUE_IN_HAS_IMMEDIAT"         ,dest, "in_READ_UNIT_IN_HAS_IMMEDIAT"         );
@@ -284,4 +284,5 @@
 	 _component->port_map(name,"out_READ_QUEUE_OUT_TYPE"                 ,dest, "in_INSERT_TYPE"                 );
 	 _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE",dest, "in_INSERT_STORE_QUEUE_PTR_WRITE");
+	 if (_param->_have_port_load_queue_ptr)
 	 _component->port_map(name,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" ,dest, "in_INSERT_LOAD_QUEUE_PTR_WRITE" );
 	 _component->port_map(name,"out_READ_QUEUE_OUT_HAS_IMMEDIAT"         ,dest, "in_INSERT_HAS_IMMEDIAT"         );
@@ -375,5 +376,4 @@
        name = _name+"_reservation_station";
        std::cout << "Instance : " << name << std::endl;
-	
        {
 #ifdef POSITION
@@ -408,4 +408,5 @@
 	 _component->port_map(name, "in_INSERT_TYPE"                 ,dest,"out_READ_QUEUE_OUT_TYPE"                 );
 	 _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_WRITE",dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE");
+	 if (_param->_have_port_load_queue_ptr)
 	 _component->port_map(name, "in_INSERT_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" );
 	 _component->port_map(name, "in_INSERT_HAS_IMMEDIAT"         ,dest,"out_READ_QUEUE_OUT_HAS_IMMEDIAT"         );
@@ -452,4 +453,5 @@
 	   _component->port_map(name,"out_RETIRE_"+toString(i)+"_TYPE"                 ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_TYPE"                 );
 	   _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+	   if (_param->_have_port_load_queue_ptr)
 	   _component->port_map(name,"out_RETIRE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
 	   _component->port_map(name,"out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT"         ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_HAS_IMMEDIAT"         );
@@ -528,4 +530,5 @@
 	 }       
      }
+     
 
 #ifdef POSITION
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp	(revision 78)
@@ -42,4 +42,5 @@
 	delete     in_READ_UNIT_IN_TYPE                 ;
 	delete     in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
 	delete     in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ;
 	delete     in_READ_UNIT_IN_HAS_IMMEDIAT         ;
@@ -70,4 +71,5 @@
 	delete [] out_READ_UNIT_OUT_TYPE                 ;
 	delete [] out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
 	delete [] out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ;
 	delete [] out_READ_UNIT_OUT_HAS_IMMEDIAT         ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h	(revision 78)
@@ -55,5 +55,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp	(revision 78)
@@ -54,6 +54,6 @@
        ALLOC_INTERFACE ("execute_queue_in", IN, WEST, "Input of execute_queue");
        
-       ALLOC_VAL_IN    ( in_EXECUTE_QUEUE_IN_VAL);
-       ALLOC_ACK_OUT   (out_EXECUTE_QUEUE_IN_ACK);
+       ALLOC_VALACK_IN ( in_EXECUTE_QUEUE_IN_VAL,VAL);
+       ALLOC_VALACK_OUT(out_EXECUTE_QUEUE_IN_ACK,ACK);
        if(_param->_have_port_context_id)
        ALLOC_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id       );
@@ -76,6 +76,6 @@
        ALLOC_INTERFACE ("execute_queue_out", OUT, EAST, "Output of execute_queue");
        
-       ALLOC_VAL_OUT   (out_EXECUTE_QUEUE_OUT_VAL);
-       ALLOC_ACK_IN    ( in_EXECUTE_QUEUE_OUT_ACK);
+       ALLOC_VALACK_OUT(out_EXECUTE_QUEUE_OUT_VAL,VAL);
+       ALLOC_VALACK_IN ( in_EXECUTE_QUEUE_OUT_ACK,ACK);
        if(_param->_have_port_context_id)
        ALLOC_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp	(revision 78)
@@ -22,13 +22,13 @@
 #undef  FUNCTION
 #define FUNCTION "Execute_queue::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
 
-    std::string msg = "";
-
-    return msg;
+    Parameters_test test ("Execute_queue");
 
     log_printf(FUNC,Execute_queue,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h	(revision 78)
@@ -66,5 +66,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp	(revision 78)
@@ -22,16 +22,16 @@
 #undef  FUNCTION
 #define FUNCTION "Write_queue::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Write_queue,FUNCTION,"Begin");
 
-    std::string msg = "";
+    Parameters_test test ("Write_queue");
 
     if (_nb_bypass_write > _size_queue)
-      msg += " * The write_queue can't have more bypass_write than entry in the queue.";
-
-    return msg;
+      test.error("The write_queue can't have more bypass_write than entry in the queue.");
 
     log_printf(FUNC,Write_queue,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp	(revision 78)
@@ -53,6 +53,6 @@
        ALLOC_INTERFACE ("write_queue_in", IN, WEST, "Input of write_queue");
        
-       ALLOC_VAL_IN    ( in_WRITE_QUEUE_IN_VAL);
-       ALLOC_ACK_OUT   (out_WRITE_QUEUE_IN_ACK);
+       ALLOC_VALACK_IN ( in_WRITE_QUEUE_IN_VAL,VAL);
+       ALLOC_VALACK_OUT(out_WRITE_QUEUE_IN_ACK,ACK);
        ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id       );
        ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id     );
@@ -76,6 +76,6 @@
        ALLOC_INTERFACE ("write_queue_out", OUT, EAST, "Output of write_queue");
        
-       ALLOC_VAL_OUT   (out_WRITE_QUEUE_OUT_VAL);
-       ALLOC_ACK_IN    ( in_WRITE_QUEUE_OUT_ACK);
+       ALLOC_VALACK_OUT(out_WRITE_QUEUE_OUT_VAL,VAL);
+       ALLOC_VALACK_IN ( in_WRITE_QUEUE_OUT_ACK,ACK);
        ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id   );
        ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t     ,_param->_size_front_end_id );
@@ -94,6 +94,6 @@
        ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_gpr_write);
 
-       ALLOC1_VAL_OUT   (out_GPR_WRITE_VAL);
-       ALLOC1_ACK_IN    ( in_GPR_WRITE_ACK);
+       ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register);
@@ -105,6 +105,6 @@
        ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_spr_write);
 
-       ALLOC1_VAL_OUT   (out_SPR_WRITE_VAL);
-       ALLOC1_ACK_IN    ( in_SPR_WRITE_ACK);
+       ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tspecial_address_t,_param->_size_special_register);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h	(revision 78)
@@ -74,5 +74,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -20,16 +20,16 @@
 #undef  FUNCTION
 #define FUNCTION "Write_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Write_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
+    Parameters_test test ("Write_unit");
 
     if (_size_write_queue == 0)
-      msg += " * Write queue must have a less one entry.";
-
-    return msg;
+      test.error("Write queue must have a less one entry.");
 
     log_printf(FUNC,Write_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp	(revision 78)
@@ -59,6 +59,6 @@
        ALLOC_INTERFACE ("write_unit_in", IN, WEST, "Input of write_unit");
        
-       ALLOC_VAL_IN    ( in_WRITE_UNIT_IN_VAL);
-       ALLOC_ACK_OUT   (out_WRITE_UNIT_IN_ACK);
+       ALLOC_VALACK_IN ( in_WRITE_UNIT_IN_VAL,VAL);
+       ALLOC_VALACK_OUT(out_WRITE_UNIT_IN_ACK,ACK);
        ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id       );
        ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id     );
@@ -82,6 +82,6 @@
        ALLOC_INTERFACE ("write_unit_out", OUT, EAST, "Output of write_unit");
        
-       ALLOC_VAL_OUT   (out_WRITE_UNIT_OUT_VAL);
-       ALLOC_ACK_IN    ( in_WRITE_UNIT_OUT_ACK);
+       ALLOC_VALACK_OUT(out_WRITE_UNIT_OUT_VAL,VAL);
+       ALLOC_VALACK_IN ( in_WRITE_UNIT_OUT_ACK,ACK);
        ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id   );
        ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t     ,_param->_size_front_end_id );
@@ -100,6 +100,6 @@
        ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_gpr_write);
 
-       ALLOC1_VAL_OUT   (out_GPR_WRITE_VAL);
-       ALLOC1_ACK_IN    ( in_GPR_WRITE_ACK);
+       ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register);
@@ -111,6 +111,6 @@
        ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_spr_write);
 
-       ALLOC1_VAL_OUT   (out_SPR_WRITE_VAL);
-       ALLOC1_ACK_IN    ( in_SPR_WRITE_ACK);
+       ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
        ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tspecial_address_t,_param->_size_special_register);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp	(revision 78)
@@ -52,5 +52,5 @@
   public : Tpacket_t          _packet_id      ;
 //public : Toperation_t       _operation      ;
-//public : Ttype_t            _type           ;
+  public : Ttype_t            _type           ;
   public : Tcontrol_t         _write_rd       ;
   public : Tgeneral_address_t _num_reg_rd     ;
@@ -68,5 +68,5 @@
   		  Tpacket_t          packet_id      ,
 //		  Toperation_t       operation      ,
-//		  Ttype_t            type           ,
+		  Ttype_t            type           ,
   		  Tcontrol_t         write_rd       ,
   		  Tgeneral_address_t num_reg_rd     ,
@@ -84,5 +84,5 @@
     _packet_id      = packet_id    ;
 //  _operation      = operation    ;
-//  _type           = type         ;
+    _type           = type         ;
     _write_rd       = write_rd     ;
     _num_reg_rd     = num_reg_rd   ;
@@ -128,5 +128,5 @@
   ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_PACKET_ID    ," in_EXECUTE_UNIT_OUT_PACKET_ID    ",Tpacket_t         ,_param->_nb_execute_unit);
 //ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION    ," in_EXECUTE_UNIT_OUT_OPERATION    ",Toperation_t      ,_param->_nb_execute_unit);
-//ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE         ," in_EXECUTE_UNIT_OUT_TYPE         ",Ttype_t           ,_param->_nb_execute_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE         ," in_EXECUTE_UNIT_OUT_TYPE         ",Ttype_t           ,_param->_nb_execute_unit);
   ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD     ," in_EXECUTE_UNIT_OUT_WRITE_RD     ",Tcontrol_t        ,_param->_nb_execute_unit);
   ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD   ," in_EXECUTE_UNIT_OUT_NUM_REG_RD   ",Tgeneral_address_t,_param->_nb_execute_unit);
@@ -145,5 +145,5 @@
   ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_PACKET_ID       ,"out_WRITE_UNIT_IN_PACKET_ID       ",Tpacket_t         ,_param->_nb_write_unit  );
 //ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_OPERATION       ,"out_WRITE_UNIT_IN_OPERATION       ",Toperation_t      ,_param->_nb_write_unit  );
-//ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE            ,"out_WRITE_UNIT_IN_TYPE            ",Ttype_t           ,_param->_nb_write_unit  );
+  ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE            ,"out_WRITE_UNIT_IN_TYPE            ",Ttype_t           ,_param->_nb_write_unit  );
   ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD        ,"out_WRITE_UNIT_IN_WRITE_RD        ",Tcontrol_t        ,_param->_nb_write_unit  );
   ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD      ,"out_WRITE_UNIT_IN_NUM_REG_RD      ",Tgeneral_address_t,_param->_nb_write_unit  );
@@ -176,5 +176,5 @@
   INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_PACKET_ID    ,_param->_nb_execute_unit);
 //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_OPERATION    ,_param->_nb_execute_unit);
-//INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE         ,_param->_nb_execute_unit);
+  INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE         ,_param->_nb_execute_unit);
   INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_WRITE_RD     ,_param->_nb_execute_unit);
   INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_NUM_REG_RD   ,_param->_nb_execute_unit);
@@ -198,5 +198,5 @@
   INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_PACKET_ID       ,_param->_nb_write_unit  );
 //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_OPERATION       ,_param->_nb_write_unit  );
-//INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE            ,_param->_nb_write_unit  );
+  INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE            ,_param->_nb_write_unit  );
   INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_WRITE_RD        ,_param->_nb_write_unit  );
   INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_NUM_REG_RD      ,_param->_nb_write_unit  );
@@ -282,5 +282,5 @@
 					  nb_request_in,
 					  //range<Toperation_t      > (rand(), _param->_size_operation       ),
-					  //range<Ttype_t           > (rand(), _param->_size_type            ),
+					  range<Ttype_t           > (rand(), _param->_size_type            ),
 					  range<Tcontrol_t        > (rand(), 2                             ),
 					  range<Tgeneral_address_t> (rand(), _param->_size_general_register),
@@ -314,5 +314,5 @@
 		  in_EXECUTE_UNIT_OUT_PACKET_ID            [i] ->write(request[i].front()._packet_id            );
 // 		  in_EXECUTE_UNIT_OUT_OPERATION            [i] ->write(request[i].front()._operation            );
-// 		  in_EXECUTE_UNIT_OUT_TYPE                 [i] ->write(request[i].front()._type                 );
+		  in_EXECUTE_UNIT_OUT_TYPE                 [i] ->write(request[i].front()._type                 );
 		  in_EXECUTE_UNIT_OUT_WRITE_RD             [i] ->write(request[i].front()._write_rd             );
 		  in_EXECUTE_UNIT_OUT_NUM_REG_RD           [i] ->write(request[i].front()._num_reg_rd           );
@@ -368,5 +368,5 @@
 		TEST(Tcontext_t        ,out_WRITE_UNIT_IN_OOO_ENGINE_ID        [i]->read(), request[execute_unit].front()._ooo_engine_id        );
 // 		TEST(Toperation_t      ,out_WRITE_UNIT_IN_OPERATION            [i]->read(), request[execute_unit].front()._operation            );
-// 		TEST(Ttype_t           ,out_WRITE_UNIT_IN_TYPE                 [i]->read(), request[execute_unit].front()._type                 );
+		TEST(Ttype_t           ,out_WRITE_UNIT_IN_TYPE                 [i]->read(), request[execute_unit].front()._type                 );
 		TEST(Tcontrol_t        ,out_WRITE_UNIT_IN_WRITE_RD             [i]->read(), request[execute_unit].front()._write_rd             );
 		TEST(Tgeneral_address_t,out_WRITE_UNIT_IN_NUM_REG_RD           [i]->read(), request[execute_unit].front()._num_reg_rd           );
@@ -405,5 +405,5 @@
   delete []  in_EXECUTE_UNIT_OUT_PACKET_ID    ;
 //delete []  in_EXECUTE_UNIT_OUT_OPERATION    ;
-//delete []  in_EXECUTE_UNIT_OUT_TYPE         ;
+  delete []  in_EXECUTE_UNIT_OUT_TYPE         ;
   delete []  in_EXECUTE_UNIT_OUT_WRITE_RD     ;
   delete []  in_EXECUTE_UNIT_OUT_NUM_REG_RD   ;
@@ -423,5 +423,5 @@
   delete [] out_WRITE_UNIT_IN_PACKET_ID       ;
 //delete [] out_WRITE_UNIT_IN_OPERATION       ;
-//delete [] out_WRITE_UNIT_IN_TYPE            ;
+  delete [] out_WRITE_UNIT_IN_TYPE            ;
   delete [] out_WRITE_UNIT_IN_WRITE_RD        ;
   delete [] out_WRITE_UNIT_IN_NUM_REG_RD      ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h	(revision 78)
@@ -17,6 +17,7 @@
 #include "Common/include/ToString.h"
 #include "Common/include/Debug.h"
+#include "Behavioural/include/Identification.h"
 
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h"
+#include "Behavioural/include/Types.h"
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h"
 #ifdef STATISTICS
@@ -71,5 +72,5 @@
   public    : SC_IN (Tpacket_t         )   **  in_EXECUTE_UNIT_OUT_PACKET_ID      ;
 //public    : SC_IN (Toperation_t      )   **  in_EXECUTE_UNIT_OUT_OPERATION      ;
-//public    : SC_IN (Ttype_t           )   **  in_EXECUTE_UNIT_OUT_TYPE           ;
+  public    : SC_IN (Ttype_t           )   **  in_EXECUTE_UNIT_OUT_TYPE           ;
   public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_UNIT_OUT_WRITE_RD       ;
   public    : SC_IN (Tgeneral_address_t)   **  in_EXECUTE_UNIT_OUT_NUM_REG_RD     ;
@@ -90,5 +91,5 @@
   public    : SC_OUT(Tpacket_t         )   ** out_WRITE_UNIT_IN_PACKET_ID      ;
 //public    : SC_OUT(Toperation_t      )   ** out_WRITE_UNIT_IN_OPERATION      ;
-//public    : SC_OUT(Ttype_t           )   ** out_WRITE_UNIT_IN_TYPE           ;
+  public    : SC_OUT(Ttype_t           )   ** out_WRITE_UNIT_IN_TYPE           ;
   public    : SC_OUT(Tcontrol_t        )   ** out_WRITE_UNIT_IN_WRITE_RD       ;
   public    : SC_OUT(Tgeneral_address_t)   ** out_WRITE_UNIT_IN_NUM_REG_RD     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h	(revision 78)
@@ -10,6 +10,7 @@
 
 #include "Behavioural/include/Parameters.h"
+#include "Behavioural/include/Types.h"
 #include "Common/include/Debug.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h"
+#include "Behavioural/include/Identification.h"
 
 namespace morpheo {
@@ -70,5 +71,5 @@
   public : ~Parameters ();
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h	(revision 77)
+++ 	(revision )
@@ -1,60 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_network_execution_unit_to_write_unit_Types_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_network_execution_unit_to_write_unit_Types_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/include/Types.h"
-#include "Common/include/ToString.h"
-#include "Common/include/FromString.h"
-#include "Common/include/ErrorMorpheo.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace network {
-namespace execution_unit_to_write_unit {
-
-  typedef enum
-    {
-      PRIORITY_STATIC,
-      PRIORITY_ROUND_ROBIN
-    } Tpriority_t;
-
-}; // end namespace execution_unit_to_write_unit
-}; // end namespace network
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-
-  template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Tpriority_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Tpriority_t& x)
-  {
-    switch (x)
-      {
-      case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_STATIC      : return "priority_static"; break;
-      case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_ROUND_ROBIN : return "priority_round_robin"; break;
-      default    : return ""      ; break;
-      }
-  };
-
-  template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Tpriority_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Tpriority_t>(const std::string& x)
-  {
-    if ( (x.compare("0")                    == 0) or
-         (x.compare("priority_static")      == 0))
-      return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_STATIC;
-    if ( (x.compare("1")                    == 0) or
-         (x.compare("priority_round_robin") == 0))
-      return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_ROUND_ROBIN;
-    throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\""));
-  };
-
-}; // end namespace morpheo              
-
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp	(revision 78)
@@ -60,6 +60,6 @@
        ALLOC1_INTERFACE("execute_unit_out", IN, EAST, "Output of execution_unit", _param->_nb_execute_unit);
 
-       ALLOC1_VAL_IN    ( in_EXECUTE_UNIT_OUT_VAL);
-       ALLOC1_ACK_OUT   (out_EXECUTE_UNIT_OUT_ACK);
+       ALLOC1_VALACK_IN ( in_EXECUTE_UNIT_OUT_VAL,VAL);
+       ALLOC1_VALACK_OUT(out_EXECUTE_UNIT_OUT_ACK,ACK);
        ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id      );
        ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id    );
@@ -67,5 +67,5 @@
        ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_PACKET_ID    ,"packet_id"    ,Tpacket_t         ,_param->_size_packet_id       );
      //ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OPERATION    ,"operation"    ,Toperation_t      ,_param->_size_operation       );
-     //ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type            );
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type            );
        ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RD     ,"write_rd"     ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RD   ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register);
@@ -82,6 +82,6 @@
        ALLOC1_INTERFACE("write_unit_in", OUT, WEST, "Input of write_unit", _param->_nb_write_unit);
 
-       ALLOC1_VAL_OUT(out_WRITE_UNIT_IN_VAL);
-       ALLOC1_ACK_IN ( in_WRITE_UNIT_IN_ACK);
+       ALLOC1_VALACK_OUT(out_WRITE_UNIT_IN_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_WRITE_UNIT_IN_ACK,ACK);
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id      );
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id    );
@@ -89,5 +89,5 @@
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_PACKET_ID    ,"packet_id"    ,Tpacket_t         ,_param->_size_packet_id       );
      //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OPERATION    ,"operation"    ,Toperation_t      ,_param->_size_operation       );
-     //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type            );
+       ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type            );
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RD     ,"write_rd"     ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RD   ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp	(revision 78)
@@ -39,5 +39,5 @@
 	delete []  in_EXECUTE_UNIT_OUT_PACKET_ID    ;
       //delete []  in_EXECUTE_UNIT_OUT_OPERATION    ;
-      //delete []  in_EXECUTE_UNIT_OUT_TYPE         ;
+	delete []  in_EXECUTE_UNIT_OUT_TYPE         ;
         delete []  in_EXECUTE_UNIT_OUT_WRITE_RD     ;
         delete []  in_EXECUTE_UNIT_OUT_NUM_REG_RD   ;
@@ -61,5 +61,5 @@
 	delete [] out_WRITE_UNIT_IN_PACKET_ID    ;
       //delete [] out_WRITE_UNIT_IN_OPERATION    ;
-      //delete [] out_WRITE_UNIT_IN_TYPE         ;
+	delete [] out_WRITE_UNIT_IN_TYPE         ;
         delete [] out_WRITE_UNIT_IN_WRITE_RD     ;
         delete [] out_WRITE_UNIT_IN_NUM_REG_RD   ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp	(revision 78)
@@ -75,5 +75,5 @@
 		    PORT_WRITE(out_WRITE_UNIT_IN_PACKET_ID             [dest], PORT_READ(in_EXECUTE_UNIT_OUT_PACKET_ID             [i]));
 		  //PORT_WRITE(out_WRITE_UNIT_IN_OPERATION             [dest], PORT_READ(in_EXECUTE_UNIT_OUT_OPERATION             [i]));
-		  //PORT_WRITE(out_WRITE_UNIT_IN_TYPE                  [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE                  [i]));
+		    PORT_WRITE(out_WRITE_UNIT_IN_TYPE                  [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE                  [i]));
 		    PORT_WRITE(out_WRITE_UNIT_IN_WRITE_RD              [dest], PORT_READ(in_EXECUTE_UNIT_OUT_WRITE_RD              [i]));
 		    PORT_WRITE(out_WRITE_UNIT_IN_NUM_REG_RD            [dest], PORT_READ(in_EXECUTE_UNIT_OUT_NUM_REG_RD            [i]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,9 +21,9 @@
 #undef  FUNCTION
 #define FUNCTION "Execution_unit_to_Write_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
+    Parameters_test test("Execution_unit_to_Write_unit");
 
     for (uint32_t i=0; i<_nb_execute_unit; i++)
@@ -35,5 +35,5 @@
 
 	if (j == _nb_write_unit)
-	  msg += "  - The execute_unit ["+toString(i)+"] is link with none write_unit.\n";
+	  test.error("The execute_unit ["+toString(i)+"] is link with none write_unit.");
       }	  
 
@@ -46,10 +46,14 @@
 
 	if (j == _nb_thread)
-	  msg += "  - The write_unit ["+toString(i)+"] have none source's thread.\n";
+	  test.error("The write_unit ["+toString(i)+"] have none source's thread.");
       }	  
 
-    return msg;
+    if ( (_priority != PRIORITY_STATIC     ) and
+	 (_priority != PRIORITY_ROUND_ROBIN))
+      test.error("Unsupported priority scheme. It must be Static or Round Robin.");
 
     log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg	(revision 78)
@@ -11,5 +11,5 @@
 16	16	*2	# nb_special_register    
 4	4	*2	# size_store_queue       
-4	4	*2	# size_load_queue        
+1	4	*4	# size_load_queue        
 0	1	+1	# priority
 1	1	+1	# table_routing        [0][0]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp	(revision 78)
@@ -190,4 +190,5 @@
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_TYPE                 ,_param->_nb_read_unit);
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit);
+  if (_param->_have_port_load_queue_ptr)
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_read_unit);
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_HAS_IMMEDIAT         ,_param->_nb_read_unit);
@@ -214,4 +215,5 @@
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_TYPE                 ,_param->_nb_execute_unit);
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_execute_unit);
+  if (_param->_have_port_load_queue_ptr)
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_execute_unit);
   INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_HAS_IMMEDIAT         ,_param->_nb_execute_unit);
@@ -352,4 +354,5 @@
 		  in_READ_UNIT_OUT_TYPE                 [i] ->write(request[i].front()._type                 );
 		  in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE[i] ->write(request[i].front()._store_queue_ptr_write);
+		  if (_param->_have_port_load_queue_ptr)
 		  in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i] ->write(request[i].front()._load_queue_ptr_write );
 		  in_READ_UNIT_OUT_HAS_IMMEDIAT         [i] ->write(request[i].front()._has_immediat         );
@@ -408,4 +411,5 @@
 		TEST(Ttype_t           ,out_EXECUTE_UNIT_IN_TYPE                 [i]->read(), request[read_unit].front()._type                 );
 		TEST(Tlsq_ptr_t        ,out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE[i]->read(), request[read_unit].front()._store_queue_ptr_write);
+		if (_param->_have_port_load_queue_ptr)
 		TEST(Tlsq_ptr_t        ,out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i]->read(), request[read_unit].front()._load_queue_ptr_write );
 		TEST(Tcontrol_t        ,out_EXECUTE_UNIT_IN_HAS_IMMEDIAT         [i]->read(), request[read_unit].front()._has_immediat         );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h	(revision 78)
@@ -11,5 +11,6 @@
 #include "Common/include/Debug.h"
 #include "Behavioural/include/Parameters.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h"
+#include "Behavioural/include/Types.h"
+#include "Behavioural/include/Identification.h"
 
 namespace morpheo {
@@ -38,7 +39,7 @@
   public : const uint32_t    _size_load_queue        ;
   public : const Tpriority_t _priority               ;
-  public :       bool     ** _table_routing          ; //array [nb_read_unit][nb_execute_unit]
-  public :       bool     ** _table_execute_type     ; //array [nb_execute_unit][nb_type]
-  public :       bool     ** _table_execute_thread   ; //array [nb_execute_unit][nb_thread]
+  public :       bool     ** _table_routing          ; //[nb_read_unit][nb_execute_unit]
+  public :       bool     ** _table_execute_type     ; //[nb_execute_unit][nb_type]
+  public :       bool     ** _table_execute_thread   ; //[nb_execute_unit][nb_thread]
 
   public : const uint32_t    _size_context_id        ;
@@ -53,4 +54,5 @@
   public : const bool        _have_port_ooo_engine_id;
   public : const bool        _have_port_packet_id    ;
+  public : const bool        _have_port_load_queue_ptr;
 
   public : const uint32_t    _nb_thread              ;
@@ -78,5 +80,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h	(revision 78)
@@ -17,5 +17,6 @@
 #include "Common/include/ToString.h"
 #include "Common/include/Debug.h"
-#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h"
+#include "Behavioural/include/Types.h"
+#include "Behavioural/include/Identification.h"
 
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h"
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h	(revision 77)
+++ 	(revision )
@@ -1,61 +1,0 @@
-#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_network_read_unit_to_execution_unit_Types_h
-#define morpheo_behavioural_core_multi_execute_loop_execute_loop_network_read_unit_to_execution_unit_Types_h
-
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/include/Types.h"
-#include "Common/include/ToString.h"
-#include "Common/include/FromString.h"
-#include "Common/include/ErrorMorpheo.h"
-
-namespace morpheo {
-namespace behavioural {
-namespace core {
-namespace multi_execute_loop {
-namespace execute_loop {
-namespace network {
-namespace read_unit_to_execution_unit {
-
-  typedef enum
-    {
-      PRIORITY_STATIC,
-      PRIORITY_ROUND_ROBIN
-    } Tpriority_t;
-
-}; // end namespace read_unit_to_execution_unit
-}; // end namespace network
-}; // end namespace execute_loop
-}; // end namespace multi_execute_loop
-}; // end namespace core
-}; // end namespace behavioural
-
-  template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Tpriority_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Tpriority_t& x)
-  {
-    switch (x)
-      {
-      case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_STATIC      : return "priority_static"; break;
-      case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_ROUND_ROBIN : return "priority_round_robin"; break;
-      default    : return ""      ; break;
-      }
-  };
-
-  template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Tpriority_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Tpriority_t>(const std::string& x)
-  {
-    if ( (x.compare("0")                    == 0) or
-         (x.compare("priority_static")      == 0))
-      return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_STATIC;
-    if ( (x.compare("1")                    == 0) or
-         (x.compare("priority_round_robin") == 0))
-      return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_ROUND_ROBIN;
-    throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\""));
-  };
-
-
-}; // end namespace morpheo              
-
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp	(revision 78)
@@ -60,4 +60,5 @@
     _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
     _have_port_packet_id     (_size_packet_id     > 0),
+    _have_port_load_queue_ptr(_size_load_queue    > 1),
 
     _nb_thread               (get_nb_thread (nb_context, nb_front_end, nb_ooo_engine))
@@ -68,11 +69,12 @@
     _table_execute_type   = table_execute_type  ;
     _table_execute_thread = table_execute_thread;
-    
-    _nb_load_store_unit = 0;
+
+    _nb_load_store_unit   = 0;
 
     for (uint32_t i=0; i<nb_execute_unit; i++)
-      if (table_execute_type[i][TYPE_MEMORY] == true)
-	_nb_load_store_unit ++;
-
+      {
+	if (table_execute_type[i][TYPE_MEMORY] == true)
+	  _nb_load_store_unit ++;
+      }
     // a execution_unit can't be a load_store unit and a functionnal unit
     _nb_functionnal_unit = nb_execute_unit-_nb_load_store_unit;
@@ -111,4 +113,5 @@
     _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     _have_port_packet_id     (param._have_port_packet_id    ),
+    _have_port_load_queue_ptr(param._have_port_load_queue_ptr),
 
     _nb_thread               (param._nb_thread              )
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,9 +21,9 @@
 #undef  FUNCTION
 #define FUNCTION "Read_unit_to_Execution_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
+    Parameters_test test ("Read_unit_to_Execution_unit");
 
     // TYPE         | multiple? | Optionnal? | Exclusive? | Comment
@@ -90,5 +90,5 @@
 		// Test uniq type
 		if (type_present [j][k] and type_uniq[k])
-		  msg += "  - The execute_unit '"+toString(i)+"' can execute operation of type '"+toString_type(k)+"' at the thread '"+toString(j)+"'. But an another execute_unit can be execute the same type for the same thread. And the type must be uniq !.\n";
+		  test.error("The execute_unit '"+toString(i)+"' can execute operation of type '"+toString_type(k)+"' at the thread '"+toString(j)+"'. But an another execute_unit can be execute the same type for the same thread. And the type must be uniq !.");
 		
 		type_present [j][k] = true;
@@ -99,5 +99,5 @@
 	for (uint32_t i=0; i<_nb_thread; i++)
 	  if (not type_present [i][j])
-	    msg += "  - The thread '"+toString(i)+"' can't access at the execute_unit to execute the type's operation '"+toString_type(j)+"' (and this type is not optionnal !).\n";
+	    test.error("The thread '"+toString(i)+"' can't access at the execute_unit to execute the type's operation '"+toString_type(j)+"' (and this type is not optionnal !).");
 	    
     // Test all excluve type
@@ -108,5 +108,5 @@
 	    if ((j != k) and (_table_execute_type[i][k] == true))
 	      {
-		msg += "  - The execute_unit ["+toString(i)+"] implement the type '"+toString_type(j)+"', and this type is exclusive with all others type.\n";
+		test.error("The execute_unit ["+toString(i)+"] implement the type '"+toString_type(j)+"', and this type is exclusive with all others type.");
 		break;
 	      }
@@ -120,10 +120,14 @@
 
 	if (j == _nb_thread)
-	  msg += "  - The execute_unit ["+toString(i)+"] have none source's thread.\n";
+	  test.error("The execute_unit ["+toString(i)+"] have none source's thread.");
       }	  
-    
-    return msg;
 
+    if ( (_priority != PRIORITY_STATIC     ) and
+	 (_priority != PRIORITY_ROUND_ROBIN))
+      test.error("Unsupported priority scheme. It must be Static or Round Robin.");
+        
     log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp	(revision 78)
@@ -89,6 +89,4 @@
 		      << (*(in_READ_UNIT_OUT_OPERATION             [i]))
 		      << (*(in_READ_UNIT_OUT_TYPE                  [i]))
-		      << (*(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i]))
-		      << (*(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE  [i]))
 		      << (*(in_READ_UNIT_OUT_HAS_IMMEDIAT          [i]))
 		      << (*(in_READ_UNIT_OUT_IMMEDIAT              [i]))
@@ -99,6 +97,9 @@
 		      << (*(in_READ_UNIT_OUT_NUM_REG_RD            [i]))
 		      << (*(in_READ_UNIT_OUT_WRITE_RE              [i]))
-		      << (*(in_READ_UNIT_OUT_NUM_REG_RE            [i]));
-
+		      << (*(in_READ_UNIT_OUT_NUM_REG_RE            [i]))
+		      << (*(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i]));
+
+	    if (_param->_have_port_load_queue_ptr)
+	    sensitive  << (*(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE  [i]));
 	    if (_param->_have_port_context_id)
 	    sensitive  << (*(in_READ_UNIT_OUT_CONTEXT_ID            [i]));
@@ -260,4 +261,6 @@
 	      }
 
+	    if (_param->_have_port_load_queue_ptr)
+	      {
 	    (*(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i])) (*(in_EXECUTE_UNIT_IN_ACK [i]));
 
@@ -274,5 +277,6 @@
 		(*(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i])) (*(in_READ_UNIT_OUT_OOO_ENGINE_ID        [j]));
 	      }
-
+	      }
+	    
 	    (*(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [i])) (*(in_EXECUTE_UNIT_IN_ACK [i]));
 
@@ -364,5 +368,5 @@
 		(*(out_EXECUTE_UNIT_IN_WRITE_RD [i])) (*(in_READ_UNIT_OUT_OOO_ENGINE_ID [j]));
 	      }
-
+	    
 	    (*(out_EXECUTE_UNIT_IN_NUM_REG_RD [i])) (*(in_EXECUTE_UNIT_IN_ACK [i]));
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp	(revision 78)
@@ -59,6 +59,6 @@
        ALLOC1_INTERFACE("read_unit_out", IN, EAST, "Output of read_unit", _param->_nb_read_unit);
 
-       ALLOC1_VAL_IN ( in_READ_UNIT_OUT_VAL);
-       ALLOC1_ACK_OUT(out_READ_UNIT_OUT_ACK);
+       ALLOC1_VALACK_IN ( in_READ_UNIT_OUT_VAL,VAL);
+       ALLOC1_VALACK_OUT(out_READ_UNIT_OUT_ACK,ACK);
 
        ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_CONTEXT_ID           ,"CONTEXT_ID"           ,Tcontext_t        ,_param->_size_context_id);
@@ -68,6 +68,6 @@
        ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_OPERATION            ,"OPERATION"            ,Toperation_t      ,_param->_size_operation);
        ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_TYPE                 ,"TYPE"                 ,Ttype_t           ,_param->_size_type);
-       ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_size_store_queue);
-       ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t        ,_param->_size_load_queue);
+       ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,log2(_param->_size_store_queue));
+       ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t        ,log2(_param->_size_load_queue));
        ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_HAS_IMMEDIAT         ,"HAS_IMMEDIAT"         ,Tcontrol_t        ,1);
        ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_IMMEDIAT             ,"IMMEDIAT"             ,Tgeneral_data_t   ,_param->_size_general_data);
@@ -82,8 +82,8 @@
     // ~~~~~[ Interface "execute_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("execute_unit_out", IN, EAST, "Output of execute_unit", _param->_nb_execute_unit);
-
-       ALLOC1_VAL_OUT(out_EXECUTE_UNIT_IN_VAL);
-       ALLOC1_ACK_IN ( in_EXECUTE_UNIT_IN_ACK);
+       ALLOC1_INTERFACE("execute_unit_in", OUT, WEST, "Input of execute_unit", _param->_nb_execute_unit);
+       
+       ALLOC1_VALACK_OUT(out_EXECUTE_UNIT_IN_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_EXECUTE_UNIT_IN_ACK,ACK);
 
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_CONTEXT_ID           ,"CONTEXT_ID"           ,Tcontext_t        ,_param->_size_context_id);
@@ -93,15 +93,15 @@
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_OPERATION            ,"OPERATION"            ,Toperation_t      ,_param->_size_operation);
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_TYPE                 ,"TYPE"                 ,Ttype_t           ,_param->_size_type);
-       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_size_store_queue);
-       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t        ,_param->_size_load_queue);
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT         ,"HAS_IMMEDIAT"         ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC              ,"DATA_RC"              ,Tspecial_data_t   ,_param->_size_special_data);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RD             ,"WRITE_RD"             ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RE             ,"WRITE_RE"             ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RE           ,"NUM_REG_RE"           ,Tspecial_address_t,_param->_size_special_register);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,log2(_param->_size_store_queue));
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t        ,log2(_param->_size_load_queue));
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_IMMEDIAT             ,"IMMEDIAT"             ,Tgeneral_data_t   ,_param->_size_general_data);
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RA              ,"DATA_RA"              ,Tgeneral_data_t   ,_param->_size_general_data);
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RB              ,"DATA_RB"              ,Tgeneral_data_t   ,_param->_size_general_data);
-       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC              ,"DATA_RC"              ,Tspecial_data_t   ,_param->_size_special_data);
-       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RD             ,"WRITE_RD"             ,Tcontrol_t        ,1);
        ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RD           ,"NUM_REG_RD"           ,Tgeneral_address_t,_param->_size_general_register);
-       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RE             ,"WRITE_RE"             ,Tcontrol_t        ,1);
-       ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RE           ,"NUM_REG_RE"           ,Tspecial_address_t,_param->_size_special_register);
      }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp	(revision 78)
@@ -42,4 +42,5 @@
 	delete [] in_READ_UNIT_OUT_TYPE                 ;
 	delete [] in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
 	delete [] in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ;
 	delete [] in_READ_UNIT_OUT_HAS_IMMEDIAT         ;
@@ -66,15 +67,16 @@
 	delete [] out_EXECUTE_UNIT_IN_OPERATION            ;
 	delete [] out_EXECUTE_UNIT_IN_TYPE                 ;
+	delete [] out_EXECUTE_UNIT_IN_HAS_IMMEDIAT         ;
+	delete [] out_EXECUTE_UNIT_IN_DATA_RC              ;
+	delete [] out_EXECUTE_UNIT_IN_WRITE_RD             ;
+	delete [] out_EXECUTE_UNIT_IN_WRITE_RE             ;
+	delete [] out_EXECUTE_UNIT_IN_NUM_REG_RE           ;
 	delete [] out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
 	delete [] out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ;
-	delete [] out_EXECUTE_UNIT_IN_HAS_IMMEDIAT         ;
 	delete [] out_EXECUTE_UNIT_IN_IMMEDIAT             ;
 	delete [] out_EXECUTE_UNIT_IN_DATA_RA              ;
 	delete [] out_EXECUTE_UNIT_IN_DATA_RB              ;
-	delete [] out_EXECUTE_UNIT_IN_DATA_RC              ;
-	delete [] out_EXECUTE_UNIT_IN_WRITE_RD             ;
 	delete [] out_EXECUTE_UNIT_IN_NUM_REG_RD           ;
-	delete [] out_EXECUTE_UNIT_IN_WRITE_RE             ;
-	delete [] out_EXECUTE_UNIT_IN_NUM_REG_RE           ;
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp	(revision 78)
@@ -78,15 +78,16 @@
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_OPERATION             [dest], PORT_READ(in_READ_UNIT_OUT_OPERATION             [i]));
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_TYPE                  [dest], PORT_READ(in_READ_UNIT_OUT_TYPE                  [i]));
+		    PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT          [dest], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT          [i]));
+		    PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RC               [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RC               [i]));
+		    PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RD              [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RD              [i]));
+		    PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RE              [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RE              [i]));
+		    PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RE            [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RE            [i]));
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE [dest], PORT_READ(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i]));
+		    if (_param->_have_port_load_queue_ptr)
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE  [dest], PORT_READ(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE  [i]));
-		    PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT          [dest], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT          [i]));
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_IMMEDIAT              [dest], PORT_READ(in_READ_UNIT_OUT_IMMEDIAT              [i]));
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RA               [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RA               [i]));
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RB               [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RB               [i]));
-		    PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RC               [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RC               [i]));
-		    PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RD              [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RD              [i]));
 		    PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RD            [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RD            [i]));
-		    PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RE              [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RE              [i]));
-		    PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RE            [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RE            [i]));
 		  }
 	      }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h	(revision 78)
@@ -50,5 +50,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
 
   public :        std::string   print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp	(revision 78)
@@ -21,13 +21,13 @@
 #undef  FUNCTION
 #define FUNCTION "Register_unit_Glue::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Register_unit_Glue,FUNCTION,"Begin");
 
-    std::string msg = "";
-
-    return msg;
+    Parameters_test test("Register_unit_Glue");
 
     log_printf(FUNC,Register_unit_Glue,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h	(revision 78)
@@ -79,5 +79,5 @@
   public : ~Parameters () ;
 
-  public :        std::string   msg_error  (void);
+  public :        Parameters_test msg_error  (void);
   public :        std::string   print      (uint32_t depth);
   public : friend std::ostream& operator<< (std::ostream& output_stream,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h	(revision 78)
@@ -5,5 +5,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  */
@@ -45,5 +45,5 @@
 #endif
   {
-    // -----[ fields ]----------------------------------------------------
+    // -----[ fields ]----------------------------------------------------
     // Parameters
   protected : const std::string       _name;
@@ -59,10 +59,10 @@
 
 #ifdef SYSTEMC
-    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     // Interface
   public    : SC_CLOCK                      *  in_CLOCK        ;
   public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
 
-    // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )   **  in_GPR_READ_VAL                 ;
   public    : SC_OUT(Tcontrol_t        )   ** out_GPR_READ_ACK                 ;
@@ -72,5 +72,5 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_GPR_READ_DATA_VAL            ;
 
-    // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )   **  in_GPR_WRITE_VAL                ;
   public    : SC_OUT(Tcontrol_t        )   ** out_GPR_WRITE_ACK                ;
@@ -79,5 +79,5 @@
   public    : SC_IN (Tgeneral_data_t   )   **  in_GPR_WRITE_DATA               ;
 
-    // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )   **  in_SPR_READ_VAL                 ;
   public    : SC_OUT(Tcontrol_t        )   ** out_SPR_READ_ACK                 ;
@@ -87,5 +87,5 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_SPR_READ_DATA_VAL            ;
 
-    // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )   **  in_SPR_WRITE_VAL                ;
   public    : SC_OUT(Tcontrol_t        )   ** out_SPR_WRITE_ACK                ;
@@ -94,5 +94,5 @@
   public    : SC_IN (Tspecial_data_t   )   **  in_SPR_WRITE_DATA               ;
     
-    // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )  ***  in_INSERT_ROB_VAL               ;
   public    : SC_OUT(Tcontrol_t        )  *** out_INSERT_ROB_ACK               ;
@@ -102,5 +102,5 @@
   public    : SC_IN (Tspecial_address_t)  ***  in_INSERT_ROB_RE_NUM_REG        ;
 
-    // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_ROB_VAL               ;
   public    : SC_OUT(Tcontrol_t        )  *** out_RETIRE_ROB_ACK               ;
@@ -114,5 +114,5 @@
   public    : SC_IN (Tspecial_address_t)  ***  in_RETIRE_ROB_RE_NEW_NUM_REG    ;
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
   protected : morpheo::behavioural::generic::registerfile::RegisterFile::RegisterFile ** component_gpr       ;
   protected : morpheo::behavioural::generic::registerfile::RegisterFile::RegisterFile ** component_gpr_status;
@@ -121,10 +121,10 @@
   protected : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Register_unit_Glue::Register_unit_Glue      * component_glue      ;
 
-    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
-    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 #endif
 
-    // -----[ methods ]---------------------------------------------------
+    // -----[ methods ]---------------------------------------------------
 
 #ifdef SYSTEMC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp	(revision 78)
@@ -18,13 +18,13 @@
 #undef  FUNCTION
 #define FUNCTION "Register_unit::msg_error"
-  std::string Parameters::msg_error(void)
+  Parameters_test Parameters::msg_error(void)
   {
     log_printf(FUNC,Register_unit,FUNCTION,"Begin");
 
-    std::string msg = "";
-
-    return msg;
+    Parameters_test test("Register_unit");
 
     log_printf(FUNC,Register_unit,FUNCTION,"End");
+
+    return test;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp	(revision 77)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp	(revision 78)
@@ -240,5 +240,5 @@
 
 	    in_RETIRE_ROB_VAL            [i][j] = interface->set_signal_valack_in  (VAL);
-	    out_RETIRE_ROB_ACK            [i][j] = interface->set_signal_valack_out (ACK);
+	   out_RETIRE_ROB_ACK            [i][j] = interface->set_signal_valack_out (ACK);
 	    in_RETIRE_ROB_RD_OLD_USE     [i][j] = interface->set_signal_in <Tcontrol_t        > ("rd_old_use"    , 1);
 	    in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = interface->set_signal_in <Tgeneral_address_t> ("rd_old_num_reg", _param->_size_gpr_address);
@@ -470,4 +470,11 @@
 				   _name+"_glue",
 				   "out_CONST_1");
+
+	      _component->port_map(_name+"_glue",
+				   "out_CONST_1",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA" );
+
+
 	      _component->port_map(name_component,
 				   "in_WRITE_"+toString(x++)+"_ADDRESS",
@@ -492,4 +499,8 @@
 				   "out_CONST_0"
 				   );
+	      _component->port_map( _name+"_glue",
+				    "out_CONST_0",
+				    name_component,
+				   "in_WRITE_"+toString(x)+"_DATA");
 
 	      _component->port_map(name_component,
@@ -515,4 +526,8 @@
 				   _name+"_glue",
 				   "out_CONST_0");
+	      _component->port_map(_name+"_glue",
+				   "out_CONST_0",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA" );
 
 	      _component->port_map(name_component,
@@ -534,4 +549,9 @@
 				   _name+"_glue",
 				   "out_CONST_1"
+				   );
+	      _component->port_map(_name+"_glue",
+				   "out_CONST_1",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA"
 				   );
 
@@ -651,4 +671,10 @@
 				   _name+"_glue",
 				   "out_CONST_1");
+	      _component->port_map(_name+"_glue",
+				   "out_CONST_1",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA"
+				   );
+
 	      _component->port_map(name_component,
 				   "in_WRITE_"+toString(x++)+"_ADDRESS",
@@ -673,4 +699,9 @@
 				   "out_CONST_0"
 				   );
+	      _component->port_map( _name+"_glue",
+				    "out_CONST_0",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA"
+				   );
 
 	      _component->port_map(name_component,
@@ -696,4 +727,9 @@
 				   _name+"_glue",
 				   "out_CONST_0");
+	      _component->port_map(_name+"_glue",
+				   "out_CONST_0",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA"
+				   );
 
 	      _component->port_map(name_component,
@@ -715,4 +751,9 @@
 				   _name+"_glue",
 				   "out_CONST_1"
+				   );
+	      _component->port_map(_name+"_glue",
+				   "out_CONST_1",
+				   name_component,
+				   "in_WRITE_"+toString(x)+"_DATA"
 				   );
 
@@ -738,6 +779,6 @@
       _component->port_map(name_component,"in_CLOCK" , _name, "in_CLOCK" );
       _component->port_map(name_component,"in_NRESET", _name, "in_NRESET");
-      _component->port_map(name_component,"out_CONST_0");
-      _component->port_map(name_component,"out_CONST_1");
+//       _component->port_map(name_component,"out_CONST_0",_name,"out_CONST_0");
+//       _component->port_map(name_component,"out_CONST_1",_name,"out_CONST_1");
 
       for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/Makefile	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/Makefile	(revision 78)
@@ -0,0 +1,30 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Execute_loop_LIBRARY)
+
+DIR_LIBRARY			= $(Execute_loop_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Execute_loop_library
+
+library_clean			: Execute_loop_library_clean
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/configuration.cfg	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/configuration.cfg	(revision 78)
@@ -0,0 +1,42 @@
+Execute_loop
+1	1	+1	# nb_read_unit                              
+1	1	+1	# nb_functionnal_unit                       
+1	1	+1	# nb_load_store_unit                        
+1	1	+1	# nb_write_unit                             
+1	1	+1	# nb_context                                
+1	1	+1	# nb_front_end                              
+1	1	+1	# nb_ooo_engine                             
+32	32	+1	# nb_packet                                 
+32	32	+1	# size_general_data                         
+2	2	+1	# size_special_data                         
+1	1	+1	# size_read_queue                            [0]    [read_unit]
+1	1	+1	# size_reservation_station                   [0]    [read_unit]
+1	1	+1	# nb_inst_retire                             [0]    [read_unit]
+2	2	+1	# size_store_queue                           [0]    [load_store_unit]
+1	1	+1	# size_load_queue                            [0]    [load_store_unit]
+1	1	+1	# size_speculative_access_queue              [0]    [load_store_unit]
+1	1	+1	# nb_port_check                              [0]    [load_store_unit]
+2	2	+1	# speculative_load                           [0]    [load_store_unit]
+0	0	+1	# nb_bypass_memory                           [0]    [load_store_unit]
+1	1	+1	# size_write_queue                           [0]    [write_unit]
+1	1	+1	# size_execute_queue                         [0]    [write_unit]
+1	1	+1	# nb_bypass_write                            [0]    [write_unit]
+1	1	+1	# nb_gpr_bank                                	    
+1	1	+1	# nb_gpr_port_read_by_bank                   	    
+1	1	+1	# nb_gpr_port_write_by_bank                  	    
+1	1	+1	# nb_spr_bank                                	    
+1	1	+1	# nb_spr_port_read_by_bank                   	    
+1	1	+1	# nb_spr_port_write_by_bank                  	    
+64	64	+1	# nb_general_register                        [0]    [nb_ooo_engine]		  
+16	16	+1	# nb_special_register                        [0]    [nb_ooo_engine]		  
+1	1	+1	# nb_inst_insert_rob                         [0]    [nb_ooo_engine]		  
+1	1	+1	# nb_inst_retire_rob                         [0]    [nb_ooo_engine]		  
+1	1	+1	# execution_unit_to_write_unit_priority                                      
+1	1	+1	# execution_unit_to_write_unit_table_routing [0][0] [nb_execute_unit][nb_write_unit]
+1	1	+1	# execution_unit_to_write_unit_table_routing [1][0] [nb_execute_unit][nb_write_unit]
+1	1	+1	# execution_unit_to_write_unit_table_thread  [0][0] [nb_write_unit][nb_thread]	  
+1	1	+1	# read_unit_to_execution_unit_priority                                       
+1	1	+1	# read_unit_to_execution_unit_table_routing  [0][0] [nb_read_unit][nb_execute_unit] 
+1	1	+1	# read_unit_to_execution_unit_table_routing  [0][1] [nb_read_unit][nb_execute_unit] 
+1	1	+1	# read_unit_to_execution_unit_table_thread   [0][0] [nb_execute_unit][nb_thread]    
+1	1	+1	# read_unit_to_execution_unit_table_thread   [1][0] [nb_execute_unit][nb_thread]    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h	(revision 78)
@@ -0,0 +1,29 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include <string>
+#include <iostream>
+#include <sys/time.h>
+
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_execute_loop;
+
+using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp	(revision 78)
@@ -0,0 +1,300 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h"
+
+#define NB_PARAMS 18
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_read_unit                                                               (uint32_t           )\n"));
+  err (_(" * nb_functionnal_unit                                                        (uint32_t           )\n"));
+  err (_(" * nb_load_store_unit                                                         (uint32_t           )\n"));
+  err (_(" * nb_write_unit                                                              (uint32_t           )\n"));
+  err (_(" * nb_context                                                                 (uint32_t           )\n"));
+  err (_(" * nb_front_end                                                               (uint32_t           )\n"));
+  err (_(" * nb_ooo_engine                                                              (uint32_t           )\n"));
+  err (_(" * nb_packet                                                                  (uint32_t           )\n"));
+  err (_(" * size_general_data                                                          (uint32_t           )\n"));
+  err (_(" * size_special_data                                                          (uint32_t           )\n"));
+  err (_(" * size_read_queue                           [read_unit]                      (uint32_t           )\n"));
+  err (_(" * size_reservation_station                  [read_unit]                      (uint32_t           )\n"));
+  err (_(" * nb_inst_retire                            [read_unit]                      (uint32_t           )\n"));
+  err (_(" * size_store_queue                          [load_store_unit]                (uint32_t           )\n"));
+  err (_(" * size_load_queue                           [load_store_unit]                (uint32_t           )\n"));
+  err (_(" * size_speculative_access_queue             [load_store_unit]                (uint32_t           )\n"));
+  err (_(" * nb_port_check                             [load_store_unit]                (uint32_t           )\n"));
+  err (_(" * speculative_load                          [load_store_unit]                (Tspeculative_load_t)\n"));
+  err (_(" * nb_bypass_memory                          [load_store_unit]                (uint32_t           )\n"));
+  err (_(" * size_write_queue                          [write_unit]                     (uint32_t           )\n"));
+  err (_(" * size_execute_queue                        [write_unit]                     (uint32_t           )\n"));
+  err (_(" * nb_bypass_write                           [write_unit]                     (uint32_t           )\n"));
+  err (_(" * nb_gpr_bank                                                                (uint32_t           )\n"));
+  err (_(" * nb_gpr_port_read_by_bank                                                   (uint32_t           )\n"));
+  err (_(" * nb_gpr_port_write_by_bank                                                  (uint32_t           )\n"));
+  err (_(" * nb_spr_bank                                                                (uint32_t           )\n"));
+  err (_(" * nb_spr_port_read_by_bank                                                   (uint32_t           )\n"));
+  err (_(" * nb_spr_port_write_by_bank                                                  (uint32_t           )\n"));
+  err (_(" * nb_general_register                       [nb_ooo_engine]                  (uint32_t           )\n"));
+  err (_(" * nb_special_register                       [nb_ooo_engine]                  (uint32_t           )\n"));
+  err (_(" * nb_inst_insert_rob                        [nb_ooo_engine]                  (uint32_t           )\n"));
+  err (_(" * nb_inst_retire_rob                        [nb_ooo_engine]                  (uint32_t           )\n"));
+  err (_(" * execution_unit_to_write_unit_priority                                      (Tpriority_t        )\n"));
+  err (_(" * execution_unit_to_write_unit_table_routing[nb_execute_unit][nb_write_unit] (bool               )\n"));
+  err (_(" * execution_unit_to_write_unit_table_thread [nb_write_unit][nb_thread]       (bool               )\n"));
+  err (_(" * read_unit_to_execution_unit_priority                                       (Tpriority_t        )\n"));
+  err (_(" * read_unit_to_execution_unit_table_routing [nb_read_unit][nb_execute_unit]  (bool               )\n"));
+  err (_(" * read_unit_to_execution_unit_table_thread  [nb_execute_unit][nb_thread]     (bool               )\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc < 2+NB_PARAMS)
+    usage (argc, argv);
+
+  uint32_t       x = 1;
+
+  string                name                =      argv[x++];
+  uint32_t              nb_read_unit        = atoi(argv[x++]);
+  uint32_t              nb_functionnal_unit = atoi(argv[x++]);
+  uint32_t              nb_load_store_unit  = atoi(argv[x++]);
+  uint32_t              nb_write_unit       = atoi(argv[x++]);
+  uint32_t              nb_context          = atoi(argv[x++]);
+  uint32_t              nb_front_end        = atoi(argv[x++]);
+  uint32_t              nb_ooo_engine       = atoi(argv[x++]);
+  uint32_t              nb_packet           = atoi(argv[x++]);
+  uint32_t              size_general_data   = atoi(argv[x++]);
+  uint32_t              size_special_data   = atoi(argv[x++]);
+
+  uint32_t nb_execute_unit = nb_functionnal_unit + nb_load_store_unit;
+  uint32_t nb_thread       = get_nb_thread(nb_context, nb_front_end, nb_ooo_engine);
+
+  int32_t nb_params = (2+NB_PARAMS+
+		       3*nb_read_unit+
+		       6*nb_load_store_unit+
+		       3*nb_write_unit+
+		       4*nb_ooo_engine+
+		       nb_execute_unit*nb_write_unit+
+		       nb_write_unit*nb_thread+
+		       nb_read_unit*nb_execute_unit+
+		       nb_execute_unit*nb_thread);
+  
+  
+  
+  if (argc != nb_params)
+    {
+      msg(_("Need %d parameters."),nb_params);
+      usage (argc, argv);
+    }
+  uint32_t            * size_read_queue          = new uint32_t [nb_read_unit];
+  for (uint32_t i=0; i<nb_read_unit; i++)
+    size_read_queue [i] = atoi(argv[x++]);
+
+  uint32_t            * size_reservation_station = new uint32_t [nb_read_unit];
+  for (uint32_t i=0; i<nb_read_unit; i++)
+    size_reservation_station [i] = atoi(argv[x++]);
+
+  uint32_t            * nb_inst_retire           = new uint32_t [nb_read_unit];
+  for (uint32_t i=0; i<nb_read_unit; i++)
+    nb_inst_retire [i] = atoi(argv[x++]);
+
+  uint32_t          * size_store_queue              = new uint32_t [nb_load_store_unit];
+  for (uint32_t i=0; i<nb_load_store_unit; i++)
+    size_store_queue              [i] = atoi(argv[x++]);
+
+  uint32_t          * size_load_queue               = new uint32_t [nb_load_store_unit];
+  for (uint32_t i=0; i<nb_load_store_unit; i++)
+    size_load_queue               [i] = atoi(argv[x++]);
+
+  uint32_t          * size_speculative_access_queue = new uint32_t [nb_load_store_unit];
+  for (uint32_t i=0; i<nb_load_store_unit; i++)
+    size_speculative_access_queue [i] = atoi(argv[x++]);
+
+  uint32_t          * nb_port_check                 = new uint32_t [nb_load_store_unit];
+  for (uint32_t i=0; i<nb_load_store_unit; i++)
+    nb_port_check                 [i] = atoi(argv[x++]);
+
+  Tspeculative_load_t * speculative_load            = new Tspeculative_load_t [nb_load_store_unit];
+  for (uint32_t i=0; i<nb_load_store_unit; i++)
+    speculative_load              [i] = fromString<Tspeculative_load_t>(argv[x++]);
+
+  uint32_t          * nb_bypass_memory              = new uint32_t [nb_load_store_unit];
+  for (uint32_t i=0; i<nb_load_store_unit; i++)
+    nb_bypass_memory              [i] = atoi(argv[x++]);
+
+  uint32_t * size_write_queue   = new uint32_t [nb_write_unit];
+  for (uint32_t i=0; i<nb_write_unit; i++)
+    size_write_queue   [i] = atoi(argv[x++]);
+  
+  uint32_t * size_execute_queue = new uint32_t [nb_write_unit];
+  for (uint32_t i=0; i<nb_write_unit; i++)
+    size_execute_queue [i] = atoi(argv[x++]);
+  
+  uint32_t * nb_bypass_write    = new uint32_t [nb_write_unit];
+  for (uint32_t i=0; i<nb_write_unit; i++)
+    nb_bypass_write    [i] = atoi(argv[x++]);
+
+  uint32_t nb_gpr_bank                = atoi(argv[x++]);
+  uint32_t nb_gpr_port_read_by_bank   = atoi(argv[x++]);
+  uint32_t nb_gpr_port_write_by_bank  = atoi(argv[x++]);
+  uint32_t nb_spr_bank                = atoi(argv[x++]);
+  uint32_t nb_spr_port_read_by_bank   = atoi(argv[x++]);
+  uint32_t nb_spr_port_write_by_bank  = atoi(argv[x++]);
+
+  uint32_t * nb_general_register = new uint32_t [nb_ooo_engine];
+  for (uint32_t i=0; i<nb_ooo_engine; i++)
+    nb_general_register [i] = atoi(argv[x++]);
+
+  uint32_t * nb_special_register = new uint32_t [nb_ooo_engine];
+  for (uint32_t i=0; i<nb_ooo_engine; i++)
+    nb_special_register [i] = atoi(argv[x++]);
+
+  uint32_t * nb_inst_insert_rob  = new uint32_t [nb_ooo_engine];
+  for (uint32_t i=0; i<nb_ooo_engine; i++)
+    nb_inst_insert_rob  [i] = atoi(argv[x++]);
+
+  uint32_t * nb_inst_retire_rob  = new uint32_t [nb_ooo_engine];
+  for (uint32_t i=0; i<nb_ooo_engine; i++)
+    nb_inst_retire_rob  [i] = atoi(argv[x++]);
+
+  Tpriority_t execution_unit_to_write_unit_priority = fromString<Tpriority_t>(argv[x++]);
+
+  bool ** execution_unit_to_write_unit_table_routing = new bool * [nb_execute_unit];
+  for (uint32_t i=0; i<nb_execute_unit; i++)
+    {
+      execution_unit_to_write_unit_table_routing [i] = new bool [nb_write_unit];
+      for (uint32_t j=0; j<nb_write_unit; j++)
+	execution_unit_to_write_unit_table_routing [i][j] = atoi(argv[x++]);
+    }
+  bool ** execution_unit_to_write_unit_table_thread = new bool * [nb_write_unit];
+  for (uint32_t i=0; i<nb_write_unit; i++)
+    {
+      execution_unit_to_write_unit_table_thread [i] = new bool [nb_thread];
+      for (uint32_t j=0; j<nb_thread; j++)
+	execution_unit_to_write_unit_table_thread  [i][j] = atoi(argv[x++]);
+    }
+  Tpriority_t read_unit_to_execution_unit_priority  = fromString<Tpriority_t>(argv[x++]);
+
+  bool ** read_unit_to_execution_unit_table_routing = new bool * [nb_read_unit];
+  for (uint32_t i=0; i<nb_read_unit; i++)
+    {
+      read_unit_to_execution_unit_table_routing [i] = new bool [nb_execute_unit];
+      for (uint32_t j=0; j<nb_execute_unit; j++)
+	read_unit_to_execution_unit_table_routing [i][j] = atoi(argv[x++]);
+    }
+  bool ** read_unit_to_execution_unit_table_thread = new bool * [nb_execute_unit];
+  for (uint32_t i=0; i<nb_execute_unit; i++)
+    {
+      read_unit_to_execution_unit_table_thread [i] = new bool [nb_thread];
+      for (uint32_t j=0; j<nb_thread; j++)
+	read_unit_to_execution_unit_table_thread [i][j] =  atoi(argv[x++]);
+    }
+  execute_timing_t *** timing = new execute_timing_t ** [nb_execute_unit];
+  
+  // alloc and reset timing array
+  for (uint32_t i=0; i< nb_execute_unit; i++)
+    {
+      timing [i] = new execute_timing_t * [MAX_TYPE];
+      
+      for (uint32_t j=0; j< MAX_TYPE; j++)
+	{
+	  timing [i][j]= new execute_timing_t [MAX_OPERATION];
+	  
+	  for (uint32_t k=0; k< MAX_OPERATION; k++)
+	    timing[i][j][k]._delay = timing[i][j][k]._latence = 0;
+	}
+    }
+  
+  for (uint32_t i=0; i< nb_load_store_unit; i++)
+    for (uint32_t k=0; k< MAX_OPERATION; k++)
+      timing[i][TYPE_MEMORY][k]._delay = timing[i][TYPE_MEMORY][k]._latence = 1;
+  for (uint32_t i=0; i< nb_functionnal_unit; i++)
+    for (uint32_t j=0; j< MAX_TYPE; j++)
+      if (j != TYPE_MEMORY)
+	for (uint32_t k=0; k< MAX_OPERATION; k++)
+	  timing[i+nb_load_store_unit][j][k]._delay = timing[i+nb_load_store_unit][j][k]._latence = 1;
+
+  morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t) = &(morpheo::behavioural::custom::default_get_custom_information);
+
+  try 
+    {
+      morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters
+	(nb_read_unit                                  ,
+	 nb_functionnal_unit                           ,
+	 nb_load_store_unit                            ,
+	 nb_write_unit                                 ,
+	 
+	 nb_context                                    ,
+	 nb_front_end                                  ,
+	 nb_ooo_engine                                 ,
+	 nb_packet                                     ,
+	 size_general_data                             ,
+	 size_special_data                             ,
+	 
+	 size_read_queue                               ,
+	 size_reservation_station                      ,
+	 nb_inst_retire                                ,
+	 
+	 timing                                        ,
+	 get_custom_information                        ,
+	 			
+	 size_store_queue                              ,
+	 size_load_queue                               ,
+	 size_speculative_access_queue                 ,
+	 nb_port_check                                 ,
+	 speculative_load                              ,
+	 
+	 nb_bypass_memory                              ,
+	 size_write_queue                              ,
+	 size_execute_queue                            ,
+	 nb_bypass_write                               ,
+	 
+	 nb_gpr_bank                                   ,
+	 nb_gpr_port_read_by_bank                      ,
+	 nb_gpr_port_write_by_bank                     ,
+	 nb_spr_bank                                   ,
+	 nb_spr_port_read_by_bank                      ,
+	 nb_spr_port_write_by_bank                     ,
+	 nb_general_register                           ,
+	 nb_special_register                           ,
+	 nb_inst_insert_rob                            ,
+	 nb_inst_retire_rob                            ,
+	 
+	 execution_unit_to_write_unit_priority         ,
+	 execution_unit_to_write_unit_table_routing    ,
+	 execution_unit_to_write_unit_table_thread     ,
+	 
+	 read_unit_to_execution_unit_priority          ,
+	 read_unit_to_execution_unit_table_routing     ,
+	 read_unit_to_execution_unit_table_thread      );
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> : %s.\n"),name.c_str(), error.what ());
+      exit (EXIT_FAILURE);
+    }
+  catch (...)
+    {
+      err (_("<%s> : This test must generate a error.\n"),name.c_str());
+      exit (EXIT_FAILURE);
+    }
+
+  return (EXIT_SUCCESS);
+}
+
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/test.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/test.cpp	(revision 78)
@@ -0,0 +1,330 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h"
+#include "Common/include/Test.h"
+#include "Behavioural/include/Allocation.h"
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (128*NB_ITERATION)
+
+#define LABEL(str...)							\
+  {									\
+    msg (_("{%d} "),static_cast<uint32_t>(sc_simulation_time()));	\
+    msg (str);								\
+    msg (_("\n"));							\
+  } while(0)
+
+#define SC_START(cycle_offset)                                                       \
+  do									             \
+    {									             \
+      /*cout << "SC_START (begin)" << endl;*/				             \
+									             \
+      uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time());          \
+      if (cycle_offset != 0)						             \
+	{								             \
+	  cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \
+	}								             \
+									             \
+      if (cycle_current > CYCLE_MAX)					             \
+	{								             \
+	  TEST_KO("Maximal cycles Reached");				             \
+	}								             \
+									             \
+      sc_start(cycle_offset);						             \
+									             \
+      /*cout << "SC_START (end  )" << endl;*/				             \
+    } while(0)
+
+void test (string name,
+	   morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
+#endif
+
+  Execute_loop * _Execute_loop = new Execute_loop (name.c_str(),
+#ifdef STATISTICS
+					     _parameters_statistics,
+#endif
+					     _param);
+  
+#ifdef SYSTEMC
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+  
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_VAL                  ," in_EXECUTE_LOOP_IN_VAL                  ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_IN_ACK                  ,"out_EXECUTE_LOOP_IN_ACK                  ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_CONTEXT_ID           ," in_EXECUTE_LOOP_IN_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_FRONT_END_ID         ," in_EXECUTE_LOOP_IN_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ," in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ",Tcontext_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_PACKET_ID            ," in_EXECUTE_LOOP_IN_PACKET_ID            ",Tpacket_t         ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_OPERATION            ," in_EXECUTE_LOOP_IN_OPERATION            ",Toperation_t      ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_TYPE                 ," in_EXECUTE_LOOP_IN_TYPE                 ",Ttype_t           ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE," in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ," in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ," in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_IMMEDIAT             ," in_EXECUTE_LOOP_IN_IMMEDIAT             ",Tgeneral_data_t   ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_READ_RA              ," in_EXECUTE_LOOP_IN_READ_RA              ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RA           ," in_EXECUTE_LOOP_IN_NUM_REG_RA           ",Tgeneral_address_t,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_READ_RB              ," in_EXECUTE_LOOP_IN_READ_RB              ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RB           ," in_EXECUTE_LOOP_IN_NUM_REG_RB           ",Tgeneral_address_t,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_READ_RC              ," in_EXECUTE_LOOP_IN_READ_RC              ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RC           ," in_EXECUTE_LOOP_IN_NUM_REG_RC           ",Tspecial_address_t,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_WRITE_RD             ," in_EXECUTE_LOOP_IN_WRITE_RD             ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RD           ," in_EXECUTE_LOOP_IN_NUM_REG_RD           ",Tgeneral_address_t,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_WRITE_RE             ," in_EXECUTE_LOOP_IN_WRITE_RE             ",Tcontrol_t        ,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RE           ," in_EXECUTE_LOOP_IN_NUM_REG_RE           ",Tspecial_address_t,_param->_nb_read_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_VAL                 ,"out_EXECUTE_LOOP_OUT_VAL                 ",Tcontrol_t        ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_OUT_ACK                 ," in_EXECUTE_LOOP_OUT_ACK                 ",Tcontrol_t        ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_CONTEXT_ID          ,"out_EXECUTE_LOOP_OUT_CONTEXT_ID          ",Tcontext_t        ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_FRONT_END_ID        ,"out_EXECUTE_LOOP_OUT_FRONT_END_ID        ",Tcontext_t        ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID       ,"out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID       ",Tcontext_t        ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_PACKET_ID           ,"out_EXECUTE_LOOP_OUT_PACKET_ID           ",Tpacket_t         ,_param->_nb_write_unit);
+//ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_OPERATION           ,"out_EXECUTE_LOOP_OUT_OPERATION           ",Toperation_t      ,_param->_nb_write_unit);
+//ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_TYPE                ,"out_EXECUTE_LOOP_OUT_TYPE                ",Ttype_t           ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_FLAGS               ,"out_EXECUTE_LOOP_OUT_FLAGS               ",Tspecial_data_t   ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_EXCEPTION           ,"out_EXECUTE_LOOP_OUT_EXCEPTION           ",Texception_t      ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_NO_SEQUENCE         ,"out_EXECUTE_LOOP_OUT_NO_SEQUENCE         ",Tcontrol_t        ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_ADDRESS             ,"out_EXECUTE_LOOP_OUT_ADDRESS             ",Tgeneral_data_t   ,_param->_nb_write_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_VAL                       ,"out_DCACHE_REQ_VAL                       ",Tcontrol_t        ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL( in_DCACHE_REQ_ACK                       ," in_DCACHE_REQ_ACK                       ",Tcontrol_t        ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_CONTEXT_ID                ,"out_DCACHE_REQ_CONTEXT_ID                ",Tcontext_t        ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_PACKET_ID                 ,"out_DCACHE_REQ_PACKET_ID                 ",Tpacket_t         ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_ADDRESS                   ,"out_DCACHE_REQ_ADDRESS                   ",Tdcache_address_t ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_TYPE                      ,"out_DCACHE_REQ_TYPE                      ",Tdcache_type_t    ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_WDATA                     ,"out_DCACHE_REQ_WDATA                     ",Tdcache_data_t    ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_VAL                       ," in_DCACHE_RSP_VAL                       ",Tcontrol_t        ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL(out_DCACHE_RSP_ACK                       ,"out_DCACHE_RSP_ACK                       ",Tcontrol_t        ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_CONTEXT_ID                ," in_DCACHE_RSP_CONTEXT_ID                ",Tcontext_t        ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_PACKET_ID                 ," in_DCACHE_RSP_PACKET_ID                 ",Tpacket_t         ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_RDATA                     ," in_DCACHE_RSP_RDATA                     ",Tdcache_data_t    ,_param->_nb_load_store_unit);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_ERROR                     ," in_DCACHE_RSP_ERROR                     ",Tdcache_error_t   ,_param->_nb_load_store_unit); 
+  ALLOC2_SC_SIGNAL( in_INSERT_ROB_VAL                       ," in_INSERT_ROB_VAL                       ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL(out_INSERT_ROB_ACK                       ,"out_INSERT_ROB_ACK                       ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_ROB_RD_USE                    ," in_INSERT_ROB_RD_USE                    ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_ROB_RD_NUM_REG                ," in_INSERT_ROB_RD_NUM_REG                ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_ROB_RE_USE                    ," in_INSERT_ROB_RE_USE                    ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_ROB_RE_NUM_REG                ," in_INSERT_ROB_RE_NUM_REG                ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_VAL                       ," in_RETIRE_ROB_VAL                       ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_ROB_ACK                       ,"out_RETIRE_ROB_ACK                       ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_OLD_USE                ," in_RETIRE_ROB_RD_OLD_USE                ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); 
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_OLD_NUM_REG            ," in_RETIRE_ROB_RD_OLD_NUM_REG            ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_NEW_USE                ," in_RETIRE_ROB_RD_NEW_USE                ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_NEW_NUM_REG            ," in_RETIRE_ROB_RD_NEW_NUM_REG            ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_OLD_USE                ," in_RETIRE_ROB_RE_OLD_USE                ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); 
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_OLD_NUM_REG            ," in_RETIRE_ROB_RE_OLD_NUM_REG            ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_NEW_USE                ," in_RETIRE_ROB_RE_NEW_USE                ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_NEW_NUM_REG            ," in_RETIRE_ROB_RE_NEW_NUM_REG            ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Execute_loop.\n"),name.c_str());
+
+  (*(_Execute_loop->in_CLOCK))        (*(in_CLOCK));
+  (*(_Execute_loop->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_VAL                  ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_IN_ACK                  ,_param->_nb_read_unit);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_CONTEXT_ID           ,_param->_nb_read_unit);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_FRONT_END_ID         ,_param->_nb_read_unit);
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ,_param->_nb_read_unit);
+  if (_param->_have_port_packet_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_PACKET_ID            ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_OPERATION            ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_TYPE                 ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_IMMEDIAT             ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_READ_RA              ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RA           ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_READ_RB              ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RB           ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_READ_RC              ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RC           ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_WRITE_RD             ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RD           ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_WRITE_RE             ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RE           ,_param->_nb_read_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_VAL                 ,_param->_nb_write_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_OUT_ACK                 ,_param->_nb_write_unit);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_CONTEXT_ID          ,_param->_nb_write_unit);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_FRONT_END_ID        ,_param->_nb_write_unit);
+  if (_param->_have_port_ooo_engine_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID       ,_param->_nb_write_unit);
+  if (_param->_have_port_packet_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_PACKET_ID           ,_param->_nb_write_unit);
+//INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_OPERATION           ,_param->_nb_write_unit);
+//INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_TYPE                ,_param->_nb_write_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_FLAGS               ,_param->_nb_write_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_EXCEPTION           ,_param->_nb_write_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_NO_SEQUENCE         ,_param->_nb_write_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_ADDRESS             ,_param->_nb_write_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_VAL                       ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_REQ_ACK                       ,_param->_nb_load_store_unit);
+  if (_param->_have_port_dcache_context_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_CONTEXT_ID                ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_PACKET_ID                 ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_ADDRESS                   ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_TYPE                      ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_WDATA                     ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_VAL                       ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_RSP_ACK                       ,_param->_nb_load_store_unit);
+  if (_param->_have_port_dcache_context_id)
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_CONTEXT_ID                ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_PACKET_ID                 ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_RDATA                     ,_param->_nb_load_store_unit);
+  INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_ERROR                     ,_param->_nb_load_store_unit); 
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_VAL                       ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop,out_INSERT_ROB_ACK                       ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RD_USE                    ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RD_NUM_REG                ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RE_USE                    ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RE_NUM_REG                ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_VAL                       ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop,out_RETIRE_ROB_ACK                       ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_OLD_USE                ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); 
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_OLD_NUM_REG            ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_NEW_USE                ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_NEW_NUM_REG            ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_OLD_USE                ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); 
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_OLD_NUM_REG            ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_NEW_USE                ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_NEW_NUM_REG            ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  delete []  in_EXECUTE_LOOP_IN_VAL                  ;
+  delete [] out_EXECUTE_LOOP_IN_ACK                  ;
+  delete []  in_EXECUTE_LOOP_IN_CONTEXT_ID           ;
+  delete []  in_EXECUTE_LOOP_IN_FRONT_END_ID         ;
+  delete []  in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ;
+  delete []  in_EXECUTE_LOOP_IN_PACKET_ID            ;
+  delete []  in_EXECUTE_LOOP_IN_OPERATION            ;
+  delete []  in_EXECUTE_LOOP_IN_TYPE                 ;
+  delete []  in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE;
+  delete []  in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ;
+  delete []  in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ;
+  delete []  in_EXECUTE_LOOP_IN_IMMEDIAT             ;
+  delete []  in_EXECUTE_LOOP_IN_READ_RA              ;
+  delete []  in_EXECUTE_LOOP_IN_NUM_REG_RA           ;
+  delete []  in_EXECUTE_LOOP_IN_READ_RB              ;
+  delete []  in_EXECUTE_LOOP_IN_NUM_REG_RB           ;
+  delete []  in_EXECUTE_LOOP_IN_READ_RC              ;
+  delete []  in_EXECUTE_LOOP_IN_NUM_REG_RC           ;
+  delete []  in_EXECUTE_LOOP_IN_WRITE_RD             ;
+  delete []  in_EXECUTE_LOOP_IN_NUM_REG_RD           ;
+  delete []  in_EXECUTE_LOOP_IN_WRITE_RE             ;
+  delete []  in_EXECUTE_LOOP_IN_NUM_REG_RE           ;
+  delete [] out_EXECUTE_LOOP_OUT_VAL                 ;
+  delete []  in_EXECUTE_LOOP_OUT_ACK                 ;
+  delete [] out_EXECUTE_LOOP_OUT_CONTEXT_ID          ;
+  delete [] out_EXECUTE_LOOP_OUT_FRONT_END_ID        ;
+  delete [] out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID       ;
+  delete [] out_EXECUTE_LOOP_OUT_PACKET_ID           ;
+//delete [] out_EXECUTE_LOOP_OUT_OPERATION           ;
+//delete [] out_EXECUTE_LOOP_OUT_TYPE                ;
+  delete [] out_EXECUTE_LOOP_OUT_FLAGS               ;
+  delete [] out_EXECUTE_LOOP_OUT_EXCEPTION           ;
+  delete [] out_EXECUTE_LOOP_OUT_NO_SEQUENCE         ;
+  delete [] out_EXECUTE_LOOP_OUT_ADDRESS             ;
+  delete [] out_DCACHE_REQ_VAL                       ;
+  delete []  in_DCACHE_REQ_ACK                       ;
+  delete [] out_DCACHE_REQ_CONTEXT_ID                ;
+  delete [] out_DCACHE_REQ_PACKET_ID                 ;
+  delete [] out_DCACHE_REQ_ADDRESS                   ;
+  delete [] out_DCACHE_REQ_TYPE                      ;
+  delete [] out_DCACHE_REQ_WDATA                     ;
+  delete []  in_DCACHE_RSP_VAL                       ;
+  delete [] out_DCACHE_RSP_ACK                       ;
+  delete []  in_DCACHE_RSP_CONTEXT_ID                ;
+  delete []  in_DCACHE_RSP_PACKET_ID                 ;
+  delete []  in_DCACHE_RSP_RDATA                     ;
+  delete []  in_DCACHE_RSP_ERROR                     ;
+  delete []  in_INSERT_ROB_VAL                       ;
+  delete [] out_INSERT_ROB_ACK                       ;
+  delete []  in_INSERT_ROB_RD_USE                    ;
+  delete []  in_INSERT_ROB_RD_NUM_REG                ;
+  delete []  in_INSERT_ROB_RE_USE                    ;
+  delete []  in_INSERT_ROB_RE_NUM_REG                ;
+  delete []  in_RETIRE_ROB_VAL                       ;
+  delete [] out_RETIRE_ROB_ACK                       ;
+  delete []  in_RETIRE_ROB_RD_OLD_USE                ; 
+  delete []  in_RETIRE_ROB_RD_OLD_NUM_REG            ;
+  delete []  in_RETIRE_ROB_RD_NEW_USE                ;
+  delete []  in_RETIRE_ROB_RD_NEW_NUM_REG            ;
+  delete []  in_RETIRE_ROB_RE_OLD_USE                ; 
+  delete []  in_RETIRE_ROB_RE_OLD_NUM_REG            ;
+  delete []  in_RETIRE_ROB_RE_NEW_USE                ;
+  delete []  in_RETIRE_ROB_RE_NEW_NUM_REG            ;
+
+#endif
+
+  delete _Execute_loop;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Execute_loop.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Execute_loop.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Execute_loop.tex	(revision 78)
@@ -0,0 +1,38 @@
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Makefile	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Makefile	(revision 78)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/sty/header.sty	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/sty/header.sty	(revision 78)
@@ -0,0 +1,12 @@
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Execute_loop}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/01_introduction.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/01_introduction.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/02_features.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/02_features.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/03_description.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/03_description.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/04_pinout.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/04_pinout.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/05_parameters.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/05_parameters.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/06_performance.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/06_performance.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/07_details.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/07_details.tex	(revision 78)
@@ -0,0 +1,1 @@
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/08_history.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/08_history.tex	(revision 78)
@@ -0,0 +1,10 @@
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/root.tex	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/root.tex	(revision 78)
@@ -0,0 +1,8 @@
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h	(revision 78)
@@ -0,0 +1,216 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_Execute_loop_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_Execute_loop_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include <iostream>
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+#include "Behavioural/include/Identification.h"
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h"
+
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+  class Execute_loop 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // Interface
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_VAL                  ;//[nb_read_unit]
+  public    : SC_OUT(Tcontrol_t        )   ** out_EXECUTE_LOOP_IN_ACK                  ;//[nb_read_unit]
+  public    : SC_IN (Tcontext_t        )   **  in_EXECUTE_LOOP_IN_CONTEXT_ID           ;//[nb_read_unit]
+  public    : SC_IN (Tcontext_t        )   **  in_EXECUTE_LOOP_IN_FRONT_END_ID         ;//[nb_read_unit]
+  public    : SC_IN (Tcontext_t        )   **  in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ;//[nb_read_unit]
+  public    : SC_IN (Tpacket_t         )   **  in_EXECUTE_LOOP_IN_PACKET_ID            ;//[nb_read_unit]
+  public    : SC_IN (Toperation_t      )   **  in_EXECUTE_LOOP_IN_OPERATION            ;//[nb_read_unit]
+  public    : SC_IN (Ttype_t           )   **  in_EXECUTE_LOOP_IN_TYPE                 ;//[nb_read_unit]
+  public    : SC_IN (Tlsq_ptr_t        )   **  in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE;//[nb_read_unit]
+  public    : SC_IN (Tlsq_ptr_t        )   **  in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ;//[nb_read_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ;//[nb_read_unit]
+  public    : SC_IN (Tgeneral_data_t   )   **  in_EXECUTE_LOOP_IN_IMMEDIAT             ;//[nb_read_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_READ_RA              ;//[nb_read_unit]
+  public    : SC_IN (Tgeneral_address_t)   **  in_EXECUTE_LOOP_IN_NUM_REG_RA           ;//[nb_read_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_READ_RB              ;//[nb_read_unit]
+  public    : SC_IN (Tgeneral_address_t)   **  in_EXECUTE_LOOP_IN_NUM_REG_RB           ;//[nb_read_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_READ_RC              ;//[nb_read_unit]
+  public    : SC_IN (Tspecial_address_t)   **  in_EXECUTE_LOOP_IN_NUM_REG_RC           ;//[nb_read_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_WRITE_RD             ;//[nb_read_unit]
+  public    : SC_IN (Tgeneral_address_t)   **  in_EXECUTE_LOOP_IN_NUM_REG_RD           ;//[nb_read_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_IN_WRITE_RE             ;//[nb_read_unit]
+  public    : SC_IN (Tspecial_address_t)   **  in_EXECUTE_LOOP_IN_NUM_REG_RE           ;//[nb_read_unit]
+
+    // ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_EXECUTE_LOOP_OUT_VAL                 ;//[nb_write_unit]
+  public    : SC_IN (Tcontrol_t        )   **  in_EXECUTE_LOOP_OUT_ACK                 ;//[nb_write_unit]
+  public    : SC_OUT(Tcontext_t        )   ** out_EXECUTE_LOOP_OUT_CONTEXT_ID          ;//[nb_write_unit]
+  public    : SC_OUT(Tcontext_t        )   ** out_EXECUTE_LOOP_OUT_FRONT_END_ID        ;//[nb_write_unit]
+  public    : SC_OUT(Tcontext_t        )   ** out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID       ;//[nb_write_unit]
+  public    : SC_OUT(Tpacket_t         )   ** out_EXECUTE_LOOP_OUT_PACKET_ID           ;//[nb_write_unit]
+//public    : SC_OUT(Toperation_t      )   ** out_EXECUTE_LOOP_OUT_OPERATION           ;//[nb_write_unit]
+//public    : SC_OUT(Ttype_t           )   ** out_EXECUTE_LOOP_OUT_TYPE                ;//[nb_write_unit]
+  public    : SC_OUT(Tspecial_data_t   )   ** out_EXECUTE_LOOP_OUT_FLAGS               ;//[nb_write_unit]
+  public    : SC_OUT(Texception_t      )   ** out_EXECUTE_LOOP_OUT_EXCEPTION           ;//[nb_write_unit]
+  public    : SC_OUT(Tcontrol_t        )   ** out_EXECUTE_LOOP_OUT_NO_SEQUENCE         ;//[nb_write_unit]
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_EXECUTE_LOOP_OUT_ADDRESS             ;//[nb_write_unit]
+
+    // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_DCACHE_REQ_VAL                       ;//[nb_load_store_queue]
+  public    : SC_IN (Tcontrol_t        )   **  in_DCACHE_REQ_ACK                       ;//[nb_load_store_queue]
+  public    : SC_OUT(Tcontext_t        )   ** out_DCACHE_REQ_CONTEXT_ID                ;//[nb_load_store_queue]
+  public    : SC_OUT(Tpacket_t         )   ** out_DCACHE_REQ_PACKET_ID                 ;//[nb_load_store_queue]
+  public    : SC_OUT(Tdcache_address_t )   ** out_DCACHE_REQ_ADDRESS                   ;//[nb_load_store_queue]
+  public    : SC_OUT(Tdcache_type_t    )   ** out_DCACHE_REQ_TYPE                      ;//[nb_load_store_queue]
+  public    : SC_OUT(Tdcache_data_t    )   ** out_DCACHE_REQ_WDATA                     ;//[nb_load_store_queue]
+
+    // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )   **  in_DCACHE_RSP_VAL                       ;//[nb_load_store_queue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_DCACHE_RSP_ACK                       ;//[nb_load_store_queue]
+  public    : SC_IN (Tcontext_t        )   **  in_DCACHE_RSP_CONTEXT_ID                ;//[nb_load_store_queue]
+  public    : SC_IN (Tpacket_t         )   **  in_DCACHE_RSP_PACKET_ID                 ;//[nb_load_store_queue]
+  public    : SC_IN (Tdcache_data_t    )   **  in_DCACHE_RSP_RDATA                     ;//[nb_load_store_queue]
+  public    : SC_IN (Tdcache_error_t   )   **  in_DCACHE_RSP_ERROR                     ;//[nb_load_store_queue] 
+    
+    // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_INSERT_ROB_VAL                       ;//[nb_ooo_engine][nb_inst_insert_rob]
+  public    : SC_OUT(Tcontrol_t        )  *** out_INSERT_ROB_ACK                       ;//[nb_ooo_engine][nb_inst_insert_rob]
+  public    : SC_IN (Tcontrol_t        )  ***  in_INSERT_ROB_RD_USE                    ;//[nb_ooo_engine][nb_inst_insert_rob]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_INSERT_ROB_RD_NUM_REG                ;//[nb_ooo_engine][nb_inst_insert_rob]
+  public    : SC_IN (Tcontrol_t        )  ***  in_INSERT_ROB_RE_USE                    ;//[nb_ooo_engine][nb_inst_insert_rob]
+  public    : SC_IN (Tspecial_address_t)  ***  in_INSERT_ROB_RE_NUM_REG                ;//[nb_ooo_engine][nb_inst_insert_rob]
+
+    // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_ROB_VAL                       ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_OUT(Tcontrol_t        )  *** out_RETIRE_ROB_ACK                       ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_ROB_RD_OLD_USE                ;//[nb_ooo_engine][nb_inst_retire_rob] 
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RETIRE_ROB_RD_OLD_NUM_REG            ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_ROB_RD_NEW_USE                ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RETIRE_ROB_RD_NEW_NUM_REG            ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_ROB_RE_OLD_USE                ;//[nb_ooo_engine][nb_inst_retire_rob] 
+  public    : SC_IN (Tspecial_address_t)  ***  in_RETIRE_ROB_RE_OLD_NUM_REG            ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_ROB_RE_NEW_USE                ;//[nb_ooo_engine][nb_inst_retire_rob]
+  public    : SC_IN (Tspecial_address_t)  ***  in_RETIRE_ROB_RE_NEW_NUM_REG            ;//[nb_ooo_engine][nb_inst_retire_rob]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::                        Read_unit                    ** _component_read_unit                   ;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit             ** _component_functionnal_unit            ;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit:: Load_store_unit              ** _component_load_store_unit             ;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::                      Write_unit                   ** _component_write_unit                  ;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::              Read_unit_to_Execution_unit   * _component_read_unit_to_execution_unit ;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::             Execution_unit_to_Write_unit  * _component_execution_unit_to_write_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::                                     Register_unit                 * _component_register_unit               ;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Execute_loop);
+#endif
+  public  :          Execute_loop              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage=USE_ALL
+   );
+  public  :          ~Execute_loop             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  public  : void        transition                (void);
+# endif					       
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+};//end namespace execute_loop
+};//end namespace multi_execute_loop
+};//end namespace core
+
+};//end namespace behavioural
+};//end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h	(revision 78)
@@ -0,0 +1,202 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_Parameters_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Common/include/Debug.h"
+#include "Behavioural/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h"
+#include <set>
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+    // unit occurence
+  public : uint32_t              _nb_read_unit                                  ;
+  public : uint32_t              _nb_functionnal_unit                           ;
+  public : uint32_t              _nb_load_store_unit                            ;
+  public : uint32_t              _nb_write_unit                                 ;
+    // generic parameters					                      
+  public : uint32_t              _nb_context                                    ;
+  public : uint32_t              _nb_front_end                                  ;
+  public : uint32_t              _nb_ooo_engine                                 ;
+  public : uint32_t              _nb_packet                                     ;
+  public : uint32_t              _size_general_data                             ;
+  public : uint32_t              _size_special_data                             ;
+    // specific parameters					                      
+    //  * read_unit						                      
+  public : uint32_t            * _size_read_queue                               ; //[nb_read_unit]
+  public : uint32_t            * _size_reservation_station                      ; //[nb_read_unit]
+  public : uint32_t            * _nb_inst_retire                                ; //[nb_read_unit]
+  public : uint32_t            * _read_unit_nb_register_write                   ; //[nb_read_unit]
+  public : uint32_t            * _read_unit_nb_bypass_write                     ; //[nb_read_unit]
+  public : uint32_t            * _read_unit_nb_bypass_memory                    ; //[nb_read_unit]
+  public : bool               ** _link_read_unit_with_load_store_unit           ; //[nb_read_unit][nb_load_store_unit]
+  public : bool               ** _link_read_unit_with_write_unit                ; //[nb_read_unit][nb_write_unit]
+  public : bool               ** _link_read_unit_with_thread                    ; //[nb_read_unit][nb_thread]
+
+    //  * functionnal_unit					                      
+  public : execute_timing_t  *** _timing                                        ; //[nb_execute_unit][nb_type][nb_operation]
+  public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t);
+    //  * load_store_unit    
+  public : uint32_t            * _size_store_queue                              ; //[nb_load_store_unit]
+  public : uint32_t            * _size_load_queue                               ; //[nb_load_store_unit]
+  public : uint32_t            * _size_speculative_access_queue                 ; //[nb_load_store_unit]
+  public : uint32_t            * _nb_port_check                                 ; //[nb_load_store_unit]
+  public : Tspeculative_load_t * _speculative_load                              ; //[nb_load_store_unit]
+  public : uint32_t            * _nb_bypass_memory                              ; //[nb_load_store_unit]
+    //  * write_unit						                      
+  public : uint32_t            * _size_write_queue                              ; //[nb_write_unit]
+  public : uint32_t            * _size_execute_queue                            ; //[nb_write_unit]
+  public : uint32_t            * _nb_bypass_write                               ; //[nb_write_unit]
+    //  * register_unit						                      
+  public : uint32_t              _nb_gpr_read                                   ;
+  public : uint32_t              _nb_gpr_write                                  ;
+  public : uint32_t              _nb_gpr_bank                                   ;
+  public : uint32_t              _nb_gpr_port_read_by_bank                      ;
+  public : uint32_t              _nb_gpr_port_write_by_bank                     ;
+  public : uint32_t              _nb_spr_read                                   ;
+  public : uint32_t              _nb_spr_write                                  ;
+  public : uint32_t              _nb_spr_bank                                   ;
+  public : uint32_t              _nb_spr_port_read_by_bank                      ;
+  public : uint32_t              _nb_spr_port_write_by_bank                     ;
+  public : uint32_t            * _nb_general_register                           ; //[nb_ooo_engine]
+  public : uint32_t            * _nb_special_register                           ; //[nb_ooo_engine]
+  public : uint32_t            * _nb_inst_insert_rob                            ; //[nb_ooo_engine]
+  public : uint32_t            * _nb_inst_retire_rob                            ; //[nb_ooo_engine]
+    //  * network
+  public : Tpriority_t           _execution_unit_to_write_unit_priority         ;
+  public : bool               ** _execution_unit_to_write_unit_table_routing    ; //[nb_execute_unit][nb_write_unit]
+  public : bool               ** _execution_unit_to_write_unit_table_thread     ; //[nb_write_unit][nb_thread]
+
+  public : Tpriority_t           _read_unit_to_execution_unit_priority          ;
+  public : bool               ** _read_unit_to_execution_unit_table_routing     ; //[nb_read_unit][nb_execute_unit]
+  public : bool               ** _read_unit_to_execution_unit_table_execute_type; //[nb_execute_unit][nb_type]
+  public : bool               ** _read_unit_to_execution_unit_table_thread      ; //[nb_execute_unit][nb_thread]
+
+  public : bool                * _is_load_store_unit                            ; //[nb_execute_unit]
+  public : uint32_t            * _translate_num_execute_unit                    ; //[nb_execute_unit]
+
+  public : uint32_t              _nb_execute_unit              ;
+
+  public : uint32_t              _size_context_id              ;
+  public : uint32_t              _size_front_end_id            ;
+  public : uint32_t              _size_ooo_engine_id           ;
+  public : uint32_t              _size_packet_id               ;
+  public : bool                  _have_port_context_id         ;
+  public : bool                  _have_port_front_end_id       ;
+  public : bool                  _have_port_ooo_engine_id      ;
+  public : bool                  _have_port_packet_id          ;
+  public : bool                  _have_port_load_queue_ptr     ;
+  public : bool                  _have_port_dcache_context_id  ;
+    
+  public : uint32_t              _max_nb_general_register;
+  public : uint32_t              _max_nb_special_register;
+  public : uint32_t              _max_size_store_queue   ;
+  public : uint32_t              _max_size_load_queue    ;
+
+  public : uint32_t              _size_general_register        ;
+  public : uint32_t              _size_special_register        ;
+
+  public : uint32_t              _max_size_dcache_context_id;
+  public : uint32_t              _max_size_dcache_packet_id ;
+
+  public : std::set<uint32_t>  * _set_read_unit_source_register_write ; //[nb_read_unit]
+  public : std::set<uint32_t>  * _set_read_unit_source_bypass_write   ; //[nb_read_unit]
+  public : std::set<uint32_t>  * _set_read_unit_source_bypass_memory  ; //[nb_read_unit]
+
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::                        Parameters ** _param_read_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Parameters ** _param_functionnal_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit:: Parameters ** _param_load_store_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::                      Parameters ** _param_write_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::              Parameters  * _param_read_unit_to_execution_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::             Parameters  * _param_execution_unit_to_write_unit;
+  public : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::                                     Parameters  * _param_register_unit;
+    
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t              nb_read_unit                                  ,
+			uint32_t              nb_functionnal_unit                           ,
+			uint32_t              nb_load_store_unit                            ,
+			uint32_t              nb_write_unit                                 ,
+			
+			uint32_t              nb_context                                    ,
+			uint32_t              nb_front_end                                  ,
+			uint32_t              nb_ooo_engine                                 ,
+			uint32_t              nb_packet                                     ,
+			uint32_t              size_general_data                             ,
+			uint32_t              size_special_data                             ,
+			
+			uint32_t            * size_read_queue                               ,
+			uint32_t            * size_reservation_station                      ,
+			uint32_t            * nb_inst_retire                                ,
+			
+			execute_timing_t  *** timing                                        ,
+			morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t),
+			
+			uint32_t            * size_store_queue                              ,
+			uint32_t            * size_load_queue                               ,
+			uint32_t            * size_speculative_access_queue                 ,
+			uint32_t            * nb_port_check                                 ,
+			Tspeculative_load_t * speculative_load                              ,
+			uint32_t            * nb_bypass_memory                              ,
+			
+			uint32_t            * size_write_queue                              ,
+			uint32_t            * size_execute_queue                            ,
+			uint32_t            * nb_bypass_write                               ,
+			
+			uint32_t              nb_gpr_bank                                   ,
+			uint32_t              nb_gpr_port_read_by_bank                      ,
+			uint32_t              nb_gpr_port_write_by_bank                     ,
+			uint32_t              nb_spr_bank                                   ,
+			uint32_t              nb_spr_port_read_by_bank                      ,
+			uint32_t              nb_spr_port_write_by_bank                     ,
+			uint32_t            * nb_general_register                           ,
+			uint32_t            * nb_special_register                           ,
+			uint32_t            * nb_inst_insert_rob                            ,
+			uint32_t            * nb_inst_retire_rob                            ,
+			
+			Tpriority_t           execution_unit_to_write_unit_priority         ,
+			bool               ** execution_unit_to_write_unit_table_routing    ,
+			bool               ** execution_unit_to_write_unit_table_thread     ,
+			
+			Tpriority_t           read_unit_to_execution_unit_priority          ,
+			bool               ** read_unit_to_execution_unit_table_routing     ,
+			bool               ** read_unit_to_execution_unit_table_thread      
+			);
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string   print      (uint32_t depth);
+  public : friend std::ostream& operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters & x);
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h	(revision 78)
@@ -0,0 +1,30 @@
+#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_Types_h
+#define morpheo_behavioural_core_multi_execute_loop_execute_loop_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+  typedef morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_timing_t execute_timing_t;
+  typedef morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Tspeculative_load_t Tspeculative_load_t;
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp	(revision 78)
@@ -0,0 +1,109 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::Execute_loop"
+  Execute_loop::Execute_loop 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    log_printf(INFO,Execute_loop,FUNCTION,"Allocation");
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (_usage & USE_STATISTICS)
+      {	
+	log_printf(INFO,Execute_loop,FUNCTION,"Allocation of statistics");
+
+	statistics_declaration(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (_usage & USE_VHDL)
+      {
+	// generate the vhdl
+	log_printf(INFO,Execute_loop,FUNCTION,"Generate the vhdl");
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (_usage & USE_SYSTEMC)
+      {
+	log_printf(INFO,Execute_loop,FUNCTION,"Method - transition");
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::~Execute_loop"
+  Execute_loop::~Execute_loop (void)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+#ifdef STATISTICS
+    if (_usage & USE_STATISTICS)
+      {
+	log_printf(INFO,Execute_loop,FUNCTION,"Generate Statistics file");
+	
+	delete _stat;
+      }
+#endif
+
+    log_printf(INFO,Execute_loop,FUNCTION,"Deallocation");
+    deallocation ();
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp	(revision 78)
@@ -0,0 +1,1627 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::allocation"
+  void Execute_loop::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Execute_loop"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 "Generalist interface"
+#endif
+							 );
+
+     in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+     in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+
+    // ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+     {
+       ALLOC1_INTERFACE("execute_loop_in", IN, EAST, "Operation's Input", _param->_nb_read_unit);
+
+       ALLOC1_VALACK_IN ( in_EXECUTE_LOOP_IN_VAL,VAL);
+       ALLOC1_VALACK_OUT(out_EXECUTE_LOOP_IN_ACK,ACK);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ,"ooo_engine_id"        ,Tcontext_t        ,_param->_size_ooo_engine_id);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_packet_id);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type);         
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_max_size_store_queue);
+       if (_param->_have_port_load_queue_ptr)
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_max_size_load_queue);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1);
+       ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
+     }
+    // ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+     {
+       ALLOC1_INTERFACE("execute_loop_out",OUT, EAST, "Operation's Output", _param->_nb_write_unit);
+
+       ALLOC1_VALACK_OUT(out_EXECUTE_LOOP_OUT_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_EXECUTE_LOOP_OUT_ACK,ACK);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t     ,_param->_size_front_end_id);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t     ,_param->_size_ooo_engine_id);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_PACKET_ID    ,"packet_id"    ,Tpacket_t      ,_param->_size_packet_id);
+//     ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OPERATION    ,"operation"    ,Toperation_t   ,_param->_size_operation);
+//     ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_TYPE         ,"type"         ,Ttype_t        ,_param->_size_type);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FLAGS        ,"flags"        ,Tspecial_data_t,_param->_size_special_data);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_EXCEPTION    ,"exception"    ,Texception_t   ,_param->_size_exception);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t     ,1);
+       ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_ADDRESS      ,"address"      ,Tgeneral_data_t,_param->_size_general_data);
+     }
+    // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+     {
+       ALLOC1_INTERFACE("dcache_req",OUT, NORTH, "Data cache port : request", _param->_nb_load_store_unit);
+       
+       ALLOC1_VALACK_OUT(out_DCACHE_REQ_VAL,VAL);
+       ALLOC1_VALACK_IN ( in_DCACHE_REQ_ACK,ACK);
+       ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_CONTEXT_ID,"context_id",Tcontext_t       ,_param->_max_size_dcache_context_id);
+       ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_PACKET_ID ,"packet_id" ,Tpacket_t        ,_param->_max_size_dcache_packet_id );
+       ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_ADDRESS   ,"address"   ,Tdcache_address_t,_param->_size_general_data);
+       ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_TYPE      ,"type"      ,Tdcache_type_t   ,_param->_size_dcache_type);
+       ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_WDATA     ,"wdata"     ,Tdcache_data_t   ,_param->_size_general_data);
+     }
+    // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+     {
+       ALLOC1_INTERFACE("dcache_rsp",IN, NORTH, "Data cache port : respons", _param->_nb_load_store_unit);
+
+       ALLOC1_VALACK_IN ( in_DCACHE_RSP_VAL,VAL);
+       ALLOC1_VALACK_OUT(out_DCACHE_RSP_ACK,ACK);
+       ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_CONTEXT_ID,"context_id",Tcontext_t     ,_param->_max_size_dcache_context_id);
+       ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_PACKET_ID ,"packet_id" ,Tpacket_t      ,_param->_max_size_dcache_packet_id);
+       ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_RDATA     ,"rdata"     ,Tdcache_data_t ,_param->_size_general_data);
+       ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_ERROR     ,"error"     ,Tdcache_error_t,_param->_size_dcache_error);
+     }
+    // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+     {
+       ALLOC2_INTERFACE("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_interface_it1]);
+       
+       _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+       _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+
+       _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE    ,"rd_use"    ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE    ,"re_use"    ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
+     }
+    // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+     {
+       ALLOC2_INTERFACE("retire_rob",IN, EAST, "Rename's stage : retire a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_interface_it1]);
+       
+       _ALLOC2_VALACK_IN ( in_RETIRE_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_VALACK_OUT(out_RETIRE_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_OLD_USE    ,"rd_old_use"    ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_OLD_NUM_REG,"rd_old_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_NEW_USE    ,"rd_new_use"    ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_NEW_NUM_REG,"rd_new_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_OLD_USE    ,"re_old_use"    ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_OLD_NUM_REG,"re_old_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_NEW_USE    ,"re_new_use"    ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+       _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_NEW_NUM_REG,"re_new_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
+     }
+
+     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+     std::string name;
+	
+     _component_read_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Read_unit * [_param->_nb_read_unit];
+     for (uint32_t i=0; i<_param->_nb_read_unit; i++)
+       {
+	 name = _name+"_read_unit_"+toString(i);
+	 std::cout << "Create   : " << name << std::endl;
+
+	 _component_read_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Read_unit
+	   (name.c_str()
+#ifdef STATISTICS
+	    ,param_statistics
+#endif
+	    ,_param->_param_read_unit[i]);
+
+	 _component->set_component (_component_read_unit [i]->_component
+#ifdef POSITION
+				    , 50, 50, 10, 10
+#endif
+				    );
+       }
+
+     _component_functionnal_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit * [_param->_nb_functionnal_unit];
+     for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++)
+       {
+	 name = _name+"_functionnal_unit_"+toString(i);
+	 std::cout << "Create   : " << name << std::endl;
+
+	 _component_functionnal_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit
+	   (name.c_str()
+#ifdef STATISTICS
+	    ,param_statistics
+#endif
+	    ,_param->_param_functionnal_unit[i]);
+
+	 _component->set_component (_component_functionnal_unit [i]->_component
+#ifdef POSITION
+				    , 50, 50, 10, 10
+#endif
+				    );
+       }
+
+     _component_load_store_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit * [_param->_nb_load_store_unit];
+     for (uint32_t i=0; i<_param->_nb_load_store_unit; i++)
+       {
+	 name = _name+"_load_store_unit_"+toString(i);
+	 std::cout << "Create   : " << name << std::endl;
+
+	 _component_load_store_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit
+	   (name.c_str()
+#ifdef STATISTICS
+	    ,param_statistics
+#endif
+	    ,_param->_param_load_store_unit[i]);
+
+	 _component->set_component (_component_load_store_unit [i]->_component
+#ifdef POSITION
+				    , 50, 50, 10, 10
+#endif
+				    );
+       }
+
+     _component_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Write_unit * [_param->_nb_write_unit];
+     for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+       {
+	 name = _name+"_write_unit_"+toString(i);
+	 std::cout << "Create   : " << name << std::endl;
+
+	 _component_write_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Write_unit
+	   (name.c_str()
+#ifdef STATISTICS
+	    ,param_statistics
+#endif
+	    ,_param->_param_write_unit[i]);
+
+	 _component->set_component (_component_write_unit [i]->_component
+#ifdef POSITION
+				    , 50, 50, 10, 10
+#endif
+				    );
+       }
+     
+     {
+       name = _name+"_read_unit_to_execution_unit";
+       std::cout << "Create   : " << name << std::endl;
+       
+       _component_read_unit_to_execution_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Read_unit_to_Execution_unit
+	 (name.c_str()
+#ifdef STATISTICS
+	  ,param_statistics
+#endif
+	  ,_param->_param_read_unit_to_execution_unit);
+       
+       _component->set_component (_component_read_unit_to_execution_unit->_component
+#ifdef POSITION
+				  , 50, 50, 10, 10
+#endif
+				  );
+     }
+
+     {
+       name = _name+"_execution_unit_to_write_unit";
+       std::cout << "Create   : " << name << std::endl;
+       
+       _component_execution_unit_to_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Execution_unit_to_Write_unit
+	 (name.c_str()
+#ifdef STATISTICS
+	  ,param_statistics
+#endif
+	  ,_param->_param_execution_unit_to_write_unit);
+       
+       _component->set_component (_component_execution_unit_to_write_unit->_component
+#ifdef POSITION
+				  , 50, 50, 10, 10
+#endif
+				  );
+     }
+
+     {
+       name = _name+"_register_unit";
+       std::cout << "Create   : " << name << std::endl;
+       
+       _component_register_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Register_unit
+	 (name.c_str()
+#ifdef STATISTICS
+	  ,param_statistics
+#endif
+	  ,_param->_param_register_unit);
+       
+       _component->set_component (_component_register_unit->_component
+#ifdef POSITION
+				  , 50, 50, 10, 10
+#endif
+				  );
+     }
+
+     // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+     std::string src,dest;
+
+     // ===================================================================
+     // =====[ READ_UNIT ]=================================================
+     // ===================================================================
+     {
+       uint32_t it_read_unit_out = 0;
+       
+       for (uint32_t i=0; i<_param->_nb_read_unit; i++)
+	 {
+	   src = _name+"_read_unit_"+toString(i);
+	   std::cout << "Instance : " << src << std::endl;
+	   
+	   {
+	     dest = _name;
+#ifdef POSITION
+	     _component->interface_map (src ,"",
+					dest,"");
+#endif
+	     PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	     PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+	   }
+	   
+	   // ~~~~~[ Interface "read_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   {
+	     dest = _name;
+#ifdef POSITION
+	     _component->interface_map (src ,"read_unit_in",
+					dest,"execute_loop_in_"+toString(i));
+#endif
+
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_VAL"                  ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL"                  );
+	     PORT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK"                  ,dest ,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK"                  );
+	     if (_param->_have_port_context_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_CONTEXT_ID"           ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CONTEXT_ID"           );
+	     if (_param->_have_port_front_end_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_FRONT_END_ID"         ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_FRONT_END_ID"         );
+	     if (_param->_have_port_ooo_engine_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_OOO_ENGINE_ID"        ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OOO_ENGINE_ID"        );
+	     if (_param->_have_port_packet_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_PACKET_ID"            ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_PACKET_ID"            );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_OPERATION"            ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OPERATION"            );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_TYPE"                 ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_TYPE"                 );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE",dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+	     if (_param->_have_port_load_queue_ptr)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_HAS_IMMEDIAT"         ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_HAS_IMMEDIAT"         );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_IMMEDIAT"             ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_IMMEDIAT"             );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RA"              ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RA"              );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RA"           ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RA"           );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RB"              ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RB"              );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RB"           ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RB"           );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RC"              ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RC"              );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RC"           ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RC"           );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_WRITE_RD"             ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RD"             );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RD"           ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RD"           );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_WRITE_RE"             ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RE"             );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RE"           ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RE"           );
+	   }
+
+	   // ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   for (uint32_t j=0; j < _param->_nb_inst_retire[i]; j++)
+	     {
+	       dest = _name+"_read_unit_to_execution_unit";
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"read_unit_"+toString(i),
+					  dest,"read_unit_"+toString(it_read_unit_out));
+#endif
+	     
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_VAL"                  ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_VAL"                  );
+	       PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(i               )+"_ACK"                  ,
+				    dest,"out_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_ACK"                  );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_CONTEXT_ID"           ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_CONTEXT_ID"           );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_FRONT_END_ID"         ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_FRONT_END_ID"         );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_OOO_ENGINE_ID"        ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OOO_ENGINE_ID"        );
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_PACKET_ID"            ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_PACKET_ID"            );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_OPERATION"            ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OPERATION"            );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_TYPE"                 ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_TYPE"                 );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_STORE_QUEUE_PTR_WRITE",
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_STORE_QUEUE_PTR_WRITE");
+	       if (_param->_have_port_load_queue_ptr)
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_LOAD_QUEUE_PTR_WRITE" ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_LOAD_QUEUE_PTR_WRITE" );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_HAS_IMMEDIAT"         ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_HAS_IMMEDIAT"         );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_IMMEDIAT"             ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_IMMEDIAT"             );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_DATA_RA"              ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RA"              );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_DATA_RB"              ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RB"              );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_DATA_RC"              ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RC"              );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_WRITE_RD"             ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RD"             );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_NUM_REG_RD"           ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RD"           );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_WRITE_RE"             ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RE"             );
+	       PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i               )+"_NUM_REG_RE"           ,
+				    dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RE"           );
+	     
+	     it_read_unit_out ++;
+	   }
+	   
+	   // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   {
+	     dest = _name+"_register_unit";
+#ifdef POSITION
+	     _component->interface_map (src ,"gpr_read_0",
+					dest,"gpr_read_"+toString(2*i  ));
+	     _component->interface_map (src ,"gpr_read_1",
+					dest,"gpr_read_"+toString(2*i+1));
+#endif
+	     PORT_MAP(_component ,src ,"out_GPR_READ_0_VAL"          , dest, "in_GPR_READ_"+toString(2*i  )+"_VAL"          );
+	     PORT_MAP(_component ,src , "in_GPR_READ_0_ACK"          , dest,"out_GPR_READ_"+toString(2*i  )+"_ACK"          );
+	     if (_param->_have_port_ooo_engine_id)
+	     PORT_MAP(_component ,src ,"out_GPR_READ_0_OOO_ENGINE_ID", dest, "in_GPR_READ_"+toString(2*i  )+"_OOO_ENGINE_ID");
+	     PORT_MAP(_component ,src ,"out_GPR_READ_0_NUM_REG"      , dest, "in_GPR_READ_"+toString(2*i  )+"_NUM_REG"      );
+	     PORT_MAP(_component ,src , "in_GPR_READ_0_DATA"         , dest,"out_GPR_READ_"+toString(2*i  )+"_DATA"         );
+	     PORT_MAP(_component ,src , "in_GPR_READ_0_DATA_VAL"     , dest,"out_GPR_READ_"+toString(2*i  )+"_DATA_VAL"     );
+	     PORT_MAP(_component ,src ,"out_GPR_READ_1_VAL"          , dest, "in_GPR_READ_"+toString(2*i+1)+"_VAL"          );
+	     PORT_MAP(_component ,src , "in_GPR_READ_1_ACK"          , dest,"out_GPR_READ_"+toString(2*i+1)+"_ACK"          );
+	     if (_param->_have_port_ooo_engine_id)
+	     PORT_MAP(_component ,src ,"out_GPR_READ_1_OOO_ENGINE_ID", dest, "in_GPR_READ_"+toString(2*i+1)+"_OOO_ENGINE_ID");
+	     PORT_MAP(_component ,src ,"out_GPR_READ_1_NUM_REG"      , dest, "in_GPR_READ_"+toString(2*i+1)+"_NUM_REG"      );
+	     PORT_MAP(_component ,src , "in_GPR_READ_1_DATA"         , dest,"out_GPR_READ_"+toString(2*i+1)+"_DATA"         );
+	     PORT_MAP(_component ,src , "in_GPR_READ_1_DATA_VAL"     , dest,"out_GPR_READ_"+toString(2*i+1)+"_DATA_VAL"     );
+	   }
+	   
+	   // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   {
+	     dest = _name+"_register_unit";
+#ifdef POSITION
+	     _component->interface_map (src ,"spr_read_0",
+					dest,"spr_read_"+toString(2*i  ));
+#endif
+	     PORT_MAP(_component ,src ,"out_SPR_READ_0_VAL"          , dest, "in_SPR_READ_"+toString(2*i  )+"_VAL"          );
+	     PORT_MAP(_component ,src , "in_SPR_READ_0_ACK"          , dest,"out_SPR_READ_"+toString(2*i  )+"_ACK"          );
+	     if (_param->_have_port_ooo_engine_id)
+	     PORT_MAP(_component ,src ,"out_SPR_READ_0_OOO_ENGINE_ID", dest, "in_SPR_READ_"+toString(2*i  )+"_OOO_ENGINE_ID");
+	     PORT_MAP(_component ,src ,"out_SPR_READ_0_NUM_REG"      , dest, "in_SPR_READ_"+toString(2*i  )+"_NUM_REG"      );
+	     PORT_MAP(_component ,src , "in_SPR_READ_0_DATA"         , dest,"out_SPR_READ_"+toString(2*i  )+"_DATA"         );
+	     PORT_MAP(_component ,src , "in_SPR_READ_0_DATA_VAL"     , dest,"out_SPR_READ_"+toString(2*i  )+"_DATA_VAL"     );
+	   }
+	   
+	   // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   uint32_t it_gpr_write = 0;
+	   for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_register_write[i].begin();
+		it!=_param->_set_read_unit_source_register_write[i].end();
+		it++)
+	     {
+	       dest = _name+"_write_unit_"+toString(*it);
+#ifdef POSITION
+	       _component->interface_map (src ,"gpr_write_"+toString(it_gpr_write),
+					  dest,"gpr_write");
+#endif
+	       
+	       PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_VAL"          ,
+				    dest,"out_GPR_WRITE_0_VAL"          );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_OOO_ENGINE_ID",
+				    dest,"out_GPR_WRITE_0_OOO_ENGINE_ID");
+	       PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_NUM_REG"      ,
+				    dest,"out_GPR_WRITE_0_NUM_REG"      );
+	       PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_DATA"         ,
+				    dest,"out_GPR_WRITE_0_DATA"         );
+
+	       // PORT MAP to the "write_unit" component
+#ifdef POSITION
+	       _component->interface_map (dest,"gpr_write",
+					  src ,"gpr_write_"+toString(it_gpr_write));
+#endif
+	       
+	       PORT_MAP(_component ,dest,"out_GPR_WRITE_0_VAL"          ,
+				    src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_VAL"          );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,dest,"out_GPR_WRITE_0_OOO_ENGINE_ID",
+				    src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_OOO_ENGINE_ID");
+	       PORT_MAP(_component ,dest,"out_GPR_WRITE_0_NUM_REG"      ,
+				    src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_NUM_REG"      );
+	       PORT_MAP(_component ,dest,"out_GPR_WRITE_0_DATA"         ,
+				    src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_DATA"         );
+	       
+	       it_gpr_write ++;
+	     }
+	   
+	   // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   uint32_t it_spr_write = 0;
+	   for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_register_write[i].begin();
+		it!=_param->_set_read_unit_source_register_write[i].end();
+		it++)
+	     {
+	       dest = _name+"_write_unit_"+toString(*it);
+#ifdef POSITION
+	       _component->interface_map (src ,"spr_write_"+toString(it_spr_write),
+					  dest,"spr_write");
+#endif
+	       
+	       PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_VAL"          ,
+				    dest,"out_SPR_WRITE_0_VAL"          );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_OOO_ENGINE_ID",
+				    dest,"out_SPR_WRITE_0_OOO_ENGINE_ID");
+	       PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_NUM_REG"      ,
+				    dest,"out_SPR_WRITE_0_NUM_REG"      );
+	       PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_DATA"         ,
+				    dest,"out_SPR_WRITE_0_DATA"         );
+
+	       // PORT MAP to the "write_unit" component
+#ifdef POSITION
+	       _component->interface_map (dest,"spr_write",
+					  src ,"spr_write_"+toString(it_spr_write));
+#endif
+	       PORT_MAP(_component ,dest,"out_SPR_WRITE_0_VAL"          ,
+				    src , "in_SPR_WRITE_"+toString(it_spr_write)+"_VAL"          );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,dest,"out_SPR_WRITE_0_OOO_ENGINE_ID",
+				    src , "in_SPR_WRITE_"+toString(it_spr_write)+"_OOO_ENGINE_ID");
+	       PORT_MAP(_component ,dest,"out_SPR_WRITE_0_NUM_REG"      ,
+				    src , "in_SPR_WRITE_"+toString(it_spr_write)+"_NUM_REG"      );
+	       PORT_MAP(_component ,dest,"out_SPR_WRITE_0_DATA"         ,
+				    src , "in_SPR_WRITE_"+toString(it_spr_write)+"_DATA"         );
+
+	       it_spr_write ++;
+	     }
+
+	   // ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   uint32_t it_bypass_write = 0;
+	   for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_bypass_write[i].begin();
+		it!=_param->_set_read_unit_source_bypass_write[i].end();
+		it++)
+	     {
+	       dest = _name+"_write_unit_"+toString(*it);
+
+	       for (uint32_t j=0; j<_param->_nb_bypass_write[*it]; j++)
+		 {
+#ifdef POSITION
+		   _component->interface_map (src ,"bypass_write_"+toString(it_bypass_write),
+					      dest,"bypass_write_"+toString(j));
+#endif
+		   
+		   if (_param->_have_port_ooo_engine_id)
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_OOO_ENGINE_ID",
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_OOO_ENGINE_ID");
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_VAL"      ,
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_GPR_VAL"      );
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_NUM_REG"  ,
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_GPR_NUM_REG"  );
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_DATA"     ,
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_GPR_DATA"     );
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_VAL"      ,
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_SPR_VAL"      );
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_NUM_REG"  ,
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_SPR_NUM_REG"  );
+		   PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_DATA"     ,
+					dest,"out_BYPASS_WRITE_"+toString(j              )+"_SPR_DATA"     );
+
+#ifdef POSITION
+		   _component->interface_map (dest,"bypass_write_"+toString(j),
+					      src ,"bypass_write_"+toString(it_bypass_write));
+#endif
+		   
+		   if (_param->_have_port_ooo_engine_id)
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_OOO_ENGINE_ID",
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_OOO_ENGINE_ID");
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_GPR_VAL"      ,
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_VAL"      );
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_GPR_NUM_REG"  ,
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_NUM_REG"  );
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_GPR_DATA"     ,
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_DATA"     );
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_SPR_VAL"      ,
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_VAL"      );
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_SPR_NUM_REG"  ,
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_NUM_REG"  );
+		   PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j              )+"_SPR_DATA"     ,
+					src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_DATA"     );
+
+		   it_bypass_write ++;
+		 }
+	     }
+
+	   // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	   uint32_t it_bypass_memory = 0;
+	   for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_bypass_memory[i].begin();
+		it!=_param->_set_read_unit_source_bypass_memory[i].end();
+		it++)
+	     {
+	       dest = _name+"_load_store_unit_"+toString(_param->_translate_num_execute_unit[*it]);
+
+	       for (uint32_t j=0; j<_param->_nb_bypass_memory[_param->_translate_num_execute_unit[*it]]; j++)
+		 {
+#ifdef POSITION
+		   _component->interface_map (src ,"bypass_memory_"+toString(it_bypass_memory),
+					      dest,"bypass_memory_"+toString(j));
+#endif
+		   
+		   if (_param->_have_port_ooo_engine_id)
+		   PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_OOO_ENGINE_ID",
+					dest,"out_BYPASS_MEMORY_"+toString(j               )+"_OOO_ENGINE_ID");
+		   PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_VAL"          ,
+					dest,"out_BYPASS_MEMORY_"+toString(j               )+"_VAL"          );
+		   PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_NUM_REG"      ,
+					dest,"out_BYPASS_MEMORY_"+toString(j               )+"_NUM_REG"      );
+		   PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_DATA"         ,
+					dest,"out_BYPASS_MEMORY_"+toString(j               )+"_DATA"         );
+
+		   // port map to the "load_store_unit" component
+#ifdef POSITION
+		   _component->interface_map (dest,"bypass_memory_"+toString(j),
+					      src ,"bypass_memory_"+toString(it_bypass_memory));
+#endif
+		   
+		   if (_param->_have_port_ooo_engine_id)
+		   PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j               )+"_OOO_ENGINE_ID",
+					src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_OOO_ENGINE_ID");
+		   PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j               )+"_VAL"          ,
+					src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_VAL"          );
+		   PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j               )+"_NUM_REG"      ,
+					src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_NUM_REG"      );
+		   PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j               )+"_DATA"         ,
+					src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_DATA"         );
+
+		   it_bypass_memory ++;
+		 }
+	     }
+	 }
+     }
+
+     // ===================================================================
+     // =====[ EXECUTE_UNIT ]==============================================    
+     // ===================================================================
+     for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
+       {
+	 uint32_t x=_param->_translate_num_execute_unit[i];
+	 
+	 if (_param->_is_load_store_unit[i] == false)
+	   {
+	     // ===================================================================
+	     // =====[ FUNCTIONNAL_UNIT ]==========================================    
+	     // ===================================================================
+
+	     src = _name+"_functionnal_unit_"+toString(x);
+	     std::cout << "Instance : " << src << std::endl;
+	     
+	     {
+	       dest = _name;
+#ifdef POSITION
+	       _component->interface_map (src ,"",
+					  dest,"");
+#endif
+	       PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	       PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+	     }
+    
+	     // ~~~~~[ Interface "execute_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name+"_read_unit_to_execution_unit";
+
+#ifdef POSITION
+	       _component->interface_map (src ,"execute_in",
+					  dest,"execute_unit_in_"+toString(i));
+#endif
+
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_VAL"                  ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL"                  );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_IN_ACK"                  ,
+				    dest, "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK"                  );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_CONTEXT_ID"           ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID"           );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_FRONT_END_ID"         ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID"         );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_OOO_ENGINE_ID"        ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID"        );
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_PACKET_ID"            ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID"            );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_OPERATION"            ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION"            );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_TYPE"                 ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE"                 );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE",
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+	       if (_param->_have_port_load_queue_ptr)
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE" ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_HAS_IMMEDIAT"         ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT"         );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_IMMEDIAT"             ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT"             );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RA"              ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA"              );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RB"              ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB"              );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RC"              ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC"              );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_WRITE_RD"             ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD"             );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_NUM_REG_RD"           ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD"           );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_WRITE_RE"             ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE"             );
+	       PORT_MAP(_component ,src , "in_EXECUTE_IN_NUM_REG_RE"           ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE"           );
+	     }
+	     
+	     // ~~~~~[ Interface "execute_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name+"_execution_unit_to_write_unit";
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"execute_out",
+					  dest,"execute_unit_out_"+toString(i));
+#endif
+
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_VAL"          ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL"          );
+  	       PORT_MAP(_component ,src , "in_EXECUTE_OUT_ACK"          ,
+				    dest,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK"          );
+	       if (_param->_have_port_context_id)
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_CONTEXT_ID"   ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID"   );
+	       if (_param->_have_port_front_end_id)
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_FRONT_END_ID" ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" );
+	       if (_param->_have_port_ooo_engine_id)
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_OOO_ENGINE_ID",
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID");
+	       if (_param->_have_port_packet_id)
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_PACKET_ID"    ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID"    );
+//	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_OPERATION"    ,
+// 				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION"    );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_TYPE"         ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE"         );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RD"     ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD"     );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NUM_REG_RD"   ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD"   );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_DATA_RD"      ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD"      );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RE"     ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE"     );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NUM_REG_RE"   ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE"   );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_DATA_RE"      ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE"      );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_EXCEPTION"    ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION"    );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NO_SEQUENCE"  ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE"  );
+  	       PORT_MAP(_component ,src ,"out_EXECUTE_OUT_ADDRESS"      ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS"      );
+	     }
+	   }
+	 else
+	   {
+	     // ===================================================================
+	     // =====[ LOAD_STORE_UNIT ]===========================================    
+	     // ===================================================================
+  
+	     src = _name+"_load_store_unit_"+toString(x);
+	     std::cout << "Instance : " << src << std::endl;
+
+	     // ~~~~~[ Interface "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name;
+#ifdef POSITION
+	       _component->interface_map (src ,"",
+					  dest,"");
+#endif
+	       PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	       PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+	     }
+	 
+	     // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name+"_read_unit_to_execution_unit";
+
+#ifdef POSITION
+	       _component->interface_map (src ,"memory_in",
+					  dest,"execute_unit_in_"+toString(i));
+#endif
+
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_VAL"                  ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL"                  );
+	       PORT_MAP(_component ,src ,"out_MEMORY_IN_ACK"                  ,
+				    dest, "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK"                  );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_CONTEXT_ID"           ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID"           );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_FRONT_END_ID"         ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID"         );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_OOO_ENGINE_ID"        ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID"        );
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_PACKET_ID"            ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID"            );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_OPERATION"            ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION"            );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_TYPE"                 ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE"                 );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_STORE_QUEUE_PTR_WRITE",
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+	       if (_param->_have_port_load_queue_ptr)
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE" ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_HAS_IMMEDIAT"         ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT"         );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_IMMEDIAT"             ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT"             );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RA"              ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA"              );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RB"              ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB"              );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RC"              ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC"              );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_WRITE_RD"             ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD"             );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_NUM_REG_RD"           ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD"           );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_WRITE_RE"             ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE"             );
+	       PORT_MAP(_component ,src , "in_MEMORY_IN_NUM_REG_RE"           ,
+				    dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE"           );
+	     }
+
+	     // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name+"_execution_unit_to_write_unit";
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"memory_out",
+					  dest,"execute_unit_out_"+toString(i));
+#endif
+
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_VAL"          ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL"          );
+  	       PORT_MAP(_component ,src , "in_MEMORY_OUT_ACK"          ,
+				    dest,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK"          );
+	       if (_param->_have_port_context_id)
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_CONTEXT_ID"   ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID"   );
+	       if (_param->_have_port_front_end_id)
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_FRONT_END_ID" ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" );
+	       if (_param->_have_port_ooo_engine_id)
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_OOO_ENGINE_ID",
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID");
+	       if (_param->_have_port_packet_id)
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_PACKET_ID"    ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID"    );
+//	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_OPERATION"    ,
+// 				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION"    );
+	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_TYPE"         ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE"         );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_WRITE_RD"     ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD"     );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_NUM_REG_RD"   ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD"   );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_DATA_RD"      ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD"      );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_WRITE_RE"     ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE"     );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_NUM_REG_RE"   ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE"   );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_DATA_RE"      ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE"      );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_EXCEPTION"    ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION"    );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_NO_SEQUENCE"  ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE"  );
+  	       PORT_MAP(_component ,src ,"out_MEMORY_OUT_ADDRESS"      ,
+				    dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS"      );
+	     }
+
+	     // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name;
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"dcache_req",
+					  dest,"dcache_req_"+toString(i));
+#endif
+  	       PORT_MAP(_component ,src ,"out_DCACHE_REQ_VAL"       ,dest,"out_DCACHE_REQ_"+toString(i)+"_VAL"       );
+  	       PORT_MAP(_component ,src , "in_DCACHE_REQ_ACK"       ,dest, "in_DCACHE_REQ_"+toString(i)+"_ACK"       );
+  	       if (_param->_have_port_dcache_context_id)
+	       PORT_MAP(_component ,src ,"out_DCACHE_REQ_CONTEXT_ID",dest,"out_DCACHE_REQ_"+toString(i)+"_CONTEXT_ID");
+  	       PORT_MAP(_component ,src ,"out_DCACHE_REQ_PACKET_ID" ,dest,"out_DCACHE_REQ_"+toString(i)+"_PACKET_ID" );
+  	       PORT_MAP(_component ,src ,"out_DCACHE_REQ_ADDRESS"   ,dest,"out_DCACHE_REQ_"+toString(i)+"_ADDRESS"   );
+  	       PORT_MAP(_component ,src ,"out_DCACHE_REQ_TYPE"      ,dest,"out_DCACHE_REQ_"+toString(i)+"_TYPE"      );
+  	       PORT_MAP(_component ,src ,"out_DCACHE_REQ_WDATA"     ,dest,"out_DCACHE_REQ_"+toString(i)+"_WDATA"     );
+	     }
+
+	     // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       dest = _name;
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"dcache_rsp",
+					  dest,"dcache_rsp_"+toString(i));
+#endif
+  	       PORT_MAP(_component ,src , "in_DCACHE_RSP_VAL"       ,dest, "in_DCACHE_RSP_"+toString(i)+"_VAL"       );
+  	       PORT_MAP(_component ,src ,"out_DCACHE_RSP_ACK"       ,dest,"out_DCACHE_RSP_"+toString(i)+"_ACK"       );
+  	       if (_param->_have_port_dcache_context_id)
+  	       PORT_MAP(_component ,src , "in_DCACHE_RSP_CONTEXT_ID",dest, "in_DCACHE_RSP_"+toString(i)+"_CONTEXT_ID");
+  	       PORT_MAP(_component ,src , "in_DCACHE_RSP_PACKET_ID" ,dest, "in_DCACHE_RSP_"+toString(i)+"_PACKET_ID" );
+  	       PORT_MAP(_component ,src , "in_DCACHE_RSP_RDATA"     ,dest, "in_DCACHE_RSP_"+toString(i)+"_RDATA"     );
+  	       PORT_MAP(_component ,src , "in_DCACHE_RSP_ERROR"     ,dest, "in_DCACHE_RSP_"+toString(i)+"_ERROR"     );
+	     }
+
+	     // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	     {
+	       // Port map with "read_unit" is ok!
+	     }
+	   }
+       }
+
+     // ===================================================================
+     // =====[ WRITE_UNIT ]================================================
+     // ===================================================================
+     for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+       {
+	 src = _name+"_write_unit_"+toString(i);
+	 std::cout << "Instance : " << src << std::endl;
+	 
+	 {
+	   dest = _name;
+#ifdef POSITION
+	   _component->interface_map (src ,"",
+				      dest,"");
+#endif
+	   PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	   PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+	 }
+
+	 // -----[ Interface "write_unit_in" ]---------------------------------    
+	 {
+	   dest = _name+"_execution_unit_to_write_unit";
+#ifdef POSITION
+	   _component->interface_map (src ,"write_unit_in",
+				      dest,"execute_unit_in_"+toString(i));
+#endif
+	   
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_VAL"          ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_VAL"          );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_ACK"          ,
+				dest, "in_WRITE_UNIT_IN_"+toString(i)+"_ACK"          );
+	   if (_param->_have_port_context_id)
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_CONTEXT_ID"   ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_CONTEXT_ID"   );
+	   if (_param->_have_port_front_end_id)
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_FRONT_END_ID" ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" );
+	   if (_param->_have_port_ooo_engine_id)
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_OOO_ENGINE_ID",
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID");
+	   if (_param->_have_port_packet_id)
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_PACKET_ID"    ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_PACKET_ID"    );
+// 	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_OPERATION"    ,
+// 				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_OPERATION"    );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_TYPE"         ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE"         );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RD"     ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD"     );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NUM_REG_RD"   ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RD"   );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_DATA_RD"      ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RD"      );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RE"     ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RE"     );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NUM_REG_RE"   ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RE"   );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_DATA_RE"      ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RE"      );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_EXCEPTION"    ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_EXCEPTION"    );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NO_SEQUENCE"  ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NO_SEQUENCE"  );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_ADDRESS"      ,
+				dest,"out_WRITE_UNIT_IN_"+toString(i)+"_ADDRESS"      );
+	 }
+
+	 // -----[ Interface "write_unit_out" ]--------------------------------    
+	 {
+	   dest = _name;
+#ifdef POSITION
+	   _component->interface_map (src ,"write_unit_out",
+				      dest,"execute_loop_out_"+toString(i));
+#endif
+	   
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_VAL"          ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_VAL"          );
+  	   PORT_MAP(_component ,src , "in_WRITE_UNIT_OUT_ACK"          ,
+				dest, "in_EXECUTE_LOOP_OUT_"+toString(i)+"_ACK"          );
+	   if (_param->_have_port_context_id)
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_CONTEXT_ID"   ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_CONTEXT_ID"   );
+	   if (_param->_have_port_front_end_id)
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FRONT_END_ID" ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FRONT_END_ID" );
+	   if (_param->_have_port_ooo_engine_id)
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_OOO_ENGINE_ID",
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_OOO_ENGINE_ID");
+	   if (_param->_have_port_packet_id)
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_PACKET_ID"    ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_PACKET_ID"    );
+//	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_OPERATION"    ,
+// 				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_OPERATION"    );
+//	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_TYPE"         ,
+// 				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_TYPE"         );
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FLAGS"        ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FLAGS"        );
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_EXCEPTION"    ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_EXCEPTION"    );
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_NO_SEQUENCE"  ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_NO_SEQUENCE"  );
+  	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_ADDRESS"      ,
+				dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_ADDRESS"      );
+	 }
+	 // -----[ Interface "gpr_write" ]-------------------------------------
+	 {
+	   // Port map with "read_unit" is ok!
+
+	   dest = _name+"_register_unit";
+#ifdef POSITION
+	   _component->interface_map (src ,"gpr_write",
+				      dest,"gpr_write_"+toString(i));
+#endif
+
+  	   PORT_MAP(_component ,src ,"out_GPR_WRITE_0_VAL"          ,
+				dest, "in_GPR_WRITE_"+toString(i)+"_VAL"          );
+  	   PORT_MAP(_component ,src , "in_GPR_WRITE_0_ACK"          ,
+				dest,"out_GPR_WRITE_"+toString(i)+"_ACK"          );
+	   if (_param->_have_port_context_id)
+  	   PORT_MAP(_component ,src ,"out_GPR_WRITE_0_OOO_ENGINE_ID",
+				dest, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
+  	   PORT_MAP(_component ,src ,"out_GPR_WRITE_0_NUM_REG"      ,
+				dest, "in_GPR_WRITE_"+toString(i)+"_NUM_REG"      );
+  	   PORT_MAP(_component ,src ,"out_GPR_WRITE_0_DATA"         ,
+				dest, "in_GPR_WRITE_"+toString(i)+"_DATA"         );
+	 }
+
+	 // -----[ Interface "spr_write" ]-------------------------------------
+	 {
+	   // Port map with "read_unit" is ok!
+
+	   dest = _name+"_register_unit";
+#ifdef POSITION
+	   _component->interface_map (src ,"spr_write",
+				      dest,"spr_write_"+toString(i));
+#endif
+
+  	   PORT_MAP(_component ,src ,"out_SPR_WRITE_0_VAL"          ,
+				dest, "in_SPR_WRITE_"+toString(i)+"_VAL"          );
+  	   PORT_MAP(_component ,src , "in_SPR_WRITE_0_ACK"          ,
+				dest,"out_SPR_WRITE_"+toString(i)+"_ACK"          );
+	   if (_param->_have_port_context_id)
+  	   PORT_MAP(_component ,src ,"out_SPR_WRITE_0_OOO_ENGINE_ID",
+				dest, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
+  	   PORT_MAP(_component ,src ,"out_SPR_WRITE_0_NUM_REG"      ,
+				dest, "in_SPR_WRITE_"+toString(i)+"_NUM_REG"      );
+  	   PORT_MAP(_component ,src ,"out_SPR_WRITE_0_DATA"         ,
+				dest, "in_SPR_WRITE_"+toString(i)+"_DATA"         );
+	 }
+
+	 // -----[ Interface "bypass_write" ]----------------------------------
+	 {
+	   // Port map with "read_unit" is ok!
+	 }
+       }
+
+     // ===================================================================
+     // =====[ REGISTER_UNIT ]=============================================
+     // ===================================================================
+     {
+       src = _name+"_register_unit";
+       std::cout << "Instance : " << src << std::endl;
+       
+       {
+	 dest = _name;
+#ifdef POSITION
+	 _component->interface_map (src ,"",
+				    dest,"");
+#endif
+	 PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	 PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+       }
+
+       // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_read_unit; i++)
+	 {
+	   dest = _name+"_read_unit_"+toString(i);
+#ifdef POSITION
+	   _component->interface_map (src ,"gpr_read_"+toString(2*i  )
+				      dest,"gpr_read_0");
+	   _component->interface_map (src ,"gpr_read_"+toString(2*i+1)
+				      dest,"gpr_read_1");
+#endif
+       
+	 PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i  )+"_VAL"          ,dest,"out_GPR_READ_0_VAL"          );
+	 PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i  )+"_ACK"          ,dest, "in_GPR_READ_0_ACK"          );
+	 if (_param->_have_port_context_id)
+	 PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i  )+"_OOO_ENGINE_ID",dest,"out_GPR_READ_0_OOO_ENGINE_ID");
+	 PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i  )+"_NUM_REG"      ,dest,"out_GPR_READ_0_NUM_REG"      );
+	 PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i  )+"_DATA"         ,dest, "in_GPR_READ_0_DATA"         );
+	 PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i  )+"_DATA_VAL"     ,dest, "in_GPR_READ_0_DATA_VAL"     );
+
+	 PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_VAL"          ,dest,"out_GPR_READ_1_VAL"          );
+	 PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_ACK"          ,dest, "in_GPR_READ_1_ACK"          );
+	 if (_param->_have_port_context_id)
+	 PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_OOO_ENGINE_ID",dest,"out_GPR_READ_1_OOO_ENGINE_ID");
+	 PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_NUM_REG"      ,dest,"out_GPR_READ_1_NUM_REG"      );
+	 PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_DATA"         ,dest, "in_GPR_READ_1_DATA"         );
+	 PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_DATA_VAL"     ,dest, "in_GPR_READ_1_DATA_VAL"     );
+	 }
+
+       // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+	 {
+	   dest = _name+"_write_unit_"+toString(i);
+#ifdef POSITION
+	   _component->interface_map (src ,"gpr_write_"+toString(i)
+				      dest,"gpr_write_0");
+#endif
+       
+	   PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL"          ,dest,"out_GPR_WRITE_0_VAL"          );
+	   PORT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK"          ,dest, "in_GPR_WRITE_0_ACK"          );
+	   if (_param->_have_port_context_id)
+	   PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_GPR_WRITE_0_OOO_ENGINE_ID");
+	   PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG"      ,dest,"out_GPR_WRITE_0_NUM_REG"      );
+	   PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA"         ,dest,"out_GPR_WRITE_0_DATA"         );
+	 }
+
+       // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_read_unit; i++)
+	 {
+	   dest = _name+"_read_unit_"+toString(i);
+#ifdef POSITION
+	   _component->interface_map (src ,"spr_read_"+toString(i),
+				      dest,"spr_read_0");
+#endif
+       
+	   PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_VAL"          ,dest,"out_SPR_READ_0_VAL"          );
+	   PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_ACK"          ,dest, "in_SPR_READ_0_ACK"          );
+	   if (_param->_have_port_context_id)
+	   PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_READ_0_OOO_ENGINE_ID");
+	   PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_NUM_REG"      ,dest,"out_SPR_READ_0_NUM_REG"      );
+	   PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_DATA"         ,dest, "in_SPR_READ_0_DATA"         );
+	   PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_DATA_VAL"     ,dest, "in_SPR_READ_0_DATA_VAL"     );
+	 }
+
+       // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+	 {
+	   dest = _name+"_write_unit_"+toString(i);
+#ifdef POSITION
+	   _component->interface_map (src ,"spr_write_"+toString(i)
+				      dest,"spr_write_0");
+#endif
+       
+	   PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_VAL"          ,dest,"out_SPR_WRITE_0_VAL"          );
+	   PORT_MAP(_component ,src ,"out_SPR_WRITE_"+toString(i)+"_ACK"          ,dest, "in_SPR_WRITE_0_ACK"          );
+	   if (_param->_have_port_context_id)
+	   PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_WRITE_0_OOO_ENGINE_ID");
+	   PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_NUM_REG"      ,dest,"out_SPR_WRITE_0_NUM_REG"      );
+	   PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_DATA"         ,dest,"out_SPR_WRITE_0_DATA"         );
+	 }
+    
+       // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
+	 {
+	   uint32_t x=_param->_nb_inst_insert_rob [i];
+	   
+	   for (uint32_t j=0; j<x; j++)
+	     {
+	       dest = _name;
+#ifdef POSITION
+	       _component->interface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j),
+					  dest,"insert_rob_"+toString(i)+"_"+toString(j));
+#endif
+
+	       PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL"       ,
+				    dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL"       );
+	       PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK"       ,
+				    dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK"       );
+	       PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE"    ,
+				    dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE"    );
+	       PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG",
+				    dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG");
+	       PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE"    ,
+				    dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE"    );
+	       PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG",
+				    dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG");
+	     }
+	 }
+
+       // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
+	 {
+	   uint32_t x=_param->_nb_inst_retire_rob [i];
+	   
+	   for (uint32_t j=0; j<x; j++)
+	     {
+	       dest = _name;
+#ifdef POSITION
+	       _component->interface_map (src ,"retire_rob_"+toString(i)+"_"+toString(j),
+					  dest,"retire_rob_"+toString(i)+"_"+toString(j));
+#endif
+
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL"           ,
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL"           );
+	       PORT_MAP(_component ,src ,"out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK"           ,
+				    dest,"out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK"           );
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE"    ,
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE"    );
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_NUM_REG",
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_NUM_REG");
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE"    ,
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE"    );
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_NUM_REG",
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_NUM_REG");
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE"    ,
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE"    );
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_NUM_REG",
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_NUM_REG");
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE"    ,
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE"    );
+	       PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_NUM_REG",
+				    dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_NUM_REG");
+	     }
+	 }
+     }
+
+     // ===================================================================
+     // =====[ READ_UNIT_TO_EXECUTION_UNIT ]===============================
+     // ===================================================================
+     {
+       src = _name+"_read_unit_to_execution_unit";
+       std::cout << "Instance : " << src << std::endl;
+       
+       {
+	 dest = _name;
+#ifdef POSITION
+	 _component->interface_map (src ,"",
+				    dest,"");
+#endif
+	 PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	 PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+       }
+
+       // ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       uint32_t it_read_unit_out =0;
+       for (uint32_t i=0; i < _param->_nb_read_unit; i++)
+	 for (uint32_t j=0; j < _param->_nb_inst_retire[i]; j++)
+	   {
+	     dest = _name+"_read_unit_"+toString(i);
+	     
+#ifdef POSITION
+	     _component->interface_map (src ,"read_unit_"+toString(it_read_unit_out),
+					dest,"read_unit_"+toString(j));
+#endif
+	     
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_VAL"                  ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_VAL"                  );
+	     PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_ACK"                  ,
+				  dest, "in_READ_UNIT_OUT_"+toString(j               )+"_ACK"                  );
+	     if (_param->_have_port_context_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_CONTEXT_ID"           ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_CONTEXT_ID"           );
+	     if (_param->_have_port_front_end_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_FRONT_END_ID"         ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_FRONT_END_ID"         );
+	     if (_param->_have_port_ooo_engine_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OOO_ENGINE_ID"        ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_OOO_ENGINE_ID"        );
+	     if (_param->_have_port_packet_id)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_PACKET_ID"            ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_PACKET_ID"            );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OPERATION"            ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_OPERATION"            );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_TYPE"                 ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_TYPE"                 );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_STORE_QUEUE_PTR_WRITE",
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_STORE_QUEUE_PTR_WRITE");
+	     if (_param->_have_port_load_queue_ptr)
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_LOAD_QUEUE_PTR_WRITE" ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_LOAD_QUEUE_PTR_WRITE" );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_HAS_IMMEDIAT"         ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_HAS_IMMEDIAT"         );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_IMMEDIAT"             ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_IMMEDIAT"             );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RA"              ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_DATA_RA"              );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RB"              ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_DATA_RB"              );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RC"              ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_DATA_RC"              );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RD"             ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_WRITE_RD"             );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RD"           ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_NUM_REG_RD"           );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RE"             ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_WRITE_RE"             );
+	     PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RE"           ,
+				  dest,"out_READ_UNIT_OUT_"+toString(j               )+"_NUM_REG_RE"           );
+	     
+	     it_read_unit_out ++;
+	   }
+       
+       // ~~~~~[ Interface "execute_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
+	 {
+	   uint32_t x=_param->_translate_num_execute_unit[i];
+	   
+	   if (_param->_is_load_store_unit[i] == false)
+	     {
+	       dest = _name+"_functionnal_unit_"+toString(x);
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"execute_unit_in_"+toString(i),
+					  dest,"execute_in");
+#endif
+	       
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL"                  ,
+				    dest, "in_EXECUTE_IN_VAL"                  );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK"                  ,
+				    dest,"out_EXECUTE_IN_ACK"                  );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID"           ,
+				    dest, "in_EXECUTE_IN_CONTEXT_ID"           );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID"         ,
+				    dest, "in_EXECUTE_IN_FRONT_END_ID"         );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID"        ,
+				    dest, "in_EXECUTE_IN_OOO_ENGINE_ID"        );
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID"            ,
+				    dest, "in_EXECUTE_IN_PACKET_ID"            );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION"            ,
+				    dest, "in_EXECUTE_IN_OPERATION"            );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE"                 ,
+				    dest, "in_EXECUTE_IN_TYPE"                 );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
+				    dest, "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE");
+	       if (_param->_have_port_load_queue_ptr)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
+				    dest, "in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE" );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT"         ,
+				    dest, "in_EXECUTE_IN_HAS_IMMEDIAT"         );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT"             ,
+				    dest, "in_EXECUTE_IN_IMMEDIAT"             );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA"              ,
+				    dest, "in_EXECUTE_IN_DATA_RA"              );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB"              ,
+				    dest, "in_EXECUTE_IN_DATA_RB"              );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC"              ,
+				    dest, "in_EXECUTE_IN_DATA_RC"              );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD"             ,
+				    dest, "in_EXECUTE_IN_WRITE_RD"             );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD"           ,
+				    dest, "in_EXECUTE_IN_NUM_REG_RD"           );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE"             ,
+				    dest, "in_EXECUTE_IN_WRITE_RE"             );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE"           ,
+				    dest, "in_EXECUTE_IN_NUM_REG_RE"           );
+ 	     }
+	   else
+	     {
+	       dest = _name+"_load_store_unit_"+toString(x);
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"execute_unit_in_"+toString(i),
+					  dest,"memory_in");
+#endif
+	       
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL"                  ,
+				    dest, "in_MEMORY_IN_VAL"                  );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK"                  ,
+				    dest,"out_MEMORY_IN_ACK"                  );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID"           ,
+				    dest, "in_MEMORY_IN_CONTEXT_ID"           );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID"         ,
+				    dest, "in_MEMORY_IN_FRONT_END_ID"         );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID"        ,
+				    dest, "in_MEMORY_IN_OOO_ENGINE_ID"        );
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID"            ,
+				    dest, "in_MEMORY_IN_PACKET_ID"            );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION"            ,
+				    dest, "in_MEMORY_IN_OPERATION"            );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE"                 ,
+				    dest, "in_MEMORY_IN_TYPE"                 );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
+				    dest, "in_MEMORY_IN_STORE_QUEUE_PTR_WRITE");
+	       if (_param->_have_port_load_queue_ptr)
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
+				    dest, "in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE" );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT"         ,
+				    dest, "in_MEMORY_IN_HAS_IMMEDIAT"         );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT"             ,
+				    dest, "in_MEMORY_IN_IMMEDIAT"             );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA"              ,
+				    dest, "in_MEMORY_IN_DATA_RA"              );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB"              ,
+				    dest, "in_MEMORY_IN_DATA_RB"              );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC"              ,
+				    dest, "in_MEMORY_IN_DATA_RC"              );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD"             ,
+				    dest, "in_MEMORY_IN_WRITE_RD"             );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD"           ,
+				    dest, "in_MEMORY_IN_NUM_REG_RD"           );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE"             ,
+				    dest, "in_MEMORY_IN_WRITE_RE"             );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE"           ,
+				    dest, "in_MEMORY_IN_NUM_REG_RE"           );
+ 	     }
+	 }
+     }
+     
+     // ===================================================================
+     // =====[ EXECUTION_UNIT_TO_WRITE_UNIT ]==============================
+     // ===================================================================
+     {
+       src = _name+"_execution_unit_to_write_unit";
+       std::cout << "Instance : " << src << std::endl;
+
+       {
+	 dest = _name;
+#ifdef POSITION
+	 _component->interface_map (src ,"",
+				    dest,"");
+#endif
+	 PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
+	 PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
+       }
+
+       // ~~~~~[ Interface "execute_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
+	 {
+	   uint32_t x=_param->_translate_num_execute_unit[i];
+	   
+	   if (_param->_is_load_store_unit[i] == false)
+	     {
+	       dest = _name+"_functionnal_unit_"+toString(x);
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"execute_unit_out_"+toString(i),
+					  dest,"execute_out");
+#endif
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL"          ,
+				    dest,"out_EXECUTE_OUT_VAL"          );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK"          ,
+				    dest, "in_EXECUTE_OUT_ACK"          );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID"   ,
+				    dest,"out_EXECUTE_OUT_CONTEXT_ID"   );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" ,
+				    dest,"out_EXECUTE_OUT_FRONT_END_ID" );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID",
+				    dest,"out_EXECUTE_OUT_OOO_ENGINE_ID");
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID"    ,
+				    dest,"out_EXECUTE_OUT_PACKET_ID"    );
+// 	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION"    ,
+// 				    dest,"out_EXECUTE_OUT_OPERATION"    );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE"         ,
+				    dest,"out_EXECUTE_OUT_TYPE"         );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD"     ,
+				    dest,"out_EXECUTE_OUT_WRITE_RD"     );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD"   ,
+				    dest,"out_EXECUTE_OUT_NUM_REG_RD"   );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD"      ,
+				    dest,"out_EXECUTE_OUT_DATA_RD"      );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE"     ,
+				    dest,"out_EXECUTE_OUT_WRITE_RE"     );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE"   ,
+				    dest,"out_EXECUTE_OUT_NUM_REG_RE"   );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE"      ,
+				    dest,"out_EXECUTE_OUT_DATA_RE"      );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION"    ,
+				    dest,"out_EXECUTE_OUT_EXCEPTION"    );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE"  ,
+				    dest,"out_EXECUTE_OUT_NO_SEQUENCE"  );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS"      ,
+				    dest,"out_EXECUTE_OUT_ADDRESS"      );
+	     }
+	   else
+	     {
+	       dest = _name+"_load_store_unit_"+toString(x);
+	       
+#ifdef POSITION
+	       _component->interface_map (src ,"execute_unit_out_"+toString(i),
+					  dest,"memory_out");
+#endif
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL"          ,
+				    dest,"out_MEMORY_OUT_VAL"          );
+	       PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK"          ,
+				    dest, "in_MEMORY_OUT_ACK"          );
+	       if (_param->_have_port_context_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID"   ,
+				    dest,"out_MEMORY_OUT_CONTEXT_ID"   );
+	       if (_param->_have_port_front_end_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" ,
+				    dest,"out_MEMORY_OUT_FRONT_END_ID" );
+	       if (_param->_have_port_ooo_engine_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID",
+				    dest,"out_MEMORY_OUT_OOO_ENGINE_ID");
+	       if (_param->_have_port_packet_id)
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID"    ,
+				    dest,"out_MEMORY_OUT_PACKET_ID"    );
+// 	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION"    ,
+// 				    dest,"out_MEMORY_OUT_OPERATION"    );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE"         ,
+				    dest,"out_MEMORY_OUT_TYPE"         );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD"     ,
+				    dest,"out_MEMORY_OUT_WRITE_RD"     );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD"   ,
+				    dest,"out_MEMORY_OUT_NUM_REG_RD"   );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD"      ,
+				    dest,"out_MEMORY_OUT_DATA_RD"      );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE"     ,
+				    dest,"out_MEMORY_OUT_WRITE_RE"     );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE"   ,
+				    dest,"out_MEMORY_OUT_NUM_REG_RE"   );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE"      ,
+				    dest,"out_MEMORY_OUT_DATA_RE"      );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION"    ,
+				    dest,"out_MEMORY_OUT_EXCEPTION"    );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE"  ,
+				    dest,"out_MEMORY_OUT_NO_SEQUENCE"  );
+	       PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS"      ,
+				    dest,"out_MEMORY_OUT_ADDRESS"      );
+	     }
+	 }
+
+       // ~~~~~[ Interface "write_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+       for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+	 {
+	   dest = _name+"_write_unit_"+toString(i);
+	   
+#ifdef POSITION
+	   _component->interface_map (src ,"write_unit_out_"+toString(i),
+				      dest,"write_out");
+#endif
+	   
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_VAL"          ,
+				dest, "in_WRITE_UNIT_IN_VAL"          );
+	   PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_"+toString(i)+"_ACK"          ,
+				dest,"out_WRITE_UNIT_IN_ACK"          );
+	   if (_param->_have_port_context_id)
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_CONTEXT_ID"   ,
+				dest, "in_WRITE_UNIT_IN_CONTEXT_ID"   );
+	   if (_param->_have_port_front_end_id)
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ,
+				dest, "in_WRITE_UNIT_IN_FRONT_END_ID" );
+	   if (_param->_have_port_ooo_engine_id)
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID",
+				dest, "in_WRITE_UNIT_IN_OOO_ENGINE_ID");
+	   if (_param->_have_port_packet_id)
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_PACKET_ID"    ,
+				dest, "in_WRITE_UNIT_IN_PACKET_ID"    );
+// 	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_OPERATION"    ,
+// 				dest, "in_WRITE_UNIT_IN_OPERATION"    );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE"         ,
+				dest, "in_WRITE_UNIT_IN_TYPE"         );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD"     ,
+				dest, "in_WRITE_UNIT_IN_WRITE_RD"     );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RD"   ,
+				dest, "in_WRITE_UNIT_IN_NUM_REG_RD"   );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RD"      ,
+				dest, "in_WRITE_UNIT_IN_DATA_RD"      );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RE"     ,
+				dest, "in_WRITE_UNIT_IN_WRITE_RE"     );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RE"   ,
+				dest, "in_WRITE_UNIT_IN_NUM_REG_RE"   );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RE"      ,
+				dest, "in_WRITE_UNIT_IN_DATA_RE"      );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_EXCEPTION"    ,
+				dest, "in_WRITE_UNIT_IN_EXCEPTION"    );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NO_SEQUENCE"  ,
+				dest, "in_WRITE_UNIT_IN_NO_SEQUENCE"  );
+	   PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_ADDRESS"      ,
+				dest, "in_WRITE_UNIT_IN_ADDRESS"      );
+	 }
+     }
+     
+     _component->test_map();
+     for (uint32_t i=0; i<_param->_nb_read_unit; i++)
+       _component_read_unit [i]->_component->test_map();
+     for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++)
+       _component_functionnal_unit [i]->_component->test_map();
+     for (uint32_t i=0; i<_param->_nb_load_store_unit; i++)
+       _component_load_store_unit [i]->_component->test_map();
+     for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+       _component_write_unit [i]->_component->test_map();
+     _component_read_unit_to_execution_unit->_component->test_map();
+     _component_execution_unit_to_write_unit->_component->test_map();
+     _component_register_unit->_component->test_map();
+
+#ifdef POSITION
+    _component->generate_file();
+#endif
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp	(revision 78)
@@ -0,0 +1,133 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::deallocation"
+  void Execute_loop::deallocation (void)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    if (_usage & USE_SYSTEMC)
+      {
+	delete     in_CLOCK ;
+	delete     in_NRESET;
+
+	// ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	delete []  in_EXECUTE_LOOP_IN_VAL                  ;
+	delete [] out_EXECUTE_LOOP_IN_ACK                  ;
+	if (_param->_have_port_context_id)
+	delete []  in_EXECUTE_LOOP_IN_CONTEXT_ID           ;
+	if (_param->_have_port_front_end_id)
+	delete []  in_EXECUTE_LOOP_IN_FRONT_END_ID         ;
+	if (_param->_have_port_ooo_engine_id)
+	delete []  in_EXECUTE_LOOP_IN_OOO_ENGINE_ID        ;
+	if (_param->_have_port_packet_id)
+	delete []  in_EXECUTE_LOOP_IN_PACKET_ID            ;
+	delete []  in_EXECUTE_LOOP_IN_OPERATION            ;
+	delete []  in_EXECUTE_LOOP_IN_TYPE                 ;
+	delete []  in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE;
+	if (_param->_have_port_load_queue_ptr)
+	delete []  in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ;
+	delete []  in_EXECUTE_LOOP_IN_HAS_IMMEDIAT         ;
+	delete []  in_EXECUTE_LOOP_IN_IMMEDIAT             ;
+	delete []  in_EXECUTE_LOOP_IN_READ_RA              ;
+	delete []  in_EXECUTE_LOOP_IN_NUM_REG_RA           ;
+	delete []  in_EXECUTE_LOOP_IN_READ_RB              ;
+	delete []  in_EXECUTE_LOOP_IN_NUM_REG_RB           ;
+	delete []  in_EXECUTE_LOOP_IN_READ_RC              ;
+	delete []  in_EXECUTE_LOOP_IN_NUM_REG_RC           ;
+	delete []  in_EXECUTE_LOOP_IN_WRITE_RD             ;
+	delete []  in_EXECUTE_LOOP_IN_NUM_REG_RD           ;
+	delete []  in_EXECUTE_LOOP_IN_WRITE_RE             ;
+	delete []  in_EXECUTE_LOOP_IN_NUM_REG_RE           ;
+
+	// ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	delete [] out_EXECUTE_LOOP_OUT_VAL                 ;
+	delete []  in_EXECUTE_LOOP_OUT_ACK                 ;
+	if (_param->_have_port_context_id)
+	delete [] out_EXECUTE_LOOP_OUT_CONTEXT_ID          ;
+	if (_param->_have_port_front_end_id)
+	delete [] out_EXECUTE_LOOP_OUT_FRONT_END_ID        ;
+	if (_param->_have_port_ooo_engine_id)
+	delete [] out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID       ;
+	if (_param->_have_port_packet_id)
+	delete [] out_EXECUTE_LOOP_OUT_PACKET_ID           ;
+      //delete [] out_EXECUTE_LOOP_OUT_OPERATION           ;
+      //delete [] out_EXECUTE_LOOP_OUT_TYPE                ;
+	delete [] out_EXECUTE_LOOP_OUT_FLAGS               ;
+	delete [] out_EXECUTE_LOOP_OUT_EXCEPTION           ;
+	delete [] out_EXECUTE_LOOP_OUT_NO_SEQUENCE         ;
+	delete [] out_EXECUTE_LOOP_OUT_ADDRESS             ;
+
+	// ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	delete [] out_DCACHE_REQ_VAL                       ;
+	delete []  in_DCACHE_REQ_ACK                       ;
+	if (_param->_have_port_dcache_context_id)
+	delete [] out_DCACHE_REQ_CONTEXT_ID                ;
+	delete [] out_DCACHE_REQ_PACKET_ID                 ;
+	delete [] out_DCACHE_REQ_ADDRESS                   ;
+	delete [] out_DCACHE_REQ_TYPE                      ;
+	delete [] out_DCACHE_REQ_WDATA                     ;
+
+	// ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	delete []  in_DCACHE_RSP_VAL                       ;
+	delete [] out_DCACHE_RSP_ACK                       ;
+	if (_param->_have_port_dcache_context_id)
+	delete []  in_DCACHE_RSP_CONTEXT_ID                ;
+	delete []  in_DCACHE_RSP_PACKET_ID                 ;
+	delete []  in_DCACHE_RSP_RDATA                     ;
+	delete []  in_DCACHE_RSP_ERROR                     ;
+    
+	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	delete []  in_INSERT_ROB_VAL                       ;
+	delete [] out_INSERT_ROB_ACK                       ;
+	delete []  in_INSERT_ROB_RD_USE                    ;
+	delete []  in_INSERT_ROB_RD_NUM_REG                ;
+	delete []  in_INSERT_ROB_RE_USE                    ;
+	delete []  in_INSERT_ROB_RE_NUM_REG                ;
+
+	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+	delete []  in_RETIRE_ROB_VAL                       ;
+	delete [] out_RETIRE_ROB_ACK                       ;
+	delete []  in_RETIRE_ROB_RD_OLD_USE                ; 
+	delete []  in_RETIRE_ROB_RD_OLD_NUM_REG            ;
+	delete []  in_RETIRE_ROB_RD_NEW_USE                ;
+	delete []  in_RETIRE_ROB_RD_NEW_NUM_REG            ;
+	delete []  in_RETIRE_ROB_RE_OLD_USE                ; 
+	delete []  in_RETIRE_ROB_RE_OLD_NUM_REG            ;
+	delete []  in_RETIRE_ROB_RE_NEW_USE                ;
+	delete []  in_RETIRE_ROB_RE_NEW_NUM_REG            ;
+      }
+    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    delete    _component;
+    delete [] _component_read_unit                   ;
+    delete [] _component_functionnal_unit            ;
+    delete [] _component_load_store_unit             ;
+    delete [] _component_write_unit                  ;
+    delete [] _component_read_unit_to_execution_unit ;
+    delete [] _component_execution_unit_to_write_unit;
+    delete [] _component_register_unit               ;
+    
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_end_cycle.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_end_cycle.cpp	(revision 78)
@@ -0,0 +1,43 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::end_cycle"
+void Execute_loop::end_cycle ()
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+#ifdef STATISTICS
+    _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    _interfaces->testbench();
+#endif
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_statistics_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_statistics_declaration.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_statistics_declaration.cpp	(revision 78)
@@ -0,0 +1,49 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::statistics_declaration"
+  void Execute_loop::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Execute_loop",
+		      param_statistics);
+
+     for (uint32_t i=0; i<_param->_nb_read_unit; i++)
+       _stat->add_stat(_component_read_unit        [i]->_stat);
+     for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++)
+       _stat->add_stat(_component_functionnal_unit [i]->_stat);
+     for (uint32_t i=0; i<_param->_nb_load_store_unit; i++)
+       _stat->add_stat(_component_load_store_unit  [i]->_stat);
+     for (uint32_t i=0; i<_param->_nb_write_unit; i++)
+       _stat->add_stat(_component_write_unit       [i]->_stat);
+     _stat->add_stat(_component_read_unit_to_execution_unit ->_stat);
+     _stat->add_stat(_component_execution_unit_to_write_unit->_stat);
+     _stat->add_stat(_component_register_unit               ->_stat);
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_transition.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_transition.cpp	(revision 78)
@@ -0,0 +1,39 @@
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::transition"
+  void Execute_loop::transition (void)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+# endif
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_vhdl.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_vhdl.cpp	(revision 78)
@@ -0,0 +1,43 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::vhdl"
+  void Execute_loop::vhdl (void)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp	(revision 78)
@@ -0,0 +1,546 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::Parameters"
+  Parameters::Parameters (uint32_t              nb_read_unit                              ,
+			  uint32_t              nb_functionnal_unit                       ,
+			  uint32_t              nb_load_store_unit                        ,
+			  uint32_t              nb_write_unit                             ,
+			  
+			  uint32_t              nb_context                                ,
+			  uint32_t              nb_front_end                              ,
+			  uint32_t              nb_ooo_engine                             ,
+			  uint32_t              nb_packet                                 ,
+			  uint32_t              size_general_data                         ,
+			  uint32_t              size_special_data                         ,
+			  
+			  uint32_t            * size_read_queue                           ,
+			  uint32_t            * size_reservation_station                  ,
+			  uint32_t            * nb_inst_retire                            ,
+			  
+			  execute_timing_t  *** timing                                    ,
+			  morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t),
+			  
+			  uint32_t            * size_store_queue                          ,
+			  uint32_t            * size_load_queue                           ,
+			  uint32_t            * size_speculative_access_queue             ,
+			  uint32_t            * nb_port_check                             ,
+			  Tspeculative_load_t * speculative_load                          ,
+			  uint32_t            * nb_bypass_memory                          ,
+
+			  uint32_t            * size_write_queue                          ,
+			  uint32_t            * size_execute_queue                        ,
+			  uint32_t            * nb_bypass_write                           ,
+			  
+			  uint32_t              nb_gpr_bank                               ,
+			  uint32_t              nb_gpr_port_read_by_bank                  ,
+			  uint32_t              nb_gpr_port_write_by_bank                 ,
+			  uint32_t              nb_spr_bank                               ,
+			  uint32_t              nb_spr_port_read_by_bank                  ,
+			  uint32_t              nb_spr_port_write_by_bank                 ,
+			  uint32_t            * nb_general_register                       ,
+			  uint32_t            * nb_special_register                       ,
+			  uint32_t            * nb_inst_insert_rob                        ,
+			  uint32_t            * nb_inst_retire_rob                        ,
+			  
+			  Tpriority_t           execution_unit_to_write_unit_priority     ,
+			  bool               ** execution_unit_to_write_unit_table_routing,
+			  bool               ** execution_unit_to_write_unit_table_thread ,
+			  
+			  Tpriority_t           read_unit_to_execution_unit_priority      ,
+			  bool               ** read_unit_to_execution_unit_table_routing ,
+			  bool               ** read_unit_to_execution_unit_table_thread      
+			  )
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    _nb_read_unit                          = nb_read_unit                         ;
+    _nb_functionnal_unit                   = nb_functionnal_unit                  ;
+    _nb_load_store_unit                    = nb_load_store_unit                   ;
+    _nb_write_unit                         = nb_write_unit                        ;
+    
+    _nb_context                            = nb_context                           ;
+    _nb_front_end                          = nb_front_end                         ;
+    _nb_ooo_engine                         = nb_ooo_engine                        ;
+    _nb_packet                             = nb_packet                            ;
+    _size_general_data                     = size_general_data                    ;
+    _size_special_data                     = size_special_data                    ;
+    
+    _size_read_queue                       = size_read_queue                      ;
+    _size_reservation_station              = size_reservation_station             ;
+    _nb_inst_retire                        = nb_inst_retire                       ;
+    
+    _timing                                = timing                               ;
+    _get_custom_information                = get_custom_information               ;
+    
+    _size_store_queue                      = size_store_queue                     ;
+    _size_load_queue                       = size_load_queue                      ;
+    _size_speculative_access_queue         = size_speculative_access_queue        ;
+    _nb_port_check                         = nb_port_check                        ;
+    _speculative_load                      = speculative_load                     ;
+    _nb_bypass_memory                      = nb_bypass_memory                     ;
+
+    _size_write_queue                      = size_write_queue                     ;
+    _size_execute_queue                    = size_execute_queue                   ;
+    _nb_bypass_write                       = nb_bypass_write                      ;
+    
+    _nb_gpr_bank                           = nb_gpr_bank                          ;
+    _nb_gpr_port_read_by_bank              = nb_gpr_port_read_by_bank             ;
+    _nb_gpr_port_write_by_bank             = nb_gpr_port_write_by_bank            ;
+    _nb_spr_bank                           = nb_spr_bank                          ;
+    _nb_spr_port_read_by_bank              = nb_spr_port_read_by_bank             ;
+    _nb_spr_port_write_by_bank             = nb_spr_port_write_by_bank            ;
+    _nb_general_register                   = nb_general_register                  ;
+    _nb_special_register                   = nb_special_register                  ;
+    _nb_inst_insert_rob                    = nb_inst_insert_rob                   ;
+    _nb_inst_retire_rob                    = nb_inst_retire_rob                   ;
+    
+    _execution_unit_to_write_unit_priority      = execution_unit_to_write_unit_priority;
+    _execution_unit_to_write_unit_table_routing = execution_unit_to_write_unit_table_routing;
+    _execution_unit_to_write_unit_table_thread  = execution_unit_to_write_unit_table_thread ;
+    
+    _read_unit_to_execution_unit_priority       = read_unit_to_execution_unit_priority ;
+    _read_unit_to_execution_unit_table_routing  = read_unit_to_execution_unit_table_routing ;
+    _read_unit_to_execution_unit_table_thread   = read_unit_to_execution_unit_table_thread  ;
+
+    _nb_execute_unit                       = _nb_functionnal_unit + _nb_load_store_unit;
+
+    _size_context_id         = log2(nb_context            );
+    _size_front_end_id       = log2(nb_front_end          );
+    _size_ooo_engine_id      = log2(nb_ooo_engine         );
+    _size_packet_id          = log2(nb_packet             );
+
+    _have_port_context_id    = _size_context_id    >= 1;
+    _have_port_front_end_id  = _size_front_end_id  >= 1;
+    _have_port_ooo_engine_id = _size_ooo_engine_id >= 1;
+    _have_port_packet_id     = _size_packet_id     >= 1;
+
+    _is_load_store_unit         = new bool [_nb_execute_unit];
+    _translate_num_execute_unit = new uint32_t [_nb_execute_unit];
+
+    _read_unit_to_execution_unit_table_execute_type = new bool * [_nb_execute_unit];
+    for (uint32_t i=0; i<_nb_execute_unit; i++)
+      {
+	_is_load_store_unit [i] = false;
+	_read_unit_to_execution_unit_table_execute_type [i] = new bool [_nb_type];
+	for (uint32_t j=0; j<_nb_type; j++)
+	  _read_unit_to_execution_unit_table_execute_type [i][j] = false;
+      }
+
+    // Fill execute_type
+    for (uint32_t i=0; i<_nb_execute_unit; i++)
+      for (uint32_t j=0; j<_nb_type; j++)
+	for (uint32_t k=0; k<_nb_operation; k++)
+	  // Test if operation is implemnted
+	  if (timing[i][j][k]._latence > 0)
+	    {
+	      _read_unit_to_execution_unit_table_execute_type [i][j] = true;
+	      _is_load_store_unit [i] = (j == TYPE_MEMORY);
+	      break;
+	    }
+
+    for (uint32_t i=0; i<_nb_execute_unit; i++)
+      if (_is_load_store_unit [i])
+	log_printf(TRACE,Execute_loop,FUNCTION,"Execute unit '%d' is a Load Store  unit",i);
+      else
+	log_printf(TRACE,Execute_loop,FUNCTION,"Execute unit '%d' is a Functionnal unit",i);
+
+    _nb_gpr_read  = 2*_nb_read_unit;
+    _nb_spr_read  = 1*_nb_read_unit;
+    _nb_gpr_write = 1*_nb_write_unit;
+    _nb_spr_write = 1*_nb_write_unit;
+
+    _max_nb_general_register = 0;
+    _max_nb_special_register = 0;
+    for (uint32_t i=0; i<nb_ooo_engine; i++)
+      {
+	if (_nb_general_register[i] > _max_nb_general_register) _max_nb_general_register = _nb_general_register[i];
+	if (_nb_special_register[i] > _max_nb_special_register) _max_nb_special_register = _nb_special_register[i];
+      }
+
+    _max_size_store_queue    = 0;
+    _max_size_load_queue     = 0;
+    for (uint32_t i=0; i<nb_load_store_unit; i++)
+      {
+	if (_size_store_queue[i] > _max_size_store_queue) _max_size_store_queue = _size_store_queue[i];
+	if (_size_load_queue [i] > _max_size_load_queue ) _max_size_load_queue  = _size_load_queue [i];
+      }
+
+    _have_port_load_queue_ptr= _max_size_load_queue >= 2;
+
+    _size_general_register = log2(_max_nb_general_register);
+    _size_special_register = log2(_max_nb_special_register);
+
+    uint32_t _nb_thread = get_nb_thread(_nb_context,
+					_nb_front_end,
+					_nb_ooo_engine);
+
+    _set_read_unit_source_register_write = new std::set<uint32_t> [_nb_read_unit];
+    _set_read_unit_source_bypass_write   = new std::set<uint32_t> [_nb_read_unit];
+    _set_read_unit_source_bypass_memory  = new std::set<uint32_t> [_nb_read_unit];
+    
+    _read_unit_nb_register_write          = new uint32_t [_nb_read_unit];
+    _read_unit_nb_bypass_write            = new uint32_t [_nb_read_unit];
+    _read_unit_nb_bypass_memory           = new uint32_t [_nb_read_unit];
+
+    _link_read_unit_with_load_store_unit  = new bool * [nb_read_unit];
+    _link_read_unit_with_write_unit       = new bool * [nb_read_unit];
+    _link_read_unit_with_thread           = new bool * [nb_read_unit];
+
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	_read_unit_nb_register_write [i] = 0;
+	_read_unit_nb_bypass_write   [i] = 0;
+	_read_unit_nb_bypass_memory  [i] = 0;
+
+	_link_read_unit_with_load_store_unit [i] = new bool [_nb_execute_unit];
+	_link_read_unit_with_write_unit      [i] = new bool [_nb_write_unit];
+	_link_read_unit_with_thread          [i] = new bool [_nb_thread];
+
+	for (uint32_t j=0; j<_nb_execute_unit; j++)
+	  _link_read_unit_with_load_store_unit [i][j] = false;
+	for (uint32_t j=0; j<_nb_write_unit; j++)
+	  _link_read_unit_with_write_unit [i][j] = false;
+	for (uint32_t j=0; j<_nb_thread; j++)
+	  _link_read_unit_with_thread [i][j] = false;
+	
+	// fill link array
+	for (uint32_t j=0; j<_nb_execute_unit; j++)
+	  {
+	    // Test if this read unit can send operation at this execute_unit
+	    if (_read_unit_to_execution_unit_table_routing [i][j])
+	      {
+		if (_is_load_store_unit [j])
+		  {
+		    _link_read_unit_with_load_store_unit [i][j] = true;
+		  }
+		
+		for (uint32_t k=0; k<_nb_thread; k++)
+		  {
+		    if (_read_unit_to_execution_unit_table_thread [j][k])
+		      {
+			_link_read_unit_with_thread [i][k] = true;
+		      }
+		  }
+		// Scearch associed write_unit
+		for (uint32_t k=0; k<_nb_write_unit; k++)
+		  {
+		    // Test if this execute_unit can send operation at this write_unit
+		    // Test if have not a previous link ! (a same read_unit can send operation à two execute_unit and each execute_unit send at the same write_unit)
+		    if (_execution_unit_to_write_unit_table_routing [j][k] and 
+			not _link_read_unit_with_write_unit [i][k])
+		      // if yes : this write_unit can have operation sended by this read_unit
+		      {
+			_link_read_unit_with_write_unit [i][k] = true;
+		      }
+		  }
+	      }
+	  }
+      }
+
+    // Compute the gpr_write and spr_write port for the read_unit :
+    //   * Max : 2*nb_write_unit gpr_write_port.
+    //   * a specific read_unit and a specific write_unit can execute a null intersection of thread operation. Also it's unnecessarry to send the gpr_write at the read_unit.
+
+    
+    std::cout << "_link_......." << std::endl;
+    std::cout << "_link_read_unit_with_load_store_unit" << std::endl;
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	std::cout << "\t" << std::endl;
+	for (uint32_t j=0; j<_nb_execute_unit; j++)
+	  std::cout << _link_read_unit_with_load_store_unit [i][j] << " ";
+	std::cout << std::endl;
+      }
+    std::cout << "_link_read_unit_with_write_unit" << std::endl;
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	std::cout << "\t" << std::endl;
+	for (uint32_t j=0; j<_nb_write_unit; j++)
+	  std::cout << _link_read_unit_with_write_unit [i][j] << " ";
+	std::cout << std::endl;
+      }
+    std::cout << "_link_read_unit_with_thread" << std::endl;
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	std::cout << "\t" << std::endl;
+	for (uint32_t j=0; j<_nb_thread; j++)
+	  std::cout << _link_read_unit_with_thread [i][j] << " ";
+	std::cout << std::endl;
+      }
+
+    std::cout << "_set_......." << std::endl;
+
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	std::cout << " * Read_unit[" << i << "]" << std::endl;
+	for (uint32_t j=0; j<_nb_write_unit; j++)
+	  {
+	    std::cout << "   * Write_unit[" << j << "]" << std::endl;
+	    // Test the thread executed on this write_unit
+	    for (uint32_t k=0; k<_nb_thread; k++)
+	      {
+		std::cout << "     * Thread[" << k << "]" << std::endl;
+		if ( (_execution_unit_to_write_unit_table_thread [j][k]) and
+		     (_link_read_unit_with_thread [i][k]))
+		  {
+		    std::cout << "       * Find !!!!" << std::endl;
+		    std::cout << "         * Read_unit "+toString(i)+" must take the gpr_write with write_unit "+toString(j)+"." << std::endl;
+		    _set_read_unit_source_register_write[i].insert(j);
+		    _read_unit_nb_register_write        [i] ++;
+
+		    std::cout << "       * bypass_write : " << _nb_bypass_write [j] << std::endl;
+		    std::cout << "         * Read_unit "+toString(i)+" must take the bypass_write with write_unit "+toString(j)+"." << std::endl;		    
+		    _set_read_unit_source_bypass_write  [i].insert(j);
+		    _read_unit_nb_bypass_write          [i] += _nb_bypass_write [j];
+		    break;
+		  }
+	      }
+	  }
+      }
+
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	std::cout << " * Read_unit[" << i << "]" << std::endl;
+	for (uint32_t j=0; j<_nb_execute_unit; j++)
+	  {
+	    std::cout << "   * Execute_unit[" << j << "]" << std::endl;
+	    // Test the thread executed on this execute_unit
+	    for (uint32_t k=0; k<_nb_thread; k++)	
+	      {
+		std::cout << "     * Thread[" << k << "]" << std::endl;
+		if ((_read_unit_to_execution_unit_table_thread [j][k]) and
+		    (_link_read_unit_with_thread [i][k]) and
+		    (_is_load_store_unit [j]))
+		  {
+		    std::cout << "       * Find !!!!" << std::endl;
+		    std::cout << "       * Bypass_memory !!!!" << std::endl;
+		    std::cout << "         * Read_unit "+toString(i)+" must take the bypass_memory with load_store_unit "+toString(j)+"." << std::endl;		    
+		    
+		    _set_read_unit_source_bypass_memory [i].insert(j);
+		    _read_unit_nb_bypass_memory         [i] += _nb_bypass_memory [j];
+		    break;
+		  }
+	      }
+	  }
+      }
+
+    test();
+
+    _param_read_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Parameters * [_nb_read_unit];
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      _param_read_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Parameters 
+	(_size_read_queue               [i],
+	 _size_reservation_station      [i],
+	 _nb_context                       ,
+	 _nb_front_end                     ,
+	 _nb_ooo_engine                    ,
+	 _nb_packet                        ,
+	 _size_general_data                ,
+	 _size_special_data                ,
+	 _max_nb_general_register          ,
+	 _max_nb_special_register          ,
+	 1*_read_unit_nb_register_write [i],
+	 1*_read_unit_nb_register_write [i],
+	 _max_size_store_queue             ,
+	 _max_size_load_queue              ,
+	 _nb_inst_retire                [i],
+	 _read_unit_nb_bypass_write     [i],
+	 _read_unit_nb_bypass_memory    [i]);
+    
+    _param_functionnal_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Parameters * [_nb_functionnal_unit];
+    _param_load_store_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters * [_nb_load_store_unit];
+
+    uint32_t x=0;
+    uint32_t y=0;
+
+    for (uint32_t i=0; i<_nb_execute_unit; i++)
+      if (_is_load_store_unit [i] == false)
+	{
+	  _translate_num_execute_unit [i] = x;
+
+	  _param_functionnal_unit [x] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Parameters
+	    (_nb_context                 ,
+	     _nb_front_end               ,
+	     _nb_ooo_engine              ,
+	     _nb_packet                  ,
+	     _size_general_data          ,
+	     _max_nb_general_register    ,
+	     _size_special_data          ,
+	     _max_nb_special_register    ,
+	     _max_size_store_queue       ,
+	     _max_size_load_queue        ,
+	     _timing                  [i],
+	     _get_custom_information     );
+
+	  x++;
+	}
+      else
+	{
+	  _translate_num_execute_unit [i] = y;
+
+	  _param_load_store_unit [y] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters
+	    (_size_store_queue              [y],
+	     _size_load_queue               [y],
+	     _size_speculative_access_queue [y],
+	     _nb_port_check                 [y],
+	     _speculative_load              [y],
+	     _nb_bypass_memory              [y],
+	     _nb_context                       ,
+	     _nb_front_end                     ,
+	     _nb_ooo_engine                    ,
+	     _nb_packet                        ,
+	     _size_general_data                ,
+	     _size_special_data                ,
+	     _max_nb_special_register          ,
+	     _max_nb_general_register          );
+
+	  y ++;
+	}
+
+    for (uint32_t i=0; i<_nb_load_store_unit; i++)
+
+    _param_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * [_nb_write_unit];
+    for (uint32_t i=0; i<_nb_write_unit; i++)
+      _param_write_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters
+	(_size_write_queue        [i],
+	 _size_execute_queue      [i],
+	 _nb_context                 ,
+	 _nb_front_end               ,
+	 _nb_ooo_engine              ,
+	 _nb_packet                  ,
+	 _size_general_data          ,
+	 _max_nb_general_register    ,
+	 _size_special_data          ,
+	 _max_nb_special_register    ,
+	 _nb_bypass_write         [i]);
+
+
+    _param_read_unit_to_execution_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Parameters
+      (_nb_read_unit                                  ,
+       _nb_execute_unit                               ,
+       _nb_context                                    ,
+       _nb_front_end                                  ,
+       _nb_ooo_engine                                 ,
+       _nb_packet                                     ,
+       _size_general_data                             ,
+       _size_special_data                             ,
+       _max_nb_general_register                       ,
+       _max_nb_special_register                       ,
+       _max_size_store_queue                          ,
+       _max_size_load_queue                           ,
+       _read_unit_to_execution_unit_priority          ,
+       _read_unit_to_execution_unit_table_routing     ,
+       _read_unit_to_execution_unit_table_execute_type,
+       _read_unit_to_execution_unit_table_thread      );
+    
+    _param_execution_unit_to_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Parameters
+      (_nb_execute_unit                           ,
+       _nb_write_unit                             ,
+       _nb_context                                ,
+       _nb_front_end                              ,
+       _nb_ooo_engine                             ,
+       _nb_packet                                 ,
+       _size_general_data                         ,
+       _size_special_data                         ,
+       _max_nb_general_register                   ,
+       _max_nb_special_register                   ,
+       _execution_unit_to_write_unit_priority     ,
+       _execution_unit_to_write_unit_table_routing,
+       _execution_unit_to_write_unit_table_thread );
+      
+    _param_register_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters
+	(_nb_ooo_engine             ,
+	 _size_general_data         ,
+	 _size_special_data         ,
+	 _nb_gpr_read               ,
+	 _nb_gpr_write              ,
+	 _nb_gpr_bank               ,
+	 _nb_gpr_port_read_by_bank  ,
+	 _nb_gpr_port_write_by_bank ,
+	 _nb_spr_read               ,
+	 _nb_spr_write              ,
+	 _nb_spr_bank               ,
+	 _nb_spr_port_read_by_bank  ,
+	 _nb_spr_port_write_by_bank ,
+	 _nb_general_register       ,
+	 _nb_special_register       ,
+	 _nb_inst_insert_rob        ,
+	 _nb_inst_retire_rob        );
+
+    
+    _max_size_dcache_context_id = 0;
+    _max_size_dcache_packet_id  = 0;
+    
+    for (uint32_t i=0; i<_nb_load_store_unit; i++)    
+      {
+	if (_param_load_store_unit [i]->_size_dcache_context_id > _max_size_dcache_context_id) _max_size_dcache_context_id = _param_load_store_unit [i]->_size_dcache_context_id;
+	if (_param_load_store_unit [i]->_size_dcache_packet_id  > _max_size_dcache_packet_id)  _max_size_dcache_packet_id  = _param_load_store_unit [i]->_size_dcache_packet_id;
+      }
+
+    _have_port_dcache_context_id = (_max_size_dcache_context_id>1);
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Execute_loop::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+//     test();
+
+//     log_printf(FUNC,Execute_loop,FUNCTION,"End");
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::~Parameters"
+  Parameters::~Parameters () 
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    delete [] _param_read_unit;
+    delete [] _param_functionnal_unit;
+    delete [] _param_load_store_unit;
+    delete [] _param_write_unit;
+    delete    _param_read_unit_to_execution_unit;
+    delete    _param_execution_unit_to_write_unit;
+    delete    _param_register_unit;
+
+    delete [] _read_unit_to_execution_unit_table_execute_type;
+    delete [] _read_unit_nb_register_write;
+    delete [] _read_unit_nb_bypass_write;
+    delete [] _read_unit_nb_bypass_memory;
+    delete [] _set_read_unit_source_register_write ;
+    delete [] _set_read_unit_source_bypass_write   ;
+    delete [] _set_read_unit_source_bypass_memory  ;
+    delete [] _link_read_unit_with_load_store_unit;
+    delete [] _link_read_unit_with_write_unit;
+    delete [] _link_read_unit_with_thread;
+    delete [] _is_load_store_unit;
+    delete [] _translate_num_execute_unit;
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_msg_error.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_msg_error.cpp	(revision 78)
@@ -0,0 +1,37 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    Parameters_test test ("Execute_loop");
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+
+    return test;
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp	(revision 78)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp	(revision 78)
@@ -0,0 +1,140 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    XML xml ("execute_loop");
+
+    xml.balise_open("execute_loop");
+    xml.singleton_begin("nb_read_unit                         "); xml.attribut("value",toString(_nb_read_unit                         )); xml.singleton_end();
+    xml.singleton_begin("nb_functionnal_unit                  "); xml.attribut("value",toString(_nb_functionnal_unit                  )); xml.singleton_end();
+    xml.singleton_begin("nb_load_store_unit                   "); xml.attribut("value",toString(_nb_load_store_unit                   )); xml.singleton_end();
+    xml.singleton_begin("nb_write_unit                        "); xml.attribut("value",toString(_nb_write_unit                        )); xml.singleton_end();
+    xml.singleton_begin("nb_context                           "); xml.attribut("value",toString(_nb_context                           )); xml.singleton_end();
+    xml.singleton_begin("nb_front_end                         "); xml.attribut("value",toString(_nb_front_end                         )); xml.singleton_end();
+    xml.singleton_begin("nb_ooo_engine                        "); xml.attribut("value",toString(_nb_ooo_engine                        )); xml.singleton_end();
+    xml.singleton_begin("nb_packet                            "); xml.attribut("value",toString(_nb_packet                            )); xml.singleton_end();
+    xml.singleton_begin("size_general_data                    "); xml.attribut("value",toString(_size_general_data                    )); xml.singleton_end();
+    xml.singleton_begin("size_special_data                    "); xml.attribut("value",toString(_size_special_data                    )); xml.singleton_end();
+    xml.singleton_begin("nb_gpr_bank                          "); xml.attribut("value",toString(_nb_gpr_bank                          )); xml.singleton_end();
+    xml.singleton_begin("nb_gpr_port_read_by_bank             "); xml.attribut("value",toString(_nb_gpr_port_read_by_bank             )); xml.singleton_end();
+    xml.singleton_begin("nb_gpr_port_write_by_bank            "); xml.attribut("value",toString(_nb_gpr_port_write_by_bank            )); xml.singleton_end();
+    xml.singleton_begin("nb_spr_bank                          "); xml.attribut("value",toString(_nb_spr_bank                          )); xml.singleton_end();
+    xml.singleton_begin("nb_spr_port_read_by_bank             "); xml.attribut("value",toString(_nb_spr_port_read_by_bank             )); xml.singleton_end();
+    xml.singleton_begin("nb_spr_port_write_by_bank            "); xml.attribut("value",toString(_nb_spr_port_write_by_bank            )); xml.singleton_end();
+    xml.singleton_begin("execution_unit_to_write_unit_priority"); xml.attribut("value",toString(_execution_unit_to_write_unit_priority)); xml.singleton_end();
+    xml.singleton_begin("read_unit_to_execution_unit_priority "); xml.attribut("value",toString(_read_unit_to_execution_unit_priority )); xml.singleton_end();
+
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      {
+	xml.balise_open_begin("component");
+	xml. attribut("type","read_unit");
+	xml. attribut("id"  ,toString(i));
+	xml.balise_open_end();
+	xml. singleton_begin("size_read_queue         "); xml.attribut("value",toString(_size_read_queue          [i])); xml.singleton_end();
+	xml. singleton_begin("size_reservation_station"); xml.attribut("value",toString(_size_reservation_station [i])); xml.singleton_end();
+	xml. singleton_begin("nb_inst_retire          "); xml.attribut("value",toString(_nb_inst_retire           [i])); xml.singleton_end();
+	xml.balise_close();
+      }
+
+    for (uint32_t i=0; i<_nb_load_store_unit; i++)
+      {
+	xml.balise_open_begin("component");
+	xml. attribut("type","load_store_unit");
+	xml. attribut("id"  ,toString(i));
+	xml.balise_open_end();
+	xml. singleton_begin("size_store_queue             "); xml.attribut("value",toString(_size_store_queue             [i])); xml.singleton_end();
+	xml. singleton_begin("size_load_queue              "); xml.attribut("value",toString(_size_load_queue              [i])); xml.singleton_end();
+	xml. singleton_begin("size_speculative_access_queue"); xml.attribut("value",toString(_size_speculative_access_queue[i])); xml.singleton_end();
+	xml. singleton_begin("nb_port_check                "); xml.attribut("value",toString(_nb_port_check                [i])); xml.singleton_end();
+	xml. singleton_begin("speculative_load             "); xml.attribut("value",toString(_speculative_load             [i])); xml.singleton_end();
+	xml. singleton_begin("nb_bypass_memory             "); xml.attribut("value",toString(_nb_bypass_memory             [i])); xml.singleton_end();
+	xml.balise_close();
+      }
+
+    for (uint32_t i=0; i<_nb_write_unit; i++)
+      {
+	xml.balise_open_begin("component");
+	xml. attribut("type","write_unit");
+	xml. attribut("id"  ,toString(i));
+	xml.balise_open_end();
+	xml. singleton_begin("size_write_queue  "); xml.attribut("value",toString(_size_write_queue   [i])); xml.singleton_end();
+	xml. singleton_begin("size_execute_queue"); xml.attribut("value",toString(_size_execute_queue [i])); xml.singleton_end();
+	xml. singleton_begin("nb_bypass_write   "); xml.attribut("value",toString(_nb_bypass_write    [i])); xml.singleton_end();
+	xml.balise_close();
+      }
+
+    for (uint32_t i=0; i<_nb_ooo_engine; i++)
+      {
+	xml.balise_open_begin("component");
+	xml. attribut("type","ooo_engine");
+	xml. attribut("id"  ,toString(i));
+	xml.balise_open_end();
+	xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end();
+	xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end();
+	xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob  [i])); xml.singleton_end();
+	xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob  [i])); xml.singleton_end();
+	xml.balise_close();
+      }
+
+
+    std::string str = "";
+    for (uint32_t i=0; i<_nb_read_unit; i++)
+      str += _param_read_unit [i]->print(depth+1);
+    for (uint32_t i=0; i<_nb_functionnal_unit; i++)
+      str += _param_functionnal_unit [i]->print(depth+1);
+    for (uint32_t i=0; i<_nb_load_store_unit; i++)
+      str += _param_load_store_unit [i]->print(depth+1);
+    for (uint32_t i=0; i<_nb_write_unit; i++)
+    str += _param_write_unit [i]->print(depth+1);
+    str += _param_read_unit_to_execution_unit->print(depth+1);
+    str += _param_execution_unit_to_write_unit->print(depth+1);
+    str += _param_register_unit->print(depth+1);
+
+    xml.comment("\n"+str);
+
+    xml.balise_close();
+
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Execute_loop::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters & x)
+  {
+    log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
+
+    output_stream << x.print(0);
+    
+    log_printf(FUNC,Execute_loop,FUNCTION,"End");
+
+    return output_stream;
+  };
+
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
