Index: trunk/IPs/systemC/Environnement/Cache/Makefile =================================================================== --- trunk/IPs/systemC/Environnement/Cache/Makefile (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/Makefile (revision 78) @@ -0,0 +1,24 @@ +#-----[ Directory ]---------------------------------------- + +DIR_QUEUE = ../Queue + +#-----[ Variable ]----------------------------------------- + +OBJECTS_DEPS = $(patsubst $(DIR_QUEUE)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_QUEUE)/*.cpp)) + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) --directory=$(DIR_QUEUE) all; \ + $(MAKE) all_environnement; + +clean : + @\ + $(MAKE) --directory=$(DIR_QUEUE) clean; \ + $(MAKE) environnement_clean; + +help : + @$(MAKE) environnement_help + +include ../Makefile.Environnement Index: trunk/IPs/systemC/Environnement/Cache/include/Cache.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache.h (revision 78) @@ -0,0 +1,43 @@ +#ifndef ENVIRONNEMENT_CACHE_H +#define ENVIRONNEMENT_CACHE_H + +#include "Cache_Parameters.h" +#include "Cache_MultiLevel.h" +#include "Types.h" + +namespace environnement { +namespace cache { + + class Cache + { + private : std::string name ; + protected : Parameters * param ; + + protected : cache_multilevel::Cache_MultiLevel ** icache_dedicated; + protected : cache_multilevel::Cache_MultiLevel ** dcache_dedicated; + protected : cache_multilevel::Cache_MultiLevel * cache_shared ; + + public : Cache (std::string name, + Parameters * param); + public : ~Cache (void); + + public : void reset (void); + public : void transition (void); + private : uint32_t range_port (cache_t type_cache, + uint32_t num_entity); + public : uint32_t latence (cache_t type_cache, + uint32_t num_entity, + uint32_t num_port , + uint32_t address , + uint32_t trdid , + type_req_cache_t type , + direction_req_cache_t dir ); + + public : std::string information (uint32_t depth); + + public : friend std::ostream& operator<< (std::ostream& output, Cache & x); + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel.h (revision 78) @@ -0,0 +1,34 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_MULTILEVEL_H +#define ENVIRONNEMENT_CACHE_CACHE_MULTILEVEL_H + +#include "Cache_MultiLevel_Parameters.h" +#include "Cache_MultiLevel_Access.h" +#include "Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + class Cache_MultiLevel + { + protected : std::string name; + public : Parameters * param; + protected : cache_onelevel::Cache_OneLevel ** hierarchy_cache; + + public : Cache_MultiLevel (std::string name, Parameters * param); + public : ~Cache_MultiLevel (void); + + public : void reset (void); + public : void transition (void); + public : Access access (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir); + public : uint32_t latence (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir); + public : uint32_t update_access (Access cur_access); + + public : std::string information (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output, Cache_MultiLevel & x); + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel_Access.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel_Access.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel_Access.h (revision 78) @@ -0,0 +1,46 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_MULTILEVEL_ACCESS_H +#define ENVIRONNEMENT_CACHE_CACHE_MULTILEVEL_ACCESS_H + +#include "Types.h" + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + class Access + { + public : uint32_t num_port ; + public : type_rsp_cache_t hit ; // result of access + public : uint32_t latence ; // Latence of access + public : uint32_t last_nb_level; // if access is not a hit : last level of cache before a error + + public : Access () + { + } + + public : Access (uint32_t num_port , + type_rsp_cache_t hit , + uint32_t latence , + uint32_t last_nb_level) + { + this->num_port = num_port ; + this->hit = hit ; + this->latence = latence ; + this->last_nb_level = last_nb_level; + } + + friend std::ostream& operator<< (std::ostream& output, const Access & x) + { + output << "[" << x.num_port << "] " + << x.hit << " " + << x.latence << " " + << x.last_nb_level; + return output; + } + };//Access + +}; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel_Parameters.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel_Parameters.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_MultiLevel_Parameters.h (revision 78) @@ -0,0 +1,84 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_MULTILEVEL_PARAMETERS_H +#define ENVIRONNEMENT_CACHE_CACHE_MULTILEVEL_PARAMETERS_H + +#include +#include + +#include "Cache_OneLevel_Parameters.h" + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + class Parameters + { + public : uint32_t nb_level ; + public : uint32_t nb_port ; + + public : cache_onelevel::Parameters ** param_cache; + + public : Parameters (uint32_t nb_level , + uint32_t nb_port , + uint32_t * nb_line , + uint32_t * size_line , + uint32_t * size_word , + uint32_t * associativity, + uint32_t * hit_latence , + uint32_t * miss_penality) + { + this->nb_level = nb_level; + this->nb_port = nb_port ; + + param_cache = new cache_onelevel::Parameters * [nb_level]; + for (uint32_t i=0; iprint(depth+1) << std::endl; + + return str.str(); + } + + + friend std::ostream& operator<< (std::ostream& output, Parameters &x) + { + output << x.print(0); + return output; + } + + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel.h (revision 78) @@ -0,0 +1,57 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_H +#define ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_H + +#include "Cache_OneLevel_Access_Port.h" +#include "Cache_OneLevel_Address.h" +#include "Cache_OneLevel_Tag.h" +#include "Cache_OneLevel_Write_Buffer.h" +#include "Cache_OneLevel_Parameters.h" +#include "../../Queue/include/Sort_Queue_Dynamic.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + class Cache_OneLevel + { + protected : std::string name; + protected : Parameters * param; + private : Tag ** tag; + private : Access_Port * access_port; + private : Address size_address; + private : queue::Sort_Queue_Dynamic * write_buffer; + + protected : queue::Parameters * param_write_buffer; + + public : Cache_OneLevel (std::string name, + Parameters * param); + + public : ~Cache_OneLevel (void); + + + + public : void reset (void); + public : void transition (void); + private : void update_lru (uint32_t familly, uint32_t num_associativity); + private : uint32_t index_victim (uint32_t familly); + private : Address translate_address (uint32_t address); + public : type_rsp_cache_t access (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir); + private : type_rsp_cache_t access_cached (uint32_t num_port, uint32_t address, uint32_t trdid, direction_req_cache_t dir); + private : type_rsp_cache_t access_uncached (uint32_t num_port, uint32_t address, uint32_t trdid); + private : type_rsp_cache_t access_invalidate (uint32_t num_port, uint32_t address, uint32_t trdid); + private : type_rsp_cache_t access_flush (uint32_t num_port, uint32_t address, uint32_t trdid); + private : uint32_t hit_write_buffer (uint32_t trdid, Address address); + private : uint32_t hit_cache (uint32_t trdid, Address address); + private : uint32_t hit_access_port (uint32_t trdid, Address address); + public : uint32_t need_slot (void); + public : uint32_t latence (uint32_t num_port); + public : uint32_t update_latence (uint32_t num_port, uint32_t latence); + public : std::string information (uint32_t depth); + + public : friend std::ostream& operator<< (std::ostream& output, Cache_OneLevel & x); + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Access_Port.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Access_Port.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Access_Port.h (revision 78) @@ -0,0 +1,37 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_ACCESS_PORT_H +#define ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_ACCESS_PORT_H + +#include +#include "Types.h" +#include "Cache_OneLevel_Address.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + class Access_Port + { + public : bool valid; + public : Address address; + public : uint32_t trdid; + public : type_rsp_cache_t hit; + public : uint32_t num_associativity; // on hit : update lru + public : uint32_t latence; // on miss : wait + + friend std::ostream& operator<< (std::ostream& output, const Access_Port &x) + { + output << x.valid << " " + << x.hit << " " + << x.address << " " + << x.trdid << " " + << x.num_associativity << " " + << x.latence; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Address.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Address.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Address.h (revision 78) @@ -0,0 +1,32 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_ADDRESS_H +#define ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_ADDRESS_H + +#include +#include + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + class Address + { + public : uint32_t tag; + public : uint32_t familly; + public : uint32_t offset; + + friend std::ostream& operator<< (std::ostream& output, const Address &x) + { + output << std::hex + << std::setw(8) << std::setfill('0') << x.tag << " " + << std::setw(8) << std::setfill('0') << x.familly << " " + << std::setw(8) << std::setfill('0') << x.offset + << std::dec; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Parameters.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Parameters.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Parameters.h (revision 78) @@ -0,0 +1,105 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_PARAMETERS_H +#define ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_PARAMETERS_H + +#include +#include +#include + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + class Parameters + { + public : uint32_t nb_port ; + public : uint32_t nb_line ; + public : uint32_t size_line ; + public : uint32_t size_word ; + public : uint32_t associativity; + public : uint32_t hit_latence ; + public : uint32_t miss_penality; + + public : Parameters (uint32_t nb_port , + uint32_t nb_line , + uint32_t size_line , + uint32_t size_word , + uint32_t associativity, + uint32_t hit_latence , + uint32_t miss_penality) + { + this->nb_port = nb_port ; + this->nb_line = nb_line ; + this->size_line = size_line ; + this->size_word = size_word ; + this->associativity = associativity; + this->hit_latence = hit_latence ; + this->miss_penality = miss_penality; + + if ((nb_line * size_line * associativity) == 0) + { + std::cerr << "{Cache_OneLevel} all parameter must be greater that 0" << std::endl; + exit(1); + } + if ((nb_line % associativity) != 0) + { + std::cerr << "{Cache_OneLevel} nb_line must be a mutiple of associativity" << std::endl; + exit(1); + } + + if ((double)nb_line != ::pow(2,::log2(nb_line))) + { + std::cerr << "{Cache_OneLevel} nb_line must be a mutiple of 2^n" << std::endl; + exit(1); + } + + if ((double)size_line != ::pow(2,::log2(size_line))) + { + std::cerr << "{Cache_OneLevel} size_line must be a mutiple of 2^n" << std::endl; + exit(1); + } + + if ((double)size_word != ::pow(2,::log2(size_word))) + { + std::cerr << "{Cache_OneLevel} size_word must be a mutiple of 2^n" << std::endl; + exit(1); + } + } + + public : std::string print (uint32_t depth) + { + std::string tab (depth,'\t'); + std::stringstream str; + + str << tab << "* Capacity : " << (nb_line * size_line * size_word) << " bytes" << std::endl + << tab << " * Nb line : " << nb_line << std::endl + << tab << " * Size line : " << size_line << std::endl + << tab << " * Size word (in byte) : " << size_word << std::endl + << tab << "* Timing : " << std::endl + << tab << " * Hit latence : " << hit_latence << std::endl + << tab << " * Miss penality : " << miss_penality << std::endl + << tab << "* Other : " << std::endl + << tab << " * Associativity : " << associativity << std::endl + << tab << " * Nb port : " << nb_port << std::endl; + + if (associativity == 1) + str << tab << " * Cache Direct Map"; + else + if (associativity == nb_line) + str << tab << " * Cache Full Associative"; + else + str << tab << " * Cache Semi Associative"; + return str.str(); + } + + + friend std::ostream& operator<< (std::ostream& output, Parameters &x) + { + output << x.print(0); + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Tag.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Tag.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Tag.h (revision 78) @@ -0,0 +1,32 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_TAG_H +#define ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_TAG_H + +#include +#include + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + class Tag + { + public : bool valid ; // tag is valid ? + public : uint32_t address ; // address + public : uint32_t trdid ; // owner thread identification + public : uint32_t index_lru; // to select victim + + friend std::ostream& operator<< (std::ostream& output, const Tag &x) + { + output << x.valid << " " + << std::hex << std::setw(8) << std::setfill('0') << x.address << " " << std::dec + << x.trdid << " " + << x.index_lru; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Write_Buffer.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Write_Buffer.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_OneLevel_Write_Buffer.h (revision 78) @@ -0,0 +1,37 @@ +#ifndef ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_WRITE_BUFFER_H +#define ENVIRONNEMENT_CACHE_CACHE_ONELEVEL_WRITE_BUFFER_H + +#include +#include "Cache_OneLevel_Address.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + class Write_Buffer + { + public : Address address; + public : uint32_t trdid; + + public : Write_Buffer () + { + } + + public : Write_Buffer (Address address, uint32_t trdid) + { + this->address = address; + this->trdid = trdid; + } + friend std::ostream& operator<< (std::ostream& output, const Write_Buffer &x) + { + output << x.address << " " + << x.trdid; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Cache_Parameters.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Cache_Parameters.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Cache_Parameters.h (revision 78) @@ -0,0 +1,138 @@ +#ifndef ENVIRONNEMENT_CACHE_PARAMETERS_H +#define ENVIRONNEMENT_CACHE_PARAMETERS_H + +#include +#include + +#include "Cache_MultiLevel_Parameters.h" + +namespace environnement { +namespace cache { + + class Parameters + { + public : uint32_t nb_cache_dedicated; + public : uint32_t nb_iport; + + public : cache_multilevel::Parameters ** param_icache_dedicated; + public : cache_multilevel::Parameters ** param_dcache_dedicated; + public : cache_multilevel::Parameters * param_cache_shared; + + public : Parameters (uint32_t nb_cache_dedicated , + uint32_t * icache_dedicated_nb_level , + uint32_t * icache_dedicated_nb_port , + uint32_t ** icache_dedicated_nb_line , + uint32_t ** icache_dedicated_size_line , + uint32_t ** icache_dedicated_size_word , + uint32_t ** icache_dedicated_associativity, + uint32_t ** icache_dedicated_hit_latence , + uint32_t ** icache_dedicated_miss_penality, + uint32_t * dcache_dedicated_nb_level , + uint32_t * dcache_dedicated_nb_port , + uint32_t ** dcache_dedicated_nb_line , + uint32_t ** dcache_dedicated_size_line , + uint32_t ** dcache_dedicated_size_word , + uint32_t ** dcache_dedicated_associativity, + uint32_t ** dcache_dedicated_hit_latence , + uint32_t ** dcache_dedicated_miss_penality, + uint32_t cache_shared_nb_level , +// uint32_t cache_shared_nb_port , + uint32_t * cache_shared_nb_line , + uint32_t * cache_shared_size_line , + uint32_t * cache_shared_size_word , + uint32_t * cache_shared_associativity , + uint32_t * cache_shared_hit_latence , + uint32_t * cache_shared_miss_penality ) + { + this->nb_cache_dedicated = nb_cache_dedicated; + + uint32_t cache_shared_nb_port = 0; + uint32_t nb_iport = 0; + for (uint32_t i=0; iprint(depth+1) << std::endl; + + for (uint32_t i=0; iprint(depth+1) << std::endl; + + str << tab << " * CACHE SHARED" << std::endl; + str << param_cache_shared->print(depth+1) << std::endl; + + return str.str(); + } + + friend std::ostream& operator<< (std::ostream& output, Parameters &x) + { + output << x.print(0); + return output; + } + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/include/Types.h =================================================================== --- trunk/IPs/systemC/Environnement/Cache/include/Types.h (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/include/Types.h (revision 78) @@ -0,0 +1,55 @@ +#ifndef ENVIRONNEMENT_CACHE_TYPES_H +#define ENVIRONNEMENT_CACHE_TYPES_H + +namespace environnement { +namespace cache { + + // ===================================================== + // =====[ CACHE ]======================================= + // ===================================================== + + typedef enum + { + INSTRUCTION_CACHE , + DATA_CACHE + } cache_t; + + // ===================================================== + // =====[ DIRECTION ]=================================== + // ===================================================== + + typedef enum + { + READ , + WRITE , + NONE + } direction_req_cache_t; + + // ===================================================== + // =====[ REQUEST ]===================================== + // ===================================================== + + typedef enum + { + CACHED , // address can be in the cache + UNCACHED , // Always miss (not address in cache) + INVALIDATE , // The direction is not used + PREFETCH , // The direction is not used + FLUSH // The direction is not used + } type_req_cache_t; + + // ===================================================== + // =====[ RESPONS ]===================================== + // ===================================================== + + typedef enum + { + HIT_CACHE , + HIT_BYPASS , + HIT_WRITE_BUFFER , + MISS + } type_rsp_cache_t; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Cache/selftest/main.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/selftest/main.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/selftest/main.cpp (revision 78) @@ -0,0 +1,590 @@ +#include +#include "../include/Cache.h" + +using namespace std; +using namespace environnement; +using namespace environnement::cache; + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ + } while (0) + + + +int main (void) +{ + cout << "
Begin" << endl; + + { + cache_onelevel::Parameters * param = new cache_onelevel::Parameters + ( + 4, // nb_port + 32, // nb_line + 8, // size_line + 4,// size_word + 4, // associativity + 2, // hit_latence + 3 // miss_penality + ); + + cout << *param << endl; + + cache_onelevel::Cache_OneLevel * cache = new cache_onelevel::Cache_OneLevel ("my_cache",param); + cache->reset(); + + cout << *cache << endl; + + cache->transition(); + cache->transition(); + + cout << *cache << endl; + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), MISS); + TEST(cache->latence(0), 5); + cache->transition(); // miss cycle 1 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_WRITE_BUFFER); + TEST(cache->latence(0), 4); + cache->transition(); // miss cycle 2 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_WRITE_BUFFER); + TEST(cache->latence(0), 3); + cache->transition(); // miss cycle 3 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE); //word 0 + TEST(cache->latence(0), 2); + + TEST(cache->access(0, 0x104, 0, CACHED, WRITE), HIT_CACHE); //word 1 + TEST(cache->access(0, 0x108, 0, CACHED, WRITE), HIT_CACHE); //word 2 + TEST(cache->access(0, 0x10c, 0, CACHED, WRITE), HIT_CACHE); //word 3 + TEST(cache->access(0, 0x110, 0, CACHED, WRITE), HIT_CACHE); //word 4 + TEST(cache->access(0, 0x114, 0, CACHED, WRITE), HIT_CACHE); //word 5 + TEST(cache->access(0, 0x118, 0, CACHED, WRITE), HIT_CACHE); //word 6 + TEST(cache->access(0, 0x11c, 0, CACHED, WRITE), HIT_CACHE); //word 7 + TEST(cache->access(0, 0x120, 0, CACHED, WRITE), MISS ); + TEST(cache->access(1, 0x140, 0, CACHED, WRITE), MISS ); + TEST(cache->access(2, 0x160, 0, CACHED, WRITE), MISS ); + TEST(cache->access(3, 0x144, 0, CACHED, WRITE), HIT_BYPASS); + + TEST(cache->latence(0), 5); + TEST(cache->latence(1), 5); + TEST(cache->latence(2), 5); + TEST(cache->latence(3), 5); + + cache->transition(); // miss access + TEST(cache->access(0, 0x180, 0, CACHED, WRITE), MISS ); + TEST(cache->access(1, 0x1a0, 0, CACHED, WRITE), MISS ); + TEST(cache->access(2, 0x1c0, 0, CACHED, WRITE), MISS ); + TEST(cache->access(3, 0x1e0, 0, CACHED, WRITE), MISS ); + + cache->transition(); // miss cycle 1 + cout << *cache << endl; + + TEST(cache->access(0, 0x200, 0, CACHED, WRITE), MISS ); + TEST(cache->access(1, 0x300, 0, CACHED, WRITE), MISS ); + TEST(cache->access(2, 0x400, 0, CACHED, WRITE), MISS ); + + cache->transition(); // miss cycle 0 + cache->transition(); // miss cycle 1 + cache->transition(); // miss cycle 2 + cache->transition(); // miss cycle 3 + cout << *cache << endl; + + // line 0 : all way is use + TEST(cache->access(0, 0x118, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x204, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x100, 0,UNCACHED, WRITE), MISS ); + TEST(cache->access(3, 0x118, 0, CACHED, WRITE), HIT_BYPASS); + + TEST(cache->latence(0), 2); + TEST(cache->latence(1), 2); + TEST(cache->latence(2), 5); + TEST(cache->latence(3), 2); + + cache->transition(); + cout << *cache << endl; + + TEST(cache->access(0, 0x500, 0, CACHED, WRITE), MISS ); + + cache->transition(); // miss cycle 1 + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x200, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x300, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(3, 0x400, 0, CACHED, WRITE), HIT_CACHE ); + + cache->transition(); // miss cycle 2 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x200, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x300, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(3, 0x400, 0, CACHED, WRITE), HIT_CACHE ); + + cache->transition(); // miss cycle 3 + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x200, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x300, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(3, 0x400, 0, CACHED, WRITE), MISS ); + + TEST(cache->latence(0), 2); + TEST(cache->latence(1), 2); + TEST(cache->latence(2), 2); + TEST(cache->latence(3), 5); + + cout << *cache << endl; + + delete cache; + delete param; + } + + { + uint32_t * nb_line = new uint32_t [3]; + uint32_t * size_line = new uint32_t [3]; + uint32_t * size_word = new uint32_t [3]; + uint32_t * associativity = new uint32_t [3]; + uint32_t * hit_latence = new uint32_t [3]; + uint32_t * miss_penality = new uint32_t [3]; + + nb_line [0] = 4 ; nb_line [1] = 4 ; nb_line [2] = 4 ; + size_line [0] = 8 ; size_line [1] = 8 ; size_line [2] = 8 ; + size_word [0] = 4 ; size_word [1] = 4 ; size_word [2] = 4 ; + associativity [0] = 1 ; associativity [1] = 2 ; associativity [2] = 4 ; + hit_latence [0] = 1 ; hit_latence [1] = 2 ; hit_latence [2] = 2 ; + miss_penality [0] = 3 ; miss_penality [1] = 5 ; miss_penality [2] = 7 ; + + cache_multilevel::Parameters * param = new cache_multilevel::Parameters + ( + 3, // nb_level + 4, // nb_port + nb_line , + size_line , + size_word , + associativity, + hit_latence , + miss_penality + ); + + cout << *param << endl; + + cache_multilevel::Cache_MultiLevel * cache = new cache_multilevel::Cache_MultiLevel ("my_cache",param); + + cout << *cache << endl; + cache->reset(); + cout << *cache << endl; + + cache_multilevel::Access access; + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , MISS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 2); + + cache->transition(); //19 + cache->transition(); //18 + cache->transition(); //17 + cache->transition(); //16 + cache->transition(); //15 + cache->transition(); //14 + cache->transition(); //13 + cache->transition(); //12 + cache->transition(); //11 + cache->transition(); //10 + cout << *cache << endl; + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 10); + TEST(access.last_nb_level, 0); + + cache->transition(); // 9 + cache->transition(); // 8 + cache->transition(); // 7 + cache->transition(); // 6 + cache->transition(); // 5 + cache->transition(); // 4 + cache->transition(); // 3 + cache->transition(); // 2 + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 2); + TEST(access.last_nb_level, 0); + + cache->transition(); // 1 + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + cout << *cache << endl; + + cache->transition(); + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (1, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , MISS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 2); + + access = cache->access (2, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 2); + TEST(access.hit , HIT_BYPASS); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (3, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 3); + TEST(access.hit , HIT_BYPASS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 0); + + cache->transition(); //19 + cache->transition(); //18 + cache->transition(); //17 + cache->transition(); //16 + cache->transition(); //15 + + +// access = cache->access (1, 0x300, 0, CACHED, WRITE); +// cache->update_access(access); + +// TEST(access.num_port , 1); +// TEST(access.hit , MISS); +// TEST(access.latence , 20); +// TEST(access.last_nb_level, 2); + + cache->transition(); //14 + cache->transition(); //13 + cache->transition(); //12 + cache->transition(); //11 + cache->transition(); //10 + cout << *cache << endl; + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (1, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 10); + TEST(access.last_nb_level, 0); + + access = cache->access (2, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 2); + TEST(access.hit , HIT_BYPASS); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (3, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 3); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 10); + TEST(access.last_nb_level, 0); + + cache->transition(); //9 + + access = cache->access (1, 0x400, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , MISS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 2); + + cache->transition(); //8 + cache->transition(); //7 + cache->transition(); //6 + cache->transition(); //5 + cache->transition(); //4 + cache->transition(); //3 + cache->transition(); //2 + cache->transition(); //1 + cache->transition(); //0 + + access = cache->access (1, 0x100, 0, CACHED, WRITE); + cout << access<< endl; + + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 6 ); + TEST(access.last_nb_level, 1); + + cout << *cache << endl; + delete cache; + delete param; + delete [] nb_line ; + delete [] size_line ; + delete [] size_word ; + delete [] associativity; + delete [] hit_latence ; + delete [] miss_penality; + } + + { + uint32_t * cache_shared_nb_line = new uint32_t [1]; + uint32_t * cache_shared_size_line = new uint32_t [1]; + uint32_t * cache_shared_size_word = new uint32_t [1]; + uint32_t * cache_shared_associativity = new uint32_t [1]; + uint32_t * cache_shared_hit_latence = new uint32_t [1]; + uint32_t * cache_shared_miss_penality = new uint32_t [1]; + + cache_shared_nb_line [0] = 8 ; + cache_shared_size_line [0] = 8 ; + cache_shared_size_word [0] = 4 ; + cache_shared_associativity [0] = 4 ; + cache_shared_hit_latence [0] = 2 ; + cache_shared_miss_penality [0] = 5 ; + + uint32_t * icache_nb_level = new uint32_t [2]; + uint32_t * icache_nb_port = new uint32_t [2]; + uint32_t ** icache_nb_line = new uint32_t * [2]; + uint32_t ** icache_size_line = new uint32_t * [2]; + uint32_t ** icache_size_word = new uint32_t * [2]; + uint32_t ** icache_associativity = new uint32_t * [2]; + uint32_t ** icache_hit_latence = new uint32_t * [2]; + uint32_t ** icache_miss_penality = new uint32_t * [2]; + + icache_nb_level [0] = 1; + icache_nb_port [0] = 2; + icache_nb_line [0] = new uint32_t [1]; + icache_size_line [0] = new uint32_t [1]; + icache_size_word [0] = new uint32_t [1]; + icache_associativity [0] = new uint32_t [1]; + icache_hit_latence [0] = new uint32_t [1]; + icache_miss_penality [0] = new uint32_t [1]; + + icache_nb_line [0][0] = 8; + icache_size_line [0][0] = 8; + icache_size_word [0][0] = 4; + icache_associativity [0][0] = 1; + icache_hit_latence [0][0] = 1; + icache_miss_penality [0][0] = 3; + + icache_nb_level [1] = 2; + icache_nb_port [1] = 2; + icache_nb_line [1] = new uint32_t [2]; + icache_size_line [1] = new uint32_t [2]; + icache_size_word [1] = new uint32_t [2]; + icache_associativity [1] = new uint32_t [2]; + icache_hit_latence [1] = new uint32_t [2]; + icache_miss_penality [1] = new uint32_t [2]; + + icache_nb_line [1][0] = 4; + icache_size_line [1][0] = 8; + icache_size_word [1][0] = 4; + icache_associativity [1][0] = 1; + icache_hit_latence [1][0] = 1; + icache_miss_penality [1][0] = 3; + + icache_nb_line [1][1] = 4; + icache_size_line [1][1] = 8; + icache_size_word [1][1] = 4; + icache_associativity [1][1] = 4; + icache_hit_latence [1][1] = 1; + icache_miss_penality [1][1] = 4; + + uint32_t * dcache_nb_level = new uint32_t [2]; + uint32_t * dcache_nb_port = new uint32_t [2]; + uint32_t ** dcache_nb_line = new uint32_t * [2]; + uint32_t ** dcache_size_line = new uint32_t * [2]; + uint32_t ** dcache_size_word = new uint32_t * [2]; + uint32_t ** dcache_associativity = new uint32_t * [2]; + uint32_t ** dcache_hit_latence = new uint32_t * [2]; + uint32_t ** dcache_miss_penality = new uint32_t * [2]; + + dcache_nb_level [0] = 1; + dcache_nb_port [0] = 2; + dcache_nb_line [0] = new uint32_t [1]; + dcache_size_line [0] = new uint32_t [1]; + dcache_size_word [0] = new uint32_t [1]; + dcache_associativity [0] = new uint32_t [1]; + dcache_hit_latence [0] = new uint32_t [1]; + dcache_miss_penality [0] = new uint32_t [1]; + + dcache_nb_line [0][0] = 8; + dcache_size_line [0][0] = 8; + dcache_size_word [0][0] = 4; + dcache_associativity [0][0] = 1; + dcache_hit_latence [0][0] = 1; + dcache_miss_penality [0][0] = 3; + + dcache_nb_level [1] = 2; + dcache_nb_port [1] = 2; + dcache_nb_line [1] = new uint32_t [2]; + dcache_size_line [1] = new uint32_t [2]; + dcache_size_word [1] = new uint32_t [2]; + dcache_associativity [1] = new uint32_t [2]; + dcache_hit_latence [1] = new uint32_t [2]; + dcache_miss_penality [1] = new uint32_t [2]; + + dcache_nb_line [1][0] = 4; + dcache_size_line [1][0] = 8; + dcache_size_word [1][0] = 4; + dcache_associativity [1][0] = 1; + dcache_hit_latence [1][0] = 1; + dcache_miss_penality [1][0] = 3; + + dcache_nb_line [1][1] = 4; + dcache_size_line [1][1] = 8; + dcache_size_word [1][1] = 4; + dcache_associativity [1][1] = 4; + dcache_hit_latence [1][1] = 1; + dcache_miss_penality [1][1] = 4; + + Parameters * param = new Parameters + (2,//nb_cache_dedicated + + icache_nb_level , + icache_nb_port , + icache_nb_line , + icache_size_line , + icache_size_word , + icache_associativity , + icache_hit_latence , + icache_miss_penality , + + dcache_nb_level , + dcache_nb_port , + dcache_nb_line , + dcache_size_line , + dcache_size_word , + dcache_associativity , + dcache_hit_latence , + dcache_miss_penality , + + 1, // nb_level + cache_shared_nb_line , + cache_shared_size_line , + cache_shared_size_word , + cache_shared_associativity, + cache_shared_hit_latence , + cache_shared_miss_penality + ); + + cout << *param << endl; + + cache::Cache * cache = new cache::Cache ("my_cache",param); + + cout << *cache << endl; + cache->reset(); + cout << *cache << endl; + + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 16); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 15); + cache->transition(); + + cout << *cache << endl; + + + delete cache; + delete param; + delete [] cache_shared_nb_line ; + delete [] cache_shared_size_line ; + delete [] cache_shared_size_word ; + delete [] cache_shared_associativity; + delete [] cache_shared_hit_latence ; + delete [] cache_shared_miss_penality; + delete [] icache_nb_level ; + delete [] icache_nb_port ; + delete [] icache_nb_line [0]; + delete [] icache_size_line [0]; + delete [] icache_size_word [0]; + delete [] icache_associativity [0]; + delete [] icache_hit_latence [0]; + delete [] icache_miss_penality [0]; + delete [] icache_nb_line [1]; + delete [] icache_size_line [1]; + delete [] icache_size_word [1]; + delete [] icache_associativity [1]; + delete [] icache_hit_latence [1]; + delete [] icache_miss_penality [1]; + delete [] icache_nb_line ; + delete [] icache_size_line ; + delete [] icache_size_word ; + delete [] icache_associativity ; + delete [] icache_hit_latence ; + delete [] icache_miss_penality ; + delete [] dcache_nb_level ; + delete [] dcache_nb_port ; + delete [] dcache_nb_line [0]; + delete [] dcache_size_line [0]; + delete [] dcache_size_word [0]; + delete [] dcache_associativity [0]; + delete [] dcache_hit_latence [0]; + delete [] dcache_miss_penality [0]; + delete [] dcache_nb_line [1]; + delete [] dcache_size_line [1]; + delete [] dcache_size_word [1]; + delete [] dcache_associativity [1]; + delete [] dcache_hit_latence [1]; + delete [] dcache_miss_penality [1]; + delete [] dcache_nb_line ; + delete [] dcache_size_line ; + delete [] dcache_size_word ; + delete [] dcache_associativity ; + delete [] dcache_hit_latence ; + delete [] dcache_miss_penality ; + } + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: trunk/IPs/systemC/Environnement/Cache/src/Cache.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache.cpp (revision 78) @@ -0,0 +1,47 @@ +#include "../include/Cache.h" +#include + +namespace environnement { +namespace cache { + + Cache::Cache (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + cache_shared = new cache_multilevel::Cache_MultiLevel (name+"_cache_shared",param->param_cache_shared); + + icache_dedicated = new cache_multilevel::Cache_MultiLevel * [param->nb_cache_dedicated]; + dcache_dedicated = new cache_multilevel::Cache_MultiLevel * [param->nb_cache_dedicated]; + + for (uint32_t i=0; inb_cache_dedicated; i++) + { + { + std::stringstream str; + str << name << "_icache_dedicated_" << i; + + icache_dedicated [i] = new cache_multilevel::Cache_MultiLevel(str.str(),param->param_icache_dedicated [i]); + } + { + std::stringstream str; + str << name << "_dcache_dedicated_" << i; + + dcache_dedicated [i] = new cache_multilevel::Cache_MultiLevel(str.str(),param->param_dcache_dedicated [i]); + } + } + } + + Cache::~Cache (void) + { + for (uint32_t i=0; inb_cache_dedicated; i++) + { + delete icache_dedicated [i]; + delete dcache_dedicated [i]; + } + delete [] icache_dedicated; + delete [] dcache_dedicated; + delete cache_shared ; + } +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel.cpp (revision 78) @@ -0,0 +1,34 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + Cache_MultiLevel::Cache_MultiLevel (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + hierarchy_cache = new cache_onelevel::Cache_OneLevel * [param->nb_level]; + + for (uint32_t i=0; inb_level; i++) + { + std::stringstream str; + + str << name << "_level_" << i; + + hierarchy_cache[i] = new cache_onelevel::Cache_OneLevel (str.str(), param->param_cache[i]); + } + } + + Cache_MultiLevel::~Cache_MultiLevel (void) + { + for (uint32_t i=0; inb_level; i++) + delete hierarchy_cache [i]; + delete [] hierarchy_cache; + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_access.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_access.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_access.cpp (revision 78) @@ -0,0 +1,39 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + Access Cache_MultiLevel::access (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir) + { + uint32_t time = 0; + uint32_t last_nb_level = (param->nb_level==0)?0:(param->nb_level-1); + type_rsp_cache_t hit = MISS; + + // Scan all cache level + for (uint32_t i = 0; i < param->nb_level; i ++) + { + hit = hierarchy_cache[i]->access (num_port,address,trdid,type,dir); + time += hierarchy_cache[i]->latence(num_port); + + std::cout << "SETH : " + << " * i : " << i + << " * hit : " << hit + << " * time :" << time << std::endl; + + if ( (hit == HIT_CACHE) or + (hit == HIT_WRITE_BUFFER) or + (hit == HIT_BYPASS) ) + { + last_nb_level = i; + break; + } + } + + return Access (num_port,hit,time,last_nb_level); + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_information.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_information.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_information.cpp (revision 78) @@ -0,0 +1,20 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + std::string Cache_MultiLevel::information (uint32_t depth) + { + std::string tab(depth,'\t'); + std::stringstream output; + + output << tab << "<" << name << ">" << std::endl + << param->print(depth); + + return output.str(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_latence.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_latence.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_latence.cpp (revision 78) @@ -0,0 +1,17 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + // Return the time to have the data + // latence is call on the same port in a single cycle, only the last access is save + uint32_t Cache_MultiLevel::latence (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir) + { + return update_access (access (num_port, address, trdid, type, dir)); + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_print.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_print.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_print.cpp (revision 78) @@ -0,0 +1,20 @@ +#include "../include/Cache_MultiLevel.h" + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + std::ostream& operator<< (std::ostream& output, Cache_MultiLevel & x) + { + output << x.information(0) << std::endl; + + for (uint32_t i=0; inb_level; i++) + { + output << *(x.hierarchy_cache[i]) << std::endl; + } + + return output; + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_reset.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_reset.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_reset.cpp (revision 78) @@ -0,0 +1,15 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + void Cache_MultiLevel::reset (void) + { + for (uint32_t i=0; inb_level; i++) + hierarchy_cache[i]->reset(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_transition.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_transition.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_transition.cpp (revision 78) @@ -0,0 +1,15 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + void Cache_MultiLevel::transition (void) + { + for (uint32_t i=0; inb_level; i++) + hierarchy_cache[i]->transition(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_update_access.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_update_access.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_MultiLevel_update_access.cpp (revision 78) @@ -0,0 +1,29 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_multilevel { + + uint32_t Cache_MultiLevel::update_access (Access cur_access) + { + if (cur_access.last_nb_level > 0) + { + uint32_t latence = cur_access.latence; + + for (uint32_t it = 0; it <= cur_access.last_nb_level; it ++) + latence = hierarchy_cache [it]->update_latence (cur_access.num_port,latence); + +// if (latence != 0) +// { +// std::cout << " after all update, latence must be null." << std::endl; +// exit(1); +// } + } + + return cur_access.latence; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel.cpp (revision 78) @@ -0,0 +1,38 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + Cache_OneLevel::Cache_OneLevel (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + access_port = new Access_Port [param->nb_port]; + tag = new Tag * [param->nb_line/param->associativity]; + for (uint32_t it = 0; it < param->nb_line/param->associativity; it ++) + tag [it] = new Tag [param->associativity]; + + size_address.offset = (uint32_t) log2(param->size_line * param->size_word); + size_address.familly = (uint32_t) log2(param->nb_line/param->associativity); + size_address.tag = 32 - size_address.familly - size_address.offset; + + param_write_buffer = new queue::Parameters (2); + + write_buffer = new queue::Sort_Queue_Dynamic (name+"_write_buffer",param_write_buffer); + } + + Cache_OneLevel::~Cache_OneLevel (void) + { + delete write_buffer; + delete param_write_buffer; + for (uint32_t it = 0; it < param->nb_line/param->associativity; it ++) + delete [] tag [it]; + delete [] tag; + delete [] access_port; + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access.cpp (revision 78) @@ -0,0 +1,35 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + // Return hit (true) + // uncache is to stocke the address on the cache + type_rsp_cache_t Cache_OneLevel::access (uint32_t num_port, + uint32_t address, + uint32_t trdid, + type_req_cache_t type, + direction_req_cache_t dir) + { +// std::cout << "" << std::endl +// << " * num_port : " << num_port << std::endl +// << " * address : " << std::hex << address << std::dec << std::endl +// << " * trdid : " << trdid << std::endl +// << " * type : " << type << std::endl +// << " * direction : " << dir << std::endl; + + switch (type) + { + case UNCACHED : return access_uncached (num_port,address,trdid ); break; + case INVALIDATE : return access_invalidate (num_port,address,trdid ); break; + case FLUSH : return access_flush (num_port,address,trdid ); break; + case PREFETCH : // no difference with the simple read cached (have no add a prefetch cache) + case CACHED : return access_cached (num_port,address,trdid,dir); break; + default : std::cout << " unknow type : " << std::endl; exit(1); break; + } + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_cached.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_cached.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_cached.cpp (revision 78) @@ -0,0 +1,68 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_cached (uint32_t num_port, uint32_t address, uint32_t trdid, direction_req_cache_t dir) + { + Address address_translate = translate_address(address); + uint32_t num_associativity = hit_cache (trdid, address_translate); + uint32_t num_access_port = hit_access_port (trdid, address_translate); + uint32_t num_write_buffer = hit_write_buffer (trdid, address_translate); + + if (num_access_port == param->nb_port) + num_access_port = num_port; + + uint32_t latence ; + type_rsp_cache_t res = MISS; + + bool is_in_cache = (num_associativity != param->associativity); + bool is_in_access_port = (num_access_port != num_port); + bool is_in_write_buffer = false; + + if (is_in_access_port == true) + { + res = HIT_BYPASS; + latence = access_port[num_access_port].latence; //already compute + } + else + if (is_in_cache == true) + { + res = HIT_CACHE; + latence = 0; // Hit !!! + } + else + { + + // Search in the write buffer, and test if have a miss + if ( num_write_buffer == write_buffer->nb_slot_use()) + { + res = MISS; + latence = param->miss_penality; // miss -> access at down of cache, + respons at the up of cache + } + else + { + res = HIT_WRITE_BUFFER; + is_in_write_buffer = true; + latence = write_buffer->read(num_write_buffer)._delay; + } + } + + // access_port valid = there are a new request to update + // -> no previous request in the same cycle (hit in a access port) + // -> no previous request in the previous cycle (hit in the write buffer) + + access_port[num_port].valid = ((is_in_access_port || is_in_write_buffer) == false); + access_port[num_port].address = address_translate; + access_port[num_port].trdid = trdid; + access_port[num_port].hit = res; + access_port[num_port].num_associativity = num_associativity; + access_port[num_port].latence = latence; + + return res; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_flush.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_flush.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_flush.cpp (revision 78) @@ -0,0 +1,16 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_flush (uint32_t num_port, uint32_t address, uint32_t trdid) + { + std::cerr << "<" << name << ".{Cache_OneLevel}.access_flush> Not implemented" << std::endl; + exit (0); + return MISS; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_invalidate.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_invalidate.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_invalidate.cpp (revision 78) @@ -0,0 +1,16 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_invalidate (uint32_t num_port, uint32_t address, uint32_t trdid) + { + std::cerr << "<" << name << ".{Cache_OneLevel}.access_invalidate> Not implemented" << std::endl; + exit (0); + return MISS; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_uncached.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_uncached.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_access_uncached.cpp (revision 78) @@ -0,0 +1,19 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_uncached (uint32_t num_port, uint32_t address, uint32_t trdid) + { + access_port[num_port].valid = false; + access_port[num_port].trdid = trdid; + access_port[num_port].hit = MISS; + access_port[num_port].latence = param->miss_penality; + + return MISS; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_access_port.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_access_port.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_access_port.cpp (revision 78) @@ -0,0 +1,26 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + // return the number of param->associativity if hit + // return nb_accosiativity if miss + uint32_t Cache_OneLevel::hit_access_port (uint32_t trdid, Address address) + { + uint32_t it_num_port = 0; + + // scan all port - test if have a transaction + for (it_num_port = 0; it_num_port < param->nb_port; it_num_port ++) + if ( (access_port[it_num_port].valid == true ) && + (access_port[it_num_port].trdid == trdid ) && + (access_port[it_num_port].address.tag == address.tag ) && + (access_port[it_num_port].address.familly == address.familly)) + break; + + return it_num_port; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_cache.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_cache.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_cache.cpp (revision 78) @@ -0,0 +1,27 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + uint32_t Cache_OneLevel::hit_cache (uint32_t trdid, Address address) + { + uint32_t num_associativity; + for (num_associativity = 0; num_associativity < param->associativity; num_associativity ++) + // Hit if : + // * in the line + // * in a way associative + // -> there are the same tag + // the same trdid + // is valid + if ( (tag [address.familly][num_associativity].address == address.tag) && + (tag [address.familly][num_associativity].valid == true ) && + (tag [address.familly][num_associativity].trdid == trdid ) ) + break; + + return num_associativity; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_write_buffer.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_write_buffer.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_hit_write_buffer.cpp (revision 78) @@ -0,0 +1,28 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + // If a instruction is in the write_buffer, return the position + // else, return the number of elt in the write_buffer + uint32_t Cache_OneLevel::hit_write_buffer (uint32_t trdid, Address address) + { + uint32_t num_write_buffer = 0; + // Scan the write_buffer + for (num_write_buffer = 0; num_write_buffer < write_buffer->nb_slot_use(); num_write_buffer ++) + { + queue::slot_t val = write_buffer->read(num_write_buffer); + + if ( (val._data.trdid == trdid ) && + (val._data.address.tag == address.tag ) && + (val._data.address.familly == address.familly)) + break; + } + + return num_write_buffer; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_index_victim.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_index_victim.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_index_victim.cpp (revision 78) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + // return the index of the next victim + uint32_t Cache_OneLevel::index_victim (uint32_t familly) + { + uint32_t victim = 0; + while (tag [familly][victim].index_lru != (param->associativity-1)) + victim ++; + + return victim; + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_information.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_information.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_information.cpp (revision 78) @@ -0,0 +1,20 @@ +#include "../include/Cache_OneLevel.h" +#include + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + std::string Cache_OneLevel::information (uint32_t depth) + { + std::string tab(depth,'\t'); + std::stringstream output; + + output << tab << "<" << name << ">" << std::endl + << param->print(depth); + + return output.str(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_latence.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_latence.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_latence.cpp (revision 78) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + // Return the time to have the data + // uncache is to stocke the address on the cache + uint32_t Cache_OneLevel::latence (uint32_t num_port) + { + uint32_t res = param->hit_latence + access_port[num_port].latence; + + return res; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_need_slot.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_need_slot.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_need_slot.cpp (revision 78) @@ -0,0 +1,20 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + uint32_t Cache_OneLevel::need_slot (void) + { + uint32_t res = 0; + // scan all port - test if have a transaction + for (uint32_t x = 0; x < param->nb_port; x ++) + if (access_port[x].valid == true) + res ++; + + return res; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_print.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_print.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_print.cpp (revision 78) @@ -0,0 +1,28 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + std::ostream& operator<< (std::ostream& output, Cache_OneLevel & x) + { + output << x.information(0) << std::endl + << "\t* Size Address (hex) : " << x.size_address << std::endl; + + output << " * Tag" << std::endl; + for (uint32_t i = 0; i < x.param->nb_line / x.param->associativity; i ++) + { + output << " "; + for (uint32_t j = 0; j < x.param->associativity; j ++) + output << x.tag [i][j] << " | "; + output << std::endl; + } + + output << " * Write Buffer" << std::endl; + output << *x.write_buffer << std::endl; + + return output; + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_reset.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_reset.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_reset.cpp (revision 78) @@ -0,0 +1,26 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + void Cache_OneLevel::reset (void) + { + for (uint32_t x = 0; x < param->nb_port; x ++) + access_port[x].valid = false; + + for (uint32_t x = 0; x < param->nb_line/param->associativity; x ++) + for (uint32_t y = 0; y < param->associativity; y ++) + { + tag[x][y].valid = false; + tag[x][y].index_lru = y; + + // Optionnal init + tag[x][y].trdid = 0; + tag[x][y].address = 0; + } + write_buffer->reset(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_transition.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_transition.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_transition.cpp (revision 78) @@ -0,0 +1,55 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + void Cache_OneLevel::transition (void) + { + // scan all port - test if have a transaction + for (int32_t x = param->nb_port-1; x >= 0; x --) + { + if (access_port[x].valid == true) + { + access_port[x].valid = false; + + // Update LRU + // * hit : now + // * miss : after the return of next cache + + if (access_port[x].hit == HIT_CACHE) + {// Hit + update_lru(access_port[x].address.familly,access_port[x].num_associativity); + } + + if (access_port[x].hit == MISS) + {// Miss + // Write in write_buffer + write_buffer->push(access_port[x].latence,Write_Buffer(access_port[x].address,access_port[x].trdid)); + } + } + } + + write_buffer->transition(); + + // Test if a write_buffer have the result + while ((write_buffer->empty() == false) && (write_buffer->read(0)._delay == 0)) + { + // Save in the cache + Write_Buffer val = write_buffer->pop(); + + uint32_t num_tag = val.address.tag; + uint32_t num_familly = val.address.familly; + uint32_t num_associativity = index_victim(num_familly); + + tag [num_familly][num_associativity].valid = true; + tag [num_familly][num_associativity].address = num_tag; + tag [num_familly][num_associativity].trdid = val.trdid; + + update_lru(num_familly,num_associativity); + } + + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_translate_address.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_translate_address.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_translate_address.cpp (revision 78) @@ -0,0 +1,25 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + Address Cache_OneLevel::translate_address (uint32_t address) + { + Address address_translated; + uint32_t shift; + + address_translated.offset = (address & ((uint32_t)-1 >> (32-(size_address.offset )))); + address -= address_translated.offset; + shift = size_address.offset; + address_translated.familly = (address & ((uint32_t)-1 >> (32-(size_address.familly + shift))))>>shift; + address -= address_translated.familly; + shift += size_address.familly; + address_translated.tag = (address & ((uint32_t)-1 >> (32-(size_address.tag + shift))))>>shift; + + return address_translated; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_update_latence.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_update_latence.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_update_latence.cpp (revision 78) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + // Return the time to have the data + // uncache is to stocke the address on the cache + uint32_t Cache_OneLevel::update_latence (uint32_t num_port, uint32_t latence) + { + uint32_t new_latence = latence-param->hit_latence; + access_port[num_port].latence = new_latence; + return new_latence-param->miss_penality; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_update_lru.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_update_lru.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_OneLevel_update_lru.cpp (revision 78) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environnement { +namespace cache { +namespace cache_onelevel { + + void Cache_OneLevel::update_lru (uint32_t familly, uint32_t num_associativity) + { + uint32_t current_lru = tag [familly][num_associativity].index_lru; + + for (uint32_t k = 0; k < param->associativity; k ++) + if (tag [familly][k].index_lru < current_lru) + tag [familly][k].index_lru ++; + tag [familly][num_associativity].index_lru = 0; + } +}; +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_information.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_information.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_information.cpp (revision 78) @@ -0,0 +1,19 @@ +#include "../include/Cache.h" +#include + +namespace environnement { +namespace cache { + + std::string Cache::information (uint32_t depth) + { + std::string tab(depth,'\t'); + std::stringstream output; + + output << tab << "<" << name << ">" << std::endl + << param->print(depth); + + return output.str(); + } + +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_latence.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_latence.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_latence.cpp (revision 78) @@ -0,0 +1,61 @@ +#include "../include/Cache.h" + +namespace environnement { +namespace cache { + + // Return the time to have the data + // latence is call on the same port in a single cycle, only the last access is save + // { NOTE } : type_cache = 0 : icache, 1 : dcache + uint32_t Cache::latence (cache_t type_cache, + uint32_t num_entity, + uint32_t num_port , + uint32_t address , + uint32_t trdid , + type_req_cache_t type , + direction_req_cache_t dir ) + { + if (num_entity >= param->nb_cache_dedicated) + { + std::cerr << " {ERROR} num_entity must be >= nb_cache_dedicated" << std::endl; + exit (1); + } + + cache_multilevel::Cache_MultiLevel * cache; + if (type_cache == INSTRUCTION_CACHE) + cache = icache_dedicated [num_entity]; + else + cache = dcache_dedicated [num_entity]; + + if (num_port >= cache->param->nb_port) + { + std::cerr << " {ERROR} num_port can be >= nb_port" << std::endl; + exit (1); + } + + // Make a access with this level "dedicated" + std::cout << "cache dedicated : access" << std::endl; + cache_multilevel::Access access_dedicated = cache->access(num_port,address,trdid,type,dir); + + if (access_dedicated.hit == MISS) + { + std::cout << "cache shared : access" << std::endl; + // Make a access with this level "shared" + cache_multilevel::Access access_shared = cache_shared->access(range_port (type_cache,num_entity)+num_port,address,trdid,type,dir); + + cache_shared->update_access (access_shared); + + access_dedicated.last_nb_level = param->nb_cache_dedicated-1; // Update all cache + access_dedicated.latence += access_shared.latence; + } + + std::cout << "end access, update access" << std::endl; + + cache->update_access (access_dedicated); + + std::cout << "end access, update access" << std::endl; + + return access_dedicated.latence; + } + +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_print.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_print.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_print.cpp (revision 78) @@ -0,0 +1,21 @@ +#include "../include/Cache.h" + +namespace environnement { +namespace cache { + + std::ostream& operator<< (std::ostream& output, Cache & x) + { + output << x.information(0) << std::endl; + + for (uint32_t i=0; inb_cache_dedicated; i++) + output << *(x.icache_dedicated[i]) << std::endl; + for (uint32_t i=0; inb_cache_dedicated; i++) + output << *(x.dcache_dedicated[i]) << std::endl; + + output << *(x.cache_shared) << std::endl; + + return output; + } + +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_range_port.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_range_port.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_range_port.cpp (revision 78) @@ -0,0 +1,33 @@ +#include "../include/Cache.h" + +namespace environnement { +namespace cache { + + uint32_t Cache::range_port (cache_t type_cache, + uint32_t num_entity) + { + uint32_t nb_port_dedicated = 0; + + if (type_cache == INSTRUCTION_CACHE) + { + for (uint32_t i = 1; i < num_entity; i++ ) + nb_port_dedicated += param->param_icache_dedicated [i]->nb_port; + } + else + { + std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; + nb_port_dedicated += param->nb_iport; + std::cout << "nb_port_dedicated : " << param->nb_iport<< std::endl; + + for (uint32_t i = 1; i < num_entity; i++) + nb_port_dedicated += param->param_dcache_dedicated [i]->nb_port; + } + + std::cout << "nb_port_dedicated : " << num_entity << std::endl; + std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; + + return nb_port_dedicated; + } + +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_reset.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_reset.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_reset.cpp (revision 78) @@ -0,0 +1,18 @@ +#include "../include/Cache.h" + +namespace environnement { +namespace cache { + + void Cache::reset (void) + { + for (uint32_t i=0; inb_cache_dedicated; i++) + { + icache_dedicated[i]->reset(); + dcache_dedicated[i]->reset(); + } + + cache_shared->reset(); + } + +}; +}; Index: trunk/IPs/systemC/Environnement/Cache/src/Cache_transition.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Cache/src/Cache_transition.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Cache/src/Cache_transition.cpp (revision 78) @@ -0,0 +1,18 @@ +#include "../include/Cache.h" + +namespace environnement { +namespace cache { + + void Cache::transition (void) + { + for (uint32_t i=0; inb_cache_dedicated; i++) + { + icache_dedicated[i]->transition(); + dcache_dedicated[i]->transition(); + } + + cache_shared->transition(); + } + +}; +}; Index: trunk/IPs/systemC/Environnement/Makefile.Environnement =================================================================== --- trunk/IPs/systemC/Environnement/Makefile.Environnement (revision 78) +++ trunk/IPs/systemC/Environnement/Makefile.Environnement (revision 78) @@ -0,0 +1,90 @@ +include $(MORPHEO_TOPLEVEL)/Makefile.tools + +#-----[ Directory ]---------------------------------------- +DIR_TST = selftest +DIR_INC = include +DIR_SRC = src +DIR_OBJ = obj +DIR_BIN = bin + +#-----[ Compilation ]-------------------------------------- +INCDIR = $(SYSTEMC_INCDIR_$(SIMULATOR)) \ + -I$(DIR_INC) + +LIBDIR = + +FLAGS = $(SYSTEMC_CFLAGS_$(SIMULATOR)) \ + $(CXX_FLAGS) + +CFLAGS = $(MORPHEO_FLAGS) $(FLAGS) $(INCDIR) +LFLAGS = $(MORPHEO_FLAGS) $(FLAGS) $(LIBDIR) + +#-----[ Variable ]----------------------------------------- + +ENTITY = `$(BASENAME) $$PWD` + +OBJECTS = $(patsubst $(DIR_SRC)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SRC)/*.cpp)) +OBJECTS_BIN = $(patsubst $(DIR_TST)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_TST)/*.cpp)) + +HEADERS = $(wildcard $(DIR_INC)/*.h) + +EXE = $(DIR_BIN)/soft.x + +#-----[ Rules ]-------------------------------------------- + +.PRECIOUS : $(DIR_OBJ)/%.o $(DIR_BIN)/%.x + +test_env : + @$(ECHO) "-------------------[ $(ENTITY) ]" + +$(DIR_OBJ)/%.o : $(DIR_SRC)/%.cpp $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(CXX) $(CFLAGS) -c -o $@ $<; + +$(DIR_OBJ)/%.o : $(DIR_TST)/%.cpp $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(CXX) $(CFLAGS) -c -o $@ $<; + +$(DIR_BIN)/%.x : $(OBJECTS_DEPS) $(OBJECTS) $(OBJECTS_BIN) + \ + $(ECHO) "Compilation : $*";\ + $(CXX) $(LFLAGS) -o $@ $^; + +$(DIR_OBJ) : + @\ + $(ECHO) "Create directory : $@";\ + $(MKDIR) $@ + +$(DIR_BIN) : + @\ + $(ECHO) "Create directory : $@";\ + $(MKDIR) $@ + + +exe : all_environnement + @\ + $(VALGRIND) ./$(EXE) + +all_environnement : test_env $(DIR_OBJ) $(DIR_BIN) + @\ + $(MAKE) $(EXE) + +environnement_clean : + @\ + $(ECHO) "Delete temporary files in directory "$(PWD);\ + $(RM) *~ \ + $(DIR_OBJ) \ + $(DIR_BIN) \ + $(DIR_TST)/*~ \ + $(DIR_SRC)/*~ \ + $(DIR_INC)/*~; + +environnement_help : + @\ + $(ECHO) " -----[ Environnement ]------------------------------";\ + $(ECHO) "";\ + $(ECHO) " * test_env : test if environnment's variable is set";\ + $(ECHO) " * all_environnement : generate object";\ + $(ECHO) ""; Index: trunk/IPs/systemC/Environnement/Queue/Makefile =================================================================== --- trunk/IPs/systemC/Environnement/Queue/Makefile (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/Makefile (revision 78) @@ -0,0 +1,12 @@ +#-----[ Rules ]-------------------------------------------- + +all : + @$(MAKE) all_environnement + +clean : + @$(MAKE) environnement_clean + +help : + @$(MAKE) environnement_help + +include ../Makefile.Environnement Index: trunk/IPs/systemC/Environnement/Queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/Environnement/Queue/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/include/Parameters.h (revision 78) @@ -0,0 +1,22 @@ +#ifndef ENVIRONNEMENT_QUEUE_PARAMETERS_H +#define ENVIRONNEMENT_QUEUE_PARAMETERS_H + +#include +#include + +namespace environnement { +namespace queue { + + class Parameters + { + public : uint32_t _size; + + public : Parameters (uint32_t size) + { + _size = size; + } + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Queue/include/Queue.h =================================================================== --- trunk/IPs/systemC/Environnement/Queue/include/Queue.h (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/include/Queue.h (revision 78) @@ -0,0 +1,78 @@ +#ifndef ENVIRONNEMENT_QUEUE_QUEUE_H +#define ENVIRONNEMENT_QUEUE_QUEUE_H + +#include +#include +#include "Slot.h" + +namespace environnement { +namespace queue { + + template + class Queue + { + protected : std::string _name; + protected : uint32_t _nb_slot; // number of slot + protected : uint32_t _size; // size of queue + protected : slot_t * _slot; + + public : Queue (std::string name, + uint32_t size) + { + _name = name; + _nb_slot = 0; + _size = size; + _slot = new slot_t [size]; + }; + + public : virtual ~Queue () + { + delete [] _slot; + }; + + // *****[ empty ]***** + // Test if the queue is empty + public : bool empty () + { + return (_nb_slot == 0); + } + + // *****[ full ]***** + // Test if the queue is full + public : bool full () + { + return (_nb_slot == _size); + } + + // *****[ nb_slot_free ]***** + // return the number of free slot + public : uint32_t nb_slot_free () + { + return (_size-_nb_slot); + } + + // *****[ nb_slot_use ]***** + // return the number of use slot + public : uint32_t nb_slot_use () + { + return (_nb_slot); + } + + // *****[ pop ]***** + // read the queue, and update the pointer + public : virtual T pop () {return T();}; + + // *****[ pop ]***** + // read the queue, and update the pointer + public : virtual T pop (uint32_t num) {return T();}; + + // *****[ push ]***** + // Push a new value (they must have a slot free) + public : virtual bool push (T val) {return false;}; + + }; // Queue + +}; +}; +#endif + Index: trunk/IPs/systemC/Environnement/Queue/include/Slot.h =================================================================== --- trunk/IPs/systemC/Environnement/Queue/include/Slot.h (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/include/Slot.h (revision 78) @@ -0,0 +1,36 @@ +#ifndef ENVIRONNEMENT_QUEUE_SLOT_H +#define ENVIRONNEMENT_QUEUE_SLOT_H + +#include +#include + +namespace environnement { +namespace queue { + + template + class slot_t + { + public : uint32_t _delay; // delay of disponibilty of data + public : T _data; + + public : slot_t (void) + { + } + + public : slot_t (uint32_t delay, T data) + { + _delay = delay; + _data = data; + } + + public : friend std::ostream& operator<< (std::ostream& output, const slot_t & x) + { + output << x._delay << " " << x._data; + return output; + } + }; + +}; +}; +#endif + Index: trunk/IPs/systemC/Environnement/Queue/include/Sort_Queue.h =================================================================== --- trunk/IPs/systemC/Environnement/Queue/include/Sort_Queue.h (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/include/Sort_Queue.h (revision 78) @@ -0,0 +1,157 @@ +#ifndef ENVIRONNEMENT_QUEUE_SORT_QUEUE_H +#define ENVIRONNEMENT_QUEUE_SORT_QUEUE_H + +#include +#include +#include "Parameters.h" +#include "Queue.h" + +namespace environnement { +namespace queue { + + /* + * Cicurlar queue, sort by delay + */ + + template + class Sort_Queue : public Queue + { + // *****[ variables ]***** + protected : uint32_t _ptr_read; // pointer of the next slot to read + protected : uint32_t _ptr_write; // pointer of the next slot to write + + // *****[ constructor ]***** + public : Sort_Queue (std::string name, + Parameters * param) : Queue (name,param->_size) + { + }; + + // *****[ destructor ]***** + public : ~Sort_Queue () + { + }; + + // *****[ reset ]***** + // Reset the queue in the empty state + public : void reset () + { + _ptr_read = 0; + _ptr_write = 0; + Queue ::_nb_slot = 0; + }; + + // *****[ transition ]***** + // Decrease the delay at all cycle + public : void transition () + { + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + uint32_t ptr = (_ptr_read + it)%Queue ::_size; + + if (Queue ::_slot[ptr]._delay != 0) + Queue ::_slot[ptr] ._delay --; + } + } + + // *****[ read ]***** + // return the n-eme slot. + // (first = 0) + public : slot_t read (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + return Queue ::_slot[(_ptr_read + num)%Queue ::_size]; + }; + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop () + { + return pop (0); + } + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + T val = Queue ::_slot [(_ptr_read+num)%Queue ::_size]._data; + + // Reorganize the queue + + for (uint32_t it = 0; it < num; it ++) + { + uint32_t ptr = (_ptr_read + num - it )%Queue ::_size; + uint32_t _ptr_next = (ptr-1)%Queue ::_size; + + Queue ::_slot [ptr] = Queue ::_slot [_ptr_next]; + } + + Queue ::_nb_slot --; + _ptr_read = (_ptr_read+1)%Queue ::_size; + + return val; + } + + // *****[ push ]***** + // Push a new value (they must have a slot free) + // Is sort by delay + public : bool push (uint32_t delay, T val) + { + // If full -> quit + if (Queue ::_nb_slot == Queue ::_size) + return false; + + uint32_t ptr = _ptr_write; + + // Scan the fill to find the good position (keep the sort) + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + uint32_t _ptr_scan = (ptr-1)%Queue ::_size; + + if (Queue ::_slot[_ptr_scan]._delay <= delay) + break; //find + + // reformor the queue + Queue ::_slot [ptr] = Queue ::_slot [_ptr_scan]; + ptr = _ptr_scan; + } + + Queue ::_slot [ptr] = slot_t (delay,val); + _ptr_write = (_ptr_write+1)%Queue ::_size; // update the pointer + Queue ::_nb_slot ++; + + return true; + } + + // *****[ print ]***** + public : friend std::ostream& operator<< (std::ostream& output, const Sort_Queue & x) + { + output << "<" << x._name << ">" << std::endl; + output << " * ptr_read : " << x._ptr_read << std::endl; + output << " * ptr_write : " << x._ptr_write << std::endl; + output << " * nb_slot : " << x._nb_slot << std::endl; + output << " * size : " << x._size << std::endl; + + for (uint32_t it = 0; it < x._nb_slot; it ++) + { + uint32_t ptr = (x._ptr_read+it)%x._size; + output << x._slot [ptr] << std::endl; + } + + return output; + }; + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Queue/include/Sort_Queue_Dynamic.h =================================================================== --- trunk/IPs/systemC/Environnement/Queue/include/Sort_Queue_Dynamic.h (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/include/Sort_Queue_Dynamic.h (revision 78) @@ -0,0 +1,210 @@ +#ifndef ENVIRONNEMENT_QUEUE_SORT_QUEUE_DYNAMIC_H +#define ENVIRONNEMENT_QUEUE_SORT_QUEUE_DYNAMIC_H + +#include +#include +#include "Parameters.h" +#include "Queue.h" + +namespace environnement { +namespace queue { + +#define PERCENT_USE_MAX 90 +#define PERCENT_USE_MIN 33 + + /* + * Queue, sort by delay with a dynamic size + */ + + template + class Sort_Queue_Dynamic : public Queue + { + // *****[ variables ]***** + private : uint32_t _factor ; + private : uint32_t _size_base; + + // *****[ constructor ]***** + public : Sort_Queue_Dynamic (std::string name, Parameters * param) : Queue (name, param->_size) + { + _size_base = param->_size; + _factor = 1; + }; + + // *****[ destructor ]***** + public : ~Sort_Queue_Dynamic () + { + }; + + // *****[ must_decrease ]***** + // Test if the queue must be decrease + private : bool must_decrease (void) + { + return ( (_factor > 1 ) and + (((100*Queue ::_nb_slot)/Queue ::_size) <= PERCENT_USE_MIN)); + } + + // *****[ must_increase ]***** + // Test if the queue must be increase + private : bool must_increase (void) + { + return (((100*Queue ::_nb_slot)/Queue ::_size) >= PERCENT_USE_MAX); + } + + // *****[ increase ]***** + // increase the queue + private : void increase (void) + { + _factor ++; + change_size (_factor*_size_base); + } + + // *****[ decrease ]***** + // decrease the queue + private : void decrease (void) + { + _factor --; + change_size (_factor*_size_base); + } + + // *****[ change_size ]***** + // decrease the queue + private : void change_size (uint32_t new_size) + { + slot_t * new_slot = new slot_t [new_size]; + + // copy data + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + new_slot [it] = Queue ::_slot [it]; + } + // Change information + + delete [] Queue ::_slot; + + Queue ::_slot = new_slot; + Queue ::_size = new_size; + } + + // *****[ reset ]***** + // Reset the queue in the empty state + public : void reset (void) + { + Queue ::_nb_slot = 0; + }; + + // *****[ transition ]***** + // Decrease the delay at all cycle + public : void transition () + { + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + if (Queue ::_slot[it]._delay != 0) + Queue ::_slot[it] ._delay --; + } + } + + // *****[ read ]***** + // return the n-eme slot. + // (first = 0) + public : slot_t read (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= _nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + return Queue ::_slot[num]; + }; + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop () + { + return pop (0); + } + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= _nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + // If full -> quit + if (must_decrease() == true) + decrease(); + + T val = Queue ::_slot [num]._data; + + // Reorganize the queue + + for (uint32_t it = num; it < Queue ::_nb_slot; it ++) + { + uint32_t ptr = (it); + uint32_t ptr_next = (it+1); + + Queue ::_slot [ptr] = Queue ::_slot [ptr_next]; + } + + Queue ::_nb_slot --; + + return val; + } + + // *****[ push ]***** + // Push a new value (they must have a slot free) + // Is sort by delay + public : bool push (uint32_t delay, T val) + { +// std::cout << val << std::endl; + + // Test if must increase the queue (never full) + if (must_increase() == true) + increase(); + + uint32_t ptr = Queue ::_nb_slot; + + // Scan the fill to find the good position (keep the sort) + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + uint32_t ptr_scan = ptr-1; // ptr > 0 + + if (Queue ::_slot[ptr_scan]._delay <= delay) + break; //find + + // reformor the queue + Queue ::_slot [ptr] = Queue ::_slot [ptr_scan]; + ptr = ptr_scan; + } + + Queue ::_slot [ptr] = slot_t (delay,val); + Queue ::_nb_slot ++; + + return true; + } + // *****[ print ]***** + public : friend std::ostream& operator<< (std::ostream& output, const Sort_Queue_Dynamic & x) + { + output << "<" << x._name << ">" << std::endl; + output << " * nb_slot : " << x._nb_slot << std::endl; + output << " * size : " << x._size << std::endl; + output << " * factor : " << x._factor << std::endl; + + for (uint32_t it = 0; it < x._nb_slot; it ++) + { + output << x._slot [it] << std::endl; + } + + return output; + }; + + + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/Queue/selftest/main.cpp =================================================================== --- trunk/IPs/systemC/Environnement/Queue/selftest/main.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/Queue/selftest/main.cpp (revision 78) @@ -0,0 +1,224 @@ +#include +#include "../include/Sort_Queue.h" +#include "../include/Sort_Queue_Dynamic.h" + +using namespace std; +using namespace environnement; +using namespace environnement::queue; + + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ + } while (0) + +class Entry +{ +public : uint32_t _trdid; // number of thread +public : uint32_t _pktid; // number of packet +public : uint64_t _data; + + Entry (void) + { + _trdid = 0; + _pktid = 0; + _data = 0; + }; + + Entry (uint32_t trdid , + uint32_t pktid , + uint64_t data ) + { + _trdid = trdid; + _pktid = pktid; + _data = data ; + }; + + friend std::ostream& operator<< (std::ostream& output, Entry x) + { + output << x._trdid << " " << x._pktid << " " << std::hex << x._data << std::dec; + return output; + } +}; + + +int main (void) +{ + cout << "
Begin" << endl; + + { + cout << "
* create and print a slot_t" << endl; + slot_t * my_slot = new slot_t (12, 0xdeadbeef); + cout << *my_slot << endl; + + delete my_slot; + } + + { + cout << "==================================" << endl; + cout << "=====[ Sort_Queue ]===============" << endl; + cout << "==================================" << endl; + cout << "
* create a queue, size = 5" << endl; + Parameters * param = new Parameters (5); + + Sort_Queue * my_Sort_Queue = new Sort_Queue ("my_queue",param); + + cout << " * must be empty ..." << endl; + TEST(my_Sort_Queue->empty(),true ); + TEST(my_Sort_Queue->full (),false); + + cout << " * insert 6 elements" << endl; + + TEST(my_Sort_Queue->push((uint32_t)5,Entry(1,1,0x33333333)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)6,Entry(2,2,0x55555555)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)3,Entry(3,3,0x22222222)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)5,Entry(4,4,0x44444444)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)1,Entry(5,5,0x11111111)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)4,Entry(6,6,0x00000BAD)),false); cout << *my_Sort_Queue << endl; + + cout << " * extract 6 elements" << endl; + TEST(my_Sort_Queue->pop()._data,0x11111111); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x22222222); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x33333333); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x44444444); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x55555555); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),true ); + + cout << " * ajout de 8 elements (reset apres le deuxieme)" << endl; + + TEST(my_Sort_Queue->push((uint32_t)5,Entry(1,1,0x44444444)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)6,Entry(2,2,0x55555555)),true ); cout << *my_Sort_Queue << endl; + my_Sort_Queue->reset(); + TEST(my_Sort_Queue->push((uint32_t)3,Entry(3,3,0x22222222)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)5,Entry(4,4,0x33333333)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)5,Entry(1,1,0x44444444)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)7,Entry(2,2,0x55555555)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)1,Entry(5,5,0x11111111)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)4,Entry(6,6,0x00000BAD)),false); cout << *my_Sort_Queue << endl; + + cout << " * 3 transitions" << endl; + + my_Sort_Queue->transition(); cout << *my_Sort_Queue << endl; + my_Sort_Queue->transition(); cout << *my_Sort_Queue << endl; + my_Sort_Queue->transition(); cout << *my_Sort_Queue << endl; + + cout << " * extract 1 element" << endl; + + TEST(my_Sort_Queue->pop()._data,0x11111111); + + cout << *my_Sort_Queue << endl; + + for (uint32_t it = 0; it < my_Sort_Queue->nb_slot_use(); it ++) + { + slot_t val = my_Sort_Queue->read(it); + cout << val._delay << " " << val._data << endl; + } + + cout << " * Test pop(n)" << endl; + + TEST(my_Sort_Queue->pop(1)._data, 0x33333333); + TEST(my_Sort_Queue->pop(2)._data, 0x55555555); + TEST(my_Sort_Queue->pop(0)._data, 0x22222222); + TEST(my_Sort_Queue->pop(0)._data, 0x44444444); + + delete my_Sort_Queue; + delete param; + } + + { + cout << "==================================" << endl; + cout << "=====[ Sort_Queue_Dynamic ]=======" << endl; + cout << "==================================" << endl; + cout << "
* create a queue, size = 5" << endl; + Parameters * param = new Parameters (5); + + Sort_Queue_Dynamic * my_Sort_Queue_Dynamic = new Sort_Queue_Dynamic ("my_queue",param); + + cout << " * must be empty ..." << endl; + + TEST(my_Sort_Queue_Dynamic->empty(),true); + TEST(my_Sort_Queue_Dynamic->full (),false); + + TEST(my_Sort_Queue_Dynamic->push(5,Entry(1,1, 4)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 6)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(3,Entry(3,3, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(5,Entry(4,4, 5)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(1,Entry(5,5, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(4,Entry(6,6, 3)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(9,Entry(1,1,12)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 7)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(3,3, 8)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(4,4, 9)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(8,Entry(5,5,11)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(6,6,10)),true ); cout << *my_Sort_Queue_Dynamic << endl; + + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 3 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 4 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 5 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 6 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 7 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 8 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 9 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data,10 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data,11 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data,12 ); cout << *my_Sort_Queue_Dynamic << endl; + + + TEST(my_Sort_Queue_Dynamic->push(5,Entry(1,1, 4)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 6)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(3,Entry(3,3, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(5,Entry(4,4, 5)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(1,Entry(5,5, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(4,Entry(6,6, 3)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(9,Entry(1,1,12)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 7)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(3,3, 8)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(4,4, 9)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(8,Entry(5,5,11)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(6,6,10)),true ); cout << *my_Sort_Queue_Dynamic << endl; + + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 3 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop(2)._data, 6 ) ; cout << *my_Sort_Queue_Dynamic << endl; + + delete my_Sort_Queue_Dynamic; + delete param; + } + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: trunk/IPs/systemC/Environnement/RamLock/Makefile =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/Makefile (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/Makefile (revision 78) @@ -0,0 +1,12 @@ +#-----[ Rules ]-------------------------------------------- + +all : + @$(MAKE) all_environnement + +clean : + @$(MAKE) environnement_clean + +help : + @$(MAKE) environnement_help + +include ../Makefile.Environnement Index: trunk/IPs/systemC/Environnement/RamLock/include/Parameters.h =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/include/Parameters.h (revision 78) @@ -0,0 +1,25 @@ +#ifndef Environnement_Parameters_H +#define Environnement_Parameters_H + +#include + +namespace environnement { +namespace ramlock { + + class Parameters + { + public : uint32_t _size; + + public : Parameters (uint32_t size) + { + _size = size; + } + + public : ~Parameters (void) + {}; + + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/RamLock/include/RamLock.h =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/include/RamLock.h (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/include/RamLock.h (revision 78) @@ -0,0 +1,37 @@ +#ifndef Environnement_RamLock_H +#define Environnement_RamLock_H + +#include +#include + +#include "Parameters.h" + +namespace environnement { +namespace ramlock { + +#define UNLOCK false +#define LOCK true + + class RamLock + { + // field + private : std::string _name; + private : Parameters * _param; + private : bool * _lock; + + // method + public : RamLock (std::string name, + Parameters * param); + public : ~RamLock (void); + +//public : bool test (uint32_t num_lock); + public : void reset (void); + public : bool read (uint32_t num_lock); + public : bool write (uint32_t num_lock); + + public : friend std::ostream& operator<< (std::ostream& output, environnement::ramlock::RamLock & x); + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environnement/RamLock/selftest/main.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/selftest/main.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/selftest/main.cpp (revision 78) @@ -0,0 +1,50 @@ +#include +#include "../include/RamLock.h" + +using namespace std; +using namespace environnement; +using namespace environnement::ramlock; + + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK"; \ + } \ + else \ + { \ + cout << "Test KO"; \ + exit (EXIT_FAILURE); \ + } \ + cout << endl; \ + } while (0) + + + +int main (void) +{ + cout << "
Begin" << endl; + + cout << " * Create a Ramlock with a size of 70" << endl; + + Parameters * param = new Parameters (70); + RamLock * my_ramlock = new RamLock("my_ramlock",param); + + my_ramlock->reset(); + + cout << *my_ramlock << endl; + + TEST (my_ramlock->read (10) , UNLOCK); cout << *my_ramlock << endl; + TEST (my_ramlock->read (10) , LOCK); cout << *my_ramlock << endl; + TEST (my_ramlock->write(10) , LOCK); cout << *my_ramlock << endl; + TEST (my_ramlock->write(10) , UNLOCK); cout << *my_ramlock << endl; + + delete param ; + delete my_ramlock ; + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: trunk/IPs/systemC/Environnement/RamLock/src/RamLock.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/src/RamLock.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/src/RamLock.cpp (revision 78) @@ -0,0 +1,20 @@ +#include "../include/RamLock.h" + +namespace environnement { +namespace ramlock { + + RamLock::RamLock (std::string name, + Parameters * param) + { + _name = name; + _param = param; + _lock = new bool [param->_size]; + } + + RamLock::~RamLock (void) + { + delete [] _lock; + } + +}; +}; Index: trunk/IPs/systemC/Environnement/RamLock/src/RamLock_print.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/src/RamLock_print.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/src/RamLock_print.cpp (revision 78) @@ -0,0 +1,25 @@ +#include "../include/RamLock.h" + +namespace environnement { +namespace ramlock { + + std::ostream& operator<< (std::ostream& output, environnement::ramlock::RamLock & x) + { + output << "<" << x._name << ">" << std::endl; + output << " * size : " << x._param->_size << std::endl; + + for (uint32_t it = 0; it < x._param->_size; it ++) + { + if (it % 32 == 0) + output << std::endl; + + output << x._lock [it] << " "; + } + output << std::endl; + + return output; + + } + +}; +}; Index: trunk/IPs/systemC/Environnement/RamLock/src/RamLock_read.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/src/RamLock_read.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/src/RamLock_read.cpp (revision 78) @@ -0,0 +1,15 @@ +#include "../include/RamLock.h" + +namespace environnement { +namespace ramlock { + + // return the value of the lock and take this + bool RamLock::read (uint32_t num_lock) + { + bool val = _lock [num_lock]; + _lock [num_lock] = LOCK; + + return val; + } +}; +}; Index: trunk/IPs/systemC/Environnement/RamLock/src/RamLock_reset.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/src/RamLock_reset.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/src/RamLock_reset.cpp (revision 78) @@ -0,0 +1,14 @@ +#include "../include/RamLock.h" + +namespace environnement { +namespace ramlock { + + void RamLock::reset (void) + { + // Take all lock and set UNLOCK value + for (uint32_t it = 0; it < _param->_size; it ++) + _lock [it] = UNLOCK; + } + +}; +}; Index: trunk/IPs/systemC/Environnement/RamLock/src/RamLock_test.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/src/RamLock_test.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/src/RamLock_test.cpp (revision 78) @@ -0,0 +1,11 @@ +#include "../include/RamLock.h" + +namespace environnement { +namespace ramlock { + +// bool RamLock::test (uint32_t num_lock) +// { +// return num_lock < _param->_size; +// } +}; +}; Index: trunk/IPs/systemC/Environnement/RamLock/src/RamLock_write.cpp =================================================================== --- trunk/IPs/systemC/Environnement/RamLock/src/RamLock_write.cpp (revision 78) +++ trunk/IPs/systemC/Environnement/RamLock/src/RamLock_write.cpp (revision 78) @@ -0,0 +1,15 @@ +#include "../include/RamLock.h" + +namespace environnement { +namespace ramlock { + + // return the value of the lock and untake this + bool RamLock::write (uint32_t num_lock) + { + bool val = _lock [num_lock]; + _lock [num_lock] = UNLOCK; + + return val; + } +}; +}; Index: trunk/IPs/systemC/hierarchy_memory/cache/cache_onelevel.h =================================================================== --- trunk/IPs/systemC/hierarchy_memory/cache/cache_onelevel.h (revision 77) +++ trunk/IPs/systemC/hierarchy_memory/cache/cache_onelevel.h (revision 78) @@ -12,8 +12,4 @@ #include "access_port.h" #include "write_buffer.h" - -using namespace std; -using namespace hierarchy_memory::sort_file; -using namespace hierarchy_memory::cache::cache_multilevel; namespace hierarchy_memory { @@ -518,5 +514,5 @@ } - }; + }; };};};}; #endif //!CACHE_ONELEVEL_H Index: trunk/IPs/systemC/hierarchy_memory/file/main.cpp =================================================================== --- trunk/IPs/systemC/hierarchy_memory/file/main.cpp (revision 77) +++ trunk/IPs/systemC/hierarchy_memory/file/main.cpp (revision 78) @@ -179,6 +179,4 @@ if (my_Sort_File_Dynamic.pop().data != 1 ) test_ko ( 2); cout << my_Sort_File_Dynamic << endl; if (my_Sort_File_Dynamic.pop().data != 2 ) test_ko ( 3); cout << my_Sort_File_Dynamic << endl; - - } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libExecute_loop.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Makefile.deps (revision 78) @@ -0,0 +1,90 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Execute_loop = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Read_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Makefile.deps +endif +ifndef Functionnal_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps +endif +ifndef Load_store_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/Makefile.deps +endif +ifndef Write_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Makefile.deps +endif +ifndef Register_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Makefile.deps +endif +ifndef Read_unit_to_Execution_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/Makefile.deps +endif +ifndef Execution_unit_to_Write_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Execute_loop_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop + +#-----[ Library ]------------------------------------------ + +Execute_loop_LIBRARY = -lExecute_loop \ + $(Behavioural_LIBRARY) \ + $(Read_unit_LIBRARY) \ + $(Functionnal_unit_LIBRARY) \ + $(Load_store_unit_LIBRARY) \ + $(Write_unit_LIBRARY) \ + $(Register_unit_LIBRARY) \ + $(Read_unit_to_Execution_unit_LIBRARY) \ + $(Execution_unit_to_Write_unit_LIBRARY) + + +Execute_loop_DIR_LIBRARY = -L$(Execute_loop_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) \ + $(Behavioural_DIR_LIBRARY) \ + $(Read_unit_DIR_LIBRARY) \ + $(Functionnal_unit_DIR_LIBRARY) \ + $(Load_store_unit_DIR_LIBRARY) \ + $(Write_unit_DIR_LIBRARY) \ + $(Register_unit_DIR_LIBRARY) \ + $(Read_unit_to_Execution_unit_DIR_LIBRARY) \ + $(Execution_unit_to_Write_unit_DIR_LIBRARY) + + +#-----[ Rules ]-------------------------------------------- + +Execute_loop_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Read_unit_library; \ + $(MAKE) Functionnal_unit_library; \ + $(MAKE) Load_store_unit_library; \ + $(MAKE) Write_unit_library; \ + $(MAKE) Register_unit_library; \ + $(MAKE) Read_unit_to_Execution_unit_library; \ + $(MAKE) Execution_unit_to_Write_unit_library; \ + $(MAKE) --directory=$(Execute_loop_DIR) --makefile=Makefile; + +Execute_loop_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Read_unit_library_clean; \ + $(MAKE) Functionnal_unit_library_clean; \ + $(MAKE) Load_store_unit_library_clean; \ + $(MAKE) Write_unit_library_clean; \ + $(MAKE) Register_unit_library_clean; \ + $(MAKE) Read_unit_to_Execution_unit_library_clean; \ + $(MAKE) Execution_unit_to_Write_unit_library_clean; \ + $(MAKE) --directory=$(Execute_loop_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps (revision 78) @@ -20,4 +20,5 @@ Functionnal_unit_LIBRARY = -lFunctionnal_unit \ $(Custom_LIBRARY) \ + -lFunctionnal_unit \ $(Behavioural_LIBRARY) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile (revision 78) @@ -0,0 +1,23 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libOperation.a + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Operation = yes + +#-----[ Directory ]---------------------------------------- + +Operation_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation + +#-----[ Library ]------------------------------------------ + +Operation_LIBRARY = -lOperation + +Operation_DIR_LIBRARY = -L$(Operation_DIR)/lib + +#-----[ Rules ]-------------------------------------------- + +Operation_library : + @\ + $(MAKE) --directory=$(Operation_DIR) --makefile=Makefile; + +Operation_library_clean : + @\ + $(MAKE) --directory=$(Operation_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h (revision 78) @@ -0,0 +1,75 @@ +#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h +#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Common/include/ErrorMorpheo.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { +namespace multi_execute_unit { +namespace execute_unit { +namespace functionnal_unit { + + void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_add (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_addc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sub (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); +//void operation_l_mul (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); +//void operation_l_mulu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); +//void operation_l_div (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); +//void operation_l_divu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_and (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_or (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_xor (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_test_f (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_test_nf (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_jalr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sll (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sra (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_srl (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_ror (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_movhi (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_extend_s (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_extend_z (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_cmov (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_ff1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_fl1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_mfspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_mtspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfeq (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfne (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfgeu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfgtu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfleu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfltu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfges (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfgts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sfles (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_sflts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_mac (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_msb (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + void operation_l_macrc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); + +}; // end namespace functionnal_unit +}; // end namespace execute_unit +}; // end namespace multi_execute_unit +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h (revision 78) @@ -0,0 +1,168 @@ +#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h +#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include "Common/include/BitManipulation.h" +#include "Behavioural/include/SPR_access_mode.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { +namespace multi_execute_unit { +namespace execute_unit { +namespace functionnal_unit { + + class execute_timing_t + { + // if delay > 0, can't accepted a transaction on EXECUTE_IN's interface. + public : uint32_t _delay ; + // if latence > 0, can't initiate a transaction on EXECUTE_OUT's interface. + public : uint32_t _latence; + + public : execute_timing_t (uint32_t delay=0, uint32_t latence=0) + { + _delay = delay; + _latence = latence; + }; + }; + + typedef struct + { + execute_timing_t _timing ; + + Tcontext_t _context_id ; + Tcontext_t _front_end_id ; + Tcontext_t _ooo_engine_id; + Tpacket_t _packet_id ; + + Toperation_t _operation ; + Ttype_t _type ; + Tcontrol_t _has_immediat; + Tgeneral_data_t _immediat ; + Tgeneral_data_t _data_ra ; + Tgeneral_data_t _data_rb ; + Tspecial_data_t _data_rc ; + Tgeneral_data_t _data_rd ; + Tspecial_data_t _data_re ; + + Tcontrol_t _write_rd ; + Tgeneral_address_t _num_reg_rd; + Tcontrol_t _write_re ; + Tspecial_address_t _num_reg_re; + + Texception_t _exception ; + Tcontrol_t _no_sequence ; + Tgeneral_data_t _address ; + } execute_operation_t; + + class execute_param_t + { + public : const uint32_t _size_data; + public : const Tgeneral_data_t _mask_data; + public : const Tgeneral_data_t _mask_shift; + public : execute_timing_t ** _timing; + + public : execute_param_t (const uint32_t size_data, + execute_timing_t ** timing): + _size_data (size_data), + _mask_data (gen_mask (size_data)), + _mask_shift(gen_mask (log2(size_data))) + { + _timing = timing; + }; + public : ~execute_param_t (void) + { + }; + } ; + + class execute_register_t + { + // information to custom group : + // * perhalps a custom group start an operation after a access at a internal's group register + public : bool _i_read_spr; + public : bool _i_write_spr; + public : uint32_t _access_num_group; + public : uint32_t _access_num_register; + public : Tgeneral_data_t _spr_old; + public : Tgeneral_data_t ** _spr; + public : SPR_access_mode * _spr_access_mode; + + public : execute_register_t (void) + { + _spr = new Tgeneral_data_t * [NB_GROUP]; + _spr_access_mode = new SPR_access_mode; + + for (uint32_t i=0; i NB_GROUP) or (_spr[num_group] != NULL)) + throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented."); + + if (nb_reg > 0) + { + _spr [num_group] = new Tgeneral_data_t [nb_reg]; + + if (num_group >= GROUP_CUSTOM_1) + _spr_access_mode ->implement_group(num_group, nb_reg); + } + } + + public : void implement_group (uint32_t num_group) + { + if ((num_group > NB_GROUP) or (_spr[num_group] != NULL)) + throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented."); + + uint32_t nb_reg = _spr_access_mode ->implement_group(num_group); + + if (nb_reg > 0) + _spr [num_group] = new Tgeneral_data_t [nb_reg]; + } + }; + + typedef void function_execute_t + (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, + morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, + morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); + + typedef void function_execute_end_cycle_t + (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, + morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); + + +}; // end namespace functionnal_unit +}; // end namespace execute_unit +}; // end namespace multi_execute_unit +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp (revision 78) @@ -0,0 +1,836 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" + +#define neg(data) (~(data)+1) +#define sign(data) ((data)>>(param->_size_data-1)) +#define unsigned(data) (data) +#define signed(data) ((sign(data)==0)?(data):neg(data)) +#define ovf(op1, op2, res) ((sign(op1) == sign(op2))?(sign(op1) xor sign(res)):0) +#define carry(op1, op2, res) (((res)<(op1)) or ((res)<(op2))) +#define set_flag(data,flag,is_set) (((is_set)==1)?((data)|(flag)):((data)&~(flag))) +#define get_flag(data,flag) (((data)&(flag))!=0) +#define concatenation_bool(a,b) (((a)<<1) | (b)) + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { +namespace multi_execute_unit { +namespace execute_unit { +namespace functionnal_unit { + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_unimplemented" + void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : unimplemented"); + + throw ERRORMORPHEO(FUNCTION,"The operation '"+toString(op->_operation)+"' is not implemented in this Functionnal_unit"); + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_add" + void operation_l_add (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_add"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + Tgeneral_data_t gpr3 = param->_mask_data & (gpr1 + gpr2); + + bool overflow = ovf (gpr1,gpr2,gpr3); + bool carry_out = carry(gpr1,gpr2,gpr3); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + op->_data_re = 0; + op->_data_re = set_flag(op->_data_re,FLAG_OV,overflow ); + op->_data_re = set_flag(op->_data_re,FLAG_CY,carry_out); + op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_addc" + void operation_l_addc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_addc"); + + Tgeneral_data_t carry_in = get_flag(op->_data_rc,FLAG_CY); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = param->_mask_data & (gpr1 + gpr2 + carry_in); + + bool overflow = ovf (gpr1,gpr2,gpr3); + bool carry_out = carry(gpr1,gpr2,gpr3); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + op->_data_re = 0; + op->_data_re = set_flag(op->_data_re,FLAG_OV,overflow ); + op->_data_re = set_flag(op->_data_re,FLAG_CY,carry_out); + op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sub" + void operation_l_sub (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sub"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = neg(unsigned(op->_data_rb)); + Tgeneral_data_t gpr3 = param->_mask_data & (gpr1 + gpr2); + + bool overflow = ovf (gpr1,gpr2,gpr3); + bool carry_out = carry(gpr1,gpr2,gpr3); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + op->_data_re = 0; + op->_data_re = set_flag(op->_data_re,FLAG_OV,overflow ); + op->_data_re = set_flag(op->_data_re,FLAG_CY,carry_out); + op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_and" + void operation_l_and (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_and"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = (gpr1 & gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_or" + void operation_l_or (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_or"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = (gpr1 | gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_xor" + void operation_l_xor (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_xor"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = (gpr1 ^ gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_movhi" + void operation_l_movhi (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_movhi"); + + Tgeneral_data_t gpr1 = unsigned(op->_immediat); + Tgeneral_data_t gpr2 = param->_mask_data & (gpr1<<16); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr2; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_cmov" + void operation_l_cmov (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_cmov"); + + Tgeneral_data_t f_in = get_flag(op->_data_rc,FLAG_F); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned(op->_data_rb); + Tgeneral_data_t gpr3 = ((f_in==0)?gpr2:gpr1); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_test_f" + void operation_l_test_f (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_f"); + + Tgeneral_data_t f_in = get_flag(op->_data_rc,FLAG_F); + Tgeneral_data_t imm = unsigned(op->_immediat); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = f_in != 0; + op->_address = imm; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_test_nf" + void operation_l_test_nf (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_nf"); + + Tgeneral_data_t f_in = get_flag(op->_data_rc,FLAG_F); + Tgeneral_data_t imm = unsigned(op->_immediat); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = f_in == 0; + op->_address = imm; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_jalr" + void operation_l_jalr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_jalr"); + // jal : has_imm = 1, write_rd = 1, read_rb = 0 + // jalr : has_imm = 1, write_rd = 1, read_rb = 1 + // jr : has_imm = 0, write_rd = 0, read_rb = 1 + + + Tgeneral_data_t gpr = unsigned(op->_data_rb); + Tgeneral_data_t imm = unsigned(op->_immediat); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = imm; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 1; + op->_address = gpr; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_extend_s" + void operation_l_extend_s (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_s"); + + Tgeneral_data_t imm = unsigned(op->_immediat); + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = extend(param->_size_data, gpr1, true , imm); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr2; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_extend_z" + void operation_l_extend_z (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_z"); + + Tgeneral_data_t imm = unsigned(op->_immediat); + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = extend(param->_size_data, gpr1, false , imm); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr2; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sll" + void operation_l_sll (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sll"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = shift_logic_left(param->_size_data, gpr1, gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_srl" + void operation_l_srl (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_srl"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = shift_logic_right(param->_size_data, gpr1, gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sra" + void operation_l_sra (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sra"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = shift_arithmetic_right(param->_size_data, gpr1, gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_ror" + void operation_l_ror (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ror"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + Tgeneral_data_t gpr3 = rotate_right(param->_size_data, gpr1, gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr3; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_ff1" + void operation_l_ff1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ff1"); + + Tgeneral_data_t gpr = unsigned(op->_data_ra); + Tgeneral_data_t index; + + for (index=0; (index_size_data) and (((gpr>>index)&1)!= 1); index++); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = (index==param->_size_data)?0:(index+1); + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_fl1" + void operation_l_fl1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_fl1"); + + Tgeneral_data_t gpr = unsigned(op->_data_ra); + Tgeneral_data_t index; + + for (index=param->_size_data; (index>0) and (((gpr>>(index-1))&1)!= 1); index--); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = index; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfeq" + void operation_l_sfeq (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfeq"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + bool f_out = (gpr1 == gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfne" + void operation_l_sfne (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfne"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + bool f_out = (gpr1 != gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfgeu" + void operation_l_sfgeu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgeu"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + bool f_out = (gpr1 >= gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfgtu" + void operation_l_sfgtu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgtu"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + bool f_out = (gpr1 > gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfleu" + void operation_l_sfleu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfleu"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + bool f_out = (gpr1 <= gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfltu" + void operation_l_sfltu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfltu"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + + bool f_out = (gpr1 < gpr2); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfges" + void operation_l_sfges (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfges"); + + Tgeneral_data_t gpr1 = op->_data_ra; + Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb; + + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x",unsigned(op->_data_ra)); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ras : %.8x", signed(op->_data_ra)); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x",unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb)); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rbs : %.8x", signed((op->_has_immediat==1)?op->_immediat:op->_data_rb)); + + bool f_out; + + switch (concatenation_bool(sign(gpr1),sign(gpr2))) + { + case 1 /*b01*/ : f_out = 1 ; break; + case 2 /*b10*/ : f_out = 0 ; break; + default : f_out = signed(gpr1) >= signed(gpr2); break; + } + + log_printf(TRACE,Functionnal_unit,FUNCTION," * f_out : %.8x",f_out); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfgts" + void operation_l_sfgts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgts"); + + Tgeneral_data_t gpr1 = op->_data_ra ; + Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb ; + + bool f_out; + + switch (concatenation_bool(sign(gpr1),sign(gpr2))) + { + case 1 /*b01*/ : f_out = 1; break; + case 2 /*b10*/ : f_out = 0; break; + default : f_out = signed(gpr1) > signed(gpr2); break; + } + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sfles" + void operation_l_sfles (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfles"); + + Tgeneral_data_t gpr1 = op->_data_ra ; + Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb ; + + bool f_out; + + switch (concatenation_bool(sign(gpr1),sign(gpr2))) + { + case 1 /*b01*/ : f_out = 0; break; + case 2 /*b10*/ : f_out = 1; break; + default : f_out = signed(gpr1) <= signed(gpr2); break; + } + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_sflts" + void operation_l_sflts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sflts"); + + Tgeneral_data_t gpr1 = op->_data_ra ; + Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb; + + bool f_out; + + switch (concatenation_bool(sign(gpr1),sign(gpr2))) + { + case 1 /*b01*/ : f_out = 0; break; + case 2 /*b10*/ : f_out = 1; break; + default : f_out = signed(gpr1) < signed(gpr2); break; + } + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_mtspr" + void operation_l_mtspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mtspr"); + + Tgeneral_data_t imm = unsigned(op->_immediat); + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned(op->_data_rb); + Tgeneral_data_t addr = range(gpr1|imm,16); + + Texception_t exception; + + // HACK : use the field num_reg_re to pass the SM and SUMRA flag. + Tcontrol_t flag_SM = get_flag(op->_num_reg_re, 0x1); + Tcontrol_t flag_SUMRA = get_flag(op->_num_reg_re, 0x2); + + spr_address_t spr_addr = reg->_spr_access_mode->translate_address(addr); + + // Test if this group is implemented in this functionnal_unit + if (reg->_spr_access_mode->valid(spr_addr)) + { + if (reg->_spr_access_mode->write(spr_addr, flag_SM, flag_SUMRA)) + { + reg->_i_write_spr = true; + reg->_access_num_group = spr_addr._group; + reg->_access_num_register = spr_addr._register; + reg->_spr_old = reg->_spr[spr_addr._group][spr_addr._register]; + reg->_spr[spr_addr._group][spr_addr._register] = gpr2; + + exception = EXCEPTION_ALU_NONE; + } + else + { + exception = EXCEPTION_ALU_SPR_ACCESS_INVALID; + } + } + else + { + exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE; + } + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr2; // data_rb + //op->_data_re = 0; + op->_exception = exception; + op->_no_sequence = 0; + op->_address = addr; // data_ra or imm + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_mfspr" + void operation_l_mfspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mfspr"); + + Tgeneral_data_t imm = unsigned(op->_immediat); + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = 0; + Tgeneral_data_t addr = range(gpr1|imm,16); + + Texception_t exception; + + // HACK : use the field num_reg_re to pass the SM and SUMRA flag. + Tcontrol_t flag_SM = get_flag(op->_num_reg_re, 0x1); + Tcontrol_t flag_SUMRA = get_flag(op->_num_reg_re, 0x2); + + spr_address_t spr_addr = reg->_spr_access_mode->translate_address(addr); + + // Test if this group is implemented in this functionnal_unit + if (reg->_spr_access_mode->valid(spr_addr)) + { + if (reg->_spr_access_mode->read(spr_addr, flag_SM, flag_SUMRA)) + { + reg->_i_read_spr = true; + reg->_access_num_group = spr_addr._group; + reg->_access_num_register = spr_addr._register; + + gpr2 = reg->_spr[spr_addr._group][spr_addr._register]; + + exception = EXCEPTION_ALU_NONE; + } + else + { + exception = EXCEPTION_ALU_SPR_ACCESS_INVALID; + } + } + else + { + exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE; + } + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_write_rd = (exception == EXCEPTION_ALU_NONE); + op->_data_rd = gpr2; // spr + //op->_data_re = 0; + op->_exception = exception; + op->_no_sequence = 0; + op->_address = addr; // data_ra or imm + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_macrc" + void operation_l_macrc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_macrc"); + + Tgeneral_data_t gpr = static_cast(range((static_cast(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast(reg->_spr[GROUP_MAC][SPR_MACLO]), param->_size_data)); + + reg->_spr[GROUP_MAC][SPR_MACLO] = 0; + reg->_spr[GROUP_MAC][SPR_MACHI] = 0; + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + op->_data_rd = gpr; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_mac" + void operation_l_mac (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mac"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + uint64_t temp = range(gpr1 * gpr2, 32); + + temp = ((static_cast(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast(reg->_spr[GROUP_MAC][SPR_MACLO])) + temp; + + reg->_spr[GROUP_MAC][SPR_MACLO] = range(temp ,32); + reg->_spr[GROUP_MAC][SPR_MACHI] = range(temp>>32,32); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +#undef FUNCTION +#define FUNCTION "Functionnal_unit::operation_l_msb" + void operation_l_msb (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) + { + log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_msb"); + + Tgeneral_data_t gpr1 = unsigned(op->_data_ra); + Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); + uint64_t temp = range(gpr1 * gpr2, 32); + + temp = ((static_cast(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast(reg->_spr[GROUP_MAC][SPR_MACLO])) - temp; + + reg->_spr[GROUP_MAC][SPR_MACLO] = range(temp ,32); + reg->_spr[GROUP_MAC][SPR_MACHI] = range(temp>>32,32); + + // Result + op->_timing = param->_timing[op->_type][op->_operation]; + //op->_data_rd = 0; + //op->_data_re = 0; + op->_exception = EXCEPTION_ALU_NONE; + op->_no_sequence = 0; + //op->_address = 0; + }; + +}; // end namespace functionnal_unit +}; // end namespace execute_unit +}; // end namespace multi_execute_unit +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg (revision 78) @@ -8,2 +8,4 @@ 2 2 +1 # size_special_data 16 16 +1 # nb_special_register +4 4 *2 # size_store_queue +1 4 *4 # size_load_queue Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp (revision 78) @@ -9,5 +9,5 @@ #include "Behavioural/Custom/include/Custom_example.h" -#define NB_PARAMS 8 +#define NB_PARAMS 10 void usage (int argc, char * argv[]) @@ -23,4 +23,6 @@ err (_(" * size_special_data (uint32_t)\n")); err (_(" * nb_special_register (uint32_t)\n")); + err (_(" * size_store_queue (uint32_t)\n")); + err (_(" * size_load_queue (uint32_t)\n")); exit (1); } @@ -46,4 +48,6 @@ const uint32_t size_special_data = atoi(argv[x++]); const uint32_t nb_special_register = atoi(argv[x++]); + const uint32_t size_store_queue = atoi(argv[x++]); + const uint32_t size_load_queue = atoi(argv[x++]); execute_timing_t ** timing = new execute_timing_t * [MAX_TYPE]; @@ -68,4 +72,6 @@ size_special_data , nb_special_register , + size_store_queue , + size_load_queue , timing , &(morpheo::behavioural::custom::example_get_custom_information) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp (revision 78) @@ -142,4 +142,6 @@ sc_signal in_EXECUTE_IN_OPERATION (rename.c_str()); sc_signal in_EXECUTE_IN_TYPE (rename.c_str()); + sc_signal in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE (rename.c_str()); + sc_signal in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE (rename.c_str()); sc_signal in_EXECUTE_IN_HAS_IMMEDIAT (rename.c_str()); sc_signal in_EXECUTE_IN_IMMEDIAT (rename.c_str()); @@ -160,5 +162,5 @@ sc_signal out_EXECUTE_OUT_PACKET_ID (rename.c_str()); //sc_signal out_EXECUTE_OUT_OPERATION (rename.c_str()); -//sc_signal out_EXECUTE_OUT_TYPE (rename.c_str()); + sc_signal out_EXECUTE_OUT_TYPE (rename.c_str()); sc_signal out_EXECUTE_OUT_WRITE_RD (rename.c_str()); sc_signal out_EXECUTE_OUT_NUM_REG_RD (rename.c_str()); @@ -191,4 +193,7 @@ (*(_Functionnal_unit-> in_EXECUTE_IN_OPERATION )) ( in_EXECUTE_IN_OPERATION ); (*(_Functionnal_unit-> in_EXECUTE_IN_TYPE )) ( in_EXECUTE_IN_TYPE ); + (*(_Functionnal_unit-> in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE)) ( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE); + if (_param->_have_port_load_queue_ptr) + (*(_Functionnal_unit-> in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE )) ( in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE ); (*(_Functionnal_unit-> in_EXECUTE_IN_HAS_IMMEDIAT )) ( in_EXECUTE_IN_HAS_IMMEDIAT ); (*(_Functionnal_unit-> in_EXECUTE_IN_IMMEDIAT )) ( in_EXECUTE_IN_IMMEDIAT ); @@ -212,5 +217,5 @@ (*(_Functionnal_unit->out_EXECUTE_OUT_PACKET_ID )) (out_EXECUTE_OUT_PACKET_ID ); //(*(_Functionnal_unit->out_EXECUTE_OUT_OPERATION )) (out_EXECUTE_OUT_OPERATION ); -//(*(_Functionnal_unit->out_EXECUTE_OUT_TYPE )) (out_EXECUTE_OUT_TYPE ); + (*(_Functionnal_unit->out_EXECUTE_OUT_TYPE )) (out_EXECUTE_OUT_TYPE ); (*(_Functionnal_unit->out_EXECUTE_OUT_WRITE_RD )) (out_EXECUTE_OUT_WRITE_RD ); (*(_Functionnal_unit->out_EXECUTE_OUT_NUM_REG_RD )) (out_EXECUTE_OUT_NUM_REG_RD ); @@ -616,4 +621,7 @@ in_EXECUTE_IN_OPERATION .write(transaction_in.front()._operation ); in_EXECUTE_IN_TYPE .write(transaction_in.front()._type ); + in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE.write(0); + if (_param->_have_port_load_queue_ptr) + in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE .write(0); in_EXECUTE_IN_HAS_IMMEDIAT .write(transaction_in.front()._has_immediat ); in_EXECUTE_IN_IMMEDIAT .write(transaction_in.front()._immediat ); @@ -641,5 +649,5 @@ TEST(Tcontext_t , out_EXECUTE_OUT_OOO_ENGINE_ID.read(), transaction_out.front()._ooo_engine_id); //TEST(Toperation_t , out_EXECUTE_OUT_OPERATION .read(), transaction_out.front()._operation ); - //TEST(Ttype_t , out_EXECUTE_OUT_TYPE .read(), transaction_out.front()._type ); + TEST(Ttype_t , out_EXECUTE_OUT_TYPE .read(), transaction_out.front()._type ); TEST(Tcontrol_t , out_EXECUTE_OUT_WRITE_RE .read(), transaction_out.front()._write_re ); TEST(Tgeneral_address_t, out_EXECUTE_OUT_NUM_REG_RD .read(), transaction_out.front()._num_reg_rd ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (revision 78) @@ -10,6 +10,4 @@ */ -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h" - #ifdef SYSTEMC #include "systemc.h" @@ -20,7 +18,9 @@ #include "Common/include/Debug.h" #include "Behavioural/include/Types.h" +#include "Behavioural/include/Identification.h" +#include "Behavioural/include/Types.h" #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" #ifdef STATISTICS #include "Behavioural/include/Stat.h" @@ -86,4 +86,6 @@ public : SC_IN (Toperation_t ) * in_EXECUTE_IN_OPERATION ; public : SC_IN (Ttype_t ) * in_EXECUTE_IN_TYPE ; + public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE; + public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE; public : SC_IN (Tcontrol_t ) * in_EXECUTE_IN_HAS_IMMEDIAT ; public : SC_IN (Tgeneral_data_t ) * in_EXECUTE_IN_IMMEDIAT ; @@ -104,5 +106,5 @@ public : SC_OUT(Tpacket_t ) * out_EXECUTE_OUT_PACKET_ID ; //public : SC_OUT(Toperation_t ) * out_EXECUTE_OUT_OPERATION ; -//public : SC_OUT(Ttype_t ) * out_EXECUTE_OUT_TYPE ; + public : SC_OUT(Ttype_t ) * out_EXECUTE_OUT_TYPE ; public : SC_OUT(Tcontrol_t ) * out_EXECUTE_OUT_WRITE_RD ; public : SC_OUT(Tgeneral_address_t) * out_EXECUTE_OUT_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h (revision 77) +++ (revision ) @@ -1,75 +1,0 @@ -#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h -#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Common/include/ToString.h" -#include "Common/include/Debug.h" -#include "Common/include/ErrorMorpheo.h" -#include "Behavioural/include/Types.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_execute_loop { -namespace execute_loop { -namespace multi_execute_unit { -namespace execute_unit { -namespace functionnal_unit { - - void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_add (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_addc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sub (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); -//void operation_l_mul (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); -//void operation_l_mulu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); -//void operation_l_div (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); -//void operation_l_divu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_and (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_or (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_xor (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_test_f (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_test_nf (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_jalr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sll (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sra (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_srl (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_ror (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_movhi (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_extend_s (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_extend_z (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_cmov (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_ff1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_fl1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_mfspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_mtspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfeq (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfne (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfgeu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfgtu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfleu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfltu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfges (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfgts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sfles (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_sflts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_mac (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_msb (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - void operation_l_macrc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param); - -}; // end namespace functionnal_unit -}; // end namespace execute_unit -}; // end namespace multi_execute_unit -}; // end namespace execute_loop -}; // end namespace multi_execute_loop -}; // end namespace core -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h (revision 78) @@ -11,6 +11,7 @@ #include "Common/include/Debug.h" #include "Behavioural/include/Parameters.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" #include "Behavioural/Custom/include/Custom.h" +#include "Behavioural/Custom/include/Custom_default.h" #include @@ -36,4 +37,7 @@ public : const uint32_t _size_special_data ; public : const uint32_t _nb_special_register ; + public : const uint32_t _size_store_queue ; + public : const uint32_t _size_load_queue ; + public : execute_timing_t ** _timing ; public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t); @@ -50,4 +54,5 @@ public : const bool _have_port_ooo_engine_id ; public : const bool _have_port_packet_id ; + public : const bool _have_port_load_queue_ptr ; public : const bool _have_groupe_MAC ; @@ -62,4 +67,6 @@ uint32_t size_special_data , uint32_t nb_special_register, + uint32_t size_store_queue , + uint32_t size_load_queue , execute_timing_t** timing , morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)); @@ -67,5 +74,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h (revision 77) +++ (revision ) @@ -1,166 +1,0 @@ -#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h -#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h - -/* - * $Id$ - * - * [ Description ] - * - */ - -#ifdef SYSTEMC -#include "systemc.h" -#endif - -#include "Common/include/BitManipulation.h" -#include "Behavioural/include/SPR_access_mode.h" -#include "Behavioural/include/Types.h" -#include "Behavioural/include/Parameters.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_execute_loop { -namespace execute_loop { -namespace multi_execute_unit { -namespace execute_unit { -namespace functionnal_unit { - - class execute_timing_t - { - // if delay > 0, can't accepted a transaction on EXECUTE_IN's interface. - public : uint32_t _delay ; - // if latence > 0, can't initiate a transaction on EXECUTE_OUT's interface. - public : uint32_t _latence; - - public : execute_timing_t (uint32_t delay=0, uint32_t latence=0) - { - _delay = delay; - _latence = latence; - }; - }; - - typedef struct - { - execute_timing_t _timing ; - - Tcontext_t _context_id ; - Tcontext_t _front_end_id ; - Tcontext_t _ooo_engine_id; - Tpacket_t _packet_id ; - - Toperation_t _operation ; - Ttype_t _type ; - Tcontrol_t _has_immediat; - Tgeneral_data_t _immediat ; - Tgeneral_data_t _data_ra ; - Tgeneral_data_t _data_rb ; - Tspecial_data_t _data_rc ; - Tgeneral_data_t _data_rd ; - Tspecial_data_t _data_re ; - - Tcontrol_t _write_rd ; - Tgeneral_address_t _num_reg_rd; - Tcontrol_t _write_re ; - Tspecial_address_t _num_reg_re; - - Texception_t _exception ; - Tcontrol_t _no_sequence ; - Tgeneral_data_t _address ; - } execute_operation_t; - - class execute_param_t - { - public : const uint32_t _size_data; - public : const Tgeneral_data_t _mask_data; - public : const Tgeneral_data_t _mask_shift; - public : execute_timing_t ** _timing; - - public : execute_param_t (const uint32_t size_data, - execute_timing_t ** timing): - _size_data (size_data), - _mask_data (gen_mask (size_data)), - _mask_shift(gen_mask (log2(size_data))) - { - _timing = timing; - }; - public : ~execute_param_t (void) - { - }; - } ; - - class execute_register_t - { - // information to custom group : - // * perhalps a custom group start an operation after a access at a internal's group register - public : bool _i_read_spr; - public : bool _i_write_spr; - public : uint32_t _access_num_group; - public : uint32_t _access_num_register; - public : Tgeneral_data_t _spr_old; - public : Tgeneral_data_t ** _spr; - public : SPR_access_mode * _spr_access_mode; - - public : execute_register_t (void) - { - _spr = new Tgeneral_data_t * [NB_GROUP]; - _spr_access_mode = new SPR_access_mode; - - for (uint32_t i=0; i NB_GROUP) or (_spr[num_group] != NULL)) - throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented."); - - if (nb_reg > 0) - { - _spr [num_group] = new Tgeneral_data_t [nb_reg]; - - if (num_group >= GROUP_CUSTOM_1) - _spr_access_mode ->implement_group(num_group, nb_reg); - } - } - - public : void implement_group (uint32_t num_group) - { - if ((num_group > NB_GROUP) or (_spr[num_group] != NULL)) - throw ERRORMORPHEO("execute_register_t::implement_group", "Invalid group number or this group is already implemented."); - - uint32_t nb_reg = _spr_access_mode ->implement_group(num_group); - - if (nb_reg > 0) - _spr [num_group] = new Tgeneral_data_t [nb_reg]; - } - }; - - typedef void function_execute_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, - morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, - morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); - - typedef void function_execute_end_cycle_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, - morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); - - -}; // end namespace functionnal_unit -}; // end namespace execute_unit -}; // end namespace multi_execute_unit -}; // end namespace execute_loop -}; // end namespace multi_execute_loop -}; // end namespace core -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (revision 78) @@ -71,4 +71,7 @@ in_EXECUTE_IN_OPERATION = interface->set_signal_in ("operation" , _param->_size_operation ); in_EXECUTE_IN_TYPE = interface->set_signal_in ("type" , _param->_size_type ); + in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in ("store_queue_ptr_write",log2(_param->_size_store_queue)); + if (_param->_have_port_load_queue_ptr) + in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in ("load_queue_ptr_write" ,log2(_param->_size_load_queue)); in_EXECUTE_IN_HAS_IMMEDIAT = interface->set_signal_in ("has_immediat" , 1); in_EXECUTE_IN_IMMEDIAT = interface->set_signal_in ("immediat" , _param->_size_general_data); @@ -102,5 +105,5 @@ out_EXECUTE_OUT_PACKET_ID = interface->set_signal_out ("packet_id" ,_param->_size_packet_id ); //out_EXECUTE_OUT_OPERATION = interface->set_signal_out ("operation" ,_param->_size_operation ); - //out_EXECUTE_OUT_TYPE = interface->set_signal_out ("type" ,_param->_size_type ); + out_EXECUTE_OUT_TYPE = interface->set_signal_out ("type" ,_param->_size_type ); out_EXECUTE_OUT_WRITE_RD = interface->set_signal_out ("write_rd" ,1); out_EXECUTE_OUT_NUM_REG_RD = interface->set_signal_out ("num_reg_rd" ,_param->_size_general_register); @@ -111,5 +114,5 @@ out_EXECUTE_OUT_EXCEPTION = interface->set_signal_out ("exception" ,_param->_size_exception); out_EXECUTE_OUT_NO_SEQUENCE = interface->set_signal_out ("no_sequence" ,1); - out_EXECUTE_OUT_ADDRESS = interface->set_signal_out ("address " ,_param->_size_general_data); + out_EXECUTE_OUT_ADDRESS = interface->set_signal_out ("address" ,_param->_size_general_data); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (revision 78) @@ -41,4 +41,7 @@ delete in_EXECUTE_IN_OPERATION ; delete in_EXECUTE_IN_TYPE ; + delete in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) + delete in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE ; delete in_EXECUTE_IN_HAS_IMMEDIAT ; delete in_EXECUTE_IN_IMMEDIAT ; @@ -62,5 +65,5 @@ delete out_EXECUTE_OUT_PACKET_ID ; //delete out_EXECUTE_OUT_OPERATION ; - //delete out_EXECUTE_OUT_TYPE ; + delete out_EXECUTE_OUT_TYPE ; delete out_EXECUTE_OUT_WRITE_RD ; delete out_EXECUTE_OUT_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp (revision 78) @@ -37,5 +37,5 @@ PORT_WRITE(out_EXECUTE_OUT_PACKET_ID ,_execute_operation->_packet_id ); //PORT_WRITE(out_EXECUTE_OUT_OPERATION ,_execute_operation->_operation ); - //PORT_WRITE(out_EXECUTE_OUT_TYPE ,_execute_operation->_type ); + PORT_WRITE(out_EXECUTE_OUT_TYPE ,_execute_operation->_type ); PORT_WRITE(out_EXECUTE_OUT_WRITE_RD ,_execute_operation->_write_rd ); PORT_WRITE(out_EXECUTE_OUT_NUM_REG_RD ,_execute_operation->_num_reg_rd ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Operation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Operation.cpp (revision 77) +++ (revision ) @@ -1,836 +1,0 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h" - -#define neg(data) (~(data)+1) -#define sign(data) ((data)>>(param->_size_data-1)) -#define unsigned(data) (data) -#define signed(data) ((sign(data)==0)?(data):neg(data)) -#define ovf(op1, op2, res) ((sign(op1) == sign(op2))?(sign(op1) xor sign(res)):0) -#define carry(op1, op2, res) (((res)<(op1)) or ((res)<(op2))) -#define set_flag(data,flag,is_set) (((is_set)==1)?((data)|(flag)):((data)&~(flag))) -#define get_flag(data,flag) (((data)&(flag))!=0) -#define concatenation_bool(a,b) (((a)<<1) | (b)) - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_execute_loop { -namespace execute_loop { -namespace multi_execute_unit { -namespace execute_unit { -namespace functionnal_unit { - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_unimplemented" - void operation_unimplemented (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : unimplemented"); - - throw ERRORMORPHEO(FUNCTION,"The operation '"+toString(op->_operation)+"' is not implemented in this Functionnal_unit"); - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_add" - void operation_l_add (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_add"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - Tgeneral_data_t gpr3 = param->_mask_data & (gpr1 + gpr2); - - bool overflow = ovf (gpr1,gpr2,gpr3); - bool carry_out = carry(gpr1,gpr2,gpr3); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - op->_data_re = 0; - op->_data_re = set_flag(op->_data_re,FLAG_OV,overflow ); - op->_data_re = set_flag(op->_data_re,FLAG_CY,carry_out); - op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_addc" - void operation_l_addc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_addc"); - - Tgeneral_data_t carry_in = get_flag(op->_data_rc,FLAG_CY); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = param->_mask_data & (gpr1 + gpr2 + carry_in); - - bool overflow = ovf (gpr1,gpr2,gpr3); - bool carry_out = carry(gpr1,gpr2,gpr3); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - op->_data_re = 0; - op->_data_re = set_flag(op->_data_re,FLAG_OV,overflow ); - op->_data_re = set_flag(op->_data_re,FLAG_CY,carry_out); - op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sub" - void operation_l_sub (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sub"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = neg(unsigned(op->_data_rb)); - Tgeneral_data_t gpr3 = param->_mask_data & (gpr1 + gpr2); - - bool overflow = ovf (gpr1,gpr2,gpr3); - bool carry_out = carry(gpr1,gpr2,gpr3); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - op->_data_re = 0; - op->_data_re = set_flag(op->_data_re,FLAG_OV,overflow ); - op->_data_re = set_flag(op->_data_re,FLAG_CY,carry_out); - op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_and" - void operation_l_and (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_and"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = (gpr1 & gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_or" - void operation_l_or (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_or"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = (gpr1 | gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_xor" - void operation_l_xor (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_xor"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = (gpr1 ^ gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_movhi" - void operation_l_movhi (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_movhi"); - - Tgeneral_data_t gpr1 = unsigned(op->_immediat); - Tgeneral_data_t gpr2 = param->_mask_data & (gpr1<<16); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr2; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_cmov" - void operation_l_cmov (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_cmov"); - - Tgeneral_data_t f_in = get_flag(op->_data_rc,FLAG_F); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned(op->_data_rb); - Tgeneral_data_t gpr3 = ((f_in==0)?gpr2:gpr1); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_test_f" - void operation_l_test_f (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_f"); - - Tgeneral_data_t f_in = get_flag(op->_data_rc,FLAG_F); - Tgeneral_data_t imm = unsigned(op->_immediat); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = f_in != 0; - op->_address = imm; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_test_nf" - void operation_l_test_nf (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_test_nf"); - - Tgeneral_data_t f_in = get_flag(op->_data_rc,FLAG_F); - Tgeneral_data_t imm = unsigned(op->_immediat); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = f_in == 0; - op->_address = imm; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_jalr" - void operation_l_jalr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_jalr"); - // jal : has_imm = 1, write_rd = 1, read_rb = 0 - // jalr : has_imm = 1, write_rd = 1, read_rb = 1 - // jr : has_imm = 0, write_rd = 0, read_rb = 1 - - - Tgeneral_data_t gpr = unsigned(op->_data_rb); - Tgeneral_data_t imm = unsigned(op->_immediat); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = imm; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 1; - op->_address = gpr; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_extend_s" - void operation_l_extend_s (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_s"); - - Tgeneral_data_t imm = unsigned(op->_immediat); - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = extend(param->_size_data, gpr1, true , imm); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr2; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_extend_z" - void operation_l_extend_z (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_extend_z"); - - Tgeneral_data_t imm = unsigned(op->_immediat); - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = extend(param->_size_data, gpr1, false , imm); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr2; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sll" - void operation_l_sll (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sll"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = shift_logic_left(param->_size_data, gpr1, gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_srl" - void operation_l_srl (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_srl"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = shift_logic_right(param->_size_data, gpr1, gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sra" - void operation_l_sra (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sra"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = shift_arithmetic_right(param->_size_data, gpr1, gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_ror" - void operation_l_ror (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ror"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = param->_mask_shift & unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - Tgeneral_data_t gpr3 = rotate_right(param->_size_data, gpr1, gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr3; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_ff1" - void operation_l_ff1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_ff1"); - - Tgeneral_data_t gpr = unsigned(op->_data_ra); - Tgeneral_data_t index; - - for (index=0; (index_size_data) and (((gpr>>index)&1)!= 1); index++); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = (index==param->_size_data)?0:(index+1); - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_fl1" - void operation_l_fl1 (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_fl1"); - - Tgeneral_data_t gpr = unsigned(op->_data_ra); - Tgeneral_data_t index; - - for (index=param->_size_data; (index>0) and (((gpr>>(index-1))&1)!= 1); index--); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = index; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfeq" - void operation_l_sfeq (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfeq"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - bool f_out = (gpr1 == gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfne" - void operation_l_sfne (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfne"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - bool f_out = (gpr1 != gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfgeu" - void operation_l_sfgeu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgeu"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - bool f_out = (gpr1 >= gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfgtu" - void operation_l_sfgtu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgtu"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - bool f_out = (gpr1 > gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfleu" - void operation_l_sfleu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfleu"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - bool f_out = (gpr1 <= gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfltu" - void operation_l_sfltu (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfltu"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - - bool f_out = (gpr1 < gpr2); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfges" - void operation_l_sfges (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfges"); - - Tgeneral_data_t gpr1 = op->_data_ra; - Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb; - - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x",unsigned(op->_data_ra)); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ras : %.8x", signed(op->_data_ra)); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x",unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb)); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rbs : %.8x", signed((op->_has_immediat==1)?op->_immediat:op->_data_rb)); - - bool f_out; - - switch (concatenation_bool(sign(gpr1),sign(gpr2))) - { - case 1 /*b01*/ : f_out = 1 ; break; - case 2 /*b10*/ : f_out = 0 ; break; - default : f_out = signed(gpr1) >= signed(gpr2); break; - } - - log_printf(TRACE,Functionnal_unit,FUNCTION," * f_out : %.8x",f_out); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfgts" - void operation_l_sfgts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfgts"); - - Tgeneral_data_t gpr1 = op->_data_ra ; - Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb ; - - bool f_out; - - switch (concatenation_bool(sign(gpr1),sign(gpr2))) - { - case 1 /*b01*/ : f_out = 1; break; - case 2 /*b10*/ : f_out = 0; break; - default : f_out = signed(gpr1) > signed(gpr2); break; - } - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sfles" - void operation_l_sfles (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sfles"); - - Tgeneral_data_t gpr1 = op->_data_ra ; - Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb ; - - bool f_out; - - switch (concatenation_bool(sign(gpr1),sign(gpr2))) - { - case 1 /*b01*/ : f_out = 0; break; - case 2 /*b10*/ : f_out = 1; break; - default : f_out = signed(gpr1) <= signed(gpr2); break; - } - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_sflts" - void operation_l_sflts (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_sflts"); - - Tgeneral_data_t gpr1 = op->_data_ra ; - Tgeneral_data_t gpr2 = (op->_has_immediat==1)?op->_immediat:op->_data_rb; - - bool f_out; - - switch (concatenation_bool(sign(gpr1),sign(gpr2))) - { - case 1 /*b01*/ : f_out = 0; break; - case 2 /*b10*/ : f_out = 1; break; - default : f_out = signed(gpr1) < signed(gpr2); break; - } - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - op->_data_re = set_flag(op->_data_re,FLAG_F,f_out); - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_mtspr" - void operation_l_mtspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mtspr"); - - Tgeneral_data_t imm = unsigned(op->_immediat); - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned(op->_data_rb); - Tgeneral_data_t addr = range(gpr1|imm,16); - - Texception_t exception; - - // HACK : use the field num_reg_re to pass the SM and SUMRA flag. - Tcontrol_t flag_SM = get_flag(op->_num_reg_re, 0x1); - Tcontrol_t flag_SUMRA = get_flag(op->_num_reg_re, 0x2); - - spr_address_t spr_addr = reg->_spr_access_mode->translate_address(addr); - - // Test if this group is implemented in this functionnal_unit - if (reg->_spr_access_mode->valid(spr_addr)) - { - if (reg->_spr_access_mode->write(spr_addr, flag_SM, flag_SUMRA)) - { - reg->_i_write_spr = true; - reg->_access_num_group = spr_addr._group; - reg->_access_num_register = spr_addr._register; - reg->_spr_old = reg->_spr[spr_addr._group][spr_addr._register]; - reg->_spr[spr_addr._group][spr_addr._register] = gpr2; - - exception = EXCEPTION_ALU_NONE; - } - else - { - exception = EXCEPTION_ALU_SPR_ACCESS_INVALID; - } - } - else - { - exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE; - } - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr2; // data_rb - //op->_data_re = 0; - op->_exception = exception; - op->_no_sequence = 0; - op->_address = addr; // data_ra or imm - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_mfspr" - void operation_l_mfspr (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mfspr"); - - Tgeneral_data_t imm = unsigned(op->_immediat); - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = 0; - Tgeneral_data_t addr = range(gpr1|imm,16); - - Texception_t exception; - - // HACK : use the field num_reg_re to pass the SM and SUMRA flag. - Tcontrol_t flag_SM = get_flag(op->_num_reg_re, 0x1); - Tcontrol_t flag_SUMRA = get_flag(op->_num_reg_re, 0x2); - - spr_address_t spr_addr = reg->_spr_access_mode->translate_address(addr); - - // Test if this group is implemented in this functionnal_unit - if (reg->_spr_access_mode->valid(spr_addr)) - { - if (reg->_spr_access_mode->read(spr_addr, flag_SM, flag_SUMRA)) - { - reg->_i_read_spr = true; - reg->_access_num_group = spr_addr._group; - reg->_access_num_register = spr_addr._register; - - gpr2 = reg->_spr[spr_addr._group][spr_addr._register]; - - exception = EXCEPTION_ALU_NONE; - } - else - { - exception = EXCEPTION_ALU_SPR_ACCESS_INVALID; - } - } - else - { - exception = EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE; - } - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_write_rd = (exception == EXCEPTION_ALU_NONE); - op->_data_rd = gpr2; // spr - //op->_data_re = 0; - op->_exception = exception; - op->_no_sequence = 0; - op->_address = addr; // data_ra or imm - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_macrc" - void operation_l_macrc (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_macrc"); - - Tgeneral_data_t gpr = static_cast(range((static_cast(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast(reg->_spr[GROUP_MAC][SPR_MACLO]), param->_size_data)); - - reg->_spr[GROUP_MAC][SPR_MACLO] = 0; - reg->_spr[GROUP_MAC][SPR_MACHI] = 0; - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - op->_data_rd = gpr; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_mac" - void operation_l_mac (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_mac"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - uint64_t temp = range(gpr1 * gpr2, 32); - - temp = ((static_cast(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast(reg->_spr[GROUP_MAC][SPR_MACLO])) + temp; - - reg->_spr[GROUP_MAC][SPR_MACLO] = range(temp ,32); - reg->_spr[GROUP_MAC][SPR_MACHI] = range(temp>>32,32); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -#undef FUNCTION -#define FUNCTION "Functionnal_unit::operation_l_msb" - void operation_l_msb (execute_operation_t * op, execute_register_t * reg, execute_param_t * param) - { - log_printf(TRACE,Functionnal_unit,FUNCTION,"Operation : l_msb"); - - Tgeneral_data_t gpr1 = unsigned(op->_data_ra); - Tgeneral_data_t gpr2 = unsigned((op->_has_immediat==1)?op->_immediat:op->_data_rb); - uint64_t temp = range(gpr1 * gpr2, 32); - - temp = ((static_cast(reg->_spr[GROUP_MAC][SPR_MACHI]) << 32) | static_cast(reg->_spr[GROUP_MAC][SPR_MACLO])) - temp; - - reg->_spr[GROUP_MAC][SPR_MACLO] = range(temp ,32); - reg->_spr[GROUP_MAC][SPR_MACHI] = range(temp>>32,32); - - // Result - op->_timing = param->_timing[op->_type][op->_operation]; - //op->_data_rd = 0; - //op->_data_re = 0; - op->_exception = EXCEPTION_ALU_NONE; - op->_no_sequence = 0; - //op->_address = 0; - }; - -}; // end namespace functionnal_unit -}; // end namespace execute_unit -}; // end namespace multi_execute_unit -}; // end namespace execute_loop -}; // end namespace multi_execute_loop -}; // end namespace core -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp (revision 78) @@ -28,4 +28,6 @@ uint32_t size_special_data , uint32_t nb_special_register, + uint32_t size_store_queue , + uint32_t size_load_queue , execute_timing_t** timing , morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)) : @@ -38,11 +40,13 @@ _size_special_data (size_special_data ), _nb_special_register (nb_special_register ), - + _size_store_queue (size_store_queue ), + _size_load_queue (size_load_queue ), + _size_context_id (log2(nb_context )), _size_front_end_id (log2(nb_front_end )), _size_ooo_engine_id (log2(nb_ooo_engine )), _size_packet_id (log2(nb_packet )), - _size_general_register (log2(_size_general_register)), - _size_special_register (log2(_size_special_register)), + _size_general_register (log2(nb_general_register)), + _size_special_register (log2(nb_special_register)), _have_port_context_id (_size_context_id > 0), @@ -50,4 +54,5 @@ _have_port_ooo_engine_id (_size_ooo_engine_id > 0), _have_port_packet_id (_size_packet_id > 0), + _have_port_load_queue_ptr(_size_load_queue > 1), _have_groupe_MAC ( (timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC ]._latence > 0) or @@ -58,5 +63,9 @@ _timing = timing; - _get_custom_information = get_custom_information; + + if (get_custom_information == NULL) + _get_custom_information = &(morpheo::behavioural::custom::default_get_custom_information); + else + _get_custom_information = get_custom_information; test(); @@ -76,4 +85,6 @@ _size_special_data (param._size_special_data ), _nb_special_register (param._nb_special_register ), + _size_store_queue (param._size_store_queue ), + _size_load_queue (param._size_load_queue ), _size_context_id (param._size_context_id ), @@ -88,4 +99,5 @@ _have_port_ooo_engine_id (param._have_port_ooo_engine_id), _have_port_packet_id (param._have_port_packet_id ), + _have_port_load_queue_ptr(param._have_port_load_queue_ptr), _have_groupe_MAC (param._have_groupe_MAC ) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp (revision 78) @@ -22,23 +22,23 @@ #undef FUNCTION #define FUNCTION "Functionnal_unit::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); - std::string msg = ""; + Parameters_test test("Functionnal_unit"); for (uint32_t i=0; i<_nb_type; i++) for (uint32_t j=0; j<_nb_operation; j++) if (_timing[i][j]._delay != _timing[i][j]._latence) - msg = " - For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal."; + test.error("For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal."); if (_have_groupe_MAC and ((_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC ]._latence == 0) or (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MACRC]._latence == 0) or (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MSB ]._latence == 0))) - msg = " - The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0."; - - return msg; + test.error("The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0."); log_printf(FUNC,Functionnal_unit,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg (revision 78) @@ -5,4 +5,5 @@ 2 2 +1 # nb_port_check 2 2 +1 # speculative_load {none,access,commit,bypass} +0 0 +1 # bypass_memory 2 2 *2 # nb_context 1 1 *2 2 2 *2 # nb_front_end 1 1 *2 @@ -10,3 +11,5 @@ 64 64 *2 # nb_packet 32 32 *2 # size_general_data +2 2 *2 # size_special_data 32 32 *2 # nb_general_register +16 16 *2 # nb_special_register Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp (revision 78) @@ -10,5 +10,5 @@ #define number_of_test 2 -#define NB_PARAMS 11 +#define NB_PARAMS 14 void usage (int argc, char * argv[]) @@ -21,4 +21,5 @@ << " - nb_port_check (uint32_t)" << endl << " - speculative_load (uint32_t)" << endl + << " - nb_bypass_memory (uint32_t)" << endl << " - nb_context (uint32_t)" << endl << " - nb_front_end (uint32_t)" << endl @@ -26,5 +27,7 @@ << " - nb_packet (uint32_t)" << endl << " - size_general_data (uint32_t)" << endl + << " - size_special_data (uint32_t)" << endl << " - nb_general_register (uint32_t)" << endl + << " - nb_special_register (uint32_t)" << endl << "" << endl; @@ -58,4 +61,5 @@ const uint32_t _nb_port_check = atoi(argv[x++]); const Tspeculative_load_t _speculative_load = fromString(argv[x++]); + const uint32_t _nb_bypass_memory = atoi(argv[x++]); const uint32_t _nb_context = atoi(argv[x++]); const uint32_t _nb_front_end = atoi(argv[x++]); @@ -63,5 +67,7 @@ const uint32_t _nb_packet = atoi(argv[x++]); const uint32_t _size_general_data = atoi(argv[x++]); + const uint32_t _size_special_data = atoi(argv[x++]); const uint32_t _nb_general_register = atoi(argv[x++]); + const uint32_t _nb_special_register = atoi(argv[x++]); try @@ -74,4 +80,5 @@ _nb_port_check , _speculative_load , + _nb_bypass_memory , _nb_context , _nb_front_end , @@ -79,5 +86,7 @@ _nb_packet , _size_general_data , - _nb_general_register ); + _size_special_data , + _nb_general_register , + _nb_special_register ); cout << param->print(1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp (revision 78) @@ -73,13 +73,13 @@ sc_signal * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_IMMEDIAT = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_DATA_RA = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_DATA_RB = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_DATA_RC = new sc_signal (rename.c_str()); -// sc_signal * in_MEMORY_IN_WRITE_RD = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_DATA_RC = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_WRITE_RD = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_NUM_REG_RD = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_WRITE_RE = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_NUM_REG_RE = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_WRITE_RE = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_NUM_REG_RE = new sc_signal (rename.c_str()); sc_signal * out_MEMORY_OUT_VAL = new sc_signal(rename.c_str()); @@ -89,11 +89,15 @@ sc_signal * out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_PACKET_ID = new sc_signal(rename.c_str()); +// sc_signal * out_MEMORY_OUT_OPERATION = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_TYPE = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_WRITE_RD = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_NUM_REG_RD = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_DATA_RD = new sc_signal(rename.c_str()); - //sc_signal * out_MEMORY_OUT_WRITE_RE = new sc_signal(rename.c_str()); - //sc_signal * out_MEMORY_OUT_NUM_REG_RE = new sc_signal(rename.c_str()); - //sc_signal * out_MEMORY_OUT_DATA_RE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_WRITE_RE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_NUM_REG_RE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_DATA_RE = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_EXCEPTION = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_NO_SEQUENCE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_ADDRESS = new sc_signal(rename.c_str()); sc_signal * out_DCACHE_REQ_VAL = new sc_signal(rename.c_str()); @@ -112,10 +116,10 @@ sc_signal * in_DCACHE_RSP_ERROR = new sc_signal(rename.c_str()); - sc_signal ** out_BYPASS_MEMORY_VAL = new sc_signal * [_param->_size_load_queue]; - sc_signal ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal * [_param->_size_load_queue]; - sc_signal ** out_BYPASS_MEMORY_NUM_REG = new sc_signal * [_param->_size_load_queue]; - sc_signal ** out_BYPASS_MEMORY_DATA = new sc_signal * [_param->_size_load_queue]; + sc_signal ** out_BYPASS_MEMORY_VAL = new sc_signal * [_param->_nb_bypass_memory]; + sc_signal ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal * [_param->_nb_bypass_memory]; + sc_signal ** out_BYPASS_MEMORY_NUM_REG = new sc_signal * [_param->_nb_bypass_memory]; + sc_signal ** out_BYPASS_MEMORY_DATA = new sc_signal * [_param->_nb_bypass_memory]; - for (uint32_t i=0; i<_param->_size_load_queue; i++) + for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) { out_BYPASS_MEMORY_VAL [i] = new sc_signal(rename.c_str()); @@ -137,41 +141,47 @@ (*(_Load_store_unit->out_MEMORY_IN_ACK ))(*(out_MEMORY_IN_ACK )); if (_param->_have_port_context_id) - (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID ))(*( in_MEMORY_IN_CONTEXT_ID )); + (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID ))(*( in_MEMORY_IN_CONTEXT_ID )); if (_param->_have_port_front_end_id) - (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID ))(*( in_MEMORY_IN_FRONT_END_ID )); + (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID ))(*( in_MEMORY_IN_FRONT_END_ID )); if (_param->_have_port_ooo_engine_id) - (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID ))(*( in_MEMORY_IN_OOO_ENGINE_ID )); + (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID ))(*( in_MEMORY_IN_OOO_ENGINE_ID )); if (_param->_have_port_packet_id) - (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); + (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); (*(_Load_store_unit-> in_MEMORY_IN_OPERATION ))(*( in_MEMORY_IN_OPERATION )); + (*(_Load_store_unit-> in_MEMORY_IN_TYPE ))(*( in_MEMORY_IN_TYPE )); (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE)); + if (_param->_have_port_load_queue_ptr) (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE )); - //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); + (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT ))(*( in_MEMORY_IN_IMMEDIAT )); (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA ))(*( in_MEMORY_IN_DATA_RA )); (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB ))(*( in_MEMORY_IN_DATA_RB )); - //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); -// (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); + (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); + (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD ))(*( in_MEMORY_IN_NUM_REG_RD )); - //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); - //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); + (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); + (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); (*(_Load_store_unit-> in_MEMORY_OUT_ACK ))(*( in_MEMORY_OUT_ACK )); if (_param->_have_port_context_id) - (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID ))(*(out_MEMORY_OUT_CONTEXT_ID )); + (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID ))(*(out_MEMORY_OUT_CONTEXT_ID )); if (_param->_have_port_front_end_id) - (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID ))(*(out_MEMORY_OUT_FRONT_END_ID )); + (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID ))(*(out_MEMORY_OUT_FRONT_END_ID )); if (_param->_have_port_ooo_engine_id) - (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID )); + (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID )); if (_param->_have_port_packet_id) - (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); + (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); +// (*(_Load_store_unit->out_MEMORY_OUT_OPERATION ))(*(out_MEMORY_OUT_OPERATION )); + (*(_Load_store_unit->out_MEMORY_OUT_TYPE ))(*(out_MEMORY_OUT_TYPE )); (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); - //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); - //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); - //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); + (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); + (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); + (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); + (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE ))(*(out_MEMORY_OUT_NO_SEQUENCE )); + (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS ))(*(out_MEMORY_OUT_ADDRESS )); (*(_Load_store_unit->out_DCACHE_REQ_VAL ))(*(out_DCACHE_REQ_VAL )); @@ -192,7 +202,6 @@ (*(_Load_store_unit-> in_DCACHE_RSP_ERROR ))(*( in_DCACHE_RSP_ERROR )); - if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) { - for (uint32_t i=0; i<_param->_size_load_queue; i++) + for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) { (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); @@ -486,4 +495,5 @@ in_MEMORY_IN_TYPE ->write (fifo_request.top()._type ); in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write ); in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat ); @@ -563,4 +573,6 @@ TEST(Tcontext_t , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id); TEST(Tpacket_t , out_MEMORY_OUT_PACKET_ID ->read(), tab_request[packet_id]._packet_id ); +// TEST(Toperation_t , out_MEMORY_OUT_OPERATION ->read(), tab_request[packet_id]._operation ); + TEST(Ttype_t , out_MEMORY_OUT_TYPE ->read(), TYPE_MEMORY ); TEST(Tcontrol_t , out_MEMORY_OUT_WRITE_RD ->read(), tab_request[packet_id]._write_rd ); TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD ->read(), tab_request[packet_id]._num_reg_rd ); @@ -682,13 +694,13 @@ delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; - //delete in_MEMORY_IN_HAS_IMMEDIAT; + delete in_MEMORY_IN_HAS_IMMEDIAT; delete in_MEMORY_IN_IMMEDIAT ; delete in_MEMORY_IN_DATA_RA ; delete in_MEMORY_IN_DATA_RB ; - //delete in_MEMORY_IN_DATA_RC ; -// delete in_MEMORY_IN_WRITE_RD ; + delete in_MEMORY_IN_DATA_RC ; + delete in_MEMORY_IN_WRITE_RD ; delete in_MEMORY_IN_NUM_REG_RD ; - //delete in_MEMORY_IN_WRITE_RE ; - //delete in_MEMORY_IN_NUM_REG_RE ; + delete in_MEMORY_IN_WRITE_RE ; + delete in_MEMORY_IN_NUM_REG_RE ; delete out_MEMORY_OUT_VAL ; @@ -698,11 +710,15 @@ delete out_MEMORY_OUT_OOO_ENGINE_ID; delete out_MEMORY_OUT_PACKET_ID ; +// delete out_MEMORY_OUT_OPERATION ; + delete out_MEMORY_OUT_TYPE ; delete out_MEMORY_OUT_WRITE_RD ; delete out_MEMORY_OUT_NUM_REG_RD; delete out_MEMORY_OUT_DATA_RD ; - //delete out_MEMORY_OUT_WRITE_RE ; - //delete out_MEMORY_OUT_NUM_REG_RE; - //delete out_MEMORY_OUT_DATA_RE ; + delete out_MEMORY_OUT_WRITE_RE ; + delete out_MEMORY_OUT_NUM_REG_RE; + delete out_MEMORY_OUT_DATA_RE ; delete out_MEMORY_OUT_EXCEPTION ; + delete out_MEMORY_OUT_NO_SEQUENCE; + delete out_MEMORY_OUT_ADDRESS ; delete out_DCACHE_REQ_VAL ; @@ -721,5 +737,4 @@ delete in_DCACHE_RSP_ERROR ; - if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) { delete [] out_BYPASS_MEMORY_VAL ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp (revision 78) @@ -52,4 +52,5 @@ 2, //_nb_port_check SPECULATIVE_LOAD_COMMIT, //_speculative_load + 0, //_nb_bypass_memory 1, //_nb_context 1, //_nb_front_end @@ -57,5 +58,7 @@ 128,//_nb_packet 32, //_size_general_data - 64 //_nb_general_register + 2 , //_size_special_data + 64, //_nb_general_register + 16 //_nb_special_register ); @@ -89,13 +92,13 @@ sc_signal * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_IMMEDIAT = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_DATA_RA = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_DATA_RB = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_DATA_RC = new sc_signal (rename.c_str()); -// sc_signal * in_MEMORY_IN_WRITE_RD = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_DATA_RC = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_WRITE_RD = new sc_signal (rename.c_str()); sc_signal * in_MEMORY_IN_NUM_REG_RD = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_WRITE_RE = new sc_signal (rename.c_str()); - //sc_signal * in_MEMORY_IN_NUM_REG_RE = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_WRITE_RE = new sc_signal (rename.c_str()); + sc_signal * in_MEMORY_IN_NUM_REG_RE = new sc_signal (rename.c_str()); sc_signal * out_MEMORY_OUT_VAL = new sc_signal(rename.c_str()); @@ -105,11 +108,15 @@ sc_signal * out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_PACKET_ID = new sc_signal(rename.c_str()); +// sc_signal * out_MEMORY_OUT_OPERATION = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_TYPE = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_WRITE_RD = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_NUM_REG_RD = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_DATA_RD = new sc_signal(rename.c_str()); - //sc_signal * out_MEMORY_OUT_WRITE_RE = new sc_signal(rename.c_str()); - //sc_signal * out_MEMORY_OUT_NUM_REG_RE = new sc_signal(rename.c_str()); - //sc_signal * out_MEMORY_OUT_DATA_RE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_WRITE_RE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_NUM_REG_RE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_DATA_RE = new sc_signal(rename.c_str()); sc_signal * out_MEMORY_OUT_EXCEPTION = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_NO_SEQUENCE = new sc_signal(rename.c_str()); + sc_signal * out_MEMORY_OUT_ADDRESS = new sc_signal(rename.c_str()); sc_signal * out_DCACHE_REQ_VAL = new sc_signal(rename.c_str()); @@ -128,10 +135,10 @@ sc_signal * in_DCACHE_RSP_ERROR = new sc_signal(rename.c_str()); - sc_signal ** out_BYPASS_MEMORY_VAL = new sc_signal * [_param->_size_load_queue]; - sc_signal ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal * [_param->_size_load_queue]; - sc_signal ** out_BYPASS_MEMORY_NUM_REG = new sc_signal * [_param->_size_load_queue]; - sc_signal ** out_BYPASS_MEMORY_DATA = new sc_signal * [_param->_size_load_queue]; + sc_signal ** out_BYPASS_MEMORY_VAL = new sc_signal * [_param->_nb_bypass_memory]; + sc_signal ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal * [_param->_nb_bypass_memory]; + sc_signal ** out_BYPASS_MEMORY_NUM_REG = new sc_signal * [_param->_nb_bypass_memory]; + sc_signal ** out_BYPASS_MEMORY_DATA = new sc_signal * [_param->_nb_bypass_memory]; - for (uint32_t i=0; i<_param->_size_load_queue; i++) + for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) { out_BYPASS_MEMORY_VAL [i] = new sc_signal(rename.c_str()); @@ -161,15 +168,17 @@ (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); (*(_Load_store_unit-> in_MEMORY_IN_OPERATION ))(*( in_MEMORY_IN_OPERATION )); + (*(_Load_store_unit-> in_MEMORY_IN_TYPE ))(*( in_MEMORY_IN_TYPE )); (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE)); + if (_param->_have_port_load_queue_ptr) (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE )); - //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); + (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT ))(*( in_MEMORY_IN_IMMEDIAT )); (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA ))(*( in_MEMORY_IN_DATA_RA )); (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB ))(*( in_MEMORY_IN_DATA_RB )); - //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); -// (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); + (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); + (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD ))(*( in_MEMORY_IN_NUM_REG_RD )); - //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); - //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); + (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); + (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); @@ -183,11 +192,15 @@ if (_param->_have_port_packet_id) (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); +// (*(_Load_store_unit->out_MEMORY_OUT_OPERATION ))(*(out_MEMORY_OUT_OPERATION )); + (*(_Load_store_unit->out_MEMORY_OUT_TYPE ))(*(out_MEMORY_OUT_TYPE )); (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); - //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); - //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); - //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); + (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); + (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); + (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); + (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE ))(*(out_MEMORY_OUT_NO_SEQUENCE )); + (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS ))(*(out_MEMORY_OUT_ADDRESS )); (*(_Load_store_unit->out_DCACHE_REQ_VAL ))(*(out_DCACHE_REQ_VAL )); @@ -208,7 +221,6 @@ (*(_Load_store_unit-> in_DCACHE_RSP_ERROR ))(*( in_DCACHE_RSP_ERROR )); - if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) { - for (uint32_t i=0; i<_param->_size_load_queue; i++) + for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) { (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); @@ -448,4 +460,5 @@ in_MEMORY_IN_TYPE ->write (fifo_request.top()._type ); in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write ); in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat ); @@ -533,4 +546,6 @@ TEST(Tcontext_t , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id ); TEST(Tcontext_t , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id); +// TEST(Toperation_t , out_MEMORY_OUT_OPERATION ->read(), tab_request[packet_id]._operation ); + TEST(Ttype_t , out_MEMORY_OUT_TYPE ->read(), TYPE_MEMORY ); if (is_operation_memory_load (tab_request[packet_id]._operation)) @@ -721,13 +736,13 @@ delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; - //delete in_MEMORY_IN_HAS_IMMEDIAT; + delete in_MEMORY_IN_HAS_IMMEDIAT; delete in_MEMORY_IN_IMMEDIAT ; delete in_MEMORY_IN_DATA_RA ; delete in_MEMORY_IN_DATA_RB ; - //delete in_MEMORY_IN_DATA_RC ; -// delete in_MEMORY_IN_WRITE_RD ; + delete in_MEMORY_IN_DATA_RC ; + delete in_MEMORY_IN_WRITE_RD ; delete in_MEMORY_IN_NUM_REG_RD ; - //delete in_MEMORY_IN_WRITE_RE ; - //delete in_MEMORY_IN_NUM_REG_RE ; + delete in_MEMORY_IN_WRITE_RE ; + delete in_MEMORY_IN_NUM_REG_RE ; delete out_MEMORY_OUT_VAL ; @@ -737,11 +752,15 @@ delete out_MEMORY_OUT_OOO_ENGINE_ID; delete out_MEMORY_OUT_PACKET_ID ; +// delete out_MEMORY_OUT_OPERATION ; + delete out_MEMORY_OUT_TYPE ; delete out_MEMORY_OUT_WRITE_RD ; delete out_MEMORY_OUT_NUM_REG_RD; delete out_MEMORY_OUT_DATA_RD ; - //delete out_MEMORY_OUT_WRITE_RE ; - //delete out_MEMORY_OUT_NUM_REG_RE; - //delete out_MEMORY_OUT_DATA_RE ; + delete out_MEMORY_OUT_WRITE_RE ; + delete out_MEMORY_OUT_NUM_REG_RE; + delete out_MEMORY_OUT_DATA_RE ; delete out_MEMORY_OUT_EXCEPTION ; + delete out_MEMORY_OUT_NO_SEQUENCE; + delete out_MEMORY_OUT_ADDRESS ; delete out_DCACHE_REQ_VAL ; @@ -760,5 +779,4 @@ delete in_DCACHE_RSP_ERROR ; - if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) { delete [] out_BYPASS_MEMORY_VAL ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h (revision 78) @@ -5,5 +5,5 @@ * $Id$ * - * [ Description ] + * [ Description ] * * Ce composant peut être amélioré en placant deux ptr de lecture au lieu d'un : un pour l'accès au cache et un pour le commit @@ -46,5 +46,5 @@ #endif { - // -----[ fields ]---------------------------------------------------- + // -----[ fields ]---------------------------------------------------- // Parameters protected : const std::string _name; @@ -53,5 +53,5 @@ #ifdef STATISTICS - private : Stat * _stat; + public : Stat * _stat; private : counter_t * _stat_use_store_queue; @@ -83,10 +83,10 @@ #ifdef SYSTEMC - // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // Interface public : SC_CLOCK * in_CLOCK ; public : SC_IN (Tcontrol_t) * in_NRESET ; - // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_VAL ; public : SC_OUT(Tcontrol_t ) * out_MEMORY_IN_ACK ; @@ -96,18 +96,18 @@ public : SC_IN (Tpacket_t ) * in_MEMORY_IN_PACKET_ID ; public : SC_IN (Toperation_t ) * in_MEMORY_IN_OPERATION ; -//public : SC_IN (Ttype_t ) * in_MEMORY_IN_TYPE ; + public : SC_IN (Ttype_t ) * in_MEMORY_IN_TYPE ; public : SC_IN (Tlsq_ptr_t ) * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; public : SC_IN (Tlsq_ptr_t ) * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; -//public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_HAS_IMMEDIAT; + public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_HAS_IMMEDIAT; public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_IMMEDIAT ; // memory address public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_DATA_RA ; // memory address public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_DATA_RB ; // data (store) -//public : SC_IN (Tspecial_data_t ) * in_MEMORY_IN_DATA_RC ; -//public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RD ; // = (operation==load) + public : SC_IN (Tspecial_data_t ) * in_MEMORY_IN_DATA_RC ; + public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RD ; // = (operation==load) public : SC_IN (Tgeneral_address_t) * in_MEMORY_IN_NUM_REG_RD ; // destination (load) -//public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RE ; -//public : SC_IN (Tspecial_address_t) * in_MEMORY_IN_NUM_REG_RE ; - - // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RE ; + public : SC_IN (Tspecial_address_t) * in_MEMORY_IN_NUM_REG_RE ; + + // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_VAL ; public : SC_IN (Tcontrol_t ) * in_MEMORY_OUT_ACK ; @@ -116,13 +116,18 @@ public : SC_OUT(Tcontext_t ) * out_MEMORY_OUT_OOO_ENGINE_ID; public : SC_OUT(Tpacket_t ) * out_MEMORY_OUT_PACKET_ID ; +//public : SC_OUT(Toperation_t ) * out_MEMORY_OUT_OPERATION ; + public : SC_OUT(Ttype_t ) * out_MEMORY_OUT_TYPE ; public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RD ; // = (operation==load) public : SC_OUT(Tgeneral_address_t) * out_MEMORY_OUT_NUM_REG_RD; // destination (load) public : SC_OUT(Tgeneral_data_t ) * out_MEMORY_OUT_DATA_RD ; // data (load) -//public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RE ; -//public : SC_OUT(Tspecial_address_t) * out_MEMORY_OUT_NUM_REG_RE; -//public : SC_OUT(Tspecial_data_t ) * out_MEMORY_OUT_DATA_RE ; + public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RE ; + public : SC_OUT(Tspecial_address_t) * out_MEMORY_OUT_NUM_REG_RE; + public : SC_OUT(Tspecial_data_t ) * out_MEMORY_OUT_DATA_RE ; public : SC_OUT(Texception_t ) * out_MEMORY_OUT_EXCEPTION ; - - // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_NO_SEQUENCE; + public : SC_OUT(Tgeneral_data_t ) * out_MEMORY_OUT_ADDRESS ; + + + // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_OUT(Tcontrol_t ) * out_DCACHE_REQ_VAL ; public : SC_IN (Tcontrol_t ) * in_DCACHE_REQ_ACK ; @@ -133,5 +138,5 @@ public : SC_OUT(Tdcache_data_t ) * out_DCACHE_REQ_WDATA ; - // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) * in_DCACHE_RSP_VAL ; public : SC_OUT(Tcontrol_t ) * out_DCACHE_RSP_ACK ; @@ -141,5 +146,5 @@ public : SC_IN (Tdcache_error_t ) * in_DCACHE_RSP_ERROR ; - // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_OUT(Tcontrol_t ) ** out_BYPASS_MEMORY_VAL ; public : SC_OUT(Tcontext_t ) ** out_BYPASS_MEMORY_OOO_ENGINE_ID; @@ -147,5 +152,5 @@ public : SC_OUT(Tgeneral_data_t ) ** out_BYPASS_MEMORY_DATA ; - // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ protected : Tstore_queue_entry_t * _store_queue; protected : Tload_queue_entry_t * _load_queue; @@ -160,7 +165,7 @@ public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit::*function_genMealy_retire) (void); - // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - - // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // Registers @@ -182,5 +187,5 @@ #endif - // -----[ methods ]--------------------------------------------------- + // -----[ methods ]--------------------------------------------------- #ifdef SYSTEMC Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h (revision 78) @@ -32,4 +32,5 @@ public : const uint32_t _nb_port_check ; public : const Tspeculative_load_t _speculative_load ; + public : const uint32_t _nb_bypass_memory ; //public : const uint32_t _nb_cache_port ; public : const uint32_t _nb_context ; @@ -38,5 +39,7 @@ public : const uint32_t _nb_packet ; public : const uint32_t _size_general_data ; + public : const uint32_t _size_special_data ; public : const uint32_t _nb_general_register ; + public : const uint32_t _nb_special_register ; public : const uint32_t _size_address_store_queue ; @@ -48,4 +51,5 @@ public : const uint32_t _size_packet_id ; public : const uint32_t _size_general_register ; + public : const uint32_t _size_special_register ; public : const uint32_t _size_dcache_context_id ; public : const uint32_t _size_dcache_packet_id ; @@ -56,4 +60,5 @@ public : const bool _have_port_packet_id ; public : const bool _have_port_dcache_context_id ; + public : const bool _have_port_load_queue_ptr ; public : const Tdcache_address_t _mask_address_lsb ; @@ -66,4 +71,5 @@ uint32_t nb_port_check , Tspeculative_load_t speculative_load , + uint32_t nb_bypass_memory , uint32_t nb_context , uint32_t nb_front_end , @@ -71,10 +77,12 @@ uint32_t nb_packet , uint32_t size_general_data , - uint32_t nb_general_register ); + uint32_t size_special_data , + uint32_t nb_general_register , + uint32_t nb_special_register ); public : Parameters (Parameters & param) ; public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h (revision 78) @@ -33,8 +33,8 @@ typedef enum { - NO_SPECULATIVE_LOAD , //each load wait all previous store before the data cache access - SPECULATIVE_LOAD_ACCESS, //each load wait all previous store before the commiting - SPECULATIVE_LOAD_COMMIT, //each load commit the result before the end of dependence's check - SPECULATIVE_LOAD_BYPASS //each load bypass the result before the end of dependence's check + NO_SPECULATIVE_LOAD //each load wait all previous store before the data cache access + ,SPECULATIVE_LOAD_ACCESS //each load wait all previous store before the commiting + ,SPECULATIVE_LOAD_COMMIT //each load commit the result before the end of dependence's check + //,SPECULATIVE_LOAD_BYPASS //each load bypass the result before the end of dependence's check } Tspeculative_load_t; @@ -212,5 +212,5 @@ case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_ACCESS : return "speculative_load_access"; break; case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT : return "speculative_load_commit"; break; - case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break; +// case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break; default : return "" ; break; } @@ -228,7 +228,7 @@ (x.compare("speculative_load_commit") == 0)) return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT; - if ( (x.compare("3") == 0) or - (x.compare("speculative_load_bypass") == 0)) - return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS; +// if ( (x.compare("3") == 0) or +// (x.compare("speculative_load_bypass") == 0)) +// return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS; throw (ErrorMorpheo (" : Unknow string : \""+x+"\"")); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp (revision 78) @@ -69,5 +69,5 @@ case NO_SPECULATIVE_LOAD : case SPECULATIVE_LOAD_ACCESS : - case SPECULATIVE_LOAD_BYPASS : + //case SPECULATIVE_LOAD_BYPASS : default : { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp (revision 78) @@ -72,15 +72,17 @@ in_MEMORY_IN_PACKET_ID = interface->set_signal_in ("packet_id" ,_param->_size_packet_id ); in_MEMORY_IN_OPERATION = interface->set_signal_in ("operation" ,_param->_size_operation ); + in_MEMORY_IN_TYPE = interface->set_signal_in ("type" ,_param->_size_type ); in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in ("store_queue_ptr_write" ,_param->_size_address_store_queue+1); // +1 cf load_queue usage + if (_param->_have_port_load_queue_ptr) in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in ("load_queue_ptr_write" ,_param->_size_address_load_queue ); -// in_MEMORY_IN_HAS_IMMEDIAT = interface->set_signal_in ("has_immediat",1 ); + in_MEMORY_IN_HAS_IMMEDIAT = interface->set_signal_in ("has_immediat",1 ); in_MEMORY_IN_IMMEDIAT = interface->set_signal_in ("immediat" ,_param->_size_general_data ); in_MEMORY_IN_DATA_RA = interface->set_signal_in ("data_ra" ,_param->_size_general_data ); in_MEMORY_IN_DATA_RB = interface->set_signal_in ("data_rb" ,_param->_size_general_data ); -// in_MEMORY_IN_DATA_RC = interface->set_signal_in ("data_rc" ,_param->_size_special_data ); -// in_MEMORY_IN_WRITE_RD = interface->set_signal_in ("write_rd" ,1 ); + in_MEMORY_IN_DATA_RC = interface->set_signal_in ("data_rc" ,_param->_size_special_data ); + in_MEMORY_IN_WRITE_RD = interface->set_signal_in ("write_rd" ,1 ); in_MEMORY_IN_NUM_REG_RD = interface->set_signal_in ("num_reg_rd" ,1 ); -// in_MEMORY_IN_WRITE_RE = interface->set_signal_in ("write_re" ,1 ); -// in_MEMORY_IN_NUM_REG_RE = interface->set_signal_in ("num_reg_re" ,1 ); + in_MEMORY_IN_WRITE_RE = interface->set_signal_in ("write_re" ,1 ); + in_MEMORY_IN_NUM_REG_RE = interface->set_signal_in ("num_reg_re" ,1 ); } @@ -105,11 +107,15 @@ if (_param->_have_port_packet_id) out_MEMORY_OUT_PACKET_ID = interface->set_signal_out ("packet_id" ,_param->_size_packet_id ); +// out_MEMORY_OUT_OPERATION = interface->set_signal_out ("operation" ,_param->_size_operation ); + out_MEMORY_OUT_TYPE = interface->set_signal_out ("type" ,_param->_size_type ); out_MEMORY_OUT_WRITE_RD = interface->set_signal_out ("write_rd" ,1 ); out_MEMORY_OUT_NUM_REG_RD = interface->set_signal_out ("num_reg_rd" ,_param->_size_general_register ); out_MEMORY_OUT_DATA_RD = interface->set_signal_out ("data_rd" ,_param->_size_general_data ); -// out_MEMORY_OUT_WRITE_RE = interface->set_signal_out ("write_rd" ,1 ); -// out_MEMORY_OUT_NUM_REG_RE = interface->set_signal_out ("num_reg_re" ,_param->_size_general_register ); -// out_MEMORY_OUT_DATA_RE = interface->set_signal_out ("data_re" ,_param->_size_general_data ); + out_MEMORY_OUT_WRITE_RE = interface->set_signal_out ("write_re" ,1 ); + out_MEMORY_OUT_NUM_REG_RE = interface->set_signal_out ("num_reg_re" ,_param->_size_general_register ); + out_MEMORY_OUT_DATA_RE = interface->set_signal_out ("data_re" ,_param->_size_general_data ); out_MEMORY_OUT_EXCEPTION = interface->set_signal_out ("exception" ,_param->_size_exception ); + out_MEMORY_OUT_NO_SEQUENCE = interface->set_signal_out ("no_sequence" ,1 ); + out_MEMORY_OUT_ADDRESS = interface->set_signal_out ("address" ,_param->_size_general_data ); } @@ -153,13 +159,13 @@ // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) +// if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) { - out_BYPASS_MEMORY_VAL = new SC_OUT(Tcontrol_t ) * [_param->_size_load_queue]; + out_BYPASS_MEMORY_VAL = new SC_OUT(Tcontrol_t ) * [_param->_nb_bypass_memory]; if (_param->_have_port_ooo_engine_id) - out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t ) * [_param->_size_load_queue]; - out_BYPASS_MEMORY_NUM_REG = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue]; - out_BYPASS_MEMORY_DATA = new SC_OUT(Tgeneral_data_t ) * [_param->_size_load_queue]; + out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t ) * [_param->_nb_bypass_memory]; + out_BYPASS_MEMORY_NUM_REG = new SC_OUT(Tgeneral_address_t) * [_param->_nb_bypass_memory]; + out_BYPASS_MEMORY_DATA = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_bypass_memory]; - for (uint32_t i=0; i<_param->_size_load_queue; i++) + for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) { Interface_fifo * interface = _interfaces->set_interface("memory_out" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp (revision 78) @@ -44,15 +44,17 @@ delete in_MEMORY_IN_PACKET_ID ; delete in_MEMORY_IN_OPERATION ; + delete in_MEMORY_IN_TYPE ; delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; -// delete in_MEMORY_IN_HAS_IMMEDIAT; + delete in_MEMORY_IN_HAS_IMMEDIAT; delete in_MEMORY_IN_IMMEDIAT ; delete in_MEMORY_IN_DATA_RA ; delete in_MEMORY_IN_DATA_RB ; -// delete in_MEMORY_IN_DATA_RC ; -// delete in_MEMORY_IN_WRITE_RD ; + delete in_MEMORY_IN_DATA_RC ; + delete in_MEMORY_IN_WRITE_RD ; delete in_MEMORY_IN_NUM_REG_RD ; -// delete in_MEMORY_IN_WRITE_RE ; -// delete in_MEMORY_IN_NUM_REG_RE ; + delete in_MEMORY_IN_WRITE_RE ; + delete in_MEMORY_IN_NUM_REG_RE ; delete out_MEMORY_OUT_VAL ; @@ -66,11 +68,15 @@ if (_param->_have_port_packet_id) delete out_MEMORY_OUT_PACKET_ID ; +// delete out_MEMORY_OUT_OPERATION ; + delete out_MEMORY_OUT_TYPE ; delete out_MEMORY_OUT_WRITE_RD ; delete out_MEMORY_OUT_NUM_REG_RD; delete out_MEMORY_OUT_DATA_RD ; -// delete out_MEMORY_OUT_WRITE_RE ; -// delete out_MEMORY_OUT_NUM_REG_RE; -// delete out_MEMORY_OUT_DATA_RE ; + delete out_MEMORY_OUT_WRITE_RE ; + delete out_MEMORY_OUT_NUM_REG_RE; + delete out_MEMORY_OUT_DATA_RE ; delete out_MEMORY_OUT_EXCEPTION ; + delete out_MEMORY_OUT_NO_SEQUENCE; + delete out_MEMORY_OUT_ADDRESS ; delete out_DCACHE_REQ_VAL ; @@ -91,12 +97,9 @@ delete in_DCACHE_RSP_ERROR ; - if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) - { - delete [] out_BYPASS_MEMORY_VAL ; - if (_param->_have_port_ooo_engine_id) - delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID; - delete [] out_BYPASS_MEMORY_NUM_REG ; - delete [] out_BYPASS_MEMORY_DATA ; - } + delete [] out_BYPASS_MEMORY_VAL ; + if (_param->_have_port_ooo_engine_id) + delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID; + delete [] out_BYPASS_MEMORY_NUM_REG ; + delete [] out_BYPASS_MEMORY_DATA ; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp (revision 78) @@ -120,4 +120,6 @@ if (_param->_have_port_packet_id) PORT_WRITE(out_MEMORY_OUT_PACKET_ID , memory_out_packet_id ); +// PORT_WRITE(out_MEMORY_OUT_OPERATION , memory_out_operation ); + PORT_WRITE(out_MEMORY_OUT_TYPE , TYPE_MEMORY ); PORT_WRITE(out_MEMORY_OUT_WRITE_RD , memory_out_write_rd ); PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD , memory_out_num_reg_rd ); @@ -126,6 +128,10 @@ // PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE , memory_out_num_reg_re ); // PORT_WRITE(out_MEMORY_OUT_DATA_RE , memory_out_data_re ); + PORT_WRITE(out_MEMORY_OUT_WRITE_RE , 0); + PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE , 0); + PORT_WRITE(out_MEMORY_OUT_DATA_RE , 0); PORT_WRITE(out_MEMORY_OUT_EXCEPTION , memory_out_exception ); - + PORT_WRITE(out_MEMORY_OUT_NO_SEQUENCE , 0); + PORT_WRITE(out_MEMORY_OUT_ADDRESS , 0); // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (revision 78) @@ -265,4 +265,8 @@ // others in speculation_access_queue +#ifdef DEBUG_TEST + if (PORT_READ(in_MEMORY_IN_TYPE) != TYPE_MEMORY) + throw ERRORMORPHEO(FUNCTION,"The type is different at 'TYPE_MEMORY'"); +#endif Toperation_t operation = PORT_READ(in_MEMORY_IN_OPERATION); Tgeneral_data_t address = (PORT_READ(in_MEMORY_IN_IMMEDIAT) + @@ -376,5 +380,5 @@ _store_queue [index]._packet_id = (not _param->_have_port_packet_id )?0:PORT_READ(in_MEMORY_IN_PACKET_ID ); _store_queue [index]._operation = operation; - _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); + _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); _store_queue [index]._address = address; @@ -415,5 +419,5 @@ _speculative_access_queue [index]._operation = operation; - _speculative_access_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); + _speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); _speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE); _speculative_access_queue [index]._address = address; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp (revision 78) @@ -25,4 +25,5 @@ uint32_t nb_port_check , Tspeculative_load_t speculative_load , + uint32_t nb_bypass_memory , uint32_t nb_context , uint32_t nb_front_end , @@ -30,5 +31,7 @@ uint32_t nb_packet , uint32_t size_general_data , - uint32_t nb_general_register ): + uint32_t size_special_data , + uint32_t nb_general_register , + uint32_t nb_special_register ): _size_store_queue (size_store_queue ), _size_load_queue (size_load_queue ), @@ -36,4 +39,5 @@ _nb_port_check (nb_port_check ), _speculative_load (speculative_load ), + _nb_bypass_memory (nb_bypass_memory ), _nb_context (nb_context ), _nb_front_end (nb_front_end ), @@ -41,5 +45,7 @@ _nb_packet (nb_packet ), _size_general_data (size_general_data ), + _size_special_data (size_special_data ), _nb_general_register (nb_general_register ), + _nb_special_register (nb_special_register ), _size_address_store_queue (log2(size_store_queue )), @@ -52,4 +58,5 @@ _size_packet_id (log2(nb_packet )), _size_general_register (log2(nb_general_register)), + _size_special_register (log2(nb_special_register)), _size_dcache_context_id (_size_context_id + _size_front_end_id + _size_ooo_engine_id), _size_dcache_packet_id ((log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue))+1), @@ -60,4 +67,5 @@ _have_port_packet_id (_size_packet_id >0), _have_port_dcache_context_id (_size_dcache_context_id>0), + _have_port_load_queue_ptr (_size_load_queue>1), _mask_address_lsb (gen_mask(log2(size_general_data/8))), @@ -77,4 +85,5 @@ _nb_port_check (param._nb_port_check ), _speculative_load (param._speculative_load ), + _nb_bypass_memory (param._nb_bypass_memory ), _nb_context (param._nb_context ), _nb_front_end (param._nb_front_end ), @@ -82,5 +91,7 @@ _nb_packet (param._nb_packet ), _size_general_data (param._size_general_data ), + _size_special_data (param._size_special_data ), _nb_general_register (param._nb_general_register ), + _nb_special_register (param._nb_special_register ), _size_address_store_queue (param._size_address_store_queue ), @@ -93,4 +104,5 @@ _size_packet_id (param._size_packet_id ), _size_general_register (param._size_general_register ), + _size_special_register (param._size_special_register ), _size_dcache_context_id (param._size_dcache_context_id ), _size_dcache_packet_id (param._size_dcache_packet_id ), @@ -100,6 +112,6 @@ _have_port_ooo_engine_id (param._have_port_ooo_engine_id), _have_port_packet_id (param._have_port_packet_id ), - _have_port_dcache_context_id(param._have_port_dcache_context_id), + _have_port_load_queue_ptr(param._have_port_load_queue_ptr), _mask_address_lsb (param._mask_address_lsb), Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp (revision 78) @@ -21,9 +21,9 @@ #undef FUNCTION #define FUNCTION "Load_store_unit::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); - std::string msg = ""; + Parameters_test test("Load_store_unit"); switch (_speculative_load) @@ -31,19 +31,32 @@ case SPECULATIVE_LOAD_COMMIT : { + if (not (_nb_bypass_memory == 0)) + test.error("Bypass memory is not supported. Please wait a next revision."); + break; } case NO_SPECULATIVE_LOAD : case SPECULATIVE_LOAD_ACCESS : - case SPECULATIVE_LOAD_BYPASS : + // case SPECULATIVE_LOAD_BYPASS : default : { - msg += " - Speculative load scheme is not supported : " +toString(_speculative_load); + if (not (_nb_bypass_memory == 0)) + test.error("In the load scheme '"+toString(_speculative_load)+"', they have none bypass."); + + test.error("Speculative load scheme '"+toString(_speculative_load)+"' is not supported. Please wait a next revision."); break; } } - return msg; + if (not (_size_store_queue >= 2)) + test.error("Store queue must have at less two slot."); + + if (not (_nb_bypass_memory <= _size_load_queue)) + test.error("Bypass number must be less than load_queue's size."); log_printf(FUNC,Load_store_unit,FUNCTION,"End"); + + return test; + }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp (revision 78) @@ -33,4 +33,5 @@ xml.singleton_begin("nb_port_check "); xml.attribut("value",toString(_nb_port_check )); xml.singleton_end(); xml.singleton_begin("speculative_load "); xml.attribut("value",toString(_speculative_load )); xml.singleton_end(); + xml.singleton_begin("nb_bypass_memory "); xml.attribut("value",toString(_nb_bypass_memory )); xml.singleton_end(); xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg (revision 78) @@ -12,3 +12,3 @@ 2 2 *2 # nb_spr_write 4 4 *2 # size_store_queue -4 4 *2 # size_load_queue +1 4 *4 # size_load_queue Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp (revision 78) @@ -231,4 +231,5 @@ (*(_Read_queue-> in_READ_QUEUE_IN_TYPE )) (*(READ_QUEUE_IN_TYPE )); (*(_Read_queue-> in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE)) (*(READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE)); + if (_param->_have_port_load_queue_ptr) (*(_Read_queue-> in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE )) (*(READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE )); (*(_Read_queue-> in_READ_QUEUE_IN_HAS_IMMEDIAT )) (*(READ_QUEUE_IN_HAS_IMMEDIAT )); @@ -258,4 +259,5 @@ (*(_Read_queue->out_READ_QUEUE_OUT_TYPE )) (*(READ_QUEUE_OUT_TYPE )); (*(_Read_queue->out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE)) (*(READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE)); + if (_param->_have_port_load_queue_ptr) (*(_Read_queue->out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE )) (*(READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE )); (*(_Read_queue->out_READ_QUEUE_OUT_HAS_IMMEDIAT )) (*(READ_QUEUE_OUT_HAS_IMMEDIAT )); @@ -417,4 +419,5 @@ READ_QUEUE_IN_TYPE ->write(0); READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE->write(0); + if (_param->_have_port_load_queue_ptr) READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ->write(0); READ_QUEUE_IN_HAS_IMMEDIAT->write(0); @@ -592,4 +595,5 @@ delete READ_QUEUE_IN_TYPE ; delete READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ; delete READ_QUEUE_IN_HAS_IMMEDIAT ; @@ -619,4 +623,5 @@ delete READ_QUEUE_OUT_TYPE ; delete READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE ; delete READ_QUEUE_OUT_HAS_IMMEDIAT; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h (revision 78) @@ -55,4 +55,5 @@ public : const bool _have_port_ooo_engine_id; public : const bool _have_port_rob_id ; + public : const bool _have_port_load_queue_ptr; public : const uint32_t _size_internal_queue; @@ -76,5 +77,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp (revision 78) @@ -58,4 +58,5 @@ _have_port_ooo_engine_id (_size_ooo_engine_id > 0), _have_port_rob_id (_size_rob_id > 0), + _have_port_load_queue_ptr(_size_load_queue > 1), _size_internal_queue ( _size_context_id //_context_id @@ -116,4 +117,5 @@ _have_port_ooo_engine_id (param._have_port_ooo_engine_id), _have_port_rob_id (param._have_port_rob_id ), + _have_port_load_queue_ptr(param._have_port_load_queue_ptr), _size_internal_queue (param._size_internal_queue ) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp (revision 78) @@ -19,29 +19,19 @@ - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Read_queue,"msg_error","Begin"); - std::string msg = ""; - -// if (_size_queue < 2) -// { -// msg += " - The read_queue must be have less a depth of 2"; -// msg += " * size_queue : " + toString(_size_queue) + "\n"; -// } + Parameters_test test ("Read_queue"); if (_nb_type < 2) - { - msg += " - The number of type must be > 1"; - } + test.error("The number of type must be > 1"); + if (_nb_operation < 2) - { - msg += " - The number of operation must be > 1"; - } - - - return msg; + test.error("The number of operation must be > 1"); log_printf(FUNC,Read_queue,"msg_error","End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp (revision 78) @@ -71,4 +71,5 @@ in_READ_QUEUE_IN_TYPE = interface->set_signal_in ("type" ,_param->_size_type ); in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in ("store_queue_ptr_write", log2(_param->_size_store_queue)); + if (_param->_have_port_load_queue_ptr) in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in ("load_queue_ptr_write" , log2(_param->_size_load_queue )); in_READ_QUEUE_IN_HAS_IMMEDIAT = interface->set_signal_in ("has_immediat",1 ); @@ -110,4 +111,5 @@ out_READ_QUEUE_OUT_TYPE = interface->set_signal_out ("type" ,_param->_size_type ); out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE = interface->set_signal_out ("store_queue_ptr_write", log2(_param->_size_store_queue)); + if (_param->_have_port_load_queue_ptr) out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE = interface->set_signal_out ("load_queue_ptr_write" , log2(_param->_size_load_queue )); out_READ_QUEUE_OUT_HAS_IMMEDIAT = interface->set_signal_out ("has_immediat",1 ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp (revision 78) @@ -42,4 +42,5 @@ delete in_READ_QUEUE_IN_TYPE ; delete in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ; delete in_READ_QUEUE_IN_HAS_IMMEDIAT ; @@ -71,4 +72,5 @@ delete out_READ_QUEUE_OUT_TYPE ; delete out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE ; delete out_READ_QUEUE_OUT_HAS_IMMEDIAT ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp (revision 78) @@ -44,4 +44,5 @@ PORT_WRITE (out_READ_QUEUE_OUT_TYPE , _queue_head->_type ); PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE, _queue_head->_store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) PORT_WRITE (out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE , _queue_head->_load_queue_ptr_write ); PORT_WRITE (out_READ_QUEUE_OUT_HAS_IMMEDIAT, _queue_head->_has_immediat); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp (revision 78) @@ -67,4 +67,5 @@ entry->_type = PORT_READ(in_READ_QUEUE_IN_TYPE ); entry->_store_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE); + if (_param->_have_port_load_queue_ptr) entry->_load_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ); entry->_has_immediat = PORT_READ(in_READ_QUEUE_IN_HAS_IMMEDIAT); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg (revision 78) @@ -15,3 +15,3 @@ 0 0 *2 # nb_bypass_memory 4 4 *2 # size_store_queue -4 4 *2 # size_load_queue +1 4 *4 # size_load_queue Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp (revision 78) @@ -216,4 +216,5 @@ (*(_Reservation_station-> in_INSERT_TYPE )) (*( in_INSERT_TYPE )); (*(_Reservation_station-> in_INSERT_STORE_QUEUE_PTR_WRITE)) (*( in_INSERT_STORE_QUEUE_PTR_WRITE)); + if (_param->_have_port_load_queue_ptr) (*(_Reservation_station-> in_INSERT_LOAD_QUEUE_PTR_WRITE )) (*( in_INSERT_LOAD_QUEUE_PTR_WRITE )); (*(_Reservation_station-> in_INSERT_HAS_IMMEDIAT )) (*( in_INSERT_HAS_IMMEDIAT )); @@ -251,4 +252,5 @@ (*(_Reservation_station->out_RETIRE_TYPE [i])) (*(out_RETIRE_TYPE [i])); (*(_Reservation_station->out_RETIRE_STORE_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_STORE_QUEUE_PTR_WRITE [i])); + if (_param->_have_port_load_queue_ptr) (*(_Reservation_station->out_RETIRE_LOAD_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_LOAD_QUEUE_PTR_WRITE [i])); (*(_Reservation_station->out_RETIRE_HAS_IMMEDIAT [i])) (*(out_RETIRE_HAS_IMMEDIAT [i])); @@ -446,4 +448,5 @@ in_INSERT_TYPE ->write(0); in_INSERT_STORE_QUEUE_PTR_WRITE->write(0); + if (_param->_have_port_load_queue_ptr) in_INSERT_LOAD_QUEUE_PTR_WRITE ->write(0); in_INSERT_HAS_IMMEDIAT->write(0); @@ -692,4 +695,5 @@ delete in_INSERT_TYPE ; delete in_INSERT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete in_INSERT_LOAD_QUEUE_PTR_WRITE ; delete in_INSERT_HAS_IMMEDIAT; @@ -725,4 +729,5 @@ delete [] out_RETIRE_TYPE ; delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ; delete [] out_RETIRE_HAS_IMMEDIAT; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h (revision 78) @@ -62,4 +62,5 @@ public : const bool _have_port_ooo_engine_id; public : const bool _have_port_rob_id ; + public : const bool _have_port_load_queue_ptr; //-----[ methods ]----------------------------------------------------------- @@ -84,5 +85,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp (revision 78) @@ -63,5 +63,6 @@ _have_port_front_end_id (_size_front_end_id > 0), _have_port_ooo_engine_id (_size_ooo_engine_id > 0), - _have_port_rob_id (_size_rob_id > 0) + _have_port_rob_id (_size_rob_id > 0), + _have_port_load_queue_ptr(_size_load_queue > 1) { log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); @@ -100,5 +101,6 @@ _have_port_front_end_id (param._have_port_front_end_id ), _have_port_ooo_engine_id (param._have_port_ooo_engine_id), - _have_port_rob_id (param._have_port_rob_id ) + _have_port_rob_id (param._have_port_rob_id ), + _have_port_load_queue_ptr(param._have_port_load_queue_ptr) { log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp (revision 78) @@ -21,24 +21,16 @@ #undef FUNCTION #define FUNCTION "Reservation_station::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); - std::string msg = ""; - -// if (_size_queue < 2) -// { -// msg += " - The reservation_station must be have less a depth of 2"; -// msg += " * size_queue : " + toString(_size_queue) + "\n"; -// } + Parameters_test test ("Reservation_station"); if (_size_queue < _nb_inst_retire) - { - msg += " - The reservation_station can't have more retire port than entry in the queue."; - } - - return msg; + test.error("The reservation_station can't have more retire port than entry in the queue."); log_printf(FUNC,Reservation_station,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp (revision 78) @@ -73,4 +73,5 @@ in_INSERT_TYPE = interface->set_signal_in ("type" ,_param->_size_type ); in_INSERT_STORE_QUEUE_PTR_WRITE = interface->set_signal_in ("store_queue_ptr_write" ,log2(_param->_size_store_queue)); + if (_param->_have_port_load_queue_ptr) in_INSERT_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in ("load_queue_ptr_write" ,log2(_param->_size_load_queue) ); in_INSERT_HAS_IMMEDIAT = interface->set_signal_in ("has_immediat" ,1 ); @@ -108,4 +109,5 @@ out_RETIRE_TYPE = new SC_OUT(Ttype_t ) * [_param->_nb_inst_retire]; out_RETIRE_STORE_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; + if (_param->_have_port_load_queue_ptr) out_RETIRE_LOAD_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; out_RETIRE_HAS_IMMEDIAT = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; @@ -141,4 +143,5 @@ out_RETIRE_TYPE [i] = interface->set_signal_out ("type" ,_param->_size_type); out_RETIRE_STORE_QUEUE_PTR_WRITE [i] = interface->set_signal_out ("store_queue_ptr_write" ,log2(_param->_size_store_queue)); + if (_param->_have_port_load_queue_ptr) out_RETIRE_LOAD_QUEUE_PTR_WRITE [i] = interface->set_signal_out ("load_queue_ptr_write" ,log2(_param->_size_load_queue) ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp (revision 78) @@ -44,4 +44,5 @@ delete in_INSERT_TYPE ; delete in_INSERT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete in_INSERT_LOAD_QUEUE_PTR_WRITE ; delete in_INSERT_HAS_IMMEDIAT ; @@ -77,4 +78,5 @@ delete [] out_RETIRE_TYPE ; delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ; delete [] out_RETIRE_HAS_IMMEDIAT ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp (revision 78) @@ -102,4 +102,5 @@ PORT_WRITE(out_RETIRE_TYPE [i],_queue[index_find]._type); PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [i],_queue[index_find]._store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE [i],_queue[index_find]._load_queue_ptr_write ); PORT_WRITE(out_RETIRE_HAS_IMMEDIAT [i],_queue[index_find]._has_immediat); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (revision 78) @@ -259,4 +259,5 @@ _queue[index]._type = PORT_READ(in_INSERT_TYPE ); _queue[index]._store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE); + if (_param->_have_port_load_queue_ptr) _queue[index]._load_queue_ptr_write = PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE ); _queue[index]._has_immediat = PORT_READ(in_INSERT_HAS_IMMEDIAT ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg (revision 78) @@ -13,5 +13,5 @@ 2 2 *2 # nb_spr_write 4 4 *2 # size_store_queue -4 4 *2 # size_load_queue +1 4 *4 # size_load_queue 2 2 *2 # nb_inst_retire 2 2 *2 # nb_bypass_write Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp (revision 78) @@ -161,4 +161,5 @@ INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_TYPE ); INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE ); + if (_param->_have_port_load_queue_ptr) INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ); INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_HAS_IMMEDIAT ); @@ -187,4 +188,5 @@ INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_TYPE ,_param->_nb_inst_retire); INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire); + if (_param->_have_port_load_queue_ptr) INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire); INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_HAS_IMMEDIAT ,_param->_nb_inst_retire); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h (revision 78) @@ -57,4 +57,5 @@ public : const bool _have_port_ooo_engine_id ; public : const bool _have_port_packet_id ; + public : const bool _have_port_load_queue_ptr; public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue ::Parameters * _param_read_queue; @@ -82,5 +83,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp (revision 78) @@ -66,5 +66,6 @@ _have_port_front_end_id (_size_front_end_id >0), _have_port_ooo_engine_id (_size_ooo_engine_id>0), - _have_port_packet_id (_size_packet_id >0) + _have_port_packet_id (_size_packet_id >0), + _have_port_load_queue_ptr (_size_load_queue >1) { log_printf(FUNC,Read_unit,FUNCTION,"Begin"); @@ -144,5 +145,6 @@ _have_port_front_end_id (param._have_port_front_end_id ), _have_port_ooo_engine_id (param._have_port_ooo_engine_id ), - _have_port_packet_id (param._have_port_packet_id ) + _have_port_packet_id (param._have_port_packet_id ), + _have_port_load_queue_ptr (param._have_port_load_queue_ptr) { log_printf(FUNC,Read_unit,FUNCTION,"Begin"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp (revision 78) @@ -21,13 +21,13 @@ #undef FUNCTION #define FUNCTION "Read_unit::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Read_unit,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test ("Read_unit"); log_printf(FUNC,Read_unit,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp (revision 78) @@ -59,6 +59,6 @@ ALLOC_INTERFACE("read_unit_in", IN, WEST, "Enter of new operation"); - ALLOC_VAL_IN ( in_READ_UNIT_IN_VAL); - ALLOC_ACK_OUT (out_READ_UNIT_IN_ACK); + ALLOC_VALACK_IN ( in_READ_UNIT_IN_VAL,VAL); + ALLOC_VALACK_OUT (out_READ_UNIT_IN_ACK,ACK); ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -67,6 +67,6 @@ ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); - ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue ); - ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue ); + ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,log2(_param->_size_store_queue)); + ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,log2(_param->_size_load_queue)); ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1); ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data); @@ -87,6 +87,6 @@ ALLOC1_INTERFACE("read_unit_out", OUT, EAST, "Output of operation. All operand is valid.", _param->_nb_inst_retire); - ALLOC1_VAL_OUT (out_READ_UNIT_OUT_VAL); - ALLOC1_ACK_IN ( in_READ_UNIT_OUT_ACK); + ALLOC1_VALACK_OUT (out_READ_UNIT_OUT_VAL,VAL); + ALLOC1_VALACK_IN ( in_READ_UNIT_OUT_ACK,ACK); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -95,6 +95,6 @@ ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); - ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue ); - ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue ); + ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,log2(_param->_size_store_queue)); + ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,log2(_param->_size_load_queue )); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data ); @@ -112,6 +112,6 @@ ALLOC1_INTERFACE("gpr_read", OUT, SOUTH, "Read port.", _param->_nb_gpr_read); - ALLOC1_VAL_OUT (out_GPR_READ_VAL); - ALLOC1_ACK_IN ( in_GPR_READ_ACK); + ALLOC1_VALACK_OUT (out_GPR_READ_VAL,VAL); + ALLOC1_VALACK_IN ( in_GPR_READ_ACK,ACK); ALLOC1_SIGNAL_OUT(out_GPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_OUT(out_GPR_READ_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_data ); @@ -124,6 +124,6 @@ ALLOC1_INTERFACE("spr_read", OUT, SOUTH, "Read port.", _param->_nb_spr_read); - ALLOC1_VAL_OUT (out_SPR_READ_VAL); - ALLOC1_ACK_IN ( in_SPR_READ_ACK); + ALLOC1_VALACK_OUT (out_SPR_READ_VAL,VAL); + ALLOC1_VALACK_IN ( in_SPR_READ_ACK,ACK); ALLOC1_SIGNAL_OUT(out_SPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_data ); @@ -136,5 +136,5 @@ ALLOC1_INTERFACE("gpr_write", IN , SOUTH, "Write port.", _param->_nb_gpr_write); - ALLOC1_VAL_IN ( in_GPR_WRITE_VAL); + ALLOC1_VALACK_IN ( in_GPR_WRITE_VAL,VAL); ALLOC1_SIGNAL_IN ( in_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_IN ( in_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_data ); @@ -146,5 +146,5 @@ ALLOC1_INTERFACE("spr_write", IN , SOUTH, "Write port.", _param->_nb_spr_write); - ALLOC1_VAL_IN ( in_SPR_WRITE_VAL); + ALLOC1_VALACK_IN ( in_SPR_WRITE_VAL,VAL); ALLOC1_SIGNAL_IN ( in_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_data ); @@ -216,5 +216,4 @@ name = _name+"_read_queue"; std::cout << "Instance : " << name << std::endl; - { #ifdef POSITION @@ -248,4 +247,5 @@ _component->port_map(name, "in_READ_QUEUE_IN_TYPE" ,dest, "in_READ_UNIT_IN_TYPE" ); _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE",dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) _component->port_map(name, "in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE" ,dest, "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" ); _component->port_map(name, "in_READ_QUEUE_IN_HAS_IMMEDIAT" ,dest, "in_READ_UNIT_IN_HAS_IMMEDIAT" ); @@ -284,4 +284,5 @@ _component->port_map(name,"out_READ_QUEUE_OUT_TYPE" ,dest, "in_INSERT_TYPE" ); _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE",dest, "in_INSERT_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) _component->port_map(name,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" ,dest, "in_INSERT_LOAD_QUEUE_PTR_WRITE" ); _component->port_map(name,"out_READ_QUEUE_OUT_HAS_IMMEDIAT" ,dest, "in_INSERT_HAS_IMMEDIAT" ); @@ -375,5 +376,4 @@ name = _name+"_reservation_station"; std::cout << "Instance : " << name << std::endl; - { #ifdef POSITION @@ -408,4 +408,5 @@ _component->port_map(name, "in_INSERT_TYPE" ,dest,"out_READ_QUEUE_OUT_TYPE" ); _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_WRITE",dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) _component->port_map(name, "in_INSERT_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" ); _component->port_map(name, "in_INSERT_HAS_IMMEDIAT" ,dest,"out_READ_QUEUE_OUT_HAS_IMMEDIAT" ); @@ -452,4 +453,5 @@ _component->port_map(name,"out_RETIRE_"+toString(i)+"_TYPE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_TYPE" ); _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) _component->port_map(name,"out_RETIRE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ); _component->port_map(name,"out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_HAS_IMMEDIAT" ); @@ -528,4 +530,5 @@ } } + #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp (revision 78) @@ -42,4 +42,5 @@ delete in_READ_UNIT_IN_TYPE ; delete in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ; delete in_READ_UNIT_IN_HAS_IMMEDIAT ; @@ -70,4 +71,5 @@ delete [] out_READ_UNIT_OUT_TYPE ; delete [] out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete [] out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ; delete [] out_READ_UNIT_OUT_HAS_IMMEDIAT ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h (revision 78) @@ -55,5 +55,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp (revision 78) @@ -54,6 +54,6 @@ ALLOC_INTERFACE ("execute_queue_in", IN, WEST, "Input of execute_queue"); - ALLOC_VAL_IN ( in_EXECUTE_QUEUE_IN_VAL); - ALLOC_ACK_OUT (out_EXECUTE_QUEUE_IN_ACK); + ALLOC_VALACK_IN ( in_EXECUTE_QUEUE_IN_VAL,VAL); + ALLOC_VALACK_OUT(out_EXECUTE_QUEUE_IN_ACK,ACK); if(_param->_have_port_context_id) ALLOC_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); @@ -76,6 +76,6 @@ ALLOC_INTERFACE ("execute_queue_out", OUT, EAST, "Output of execute_queue"); - ALLOC_VAL_OUT (out_EXECUTE_QUEUE_OUT_VAL); - ALLOC_ACK_IN ( in_EXECUTE_QUEUE_OUT_ACK); + ALLOC_VALACK_OUT(out_EXECUTE_QUEUE_OUT_VAL,VAL); + ALLOC_VALACK_IN ( in_EXECUTE_QUEUE_OUT_ACK,ACK); if(_param->_have_port_context_id) ALLOC_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp (revision 78) @@ -22,13 +22,13 @@ #undef FUNCTION #define FUNCTION "Execute_queue::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Execute_queue,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test ("Execute_queue"); log_printf(FUNC,Execute_queue,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (revision 78) @@ -66,5 +66,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp (revision 78) @@ -22,16 +22,16 @@ #undef FUNCTION #define FUNCTION "Write_queue::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Write_queue,FUNCTION,"Begin"); - std::string msg = ""; + Parameters_test test ("Write_queue"); if (_nb_bypass_write > _size_queue) - msg += " * The write_queue can't have more bypass_write than entry in the queue."; - - return msg; + test.error("The write_queue can't have more bypass_write than entry in the queue."); log_printf(FUNC,Write_queue,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp (revision 78) @@ -53,6 +53,6 @@ ALLOC_INTERFACE ("write_queue_in", IN, WEST, "Input of write_queue"); - ALLOC_VAL_IN ( in_WRITE_QUEUE_IN_VAL); - ALLOC_ACK_OUT (out_WRITE_QUEUE_IN_ACK); + ALLOC_VALACK_IN ( in_WRITE_QUEUE_IN_VAL,VAL); + ALLOC_VALACK_OUT(out_WRITE_QUEUE_IN_ACK,ACK); ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -76,6 +76,6 @@ ALLOC_INTERFACE ("write_queue_out", OUT, EAST, "Output of write_queue"); - ALLOC_VAL_OUT (out_WRITE_QUEUE_OUT_VAL); - ALLOC_ACK_IN ( in_WRITE_QUEUE_OUT_ACK); + ALLOC_VALACK_OUT(out_WRITE_QUEUE_OUT_VAL,VAL); + ALLOC_VALACK_IN ( in_WRITE_QUEUE_OUT_ACK,ACK); ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -94,6 +94,6 @@ ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_gpr_write); - ALLOC1_VAL_OUT (out_GPR_WRITE_VAL); - ALLOC1_ACK_IN ( in_GPR_WRITE_ACK); + ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL); + ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK); ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); @@ -105,6 +105,6 @@ ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_spr_write); - ALLOC1_VAL_OUT (out_SPR_WRITE_VAL); - ALLOC1_ACK_IN ( in_SPR_WRITE_ACK); + ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL); + ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK); ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h (revision 78) @@ -74,5 +74,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp (revision 78) @@ -20,16 +20,16 @@ #undef FUNCTION #define FUNCTION "Write_unit::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Write_unit,FUNCTION,"Begin"); - std::string msg = ""; + Parameters_test test ("Write_unit"); if (_size_write_queue == 0) - msg += " * Write queue must have a less one entry."; - - return msg; + test.error("Write queue must have a less one entry."); log_printf(FUNC,Write_unit,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp (revision 78) @@ -59,6 +59,6 @@ ALLOC_INTERFACE ("write_unit_in", IN, WEST, "Input of write_unit"); - ALLOC_VAL_IN ( in_WRITE_UNIT_IN_VAL); - ALLOC_ACK_OUT (out_WRITE_UNIT_IN_ACK); + ALLOC_VALACK_IN ( in_WRITE_UNIT_IN_VAL,VAL); + ALLOC_VALACK_OUT(out_WRITE_UNIT_IN_ACK,ACK); ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -82,6 +82,6 @@ ALLOC_INTERFACE ("write_unit_out", OUT, EAST, "Output of write_unit"); - ALLOC_VAL_OUT (out_WRITE_UNIT_OUT_VAL); - ALLOC_ACK_IN ( in_WRITE_UNIT_OUT_ACK); + ALLOC_VALACK_OUT(out_WRITE_UNIT_OUT_VAL,VAL); + ALLOC_VALACK_IN ( in_WRITE_UNIT_OUT_ACK,ACK); ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -100,6 +100,6 @@ ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_gpr_write); - ALLOC1_VAL_OUT (out_GPR_WRITE_VAL); - ALLOC1_ACK_IN ( in_GPR_WRITE_ACK); + ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL); + ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK); ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); @@ -111,6 +111,6 @@ ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_spr_write); - ALLOC1_VAL_OUT (out_SPR_WRITE_VAL); - ALLOC1_ACK_IN ( in_SPR_WRITE_ACK); + ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL); + ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK); ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp (revision 78) @@ -52,5 +52,5 @@ public : Tpacket_t _packet_id ; //public : Toperation_t _operation ; -//public : Ttype_t _type ; + public : Ttype_t _type ; public : Tcontrol_t _write_rd ; public : Tgeneral_address_t _num_reg_rd ; @@ -68,5 +68,5 @@ Tpacket_t packet_id , // Toperation_t operation , -// Ttype_t type , + Ttype_t type , Tcontrol_t write_rd , Tgeneral_address_t num_reg_rd , @@ -84,5 +84,5 @@ _packet_id = packet_id ; // _operation = operation ; -// _type = type ; + _type = type ; _write_rd = write_rd ; _num_reg_rd = num_reg_rd ; @@ -128,5 +128,5 @@ ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_PACKET_ID ," in_EXECUTE_UNIT_OUT_PACKET_ID ",Tpacket_t ,_param->_nb_execute_unit); //ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION ," in_EXECUTE_UNIT_OUT_OPERATION ",Toperation_t ,_param->_nb_execute_unit); -//ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE ," in_EXECUTE_UNIT_OUT_TYPE ",Ttype_t ,_param->_nb_execute_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE ," in_EXECUTE_UNIT_OUT_TYPE ",Ttype_t ,_param->_nb_execute_unit); ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD ," in_EXECUTE_UNIT_OUT_WRITE_RD ",Tcontrol_t ,_param->_nb_execute_unit); ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD ," in_EXECUTE_UNIT_OUT_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_execute_unit); @@ -145,5 +145,5 @@ ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_PACKET_ID ,"out_WRITE_UNIT_IN_PACKET_ID ",Tpacket_t ,_param->_nb_write_unit ); //ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_OPERATION ,"out_WRITE_UNIT_IN_OPERATION ",Toperation_t ,_param->_nb_write_unit ); -//ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE ,"out_WRITE_UNIT_IN_TYPE ",Ttype_t ,_param->_nb_write_unit ); + ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE ,"out_WRITE_UNIT_IN_TYPE ",Ttype_t ,_param->_nb_write_unit ); ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD ,"out_WRITE_UNIT_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_write_unit ); ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD ,"out_WRITE_UNIT_IN_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_write_unit ); @@ -176,5 +176,5 @@ INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_PACKET_ID ,_param->_nb_execute_unit); //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_OPERATION ,_param->_nb_execute_unit); -//INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE ,_param->_nb_execute_unit); + INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE ,_param->_nb_execute_unit); INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_WRITE_RD ,_param->_nb_execute_unit); INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_NUM_REG_RD ,_param->_nb_execute_unit); @@ -198,5 +198,5 @@ INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_PACKET_ID ,_param->_nb_write_unit ); //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_OPERATION ,_param->_nb_write_unit ); -//INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE ,_param->_nb_write_unit ); + INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE ,_param->_nb_write_unit ); INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_WRITE_RD ,_param->_nb_write_unit ); INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_NUM_REG_RD ,_param->_nb_write_unit ); @@ -282,5 +282,5 @@ nb_request_in, //range (rand(), _param->_size_operation ), - //range (rand(), _param->_size_type ), + range (rand(), _param->_size_type ), range (rand(), 2 ), range (rand(), _param->_size_general_register), @@ -314,5 +314,5 @@ in_EXECUTE_UNIT_OUT_PACKET_ID [i] ->write(request[i].front()._packet_id ); // in_EXECUTE_UNIT_OUT_OPERATION [i] ->write(request[i].front()._operation ); -// in_EXECUTE_UNIT_OUT_TYPE [i] ->write(request[i].front()._type ); + in_EXECUTE_UNIT_OUT_TYPE [i] ->write(request[i].front()._type ); in_EXECUTE_UNIT_OUT_WRITE_RD [i] ->write(request[i].front()._write_rd ); in_EXECUTE_UNIT_OUT_NUM_REG_RD [i] ->write(request[i].front()._num_reg_rd ); @@ -368,5 +368,5 @@ TEST(Tcontext_t ,out_WRITE_UNIT_IN_OOO_ENGINE_ID [i]->read(), request[execute_unit].front()._ooo_engine_id ); // TEST(Toperation_t ,out_WRITE_UNIT_IN_OPERATION [i]->read(), request[execute_unit].front()._operation ); -// TEST(Ttype_t ,out_WRITE_UNIT_IN_TYPE [i]->read(), request[execute_unit].front()._type ); + TEST(Ttype_t ,out_WRITE_UNIT_IN_TYPE [i]->read(), request[execute_unit].front()._type ); TEST(Tcontrol_t ,out_WRITE_UNIT_IN_WRITE_RD [i]->read(), request[execute_unit].front()._write_rd ); TEST(Tgeneral_address_t,out_WRITE_UNIT_IN_NUM_REG_RD [i]->read(), request[execute_unit].front()._num_reg_rd ); @@ -405,5 +405,5 @@ delete [] in_EXECUTE_UNIT_OUT_PACKET_ID ; //delete [] in_EXECUTE_UNIT_OUT_OPERATION ; -//delete [] in_EXECUTE_UNIT_OUT_TYPE ; + delete [] in_EXECUTE_UNIT_OUT_TYPE ; delete [] in_EXECUTE_UNIT_OUT_WRITE_RD ; delete [] in_EXECUTE_UNIT_OUT_NUM_REG_RD ; @@ -423,5 +423,5 @@ delete [] out_WRITE_UNIT_IN_PACKET_ID ; //delete [] out_WRITE_UNIT_IN_OPERATION ; -//delete [] out_WRITE_UNIT_IN_TYPE ; + delete [] out_WRITE_UNIT_IN_TYPE ; delete [] out_WRITE_UNIT_IN_WRITE_RD ; delete [] out_WRITE_UNIT_IN_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h (revision 78) @@ -17,6 +17,7 @@ #include "Common/include/ToString.h" #include "Common/include/Debug.h" +#include "Behavioural/include/Identification.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h" +#include "Behavioural/include/Types.h" #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h" #ifdef STATISTICS @@ -71,5 +72,5 @@ public : SC_IN (Tpacket_t ) ** in_EXECUTE_UNIT_OUT_PACKET_ID ; //public : SC_IN (Toperation_t ) ** in_EXECUTE_UNIT_OUT_OPERATION ; -//public : SC_IN (Ttype_t ) ** in_EXECUTE_UNIT_OUT_TYPE ; + public : SC_IN (Ttype_t ) ** in_EXECUTE_UNIT_OUT_TYPE ; public : SC_IN (Tcontrol_t ) ** in_EXECUTE_UNIT_OUT_WRITE_RD ; public : SC_IN (Tgeneral_address_t) ** in_EXECUTE_UNIT_OUT_NUM_REG_RD ; @@ -90,5 +91,5 @@ public : SC_OUT(Tpacket_t ) ** out_WRITE_UNIT_IN_PACKET_ID ; //public : SC_OUT(Toperation_t ) ** out_WRITE_UNIT_IN_OPERATION ; -//public : SC_OUT(Ttype_t ) ** out_WRITE_UNIT_IN_TYPE ; + public : SC_OUT(Ttype_t ) ** out_WRITE_UNIT_IN_TYPE ; public : SC_OUT(Tcontrol_t ) ** out_WRITE_UNIT_IN_WRITE_RD ; public : SC_OUT(Tgeneral_address_t) ** out_WRITE_UNIT_IN_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h (revision 78) @@ -10,6 +10,7 @@ #include "Behavioural/include/Parameters.h" +#include "Behavioural/include/Types.h" #include "Common/include/Debug.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h" +#include "Behavioural/include/Identification.h" namespace morpheo { @@ -70,5 +71,5 @@ public : ~Parameters (); - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h (revision 77) +++ (revision ) @@ -1,60 +1,0 @@ -#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_network_execution_unit_to_write_unit_Types_h -#define morpheo_behavioural_core_multi_execute_loop_execute_loop_network_execution_unit_to_write_unit_Types_h - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Types.h" -#include "Common/include/ToString.h" -#include "Common/include/FromString.h" -#include "Common/include/ErrorMorpheo.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_execute_loop { -namespace execute_loop { -namespace network { -namespace execution_unit_to_write_unit { - - typedef enum - { - PRIORITY_STATIC, - PRIORITY_ROUND_ROBIN - } Tpriority_t; - -}; // end namespace execution_unit_to_write_unit -}; // end namespace network -}; // end namespace execute_loop -}; // end namespace multi_execute_loop -}; // end namespace core -}; // end namespace behavioural - - template<> inline std::string toString(const morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Tpriority_t& x) - { - switch (x) - { - case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_STATIC : return "priority_static"; break; - case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_ROUND_ROBIN : return "priority_round_robin"; break; - default : return "" ; break; - } - }; - - template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Tpriority_t fromString(const std::string& x) - { - if ( (x.compare("0") == 0) or - (x.compare("priority_static") == 0)) - return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_STATIC; - if ( (x.compare("1") == 0) or - (x.compare("priority_round_robin") == 0)) - return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::PRIORITY_ROUND_ROBIN; - throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); - }; - -}; // end namespace morpheo - -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp (revision 78) @@ -60,6 +60,6 @@ ALLOC1_INTERFACE("execute_unit_out", IN, EAST, "Output of execution_unit", _param->_nb_execute_unit); - ALLOC1_VAL_IN ( in_EXECUTE_UNIT_OUT_VAL); - ALLOC1_ACK_OUT (out_EXECUTE_UNIT_OUT_ACK); + ALLOC1_VALACK_IN ( in_EXECUTE_UNIT_OUT_VAL,VAL); + ALLOC1_VALACK_OUT(out_EXECUTE_UNIT_OUT_ACK,ACK); ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -67,5 +67,5 @@ ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id ); //ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); - //ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); @@ -82,6 +82,6 @@ ALLOC1_INTERFACE("write_unit_in", OUT, WEST, "Input of write_unit", _param->_nb_write_unit); - ALLOC1_VAL_OUT(out_WRITE_UNIT_IN_VAL); - ALLOC1_ACK_IN ( in_WRITE_UNIT_IN_ACK); + ALLOC1_VALACK_OUT(out_WRITE_UNIT_IN_VAL,VAL); + ALLOC1_VALACK_IN ( in_WRITE_UNIT_IN_ACK,ACK); ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); @@ -89,5 +89,5 @@ ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id ); //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); - //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp (revision 78) @@ -39,5 +39,5 @@ delete [] in_EXECUTE_UNIT_OUT_PACKET_ID ; //delete [] in_EXECUTE_UNIT_OUT_OPERATION ; - //delete [] in_EXECUTE_UNIT_OUT_TYPE ; + delete [] in_EXECUTE_UNIT_OUT_TYPE ; delete [] in_EXECUTE_UNIT_OUT_WRITE_RD ; delete [] in_EXECUTE_UNIT_OUT_NUM_REG_RD ; @@ -61,5 +61,5 @@ delete [] out_WRITE_UNIT_IN_PACKET_ID ; //delete [] out_WRITE_UNIT_IN_OPERATION ; - //delete [] out_WRITE_UNIT_IN_TYPE ; + delete [] out_WRITE_UNIT_IN_TYPE ; delete [] out_WRITE_UNIT_IN_WRITE_RD ; delete [] out_WRITE_UNIT_IN_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp (revision 78) @@ -75,5 +75,5 @@ PORT_WRITE(out_WRITE_UNIT_IN_PACKET_ID [dest], PORT_READ(in_EXECUTE_UNIT_OUT_PACKET_ID [i])); //PORT_WRITE(out_WRITE_UNIT_IN_OPERATION [dest], PORT_READ(in_EXECUTE_UNIT_OUT_OPERATION [i])); - //PORT_WRITE(out_WRITE_UNIT_IN_TYPE [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE [i])); + PORT_WRITE(out_WRITE_UNIT_IN_TYPE [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE [i])); PORT_WRITE(out_WRITE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_WRITE_RD [i])); PORT_WRITE(out_WRITE_UNIT_IN_NUM_REG_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_NUM_REG_RD [i])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp (revision 78) @@ -21,9 +21,9 @@ #undef FUNCTION #define FUNCTION "Execution_unit_to_Write_unit::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"Begin"); - std::string msg = ""; + Parameters_test test("Execution_unit_to_Write_unit"); for (uint32_t i=0; i<_nb_execute_unit; i++) @@ -35,5 +35,5 @@ if (j == _nb_write_unit) - msg += " - The execute_unit ["+toString(i)+"] is link with none write_unit.\n"; + test.error("The execute_unit ["+toString(i)+"] is link with none write_unit."); } @@ -46,10 +46,14 @@ if (j == _nb_thread) - msg += " - The write_unit ["+toString(i)+"] have none source's thread.\n"; + test.error("The write_unit ["+toString(i)+"] have none source's thread."); } - return msg; + if ( (_priority != PRIORITY_STATIC ) and + (_priority != PRIORITY_ROUND_ROBIN)) + test.error("Unsupported priority scheme. It must be Static or Round Robin."); log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg (revision 78) @@ -11,5 +11,5 @@ 16 16 *2 # nb_special_register 4 4 *2 # size_store_queue -4 4 *2 # size_load_queue +1 4 *4 # size_load_queue 0 1 +1 # priority 1 1 +1 # table_routing [0][0] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp (revision 78) @@ -190,4 +190,5 @@ INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_TYPE ,_param->_nb_read_unit); INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit); + if (_param->_have_port_load_queue_ptr) INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_read_unit); INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_HAS_IMMEDIAT ,_param->_nb_read_unit); @@ -214,4 +215,5 @@ INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_TYPE ,_param->_nb_execute_unit); INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_execute_unit); + if (_param->_have_port_load_queue_ptr) INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_execute_unit); INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ,_param->_nb_execute_unit); @@ -352,4 +354,5 @@ in_READ_UNIT_OUT_TYPE [i] ->write(request[i].front()._type ); in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE[i] ->write(request[i].front()._store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i] ->write(request[i].front()._load_queue_ptr_write ); in_READ_UNIT_OUT_HAS_IMMEDIAT [i] ->write(request[i].front()._has_immediat ); @@ -408,4 +411,5 @@ TEST(Ttype_t ,out_EXECUTE_UNIT_IN_TYPE [i]->read(), request[read_unit].front()._type ); TEST(Tlsq_ptr_t ,out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE[i]->read(), request[read_unit].front()._store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) TEST(Tlsq_ptr_t ,out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i]->read(), request[read_unit].front()._load_queue_ptr_write ); TEST(Tcontrol_t ,out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [i]->read(), request[read_unit].front()._has_immediat ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h (revision 78) @@ -11,5 +11,6 @@ #include "Common/include/Debug.h" #include "Behavioural/include/Parameters.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Identification.h" namespace morpheo { @@ -38,7 +39,7 @@ public : const uint32_t _size_load_queue ; public : const Tpriority_t _priority ; - public : bool ** _table_routing ; //array [nb_read_unit][nb_execute_unit] - public : bool ** _table_execute_type ; //array [nb_execute_unit][nb_type] - public : bool ** _table_execute_thread ; //array [nb_execute_unit][nb_thread] + public : bool ** _table_routing ; //[nb_read_unit][nb_execute_unit] + public : bool ** _table_execute_type ; //[nb_execute_unit][nb_type] + public : bool ** _table_execute_thread ; //[nb_execute_unit][nb_thread] public : const uint32_t _size_context_id ; @@ -53,4 +54,5 @@ public : const bool _have_port_ooo_engine_id; public : const bool _have_port_packet_id ; + public : const bool _have_port_load_queue_ptr; public : const uint32_t _nb_thread ; @@ -78,5 +80,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h (revision 78) @@ -17,5 +17,6 @@ #include "Common/include/ToString.h" #include "Common/include/Debug.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Identification.h" #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h (revision 77) +++ (revision ) @@ -1,61 +1,0 @@ -#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_network_read_unit_to_execution_unit_Types_h -#define morpheo_behavioural_core_multi_execute_loop_execute_loop_network_read_unit_to_execution_unit_Types_h - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Types.h" -#include "Common/include/ToString.h" -#include "Common/include/FromString.h" -#include "Common/include/ErrorMorpheo.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_execute_loop { -namespace execute_loop { -namespace network { -namespace read_unit_to_execution_unit { - - typedef enum - { - PRIORITY_STATIC, - PRIORITY_ROUND_ROBIN - } Tpriority_t; - -}; // end namespace read_unit_to_execution_unit -}; // end namespace network -}; // end namespace execute_loop -}; // end namespace multi_execute_loop -}; // end namespace core -}; // end namespace behavioural - - template<> inline std::string toString(const morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Tpriority_t& x) - { - switch (x) - { - case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_STATIC : return "priority_static"; break; - case morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_ROUND_ROBIN : return "priority_round_robin"; break; - default : return "" ; break; - } - }; - - template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Tpriority_t fromString(const std::string& x) - { - if ( (x.compare("0") == 0) or - (x.compare("priority_static") == 0)) - return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_STATIC; - if ( (x.compare("1") == 0) or - (x.compare("priority_round_robin") == 0)) - return morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::PRIORITY_ROUND_ROBIN; - throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); - }; - - -}; // end namespace morpheo - -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp (revision 78) @@ -60,4 +60,5 @@ _have_port_ooo_engine_id (_size_ooo_engine_id > 0), _have_port_packet_id (_size_packet_id > 0), + _have_port_load_queue_ptr(_size_load_queue > 1), _nb_thread (get_nb_thread (nb_context, nb_front_end, nb_ooo_engine)) @@ -68,11 +69,12 @@ _table_execute_type = table_execute_type ; _table_execute_thread = table_execute_thread; - - _nb_load_store_unit = 0; + + _nb_load_store_unit = 0; for (uint32_t i=0; i_have_port_load_queue_ptr) + sensitive << (*(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i])); if (_param->_have_port_context_id) sensitive << (*(in_READ_UNIT_OUT_CONTEXT_ID [i])); @@ -260,4 +261,6 @@ } + if (_param->_have_port_load_queue_ptr) + { (*(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i])) (*(in_EXECUTE_UNIT_IN_ACK [i])); @@ -274,5 +277,6 @@ (*(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i])) (*(in_READ_UNIT_OUT_OOO_ENGINE_ID [j])); } - + } + (*(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [i])) (*(in_EXECUTE_UNIT_IN_ACK [i])); @@ -364,5 +368,5 @@ (*(out_EXECUTE_UNIT_IN_WRITE_RD [i])) (*(in_READ_UNIT_OUT_OOO_ENGINE_ID [j])); } - + (*(out_EXECUTE_UNIT_IN_NUM_REG_RD [i])) (*(in_EXECUTE_UNIT_IN_ACK [i])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp (revision 78) @@ -59,6 +59,6 @@ ALLOC1_INTERFACE("read_unit_out", IN, EAST, "Output of read_unit", _param->_nb_read_unit); - ALLOC1_VAL_IN ( in_READ_UNIT_OUT_VAL); - ALLOC1_ACK_OUT(out_READ_UNIT_OUT_ACK); + ALLOC1_VALACK_IN ( in_READ_UNIT_OUT_VAL,VAL); + ALLOC1_VALACK_OUT(out_READ_UNIT_OUT_ACK,ACK); ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); @@ -68,6 +68,6 @@ ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation); ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type); - ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue); - ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_load_queue); + ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,log2(_param->_size_store_queue)); + ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,log2(_param->_size_load_queue)); ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1); ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); @@ -82,8 +82,8 @@ // ~~~~~[ Interface "execute_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { - ALLOC1_INTERFACE("execute_unit_out", IN, EAST, "Output of execute_unit", _param->_nb_execute_unit); - - ALLOC1_VAL_OUT(out_EXECUTE_UNIT_IN_VAL); - ALLOC1_ACK_IN ( in_EXECUTE_UNIT_IN_ACK); + ALLOC1_INTERFACE("execute_unit_in", OUT, WEST, "Input of execute_unit", _param->_nb_execute_unit); + + ALLOC1_VALACK_OUT(out_EXECUTE_UNIT_IN_VAL,VAL); + ALLOC1_VALACK_IN ( in_EXECUTE_UNIT_IN_ACK,ACK); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); @@ -93,15 +93,15 @@ ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type); - ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue); - ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_load_queue); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC ,"DATA_RC" ,Tspecial_data_t ,_param->_size_special_data); + ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,log2(_param->_size_store_queue)); + ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,log2(_param->_size_load_queue)); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RA ,"DATA_RA" ,Tgeneral_data_t ,_param->_size_general_data); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RB ,"DATA_RB" ,Tgeneral_data_t ,_param->_size_general_data); - ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC ,"DATA_RC" ,Tspecial_data_t ,_param->_size_special_data); - ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1); ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp (revision 78) @@ -42,4 +42,5 @@ delete [] in_READ_UNIT_OUT_TYPE ; delete [] in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete [] in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ; delete [] in_READ_UNIT_OUT_HAS_IMMEDIAT ; @@ -66,15 +67,16 @@ delete [] out_EXECUTE_UNIT_IN_OPERATION ; delete [] out_EXECUTE_UNIT_IN_TYPE ; + delete [] out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ; + delete [] out_EXECUTE_UNIT_IN_DATA_RC ; + delete [] out_EXECUTE_UNIT_IN_WRITE_RD ; + delete [] out_EXECUTE_UNIT_IN_WRITE_RE ; + delete [] out_EXECUTE_UNIT_IN_NUM_REG_RE ; delete [] out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) delete [] out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ; - delete [] out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ; delete [] out_EXECUTE_UNIT_IN_IMMEDIAT ; delete [] out_EXECUTE_UNIT_IN_DATA_RA ; delete [] out_EXECUTE_UNIT_IN_DATA_RB ; - delete [] out_EXECUTE_UNIT_IN_DATA_RC ; - delete [] out_EXECUTE_UNIT_IN_WRITE_RD ; delete [] out_EXECUTE_UNIT_IN_NUM_REG_RD ; - delete [] out_EXECUTE_UNIT_IN_WRITE_RE ; - delete [] out_EXECUTE_UNIT_IN_NUM_REG_RE ; } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp (revision 78) @@ -78,15 +78,16 @@ PORT_WRITE(out_EXECUTE_UNIT_IN_OPERATION [dest], PORT_READ(in_READ_UNIT_OUT_OPERATION [i])); PORT_WRITE(out_EXECUTE_UNIT_IN_TYPE [dest], PORT_READ(in_READ_UNIT_OUT_TYPE [i])); + PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [dest], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT [i])); + PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RC [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RC [i])); + PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RD [i])); + PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RE [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RE [i])); + PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RE [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RE [i])); PORT_WRITE(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE [dest], PORT_READ(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i])); + if (_param->_have_port_load_queue_ptr) PORT_WRITE(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [dest], PORT_READ(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i])); - PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [dest], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT [i])); PORT_WRITE(out_EXECUTE_UNIT_IN_IMMEDIAT [dest], PORT_READ(in_READ_UNIT_OUT_IMMEDIAT [i])); PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RA [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RA [i])); PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RB [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RB [i])); - PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RC [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RC [i])); - PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RD [i])); PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RD [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RD [i])); - PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RE [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RE [i])); - PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RE [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RE [i])); } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h (revision 78) @@ -50,5 +50,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp (revision 78) @@ -21,13 +21,13 @@ #undef FUNCTION #define FUNCTION "Register_unit_Glue::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Register_unit_Glue,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test("Register_unit_Glue"); log_printf(FUNC,Register_unit_Glue,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h (revision 78) @@ -79,5 +79,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h (revision 78) @@ -5,5 +5,5 @@ * $Id$ * - * [ Description ] + * [ Description ] * */ @@ -45,5 +45,5 @@ #endif { - // -----[ fields ]---------------------------------------------------- + // -----[ fields ]---------------------------------------------------- // Parameters protected : const std::string _name; @@ -59,10 +59,10 @@ #ifdef SYSTEMC - // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // Interface public : SC_CLOCK * in_CLOCK ; public : SC_IN (Tcontrol_t) * in_NRESET ; - // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) ** in_GPR_READ_VAL ; public : SC_OUT(Tcontrol_t ) ** out_GPR_READ_ACK ; @@ -72,5 +72,5 @@ public : SC_OUT(Tcontrol_t ) ** out_GPR_READ_DATA_VAL ; - // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_VAL ; public : SC_OUT(Tcontrol_t ) ** out_GPR_WRITE_ACK ; @@ -79,5 +79,5 @@ public : SC_IN (Tgeneral_data_t ) ** in_GPR_WRITE_DATA ; - // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) ** in_SPR_READ_VAL ; public : SC_OUT(Tcontrol_t ) ** out_SPR_READ_ACK ; @@ -87,5 +87,5 @@ public : SC_OUT(Tcontrol_t ) ** out_SPR_READ_DATA_VAL ; - // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_VAL ; public : SC_OUT(Tcontrol_t ) ** out_SPR_WRITE_ACK ; @@ -94,5 +94,5 @@ public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; @@ -102,5 +102,5 @@ public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ; - // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_VAL ; public : SC_OUT(Tcontrol_t ) *** out_RETIRE_ROB_ACK ; @@ -114,5 +114,5 @@ public : SC_IN (Tspecial_address_t) *** in_RETIRE_ROB_RE_NEW_NUM_REG ; - // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ protected : morpheo::behavioural::generic::registerfile::RegisterFile::RegisterFile ** component_gpr ; protected : morpheo::behavioural::generic::registerfile::RegisterFile::RegisterFile ** component_gpr_status; @@ -121,10 +121,10 @@ protected : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Register_unit_Glue::Register_unit_Glue * component_glue ; - // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ #endif - // -----[ methods ]--------------------------------------------------- + // -----[ methods ]--------------------------------------------------- #ifdef SYSTEMC Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp (revision 78) @@ -18,13 +18,13 @@ #undef FUNCTION #define FUNCTION "Register_unit::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Register_unit,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test("Register_unit"); log_printf(FUNC,Register_unit,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp (revision 78) @@ -240,5 +240,5 @@ in_RETIRE_ROB_VAL [i][j] = interface->set_signal_valack_in (VAL); - out_RETIRE_ROB_ACK [i][j] = interface->set_signal_valack_out (ACK); + out_RETIRE_ROB_ACK [i][j] = interface->set_signal_valack_out (ACK); in_RETIRE_ROB_RD_OLD_USE [i][j] = interface->set_signal_in ("rd_old_use" , 1); in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = interface->set_signal_in ("rd_old_num_reg", _param->_size_gpr_address); @@ -470,4 +470,11 @@ _name+"_glue", "out_CONST_1"); + + _component->port_map(_name+"_glue", + "out_CONST_1", + name_component, + "in_WRITE_"+toString(x)+"_DATA" ); + + _component->port_map(name_component, "in_WRITE_"+toString(x++)+"_ADDRESS", @@ -492,4 +499,8 @@ "out_CONST_0" ); + _component->port_map( _name+"_glue", + "out_CONST_0", + name_component, + "in_WRITE_"+toString(x)+"_DATA"); _component->port_map(name_component, @@ -515,4 +526,8 @@ _name+"_glue", "out_CONST_0"); + _component->port_map(_name+"_glue", + "out_CONST_0", + name_component, + "in_WRITE_"+toString(x)+"_DATA" ); _component->port_map(name_component, @@ -534,4 +549,9 @@ _name+"_glue", "out_CONST_1" + ); + _component->port_map(_name+"_glue", + "out_CONST_1", + name_component, + "in_WRITE_"+toString(x)+"_DATA" ); @@ -651,4 +671,10 @@ _name+"_glue", "out_CONST_1"); + _component->port_map(_name+"_glue", + "out_CONST_1", + name_component, + "in_WRITE_"+toString(x)+"_DATA" + ); + _component->port_map(name_component, "in_WRITE_"+toString(x++)+"_ADDRESS", @@ -673,4 +699,9 @@ "out_CONST_0" ); + _component->port_map( _name+"_glue", + "out_CONST_0", + name_component, + "in_WRITE_"+toString(x)+"_DATA" + ); _component->port_map(name_component, @@ -696,4 +727,9 @@ _name+"_glue", "out_CONST_0"); + _component->port_map(_name+"_glue", + "out_CONST_0", + name_component, + "in_WRITE_"+toString(x)+"_DATA" + ); _component->port_map(name_component, @@ -715,4 +751,9 @@ _name+"_glue", "out_CONST_1" + ); + _component->port_map(_name+"_glue", + "out_CONST_1", + name_component, + "in_WRITE_"+toString(x)+"_DATA" ); @@ -738,6 +779,6 @@ _component->port_map(name_component,"in_CLOCK" , _name, "in_CLOCK" ); _component->port_map(name_component,"in_NRESET", _name, "in_NRESET"); - _component->port_map(name_component,"out_CONST_0"); - _component->port_map(name_component,"out_CONST_1"); +// _component->port_map(name_component,"out_CONST_0",_name,"out_CONST_0"); +// _component->port_map(name_component,"out_CONST_1",_name,"out_CONST_1"); for (uint32_t j=0; j<_param->_nb_gpr_read; j++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Execute_loop_LIBRARY) + +DIR_LIBRARY = $(Execute_loop_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Execute_loop_library + +library_clean : Execute_loop_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,42 @@ +Execute_loop +1 1 +1 # nb_read_unit +1 1 +1 # nb_functionnal_unit +1 1 +1 # nb_load_store_unit +1 1 +1 # nb_write_unit +1 1 +1 # nb_context +1 1 +1 # nb_front_end +1 1 +1 # nb_ooo_engine +32 32 +1 # nb_packet +32 32 +1 # size_general_data +2 2 +1 # size_special_data +1 1 +1 # size_read_queue [0] [read_unit] +1 1 +1 # size_reservation_station [0] [read_unit] +1 1 +1 # nb_inst_retire [0] [read_unit] +2 2 +1 # size_store_queue [0] [load_store_unit] +1 1 +1 # size_load_queue [0] [load_store_unit] +1 1 +1 # size_speculative_access_queue [0] [load_store_unit] +1 1 +1 # nb_port_check [0] [load_store_unit] +2 2 +1 # speculative_load [0] [load_store_unit] +0 0 +1 # nb_bypass_memory [0] [load_store_unit] +1 1 +1 # size_write_queue [0] [write_unit] +1 1 +1 # size_execute_queue [0] [write_unit] +1 1 +1 # nb_bypass_write [0] [write_unit] +1 1 +1 # nb_gpr_bank +1 1 +1 # nb_gpr_port_read_by_bank +1 1 +1 # nb_gpr_port_write_by_bank +1 1 +1 # nb_spr_bank +1 1 +1 # nb_spr_port_read_by_bank +1 1 +1 # nb_spr_port_write_by_bank +64 64 +1 # nb_general_register [0] [nb_ooo_engine] +16 16 +1 # nb_special_register [0] [nb_ooo_engine] +1 1 +1 # nb_inst_insert_rob [0] [nb_ooo_engine] +1 1 +1 # nb_inst_retire_rob [0] [nb_ooo_engine] +1 1 +1 # execution_unit_to_write_unit_priority +1 1 +1 # execution_unit_to_write_unit_table_routing [0][0] [nb_execute_unit][nb_write_unit] +1 1 +1 # execution_unit_to_write_unit_table_routing [1][0] [nb_execute_unit][nb_write_unit] +1 1 +1 # execution_unit_to_write_unit_table_thread [0][0] [nb_write_unit][nb_thread] +1 1 +1 # read_unit_to_execution_unit_priority +1 1 +1 # read_unit_to_execution_unit_table_routing [0][0] [nb_read_unit][nb_execute_unit] +1 1 +1 # read_unit_to_execution_unit_table_routing [0][1] [nb_read_unit][nb_execute_unit] +1 1 +1 # read_unit_to_execution_unit_table_thread [0][0] [nb_execute_unit][nb_thread] +1 1 +1 # read_unit_to_execution_unit_table_thread [1][0] [nb_execute_unit][nb_thread] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h (revision 78) @@ -0,0 +1,29 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_execute_loop; + +using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop; + +void test (string name, + morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,300 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h" + +#define NB_PARAMS 18 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_read_unit (uint32_t )\n")); + err (_(" * nb_functionnal_unit (uint32_t )\n")); + err (_(" * nb_load_store_unit (uint32_t )\n")); + err (_(" * nb_write_unit (uint32_t )\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * nb_front_end (uint32_t )\n")); + err (_(" * nb_ooo_engine (uint32_t )\n")); + err (_(" * nb_packet (uint32_t )\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * size_special_data (uint32_t )\n")); + err (_(" * size_read_queue [read_unit] (uint32_t )\n")); + err (_(" * size_reservation_station [read_unit] (uint32_t )\n")); + err (_(" * nb_inst_retire [read_unit] (uint32_t )\n")); + err (_(" * size_store_queue [load_store_unit] (uint32_t )\n")); + err (_(" * size_load_queue [load_store_unit] (uint32_t )\n")); + err (_(" * size_speculative_access_queue [load_store_unit] (uint32_t )\n")); + err (_(" * nb_port_check [load_store_unit] (uint32_t )\n")); + err (_(" * speculative_load [load_store_unit] (Tspeculative_load_t)\n")); + err (_(" * nb_bypass_memory [load_store_unit] (uint32_t )\n")); + err (_(" * size_write_queue [write_unit] (uint32_t )\n")); + err (_(" * size_execute_queue [write_unit] (uint32_t )\n")); + err (_(" * nb_bypass_write [write_unit] (uint32_t )\n")); + err (_(" * nb_gpr_bank (uint32_t )\n")); + err (_(" * nb_gpr_port_read_by_bank (uint32_t )\n")); + err (_(" * nb_gpr_port_write_by_bank (uint32_t )\n")); + err (_(" * nb_spr_bank (uint32_t )\n")); + err (_(" * nb_spr_port_read_by_bank (uint32_t )\n")); + err (_(" * nb_spr_port_write_by_bank (uint32_t )\n")); + err (_(" * nb_general_register [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_special_register [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_inst_insert_rob [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_inst_retire_rob [nb_ooo_engine] (uint32_t )\n")); + err (_(" * execution_unit_to_write_unit_priority (Tpriority_t )\n")); + err (_(" * execution_unit_to_write_unit_table_routing[nb_execute_unit][nb_write_unit] (bool )\n")); + err (_(" * execution_unit_to_write_unit_table_thread [nb_write_unit][nb_thread] (bool )\n")); + err (_(" * read_unit_to_execution_unit_priority (Tpriority_t )\n")); + err (_(" * read_unit_to_execution_unit_table_routing [nb_read_unit][nb_execute_unit] (bool )\n")); + err (_(" * read_unit_to_execution_unit_table_thread [nb_execute_unit][nb_thread] (bool )\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < 2+NB_PARAMS) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + uint32_t nb_read_unit = atoi(argv[x++]); + uint32_t nb_functionnal_unit = atoi(argv[x++]); + uint32_t nb_load_store_unit = atoi(argv[x++]); + uint32_t nb_write_unit = atoi(argv[x++]); + uint32_t nb_context = atoi(argv[x++]); + uint32_t nb_front_end = atoi(argv[x++]); + uint32_t nb_ooo_engine = atoi(argv[x++]); + uint32_t nb_packet = atoi(argv[x++]); + uint32_t size_general_data = atoi(argv[x++]); + uint32_t size_special_data = atoi(argv[x++]); + + uint32_t nb_execute_unit = nb_functionnal_unit + nb_load_store_unit; + uint32_t nb_thread = get_nb_thread(nb_context, nb_front_end, nb_ooo_engine); + + int32_t nb_params = (2+NB_PARAMS+ + 3*nb_read_unit+ + 6*nb_load_store_unit+ + 3*nb_write_unit+ + 4*nb_ooo_engine+ + nb_execute_unit*nb_write_unit+ + nb_write_unit*nb_thread+ + nb_read_unit*nb_execute_unit+ + nb_execute_unit*nb_thread); + + + + if (argc != nb_params) + { + msg(_("Need %d parameters."),nb_params); + usage (argc, argv); + } + uint32_t * size_read_queue = new uint32_t [nb_read_unit]; + for (uint32_t i=0; i(argv[x++]); + + uint32_t * nb_bypass_memory = new uint32_t [nb_load_store_unit]; + for (uint32_t i=0; i(argv[x++]); + + bool ** execution_unit_to_write_unit_table_routing = new bool * [nb_execute_unit]; + for (uint32_t i=0; i(argv[x++]); + + bool ** read_unit_to_execution_unit_table_routing = new bool * [nb_read_unit]; + for (uint32_t i=0; iprint(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + exit (EXIT_FAILURE); + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + exit (EXIT_FAILURE); + } + + return (EXIT_SUCCESS); +} + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,330 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Execute_loop * _Execute_loop = new Execute_loop (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_VAL ," in_EXECUTE_LOOP_IN_VAL ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_IN_ACK ,"out_EXECUTE_LOOP_IN_ACK ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_CONTEXT_ID ," in_EXECUTE_LOOP_IN_CONTEXT_ID ",Tcontext_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_FRONT_END_ID ," in_EXECUTE_LOOP_IN_FRONT_END_ID ",Tcontext_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ," in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ",Tcontext_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_PACKET_ID ," in_EXECUTE_LOOP_IN_PACKET_ID ",Tpacket_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_OPERATION ," in_EXECUTE_LOOP_IN_OPERATION ",Toperation_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_TYPE ," in_EXECUTE_LOOP_IN_TYPE ",Ttype_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE," in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ," in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ," in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_IMMEDIAT ," in_EXECUTE_LOOP_IN_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_READ_RA ," in_EXECUTE_LOOP_IN_READ_RA ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RA ," in_EXECUTE_LOOP_IN_NUM_REG_RA ",Tgeneral_address_t,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_READ_RB ," in_EXECUTE_LOOP_IN_READ_RB ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RB ," in_EXECUTE_LOOP_IN_NUM_REG_RB ",Tgeneral_address_t,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_READ_RC ," in_EXECUTE_LOOP_IN_READ_RC ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RC ," in_EXECUTE_LOOP_IN_NUM_REG_RC ",Tspecial_address_t,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_WRITE_RD ," in_EXECUTE_LOOP_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RD ," in_EXECUTE_LOOP_IN_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_WRITE_RE ," in_EXECUTE_LOOP_IN_WRITE_RE ",Tcontrol_t ,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_IN_NUM_REG_RE ," in_EXECUTE_LOOP_IN_NUM_REG_RE ",Tspecial_address_t,_param->_nb_read_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_VAL ,"out_EXECUTE_LOOP_OUT_VAL ",Tcontrol_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL( in_EXECUTE_LOOP_OUT_ACK ," in_EXECUTE_LOOP_OUT_ACK ",Tcontrol_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_CONTEXT_ID ,"out_EXECUTE_LOOP_OUT_CONTEXT_ID ",Tcontext_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_FRONT_END_ID ,"out_EXECUTE_LOOP_OUT_FRONT_END_ID ",Tcontext_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID ,"out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID ",Tcontext_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_PACKET_ID ,"out_EXECUTE_LOOP_OUT_PACKET_ID ",Tpacket_t ,_param->_nb_write_unit); +//ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_OPERATION ,"out_EXECUTE_LOOP_OUT_OPERATION ",Toperation_t ,_param->_nb_write_unit); +//ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_TYPE ,"out_EXECUTE_LOOP_OUT_TYPE ",Ttype_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_FLAGS ,"out_EXECUTE_LOOP_OUT_FLAGS ",Tspecial_data_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_EXCEPTION ,"out_EXECUTE_LOOP_OUT_EXCEPTION ",Texception_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_NO_SEQUENCE ,"out_EXECUTE_LOOP_OUT_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_EXECUTE_LOOP_OUT_ADDRESS ,"out_EXECUTE_LOOP_OUT_ADDRESS ",Tgeneral_data_t ,_param->_nb_write_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_REQ_VAL ,"out_DCACHE_REQ_VAL ",Tcontrol_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL( in_DCACHE_REQ_ACK ," in_DCACHE_REQ_ACK ",Tcontrol_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_REQ_CONTEXT_ID ,"out_DCACHE_REQ_CONTEXT_ID ",Tcontext_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_REQ_PACKET_ID ,"out_DCACHE_REQ_PACKET_ID ",Tpacket_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_REQ_ADDRESS ,"out_DCACHE_REQ_ADDRESS ",Tdcache_address_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_REQ_TYPE ,"out_DCACHE_REQ_TYPE ",Tdcache_type_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_REQ_WDATA ,"out_DCACHE_REQ_WDATA ",Tdcache_data_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL( in_DCACHE_RSP_VAL ," in_DCACHE_RSP_VAL ",Tcontrol_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL(out_DCACHE_RSP_ACK ,"out_DCACHE_RSP_ACK ",Tcontrol_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL( in_DCACHE_RSP_CONTEXT_ID ," in_DCACHE_RSP_CONTEXT_ID ",Tcontext_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL( in_DCACHE_RSP_PACKET_ID ," in_DCACHE_RSP_PACKET_ID ",Tpacket_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL( in_DCACHE_RSP_RDATA ," in_DCACHE_RSP_RDATA ",Tdcache_data_t ,_param->_nb_load_store_unit); + ALLOC1_SC_SIGNAL( in_DCACHE_RSP_ERROR ," in_DCACHE_RSP_ERROR ",Tdcache_error_t ,_param->_nb_load_store_unit); + ALLOC2_SC_SIGNAL( in_INSERT_ROB_VAL ," in_INSERT_ROB_VAL ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL(out_INSERT_ROB_ACK ,"out_INSERT_ROB_ACK ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_INSERT_ROB_RD_USE ," in_INSERT_ROB_RD_USE ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_INSERT_ROB_RD_NUM_REG ," in_INSERT_ROB_RD_NUM_REG ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_INSERT_ROB_RE_USE ," in_INSERT_ROB_RE_USE ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_INSERT_ROB_RE_NUM_REG ," in_INSERT_ROB_RE_NUM_REG ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_VAL ," in_RETIRE_ROB_VAL ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL(out_RETIRE_ROB_ACK ,"out_RETIRE_ROB_ACK ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_OLD_USE ," in_RETIRE_ROB_RD_OLD_USE ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_OLD_NUM_REG ," in_RETIRE_ROB_RD_OLD_NUM_REG ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_NEW_USE ," in_RETIRE_ROB_RD_NEW_USE ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RD_NEW_NUM_REG ," in_RETIRE_ROB_RD_NEW_NUM_REG ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_OLD_USE ," in_RETIRE_ROB_RE_OLD_USE ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_OLD_NUM_REG ," in_RETIRE_ROB_RE_OLD_NUM_REG ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_NEW_USE ," in_RETIRE_ROB_RE_NEW_USE ",Tcontrol_t ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RETIRE_ROB_RE_NEW_NUM_REG ," in_RETIRE_ROB_RE_NEW_NUM_REG ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Execute_loop.\n"),name.c_str()); + + (*(_Execute_loop->in_CLOCK)) (*(in_CLOCK)); + (*(_Execute_loop->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_VAL ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_IN_ACK ,_param->_nb_read_unit); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_CONTEXT_ID ,_param->_nb_read_unit); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_FRONT_END_ID ,_param->_nb_read_unit); + if (_param->_have_port_ooo_engine_id) + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ,_param->_nb_read_unit); + if (_param->_have_port_packet_id) + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_PACKET_ID ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_OPERATION ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_TYPE ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit); + if (_param->_have_port_load_queue_ptr) + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_IMMEDIAT ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_READ_RA ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RA ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_READ_RB ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RB ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_READ_RC ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RC ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_WRITE_RD ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RD ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_WRITE_RE ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_IN_NUM_REG_RE ,_param->_nb_read_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_VAL ,_param->_nb_write_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_EXECUTE_LOOP_OUT_ACK ,_param->_nb_write_unit); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_CONTEXT_ID ,_param->_nb_write_unit); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_FRONT_END_ID ,_param->_nb_write_unit); + if (_param->_have_port_ooo_engine_id) + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID ,_param->_nb_write_unit); + if (_param->_have_port_packet_id) + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_PACKET_ID ,_param->_nb_write_unit); +//INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_OPERATION ,_param->_nb_write_unit); +//INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_TYPE ,_param->_nb_write_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_FLAGS ,_param->_nb_write_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_EXCEPTION ,_param->_nb_write_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_NO_SEQUENCE ,_param->_nb_write_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_EXECUTE_LOOP_OUT_ADDRESS ,_param->_nb_write_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_VAL ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_REQ_ACK ,_param->_nb_load_store_unit); + if (_param->_have_port_dcache_context_id) + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_CONTEXT_ID ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_PACKET_ID ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_ADDRESS ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_TYPE ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_REQ_WDATA ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_VAL ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop,out_DCACHE_RSP_ACK ,_param->_nb_load_store_unit); + if (_param->_have_port_dcache_context_id) + INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_CONTEXT_ID ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_PACKET_ID ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_RDATA ,_param->_nb_load_store_unit); + INSTANCE1_SC_SIGNAL(_Execute_loop, in_DCACHE_RSP_ERROR ,_param->_nb_load_store_unit); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop,out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_INSERT_ROB_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop,out_RETIRE_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_OLD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_OLD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_NEW_USE ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RD_NEW_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_OLD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_OLD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_NEW_USE ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Execute_loop, in_RETIRE_ROB_RE_NEW_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_EXECUTE_LOOP_IN_VAL ; + delete [] out_EXECUTE_LOOP_IN_ACK ; + delete [] in_EXECUTE_LOOP_IN_CONTEXT_ID ; + delete [] in_EXECUTE_LOOP_IN_FRONT_END_ID ; + delete [] in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ; + delete [] in_EXECUTE_LOOP_IN_PACKET_ID ; + delete [] in_EXECUTE_LOOP_IN_OPERATION ; + delete [] in_EXECUTE_LOOP_IN_TYPE ; + delete [] in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE; + delete [] in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ; + delete [] in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ; + delete [] in_EXECUTE_LOOP_IN_IMMEDIAT ; + delete [] in_EXECUTE_LOOP_IN_READ_RA ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RA ; + delete [] in_EXECUTE_LOOP_IN_READ_RB ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RB ; + delete [] in_EXECUTE_LOOP_IN_READ_RC ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RC ; + delete [] in_EXECUTE_LOOP_IN_WRITE_RD ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RD ; + delete [] in_EXECUTE_LOOP_IN_WRITE_RE ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RE ; + delete [] out_EXECUTE_LOOP_OUT_VAL ; + delete [] in_EXECUTE_LOOP_OUT_ACK ; + delete [] out_EXECUTE_LOOP_OUT_CONTEXT_ID ; + delete [] out_EXECUTE_LOOP_OUT_FRONT_END_ID ; + delete [] out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID ; + delete [] out_EXECUTE_LOOP_OUT_PACKET_ID ; +//delete [] out_EXECUTE_LOOP_OUT_OPERATION ; +//delete [] out_EXECUTE_LOOP_OUT_TYPE ; + delete [] out_EXECUTE_LOOP_OUT_FLAGS ; + delete [] out_EXECUTE_LOOP_OUT_EXCEPTION ; + delete [] out_EXECUTE_LOOP_OUT_NO_SEQUENCE ; + delete [] out_EXECUTE_LOOP_OUT_ADDRESS ; + delete [] out_DCACHE_REQ_VAL ; + delete [] in_DCACHE_REQ_ACK ; + delete [] out_DCACHE_REQ_CONTEXT_ID ; + delete [] out_DCACHE_REQ_PACKET_ID ; + delete [] out_DCACHE_REQ_ADDRESS ; + delete [] out_DCACHE_REQ_TYPE ; + delete [] out_DCACHE_REQ_WDATA ; + delete [] in_DCACHE_RSP_VAL ; + delete [] out_DCACHE_RSP_ACK ; + delete [] in_DCACHE_RSP_CONTEXT_ID ; + delete [] in_DCACHE_RSP_PACKET_ID ; + delete [] in_DCACHE_RSP_RDATA ; + delete [] in_DCACHE_RSP_ERROR ; + delete [] in_INSERT_ROB_VAL ; + delete [] out_INSERT_ROB_ACK ; + delete [] in_INSERT_ROB_RD_USE ; + delete [] in_INSERT_ROB_RD_NUM_REG ; + delete [] in_INSERT_ROB_RE_USE ; + delete [] in_INSERT_ROB_RE_NUM_REG ; + delete [] in_RETIRE_ROB_VAL ; + delete [] out_RETIRE_ROB_ACK ; + delete [] in_RETIRE_ROB_RD_OLD_USE ; + delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ; + delete [] in_RETIRE_ROB_RD_NEW_USE ; + delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ; + delete [] in_RETIRE_ROB_RE_OLD_USE ; + delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ; + delete [] in_RETIRE_ROB_RE_NEW_USE ; + delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ; + +#endif + + delete _Execute_loop; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Execute_loop.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Execute_loop.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Execute_loop.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Execute_loop} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h (revision 78) @@ -0,0 +1,216 @@ +#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_Execute_loop_h +#define morpheo_behavioural_core_multi_execute_loop_execute_loop_Execute_loop_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Identification.h" + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h" + + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + + class Execute_loop +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // Interface + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_VAL ;//[nb_read_unit] + public : SC_OUT(Tcontrol_t ) ** out_EXECUTE_LOOP_IN_ACK ;//[nb_read_unit] + public : SC_IN (Tcontext_t ) ** in_EXECUTE_LOOP_IN_CONTEXT_ID ;//[nb_read_unit] + public : SC_IN (Tcontext_t ) ** in_EXECUTE_LOOP_IN_FRONT_END_ID ;//[nb_read_unit] + public : SC_IN (Tcontext_t ) ** in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ;//[nb_read_unit] + public : SC_IN (Tpacket_t ) ** in_EXECUTE_LOOP_IN_PACKET_ID ;//[nb_read_unit] + public : SC_IN (Toperation_t ) ** in_EXECUTE_LOOP_IN_OPERATION ;//[nb_read_unit] + public : SC_IN (Ttype_t ) ** in_EXECUTE_LOOP_IN_TYPE ;//[nb_read_unit] + public : SC_IN (Tlsq_ptr_t ) ** in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE;//[nb_read_unit] + public : SC_IN (Tlsq_ptr_t ) ** in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ;//[nb_read_unit] + public : SC_IN (Tgeneral_data_t ) ** in_EXECUTE_LOOP_IN_IMMEDIAT ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_READ_RA ;//[nb_read_unit] + public : SC_IN (Tgeneral_address_t) ** in_EXECUTE_LOOP_IN_NUM_REG_RA ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_READ_RB ;//[nb_read_unit] + public : SC_IN (Tgeneral_address_t) ** in_EXECUTE_LOOP_IN_NUM_REG_RB ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_READ_RC ;//[nb_read_unit] + public : SC_IN (Tspecial_address_t) ** in_EXECUTE_LOOP_IN_NUM_REG_RC ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_WRITE_RD ;//[nb_read_unit] + public : SC_IN (Tgeneral_address_t) ** in_EXECUTE_LOOP_IN_NUM_REG_RD ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_WRITE_RE ;//[nb_read_unit] + public : SC_IN (Tspecial_address_t) ** in_EXECUTE_LOOP_IN_NUM_REG_RE ;//[nb_read_unit] + + // ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_EXECUTE_LOOP_OUT_VAL ;//[nb_write_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_OUT_ACK ;//[nb_write_unit] + public : SC_OUT(Tcontext_t ) ** out_EXECUTE_LOOP_OUT_CONTEXT_ID ;//[nb_write_unit] + public : SC_OUT(Tcontext_t ) ** out_EXECUTE_LOOP_OUT_FRONT_END_ID ;//[nb_write_unit] + public : SC_OUT(Tcontext_t ) ** out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID ;//[nb_write_unit] + public : SC_OUT(Tpacket_t ) ** out_EXECUTE_LOOP_OUT_PACKET_ID ;//[nb_write_unit] +//public : SC_OUT(Toperation_t ) ** out_EXECUTE_LOOP_OUT_OPERATION ;//[nb_write_unit] +//public : SC_OUT(Ttype_t ) ** out_EXECUTE_LOOP_OUT_TYPE ;//[nb_write_unit] + public : SC_OUT(Tspecial_data_t ) ** out_EXECUTE_LOOP_OUT_FLAGS ;//[nb_write_unit] + public : SC_OUT(Texception_t ) ** out_EXECUTE_LOOP_OUT_EXCEPTION ;//[nb_write_unit] + public : SC_OUT(Tcontrol_t ) ** out_EXECUTE_LOOP_OUT_NO_SEQUENCE ;//[nb_write_unit] + public : SC_OUT(Tgeneral_data_t ) ** out_EXECUTE_LOOP_OUT_ADDRESS ;//[nb_write_unit] + + // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_DCACHE_REQ_VAL ;//[nb_load_store_queue] + public : SC_IN (Tcontrol_t ) ** in_DCACHE_REQ_ACK ;//[nb_load_store_queue] + public : SC_OUT(Tcontext_t ) ** out_DCACHE_REQ_CONTEXT_ID ;//[nb_load_store_queue] + public : SC_OUT(Tpacket_t ) ** out_DCACHE_REQ_PACKET_ID ;//[nb_load_store_queue] + public : SC_OUT(Tdcache_address_t ) ** out_DCACHE_REQ_ADDRESS ;//[nb_load_store_queue] + public : SC_OUT(Tdcache_type_t ) ** out_DCACHE_REQ_TYPE ;//[nb_load_store_queue] + public : SC_OUT(Tdcache_data_t ) ** out_DCACHE_REQ_WDATA ;//[nb_load_store_queue] + + // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_DCACHE_RSP_VAL ;//[nb_load_store_queue] + public : SC_OUT(Tcontrol_t ) ** out_DCACHE_RSP_ACK ;//[nb_load_store_queue] + public : SC_IN (Tcontext_t ) ** in_DCACHE_RSP_CONTEXT_ID ;//[nb_load_store_queue] + public : SC_IN (Tpacket_t ) ** in_DCACHE_RSP_PACKET_ID ;//[nb_load_store_queue] + public : SC_IN (Tdcache_data_t ) ** in_DCACHE_RSP_RDATA ;//[nb_load_store_queue] + public : SC_IN (Tdcache_error_t ) ** in_DCACHE_RSP_ERROR ;//[nb_load_store_queue] + + // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ;//[nb_ooo_engine][nb_inst_insert_rob] + public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ;//[nb_ooo_engine][nb_inst_insert_rob] + public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ;//[nb_ooo_engine][nb_inst_insert_rob] + public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] + public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ;//[nb_ooo_engine][nb_inst_insert_rob] + public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] + + // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_VAL ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_OUT(Tcontrol_t ) *** out_RETIRE_ROB_ACK ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_RD_OLD_USE ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tgeneral_address_t) *** in_RETIRE_ROB_RD_OLD_NUM_REG ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_RD_NEW_USE ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tgeneral_address_t) *** in_RETIRE_ROB_RD_NEW_NUM_REG ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_RE_OLD_USE ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tspecial_address_t) *** in_RETIRE_ROB_RE_OLD_NUM_REG ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_RE_NEW_USE ;//[nb_ooo_engine][nb_inst_retire_rob] + public : SC_IN (Tspecial_address_t) *** in_RETIRE_ROB_RE_NEW_NUM_REG ;//[nb_ooo_engine][nb_inst_retire_rob] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit:: Read_unit ** _component_read_unit ; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit ** _component_functionnal_unit ; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit:: Load_store_unit ** _component_load_store_unit ; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit:: Write_unit ** _component_write_unit ; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit:: Read_unit_to_Execution_unit * _component_read_unit_to_execution_unit ; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit:: Execution_unit_to_Write_unit * _component_execution_unit_to_write_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit:: Register_unit * _component_register_unit ; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Execute_loop); +#endif + public : Execute_loop + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Execute_loop (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif +#endif + +#if VHDL + public : void vhdl (void); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +};//end namespace execute_loop +};//end namespace multi_execute_loop +};//end namespace core + +};//end namespace behavioural +};//end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h (revision 78) @@ -0,0 +1,202 @@ +#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_Parameters_h +#define morpheo_behavioural_core_multi_execute_loop_execute_loop_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + // unit occurence + public : uint32_t _nb_read_unit ; + public : uint32_t _nb_functionnal_unit ; + public : uint32_t _nb_load_store_unit ; + public : uint32_t _nb_write_unit ; + // generic parameters + public : uint32_t _nb_context ; + public : uint32_t _nb_front_end ; + public : uint32_t _nb_ooo_engine ; + public : uint32_t _nb_packet ; + public : uint32_t _size_general_data ; + public : uint32_t _size_special_data ; + // specific parameters + // * read_unit + public : uint32_t * _size_read_queue ; //[nb_read_unit] + public : uint32_t * _size_reservation_station ; //[nb_read_unit] + public : uint32_t * _nb_inst_retire ; //[nb_read_unit] + public : uint32_t * _read_unit_nb_register_write ; //[nb_read_unit] + public : uint32_t * _read_unit_nb_bypass_write ; //[nb_read_unit] + public : uint32_t * _read_unit_nb_bypass_memory ; //[nb_read_unit] + public : bool ** _link_read_unit_with_load_store_unit ; //[nb_read_unit][nb_load_store_unit] + public : bool ** _link_read_unit_with_write_unit ; //[nb_read_unit][nb_write_unit] + public : bool ** _link_read_unit_with_thread ; //[nb_read_unit][nb_thread] + + // * functionnal_unit + public : execute_timing_t *** _timing ; //[nb_execute_unit][nb_type][nb_operation] + public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t); + // * load_store_unit + public : uint32_t * _size_store_queue ; //[nb_load_store_unit] + public : uint32_t * _size_load_queue ; //[nb_load_store_unit] + public : uint32_t * _size_speculative_access_queue ; //[nb_load_store_unit] + public : uint32_t * _nb_port_check ; //[nb_load_store_unit] + public : Tspeculative_load_t * _speculative_load ; //[nb_load_store_unit] + public : uint32_t * _nb_bypass_memory ; //[nb_load_store_unit] + // * write_unit + public : uint32_t * _size_write_queue ; //[nb_write_unit] + public : uint32_t * _size_execute_queue ; //[nb_write_unit] + public : uint32_t * _nb_bypass_write ; //[nb_write_unit] + // * register_unit + public : uint32_t _nb_gpr_read ; + public : uint32_t _nb_gpr_write ; + public : uint32_t _nb_gpr_bank ; + public : uint32_t _nb_gpr_port_read_by_bank ; + public : uint32_t _nb_gpr_port_write_by_bank ; + public : uint32_t _nb_spr_read ; + public : uint32_t _nb_spr_write ; + public : uint32_t _nb_spr_bank ; + public : uint32_t _nb_spr_port_read_by_bank ; + public : uint32_t _nb_spr_port_write_by_bank ; + public : uint32_t * _nb_general_register ; //[nb_ooo_engine] + public : uint32_t * _nb_special_register ; //[nb_ooo_engine] + public : uint32_t * _nb_inst_insert_rob ; //[nb_ooo_engine] + public : uint32_t * _nb_inst_retire_rob ; //[nb_ooo_engine] + // * network + public : Tpriority_t _execution_unit_to_write_unit_priority ; + public : bool ** _execution_unit_to_write_unit_table_routing ; //[nb_execute_unit][nb_write_unit] + public : bool ** _execution_unit_to_write_unit_table_thread ; //[nb_write_unit][nb_thread] + + public : Tpriority_t _read_unit_to_execution_unit_priority ; + public : bool ** _read_unit_to_execution_unit_table_routing ; //[nb_read_unit][nb_execute_unit] + public : bool ** _read_unit_to_execution_unit_table_execute_type; //[nb_execute_unit][nb_type] + public : bool ** _read_unit_to_execution_unit_table_thread ; //[nb_execute_unit][nb_thread] + + public : bool * _is_load_store_unit ; //[nb_execute_unit] + public : uint32_t * _translate_num_execute_unit ; //[nb_execute_unit] + + public : uint32_t _nb_execute_unit ; + + public : uint32_t _size_context_id ; + public : uint32_t _size_front_end_id ; + public : uint32_t _size_ooo_engine_id ; + public : uint32_t _size_packet_id ; + public : bool _have_port_context_id ; + public : bool _have_port_front_end_id ; + public : bool _have_port_ooo_engine_id ; + public : bool _have_port_packet_id ; + public : bool _have_port_load_queue_ptr ; + public : bool _have_port_dcache_context_id ; + + public : uint32_t _max_nb_general_register; + public : uint32_t _max_nb_special_register; + public : uint32_t _max_size_store_queue ; + public : uint32_t _max_size_load_queue ; + + public : uint32_t _size_general_register ; + public : uint32_t _size_special_register ; + + public : uint32_t _max_size_dcache_context_id; + public : uint32_t _max_size_dcache_packet_id ; + + public : std::set * _set_read_unit_source_register_write ; //[nb_read_unit] + public : std::set * _set_read_unit_source_bypass_write ; //[nb_read_unit] + public : std::set * _set_read_unit_source_bypass_memory ; //[nb_read_unit] + + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit:: Parameters ** _param_read_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Parameters ** _param_functionnal_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit:: Parameters ** _param_load_store_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit:: Parameters ** _param_write_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit:: Parameters * _param_read_unit_to_execution_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit:: Parameters * _param_execution_unit_to_write_unit; + public : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit:: Parameters * _param_register_unit; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_read_unit , + uint32_t nb_functionnal_unit , + uint32_t nb_load_store_unit , + uint32_t nb_write_unit , + + uint32_t nb_context , + uint32_t nb_front_end , + uint32_t nb_ooo_engine , + uint32_t nb_packet , + uint32_t size_general_data , + uint32_t size_special_data , + + uint32_t * size_read_queue , + uint32_t * size_reservation_station , + uint32_t * nb_inst_retire , + + execute_timing_t *** timing , + morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t), + + uint32_t * size_store_queue , + uint32_t * size_load_queue , + uint32_t * size_speculative_access_queue , + uint32_t * nb_port_check , + Tspeculative_load_t * speculative_load , + uint32_t * nb_bypass_memory , + + uint32_t * size_write_queue , + uint32_t * size_execute_queue , + uint32_t * nb_bypass_write , + + uint32_t nb_gpr_bank , + uint32_t nb_gpr_port_read_by_bank , + uint32_t nb_gpr_port_write_by_bank , + uint32_t nb_spr_bank , + uint32_t nb_spr_port_read_by_bank , + uint32_t nb_spr_port_write_by_bank , + uint32_t * nb_general_register , + uint32_t * nb_special_register , + uint32_t * nb_inst_insert_rob , + uint32_t * nb_inst_retire_rob , + + Tpriority_t execution_unit_to_write_unit_priority , + bool ** execution_unit_to_write_unit_table_routing , + bool ** execution_unit_to_write_unit_table_thread , + + Tpriority_t read_unit_to_execution_unit_priority , + bool ** read_unit_to_execution_unit_table_routing , + bool ** read_unit_to_execution_unit_table_thread + ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters & x); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Types.h (revision 78) @@ -0,0 +1,30 @@ +#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_Types_h +#define morpheo_behavioural_core_multi_execute_loop_execute_loop_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + typedef morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_timing_t execute_timing_t; + typedef morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Tspeculative_load_t Tspeculative_load_t; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp (revision 78) @@ -0,0 +1,109 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::Execute_loop" + Execute_loop::Execute_loop + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + log_printf(INFO,Execute_loop,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Execute_loop,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Execute_loop,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Execute_loop,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Execute_loop::~Execute_loop" + Execute_loop::~Execute_loop (void) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Execute_loop,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Execute_loop,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp (revision 78) @@ -0,0 +1,1627 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + + +#undef FUNCTION +#define FUNCTION "Execute_loop::allocation" + void Execute_loop::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Execute_loop" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + + // ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("execute_loop_in", IN, EAST, "Operation's Input", _param->_nb_read_unit); + + ALLOC1_VALACK_IN ( in_EXECUTE_LOOP_IN_VAL,VAL); + ALLOC1_VALACK_OUT(out_EXECUTE_LOOP_IN_ACK,ACK); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ,"ooo_engine_id" ,Tcontext_t ,_param->_size_ooo_engine_id); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_max_size_store_queue); + if (_param->_have_port_load_queue_ptr) + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_max_size_load_queue); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RA ,"read_ra" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RB ,"read_rb" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RC ,"read_rc" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register); + } + // ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("execute_loop_out",OUT, EAST, "Operation's Output", _param->_nb_write_unit); + + ALLOC1_VALACK_OUT(out_EXECUTE_LOOP_OUT_VAL,VAL); + ALLOC1_VALACK_IN ( in_EXECUTE_LOOP_OUT_ACK,ACK); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id); +// ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); +// ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_ADDRESS ,"address" ,Tgeneral_data_t,_param->_size_general_data); + } + // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("dcache_req",OUT, NORTH, "Data cache port : request", _param->_nb_load_store_unit); + + ALLOC1_VALACK_OUT(out_DCACHE_REQ_VAL,VAL); + ALLOC1_VALACK_IN ( in_DCACHE_REQ_ACK,ACK); + ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_CONTEXT_ID,"context_id",Tcontext_t ,_param->_max_size_dcache_context_id); + ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_max_size_dcache_packet_id ); + ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_ADDRESS ,"address" ,Tdcache_address_t,_param->_size_general_data); + ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_TYPE ,"type" ,Tdcache_type_t ,_param->_size_dcache_type); + ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_WDATA ,"wdata" ,Tdcache_data_t ,_param->_size_general_data); + } + // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("dcache_rsp",IN, NORTH, "Data cache port : respons", _param->_nb_load_store_unit); + + ALLOC1_VALACK_IN ( in_DCACHE_RSP_VAL,VAL); + ALLOC1_VALACK_OUT(out_DCACHE_RSP_ACK,ACK); + ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_CONTEXT_ID,"context_id",Tcontext_t ,_param->_max_size_dcache_context_id); + ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_max_size_dcache_packet_id); + ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_RDATA ,"rdata" ,Tdcache_data_t ,_param->_size_general_data); + ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_ERROR ,"error" ,Tdcache_error_t,_param->_size_dcache_error); + } + // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC2_INTERFACE("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_interface_it1]); + + _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + + _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]); + } + // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC2_INTERFACE("retire_rob",IN, EAST, "Rename's stage : retire a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_interface_it1]); + + _ALLOC2_VALACK_IN ( in_RETIRE_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_VALACK_OUT(out_RETIRE_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_OLD_USE ,"rd_old_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_OLD_NUM_REG,"rd_old_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_NEW_USE ,"rd_new_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_NEW_NUM_REG,"rd_new_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_OLD_USE ,"re_old_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_OLD_NUM_REG,"re_old_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_NEW_USE ,"re_new_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_NEW_NUM_REG,"re_new_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string name; + + _component_read_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Read_unit * [_param->_nb_read_unit]; + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + { + name = _name+"_read_unit_"+toString(i); + std::cout << "Create : " << name << std::endl; + + _component_read_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Read_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_read_unit[i]); + + _component->set_component (_component_read_unit [i]->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + _component_functionnal_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit * [_param->_nb_functionnal_unit]; + for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++) + { + name = _name+"_functionnal_unit_"+toString(i); + std::cout << "Create : " << name << std::endl; + + _component_functionnal_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_functionnal_unit[i]); + + _component->set_component (_component_functionnal_unit [i]->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + _component_load_store_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit * [_param->_nb_load_store_unit]; + for (uint32_t i=0; i<_param->_nb_load_store_unit; i++) + { + name = _name+"_load_store_unit_"+toString(i); + std::cout << "Create : " << name << std::endl; + + _component_load_store_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_load_store_unit[i]); + + _component->set_component (_component_load_store_unit [i]->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + _component_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Write_unit * [_param->_nb_write_unit]; + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + { + name = _name+"_write_unit_"+toString(i); + std::cout << "Create : " << name << std::endl; + + _component_write_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Write_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_write_unit[i]); + + _component->set_component (_component_write_unit [i]->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_read_unit_to_execution_unit"; + std::cout << "Create : " << name << std::endl; + + _component_read_unit_to_execution_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Read_unit_to_Execution_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_read_unit_to_execution_unit); + + _component->set_component (_component_read_unit_to_execution_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_execution_unit_to_write_unit"; + std::cout << "Create : " << name << std::endl; + + _component_execution_unit_to_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Execution_unit_to_Write_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_execution_unit_to_write_unit); + + _component->set_component (_component_execution_unit_to_write_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_register_unit"; + std::cout << "Create : " << name << std::endl; + + _component_register_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Register_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_register_unit); + + _component->set_component (_component_register_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; + + // =================================================================== + // =====[ READ_UNIT ]================================================= + // =================================================================== + { + uint32_t it_read_unit_out = 0; + + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + { + src = _name+"_read_unit_"+toString(i); + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "read_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"read_unit_in", + dest,"execute_loop_in_"+toString(i)); +#endif + + PORT_MAP(_component ,src , "in_READ_UNIT_IN_VAL" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK" ,dest ,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_READ_UNIT_IN_CONTEXT_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_READ_UNIT_IN_FRONT_END_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_READ_UNIT_IN_OOO_ENGINE_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_READ_UNIT_IN_PACKET_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_PACKET_ID" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_OPERATION" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OPERATION" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_TYPE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE",dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src , "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_HAS_IMMEDIAT" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_IMMEDIAT" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RA" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RA" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RA" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RA" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RB" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RB" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RB" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RB" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RC" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RC" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RC" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RC" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_WRITE_RD" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RD" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_WRITE_RE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RE" ); + } + + // ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t j=0; j < _param->_nb_inst_retire[i]; j++) + { + dest = _name+"_read_unit_to_execution_unit"; + +#ifdef POSITION + _component->interface_map (src ,"read_unit_"+toString(i), + dest,"read_unit_"+toString(it_read_unit_out)); +#endif + + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_VAL" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_VAL" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(i )+"_ACK" , + dest,"out_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_CONTEXT_ID" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_FRONT_END_ID" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_OOO_ENGINE_ID" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_PACKET_ID" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_PACKET_ID" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_OPERATION" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OPERATION" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_TYPE" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_TYPE" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_STORE_QUEUE_PTR_WRITE", + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_LOAD_QUEUE_PTR_WRITE" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_HAS_IMMEDIAT" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_IMMEDIAT" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_IMMEDIAT" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_DATA_RA" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RA" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_DATA_RB" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RB" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_DATA_RC" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RC" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_WRITE_RD" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RD" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_NUM_REG_RD" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_WRITE_RE" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RE" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_NUM_REG_RE" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RE" ); + + it_read_unit_out ++; + } + + // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name+"_register_unit"; +#ifdef POSITION + _component->interface_map (src ,"gpr_read_0", + dest,"gpr_read_"+toString(2*i )); + _component->interface_map (src ,"gpr_read_1", + dest,"gpr_read_"+toString(2*i+1)); +#endif + PORT_MAP(_component ,src ,"out_GPR_READ_0_VAL" , dest, "in_GPR_READ_"+toString(2*i )+"_VAL" ); + PORT_MAP(_component ,src , "in_GPR_READ_0_ACK" , dest,"out_GPR_READ_"+toString(2*i )+"_ACK" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_GPR_READ_0_OOO_ENGINE_ID", dest, "in_GPR_READ_"+toString(2*i )+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src ,"out_GPR_READ_0_NUM_REG" , dest, "in_GPR_READ_"+toString(2*i )+"_NUM_REG" ); + PORT_MAP(_component ,src , "in_GPR_READ_0_DATA" , dest,"out_GPR_READ_"+toString(2*i )+"_DATA" ); + PORT_MAP(_component ,src , "in_GPR_READ_0_DATA_VAL" , dest,"out_GPR_READ_"+toString(2*i )+"_DATA_VAL" ); + PORT_MAP(_component ,src ,"out_GPR_READ_1_VAL" , dest, "in_GPR_READ_"+toString(2*i+1)+"_VAL" ); + PORT_MAP(_component ,src , "in_GPR_READ_1_ACK" , dest,"out_GPR_READ_"+toString(2*i+1)+"_ACK" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_GPR_READ_1_OOO_ENGINE_ID", dest, "in_GPR_READ_"+toString(2*i+1)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src ,"out_GPR_READ_1_NUM_REG" , dest, "in_GPR_READ_"+toString(2*i+1)+"_NUM_REG" ); + PORT_MAP(_component ,src , "in_GPR_READ_1_DATA" , dest,"out_GPR_READ_"+toString(2*i+1)+"_DATA" ); + PORT_MAP(_component ,src , "in_GPR_READ_1_DATA_VAL" , dest,"out_GPR_READ_"+toString(2*i+1)+"_DATA_VAL" ); + } + + // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name+"_register_unit"; +#ifdef POSITION + _component->interface_map (src ,"spr_read_0", + dest,"spr_read_"+toString(2*i )); +#endif + PORT_MAP(_component ,src ,"out_SPR_READ_0_VAL" , dest, "in_SPR_READ_"+toString(2*i )+"_VAL" ); + PORT_MAP(_component ,src , "in_SPR_READ_0_ACK" , dest,"out_SPR_READ_"+toString(2*i )+"_ACK" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_SPR_READ_0_OOO_ENGINE_ID", dest, "in_SPR_READ_"+toString(2*i )+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src ,"out_SPR_READ_0_NUM_REG" , dest, "in_SPR_READ_"+toString(2*i )+"_NUM_REG" ); + PORT_MAP(_component ,src , "in_SPR_READ_0_DATA" , dest,"out_SPR_READ_"+toString(2*i )+"_DATA" ); + PORT_MAP(_component ,src , "in_SPR_READ_0_DATA_VAL" , dest,"out_SPR_READ_"+toString(2*i )+"_DATA_VAL" ); + } + + // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + uint32_t it_gpr_write = 0; + for (std::set::iterator it=_param->_set_read_unit_source_register_write[i].begin(); + it!=_param->_set_read_unit_source_register_write[i].end(); + it++) + { + dest = _name+"_write_unit_"+toString(*it); +#ifdef POSITION + _component->interface_map (src ,"gpr_write_"+toString(it_gpr_write), + dest,"gpr_write"); +#endif + + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_VAL" , + dest,"out_GPR_WRITE_0_VAL" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_OOO_ENGINE_ID", + dest,"out_GPR_WRITE_0_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_NUM_REG" , + dest,"out_GPR_WRITE_0_NUM_REG" ); + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_DATA" , + dest,"out_GPR_WRITE_0_DATA" ); + + // PORT MAP to the "write_unit" component +#ifdef POSITION + _component->interface_map (dest,"gpr_write", + src ,"gpr_write_"+toString(it_gpr_write)); +#endif + + PORT_MAP(_component ,dest,"out_GPR_WRITE_0_VAL" , + src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_VAL" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,dest,"out_GPR_WRITE_0_OOO_ENGINE_ID", + src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,dest,"out_GPR_WRITE_0_NUM_REG" , + src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_NUM_REG" ); + PORT_MAP(_component ,dest,"out_GPR_WRITE_0_DATA" , + src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_DATA" ); + + it_gpr_write ++; + } + + // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + uint32_t it_spr_write = 0; + for (std::set::iterator it=_param->_set_read_unit_source_register_write[i].begin(); + it!=_param->_set_read_unit_source_register_write[i].end(); + it++) + { + dest = _name+"_write_unit_"+toString(*it); +#ifdef POSITION + _component->interface_map (src ,"spr_write_"+toString(it_spr_write), + dest,"spr_write"); +#endif + + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_VAL" , + dest,"out_SPR_WRITE_0_VAL" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_OOO_ENGINE_ID", + dest,"out_SPR_WRITE_0_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_NUM_REG" , + dest,"out_SPR_WRITE_0_NUM_REG" ); + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_DATA" , + dest,"out_SPR_WRITE_0_DATA" ); + + // PORT MAP to the "write_unit" component +#ifdef POSITION + _component->interface_map (dest,"spr_write", + src ,"spr_write_"+toString(it_spr_write)); +#endif + PORT_MAP(_component ,dest,"out_SPR_WRITE_0_VAL" , + src , "in_SPR_WRITE_"+toString(it_spr_write)+"_VAL" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,dest,"out_SPR_WRITE_0_OOO_ENGINE_ID", + src , "in_SPR_WRITE_"+toString(it_spr_write)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,dest,"out_SPR_WRITE_0_NUM_REG" , + src , "in_SPR_WRITE_"+toString(it_spr_write)+"_NUM_REG" ); + PORT_MAP(_component ,dest,"out_SPR_WRITE_0_DATA" , + src , "in_SPR_WRITE_"+toString(it_spr_write)+"_DATA" ); + + it_spr_write ++; + } + + // ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + uint32_t it_bypass_write = 0; + for (std::set::iterator it=_param->_set_read_unit_source_bypass_write[i].begin(); + it!=_param->_set_read_unit_source_bypass_write[i].end(); + it++) + { + dest = _name+"_write_unit_"+toString(*it); + + for (uint32_t j=0; j<_param->_nb_bypass_write[*it]; j++) + { +#ifdef POSITION + _component->interface_map (src ,"bypass_write_"+toString(it_bypass_write), + dest,"bypass_write_"+toString(j)); +#endif + + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_OOO_ENGINE_ID", + dest,"out_BYPASS_WRITE_"+toString(j )+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_VAL" , + dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_VAL" ); + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_NUM_REG" , + dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_NUM_REG" ); + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_DATA" , + dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_DATA" ); + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_VAL" , + dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_VAL" ); + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_NUM_REG" , + dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_NUM_REG" ); + PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_DATA" , + dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_DATA" ); + +#ifdef POSITION + _component->interface_map (dest,"bypass_write_"+toString(j), + src ,"bypass_write_"+toString(it_bypass_write)); +#endif + + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_OOO_ENGINE_ID", + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_VAL" , + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_VAL" ); + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_NUM_REG" , + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_NUM_REG" ); + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_DATA" , + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_DATA" ); + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_VAL" , + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_VAL" ); + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_NUM_REG" , + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_NUM_REG" ); + PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_DATA" , + src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_DATA" ); + + it_bypass_write ++; + } + } + + // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + uint32_t it_bypass_memory = 0; + for (std::set::iterator it=_param->_set_read_unit_source_bypass_memory[i].begin(); + it!=_param->_set_read_unit_source_bypass_memory[i].end(); + it++) + { + dest = _name+"_load_store_unit_"+toString(_param->_translate_num_execute_unit[*it]); + + for (uint32_t j=0; j<_param->_nb_bypass_memory[_param->_translate_num_execute_unit[*it]]; j++) + { +#ifdef POSITION + _component->interface_map (src ,"bypass_memory_"+toString(it_bypass_memory), + dest,"bypass_memory_"+toString(j)); +#endif + + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_OOO_ENGINE_ID", + dest,"out_BYPASS_MEMORY_"+toString(j )+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_VAL" , + dest,"out_BYPASS_MEMORY_"+toString(j )+"_VAL" ); + PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_NUM_REG" , + dest,"out_BYPASS_MEMORY_"+toString(j )+"_NUM_REG" ); + PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_DATA" , + dest,"out_BYPASS_MEMORY_"+toString(j )+"_DATA" ); + + // port map to the "load_store_unit" component +#ifdef POSITION + _component->interface_map (dest,"bypass_memory_"+toString(j), + src ,"bypass_memory_"+toString(it_bypass_memory)); +#endif + + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_OOO_ENGINE_ID", + src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_VAL" , + src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_VAL" ); + PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_NUM_REG" , + src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_NUM_REG" ); + PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_DATA" , + src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_DATA" ); + + it_bypass_memory ++; + } + } + } + } + + // =================================================================== + // =====[ EXECUTE_UNIT ]============================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_execute_unit; i++) + { + uint32_t x=_param->_translate_num_execute_unit[i]; + + if (_param->_is_load_store_unit[i] == false) + { + // =================================================================== + // =====[ FUNCTIONNAL_UNIT ]========================================== + // =================================================================== + + src = _name+"_functionnal_unit_"+toString(x); + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "execute_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name+"_read_unit_to_execution_unit"; + +#ifdef POSITION + _component->interface_map (src ,"execute_in", + dest,"execute_unit_in_"+toString(i)); +#endif + + PORT_MAP(_component ,src , "in_EXECUTE_IN_VAL" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src ,"out_EXECUTE_IN_ACK" , + dest, "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_EXECUTE_IN_CONTEXT_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_EXECUTE_IN_FRONT_END_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_EXECUTE_IN_OOO_ENGINE_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_EXECUTE_IN_PACKET_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_OPERATION" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_TYPE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE", + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src , "in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_HAS_IMMEDIAT" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_IMMEDIAT" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RA" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RB" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RC" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_WRITE_RD" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_NUM_REG_RD" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_WRITE_RE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_IN_NUM_REG_RE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" ); + } + + // ~~~~~[ Interface "execute_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name+"_execution_unit_to_write_unit"; + +#ifdef POSITION + _component->interface_map (src ,"execute_out", + dest,"execute_unit_out_"+toString(i)); +#endif + + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_VAL" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src , "in_EXECUTE_OUT_ACK" , + dest,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_CONTEXT_ID" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_FRONT_END_ID" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_OOO_ENGINE_ID", + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_PACKET_ID" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" ); +// PORT_MAP(_component ,src ,"out_EXECUTE_OUT_OPERATION" , +// dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_TYPE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RD" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NUM_REG_RD" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_DATA_RD" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NUM_REG_RE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_DATA_RE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_EXCEPTION" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NO_SEQUENCE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_OUT_ADDRESS" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" ); + } + } + else + { + // =================================================================== + // =====[ LOAD_STORE_UNIT ]=========================================== + // =================================================================== + + src = _name+"_load_store_unit_"+toString(x); + std::cout << "Instance : " << src << std::endl; + + // ~~~~~[ Interface "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name+"_read_unit_to_execution_unit"; + +#ifdef POSITION + _component->interface_map (src ,"memory_in", + dest,"execute_unit_in_"+toString(i)); +#endif + + PORT_MAP(_component ,src , "in_MEMORY_IN_VAL" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src ,"out_MEMORY_IN_ACK" , + dest, "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_MEMORY_IN_CONTEXT_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_MEMORY_IN_FRONT_END_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_MEMORY_IN_OOO_ENGINE_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_MEMORY_IN_PACKET_ID" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_OPERATION" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_TYPE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_STORE_QUEUE_PTR_WRITE", + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src , "in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_HAS_IMMEDIAT" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_IMMEDIAT" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RA" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RB" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RC" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_WRITE_RD" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_NUM_REG_RD" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_WRITE_RE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src , "in_MEMORY_IN_NUM_REG_RE" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" ); + } + + // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name+"_execution_unit_to_write_unit"; + +#ifdef POSITION + _component->interface_map (src ,"memory_out", + dest,"execute_unit_out_"+toString(i)); +#endif + + PORT_MAP(_component ,src ,"out_MEMORY_OUT_VAL" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src , "in_MEMORY_OUT_ACK" , + dest,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_MEMORY_OUT_CONTEXT_ID" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_MEMORY_OUT_FRONT_END_ID" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_MEMORY_OUT_OOO_ENGINE_ID", + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_MEMORY_OUT_PACKET_ID" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" ); +// PORT_MAP(_component ,src ,"out_MEMORY_OUT_OPERATION" , +// dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_TYPE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_WRITE_RD" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_NUM_REG_RD" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_DATA_RD" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_WRITE_RE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_NUM_REG_RE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_DATA_RE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_EXCEPTION" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_NO_SEQUENCE" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" ); + PORT_MAP(_component ,src ,"out_MEMORY_OUT_ADDRESS" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" ); + } + + // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"dcache_req", + dest,"dcache_req_"+toString(i)); +#endif + PORT_MAP(_component ,src ,"out_DCACHE_REQ_VAL" ,dest,"out_DCACHE_REQ_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src , "in_DCACHE_REQ_ACK" ,dest, "in_DCACHE_REQ_"+toString(i)+"_ACK" ); + if (_param->_have_port_dcache_context_id) + PORT_MAP(_component ,src ,"out_DCACHE_REQ_CONTEXT_ID",dest,"out_DCACHE_REQ_"+toString(i)+"_CONTEXT_ID"); + PORT_MAP(_component ,src ,"out_DCACHE_REQ_PACKET_ID" ,dest,"out_DCACHE_REQ_"+toString(i)+"_PACKET_ID" ); + PORT_MAP(_component ,src ,"out_DCACHE_REQ_ADDRESS" ,dest,"out_DCACHE_REQ_"+toString(i)+"_ADDRESS" ); + PORT_MAP(_component ,src ,"out_DCACHE_REQ_TYPE" ,dest,"out_DCACHE_REQ_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src ,"out_DCACHE_REQ_WDATA" ,dest,"out_DCACHE_REQ_"+toString(i)+"_WDATA" ); + } + + // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"dcache_rsp", + dest,"dcache_rsp_"+toString(i)); +#endif + PORT_MAP(_component ,src , "in_DCACHE_RSP_VAL" ,dest, "in_DCACHE_RSP_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src ,"out_DCACHE_RSP_ACK" ,dest,"out_DCACHE_RSP_"+toString(i)+"_ACK" ); + if (_param->_have_port_dcache_context_id) + PORT_MAP(_component ,src , "in_DCACHE_RSP_CONTEXT_ID",dest, "in_DCACHE_RSP_"+toString(i)+"_CONTEXT_ID"); + PORT_MAP(_component ,src , "in_DCACHE_RSP_PACKET_ID" ,dest, "in_DCACHE_RSP_"+toString(i)+"_PACKET_ID" ); + PORT_MAP(_component ,src , "in_DCACHE_RSP_RDATA" ,dest, "in_DCACHE_RSP_"+toString(i)+"_RDATA" ); + PORT_MAP(_component ,src , "in_DCACHE_RSP_ERROR" ,dest, "in_DCACHE_RSP_"+toString(i)+"_ERROR" ); + } + + // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + // Port map with "read_unit" is ok! + } + } + } + + // =================================================================== + // =====[ WRITE_UNIT ]================================================ + // =================================================================== + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + { + src = _name+"_write_unit_"+toString(i); + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // -----[ Interface "write_unit_in" ]--------------------------------- + { + dest = _name+"_execution_unit_to_write_unit"; +#ifdef POSITION + _component->interface_map (src ,"write_unit_in", + dest,"execute_unit_in_"+toString(i)); +#endif + + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_VAL" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_ACK" , + dest, "in_WRITE_UNIT_IN_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_CONTEXT_ID" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_FRONT_END_ID" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_OOO_ENGINE_ID", + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_PACKET_ID" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_PACKET_ID" ); +// PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_OPERATION" , +// dest,"out_WRITE_UNIT_IN_"+toString(i)+"_OPERATION" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_TYPE" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RD" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NUM_REG_RD" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_DATA_RD" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RD" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RE" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NUM_REG_RE" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_DATA_RE" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RE" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_EXCEPTION" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_EXCEPTION" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NO_SEQUENCE" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NO_SEQUENCE" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_ADDRESS" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_ADDRESS" ); + } + + // -----[ Interface "write_unit_out" ]-------------------------------- + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"write_unit_out", + dest,"execute_loop_out_"+toString(i)); +#endif + + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_VAL" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_OUT_ACK" , + dest, "in_EXECUTE_LOOP_OUT_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_CONTEXT_ID" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FRONT_END_ID" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_OOO_ENGINE_ID", + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_PACKET_ID" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_PACKET_ID" ); +// PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_OPERATION" , +// dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_OPERATION" ); +// PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_TYPE" , +// dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FLAGS" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FLAGS" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_EXCEPTION" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_EXCEPTION" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_NO_SEQUENCE" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_NO_SEQUENCE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_ADDRESS" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_ADDRESS" ); + } + // -----[ Interface "gpr_write" ]------------------------------------- + { + // Port map with "read_unit" is ok! + + dest = _name+"_register_unit"; +#ifdef POSITION + _component->interface_map (src ,"gpr_write", + dest,"gpr_write_"+toString(i)); +#endif + + PORT_MAP(_component ,src ,"out_GPR_WRITE_0_VAL" , + dest, "in_GPR_WRITE_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src , "in_GPR_WRITE_0_ACK" , + dest,"out_GPR_WRITE_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_GPR_WRITE_0_OOO_ENGINE_ID", + dest, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src ,"out_GPR_WRITE_0_NUM_REG" , + dest, "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ); + PORT_MAP(_component ,src ,"out_GPR_WRITE_0_DATA" , + dest, "in_GPR_WRITE_"+toString(i)+"_DATA" ); + } + + // -----[ Interface "spr_write" ]------------------------------------- + { + // Port map with "read_unit" is ok! + + dest = _name+"_register_unit"; +#ifdef POSITION + _component->interface_map (src ,"spr_write", + dest,"spr_write_"+toString(i)); +#endif + + PORT_MAP(_component ,src ,"out_SPR_WRITE_0_VAL" , + dest, "in_SPR_WRITE_"+toString(i)+"_VAL" ); + PORT_MAP(_component ,src , "in_SPR_WRITE_0_ACK" , + dest,"out_SPR_WRITE_"+toString(i)+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_SPR_WRITE_0_OOO_ENGINE_ID", + dest, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src ,"out_SPR_WRITE_0_NUM_REG" , + dest, "in_SPR_WRITE_"+toString(i)+"_NUM_REG" ); + PORT_MAP(_component ,src ,"out_SPR_WRITE_0_DATA" , + dest, "in_SPR_WRITE_"+toString(i)+"_DATA" ); + } + + // -----[ Interface "bypass_write" ]---------------------------------- + { + // Port map with "read_unit" is ok! + } + } + + // =================================================================== + // =====[ REGISTER_UNIT ]============================================= + // =================================================================== + { + src = _name+"_register_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + { + dest = _name+"_read_unit_"+toString(i); +#ifdef POSITION + _component->interface_map (src ,"gpr_read_"+toString(2*i ) + dest,"gpr_read_0"); + _component->interface_map (src ,"gpr_read_"+toString(2*i+1) + dest,"gpr_read_1"); +#endif + + PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i )+"_VAL" ,dest,"out_GPR_READ_0_VAL" ); + PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i )+"_ACK" ,dest, "in_GPR_READ_0_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i )+"_OOO_ENGINE_ID",dest,"out_GPR_READ_0_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i )+"_NUM_REG" ,dest,"out_GPR_READ_0_NUM_REG" ); + PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i )+"_DATA" ,dest, "in_GPR_READ_0_DATA" ); + PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i )+"_DATA_VAL" ,dest, "in_GPR_READ_0_DATA_VAL" ); + + PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_VAL" ,dest,"out_GPR_READ_1_VAL" ); + PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_ACK" ,dest, "in_GPR_READ_1_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_OOO_ENGINE_ID",dest,"out_GPR_READ_1_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_NUM_REG" ,dest,"out_GPR_READ_1_NUM_REG" ); + PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_DATA" ,dest, "in_GPR_READ_1_DATA" ); + PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_DATA_VAL" ,dest, "in_GPR_READ_1_DATA_VAL" ); + } + + // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + { + dest = _name+"_write_unit_"+toString(i); +#ifdef POSITION + _component->interface_map (src ,"gpr_write_"+toString(i) + dest,"gpr_write_0"); +#endif + + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL" ,dest,"out_GPR_WRITE_0_VAL" ); + PORT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK" ,dest, "in_GPR_WRITE_0_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_GPR_WRITE_0_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ,dest,"out_GPR_WRITE_0_NUM_REG" ); + PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_GPR_WRITE_0_DATA" ); + } + + // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + { + dest = _name+"_read_unit_"+toString(i); +#ifdef POSITION + _component->interface_map (src ,"spr_read_"+toString(i), + dest,"spr_read_0"); +#endif + + PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_VAL" ,dest,"out_SPR_READ_0_VAL" ); + PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_ACK" ,dest, "in_SPR_READ_0_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_READ_0_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_NUM_REG" ,dest,"out_SPR_READ_0_NUM_REG" ); + PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_DATA" ,dest, "in_SPR_READ_0_DATA" ); + PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_DATA_VAL" ,dest, "in_SPR_READ_0_DATA_VAL" ); + } + + // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + { + dest = _name+"_write_unit_"+toString(i); +#ifdef POSITION + _component->interface_map (src ,"spr_write_"+toString(i) + dest,"spr_write_0"); +#endif + + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_VAL" ,dest,"out_SPR_WRITE_0_VAL" ); + PORT_MAP(_component ,src ,"out_SPR_WRITE_"+toString(i)+"_ACK" ,dest, "in_SPR_WRITE_0_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_WRITE_0_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_NUM_REG" ,dest,"out_SPR_WRITE_0_NUM_REG" ); + PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_SPR_WRITE_0_DATA" ); + } + + // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) + { + uint32_t x=_param->_nb_inst_insert_rob [i]; + + for (uint32_t j=0; jinterface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), + dest,"insert_rob_"+toString(i)+"_"+toString(j)); +#endif + + PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" , + dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ); + PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" , + dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ); + PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" , + dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" ); + PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG", + dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); + PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" , + dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" ); + PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG", + dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); + } + } + + // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) + { + uint32_t x=_param->_nb_inst_retire_rob [i]; + + for (uint32_t j=0; jinterface_map (src ,"retire_rob_"+toString(i)+"_"+toString(j), + dest,"retire_rob_"+toString(i)+"_"+toString(j)); +#endif + + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL" , + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ); + PORT_MAP(_component ,src ,"out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK" , + dest,"out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE" , + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE" ); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_NUM_REG", + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_NUM_REG"); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE" , + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE" ); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_NUM_REG", + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_NUM_REG"); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE" , + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE" ); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_NUM_REG", + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_NUM_REG"); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE" , + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE" ); + PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_NUM_REG", + dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_NUM_REG"); + } + } + } + + // =================================================================== + // =====[ READ_UNIT_TO_EXECUTION_UNIT ]=============================== + // =================================================================== + { + src = _name+"_read_unit_to_execution_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + uint32_t it_read_unit_out =0; + for (uint32_t i=0; i < _param->_nb_read_unit; i++) + for (uint32_t j=0; j < _param->_nb_inst_retire[i]; j++) + { + dest = _name+"_read_unit_"+toString(i); + +#ifdef POSITION + _component->interface_map (src ,"read_unit_"+toString(it_read_unit_out), + dest,"read_unit_"+toString(j)); +#endif + + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_VAL" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_VAL" ); + PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_ACK" , + dest, "in_READ_UNIT_OUT_"+toString(j )+"_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_CONTEXT_ID" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_FRONT_END_ID" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OOO_ENGINE_ID" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_PACKET_ID" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_PACKET_ID" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OPERATION" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_OPERATION" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_TYPE" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_TYPE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_STORE_QUEUE_PTR_WRITE", + dest,"out_READ_UNIT_OUT_"+toString(j )+"_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_LOAD_QUEUE_PTR_WRITE" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_HAS_IMMEDIAT" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_IMMEDIAT" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_IMMEDIAT" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RA" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_DATA_RA" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RB" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_DATA_RB" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RC" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_DATA_RC" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RD" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_WRITE_RD" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RD" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RE" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_WRITE_RE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RE" , + dest,"out_READ_UNIT_OUT_"+toString(j )+"_NUM_REG_RE" ); + + it_read_unit_out ++; + } + + // ~~~~~[ Interface "execute_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_execute_unit; i++) + { + uint32_t x=_param->_translate_num_execute_unit[i]; + + if (_param->_is_load_store_unit[i] == false) + { + dest = _name+"_functionnal_unit_"+toString(x); + +#ifdef POSITION + _component->interface_map (src ,"execute_unit_in_"+toString(i), + dest,"execute_in"); +#endif + + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" , + dest, "in_EXECUTE_IN_VAL" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" , + dest,"out_EXECUTE_IN_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" , + dest, "in_EXECUTE_IN_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" , + dest, "in_EXECUTE_IN_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" , + dest, "in_EXECUTE_IN_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" , + dest, "in_EXECUTE_IN_PACKET_ID" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" , + dest, "in_EXECUTE_IN_OPERATION" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" , + dest, "in_EXECUTE_IN_TYPE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE", + dest, "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" , + dest, "in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" , + dest, "in_EXECUTE_IN_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" , + dest, "in_EXECUTE_IN_IMMEDIAT" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" , + dest, "in_EXECUTE_IN_DATA_RA" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" , + dest, "in_EXECUTE_IN_DATA_RB" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" , + dest, "in_EXECUTE_IN_DATA_RC" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" , + dest, "in_EXECUTE_IN_WRITE_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" , + dest, "in_EXECUTE_IN_NUM_REG_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" , + dest, "in_EXECUTE_IN_WRITE_RE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" , + dest, "in_EXECUTE_IN_NUM_REG_RE" ); + } + else + { + dest = _name+"_load_store_unit_"+toString(x); + +#ifdef POSITION + _component->interface_map (src ,"execute_unit_in_"+toString(i), + dest,"memory_in"); +#endif + + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" , + dest, "in_MEMORY_IN_VAL" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" , + dest,"out_MEMORY_IN_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" , + dest, "in_MEMORY_IN_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" , + dest, "in_MEMORY_IN_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" , + dest, "in_MEMORY_IN_OOO_ENGINE_ID" ); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" , + dest, "in_MEMORY_IN_PACKET_ID" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" , + dest, "in_MEMORY_IN_OPERATION" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" , + dest, "in_MEMORY_IN_TYPE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE", + dest, "in_MEMORY_IN_STORE_QUEUE_PTR_WRITE"); + if (_param->_have_port_load_queue_ptr) + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" , + dest, "in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" , + dest, "in_MEMORY_IN_HAS_IMMEDIAT" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" , + dest, "in_MEMORY_IN_IMMEDIAT" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" , + dest, "in_MEMORY_IN_DATA_RA" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" , + dest, "in_MEMORY_IN_DATA_RB" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" , + dest, "in_MEMORY_IN_DATA_RC" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" , + dest, "in_MEMORY_IN_WRITE_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" , + dest, "in_MEMORY_IN_NUM_REG_RD" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" , + dest, "in_MEMORY_IN_WRITE_RE" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" , + dest, "in_MEMORY_IN_NUM_REG_RE" ); + } + } + } + + // =================================================================== + // =====[ EXECUTION_UNIT_TO_WRITE_UNIT ]============================== + // =================================================================== + { + src = _name+"_execution_unit_to_write_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "execute_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_execute_unit; i++) + { + uint32_t x=_param->_translate_num_execute_unit[i]; + + if (_param->_is_load_store_unit[i] == false) + { + dest = _name+"_functionnal_unit_"+toString(x); + +#ifdef POSITION + _component->interface_map (src ,"execute_unit_out_"+toString(i), + dest,"execute_out"); +#endif + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" , + dest,"out_EXECUTE_OUT_VAL" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" , + dest, "in_EXECUTE_OUT_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" , + dest,"out_EXECUTE_OUT_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" , + dest,"out_EXECUTE_OUT_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID", + dest,"out_EXECUTE_OUT_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" , + dest,"out_EXECUTE_OUT_PACKET_ID" ); +// PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" , +// dest,"out_EXECUTE_OUT_OPERATION" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" , + dest,"out_EXECUTE_OUT_TYPE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" , + dest,"out_EXECUTE_OUT_WRITE_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" , + dest,"out_EXECUTE_OUT_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" , + dest,"out_EXECUTE_OUT_DATA_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" , + dest,"out_EXECUTE_OUT_WRITE_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" , + dest,"out_EXECUTE_OUT_NUM_REG_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" , + dest,"out_EXECUTE_OUT_DATA_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" , + dest,"out_EXECUTE_OUT_EXCEPTION" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" , + dest,"out_EXECUTE_OUT_NO_SEQUENCE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" , + dest,"out_EXECUTE_OUT_ADDRESS" ); + } + else + { + dest = _name+"_load_store_unit_"+toString(x); + +#ifdef POSITION + _component->interface_map (src ,"execute_unit_out_"+toString(i), + dest,"memory_out"); +#endif + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" , + dest,"out_MEMORY_OUT_VAL" ); + PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" , + dest, "in_MEMORY_OUT_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" , + dest,"out_MEMORY_OUT_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" , + dest,"out_MEMORY_OUT_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID", + dest,"out_MEMORY_OUT_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" , + dest,"out_MEMORY_OUT_PACKET_ID" ); +// PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" , +// dest,"out_MEMORY_OUT_OPERATION" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" , + dest,"out_MEMORY_OUT_TYPE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" , + dest,"out_MEMORY_OUT_WRITE_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" , + dest,"out_MEMORY_OUT_NUM_REG_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" , + dest,"out_MEMORY_OUT_DATA_RD" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" , + dest,"out_MEMORY_OUT_WRITE_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" , + dest,"out_MEMORY_OUT_NUM_REG_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" , + dest,"out_MEMORY_OUT_DATA_RE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" , + dest,"out_MEMORY_OUT_EXCEPTION" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" , + dest,"out_MEMORY_OUT_NO_SEQUENCE" ); + PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" , + dest,"out_MEMORY_OUT_ADDRESS" ); + } + } + + // ~~~~~[ Interface "write_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + { + dest = _name+"_write_unit_"+toString(i); + +#ifdef POSITION + _component->interface_map (src ,"write_unit_out_"+toString(i), + dest,"write_out"); +#endif + + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_VAL" , + dest, "in_WRITE_UNIT_IN_VAL" ); + PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_"+toString(i)+"_ACK" , + dest,"out_WRITE_UNIT_IN_ACK" ); + if (_param->_have_port_context_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" , + dest, "in_WRITE_UNIT_IN_CONTEXT_ID" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" , + dest, "in_WRITE_UNIT_IN_FRONT_END_ID" ); + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID", + dest, "in_WRITE_UNIT_IN_OOO_ENGINE_ID"); + if (_param->_have_port_packet_id) + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_PACKET_ID" , + dest, "in_WRITE_UNIT_IN_PACKET_ID" ); +// PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_OPERATION" , +// dest, "in_WRITE_UNIT_IN_OPERATION" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE" , + dest, "in_WRITE_UNIT_IN_TYPE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD" , + dest, "in_WRITE_UNIT_IN_WRITE_RD" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" , + dest, "in_WRITE_UNIT_IN_NUM_REG_RD" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RD" , + dest, "in_WRITE_UNIT_IN_DATA_RD" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RE" , + dest, "in_WRITE_UNIT_IN_WRITE_RE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" , + dest, "in_WRITE_UNIT_IN_NUM_REG_RE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RE" , + dest, "in_WRITE_UNIT_IN_DATA_RE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_EXCEPTION" , + dest, "in_WRITE_UNIT_IN_EXCEPTION" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NO_SEQUENCE" , + dest, "in_WRITE_UNIT_IN_NO_SEQUENCE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_ADDRESS" , + dest, "in_WRITE_UNIT_IN_ADDRESS" ); + } + } + + _component->test_map(); + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + _component_read_unit [i]->_component->test_map(); + for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++) + _component_functionnal_unit [i]->_component->test_map(); + for (uint32_t i=0; i<_param->_nb_load_store_unit; i++) + _component_load_store_unit [i]->_component->test_map(); + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + _component_write_unit [i]->_component->test_map(); + _component_read_unit_to_execution_unit->_component->test_map(); + _component_execution_unit_to_write_unit->_component->test_map(); + _component_register_unit->_component->test_map(); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp (revision 78) @@ -0,0 +1,133 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::deallocation" + void Execute_loop::deallocation (void) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + // ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_EXECUTE_LOOP_IN_VAL ; + delete [] out_EXECUTE_LOOP_IN_ACK ; + if (_param->_have_port_context_id) + delete [] in_EXECUTE_LOOP_IN_CONTEXT_ID ; + if (_param->_have_port_front_end_id) + delete [] in_EXECUTE_LOOP_IN_FRONT_END_ID ; + if (_param->_have_port_ooo_engine_id) + delete [] in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ; + if (_param->_have_port_packet_id) + delete [] in_EXECUTE_LOOP_IN_PACKET_ID ; + delete [] in_EXECUTE_LOOP_IN_OPERATION ; + delete [] in_EXECUTE_LOOP_IN_TYPE ; + delete [] in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) + delete [] in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ; + delete [] in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ; + delete [] in_EXECUTE_LOOP_IN_IMMEDIAT ; + delete [] in_EXECUTE_LOOP_IN_READ_RA ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RA ; + delete [] in_EXECUTE_LOOP_IN_READ_RB ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RB ; + delete [] in_EXECUTE_LOOP_IN_READ_RC ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RC ; + delete [] in_EXECUTE_LOOP_IN_WRITE_RD ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RD ; + delete [] in_EXECUTE_LOOP_IN_WRITE_RE ; + delete [] in_EXECUTE_LOOP_IN_NUM_REG_RE ; + + // ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] out_EXECUTE_LOOP_OUT_VAL ; + delete [] in_EXECUTE_LOOP_OUT_ACK ; + if (_param->_have_port_context_id) + delete [] out_EXECUTE_LOOP_OUT_CONTEXT_ID ; + if (_param->_have_port_front_end_id) + delete [] out_EXECUTE_LOOP_OUT_FRONT_END_ID ; + if (_param->_have_port_ooo_engine_id) + delete [] out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID ; + if (_param->_have_port_packet_id) + delete [] out_EXECUTE_LOOP_OUT_PACKET_ID ; + //delete [] out_EXECUTE_LOOP_OUT_OPERATION ; + //delete [] out_EXECUTE_LOOP_OUT_TYPE ; + delete [] out_EXECUTE_LOOP_OUT_FLAGS ; + delete [] out_EXECUTE_LOOP_OUT_EXCEPTION ; + delete [] out_EXECUTE_LOOP_OUT_NO_SEQUENCE ; + delete [] out_EXECUTE_LOOP_OUT_ADDRESS ; + + // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] out_DCACHE_REQ_VAL ; + delete [] in_DCACHE_REQ_ACK ; + if (_param->_have_port_dcache_context_id) + delete [] out_DCACHE_REQ_CONTEXT_ID ; + delete [] out_DCACHE_REQ_PACKET_ID ; + delete [] out_DCACHE_REQ_ADDRESS ; + delete [] out_DCACHE_REQ_TYPE ; + delete [] out_DCACHE_REQ_WDATA ; + + // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_DCACHE_RSP_VAL ; + delete [] out_DCACHE_RSP_ACK ; + if (_param->_have_port_dcache_context_id) + delete [] in_DCACHE_RSP_CONTEXT_ID ; + delete [] in_DCACHE_RSP_PACKET_ID ; + delete [] in_DCACHE_RSP_RDATA ; + delete [] in_DCACHE_RSP_ERROR ; + + // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_INSERT_ROB_VAL ; + delete [] out_INSERT_ROB_ACK ; + delete [] in_INSERT_ROB_RD_USE ; + delete [] in_INSERT_ROB_RD_NUM_REG ; + delete [] in_INSERT_ROB_RE_USE ; + delete [] in_INSERT_ROB_RE_NUM_REG ; + + // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_RETIRE_ROB_VAL ; + delete [] out_RETIRE_ROB_ACK ; + delete [] in_RETIRE_ROB_RD_OLD_USE ; + delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ; + delete [] in_RETIRE_ROB_RD_NEW_USE ; + delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ; + delete [] in_RETIRE_ROB_RE_OLD_USE ; + delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ; + delete [] in_RETIRE_ROB_RE_NEW_USE ; + delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ; + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete _component; + delete [] _component_read_unit ; + delete [] _component_functionnal_unit ; + delete [] _component_load_store_unit ; + delete [] _component_write_unit ; + delete [] _component_read_unit_to_execution_unit ; + delete [] _component_execution_unit_to_write_unit; + delete [] _component_register_unit ; + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_end_cycle.cpp (revision 78) @@ -0,0 +1,43 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::end_cycle" +void Execute_loop::end_cycle () + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_statistics_declaration.cpp (revision 78) @@ -0,0 +1,49 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::statistics_declaration" + void Execute_loop::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Execute_loop", + param_statistics); + + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + _stat->add_stat(_component_read_unit [i]->_stat); + for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++) + _stat->add_stat(_component_functionnal_unit [i]->_stat); + for (uint32_t i=0; i<_param->_nb_load_store_unit; i++) + _stat->add_stat(_component_load_store_unit [i]->_stat); + for (uint32_t i=0; i<_param->_nb_write_unit; i++) + _stat->add_stat(_component_write_unit [i]->_stat); + _stat->add_stat(_component_read_unit_to_execution_unit ->_stat); + _stat->add_stat(_component_execution_unit_to_write_unit->_stat); + _stat->add_stat(_component_register_unit ->_stat); + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_transition.cpp (revision 78) @@ -0,0 +1,39 @@ +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::transition" + void Execute_loop::transition (void) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_vhdl.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::vhdl" + void Execute_loop::vhdl (void) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp (revision 78) @@ -0,0 +1,546 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::Parameters" + Parameters::Parameters (uint32_t nb_read_unit , + uint32_t nb_functionnal_unit , + uint32_t nb_load_store_unit , + uint32_t nb_write_unit , + + uint32_t nb_context , + uint32_t nb_front_end , + uint32_t nb_ooo_engine , + uint32_t nb_packet , + uint32_t size_general_data , + uint32_t size_special_data , + + uint32_t * size_read_queue , + uint32_t * size_reservation_station , + uint32_t * nb_inst_retire , + + execute_timing_t *** timing , + morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t), + + uint32_t * size_store_queue , + uint32_t * size_load_queue , + uint32_t * size_speculative_access_queue , + uint32_t * nb_port_check , + Tspeculative_load_t * speculative_load , + uint32_t * nb_bypass_memory , + + uint32_t * size_write_queue , + uint32_t * size_execute_queue , + uint32_t * nb_bypass_write , + + uint32_t nb_gpr_bank , + uint32_t nb_gpr_port_read_by_bank , + uint32_t nb_gpr_port_write_by_bank , + uint32_t nb_spr_bank , + uint32_t nb_spr_port_read_by_bank , + uint32_t nb_spr_port_write_by_bank , + uint32_t * nb_general_register , + uint32_t * nb_special_register , + uint32_t * nb_inst_insert_rob , + uint32_t * nb_inst_retire_rob , + + Tpriority_t execution_unit_to_write_unit_priority , + bool ** execution_unit_to_write_unit_table_routing, + bool ** execution_unit_to_write_unit_table_thread , + + Tpriority_t read_unit_to_execution_unit_priority , + bool ** read_unit_to_execution_unit_table_routing , + bool ** read_unit_to_execution_unit_table_thread + ) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + _nb_read_unit = nb_read_unit ; + _nb_functionnal_unit = nb_functionnal_unit ; + _nb_load_store_unit = nb_load_store_unit ; + _nb_write_unit = nb_write_unit ; + + _nb_context = nb_context ; + _nb_front_end = nb_front_end ; + _nb_ooo_engine = nb_ooo_engine ; + _nb_packet = nb_packet ; + _size_general_data = size_general_data ; + _size_special_data = size_special_data ; + + _size_read_queue = size_read_queue ; + _size_reservation_station = size_reservation_station ; + _nb_inst_retire = nb_inst_retire ; + + _timing = timing ; + _get_custom_information = get_custom_information ; + + _size_store_queue = size_store_queue ; + _size_load_queue = size_load_queue ; + _size_speculative_access_queue = size_speculative_access_queue ; + _nb_port_check = nb_port_check ; + _speculative_load = speculative_load ; + _nb_bypass_memory = nb_bypass_memory ; + + _size_write_queue = size_write_queue ; + _size_execute_queue = size_execute_queue ; + _nb_bypass_write = nb_bypass_write ; + + _nb_gpr_bank = nb_gpr_bank ; + _nb_gpr_port_read_by_bank = nb_gpr_port_read_by_bank ; + _nb_gpr_port_write_by_bank = nb_gpr_port_write_by_bank ; + _nb_spr_bank = nb_spr_bank ; + _nb_spr_port_read_by_bank = nb_spr_port_read_by_bank ; + _nb_spr_port_write_by_bank = nb_spr_port_write_by_bank ; + _nb_general_register = nb_general_register ; + _nb_special_register = nb_special_register ; + _nb_inst_insert_rob = nb_inst_insert_rob ; + _nb_inst_retire_rob = nb_inst_retire_rob ; + + _execution_unit_to_write_unit_priority = execution_unit_to_write_unit_priority; + _execution_unit_to_write_unit_table_routing = execution_unit_to_write_unit_table_routing; + _execution_unit_to_write_unit_table_thread = execution_unit_to_write_unit_table_thread ; + + _read_unit_to_execution_unit_priority = read_unit_to_execution_unit_priority ; + _read_unit_to_execution_unit_table_routing = read_unit_to_execution_unit_table_routing ; + _read_unit_to_execution_unit_table_thread = read_unit_to_execution_unit_table_thread ; + + _nb_execute_unit = _nb_functionnal_unit + _nb_load_store_unit; + + _size_context_id = log2(nb_context ); + _size_front_end_id = log2(nb_front_end ); + _size_ooo_engine_id = log2(nb_ooo_engine ); + _size_packet_id = log2(nb_packet ); + + _have_port_context_id = _size_context_id >= 1; + _have_port_front_end_id = _size_front_end_id >= 1; + _have_port_ooo_engine_id = _size_ooo_engine_id >= 1; + _have_port_packet_id = _size_packet_id >= 1; + + _is_load_store_unit = new bool [_nb_execute_unit]; + _translate_num_execute_unit = new uint32_t [_nb_execute_unit]; + + _read_unit_to_execution_unit_table_execute_type = new bool * [_nb_execute_unit]; + for (uint32_t i=0; i<_nb_execute_unit; i++) + { + _is_load_store_unit [i] = false; + _read_unit_to_execution_unit_table_execute_type [i] = new bool [_nb_type]; + for (uint32_t j=0; j<_nb_type; j++) + _read_unit_to_execution_unit_table_execute_type [i][j] = false; + } + + // Fill execute_type + for (uint32_t i=0; i<_nb_execute_unit; i++) + for (uint32_t j=0; j<_nb_type; j++) + for (uint32_t k=0; k<_nb_operation; k++) + // Test if operation is implemnted + if (timing[i][j][k]._latence > 0) + { + _read_unit_to_execution_unit_table_execute_type [i][j] = true; + _is_load_store_unit [i] = (j == TYPE_MEMORY); + break; + } + + for (uint32_t i=0; i<_nb_execute_unit; i++) + if (_is_load_store_unit [i]) + log_printf(TRACE,Execute_loop,FUNCTION,"Execute unit '%d' is a Load Store unit",i); + else + log_printf(TRACE,Execute_loop,FUNCTION,"Execute unit '%d' is a Functionnal unit",i); + + _nb_gpr_read = 2*_nb_read_unit; + _nb_spr_read = 1*_nb_read_unit; + _nb_gpr_write = 1*_nb_write_unit; + _nb_spr_write = 1*_nb_write_unit; + + _max_nb_general_register = 0; + _max_nb_special_register = 0; + for (uint32_t i=0; i _max_nb_general_register) _max_nb_general_register = _nb_general_register[i]; + if (_nb_special_register[i] > _max_nb_special_register) _max_nb_special_register = _nb_special_register[i]; + } + + _max_size_store_queue = 0; + _max_size_load_queue = 0; + for (uint32_t i=0; i _max_size_store_queue) _max_size_store_queue = _size_store_queue[i]; + if (_size_load_queue [i] > _max_size_load_queue ) _max_size_load_queue = _size_load_queue [i]; + } + + _have_port_load_queue_ptr= _max_size_load_queue >= 2; + + _size_general_register = log2(_max_nb_general_register); + _size_special_register = log2(_max_nb_special_register); + + uint32_t _nb_thread = get_nb_thread(_nb_context, + _nb_front_end, + _nb_ooo_engine); + + _set_read_unit_source_register_write = new std::set [_nb_read_unit]; + _set_read_unit_source_bypass_write = new std::set [_nb_read_unit]; + _set_read_unit_source_bypass_memory = new std::set [_nb_read_unit]; + + _read_unit_nb_register_write = new uint32_t [_nb_read_unit]; + _read_unit_nb_bypass_write = new uint32_t [_nb_read_unit]; + _read_unit_nb_bypass_memory = new uint32_t [_nb_read_unit]; + + _link_read_unit_with_load_store_unit = new bool * [nb_read_unit]; + _link_read_unit_with_write_unit = new bool * [nb_read_unit]; + _link_read_unit_with_thread = new bool * [nb_read_unit]; + + for (uint32_t i=0; i<_nb_read_unit; i++) + { + _read_unit_nb_register_write [i] = 0; + _read_unit_nb_bypass_write [i] = 0; + _read_unit_nb_bypass_memory [i] = 0; + + _link_read_unit_with_load_store_unit [i] = new bool [_nb_execute_unit]; + _link_read_unit_with_write_unit [i] = new bool [_nb_write_unit]; + _link_read_unit_with_thread [i] = new bool [_nb_thread]; + + for (uint32_t j=0; j<_nb_execute_unit; j++) + _link_read_unit_with_load_store_unit [i][j] = false; + for (uint32_t j=0; j<_nb_write_unit; j++) + _link_read_unit_with_write_unit [i][j] = false; + for (uint32_t j=0; j<_nb_thread; j++) + _link_read_unit_with_thread [i][j] = false; + + // fill link array + for (uint32_t j=0; j<_nb_execute_unit; j++) + { + // Test if this read unit can send operation at this execute_unit + if (_read_unit_to_execution_unit_table_routing [i][j]) + { + if (_is_load_store_unit [j]) + { + _link_read_unit_with_load_store_unit [i][j] = true; + } + + for (uint32_t k=0; k<_nb_thread; k++) + { + if (_read_unit_to_execution_unit_table_thread [j][k]) + { + _link_read_unit_with_thread [i][k] = true; + } + } + // Scearch associed write_unit + for (uint32_t k=0; k<_nb_write_unit; k++) + { + // Test if this execute_unit can send operation at this write_unit + // Test if have not a previous link ! (a same read_unit can send operation à two execute_unit and each execute_unit send at the same write_unit) + if (_execution_unit_to_write_unit_table_routing [j][k] and + not _link_read_unit_with_write_unit [i][k]) + // if yes : this write_unit can have operation sended by this read_unit + { + _link_read_unit_with_write_unit [i][k] = true; + } + } + } + } + } + + // Compute the gpr_write and spr_write port for the read_unit : + // * Max : 2*nb_write_unit gpr_write_port. + // * a specific read_unit and a specific write_unit can execute a null intersection of thread operation. Also it's unnecessarry to send the gpr_write at the read_unit. + + + std::cout << "_link_......." << std::endl; + std::cout << "_link_read_unit_with_load_store_unit" << std::endl; + for (uint32_t i=0; i<_nb_read_unit; i++) + { + std::cout << "\t" << std::endl; + for (uint32_t j=0; j<_nb_execute_unit; j++) + std::cout << _link_read_unit_with_load_store_unit [i][j] << " "; + std::cout << std::endl; + } + std::cout << "_link_read_unit_with_write_unit" << std::endl; + for (uint32_t i=0; i<_nb_read_unit; i++) + { + std::cout << "\t" << std::endl; + for (uint32_t j=0; j<_nb_write_unit; j++) + std::cout << _link_read_unit_with_write_unit [i][j] << " "; + std::cout << std::endl; + } + std::cout << "_link_read_unit_with_thread" << std::endl; + for (uint32_t i=0; i<_nb_read_unit; i++) + { + std::cout << "\t" << std::endl; + for (uint32_t j=0; j<_nb_thread; j++) + std::cout << _link_read_unit_with_thread [i][j] << " "; + std::cout << std::endl; + } + + std::cout << "_set_......." << std::endl; + + for (uint32_t i=0; i<_nb_read_unit; i++) + { + std::cout << " * Read_unit[" << i << "]" << std::endl; + for (uint32_t j=0; j<_nb_write_unit; j++) + { + std::cout << " * Write_unit[" << j << "]" << std::endl; + // Test the thread executed on this write_unit + for (uint32_t k=0; k<_nb_thread; k++) + { + std::cout << " * Thread[" << k << "]" << std::endl; + if ( (_execution_unit_to_write_unit_table_thread [j][k]) and + (_link_read_unit_with_thread [i][k])) + { + std::cout << " * Find !!!!" << std::endl; + std::cout << " * Read_unit "+toString(i)+" must take the gpr_write with write_unit "+toString(j)+"." << std::endl; + _set_read_unit_source_register_write[i].insert(j); + _read_unit_nb_register_write [i] ++; + + std::cout << " * bypass_write : " << _nb_bypass_write [j] << std::endl; + std::cout << " * Read_unit "+toString(i)+" must take the bypass_write with write_unit "+toString(j)+"." << std::endl; + _set_read_unit_source_bypass_write [i].insert(j); + _read_unit_nb_bypass_write [i] += _nb_bypass_write [j]; + break; + } + } + } + } + + for (uint32_t i=0; i<_nb_read_unit; i++) + { + std::cout << " * Read_unit[" << i << "]" << std::endl; + for (uint32_t j=0; j<_nb_execute_unit; j++) + { + std::cout << " * Execute_unit[" << j << "]" << std::endl; + // Test the thread executed on this execute_unit + for (uint32_t k=0; k<_nb_thread; k++) + { + std::cout << " * Thread[" << k << "]" << std::endl; + if ((_read_unit_to_execution_unit_table_thread [j][k]) and + (_link_read_unit_with_thread [i][k]) and + (_is_load_store_unit [j])) + { + std::cout << " * Find !!!!" << std::endl; + std::cout << " * Bypass_memory !!!!" << std::endl; + std::cout << " * Read_unit "+toString(i)+" must take the bypass_memory with load_store_unit "+toString(j)+"." << std::endl; + + _set_read_unit_source_bypass_memory [i].insert(j); + _read_unit_nb_bypass_memory [i] += _nb_bypass_memory [j]; + break; + } + } + } + } + + test(); + + _param_read_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Parameters * [_nb_read_unit]; + for (uint32_t i=0; i<_nb_read_unit; i++) + _param_read_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Parameters + (_size_read_queue [i], + _size_reservation_station [i], + _nb_context , + _nb_front_end , + _nb_ooo_engine , + _nb_packet , + _size_general_data , + _size_special_data , + _max_nb_general_register , + _max_nb_special_register , + 1*_read_unit_nb_register_write [i], + 1*_read_unit_nb_register_write [i], + _max_size_store_queue , + _max_size_load_queue , + _nb_inst_retire [i], + _read_unit_nb_bypass_write [i], + _read_unit_nb_bypass_memory [i]); + + _param_functionnal_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Parameters * [_nb_functionnal_unit]; + _param_load_store_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters * [_nb_load_store_unit]; + + uint32_t x=0; + uint32_t y=0; + + for (uint32_t i=0; i<_nb_execute_unit; i++) + if (_is_load_store_unit [i] == false) + { + _translate_num_execute_unit [i] = x; + + _param_functionnal_unit [x] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Parameters + (_nb_context , + _nb_front_end , + _nb_ooo_engine , + _nb_packet , + _size_general_data , + _max_nb_general_register , + _size_special_data , + _max_nb_special_register , + _max_size_store_queue , + _max_size_load_queue , + _timing [i], + _get_custom_information ); + + x++; + } + else + { + _translate_num_execute_unit [i] = y; + + _param_load_store_unit [y] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters + (_size_store_queue [y], + _size_load_queue [y], + _size_speculative_access_queue [y], + _nb_port_check [y], + _speculative_load [y], + _nb_bypass_memory [y], + _nb_context , + _nb_front_end , + _nb_ooo_engine , + _nb_packet , + _size_general_data , + _size_special_data , + _max_nb_special_register , + _max_nb_general_register ); + + y ++; + } + + for (uint32_t i=0; i<_nb_load_store_unit; i++) + + _param_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * [_nb_write_unit]; + for (uint32_t i=0; i<_nb_write_unit; i++) + _param_write_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters + (_size_write_queue [i], + _size_execute_queue [i], + _nb_context , + _nb_front_end , + _nb_ooo_engine , + _nb_packet , + _size_general_data , + _max_nb_general_register , + _size_special_data , + _max_nb_special_register , + _nb_bypass_write [i]); + + + _param_read_unit_to_execution_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Parameters + (_nb_read_unit , + _nb_execute_unit , + _nb_context , + _nb_front_end , + _nb_ooo_engine , + _nb_packet , + _size_general_data , + _size_special_data , + _max_nb_general_register , + _max_nb_special_register , + _max_size_store_queue , + _max_size_load_queue , + _read_unit_to_execution_unit_priority , + _read_unit_to_execution_unit_table_routing , + _read_unit_to_execution_unit_table_execute_type, + _read_unit_to_execution_unit_table_thread ); + + _param_execution_unit_to_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Parameters + (_nb_execute_unit , + _nb_write_unit , + _nb_context , + _nb_front_end , + _nb_ooo_engine , + _nb_packet , + _size_general_data , + _size_special_data , + _max_nb_general_register , + _max_nb_special_register , + _execution_unit_to_write_unit_priority , + _execution_unit_to_write_unit_table_routing, + _execution_unit_to_write_unit_table_thread ); + + _param_register_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters + (_nb_ooo_engine , + _size_general_data , + _size_special_data , + _nb_gpr_read , + _nb_gpr_write , + _nb_gpr_bank , + _nb_gpr_port_read_by_bank , + _nb_gpr_port_write_by_bank , + _nb_spr_read , + _nb_spr_write , + _nb_spr_bank , + _nb_spr_port_read_by_bank , + _nb_spr_port_write_by_bank , + _nb_general_register , + _nb_special_register , + _nb_inst_insert_rob , + _nb_inst_retire_rob ); + + + _max_size_dcache_context_id = 0; + _max_size_dcache_packet_id = 0; + + for (uint32_t i=0; i<_nb_load_store_unit; i++) + { + if (_param_load_store_unit [i]->_size_dcache_context_id > _max_size_dcache_context_id) _max_size_dcache_context_id = _param_load_store_unit [i]->_size_dcache_context_id; + if (_param_load_store_unit [i]->_size_dcache_packet_id > _max_size_dcache_packet_id) _max_size_dcache_packet_id = _param_load_store_unit [i]->_size_dcache_packet_id; + } + + _have_port_dcache_context_id = (_max_size_dcache_context_id>1); + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Execute_loop::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + +// test(); + +// log_printf(FUNC,Execute_loop,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Execute_loop::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + delete [] _param_read_unit; + delete [] _param_functionnal_unit; + delete [] _param_load_store_unit; + delete [] _param_write_unit; + delete _param_read_unit_to_execution_unit; + delete _param_execution_unit_to_write_unit; + delete _param_register_unit; + + delete [] _read_unit_to_execution_unit_table_execute_type; + delete [] _read_unit_nb_register_write; + delete [] _read_unit_nb_bypass_write; + delete [] _read_unit_nb_bypass_memory; + delete [] _set_read_unit_source_register_write ; + delete [] _set_read_unit_source_bypass_write ; + delete [] _set_read_unit_source_bypass_memory ; + delete [] _link_read_unit_with_load_store_unit; + delete [] _link_read_unit_with_write_unit; + delete [] _link_read_unit_with_thread; + delete [] _is_load_store_unit; + delete [] _translate_num_execute_unit; + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,37 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + Parameters_test test ("Execute_loop"); + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + + return test; + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,140 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { + + +#undef FUNCTION +#define FUNCTION "Execute_loop::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + XML xml ("execute_loop"); + + xml.balise_open("execute_loop"); + xml.singleton_begin("nb_read_unit "); xml.attribut("value",toString(_nb_read_unit )); xml.singleton_end(); + xml.singleton_begin("nb_functionnal_unit "); xml.attribut("value",toString(_nb_functionnal_unit )); xml.singleton_end(); + xml.singleton_begin("nb_load_store_unit "); xml.attribut("value",toString(_nb_load_store_unit )); xml.singleton_end(); + xml.singleton_begin("nb_write_unit "); xml.attribut("value",toString(_nb_write_unit )); xml.singleton_end(); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("nb_ooo_engine "); xml.attribut("value",toString(_nb_ooo_engine )); xml.singleton_end(); + xml.singleton_begin("nb_packet "); xml.attribut("value",toString(_nb_packet )); xml.singleton_end(); + xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); + xml.singleton_begin("size_special_data "); xml.attribut("value",toString(_size_special_data )); xml.singleton_end(); + xml.singleton_begin("nb_gpr_bank "); xml.attribut("value",toString(_nb_gpr_bank )); xml.singleton_end(); + xml.singleton_begin("nb_gpr_port_read_by_bank "); xml.attribut("value",toString(_nb_gpr_port_read_by_bank )); xml.singleton_end(); + xml.singleton_begin("nb_gpr_port_write_by_bank "); xml.attribut("value",toString(_nb_gpr_port_write_by_bank )); xml.singleton_end(); + xml.singleton_begin("nb_spr_bank "); xml.attribut("value",toString(_nb_spr_bank )); xml.singleton_end(); + xml.singleton_begin("nb_spr_port_read_by_bank "); xml.attribut("value",toString(_nb_spr_port_read_by_bank )); xml.singleton_end(); + xml.singleton_begin("nb_spr_port_write_by_bank "); xml.attribut("value",toString(_nb_spr_port_write_by_bank )); xml.singleton_end(); + xml.singleton_begin("execution_unit_to_write_unit_priority"); xml.attribut("value",toString(_execution_unit_to_write_unit_priority)); xml.singleton_end(); + xml.singleton_begin("read_unit_to_execution_unit_priority "); xml.attribut("value",toString(_read_unit_to_execution_unit_priority )); xml.singleton_end(); + + for (uint32_t i=0; i<_nb_read_unit; i++) + { + xml.balise_open_begin("component"); + xml. attribut("type","read_unit"); + xml. attribut("id" ,toString(i)); + xml.balise_open_end(); + xml. singleton_begin("size_read_queue "); xml.attribut("value",toString(_size_read_queue [i])); xml.singleton_end(); + xml. singleton_begin("size_reservation_station"); xml.attribut("value",toString(_size_reservation_station [i])); xml.singleton_end(); + xml. singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire [i])); xml.singleton_end(); + xml.balise_close(); + } + + for (uint32_t i=0; i<_nb_load_store_unit; i++) + { + xml.balise_open_begin("component"); + xml. attribut("type","load_store_unit"); + xml. attribut("id" ,toString(i)); + xml.balise_open_end(); + xml. singleton_begin("size_store_queue "); xml.attribut("value",toString(_size_store_queue [i])); xml.singleton_end(); + xml. singleton_begin("size_load_queue "); xml.attribut("value",toString(_size_load_queue [i])); xml.singleton_end(); + xml. singleton_begin("size_speculative_access_queue"); xml.attribut("value",toString(_size_speculative_access_queue[i])); xml.singleton_end(); + xml. singleton_begin("nb_port_check "); xml.attribut("value",toString(_nb_port_check [i])); xml.singleton_end(); + xml. singleton_begin("speculative_load "); xml.attribut("value",toString(_speculative_load [i])); xml.singleton_end(); + xml. singleton_begin("nb_bypass_memory "); xml.attribut("value",toString(_nb_bypass_memory [i])); xml.singleton_end(); + xml.balise_close(); + } + + for (uint32_t i=0; i<_nb_write_unit; i++) + { + xml.balise_open_begin("component"); + xml. attribut("type","write_unit"); + xml. attribut("id" ,toString(i)); + xml.balise_open_end(); + xml. singleton_begin("size_write_queue "); xml.attribut("value",toString(_size_write_queue [i])); xml.singleton_end(); + xml. singleton_begin("size_execute_queue"); xml.attribut("value",toString(_size_execute_queue [i])); xml.singleton_end(); + xml. singleton_begin("nb_bypass_write "); xml.attribut("value",toString(_nb_bypass_write [i])); xml.singleton_end(); + xml.balise_close(); + } + + for (uint32_t i=0; i<_nb_ooo_engine; i++) + { + xml.balise_open_begin("component"); + xml. attribut("type","ooo_engine"); + xml. attribut("id" ,toString(i)); + xml.balise_open_end(); + xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end(); + xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end(); + xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); + xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); + xml.balise_close(); + } + + + std::string str = ""; + for (uint32_t i=0; i<_nb_read_unit; i++) + str += _param_read_unit [i]->print(depth+1); + for (uint32_t i=0; i<_nb_functionnal_unit; i++) + str += _param_functionnal_unit [i]->print(depth+1); + for (uint32_t i=0; i<_nb_load_store_unit; i++) + str += _param_load_store_unit [i]->print(depth+1); + for (uint32_t i=0; i<_nb_write_unit; i++) + str += _param_write_unit [i]->print(depth+1); + str += _param_read_unit_to_execution_unit->print(depth+1); + str += _param_execution_unit_to_write_unit->print(depth+1); + str += _param_register_unit->print(depth+1); + + xml.comment("\n"+str); + + xml.balise_close(); + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Execute_loop::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_execute_loop::execute_loop::Parameters & x) + { + log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Execute_loop,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libInstruction.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.deps (revision 78) @@ -0,0 +1,31 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Instruction = yes + +#-----[ Directory ]---------------------------------------- + +Instruction_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction + +#-----[ Library ]------------------------------------------ + +Instruction_LIBRARY = -lInstruction + +Instruction_DIR_LIBRARY = -L$(Instruction_DIR)/lib + +#-----[ Rules ]-------------------------------------------- + +Instruction_library : + @\ + $(MAKE) --directory=$(Instruction_DIR) --makefile=Makefile; + +Instruction_library_clean : + @\ + $(MAKE) --directory=$(Instruction_DIR) --makefile=Makefile clean; + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h (revision 78) @@ -0,0 +1,267 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_instruction_Instruction_h +#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_instruction_Instruction_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + void instruction_decod (decod_instruction_t * inst, decod_param_t * param); +//void instruction_decod_type_0 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_1 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_2 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_3 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_4 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_5 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_6 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_7 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_8 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_9 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_10 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_11 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_12 (decod_instruction_t * inst, decod_param_t * param); + void instruction_decod_type_13 (decod_instruction_t * inst, decod_param_t * param); + + void instruction_illegal (decod_instruction_t * inst, decod_param_t * param); + + // ORBIS + void instruction_l_add (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_addc (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_addi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_addic (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_and (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_andi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_bf (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_bnf (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_cmov (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_csync (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust1 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust2 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust3 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust4 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust5 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust6 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust7 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_l_cust8 (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_div (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_divu (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_extbs (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_extbz (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_exths (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_exthz (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_extws (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_extwz (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_ff1 (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_fl1 (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_j (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_jal (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_jalr (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_jr (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_lbs (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_lbz (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_ld (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_lhs (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_lhz (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_lws (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_lwz (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_mac (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_maci (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_macrc (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_mfspr (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_movhi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_msb (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_msync (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_mtspr (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_mul (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_muli (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_mulu (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_nop (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_or (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_ori (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_psync (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_rfe (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_ror (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_rori (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sb (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sd (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfeq (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfeqi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfges (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgesi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgeu (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgeui (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgts (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgtsi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgtu (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfgtui (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfles (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sflesi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfleu (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfleui (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sflts (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfltsi (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfltu (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfltui (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfne (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sfnei (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sh (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sll (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_slli (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sra (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_srai (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_srl (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_srli (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sub (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sw (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_sys (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_trap (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_xor (decod_instruction_t * inst, decod_param_t * param); + void instruction_l_xori (decod_instruction_t * inst, decod_param_t * param); + + // ORFPX +// void instruction_lf_add_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_add_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_cust1_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_cust1_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_div_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_div_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_ftoi_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_ftoi_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_itof_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_itof_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_madd_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_madd_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_mul_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_mul_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_rem_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_rem_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfeq_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfeq_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfge_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfge_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfgt_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfgt_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfle_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfle_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sflt_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sflt_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfne_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sfne_s (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sub_d (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lf_sub_s (decod_instruction_t * inst, decod_param_t * param); + + // ORVDX +// void instruction_lv_add_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_add_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_adds_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_adds_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_addu_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_addu_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_addus_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_addus_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_eq_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_eq_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_ge_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_ge_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_gt_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_gt_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_le_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_le_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_lt_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_lt_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_ne_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_all_ne_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_and (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_eq_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_eq_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_ge_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_ge_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_gt_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_gt_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_le_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_le_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_lt_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_lt_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_ne_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_any_ne_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_avg_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_avg_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_eq_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_eq_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_ge_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_ge_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_gt_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_gt_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_le_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_le_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_lt_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_lt_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_ne_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cmp_ne_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cust1 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cust2 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cust3 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_cust4 (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_madds_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_max_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_max_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_merge_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_merge_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_min_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_min_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_msubs_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_muls_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_nand (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_nor (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_or (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_pack_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_pack_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_packs_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_packs_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_packus_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_packus_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_perm_n (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_rl_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_rl_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sll (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sll_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sll_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sra_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sra_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_srl (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_srl_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_srl_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sub_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_sub_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_subs_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_subs_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_subu_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_subu_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_subus_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_subus_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_unpack_b (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_unpack_h (decod_instruction_t * inst, decod_param_t * param); +// void instruction_lv_xor (decod_instruction_t * inst, decod_param_t * param); + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h (revision 78) @@ -0,0 +1,94 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_instruction_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_instruction_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/BitManipulation.h" +#include "Common/include/Log2.h" +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + typedef struct + { + // set by ifetch + Tinstruction_t _instruction ; + Tgeneral_data_t _address_previous ; + Tgeneral_data_t _address ; + Tgeneral_data_t _address_next ; // if event, is address_epcr + Tcontext_t _context_id ; + Tcontrol_t _is_delay_slot ; +// Tbranch_state_t _branch_state ; +// Tprediction_ptr_t _branch_update_prediction_id; + + // set by predictor +// Tdepth_t _depth ; + + // set by decod + Ttype_t _type ; + Toperation_t _operation ; + Tcontrol_t _has_immediat ; + Tgeneral_data_t _immediat ; + Tcontrol_t _read_ra ; + Tgeneral_address_t _num_reg_ra ; + Tcontrol_t _read_rb ; + Tgeneral_address_t _num_reg_rb ; + Tcontrol_t _read_rc ; + Tspecial_address_t _num_reg_rc ; + Tcontrol_t _write_rd ; + Tgeneral_address_t _num_reg_rd ; + Tcontrol_t _write_re ; + Tspecial_address_t _num_reg_re ; + Texception_t _exception_use ; + Tbranch_condition_t _branch_condition ; +// Tcontrol_t _branch_stack_write; + Tcontrol_t _branch_direction ; + Tevent_type_t _event_type ; + } decod_instruction_t; + + class decod_param_t + { + public : uint32_t _size_data ; + public : Tgeneral_data_t _mask_data ; + public : Tgeneral_data_t _mask_shift; + public : void (*** _function_decod) (decod_instruction_t *, decod_param_t *); // [type][opcod] + + public : decod_param_t (uint32_t size_data, + void (*** function_decod) (decod_instruction_t *, decod_param_t *)) + { + _size_data = size_data; + _mask_data = gen_mask (size_data); + _mask_shift = gen_mask (log2(size_data)); + _function_decod = function_decod; + }; + public : ~decod_param_t (void) + { + }; + }; + + + typedef void function_decod_t + (morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::decod_instruction_t *, + morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::decod_param_t *); + + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp (revision 78) @@ -0,0 +1,2532 @@ +/* + * $Id$ + * + * [ Description ] + * + * instruction MAC_UNIT (l.mac, l.maci, l.macrc, l.msb) throw a context event. Also is sequential. + * If your program need intensive mac_unit, you can change the implementation of this unit : + * 1) "decod" : inst->_event_type = EVENT_TYPE_NONE; + * 2) "rename" : add component as load_store_unit pointer management + * 3) "functionnal_unit" : test type instruction, if type=MAC_UNIT, insert in queue, the localisation is the ptr give by rename stage. Retire in this queue in sequence (as the store queue). + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + +#define EXTENDS(x,nb_bits) extend(32, x,true ,nb_bits) +#define EXTENDZ(x,nb_bits) extend(32, x,false,nb_bits) + + void instruction_decod (decod_instruction_t * inst, decod_param_t * param) + { +// instruction_decod_type_0 (inst,param); + + uint32_t opcod = range(inst->_instruction,31,26); + (* param->_function_decod[ 0][opcod]) (inst,param); + } + +// void instruction_decod_type_0 (decod_instruction_t * inst, decod_param_t * param) +// { +// uint32_t opcod = range(inst->_instruction,31,26); +// (* param->_function_decod[ 0][opcod]) (inst,param); +// } + + void instruction_decod_type_1 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 7, 0); + (* param->_function_decod[ 1][opcod]) (inst,param); + } + + void instruction_decod_type_2 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 7, 0); + (* param->_function_decod[ 2][opcod]) (inst,param); + } + + void instruction_decod_type_3 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = ((range(inst->_instruction, 9, 8)<<4) | + (range(inst->_instruction, 3, 0))); + (* param->_function_decod[ 3][opcod]) (inst,param); + } + + void instruction_decod_type_4 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction,25,21); + (* param->_function_decod[ 4][opcod]) (inst,param); + } + + void instruction_decod_type_5 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction,25,21); + (* param->_function_decod[ 5][opcod]) (inst,param); + } + + void instruction_decod_type_6 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 7, 6); + (* param->_function_decod[ 6][opcod]) (inst,param); + } + + void instruction_decod_type_7 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 3, 0); + (* param->_function_decod[ 7][opcod]) (inst,param); + } + + void instruction_decod_type_8 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction,16,16); + (* param->_function_decod[ 8][opcod]) (inst,param); + } + + void instruction_decod_type_9 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction,25,23); + (* param->_function_decod[ 9][opcod]) (inst,param); + } + + void instruction_decod_type_10 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction,25,24); + (* param->_function_decod[10][opcod]) (inst,param); + } + + void instruction_decod_type_11 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 7, 6); + (* param->_function_decod[11][opcod]) (inst,param); + } + + void instruction_decod_type_12 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 7, 6); + (* param->_function_decod[12][opcod]) (inst,param); + } + + void instruction_decod_type_13 (decod_instruction_t * inst, decod_param_t * param) + { + uint32_t opcod = range(inst->_instruction, 7, 6); + (* param->_function_decod[13][opcod]) (inst,param); + } + + void instruction_illegal (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_illegal","instruction_illegal"); + + inst->_exception_use = EXCEPTION_USE_ILLEGAL_INSTRUCTION; + + if (inst->_is_delay_slot) + inst->_address_next = inst->_address_previous; + else + inst->_address_next = inst->_address; + + inst->_event_type = EVENT_TYPE_EXCEPTION; + } + + // ORBIS + void instruction_l_add (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_add"," * instruction : l.add"); + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_ADD; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_addc (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_addc"," * instruction : l.addc"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_ADD; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 1; + inst->_num_reg_rc = SPR_LOGIC_SR_CY_OV; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_addi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_addi"," * instruction : l.addi"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_ADD; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_addic (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_addic"," * instruction : l.addic"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_ADD; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 1; + inst->_num_reg_rc = SPR_LOGIC_SR_CY_OV; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_and (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_and"," * instruction : l.and"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_AND; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_andi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_andi"," * instruction : l.andi"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_AND; + inst->_has_immediat = 1; + inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_bf (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_bf"," * instruction : l.bf"); + + Tgeneral_data_t address_next = inst->_address+(EXTENDS(inst->_instruction,26)<<2); + + inst->_type = TYPE_BRANCH; + inst->_operation = OPERATION_BRANCH_L_TEST_F; + inst->_has_immediat = 1; + inst->_immediat = address_next; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 1; + inst->_num_reg_rc = SPR_LOGIC_SR_F; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; + inst->_branch_condition = BRANCH_CONDITION_FLAG_SET; +// inst->_branch_stack_write = 0; + + inst->_branch_direction = range(inst->_instruction,25,25); + inst->_address_next = address_next; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_bnf (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_bnf"," * instruction : l.bnf"); + + Tgeneral_data_t address_next = inst->_address+(EXTENDS(inst->_instruction,26)<<2); + + inst->_type = TYPE_BRANCH; + inst->_operation = OPERATION_BRANCH_L_TEST_NF; + inst->_has_immediat = 1; + inst->_immediat = address_next; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 1; + inst->_num_reg_rc = SPR_LOGIC_SR_F; + inst->_write_rd = 0; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; + inst->_branch_condition = BRANCH_CONDITION_FLAG_UNSET; +// inst->_branch_stack_write = 0; + inst->_branch_direction = range(inst->_instruction,25,25); + inst->_address_next = address_next; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_cmov (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_cmov"," * instruction : l.cmov"); + + inst->_type = TYPE_MOVE; + inst->_operation = OPERATION_MOVE_L_CMOV; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 1; + inst->_num_reg_rc = SPR_LOGIC_SR_F; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_csync (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_csync"," * instruction : l.csync"); + + if (range(inst->_instruction,23) != 0) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_CSYNC; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_CSYNC; + } + } + +// void instruction_l_cust1 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust2 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust3 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust4 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust5 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust6 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust7 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_l_cust8 (decod_instruction_t * inst, decod_param_t * param) + + void instruction_l_div (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_div"," * instruction : l.div"); + + inst->_type = TYPE_MUL_DIV; + inst->_operation = OPERATION_MUL_DIV_L_DIV; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_divu (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_divu"," * instruction : l.divu"); + + inst->_type = TYPE_MUL_DIV; + inst->_operation = OPERATION_MUL_DIV_L_DIVU; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_extbs (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_extbs"," * instruction : l.extbs"); + + inst->_type = TYPE_EXTEND; + inst->_operation = OPERATION_EXTEND_L_EXTEND_S; + inst->_has_immediat = 1; + inst->_immediat = 8; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_extbz (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_extbz"," * instruction : l.extbz"); + + inst->_type = TYPE_EXTEND; + inst->_operation = OPERATION_EXTEND_L_EXTEND_Z; + inst->_has_immediat = 1; + inst->_immediat = 8; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_exths (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_exths"," * instruction : l.exths"); + + inst->_type = TYPE_EXTEND; + inst->_operation = OPERATION_EXTEND_L_EXTEND_S; + inst->_has_immediat = 1; + inst->_immediat = 16; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_exthz (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_exthz"," * instruction : l.exthz"); + + inst->_type = TYPE_EXTEND; + inst->_operation = OPERATION_EXTEND_L_EXTEND_Z; + inst->_has_immediat = 1; + inst->_immediat = 16; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_extws (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_extws"," * instruction : l.extws"); + + inst->_type = TYPE_EXTEND; + inst->_operation = OPERATION_EXTEND_L_EXTEND_S; + inst->_has_immediat = 1; + inst->_immediat = 32; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_extwz (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_extwz"," * instruction : l.extwz"); + + inst->_type = TYPE_EXTEND; + inst->_operation = OPERATION_EXTEND_L_EXTEND_Z; + inst->_has_immediat = 1; + inst->_immediat = 32; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_ff1 (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_ff1"," * instruction : l.ff1"); + + inst->_type = TYPE_FIND; + inst->_operation = OPERATION_FIND_L_FF1; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_fl1 (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_fl1"," * instruction : l.fl1"); + + inst->_type = TYPE_FIND; + inst->_operation = OPERATION_FIND_L_FL1; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_j (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_j"," * instruction : l.j"); + + inst->_type = TYPE_BRANCH; + inst->_operation = OPERATION_BRANCH_NONE; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; + inst->_branch_condition = BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK; +// inst->_branch_stack_write = 0; + inst->_branch_direction = 1; + inst->_address_next = inst->_address+(EXTENDS(inst->_instruction,26)<<2); + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_jal (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_jal"," * instruction : l.jal"); + + inst->_type = TYPE_BRANCH; + inst->_operation = OPERATION_BRANCH_L_JALR; + inst->_has_immediat = 1; + inst->_immediat = inst->_address_next+4; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = 9; // Link register + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; + inst->_branch_condition = BRANCH_CONDITION_NONE_WITH_WRITE_STACK; // Always jump +// inst->_branch_stack_write = 1; + inst->_branch_direction = 1; + inst->_address_next = inst->_address+(EXTENDS(inst->_instruction,26)<<2); + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_jalr (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_jalr"," * instruction : l.jalr"); + + inst->_num_reg_rb = range(inst->_instruction,15,11); + + if (inst->_num_reg_rb == 9) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_BRANCH; + inst->_operation = OPERATION_BRANCH_L_JALR; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 1; +// inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = 9; // Link register + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = (inst->_num_reg_rb == 9)?BRANCH_CONDITION_READ_STACK:BRANCH_CONDITION_READ_REGISTER; + inst->_branch_condition = BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK; +// inst->_branch_stack_write = 1; + inst->_branch_direction = 1; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + } + + void instruction_l_jr (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_jr"," * instruction : l.jr"); + + inst->_type = TYPE_BRANCH; + inst->_operation = OPERATION_BRANCH_L_JALR; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; + inst->_branch_condition = (inst->_num_reg_rb == 9)?BRANCH_CONDITION_READ_STACK:BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK; +// inst->_branch_stack_write = 0; + inst->_branch_direction = 1; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_lbs (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_lbs"," * instruction : l.lbs"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_8_S; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_lbz (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_lbz"," * instruction : l.lbz"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_8_Z; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_ld (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_ld"," * instruction : l.ld"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_64_S; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_lhs (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_lhs"," * instruction : l.lhs"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_16_S; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_lhz (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_lhz"," * instruction : l.lhz"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_16_Z; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_lws (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_lws"," * instruction : l.lws"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_32_S; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_lwz (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_lwz"," * instruction : l.lwz"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_LOAD_32_Z; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_mac (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_mac"," * instruction : l.mac"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MAC; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_SPR_ACCESS; + } + + void instruction_l_maci (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_maci"," * instruction : l.maci"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MAC; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(((range(inst->_instruction,25,21)<<11)| + (range(inst->_instruction,10, 0))),16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_SPR_ACCESS; + } + + void instruction_l_macrc (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_macrc"," * instruction : l.macrc"); + + if (range(inst->_instruction,15, 0) != 0) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MACRC; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_SPR_ACCESS; + } + } + + void instruction_l_mfspr (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_mfspr"," * instruction : l.mfspr"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MFSPR; + inst->_has_immediat = 1; + inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_SPR_ACCESS; + } + + void instruction_l_movhi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_movhi"," * instruction : l.movhi"); + + inst->_type = TYPE_MOVE; + inst->_operation = OPERATION_MOVE_L_MOVHI; + inst->_has_immediat = 1; + inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_msb (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_msb"," * instruction : l.msb"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MSB; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_SPR_ACCESS; + } + + void instruction_l_msync (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_msync"," * instruction : l.msync"); + + if (range(inst->_instruction,22, 0) != 0) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MSYNC; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_MSYNC; + } + } + + void instruction_l_mtspr (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_mtspr"," * instruction : l.mtspr"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_MTSPR; + inst->_has_immediat = 1; + inst->_immediat = EXTENDZ(((range(inst->_instruction,25,21)<<11)| + (range(inst->_instruction,10, 0))),16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_SPR_ACCESS; + } + + void instruction_l_mul (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_mul"," * instruction : l.mul"); + + inst->_type = TYPE_MUL_DIV; + inst->_operation = OPERATION_MUL_DIV_L_MUL; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_muli (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_muli"," * instruction : l.muli"); + + inst->_type = TYPE_MUL_DIV; + inst->_operation = OPERATION_MUL_DIV_L_MUL; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_mulu (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_mulu"," * instruction : l.mulu"); + + inst->_type = TYPE_MUL_DIV; + inst->_operation = OPERATION_MUL_DIV_L_MULU; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_nop (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_nop"," * instruction : l.nop"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_NOP; +// inst->_has_immediat = 1; +// inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_or (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_or"," * instruction : l.or"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_OR; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_ori (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_ori"," * instruction : l.ori"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_OR; + inst->_has_immediat = 1; + inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_psync (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_psync"," * instruction : l.psync"); + + if (range(inst->_instruction,22, 0) != 0) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_PSYNC; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_PSYNC; + } + } + + void instruction_l_rfe (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_rfe"," * instruction : l.rfe"); + + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_RFE; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_NONE; // can't anticip this instruction : must read EPCR in rename stage + } + + void instruction_l_ror (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_ror"," * instruction : l.ror"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_ROR; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_rori (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_rori"," * instruction : l.rori"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_ROR; + inst->_has_immediat = 1; + inst->_immediat = range(inst->_instruction, 5, 0); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sb (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sb"," * instruction : l.sb"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_STORE_8; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(((range(inst->_instruction,25,21)<<11)| + (range(inst->_instruction,10, 0))),16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sd (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sb"," * instruction : l.sb"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_STORE_64; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(((range(inst->_instruction,25,21)<<11)| + (range(inst->_instruction,10, 0))),16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfeq (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfeq"," * instruction : l.sfeq"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFEQ; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfeqi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfeqi"," * instruction : l.sfeqi"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFEQ; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfges (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfges"," * instruction : l.sfges"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGES; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgesi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgesi"," * instruction : l.sfgesi"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGES; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgeu (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgeu"," * instruction : l.sfgeu"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGEU; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgeui (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgeui"," * instruction : l.sfgeui"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGEU; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgts (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgts"," * instruction : l.sfgts"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGTS; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgtsi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgtsi"," * instruction : l.sfgtsi"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGTS; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgtu (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgtu"," * instruction : l.sfgtu"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGTU; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfgtui (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfgtui"," * instruction : l.sfgtui"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFGTU; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfles (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfles"," * instruction : l.sfles"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLES; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sflesi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sflesi"," * instruction : l.sflesi"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLES; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfleu (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfleu"," * instruction : l.sfleu"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLEU; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfleui (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfleui"," * instruction : l.sfleui"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLEU; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sflts (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sflts"," * instruction : l.sflts"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLTS; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfltsi (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfltsi"," * instruction : l.sfltsi"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLTS; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfltu (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfltu"," * instruction : l.sfltu"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLTU; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfltui (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfltui"," * instruction : l.sfltui"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFLTU; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfne (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfne"," * instruction : l.sfne"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFNE; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sfnei (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sfnei"," * instruction : l.sfnei"); + + inst->_type = TYPE_TEST; + inst->_operation = OPERATION_TEST_L_SFNE; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_F; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sh (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sh"," * instruction : l.sh"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_STORE_16; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(((range(inst->_instruction,25,21)<<11)| + (range(inst->_instruction,10, 0))),16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sll (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sll"," * instruction : l.sll"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_SLL; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_slli (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_slli"," * instruction : l.slli"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_SLL; + inst->_has_immediat = 1; + inst->_immediat = range(inst->_instruction, 5, 0); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sra (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sra"," * instruction : l.sra"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_SRA; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_srai (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_srai"," * instruction : l.srai"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_SRA; + inst->_has_immediat = 1; + inst->_immediat = range(inst->_instruction, 5, 0); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_srl (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_srl"," * instruction : l.srl"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_SRL; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_srli (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_srli"," * instruction : l.srli"); + + inst->_type = TYPE_SHIFT; + inst->_operation = OPERATION_SHIFT_L_SRL; + inst->_has_immediat = 1; + inst->_immediat = range(inst->_instruction, 5, 0); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sub (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sub"," * instruction : l.sub"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_SUB; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 1; + inst->_num_reg_re = SPR_LOGIC_SR_CY_OV; + inst->_exception_use = EXCEPTION_USE_RANGE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sw (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sw"," * instruction : l.sw"); + + inst->_type = TYPE_MEMORY; + inst->_operation = OPERATION_MEMORY_STORE_32; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(((range(inst->_instruction,25,21)<<11)| + (range(inst->_instruction,10, 0))),16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_sys (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_sys"," * instruction : l.sys"); + + if (range(inst->_instruction,22,16) != 0) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_SYS; +// inst->_has_immediat = 1; +// inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_SYSCALL; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; + +// if (inst->_is_delay_slot) +// inst->_address_next = inst->_address_previous; +// else +// inst->_address_next = inst->_address; + + +// inst->_address_next = ; // don't change + inst->_event_type = EVENT_TYPE_EXCEPTION; + } + } + + void instruction_l_trap (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_trap"," * instruction : l.trap"); + + if (range(inst->_instruction,22,16) != 0) + { + instruction_illegal (inst, param); + } + else + { + inst->_type = TYPE_SPECIAL; + inst->_operation = OPERATION_SPECIAL_L_TRAP; + inst->_has_immediat = 1; + inst->_immediat = EXTENDZ(inst->_instruction,16); + inst->_read_ra = 0; +// inst->_num_reg_ra = ; + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; // read all SR +// inst->_num_reg_rc = ; + inst->_write_rd = 0; +// inst->_num_reg_rd = ; + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_TRAP; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + } + + void instruction_l_xor (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_xor"," * instruction : l.xor"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_XOR; + inst->_has_immediat = 0; +// inst->_immediat = ; + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 1; + inst->_num_reg_rb = range(inst->_instruction,15,11); + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + + void instruction_l_xori (decod_instruction_t * inst, decod_param_t * param) + { + log_printf(TRACE,Decod,"instruction_l_xori"," * instruction : l.xori"); + + inst->_type = TYPE_ALU; + inst->_operation = OPERATION_ALU_L_XOR; + inst->_has_immediat = 1; + inst->_immediat = EXTENDS(inst->_instruction,16); + inst->_read_ra = 1; + inst->_num_reg_ra = range(inst->_instruction,20,16); + inst->_read_rb = 0; +// inst->_num_reg_rb = ; + inst->_read_rc = 0; +// inst->_num_reg_rc = ; + inst->_write_rd = 1; + inst->_num_reg_rd = range(inst->_instruction,25,21); + inst->_write_re = 0; +// inst->_num_reg_re = ; + inst->_exception_use = EXCEPTION_USE_NONE; +// inst->_branch_condition = ; +// inst->_branch_stack_write = ; +// inst->_branch_direction = ; +// inst->_address_next = ; + inst->_event_type = EVENT_TYPE_NONE; + } + +// // ORFPX +// void instruction_lf_add_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_add_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_cust1_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_cust1_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_div_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_div_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_ftoi_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_ftoi_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_itof_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_itof_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_madd_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_madd_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_mul_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_mul_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_rem_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_rem_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfeq_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfeq_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfge_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfge_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfgt_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfgt_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfle_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfle_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sflt_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sflt_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfne_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sfne_s (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sub_d (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lf_sub_s (decod_instruction_t * inst, decod_param_t * param) + +// // ORVDX +// void instruction_lv_add_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_add_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_adds_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_adds_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_addu_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_addu_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_addus_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_addus_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_eq_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_eq_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_ge_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_ge_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_gt_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_gt_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_le_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_le_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_lt_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_lt_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_ne_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_all_ne_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_and (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_eq_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_eq_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_ge_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_ge_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_gt_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_gt_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_le_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_le_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_lt_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_lt_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_ne_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_any_ne_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_avg_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_avg_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_eq_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_eq_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_ge_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_ge_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_gt_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_gt_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_le_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_le_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_lt_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_lt_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_ne_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cmp_ne_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cust1 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cust2 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cust3 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_cust4 (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_madds_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_max_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_max_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_merge_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_merge_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_min_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_min_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_msubs_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_muls_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_nand (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_nor (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_or (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_pack_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_pack_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_packs_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_packs_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_packus_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_packus_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_perm_n (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_rl_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_rl_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sll (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sll_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sll_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sra_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sra_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_srl (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_srl_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_srl_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sub_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_sub_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_subs_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_subs_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_subu_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_subu_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_subus_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_subus_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_unpack_b (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_unpack_h (decod_instruction_t * inst, decod_param_t * param) +// void instruction_lv_xor (decod_instruction_t * inst, decod_param_t * param) + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libDecod.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.deps (revision 78) @@ -0,0 +1,46 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Decod = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Custom +include $(DIR_MORPHEO)/Behavioural/Custom/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Decod_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod + +#-----[ Library ]------------------------------------------ + +Decod_LIBRARY = -lDecod \ + $(Custom_LIBRARY) \ + $(Behavioural_LIBRARY) + +Decod_DIR_LIBRARY = -L$(Decod_DIR)/lib \ + $(Custom_DIR_LIBRARY) \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Decod_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Custom_library; \ + $(MAKE) --directory=$(Decod_DIR) --makefile=Makefile; + +Decod_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Custom_library_clean; \ + $(MAKE) --directory=$(Decod_DIR) --makefile=Makefile clean; + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Decod_LIBRARY) + +DIR_LIBRARY = $(Decod_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Decod_library + +library_clean : Decod_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/config_mono_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/config_mono_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/config_mono_context.cfg (revision 78) @@ -0,0 +1,10 @@ +Decod +1 1 *4 # nb_context +1 4 *4 # nb_inst_fetch [0] [nb_context] +1 4 *4 # nb_inst_decod +1 1 *2 # nb_branch_speculated +1 1 *2 # size_branch_update_prediction +1 1 *2 # nb_context_select +32 32 *2 # size_general_data +1 1 +1 # priority +1 1 +1 # load_balancing Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/config_multi_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/config_multi_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/config_multi_context.cfg (revision 78) @@ -0,0 +1,13 @@ +Decod +4 4 *4 # nb_context +1 1 *4 # nb_inst_fetch [0] [nb_context] +2 2 *4 # nb_inst_fetch [1] [nb_context] +4 4 *4 # nb_inst_fetch [2] [nb_context] +8 8 *4 # nb_inst_fetch [3] [nb_context] +1 16 *4 # nb_inst_decod +1 1 *2 # nb_branch_speculated +1 1 *2 # size_branch_update_prediction +1 4 *2 # nb_context_select +32 32 *2 # size_general_data +1 1 +1 # priority +1 1 +1 # load_balancing Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::decod_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,101 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h" + +#define NB_PARAMS 8 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * nb_inst_fetch [nb_context] (uint32_t )\n")); + err (_(" * nb_inst_decod (uint32_t )\n")); + err (_(" * nb_branch_speculated (uint32_t )\n")); + err (_(" * size_branch_update_prediction (uint32_t )\n")); + err (_(" * nb_context_select (uint32_t )\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * priority (Tpriority_t )\n")); + err (_(" * load_balancing (Tload_balancing_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + uint32_t _nb_context = fromString(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+_nb_context)) + usage (argc, argv); + + uint32_t * _nb_inst_fetch = new uint32_t [_nb_context]; + for (uint32_t i=0;i<_nb_context; i++) + _nb_inst_fetch [i] = fromString(argv[x++]); + + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_branch_speculated = fromString(argv[x++]); + uint32_t _size_branch_update_prediction= fromString(argv[x++]); + uint32_t _nb_context_select = fromString(argv[x++]); + uint32_t _size_general_data = fromString(argv[x++]); + Tpriority_t _priority = fromString(argv[x++]); + Tload_balancing_t _load_balancing = fromString(argv[x++]); + + bool ** _instruction_implemeted = new bool * [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + { + _instruction_implemeted [i] = new bool [NB_INSTRUCTION]; + + for (uint32_t j=0; jprint(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete _nb_inst_fetch; + delete _instruction_implemeted; + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,1703 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h" +#include +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (2048*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + + class entry_t + { +// public : Tcontrol_t _val ; + public : Tinstruction_t _instruction ; +// public : Tcontext_t _context_id ; + public : Tgeneral_address_t _address_previous ; + public : Tgeneral_address_t _address ; + public : Tgeneral_address_t _address_next ; + public : Tbranch_state_t _branch_state ; + public : Tprediction_ptr_t _branch_update_prediction_id; + public : Tbranch_condition_t _branch_condition ; +// public : Tcontrol_t _branch_stack_write ; + public : Tcontrol_t _branch_direction ; + public : Tgeneral_address_t _branch_address_dest ; + public : Tdepth_t _depth ; + public : Ttype_t _type ; + public : Toperation_t _operation ; + public : Tcontrol_t _is_delay_slot ; + public : Tcontrol_t _has_immediat ; + public : Tgeneral_data_t _immediat ; + public : Tcontrol_t _read_ra ; + public : Tgeneral_address_t _num_reg_ra ; + public : Tcontrol_t _read_rb ; + public : Tgeneral_address_t _num_reg_rb ; + public : Tcontrol_t _read_rc ; + public : Tspecial_address_t _num_reg_rc ; + public : Tcontrol_t _write_rd ; + public : Tgeneral_address_t _num_reg_rd ; + public : Tcontrol_t _write_re ; + public : Tspecial_address_t _num_reg_re ; + public : Texception_t _exception_use ; + public : Tevent_type_t _context_event_type ; + + public : entry_t ( +// Tcontrol_t val , + Tinstruction_t instruction , +// Tcontext_t context_id , + Tgeneral_address_t address_previous , + Tgeneral_address_t address , + Tgeneral_address_t address_next , + Tbranch_state_t branch_state , + Tprediction_ptr_t branch_update_prediction_id, + Tbranch_condition_t branch_condition , +// Tcontrol_t branch_stack_write , + Tcontrol_t branch_direction , + Tgeneral_address_t branch_address_dest , + Tdepth_t depth , + Ttype_t type , + Toperation_t operation , + Tcontrol_t is_delay_slot , + Tcontrol_t has_immediat , + Tgeneral_data_t immediat , + Tcontrol_t read_ra , + Tgeneral_address_t num_reg_ra , + Tcontrol_t read_rb , + Tgeneral_address_t num_reg_rb , + Tcontrol_t read_rc , + Tspecial_address_t num_reg_rc , + Tcontrol_t write_rd , + Tgeneral_address_t num_reg_rd , + Tcontrol_t write_re , + Tspecial_address_t num_reg_re , + Texception_t exception_use , + Tevent_type_t context_event_type ) + { +// _val = val ; + _instruction = instruction ; +// _context_id = context_id ; + _address_previous = address_previous ; + _address = address ; + _address_next = address_next ; + _branch_state = branch_state ; + _branch_update_prediction_id = branch_update_prediction_id; + _branch_condition = branch_condition ; +// _branch_stack_write = branch_stack_write ; + _branch_direction = branch_direction ; + _branch_address_dest = branch_address_dest ; + _depth = depth ; + _type = type ; + _operation = operation ; + _is_delay_slot = is_delay_slot ; + _has_immediat = has_immediat ; + _immediat = immediat ; + _read_ra = read_ra ; + _num_reg_ra = num_reg_ra ; + _read_rb = read_rb ; + _num_reg_rb = num_reg_rb ; + _read_rc = read_rc ; + _num_reg_rc = num_reg_rc ; + _write_rd = write_rd ; + _num_reg_rd = num_reg_rd ; + _write_re = write_re ; + _num_reg_re = num_reg_re ; + _exception_use = exception_use ; + _context_event_type = context_event_type ; + } + }; + + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Decod * _Decod = new Decod (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); + ALLOC2_SC_SIGNAL(out_IFETCH_ACK ,"out_IFETCH_ACK ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION ," in_IFETCH_INSTRUCTION ",Tinstruction_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); + ALLOC1_SC_SIGNAL( in_IFETCH_CONTEXT_ID ," in_IFETCH_CONTEXT_ID ",Tcontext_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_IFETCH_ADDRESS ," in_IFETCH_ADDRESS ",Tgeneral_address_t ,_param->_nb_context); +// ALLOC1_SC_SIGNAL( in_IFETCH_ADDRESS_NEXT ," in_IFETCH_ADDRESS_NEXT ",Tgeneral_address_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_IFETCH_INST_IFETCH_PTR ," in_IFETCH_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_IFETCH_BRANCH_STATE ," in_IFETCH_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ," in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_TYPE ,"out_DECOD_TYPE ",Ttype_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_OPERATION ,"out_DECOD_OPERATION ",Toperation_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,"out_DECOD_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,"out_DECOD_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT ,"out_DECOD_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_READ_RA ,"out_DECOD_READ_RA ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,"out_DECOD_NUM_REG_RA ",Tgeneral_address_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_READ_RB ,"out_DECOD_READ_RB ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,"out_DECOD_NUM_REG_RB ",Tgeneral_address_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_READ_RC ,"out_DECOD_READ_RC ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,"out_DECOD_NUM_REG_RC ",Tspecial_address_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD ,"out_DECOD_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,"out_DECOD_NUM_REG_RD ",Tgeneral_address_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE ,"out_DECOD_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,"out_DECOD_NUM_REG_RE ",Tspecial_address_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,"out_DECOD_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,"out_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,"out_PREDICT_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,"out_PREDICT_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); +// ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,"out_PREDICT_BRANCH_STACK_WRITE ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,"out_PREDICT_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod); +// ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ," in_PREDICT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ," in_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH ," in_CONTEXT_DEPTH ",Tdepth_t ,_param->_nb_context); + ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_VAL ,"out_CONTEXT_EVENT_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_CONTEXT_EVENT_ACK ," in_CONTEXT_EVENT_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_CONTEXT_ID ,"out_CONTEXT_EVENT_CONTEXT_ID ",Tcontext_t ); + ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_TYPE ,"out_CONTEXT_EVENT_TYPE ",Tevent_type_t ); + ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_IS_DELAY_SLOT ,"out_CONTEXT_EVENT_IS_DELAY_SLOT ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_ADDRESS ,"out_CONTEXT_EVENT_ADDRESS ",Tgeneral_data_t ); + ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_ADDRESS_EPCR ,"out_CONTEXT_EVENT_ADDRESS_EPCR ",Tgeneral_data_t ); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Decod.\n"),name.c_str()); + + (*(_Decod->in_CLOCK)) (*(in_CLOCK)); + (*(_Decod->in_NRESET)) (*(in_NRESET)); + + INSTANCE2_SC_SIGNAL(_Decod, in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Decod,out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Decod, in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_CONTEXT_ID ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_ADDRESS ,_param->_nb_context); +// INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_ADDRESS_NEXT ,_param->_nb_context); + if (_param->_have_port_inst_ifetch_ptr) + INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_BRANCH_STATE ,_param->_nb_context); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod, in_DECOD_ACK ,_param->_nb_inst_decod); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_DEPTH ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_TYPE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_OPERATION ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_ADDRESS ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_IMMEDIAT ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RA ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RB ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_WRITE_RD ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_WRITE_RE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_ACK ,_param->_nb_inst_decod); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod); +// INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod); +// INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DECOD_ENABLE ,_param->_nb_context); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DEPTH ,_param->_nb_context); + INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_VAL ); + INSTANCE_SC_SIGNAL (_Decod, in_CONTEXT_EVENT_ACK ); + if (_param->_have_port_context_id) + INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_CONTEXT_ID ); + INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_TYPE ); + INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_IS_DELAY_SLOT ); + INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_ADDRESS ); + INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_ADDRESS_EPCR ); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + const int32_t percent_transaction_ifetch = 75; + const int32_t percent_transaction_decod = 75; + const int32_t percent_transaction_predict = 75; + const int32_t percent_transaction_event = 75; + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration request [_param->_nb_context]; + + uint32_t w; + uint32_t x = 0xfc; + uint32_t y = 0x100; + uint32_t z = 0x104; + + uint32_t delay_slot_previous [_param->_nb_context]; + uint32_t delay_slot_current [_param->_nb_context]; + uint32_t delay_slot_next [_param->_nb_context]; + +#define SEQ do {x=y; y=z; z+=4;} while(0); +#define JMP(j) do {x=y; y=z; z =j;} while(0); + + // ===== l.add r15, r4 , r8 + request [0].push_back (entry_t( + //instruction,address_previous,address,address_next + 0xe1e44000,x,y,z, + //branch_state,branch_update_prediction_id,branch_condition,branch_stack_write,branch_direction, branch_address_dest + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0,0x0, + //depth,type,operation,is_delay_slot + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + //has_immediat,immediat,read_ra,reg_ra,read_rb,reg_rb,read_rc,reg_rc,write_rd,reg_rd,write_re,reg_re + 0,0x00000000,1, 4,1, 8,0,0 ,1,15,1,SPR_LOGIC_SR_CY_OV, + //exception_use,context_event_type + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addc r15, r4 , r31 + request [0].push_back (entry_t( + 0xe1e4f801,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0,0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 0,0x00000000,1, 4,1,31,1,SPR_LOGIC_SR_CY_OV,1,15,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addi r7 , r12, -1 + request [0].push_back (entry_t( + 0x9cecffff,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 1,0xffffffff,1,12,0, 0,0,0 ,1,7 ,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addi r8 , r17, 0 + request [0].push_back (entry_t( + 0x9d110000,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 1,0x00000000,1,17,0, 0,0,0 ,1,8 ,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addi r21, r7 , 1981 + request [0].push_back (entry_t( + 0x9ea707bd,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 1,0x000007bd,1, 7,0, 0,0,0 ,1,21,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addic r7 , r12, -1 + request [0].push_back (entry_t( + 0xa0ecffff,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 1,0xffffffff,1,12,0, 0,1,SPR_LOGIC_SR_CY_OV,1,7 ,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addic r8 , r17, 0 + request [0].push_back (entry_t( + 0xa1110000,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 1,0x00000000,1,17,0, 0,1,SPR_LOGIC_SR_CY_OV,1,8 ,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.addic r21, r7 , 1981 + request [0].push_back (entry_t( + 0xa2a707bd,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, + 1,0x000007bd,1, 7,0, 0,1,SPR_LOGIC_SR_CY_OV,1,21,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.and r24, r0 , r14 + request [0].push_back (entry_t( + 0xe3007003,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_AND,false, + 0,0x0 ,1, 0,1,14,0,0 ,1,24,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.andi r24, r4 , 1981 + request [0].push_back (entry_t( + 0xa70407bd,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_ALU,OPERATION_ALU_L_AND,false, + 1,0x000007bd,1, 4,0,0 ,0,0 ,1,24,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.bf 11 + w = y+(11<<2); + request [0].push_back (entry_t( + 0x1000000b,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_SET,0, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_F,false, + 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.cmov r30, r10, r20 + request [0].push_back (entry_t( + 0xe3caa00e,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MOVE,OPERATION_MOVE_L_CMOV,true, + 0,0x0,1,10,1,20,1,SPR_LOGIC_SR_F ,1,30,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.div r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa309,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MUL_DIV,OPERATION_MUL_DIV_L_DIV,false, + 0,0x0,1,10,1,20,0,0 ,1,30,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.bf -9 + w = y+(-9<<2); + request [0].push_back (entry_t( + 0x13fffff7,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_SET,1, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_F,false, + 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.divu r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa30a,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MUL_DIV,OPERATION_MUL_DIV_L_DIVU,true, + 0,0x0,1,10,1,20,0,0 ,1,30,1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.extbs r30,r10 + request [0].push_back (entry_t( + 0xe3ca004c,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false, + 1,8 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.bnf 11 + w = y+(11<<2); + request [0].push_back (entry_t( + 0x0c00000b,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_UNSET,0, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_NF,false, + 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.extbz r30,r10 + request [0].push_back (entry_t( + 0xe3ca00cc,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,true , + 1,8 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.exths r30,r10 + request [0].push_back (entry_t( + 0xe3ca000c,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false, + 1,16 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.bnf -9 + w = y+(-9<<2); + request [0].push_back (entry_t( + 0x0ffffff7,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_UNSET,1, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_NF,false, + 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.exthz r30,r10 + request [0].push_back (entry_t( + 0xe3ca008c,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,true , + 1,16 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.extws r30,r10 + request [0].push_back (entry_t( + 0xe3ca000d,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false, + 1,32 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.extwz r30,r10 + request [0].push_back (entry_t( + 0xe3ca004d,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,false, + 1,32 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.csync + request [0].push_back (entry_t( + 0x23000000,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_CSYNC,false, + 0,0 ,0,0 ,0,0 ,0,0 ,0,0 ,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_CSYNC)); + SEQ; + + // ===== l.ff1 r30,r10 + request [0].push_back (entry_t( + 0xe3ca000f,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_FIND,OPERATION_FIND_L_FF1,false, + 0,0 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.fl1 r30,r10 + request [0].push_back (entry_t( + 0xe3ca010f,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_FIND,OPERATION_FIND_L_FL1,false, + 0,0 ,1,10,0,0 ,0,0 ,1,30,0,0 , + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.j 1018 + w = y+(1018<<2); + request [0].push_back (entry_t( + 0x000003fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,1, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_NONE,false, + 0,0,0, 0,0,0 ,0,0 ,0,0 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.lbs r30,0x3fa(r10) + request [0].push_back (entry_t( + 0x93ca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_8_S,true, + 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.lbz r30,0x3fa(r10) + request [0].push_back (entry_t( + 0x8fca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_8_Z,false, + 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.j -1018 + w = y+(-1018<<2); + request [0].push_back (entry_t( + 0x03fffc06,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,1, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_NONE,false, + 0,0,0, 0,0,0 ,0,0 ,0,0 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.lhs r30,0x3fa(r10) + request [0].push_back (entry_t( + 0x9bca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_16_S,true, + 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.lhz r30,0x3fa(r10) + request [0].push_back (entry_t( + 0x97ca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_16_Z,false, + 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.jal 1018 + w = y+(1018<<2); + request [0].push_back (entry_t( + 0x040003fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITH_WRITE_STACK,1, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, + 1,z+4,0, 0,0,0 ,0,0 ,1,9 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.lws r30,0x3fa(r10) + request [0].push_back (entry_t( + 0x8bca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_32_S,true, + 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.lwz r30,0x3fa(r10) + request [0].push_back (entry_t( + 0x87ca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_32_Z,false, + 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.jal -1018 + w = y+(-1018<<2); + request [0].push_back (entry_t( + 0x07fffc06,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITH_WRITE_STACK,1, w, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, + 1,z+4,0, 0,0,0 ,0,0 ,1,9 ,0,0 , + EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); + JMP(w); + + // ===== l.ld r30,1018(r10) + request [0].push_back (entry_t( + 0x83ca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_64_S,true, + 1,1018,1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.ld r30,-1018(r10) + request [0].push_back (entry_t( + 0x83cafc06,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_64_S,false, + 1,static_cast(-1018),1,10,0,0 ,0,0,1,30,0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.jalr r20 + request [0].push_back (entry_t( + 0x4800a000,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK,1, z, // branch_address_dest can be determined if BRANCH_STATE != NONE (also : previous prediction) + 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, + 0,0 ,0,0 ,1,20,0,0,1,9 ,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.mac r10,r20 + request [0].push_back (entry_t( + 0xc40aa001,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,true, + 0,0,1,10,1,20,0,0,0,0,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.maci r10,1018 + request [0].push_back (entry_t( + 0x4c0a03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,false, + 1,1018,1,10,0,0,0,0,0,0,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.maci r10,-1018 + request [0].push_back (entry_t( + 0x4fea0406,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,false, + 1,static_cast(-1018),1,10,0,0,0,0,0,0,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.jr r10 + request [0].push_back (entry_t( + 0x44005000,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK,1, z, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, + 0,0 ,0, 0,1,10,0,0,0,0 ,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.macrc r30 + request [0].push_back (entry_t( + 0x1bc10000,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MACRC,true, + 0,0,0, 0,0, 0,0,0,1,30,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.mfspr r30,r10,1018 + request [0].push_back (entry_t( + 0xb7ca03fa,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MFSPR,false, + 1,1018,1,10,0, 0,0,0,1,30,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.mfspr r30,r10,-1018 + request [0].push_back (entry_t( + 0xb7cafc06,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, + 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MFSPR,false, + 1,0xfc06,1,10,0, 0,0,0,1,30,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.jr r9 + request [0].push_back (entry_t( + 0x44004800,x,y,z, + BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_STACK,1, z, + 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, + 0,0 ,0, 0,1,9,0,0,0,0 ,0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.movhi r30,0x3fa + request [0].push_back (entry_t( + 0x1bc003fa,x,y,z, + 0,0,0,0,0,0, + TYPE_MOVE,OPERATION_MOVE_L_MOVHI,true, + 1,0x3fa,0,0, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.movhi r30,0xfc06 + request [0].push_back (entry_t( + 0x1bc0fc06,x,y,z, + 0,0,0,0,0,0, + TYPE_MOVE,OPERATION_MOVE_L_MOVHI,false, + 1,0xfc06,0,0, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.msb r10,r20 + request [0].push_back (entry_t( + 0xc40aa002,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_MSB,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.msync + request [0].push_back (entry_t( + 0x22000000,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_MSYNC,false, + 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_MSYNC)); + SEQ; + + // ===== l.mtspr r10,r20,0x3fa + request [0].push_back (entry_t( + 0xc00aa3fa,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_MTSPR,false, + 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.mtspr r10,r20,0xfc06 + request [0].push_back (entry_t( + 0xc3eaa406,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_MTSPR,false, + 1,0xfc06, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); + SEQ; + + // ===== l.mul r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa306,x,y,z, + 0,0,0,0,0,0, + TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.muli r30,r10,0x3fa + request [0].push_back (entry_t( + 0xb3ca03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false, + 1,0x3fa, 1,10, 0,0, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.muli r30,r10,0xfffffc06 + request [0].push_back (entry_t( + 0xb3cafc06,x,y,z, + 0,0,0,0,0,0, + TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.mulu r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa30b,x,y,z, + 0,0,0,0,0,0, + TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MULU,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.nop 0x3fa + request [0].push_back (entry_t( + 0x150003fa,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_NOP,false, + 0,0x3fa, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.nop 0xfc06 + request [0].push_back (entry_t( + 0x1500fc06,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_NOP,false, + 0,0xfc06, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.or r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa004,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_OR,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.ori r30,r10,0x3fa + request [0].push_back (entry_t( + 0xabca03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_OR,false, + 1,0x3fa, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.ori r30,r10,0xfc06 + request [0].push_back (entry_t( + 0xabcafc06,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_OR,false, + 1,0xfc06, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.psync + request [0].push_back (entry_t( + 0x22800000,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_PSYNC,false, + 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_PSYNC)); + SEQ; + + // ===== l.ror r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa0c8,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.rori r30,r10,0x3f + request [0].push_back (entry_t( + 0xbbca00ff,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false, + 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.rori r30,r10,0x1 + request [0].push_back (entry_t( + 0xbbca00c1,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false, + 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sb 0x3fa(r10),r20 + request [0].push_back (entry_t( + 0xd80aa3fa,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_8,false, + 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sb 0xfffffc06(r10),r20 + request [0].push_back (entry_t( + 0xdbeaa406,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_8,false, + 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sd 0x3fa(r10),r20 + request [0].push_back (entry_t( + 0xd00aa3fa,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_64,false, + 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sd 0xfffffc06(r10),r20 + request [0].push_back (entry_t( + 0xd3eaa406,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_64,false, + 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sh 0x3fa(r10),r20 + request [0].push_back (entry_t( + 0xdc0aa3fa,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_16,false, + 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sh 0xfffffc06(r10),r20 + request [0].push_back (entry_t( + 0xdfeaa406,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_16,false, + 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sw 0x3fa(r10),r20 + request [0].push_back (entry_t( + 0xd40aa3fa,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_32,false, + 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sw 0xfffffc06(r10),r20 + request [0].push_back (entry_t( + 0xd7eaa406,x,y,z, + 0,0,0,0,0,0, + TYPE_MEMORY,OPERATION_MEMORY_STORE_32,false, + 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, + EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sll r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa008,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.slli r30,r10,0x1 + request [0].push_back (entry_t( + 0xbbca0001,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false, + 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.slli r30,r10,0x3f + request [0].push_back (entry_t( + 0xbbca003f,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false, + 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sra r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa088,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.srai r30,r10,0x1 + request [0].push_back (entry_t( + 0xbbca0081,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false, + 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.srai r30,r10,0x3f + request [0].push_back (entry_t( + 0xbbca00bf,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false, + 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.srl r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa048,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.srli r30,r10,0x1 + request [0].push_back (entry_t( + 0xbbca0041,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false, + 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.srli r30,r10,0x3f + request [0].push_back (entry_t( + 0xbbca007f,x,y,z, + 0,0,0,0,0,0, + TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false, + 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.xor r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa005,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_XOR,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.xori r30,r10,0x3fa + request [0].push_back (entry_t( + 0xafca03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_XOR,false, + 1,0x3fa, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.xori r30,r10,0xfffffc06 + request [0].push_back (entry_t( + 0xafcafc06,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_XOR,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 1,30, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sub r30,r10,r20 + request [0].push_back (entry_t( + 0xe3caa002,x,y,z, + 0,0,0,0,0,0, + TYPE_ALU,OPERATION_ALU_L_SUB,false, + 0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, + EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sys 0x3fa + request [0].push_back (entry_t( + 0x200003fa,x,y,z, + 0,0,0,0,0,z, + TYPE_SPECIAL,OPERATION_SPECIAL_L_SYS,false, + 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_SYSCALL,EVENT_TYPE_EXCEPTION)); + SEQ; + + // ===== l.sys 0xfc06 + request [0].push_back (entry_t( + 0x2000fc06,x,y,z, + 0,0,0,0,0,z, + TYPE_SPECIAL,OPERATION_SPECIAL_L_SYS,false, + 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_SYSCALL,EVENT_TYPE_EXCEPTION)); + SEQ; + + // ===== l.trap 0x3fa + request [0].push_back (entry_t( + 0x210003fa,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_TRAP,false, + 1,0x3fa, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_TRAP,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.trap 0xfc06 + request [0].push_back (entry_t( + 0x2100fc06,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_TRAP,false, + 1,0xfc06, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_TRAP,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.rfe + request [0].push_back (entry_t( + 0x24000000,x,y,z, + 0,0,0,0,0,0, + TYPE_SPECIAL,OPERATION_SPECIAL_L_RFE,false, + 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfeq r10,r20 + request [0].push_back (entry_t( + 0xe40aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFEQ,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfeqi r10,0x3fa + request [0].push_back (entry_t( + 0xbc0a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFEQ,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfeqi r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbc0afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFEQ,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfne r10,r20 + request [0].push_back (entry_t( + 0xe42aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFNE,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfnei r10,0x3fa + request [0].push_back (entry_t( + 0xbc2a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFNE,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfnei r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbc2afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFNE,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfges r10,r20 + request [0].push_back (entry_t( + 0xe56aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGES,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgesi r10,0x3fa + request [0].push_back (entry_t( + 0xbd6a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGES,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgesi r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbd6afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGES,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgeu r10,r20 + request [0].push_back (entry_t( + 0xe46aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGEU,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgeui r10,0x3fa + request [0].push_back (entry_t( + 0xbc6a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGEU,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgeui r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbc6afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGEU,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgts r10,r20 + request [0].push_back (entry_t( + 0xe54aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGTS,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgtsi r10,0x3fa + request [0].push_back (entry_t( + 0xbd4a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGTS,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgtsi r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbd4afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGTS,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgtu r10,r20 + request [0].push_back (entry_t( + 0xe44aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGTU,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgtui r10,0x3fa + request [0].push_back (entry_t( + 0xbc4a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGTU,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfgtui r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbc4afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFGTU,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfles r10,r20 + request [0].push_back (entry_t( + 0xe5aaa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLES,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sflesi r10,0x3fa + request [0].push_back (entry_t( + 0xbdaa03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLES,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sflesi r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbdaafc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLES,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfleu r10,r20 + request [0].push_back (entry_t( + 0xe4aaa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLEU,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfleui r10,0x3fa + request [0].push_back (entry_t( + 0xbcaa03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLEU,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfleui r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbcaafc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLEU,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sflts r10,r20 + request [0].push_back (entry_t( + 0xe58aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLTS,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfltsi r10,0x3fa + request [0].push_back (entry_t( + 0xbd8a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLTS,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfltsi r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbd8afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLTS,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfltu r10,r20 + request [0].push_back (entry_t( + 0xe48aa000,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLTU,false, + 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfltui r10,0x3fa + request [0].push_back (entry_t( + 0xbc8a03fa,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLTU,false, + 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + // ===== l.sfltui r10,0xfffffc06 + request [0].push_back (entry_t( + 0xbc8afc06,x,y,z, + 0,0,0,0,0,0, + TYPE_TEST,OPERATION_TEST_L_SFLTU,false, + 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, + EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); + SEQ; + + for (uint32_t i=1; i<_param->_nb_context; i++) + { + request[i] = request [0]; + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + delay_slot_current [i] = false; + delay_slot_next [i] = false; + } + + uint32_t nb_request = request[0].size() * _param->_nb_context; + + while (nb_request > 0) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + delay_slot_previous [i] = false; + + in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)_nb_inst_fetch[i]; j++) + in_IFETCH_VAL [i][j]->write(0); + + if ((rand()%100)::iterator it = request [i].begin(); + + if (it!=request [i].end()) + { + uint32_t lsb = (it->_address>>2)%_param->_nb_inst_fetch[i]; + + in_IFETCH_ADDRESS [i]->write(it->_address-(lsb<<2)); + in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE); + if (_param->_have_port_inst_ifetch_ptr) + in_IFETCH_INST_IFETCH_PTR [i]->write(0); + + // Alignement + for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++) + { + in_IFETCH_VAL [i][j]->write(1); + in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction); +// in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next); + if (it->_type == TYPE_BRANCH) + in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state); + in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id); + + if ((it->_is_delay_slot) or + ((++it)==request [i].end())) + break; + } + } + } + } + + { + bool previous_ack = true; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + bool ack = previous_ack and ((rand()%100)write(ack); + + previous_ack = ack; + + in_PREDICT_ACK [i]->write((rand()%100)write(0); + } + } + + in_CONTEXT_EVENT_ACK->write((rand()%100)_nb_context; i++) + for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) + if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read()) + { + LABEL("IFETCH [%d][%d] : transaction",i,j); + nb_inst_ifetch ++; + } + + uint32_t nb_inst_decod = 0; + uint32_t find_event = false; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read()) + { + Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0; + + LABEL("DECOD [%d] : transaction",i ); + LABEL(" * context : %d",context); + + if (_param->_have_port_depth) + TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), request [context].front()._depth ); + TEST(Ttype_t , out_DECOD_TYPE [i]->read(), request [context].front()._type ); + TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), request [context].front()._operation ); + TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), request [context].front()._is_delay_slot); + TEST(Tcontrol_t , delay_slot_current [context] , request [context].front()._is_delay_slot); + TEST(Tgeneral_data_t , out_DECOD_ADDRESS [i]->read(), request [context].front()._address ); + TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), request [context].front()._has_immediat ); + if (request [context].front()._has_immediat) + TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), request [context].front()._immediat ); + TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), request [context].front()._read_ra ); + if (request [context].front()._read_ra) + TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), request [context].front()._num_reg_ra ); + TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), request [context].front()._read_rb ); + if (request [context].front()._read_rb) + TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), request [context].front()._num_reg_rb ); + TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), request [context].front()._read_rc ); + if (request [context].front()._read_rc) + TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), request [context].front()._num_reg_rc ); + TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), request [context].front()._write_rd ); + if (request [context].front()._write_rd) + TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), request [context].front()._num_reg_rd ); + TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), request [context].front()._write_re ); + if (request [context].front()._write_re) + TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), request [context].front()._num_reg_re ); + TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), request [context].front()._exception_use); + + if (request [context].front()._type == TYPE_BRANCH) + { + delay_slot_next [context] = true; + + TEST(Tcontrol_t, out_PREDICT_VAL[i]->read(), true); + TEST(Tcontrol_t, in_PREDICT_ACK[i]->read(), true); + + LABEL("PREDICT [%d] : transaction",i ); + + if (_param->_have_port_context_id) + TEST(Tcontext_t , out_PREDICT_CONTEXT_ID [i]->read(), context); + TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [i]->read(),((request [context].front()._address>>2)%_param->_nb_inst_fetch[context]) == 0); + TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [i]->read(), request [context].front()._branch_state ); + if (_param->_have_port_branch_update_prediction_id) + TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(), request [context].front()._branch_update_prediction_id); + TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [i]->read(), request [context].front()._branch_condition ); +// TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [i]->read(), request [context].front()._branch_stack_write ); + TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [i]->read(), request [context].front()._branch_direction ); + TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [i]->read(), request [context].front()._address ); + TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [i]->read(), request [context].front()._branch_address_dest ); + } + else + { + TEST(Tcontrol_t, out_PREDICT_VAL[i]->read(), false); + } + + TEST(bool, find_event, false); // can continue decod after event + if (request [context].front()._context_event_type != EVENT_TYPE_NONE) + { + find_event = true; + + LABEL("CONTEXT_EVENT : transaction"); + + if (_param->_have_port_context_id) + TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), context); + TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), request [context].front()._context_event_type); + TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), request [context].front()._is_delay_slot); + TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), request [context].front()._address ); + TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), request [context].front()._address_next ); + + } + + TEST(bool, delay_slot_previous [context], false); // can't continue + delay_slot_previous [context] = delay_slot_current [context]; + delay_slot_current [context] = delay_slot_next [context]; + delay_slot_next [context] = false; + + request [context].pop_front(); + nb_inst_decod ++; + nb_request --; + } + + TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event); + TEST(uint32_t, nb_inst_decod, nb_inst_ifetch); + + SC_START(1); + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_IFETCH_VAL ; + delete [] out_IFETCH_ACK ; + delete [] in_IFETCH_INSTRUCTION ; + delete [] in_IFETCH_CONTEXT_ID ; + delete [] in_IFETCH_ADDRESS ; +// delete [] in_IFETCH_ADDRESS_NEXT ; + delete [] in_IFETCH_INST_IFETCH_PTR ; + delete [] in_IFETCH_BRANCH_STATE ; + delete [] in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ; + + delete [] out_DECOD_VAL ; + delete [] in_DECOD_ACK ; + delete [] out_DECOD_CONTEXT_ID ; + delete [] out_DECOD_DEPTH ; + delete [] out_DECOD_TYPE ; + delete [] out_DECOD_OPERATION ; + delete [] out_DECOD_IS_DELAY_SLOT ; + delete [] out_DECOD_ADDRESS ; + delete [] out_DECOD_HAS_IMMEDIAT ; + delete [] out_DECOD_IMMEDIAT ; + delete [] out_DECOD_READ_RA ; + delete [] out_DECOD_NUM_REG_RA ; + delete [] out_DECOD_READ_RB ; + delete [] out_DECOD_NUM_REG_RB ; + delete [] out_DECOD_READ_RC ; + delete [] out_DECOD_NUM_REG_RC ; + delete [] out_DECOD_WRITE_RD ; + delete [] out_DECOD_NUM_REG_RD ; + delete [] out_DECOD_WRITE_RE ; + delete [] out_DECOD_NUM_REG_RE ; + delete [] out_DECOD_EXCEPTION_USE ; + + delete [] out_PREDICT_VAL ; + delete [] in_PREDICT_ACK ; + delete [] out_PREDICT_CONTEXT_ID ; + delete [] out_PREDICT_MATCH_INST_IFETCH_PTR ; + delete [] out_PREDICT_BRANCH_STATE ; + delete [] out_PREDICT_BRANCH_UPDATE_PREDICTION_ID; + delete [] out_PREDICT_BRANCH_CONDITION ; +// delete [] out_PREDICT_BRANCH_STACK_WRITE ; + delete [] out_PREDICT_BRANCH_DIRECTION ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; +// delete [] in_PREDICT_CAN_CONTINUE ; + + delete [] in_CONTEXT_DECOD_ENABLE ; + delete [] in_CONTEXT_DEPTH ; + + delete out_CONTEXT_EVENT_VAL ; + delete in_CONTEXT_EVENT_ACK ; + delete out_CONTEXT_EVENT_CONTEXT_ID ; + delete out_CONTEXT_EVENT_TYPE ; + delete out_CONTEXT_EVENT_IS_DELAY_SLOT ; + delete out_CONTEXT_EVENT_ADDRESS ; + delete out_CONTEXT_EVENT_ADDRESS_EPCR ; +#endif + + delete _Decod; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/Decod.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/Decod.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/Decod.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Decod} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 78) @@ -0,0 +1,203 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_Decod_h +#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_Decod_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + + class Decod +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; + public : counter_t * _stat_sum_inst_decod; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "ifetch_unit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) *** in_IFETCH_VAL ;//[nb_context][nb_inst_fetch] + public : SC_OUT(Tcontrol_t ) *** out_IFETCH_ACK ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tinstruction_t ) *** in_IFETCH_INSTRUCTION ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tcontext_t ) ** in_IFETCH_CONTEXT_ID ;//[nb_context] + public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS ;//[nb_context] +//public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS_NEXT ;//[nb_context] + public : SC_IN (Tinst_ifetch_ptr_t ) ** in_IFETCH_INST_IFETCH_PTR ;//[nb_context] + public : SC_IN (Tbranch_state_t ) ** in_IFETCH_BRANCH_STATE ;//[nb_context] + public : SC_IN (Tprediction_ptr_t ) ** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context] + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_DECOD_VAL ;//[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_inst_decod] + public : SC_OUT(Tcontext_t ) ** out_DECOD_CONTEXT_ID ;//[nb_inst_decod] + public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ;//[nb_inst_decod] + public : SC_OUT(Ttype_t ) ** out_DECOD_TYPE ;//[nb_inst_decod] + public : SC_OUT(Toperation_t ) ** out_DECOD_OPERATION ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_IS_DELAY_SLOT ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_ADDRESS ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_HAS_IMMEDIAT ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_IMMEDIAT ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_READ_RA ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_NUM_REG_RA ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_READ_RB ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_NUM_REG_RB ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_READ_RC ;//[nb_inst_decod] + public : SC_OUT(Tspecial_address_t ) ** out_DECOD_NUM_REG_RC ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_WRITE_RD ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_NUM_REG_RD ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_WRITE_RE ;//[nb_inst_decod] + public : SC_OUT(Tspecial_address_t ) ** out_DECOD_NUM_REG_RE ;//[nb_inst_decod] + public : SC_OUT(Texception_t ) ** out_DECOD_EXCEPTION_USE ;//[nb_inst_decod] + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_VAL ;//[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_ACK ;//[nb_inst_decod] + public : SC_OUT(Tcontext_t ) ** out_PREDICT_CONTEXT_ID ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_MATCH_INST_IFETCH_PTR ;//[nb_inst_decod] + public : SC_OUT(Tbranch_state_t ) ** out_PREDICT_BRANCH_STATE ;//[nb_inst_decod] + public : SC_OUT(Tprediction_ptr_t ) ** out_PREDICT_BRANCH_UPDATE_PREDICTION_ID;//[nb_inst_decod] + public : SC_OUT(Tbranch_condition_t) ** out_PREDICT_BRANCH_CONDITION ;//[nb_inst_decod] +//public : SC_OUT(Tcontrol_t ) ** out_PREDICT_BRANCH_STACK_WRITE ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_BRANCH_DIRECTION ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_SRC ;//[nb_inst_decod] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_DEST ;//[nb_inst_decod] +//public : SC_IN (Tcontrol_t ) ** in_PREDICT_CAN_CONTINUE ;//[nb_inst_decod] + + // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_CONTEXT_DECOD_ENABLE ;//[nb_context] + public : SC_IN (Tdepth_t ) ** in_CONTEXT_DEPTH ;//[nb_context] + + // ~~~~~[ Interface : "context_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_CONTEXT_EVENT_VAL ; + public : SC_IN (Tcontrol_t ) * in_CONTEXT_EVENT_ACK ; + public : SC_OUT(Tcontext_t ) * out_CONTEXT_EVENT_CONTEXT_ID ; + public : SC_OUT(Tevent_type_t ) * out_CONTEXT_EVENT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_CONTEXT_EVENT_IS_DELAY_SLOT ; + public : SC_OUT(Tgeneral_data_t ) * out_CONTEXT_EVENT_ADDRESS ; + public : SC_OUT(Tgeneral_data_t ) * out_CONTEXT_EVENT_ADDRESS_EPCR ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t reg_CONTEXT_PRIORITY; + private : Tgeneral_data_t * reg_CONTEXT_ADDRESS_PREVIOUS ; //[nb_context] + private : Tcontrol_t * reg_CONTEXT_IS_DELAY_SLOT ; //[nb_context] + private : Tcontrol_t * internal_CONTEXT_HAVE_TRANSACTION; //[nb_context] + private : Tgeneral_data_t * internal_CONTEXT_ADDRESS_PREVIOUS; //[nb_context] + private : Tcontrol_t * internal_CONTEXT_IS_DELAY_SLOT ; //[nb_context] + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : decod_instruction_t * _decod_instruction; + private : decod_param_t ** _decod_param ; //[nb_context] + private : function_decod_t **** _function_decod ; //[nb_context][type][opcod] + private : std::list select; +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Decod); +#endif + public : Decod + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Decod (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMealy (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h (revision 78) @@ -0,0 +1,84 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/Custom/include/Custom.h" +#include "Behavioural/Custom/include/Custom_default.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_context ; + public : uint32_t * _nb_inst_fetch ; //[nb_context] + public : uint32_t _nb_inst_decod ; + public : uint32_t _size_general_data ; + public : uint32_t _nb_branch_speculated ; + public : uint32_t _size_branch_update_prediction; + public : uint32_t _nb_context_select ; + public : Tpriority_t _priority ; + public : Tload_balancing_t _load_balancing ; + public : bool ** _instruction_implemeted ; //[nb_context][nb_instruction] + public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t); + + public : uint32_t _max_nb_inst_fetch ; + + public : uint32_t _size_context_id ; + public : uint32_t _size_depth ; + public : uint32_t _size_inst_ifetch_ptr ; + + public : bool _have_port_context_id ; + public : bool _have_port_depth ; + public : bool _have_port_branch_update_prediction_id; + public : bool _have_port_inst_ifetch_ptr ; + + //-----[ methods ]----------------------------------------------------------- + + public : Parameters (uint32_t nb_context , + uint32_t * nb_inst_fetch , + uint32_t nb_inst_decod , + uint32_t size_general_data , + uint32_t nb_branch_speculated , + uint32_t size_branch_update_prediction, + uint32_t nb_context_select , + Tpriority_t priority , + Tload_balancing_t load_balancing , + bool ** instruction_implemeted , + morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)); + +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters & x); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Types.h (revision 78) @@ -0,0 +1,44 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_decod_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + class select_t + { + public : uint32_t _context ; + public : uint32_t _inst_fetch; + + public : select_t (uint32_t context, + uint32_t inst_fetch) + { + _context = context ; + _inst_fetch = inst_fetch; + } + }; + + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp (revision 78) @@ -0,0 +1,638 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::Decod" + Decod::Decod + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + log_printf(INFO,Decod,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Decod,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Decod,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Decod,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Decod,FUNCTION,"Method - genMealy"); + + SC_METHOD (genMealy); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg() //use internal register + << (*(in_CONTEXT_EVENT_ACK)); + for (uint32_t i=0; i<_param->_nb_context; i++) + { + for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++) + sensitive << (*(in_IFETCH_VAL [i][j])) + << (*(in_IFETCH_INSTRUCTION [i][j])); + sensitive << (*(in_IFETCH_ADDRESS [i])) +// << (*(in_IFETCH_ADDRESS_NEXT [i])) + << (*(in_IFETCH_BRANCH_STATE [i])) + << (*(in_CONTEXT_DECOD_ENABLE [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_IFETCH_CONTEXT_ID [i])); + if (_param->_have_port_branch_update_prediction_id) + sensitive << (*(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i])); + if (_param->_have_port_depth) + sensitive << (*(in_CONTEXT_DEPTH [i])); + if (_param->_have_port_inst_ifetch_ptr) + sensitive << (*(in_IFETCH_INST_IFETCH_PTR [i])); + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + sensitive << (*(in_DECOD_ACK [i])) + << (*(in_PREDICT_ACK [i])) +// << (*(in_PREDICT_CAN_CONTINUE [i])) + ; + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++) + { + (*(out_IFETCH_ACK [i][j])) (*(in_IFETCH_VAL [i][j])); + (*(out_IFETCH_ACK [i][j])) (*(in_IFETCH_INSTRUCTION [i][j])); + if (_param->_have_port_context_id) + (*(out_IFETCH_ACK [i][j])) (*(in_IFETCH_CONTEXT_ID [i] )); + (*(out_IFETCH_ACK [i][j])) (*(in_CONTEXT_DECOD_ENABLE [i] )); + (*(out_IFETCH_ACK [i][j])) (*(in_CONTEXT_EVENT_ACK )); + for (uint32_t x=0; x<_param->_nb_inst_decod; x++) + { + (*(out_IFETCH_ACK [i][j])) (*(in_DECOD_ACK [x])); + (*(out_IFETCH_ACK [i][j])) (*(in_PREDICT_ACK [x])); +// (*(out_IFETCH_ACK [i][j])) (*(in_PREDICT_CAN_CONTINUE [x])); + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + + (*(out_DECOD_VAL [i])) (*(in_PREDICT_ACK [i])); +// (*(out_DECOD_VAL [i])) (*(in_PREDICT_CAN_CONTINUE [i])); + (*(out_DECOD_VAL [i])) (*(in_CONTEXT_EVENT_ACK )); + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_VAL [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_VAL [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_VAL [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_VAL [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + if (_param->_have_port_context_id) + { + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_CONTEXT_ID [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + (*(out_DECOD_CONTEXT_ID [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_CONTEXT_ID [i])) (*(in_IFETCH_VAL [x][y])); + } + } + } + + if (_param->_have_port_depth) + { + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_DEPTH [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + (*(out_DECOD_DEPTH [i])) (*(in_CONTEXT_DEPTH [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_DEPTH [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_DEPTH [i])) (*(in_IFETCH_VAL [x][y])); + } + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_TYPE [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_TYPE [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_TYPE [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_TYPE [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_OPERATION [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_OPERATION [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_OPERATION [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_OPERATION [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_IS_DELAY_SLOT [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_IS_DELAY_SLOT [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_IS_DELAY_SLOT [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_IS_DELAY_SLOT [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_HAS_IMMEDIAT [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_HAS_IMMEDIAT [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_HAS_IMMEDIAT [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_HAS_IMMEDIAT [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_READ_RA [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_READ_RA [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_READ_RA [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_READ_RA [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_NUM_REG_RA [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_NUM_REG_RA [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_NUM_REG_RA [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_NUM_REG_RA [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_READ_RB [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_READ_RB [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_READ_RB [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_READ_RB [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_NUM_REG_RB [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_NUM_REG_RB [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_NUM_REG_RB [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_NUM_REG_RB [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_READ_RC [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_READ_RC [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_READ_RC [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_READ_RC [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_NUM_REG_RC [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_NUM_REG_RC [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_NUM_REG_RC [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_NUM_REG_RC [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_WRITE_RD [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_WRITE_RD [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_WRITE_RD [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_WRITE_RD [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_NUM_REG_RD [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_NUM_REG_RD [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_NUM_REG_RD [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_NUM_REG_RD [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_WRITE_RE [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_WRITE_RE [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_WRITE_RE [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_WRITE_RE [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_NUM_REG_RE [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_NUM_REG_RE [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_NUM_REG_RE [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_NUM_REG_RE [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_EXCEPTION_USE [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_EXCEPTION_USE [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_EXCEPTION_USE [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_EXCEPTION_USE [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_ADDRESS [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_ADDRESS [i])) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_DECOD_ADDRESS [i])) (*(in_IFETCH_ADDRESS [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_ADDRESS [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_ADDRESS [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_DECOD_IMMEDIAT [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_DECOD_IMMEDIAT [i])) (*(in_IFETCH_CONTEXT_ID [x])); +// (*(out_DECOD_IMMEDIAT [i])) (*(in_IFETCH_ADDRESS_NEXT [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_DECOD_IMMEDIAT [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_DECOD_IMMEDIAT [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + if (_param->_have_port_context_id) + { + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_CONTEXT_ID [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + (*(out_PREDICT_CONTEXT_ID [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_CONTEXT_ID [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_CONTEXT_ID [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_MATCH_INST_IFETCH_PTR [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_MATCH_INST_IFETCH_PTR [i])) (*(in_IFETCH_CONTEXT_ID [x])); + if (_param->_have_port_inst_ifetch_ptr) + (*(out_PREDICT_MATCH_INST_IFETCH_PTR [i])) (*(in_IFETCH_INST_IFETCH_PTR [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_MATCH_INST_IFETCH_PTR [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_MATCH_INST_IFETCH_PTR [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_BRANCH_STATE [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_BRANCH_STATE [i])) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_PREDICT_BRANCH_STATE [i])) (*(in_IFETCH_BRANCH_STATE [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_BRANCH_STATE [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_BRANCH_STATE [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + if (_param->_have_port_branch_update_prediction_id) + { + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i])) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i])) (*(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_BRANCH_CONDITION [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_BRANCH_CONDITION [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_BRANCH_CONDITION [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_BRANCH_CONDITION [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + +// for (uint32_t x=0; x<_param->_nb_context; x++) +// { +// (*(out_PREDICT_BRANCH_STACK_WRITE [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); +// if (_param->_have_port_context_id) +// (*(out_PREDICT_BRANCH_STACK_WRITE [i])) (*(in_IFETCH_CONTEXT_ID [x])); +// for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) +// { +// (*(out_PREDICT_BRANCH_STACK_WRITE [i])) (*(in_IFETCH_VAL [x][y])); +// (*(out_PREDICT_BRANCH_STACK_WRITE [i])) (*(in_IFETCH_INSTRUCTION [x][y])); +// } +// } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_BRANCH_DIRECTION [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_BRANCH_DIRECTION [i])) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_BRANCH_DIRECTION [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_BRANCH_DIRECTION [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_IFETCH_ADDRESS [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_IFETCH_ADDRESS [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + + } + + + (*(out_PREDICT_VAL [i])) (*(in_CONTEXT_EVENT_ACK)); + (*(out_PREDICT_VAL [i])) (*(in_DECOD_ACK [i])); + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_PREDICT_VAL [i])) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_PREDICT_VAL [i])) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_PREDICT_VAL [i])) (*(in_IFETCH_ADDRESS [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_PREDICT_VAL [i])) (*(in_IFETCH_VAL [x][y])); + (*(out_PREDICT_VAL [i])) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + (*(out_CONTEXT_EVENT_VAL)) (*(in_PREDICT_ACK [i])); +// (*(out_CONTEXT_EVENT_VAL)) (*(in_PREDICT_CAN_CONTINUE [i])); + (*(out_CONTEXT_EVENT_VAL)) (*(in_DECOD_ACK [i])); + } + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_CONTEXT_EVENT_VAL)) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_CONTEXT_EVENT_VAL)) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_CONTEXT_EVENT_VAL)) (*(in_IFETCH_ADDRESS [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_CONTEXT_EVENT_VAL)) (*(in_IFETCH_VAL [x][y])); + (*(out_CONTEXT_EVENT_VAL)) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + if (_param->_have_port_context_id) + { + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_CONTEXT_EVENT_CONTEXT_ID)) (*(in_CONTEXT_DECOD_ENABLE [x])); + (*(out_CONTEXT_EVENT_CONTEXT_ID)) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_CONTEXT_EVENT_CONTEXT_ID)) (*(in_IFETCH_VAL [x][y])); + (*(out_CONTEXT_EVENT_CONTEXT_ID)) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_CONTEXT_EVENT_TYPE)) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_CONTEXT_EVENT_TYPE)) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_CONTEXT_EVENT_TYPE)) (*(in_IFETCH_VAL [x][y])); + (*(out_CONTEXT_EVENT_TYPE)) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_CONTEXT_EVENT_IS_DELAY_SLOT)) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_CONTEXT_EVENT_IS_DELAY_SLOT)) (*(in_IFETCH_CONTEXT_ID [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_CONTEXT_EVENT_IS_DELAY_SLOT)) (*(in_IFETCH_VAL [x][y])); + (*(out_CONTEXT_EVENT_IS_DELAY_SLOT)) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_CONTEXT_EVENT_ADDRESS)) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_CONTEXT_EVENT_ADDRESS)) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_CONTEXT_EVENT_ADDRESS)) (*(in_IFETCH_ADDRESS [x])); +// (*(out_CONTEXT_EVENT_ADDRESS)) (*(in_IFETCH_ADDRESS_NEXT [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_CONTEXT_EVENT_ADDRESS)) (*(in_IFETCH_VAL [x][y])); + (*(out_CONTEXT_EVENT_ADDRESS)) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + + for (uint32_t x=0; x<_param->_nb_context; x++) + { + (*(out_CONTEXT_EVENT_ADDRESS_EPCR)) (*(in_CONTEXT_DECOD_ENABLE [x])); + if (_param->_have_port_context_id) + (*(out_CONTEXT_EVENT_ADDRESS_EPCR)) (*(in_IFETCH_CONTEXT_ID [x])); + (*(out_CONTEXT_EVENT_ADDRESS_EPCR)) (*(in_IFETCH_ADDRESS [x])); +// (*(out_CONTEXT_EVENT_ADDRESS_EPCR)) (*(in_IFETCH_ADDRESS_NEXT [x])); + for (uint32_t y=0; y<_param->_nb_inst_fetch [x]; y++) + { + (*(out_CONTEXT_EVENT_ADDRESS_EPCR)) (*(in_IFETCH_VAL [x][y])); + (*(out_CONTEXT_EVENT_ADDRESS_EPCR)) (*(in_IFETCH_INSTRUCTION [x][y])); + } + } + +# endif + + } +#endif + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Decod::~Decod" + Decod::~Decod (void) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Decod,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 78) @@ -0,0 +1,437 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + + +#undef FUNCTION +#define FUNCTION "Decod::allocation" + void Decod::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Decod" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "ifetch" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC2_INTERFACE("ifetch", IN, WEST, "Instruction's bundle", _param->_nb_context, _param->_nb_inst_fetch[alloc_interface_it1]); + + + _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]); + _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]); + } + { + ALLOC1_INTERFACE("ifetch", IN, WEST, "Instruction's bundle", _param->_nb_context); + + ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_general_data ); +// ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ); + ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); + ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("decod", OUT, EAST, "Instructiont decoded", _param->_nb_inst_decod); + + ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); + ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); + ALLOC1_SIGNAL_OUT(out_DECOD_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_DECOD_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); + ALLOC1_SIGNAL_OUT(out_DECOD_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_OUT(out_DECOD_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_OUT(out_DECOD_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_DECOD_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_DECOD_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION_USE,"exception_use",Texception_t ,_param->_size_exception_use ); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict",OUT,NORTH,"Decod a branch -> inform the branch predictor.",_param->_nb_inst_decod); + + ALLOC1_VALACK_OUT(out_PREDICT_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_OUT(out_PREDICT_MATCH_INST_IFETCH_PTR ,"match_inst_ifetch_ptr" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); + ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_CONDITION ,"branch_condition" ,Tbranch_condition_t,_param->_size_branch_condition ); +// ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STACK_WRITE ,"branch_stack_write" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_DIRECTION ,"branch_direction" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_general_data ); +// ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1 ); + } + + // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("context", IN, NORTH, "context's information", _param->_nb_context); + + ALLOC1_SIGNAL_IN (in_CONTEXT_DECOD_ENABLE,"decod_enable",Tcontrol_t,1); + ALLOC1_SIGNAL_IN (in_CONTEXT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); + } + + // ~~~~~[ Interface : "context_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("context_event", OUT, NORTH, "context's evenement"); + + ALLOC_VALACK_OUT(out_CONTEXT_EVENT_VAL ,VAL); + ALLOC_VALACK_IN ( in_CONTEXT_EVENT_ACK ,ACK); + ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type ); + ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS ,"address" ,Tgeneral_data_t,_param->_size_general_data); + ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS_EPCR ,"address_epcr" ,Tgeneral_data_t,_param->_size_general_data); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + reg_CONTEXT_ADDRESS_PREVIOUS = new Tgeneral_data_t [_param->_nb_context]; + reg_CONTEXT_IS_DELAY_SLOT = new Tcontrol_t [_param->_nb_context]; + + internal_CONTEXT_HAVE_TRANSACTION = new Tcontrol_t [_param->_nb_context]; + internal_CONTEXT_ADDRESS_PREVIOUS = new Tgeneral_data_t [_param->_nb_context]; + internal_CONTEXT_IS_DELAY_SLOT = new Tcontrol_t [_param->_nb_context]; + + const uint32_t nb_opcod_type = 14; + const uint32_t tab_opcod_type [] = {MAX_OPCOD_0, + MAX_OPCOD_1 , + MAX_OPCOD_2 , + MAX_OPCOD_3 , + MAX_OPCOD_4 , + MAX_OPCOD_5 , + MAX_OPCOD_6 , + MAX_OPCOD_7 , + MAX_OPCOD_8 , + MAX_OPCOD_9 , + MAX_OPCOD_10, + MAX_OPCOD_11, + MAX_OPCOD_12, + MAX_OPCOD_13}; + + _function_decod = new function_decod_t *** [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + { + _function_decod [i] = new function_decod_t ** [nb_opcod_type]; + for (uint32_t j=0; j_instruction_implemeted[i][INSTRUCTION_L_ADD ]) _function_decod[i][ 3][OPCOD_L_ADD ] = &(instruction_l_add ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_ADDC ]) _function_decod[i][ 3][OPCOD_L_ADDC ] = &(instruction_l_addc ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_ADDI ]) _function_decod[i][ 0][OPCOD_L_ADDI ] = &(instruction_l_addi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_ADDIC ]) _function_decod[i][ 0][OPCOD_L_ADDIC ] = &(instruction_l_addic ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_AND ]) _function_decod[i][ 3][OPCOD_L_AND ] = &(instruction_l_and ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_ANDI ]) _function_decod[i][ 0][OPCOD_L_ANDI ] = &(instruction_l_andi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_BF ]) _function_decod[i][ 0][OPCOD_L_BF ] = &(instruction_l_bf ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_BNF ]) _function_decod[i][ 0][OPCOD_L_BNF ] = &(instruction_l_bnf ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CMOV ]) _function_decod[i][ 3][OPCOD_L_CMOV ] = &(instruction_l_cmov ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CSYNC ]) _function_decod[i][ 9][OPCOD_L_CSYNC ] = &(instruction_l_csync ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_DIV ]) _function_decod[i][ 3][OPCOD_L_DIV ] = &(instruction_l_div ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_DIVU ]) _function_decod[i][ 3][OPCOD_L_DIVU ] = &(instruction_l_divu ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_EXTBS ]) _function_decod[i][12][OPCOD_L_EXTBS ] = &(instruction_l_extbs ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_EXTBZ ]) _function_decod[i][12][OPCOD_L_EXTBZ ] = &(instruction_l_extbz ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_EXTHS ]) _function_decod[i][12][OPCOD_L_EXTHS ] = &(instruction_l_exths ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_EXTHZ ]) _function_decod[i][12][OPCOD_L_EXTHZ ] = &(instruction_l_exthz ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_EXTWS ]) _function_decod[i][13][OPCOD_L_EXTWS ] = &(instruction_l_extws ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_EXTWZ ]) _function_decod[i][13][OPCOD_L_EXTWZ ] = &(instruction_l_extwz ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_FF1 ]) _function_decod[i][ 3][OPCOD_L_FF1 ] = &(instruction_l_ff1 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_FL1 ]) _function_decod[i][ 3][OPCOD_L_FL1 ] = &(instruction_l_fl1 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_J ]) _function_decod[i][ 0][OPCOD_L_J ] = &(instruction_l_j ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_JAL ]) _function_decod[i][ 0][OPCOD_L_JAL ] = &(instruction_l_jal ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_JALR ]) _function_decod[i][ 0][OPCOD_L_JALR ] = &(instruction_l_jalr ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_JR ]) _function_decod[i][ 0][OPCOD_L_JR ] = &(instruction_l_jr ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LBS ]) _function_decod[i][ 0][OPCOD_L_LBS ] = &(instruction_l_lbs ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LBZ ]) _function_decod[i][ 0][OPCOD_L_LBZ ] = &(instruction_l_lbz ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LD ]) _function_decod[i][ 0][OPCOD_L_LD ] = &(instruction_l_ld ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LHS ]) _function_decod[i][ 0][OPCOD_L_LHS ] = &(instruction_l_lhs ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LHZ ]) _function_decod[i][ 0][OPCOD_L_LHZ ] = &(instruction_l_lhz ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LWS ]) _function_decod[i][ 0][OPCOD_L_LWS ] = &(instruction_l_lws ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_LWZ ]) _function_decod[i][ 0][OPCOD_L_LWZ ] = &(instruction_l_lwz ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MAC ]) _function_decod[i][ 7][OPCOD_L_MAC ] = &(instruction_l_mac ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MACI ]) _function_decod[i][ 0][OPCOD_L_MACI ] = &(instruction_l_maci ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MACRC ]) _function_decod[i][ 8][OPCOD_L_MACRC ] = &(instruction_l_macrc ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MFSPR ]) _function_decod[i][ 0][OPCOD_L_MFSPR ] = &(instruction_l_mfspr ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MOVHI ]) _function_decod[i][ 8][OPCOD_L_MOVHI ] = &(instruction_l_movhi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MSB ]) _function_decod[i][ 7][OPCOD_L_MSB ] = &(instruction_l_msb ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MSYNC ]) _function_decod[i][ 9][OPCOD_L_MSYNC ] = &(instruction_l_msync ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MTSPR ]) _function_decod[i][ 0][OPCOD_L_MTSPR ] = &(instruction_l_mtspr ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MUL ]) _function_decod[i][ 3][OPCOD_L_MUL ] = &(instruction_l_mul ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MULI ]) _function_decod[i][ 0][OPCOD_L_MULI ] = &(instruction_l_muli ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_MULU ]) _function_decod[i][ 3][OPCOD_L_MULU ] = &(instruction_l_mulu ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_NOP ]) _function_decod[i][10][OPCOD_L_NOP ] = &(instruction_l_nop ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_OR ]) _function_decod[i][ 3][OPCOD_L_OR ] = &(instruction_l_or ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_ORI ]) _function_decod[i][ 0][OPCOD_L_ORI ] = &(instruction_l_ori ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_PSYNC ]) _function_decod[i][ 9][OPCOD_L_PSYNC ] = &(instruction_l_psync ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_RFE ]) _function_decod[i][ 0][OPCOD_L_RFE ] = &(instruction_l_rfe ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_ROR ]) _function_decod[i][11][OPCOD_L_ROR ] = &(instruction_l_ror ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_RORI ]) _function_decod[i][ 6][OPCOD_L_RORI ] = &(instruction_l_rori ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SB ]) _function_decod[i][ 0][OPCOD_L_SB ] = &(instruction_l_sb ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SD ]) _function_decod[i][ 0][OPCOD_L_SD ] = &(instruction_l_sd ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFEQ ]) _function_decod[i][ 4][OPCOD_L_SFEQ ] = &(instruction_l_sfeq ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFEQI ]) _function_decod[i][ 5][OPCOD_L_SFEQI ] = &(instruction_l_sfeqi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGES ]) _function_decod[i][ 4][OPCOD_L_SFGES ] = &(instruction_l_sfges ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGESI ]) _function_decod[i][ 5][OPCOD_L_SFGESI ] = &(instruction_l_sfgesi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGEU ]) _function_decod[i][ 4][OPCOD_L_SFGEU ] = &(instruction_l_sfgeu ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGEUI ]) _function_decod[i][ 5][OPCOD_L_SFGEUI ] = &(instruction_l_sfgeui ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGTS ]) _function_decod[i][ 4][OPCOD_L_SFGTS ] = &(instruction_l_sfgts ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGTSI ]) _function_decod[i][ 5][OPCOD_L_SFGTSI ] = &(instruction_l_sfgtsi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGTU ]) _function_decod[i][ 4][OPCOD_L_SFGTU ] = &(instruction_l_sfgtu ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFGTUI ]) _function_decod[i][ 5][OPCOD_L_SFGTUI ] = &(instruction_l_sfgtui ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLES ]) _function_decod[i][ 4][OPCOD_L_SFLES ] = &(instruction_l_sfles ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLESI ]) _function_decod[i][ 5][OPCOD_L_SFLESI ] = &(instruction_l_sflesi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLEU ]) _function_decod[i][ 4][OPCOD_L_SFLEU ] = &(instruction_l_sfleu ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLEUI ]) _function_decod[i][ 5][OPCOD_L_SFLEUI ] = &(instruction_l_sfleui ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLTS ]) _function_decod[i][ 4][OPCOD_L_SFLTS ] = &(instruction_l_sflts ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLTSI ]) _function_decod[i][ 5][OPCOD_L_SFLTSI ] = &(instruction_l_sfltsi ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLTU ]) _function_decod[i][ 4][OPCOD_L_SFLTU ] = &(instruction_l_sfltu ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFLTUI ]) _function_decod[i][ 5][OPCOD_L_SFLTUI ] = &(instruction_l_sfltui ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFNE ]) _function_decod[i][ 4][OPCOD_L_SFNE ] = &(instruction_l_sfne ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SFNEI ]) _function_decod[i][ 5][OPCOD_L_SFNEI ] = &(instruction_l_sfnei ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SH ]) _function_decod[i][ 0][OPCOD_L_SH ] = &(instruction_l_sh ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SLL ]) _function_decod[i][11][OPCOD_L_SLL ] = &(instruction_l_sll ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SLLI ]) _function_decod[i][ 6][OPCOD_L_SLLI ] = &(instruction_l_slli ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SRA ]) _function_decod[i][11][OPCOD_L_SRA ] = &(instruction_l_sra ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SRAI ]) _function_decod[i][ 6][OPCOD_L_SRAI ] = &(instruction_l_srai ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SRL ]) _function_decod[i][11][OPCOD_L_SRL ] = &(instruction_l_srl ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SRLI ]) _function_decod[i][ 6][OPCOD_L_SRLI ] = &(instruction_l_srli ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SUB ]) _function_decod[i][ 3][OPCOD_L_SUB ] = &(instruction_l_sub ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SW ]) _function_decod[i][ 0][OPCOD_L_SW ] = &(instruction_l_sw ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_SYS ]) _function_decod[i][ 9][OPCOD_L_SYS ] = &(instruction_l_sys ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_TRAP ]) _function_decod[i][ 9][OPCOD_L_TRAP ] = &(instruction_l_trap ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_XOR ]) _function_decod[i][ 3][OPCOD_L_XOR ] = &(instruction_l_xor ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_XORI ]) _function_decod[i][ 0][OPCOD_L_XORI ] = &(instruction_l_xori ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_ADD_D ]) _function_decod[i][ 1][OPCOD_LF_ADD_D ] = &(instruction_lf_add_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_ADD_S ]) _function_decod[i][ 1][OPCOD_LF_ADD_S ] = &(instruction_lf_add_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_DIV_D ]) _function_decod[i][ 1][OPCOD_LF_DIV_D ] = &(instruction_lf_div_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_DIV_S ]) _function_decod[i][ 1][OPCOD_LF_DIV_S ] = &(instruction_lf_div_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_FTOI_D ]) _function_decod[i][ 1][OPCOD_LF_FTOI_D ] = &(instruction_lf_ftoi_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_FTOI_S ]) _function_decod[i][ 1][OPCOD_LF_FTOI_S ] = &(instruction_lf_ftoi_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_ITOF_D ]) _function_decod[i][ 1][OPCOD_LF_ITOF_D ] = &(instruction_lf_itof_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_ITOF_S ]) _function_decod[i][ 1][OPCOD_LF_ITOF_S ] = &(instruction_lf_itof_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_MADD_D ]) _function_decod[i][ 1][OPCOD_LF_MADD_D ] = &(instruction_lf_madd_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_MADD_S ]) _function_decod[i][ 1][OPCOD_LF_MADD_S ] = &(instruction_lf_madd_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_MUL_D ]) _function_decod[i][ 1][OPCOD_LF_MUL_D ] = &(instruction_lf_mul_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_MUL_S ]) _function_decod[i][ 1][OPCOD_LF_MUL_S ] = &(instruction_lf_mul_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_REM_D ]) _function_decod[i][ 1][OPCOD_LF_REM_D ] = &(instruction_lf_rem_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_REM_S ]) _function_decod[i][ 1][OPCOD_LF_REM_S ] = &(instruction_lf_rem_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFEQ_D ]) _function_decod[i][ 1][OPCOD_LF_SFEQ_D ] = &(instruction_lf_sfeq_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFEQ_S ]) _function_decod[i][ 1][OPCOD_LF_SFEQ_S ] = &(instruction_lf_sfeq_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFGE_D ]) _function_decod[i][ 1][OPCOD_LF_SFGE_D ] = &(instruction_lf_sfge_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFGE_S ]) _function_decod[i][ 1][OPCOD_LF_SFGE_S ] = &(instruction_lf_sfge_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFGT_D ]) _function_decod[i][ 1][OPCOD_LF_SFGT_D ] = &(instruction_lf_sfgt_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFGT_S ]) _function_decod[i][ 1][OPCOD_LF_SFGT_S ] = &(instruction_lf_sfgt_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFLE_D ]) _function_decod[i][ 1][OPCOD_LF_SFLE_D ] = &(instruction_lf_sfle_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFLE_S ]) _function_decod[i][ 1][OPCOD_LF_SFLE_S ] = &(instruction_lf_sfle_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFLT_D ]) _function_decod[i][ 1][OPCOD_LF_SFLT_D ] = &(instruction_lf_sflt_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFLT_S ]) _function_decod[i][ 1][OPCOD_LF_SFLT_S ] = &(instruction_lf_sflt_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFNE_D ]) _function_decod[i][ 1][OPCOD_LF_SFNE_D ] = &(instruction_lf_sfne_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SFNE_S ]) _function_decod[i][ 1][OPCOD_LF_SFNE_S ] = &(instruction_lf_sfne_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SUB_D ]) _function_decod[i][ 1][OPCOD_LF_SUB_D ] = &(instruction_lf_sub_d ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_SUB_S ]) _function_decod[i][ 1][OPCOD_LF_SUB_S ] = &(instruction_lf_sub_s ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADD_B ]) _function_decod[i][ 2][OPCOD_LV_ADD_B ] = &(instruction_lv_add_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADD_H ]) _function_decod[i][ 2][OPCOD_LV_ADD_H ] = &(instruction_lv_add_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADDS_B ]) _function_decod[i][ 2][OPCOD_LV_ADDS_B ] = &(instruction_lv_adds_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADDS_H ]) _function_decod[i][ 2][OPCOD_LV_ADDS_H ] = &(instruction_lv_adds_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADDU_B ]) _function_decod[i][ 2][OPCOD_LV_ADDU_B ] = &(instruction_lv_addu_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADDU_H ]) _function_decod[i][ 2][OPCOD_LV_ADDU_H ] = &(instruction_lv_addu_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADDUS_B ]) _function_decod[i][ 2][OPCOD_LV_ADDUS_B ] = &(instruction_lv_addus_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ADDUS_H ]) _function_decod[i][ 2][OPCOD_LV_ADDUS_H ] = &(instruction_lv_addus_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_EQ_B]) _function_decod[i][ 2][OPCOD_LV_ALL_EQ_B] = &(instruction_lv_all_eq_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_EQ_H]) _function_decod[i][ 2][OPCOD_LV_ALL_EQ_H] = &(instruction_lv_all_eq_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_GE_B]) _function_decod[i][ 2][OPCOD_LV_ALL_GE_B] = &(instruction_lv_all_ge_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_GE_H]) _function_decod[i][ 2][OPCOD_LV_ALL_GE_H] = &(instruction_lv_all_ge_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_GT_B]) _function_decod[i][ 2][OPCOD_LV_ALL_GT_B] = &(instruction_lv_all_gt_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_GT_H]) _function_decod[i][ 2][OPCOD_LV_ALL_GT_H] = &(instruction_lv_all_gt_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_LE_B]) _function_decod[i][ 2][OPCOD_LV_ALL_LE_B] = &(instruction_lv_all_le_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_LE_H]) _function_decod[i][ 2][OPCOD_LV_ALL_LE_H] = &(instruction_lv_all_le_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_LT_B]) _function_decod[i][ 2][OPCOD_LV_ALL_LT_B] = &(instruction_lv_all_lt_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_LT_H]) _function_decod[i][ 2][OPCOD_LV_ALL_LT_H] = &(instruction_lv_all_lt_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_NE_B]) _function_decod[i][ 2][OPCOD_LV_ALL_NE_B] = &(instruction_lv_all_ne_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ALL_NE_H]) _function_decod[i][ 2][OPCOD_LV_ALL_NE_H] = &(instruction_lv_all_ne_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_AND ]) _function_decod[i][ 2][OPCOD_LV_AND ] = &(instruction_lv_and ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_EQ_B]) _function_decod[i][ 2][OPCOD_LV_ANY_EQ_B] = &(instruction_lv_any_eq_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_EQ_H]) _function_decod[i][ 2][OPCOD_LV_ANY_EQ_H] = &(instruction_lv_any_eq_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_GE_B]) _function_decod[i][ 2][OPCOD_LV_ANY_GE_B] = &(instruction_lv_any_ge_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_GE_H]) _function_decod[i][ 2][OPCOD_LV_ANY_GE_H] = &(instruction_lv_any_ge_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_GT_B]) _function_decod[i][ 2][OPCOD_LV_ANY_GT_B] = &(instruction_lv_any_gt_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_GT_H]) _function_decod[i][ 2][OPCOD_LV_ANY_GT_H] = &(instruction_lv_any_gt_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_LE_B]) _function_decod[i][ 2][OPCOD_LV_ANY_LE_B] = &(instruction_lv_any_le_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_LE_H]) _function_decod[i][ 2][OPCOD_LV_ANY_LE_H] = &(instruction_lv_any_le_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_LT_B]) _function_decod[i][ 2][OPCOD_LV_ANY_LT_B] = &(instruction_lv_any_lt_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_LT_H]) _function_decod[i][ 2][OPCOD_LV_ANY_LT_H] = &(instruction_lv_any_lt_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_NE_B]) _function_decod[i][ 2][OPCOD_LV_ANY_NE_B] = &(instruction_lv_any_ne_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_ANY_NE_H]) _function_decod[i][ 2][OPCOD_LV_ANY_NE_H] = &(instruction_lv_any_ne_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_AVG_B ]) _function_decod[i][ 2][OPCOD_LV_AVG_B ] = &(instruction_lv_avg_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_AVG_H ]) _function_decod[i][ 2][OPCOD_LV_AVG_H ] = &(instruction_lv_avg_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_EQ_B]) _function_decod[i][ 2][OPCOD_LV_CMP_EQ_B] = &(instruction_lv_cmp_eq_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_EQ_H]) _function_decod[i][ 2][OPCOD_LV_CMP_EQ_H] = &(instruction_lv_cmp_eq_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_GE_B]) _function_decod[i][ 2][OPCOD_LV_CMP_GE_B] = &(instruction_lv_cmp_ge_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_GE_H]) _function_decod[i][ 2][OPCOD_LV_CMP_GE_H] = &(instruction_lv_cmp_ge_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_GT_B]) _function_decod[i][ 2][OPCOD_LV_CMP_GT_B] = &(instruction_lv_cmp_gt_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_GT_H]) _function_decod[i][ 2][OPCOD_LV_CMP_GT_H] = &(instruction_lv_cmp_gt_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_LE_B]) _function_decod[i][ 2][OPCOD_LV_CMP_LE_B] = &(instruction_lv_cmp_le_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_LE_H]) _function_decod[i][ 2][OPCOD_LV_CMP_LE_H] = &(instruction_lv_cmp_le_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_LT_B]) _function_decod[i][ 2][OPCOD_LV_CMP_LT_B] = &(instruction_lv_cmp_lt_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_LT_H]) _function_decod[i][ 2][OPCOD_LV_CMP_LT_H] = &(instruction_lv_cmp_lt_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_NE_B]) _function_decod[i][ 2][OPCOD_LV_CMP_NE_B] = &(instruction_lv_cmp_ne_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CMP_NE_H]) _function_decod[i][ 2][OPCOD_LV_CMP_NE_H] = &(instruction_lv_cmp_ne_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MADDS_H ]) _function_decod[i][ 2][OPCOD_LV_MADDS_H ] = &(instruction_lv_madds_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MAX_B ]) _function_decod[i][ 2][OPCOD_LV_MAX_B ] = &(instruction_lv_max_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MAX_H ]) _function_decod[i][ 2][OPCOD_LV_MAX_H ] = &(instruction_lv_max_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MERGE_B ]) _function_decod[i][ 2][OPCOD_LV_MERGE_B ] = &(instruction_lv_merge_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MERGE_H ]) _function_decod[i][ 2][OPCOD_LV_MERGE_H ] = &(instruction_lv_merge_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MIN_B ]) _function_decod[i][ 2][OPCOD_LV_MIN_B ] = &(instruction_lv_min_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MIN_H ]) _function_decod[i][ 2][OPCOD_LV_MIN_H ] = &(instruction_lv_min_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MSUBS_H ]) _function_decod[i][ 2][OPCOD_LV_MSUBS_H ] = &(instruction_lv_msubs_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_MULS_H ]) _function_decod[i][ 2][OPCOD_LV_MULS_H ] = &(instruction_lv_muls_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_NAND ]) _function_decod[i][ 2][OPCOD_LV_NAND ] = &(instruction_lv_nand ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_NOR ]) _function_decod[i][ 2][OPCOD_LV_NOR ] = &(instruction_lv_nor ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_OR ]) _function_decod[i][ 2][OPCOD_LV_OR ] = &(instruction_lv_or ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PACK_B ]) _function_decod[i][ 2][OPCOD_LV_PACK_B ] = &(instruction_lv_pack_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PACK_H ]) _function_decod[i][ 2][OPCOD_LV_PACK_H ] = &(instruction_lv_pack_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PACKS_B ]) _function_decod[i][ 2][OPCOD_LV_PACKS_B ] = &(instruction_lv_packs_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PACKS_H ]) _function_decod[i][ 2][OPCOD_LV_PACKS_H ] = &(instruction_lv_packs_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PACKUS_B]) _function_decod[i][ 2][OPCOD_LV_PACKUS_B] = &(instruction_lv_packus_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PACKUS_H]) _function_decod[i][ 2][OPCOD_LV_PACKUS_H] = &(instruction_lv_packus_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_PERM_N ]) _function_decod[i][ 2][OPCOD_LV_PERM_N ] = &(instruction_lv_perm_n ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_RL_B ]) _function_decod[i][ 2][OPCOD_LV_RL_B ] = &(instruction_lv_rl_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_RL_H ]) _function_decod[i][ 2][OPCOD_LV_RL_H ] = &(instruction_lv_rl_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SLL ]) _function_decod[i][ 2][OPCOD_LV_SLL ] = &(instruction_lv_sll ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SLL_B ]) _function_decod[i][ 2][OPCOD_LV_SLL_B ] = &(instruction_lv_sll_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SLL_H ]) _function_decod[i][ 2][OPCOD_LV_SLL_H ] = &(instruction_lv_sll_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SRA_B ]) _function_decod[i][ 2][OPCOD_LV_SRA_B ] = &(instruction_lv_sra_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SRA_H ]) _function_decod[i][ 2][OPCOD_LV_SRA_H ] = &(instruction_lv_sra_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SRL ]) _function_decod[i][ 2][OPCOD_LV_SRL ] = &(instruction_lv_srl ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SRL_B ]) _function_decod[i][ 2][OPCOD_LV_SRL_B ] = &(instruction_lv_srl_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SRL_H ]) _function_decod[i][ 2][OPCOD_LV_SRL_H ] = &(instruction_lv_srl_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUB_B ]) _function_decod[i][ 2][OPCOD_LV_SUB_B ] = &(instruction_lv_sub_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUB_H ]) _function_decod[i][ 2][OPCOD_LV_SUB_H ] = &(instruction_lv_sub_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUBS_B ]) _function_decod[i][ 2][OPCOD_LV_SUBS_B ] = &(instruction_lv_subs_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUBS_H ]) _function_decod[i][ 2][OPCOD_LV_SUBS_H ] = &(instruction_lv_subs_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUBU_B ]) _function_decod[i][ 2][OPCOD_LV_SUBU_B ] = &(instruction_lv_subu_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUBU_H ]) _function_decod[i][ 2][OPCOD_LV_SUBU_H ] = &(instruction_lv_subu_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUBUS_B ]) _function_decod[i][ 2][OPCOD_LV_SUBUS_B ] = &(instruction_lv_subus_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_SUBUS_H ]) _function_decod[i][ 2][OPCOD_LV_SUBUS_H ] = &(instruction_lv_subus_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_UNPACK_B]) _function_decod[i][ 2][OPCOD_LV_UNPACK_B] = &(instruction_lv_unpack_b ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_UNPACK_H]) _function_decod[i][ 2][OPCOD_LV_UNPACK_H] = &(instruction_lv_unpack_h ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_XOR ]) _function_decod[i][ 2][OPCOD_LV_XOR ] = &(instruction_lv_xor ); + + // Custom Instrucion + + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST1 ]) _function_decod[i][ 0][OPCOD_L_CUST1 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_1 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST2 ]) _function_decod[i][ 0][OPCOD_L_CUST2 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_2 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST3 ]) _function_decod[i][ 0][OPCOD_L_CUST3 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_3 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST4 ]) _function_decod[i][ 0][OPCOD_L_CUST4 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_4 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST5 ]) _function_decod[i][ 0][OPCOD_L_CUST5 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_5 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST6 ]) _function_decod[i][ 0][OPCOD_L_CUST6 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_6 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST7 ]) _function_decod[i][ 0][OPCOD_L_CUST7 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_7 ); + if (_param->_instruction_implemeted[i][INSTRUCTION_L_CUST8 ]) _function_decod[i][ 0][OPCOD_L_CUST8 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_L_8 ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_CUST1_D ]) _function_decod[i][ 1][OPCOD_LF_CUST1_D ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_LF_1_D); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LF_CUST1_S ]) _function_decod[i][ 1][OPCOD_LF_CUST1_S ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_LF_1_S); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CUST1 ]) _function_decod[i][ 2][OPCOD_LV_CUST1 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_LV_1 ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CUST2 ]) _function_decod[i][ 2][OPCOD_LV_CUST2 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_LV_2 ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CUST3 ]) _function_decod[i][ 2][OPCOD_LV_CUST3 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_LV_3 ); +// if (_param->_instruction_implemeted[i][INSTRUCTION_LV_CUST4 ]) _function_decod[i][ 2][OPCOD_LV_CUST4 ] = _param->_get_custom_information(i)._get_custom_decod(OPERATION_CUSTOM_LV_4 ); + } + + _decod_instruction = new decod_instruction_t; + + _decod_param = new decod_param_t * [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + _decod_param [i] = new decod_param_t (_param->_size_general_data, + _function_decod[i]); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 78) @@ -0,0 +1,119 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::deallocation" + void Decod::deallocation (void) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_IFETCH_VAL ; + delete [] out_IFETCH_ACK ; + delete [] in_IFETCH_INSTRUCTION ; + if (_param->_have_port_context_id) + delete [] in_IFETCH_CONTEXT_ID ; + delete [] in_IFETCH_ADDRESS ; +// delete [] in_IFETCH_ADDRESS_NEXT ; + if (_param->_have_port_inst_ifetch_ptr) + delete [] in_IFETCH_INST_IFETCH_PTR ; + delete [] in_IFETCH_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete [] in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ; + + delete [] out_DECOD_VAL ; + delete [] in_DECOD_ACK ; + if (_param->_have_port_context_id) + delete [] out_DECOD_CONTEXT_ID ; + if (_param->_have_port_depth) + delete [] out_DECOD_DEPTH ; + delete [] out_DECOD_TYPE ; + delete [] out_DECOD_OPERATION ; + delete [] out_DECOD_IS_DELAY_SLOT ; + delete [] out_DECOD_ADDRESS ; + delete [] out_DECOD_HAS_IMMEDIAT ; + delete [] out_DECOD_IMMEDIAT ; + delete [] out_DECOD_READ_RA ; + delete [] out_DECOD_NUM_REG_RA ; + delete [] out_DECOD_READ_RB ; + delete [] out_DECOD_NUM_REG_RB ; + delete [] out_DECOD_READ_RC ; + delete [] out_DECOD_NUM_REG_RC ; + delete [] out_DECOD_WRITE_RD ; + delete [] out_DECOD_NUM_REG_RD ; + delete [] out_DECOD_WRITE_RE ; + delete [] out_DECOD_NUM_REG_RE ; + delete [] out_DECOD_EXCEPTION_USE ; + + delete [] out_PREDICT_VAL ; + delete [] in_PREDICT_ACK ; + if (_param->_have_port_context_id) + delete [] out_PREDICT_CONTEXT_ID ; + delete [] out_PREDICT_BRANCH_STATE ; + delete [] out_PREDICT_MATCH_INST_IFETCH_PTR ; + if (_param->_have_port_branch_update_prediction_id) + delete [] out_PREDICT_BRANCH_UPDATE_PREDICTION_ID; + delete [] out_PREDICT_BRANCH_CONDITION ; +// delete [] out_PREDICT_BRANCH_STACK_WRITE ; + delete [] out_PREDICT_BRANCH_DIRECTION ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; +// delete [] in_PREDICT_CAN_CONTINUE ; + + delete [] in_CONTEXT_DECOD_ENABLE ; + if (_param->_have_port_depth) + delete [] in_CONTEXT_DEPTH ; + + delete out_CONTEXT_EVENT_VAL ; + delete in_CONTEXT_EVENT_ACK ; + if (_param->_have_port_context_id) + delete out_CONTEXT_EVENT_CONTEXT_ID ; + delete out_CONTEXT_EVENT_TYPE ; + delete out_CONTEXT_EVENT_IS_DELAY_SLOT ; + delete out_CONTEXT_EVENT_ADDRESS ; + delete out_CONTEXT_EVENT_ADDRESS_EPCR ; + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete reg_CONTEXT_ADDRESS_PREVIOUS ; + delete reg_CONTEXT_IS_DELAY_SLOT ; + + delete internal_CONTEXT_HAVE_TRANSACTION ; + delete internal_CONTEXT_ADDRESS_PREVIOUS ; + delete internal_CONTEXT_IS_DELAY_SLOT ; + + delete [] _function_decod ; + delete _decod_instruction; + delete _decod_param ; + delete _component; + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::end_cycle" +void Decod::end_cycle () + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 78) @@ -0,0 +1,215 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::genMealy" + void Decod::genMealy (void) + { + log_printf(TRACE,Decod,FUNCTION,"Begin"); + + //----------------------------------- + // Initialization + //----------------------------------- + Tcontrol_t context_event_val; + Tcontrol_t ifetch_ack [_param->_nb_context][_param->_max_nb_inst_fetch]; + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) + ifetch_ack [i][j] = false; + + Tcontrol_t predict_val [_param->_nb_inst_decod]; + Tcontrol_t decod_val [_param->_nb_inst_decod]; + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + decod_val [i] = false; + } + + Tcontrol_t can_continue [_param->_nb_context]; + Tcontrol_t can_continue_next [_param->_nb_context]; + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + internal_CONTEXT_HAVE_TRANSACTION [i] = false; + internal_CONTEXT_ADDRESS_PREVIOUS [i] = reg_CONTEXT_ADDRESS_PREVIOUS [i]; + internal_CONTEXT_IS_DELAY_SLOT [i] = reg_CONTEXT_IS_DELAY_SLOT [i]; + + can_continue [i] = PORT_READ(in_CONTEXT_DECOD_ENABLE [i]); + can_continue_next [i] = PORT_READ(in_CONTEXT_DECOD_ENABLE [i]); + } + + //----------------------------------- + // Loop of decod + //----------------------------------- + // scan all decod "slot_out" + std::list::iterator it=select.begin(); + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + while ((it != select.end()) and // have a no scanned "slot_in" ? + (decod_val [i] == false) and // have not a previous selected entry? + (context_event_val == false)) // Have not a context_event (spr_access, exception, ...) + { + predict_val [i] = false; + context_event_val = false; + + Tcontext_t x = it->_context ; + uint32_t y = it->_inst_fetch; + + // Test if this instruction is valid + if ((PORT_READ(in_IFETCH_VAL [x][y]) == 1) and // entry is valid + (can_continue [x] == 1)) // context can decod instruction (have not a previous event) + { + can_continue [x] = can_continue_next [x]; + + decod_val [i] = true; // fetch_val and decod_enable + ifetch_ack [x][y] = PORT_READ(in_DECOD_ACK [i]); // fetch_val and decod_enable and decod_ack + + Tgeneral_data_t addr = PORT_READ(in_IFETCH_ADDRESS [x])+4*y; + + _decod_instruction->_instruction = PORT_READ(in_IFETCH_INSTRUCTION [x][y]); + _decod_instruction->_context_id = x; + _decod_instruction->_address_previous = internal_CONTEXT_ADDRESS_PREVIOUS [x]; + _decod_instruction->_address = addr; //Compute the current address + _decod_instruction->_address_next = addr+4; + _decod_instruction->_is_delay_slot = internal_CONTEXT_IS_DELAY_SLOT [x]; + + // Decod ! + log_printf(TRACE,Decod,FUNCTION,"DECOD [%d]",i); + log_printf(TRACE,Decod,FUNCTION," * context : %d",x); + log_printf(TRACE,Decod,FUNCTION," * fetch : %d",y); + log_printf(TRACE,Decod,FUNCTION," * address : %.8x",addr); + log_printf(TRACE,Decod,FUNCTION," * is_delay_slot : %d",internal_CONTEXT_IS_DELAY_SLOT [x]); + instruction_decod (_decod_instruction, _decod_param[x]); + + Ttype_t type = _decod_instruction->_type; + + if (_param->_have_port_context_id) + PORT_WRITE(out_DECOD_CONTEXT_ID [i], x); + if (_param->_have_port_depth) + PORT_WRITE(out_DECOD_DEPTH [i], PORT_READ(in_CONTEXT_DEPTH [x])); + PORT_WRITE(out_DECOD_TYPE [i], type); + PORT_WRITE(out_DECOD_OPERATION [i], _decod_instruction->_operation ); + PORT_WRITE(out_DECOD_IS_DELAY_SLOT [i], _decod_instruction->_is_delay_slot ); + PORT_WRITE(out_DECOD_ADDRESS [i], addr); + PORT_WRITE(out_DECOD_HAS_IMMEDIAT [i], _decod_instruction->_has_immediat ); + PORT_WRITE(out_DECOD_IMMEDIAT [i], _decod_instruction->_immediat ); + PORT_WRITE(out_DECOD_READ_RA [i], _decod_instruction->_read_ra ); + PORT_WRITE(out_DECOD_NUM_REG_RA [i], _decod_instruction->_num_reg_ra ); + PORT_WRITE(out_DECOD_READ_RB [i], _decod_instruction->_read_rb ); + PORT_WRITE(out_DECOD_NUM_REG_RB [i], _decod_instruction->_num_reg_rb ); + PORT_WRITE(out_DECOD_READ_RC [i], _decod_instruction->_read_rc ); + PORT_WRITE(out_DECOD_NUM_REG_RC [i], _decod_instruction->_num_reg_rc ); + PORT_WRITE(out_DECOD_WRITE_RD [i], _decod_instruction->_write_rd ); + PORT_WRITE(out_DECOD_NUM_REG_RD [i], _decod_instruction->_num_reg_rd ); + PORT_WRITE(out_DECOD_WRITE_RE [i], _decod_instruction->_write_re ); + PORT_WRITE(out_DECOD_NUM_REG_RE [i], _decod_instruction->_num_reg_re ); + PORT_WRITE(out_DECOD_EXCEPTION_USE [i], _decod_instruction->_exception_use ); + + if (type == TYPE_BRANCH) + { + predict_val [i] = ifetch_ack [x][y] // and decod_val [i] + ; + decod_val [i] &= PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable + ifetch_ack [x][y] &= PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable and decod_ack + + if (_param->_have_port_context_id) + PORT_WRITE(out_PREDICT_CONTEXT_ID [i],x); + PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0)); + PORT_WRITE(out_PREDICT_BRANCH_STATE [i],PORT_READ(in_IFETCH_BRANCH_STATE [x])); + if (_param->_have_port_branch_update_prediction_id) + PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x])); + PORT_WRITE(out_PREDICT_BRANCH_CONDITION [i],_decod_instruction->_branch_condition ); +// PORT_WRITE(out_PREDICT_BRANCH_STACK_WRITE [i],_decod_instruction->_branch_stack_write); + PORT_WRITE(out_PREDICT_BRANCH_DIRECTION [i],_decod_instruction->_branch_direction ); + PORT_WRITE(out_PREDICT_ADDRESS_SRC [i],_decod_instruction->_address ); + PORT_WRITE(out_PREDICT_ADDRESS_DEST [i],_decod_instruction->_address_next ); + + //can_continue_next [x] = PORT_READ(in_PREDICT_CAN_CONTINUE [i]); // can continue is set if direction is "not take" (also, continue is sequential order) + can_continue_next [x] = false; // one branch per context + } + + Tevent_type_t event_type = _decod_instruction->_event_type; + if (event_type != EVENT_TYPE_NONE) + { + // speculative jump at the exception handler + // if type = TYPE_BRANCH, also event_type == EVENT_TYPE_NONE + context_event_val = ifetch_ack [x][y] // and decod_val [i] + ; + decod_val [i] &= PORT_READ(in_CONTEXT_EVENT_ACK);// context_event_ack and fetch_val and decod_enable + ifetch_ack [x][y] &= PORT_READ(in_CONTEXT_EVENT_ACK);// context_event_ack and fetch_val and decod_enable and decod_ack + + if (_param->_have_port_context_id) + PORT_WRITE(out_CONTEXT_EVENT_CONTEXT_ID , x); + PORT_WRITE(out_CONTEXT_EVENT_TYPE , _decod_instruction->_event_type ); + PORT_WRITE(out_CONTEXT_EVENT_IS_DELAY_SLOT, _decod_instruction->_is_delay_slot ); + PORT_WRITE(out_CONTEXT_EVENT_ADDRESS , _decod_instruction->_address ); + PORT_WRITE(out_CONTEXT_EVENT_ADDRESS_EPCR , _decod_instruction->_address_next ); + } + + // fetch_ack = + // ((event_type == EVENT_TYPE_NONE) or ((event_type != EVENT_TYPE_NONE) and context_event_ack)) and + // ((type == TYPE_BRANCH ) or ((type != TYPE_BRANCH ) and predict_ack )) and + // fetch_val and decod_ack and decod_enable and true (is decod_val) + + // To compute the "next previous" address + Tcontrol_t have_transaction = ifetch_ack [x][y]; + + internal_CONTEXT_HAVE_TRANSACTION [x] |= have_transaction; + if (have_transaction) + { +#ifdef STATISTICS + (*_stat_sum_inst_decod) ++; +#endif + internal_CONTEXT_ADDRESS_PREVIOUS [x] = addr; + internal_CONTEXT_IS_DELAY_SLOT [x] = (type == TYPE_BRANCH); // next is a delay slot if current have branch type + } + + can_continue [x] &= have_transaction; // to have a in order decod !!! if a previous instruction can decod, also next instruction can't decod. + } + + it ++; + } + } + + //----------------------------------- + // Write output + //----------------------------------- + + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) + PORT_WRITE(out_IFETCH_ACK [i][j], ifetch_ack [i][j]); + + PORT_WRITE(out_CONTEXT_EVENT_VAL, context_event_val); + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + PORT_WRITE(out_PREDICT_VAL [i], predict_val [i]); + PORT_WRITE(out_DECOD_VAL [i], decod_val [i]); + } + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_allocation.cpp (revision 78) @@ -0,0 +1,48 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::statistics_allocation" + void Decod::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Decod", + param_statistics); + + _stat_sum_inst_decod = _stat->create_variable ("sum_inst_decod" // ,"", "Sum of decod instruction" + ); + + + _stat->create_expr_average_by_cycle ("average_sum_inst_decod","sum_inst_decod","","Average of decod instruction by cycle"); + _stat->create_expr_percent ("percent_sum_inst_decod","average_sum_inst_decod", toString(_param->_nb_inst_decod), "Percent of decod instruction by cycle"); + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::statistics_deallocation" + void Decod::statistics_deallocation (void) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + log_printf(INFO,Decod,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_transition.cpp (revision 78) @@ -0,0 +1,119 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::transition" + void Decod::transition (void) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + reg_CONTEXT_PRIORITY = 0; + + for (uint32_t i=0; i<_param->_nb_context; i++) + reg_CONTEXT_ADDRESS_PREVIOUS [i] = 0xfc; // 0x100-4. (0x100 : reset address) + } + else + { + switch (_param->_priority) + { +// case PRIORITY_STATIC : +// { +// reg_CONTEXT_PRIORITY = (reg_CONTEXT_PRIORITY+_param->_nb_context_select)%_param->_nb_context; +// break; +// } + case PRIORITY_ROUND_ROBIN : + { + reg_CONTEXT_PRIORITY = (reg_CONTEXT_PRIORITY+1 )%_param->_nb_context; + break; + } + default: + { + break; + } + } + + // flush list + select.clear(); + + // Compute next scan order !!! + switch (_param->_load_balancing) + { +// case LOAD_BALANCING_BALANCE : +// { +// for (uint32_t j=0; j<_param->_max_nb_inst_fetch; j++) +// for (uint32_t i=0; i<_param->_nb_context_select; i++) +// { +// uint32_t x=(reg_CONTEXT_PRIORITY+i)%_param->_nb_context; + +// // Test valid inst_fetch +// if (j < _param->_nb_inst_fetch[x]) +// select.push_back(select_t(x,j)); +// } + +// break; +// } + case LOAD_BALANCING_MAXIMUM_FOR_PRIORITY : + { + + for (uint32_t i=0; i<_param->_nb_context_select; i++) + { + uint32_t x=(reg_CONTEXT_PRIORITY+i)%_param->_nb_context; + + for (uint32_t j=0; j<_param->_nb_inst_fetch[x]; j++) + select.push_back(select_t(x,j)); + } + + break; + } + default : + { + break; + } + } + + // Compute "next previous" address + for (uint32_t i=0; i<_param->_nb_context; i++) + if (internal_CONTEXT_HAVE_TRANSACTION[i]) + { + reg_CONTEXT_ADDRESS_PREVIOUS [i] = internal_CONTEXT_ADDRESS_PREVIOUS [i]; + reg_CONTEXT_IS_DELAY_SLOT [i] = internal_CONTEXT_IS_DELAY_SLOT [i]; + } + +// for (uint32_t i=0; i<_param->_nb_context; i++) +// log_printf(TRACE,Decod,FUNCTION,"[%d] %.8x %d",i,reg_CONTEXT_ADDRESS_PREVIOUS [i], reg_CONTEXT_IS_DELAY_SLOT [i]); + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::vhdl" + void Decod::vhdl (void) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::vhdl_body" + void Decod::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::vhdl_declaration" + void Decod::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters.cpp (revision 78) @@ -0,0 +1,92 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::Parameters" + Parameters::Parameters (uint32_t nb_context , + uint32_t * nb_inst_fetch , + uint32_t nb_inst_decod , + uint32_t nb_branch_speculated , + uint32_t size_branch_update_prediction, + uint32_t nb_context_select , + uint32_t size_general_data , + Tpriority_t priority , + Tload_balancing_t load_balancing , + bool ** instruction_implemeted , + morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + _nb_context = nb_context ; + _nb_inst_fetch = nb_inst_fetch ; + _nb_inst_decod = nb_inst_decod ; + _nb_branch_speculated = nb_branch_speculated ; + _nb_context_select = nb_context_select ; + _size_branch_update_prediction = size_branch_update_prediction; + _size_general_data = size_general_data ; + _priority = priority ; + _load_balancing = load_balancing ; + _instruction_implemeted = instruction_implemeted ; + + if (get_custom_information == NULL) + _get_custom_information = &(morpheo::behavioural::custom::default_get_custom_information); + else + _get_custom_information = get_custom_information; + + + _max_nb_inst_fetch = max(nb_inst_fetch,nb_context); + + _size_context_id = log2(nb_context ); + _size_depth = log2(nb_branch_speculated); + _size_inst_ifetch_ptr = log2(_max_nb_inst_fetch ); + + _have_port_context_id = _size_context_id > 0; + _have_port_depth = _size_depth > 0; + _have_port_branch_update_prediction_id = _size_branch_update_prediction > 0; + _have_port_inst_ifetch_ptr = _size_inst_ifetch_ptr > 0; + + test(); + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Decod::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Decod,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Decod,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Decod::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,62 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + std::string msg = ""; + + if (_nb_inst_decod == 0) + msg += " - nb_inst_decod must be > 0.\n"; + + if ((_size_general_data != 32) and + (_size_general_data != 64)) + msg += " - size_general_data must be equal at 32 or 64 bits.\n"; + + if ((_nb_branch_speculated == 0) or + (_nb_branch_speculated > _nb_context)) + msg += " - nb_branch_speculated must be in [1:nb_context].\n"; + + if ((_nb_context_select == 0) or + (_nb_context_select > _nb_context)) + msg += " - nb_context_select must be in [1:nb_context].\n"; + + if ((_priority != PRIORITY_ROUND_ROBIN)) + msg += " - Unsupported priority scheme. Supported scheme are : "+toString(PRIORITY_ROUND_ROBIN)+".\n"; + + if ((_load_balancing != LOAD_BALANCING_MAXIMUM_FOR_PRIORITY)) + msg += " - Unsupported load_balancing scheme. Supported scheme are : "+toString(LOAD_BALANCING_MAXIMUM_FOR_PRIORITY)+".\n"; + + return msg; + + log_printf(FUNC,Decod,FUNCTION,"End"); + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,76 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod { + + +#undef FUNCTION +#define FUNCTION "Decod::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + XML xml ("decod"); + + xml.balise_open("decod"); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_branch_speculated "); xml.attribut("value",toString(_nb_branch_speculated )); xml.singleton_end(); + xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); + xml.singleton_begin("nb_context_select "); xml.attribut("value",toString(_nb_context_select )); xml.singleton_end(); + xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); + xml.singleton_begin("priority "); xml.attribut("value",toString(_priority )); xml.singleton_end(); + xml.singleton_begin("load_balancing "); xml.attribut("value",toString(_load_balancing )); xml.singleton_end(); + + for (uint32_t i=0;i<_nb_context; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_inst_fetch "); xml.attribut("value",toString(_nb_inst_fetch [i])); xml.singleton_end(); + xml. balise_close(); + } + + xml.balise_close(); + + log_printf(FUNC,Decod,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Decod::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters & x) + { + log_printf(FUNC,Decod,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Decod,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace decod +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libAddress_management.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Address_management = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Address_management_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management + +#-----[ Library ]------------------------------------------ + +Address_management_LIBRARY = -lAddress_management \ + $(Behavioural_LIBRARY) + +Address_management_DIR_LIBRARY = -L$(Address_management_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Address_management_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Address_management_DIR) --makefile=Makefile; + +Address_management_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Address_management_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Address_management_LIBRARY) + +DIR_LIBRARY = $(Address_management_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Address_management_library + +library_clean : Address_management_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,4 @@ +Address_management +1 8 *2 # nb_instruction +32 32 *2 # size_address +1 4 *4 # size_branch_update_prediction Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,64 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/include/test.h" + +#define NB_PARAMS 3 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_instruction (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * size_branch_update_prediction (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _nb_instruction = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + uint32_t _size_branch_update_prediction = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters + (_nb_instruction , + _size_address , + _size_branch_update_prediction); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,375 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Address_management * _Address_management = new Address_management (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC_SC_SIGNAL (out_ADDRESS_VAL ,"out_ADDRESS_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_ADDRESS_ACK ," in_ADDRESS_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_ADDRESS_INSTRUCTION_ADDRESS ,"out_ADDRESS_INSTRUCTION_ADDRESS ",Tgeneral_address_t); + ALLOC1_SC_SIGNAL(out_ADDRESS_INSTRUCTION_ENABLE ,"out_ADDRESS_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_instruction); + ALLOC_SC_SIGNAL (out_ADDRESS_INST_IFETCH_PTR ,"out_ADDRESS_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t); + ALLOC_SC_SIGNAL (out_ADDRESS_BRANCH_STATE ,"out_ADDRESS_BRANCH_STATE ",Tbranch_state_t ); + ALLOC_SC_SIGNAL (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ); + ALLOC_SC_SIGNAL (out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_PREDICT_PC_PREVIOUS ,"out_PREDICT_PC_PREVIOUS ",Tgeneral_address_t); + ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT ,"out_PREDICT_PC_CURRENT ",Tgeneral_address_t); + ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT_IS_DS_TAKE ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT ," in_PREDICT_PC_NEXT ",Tgeneral_address_t); + ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT_IS_DS_TAKE ," in_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t ); + ALLOC1_SC_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE ," in_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_instruction); + ALLOC_SC_SIGNAL ( in_PREDICT_INST_IFETCH_PTR ," in_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t); + ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_STATE ," in_PREDICT_BRANCH_STATE ",Tbranch_state_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ); + ALLOC_SC_SIGNAL ( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_EVENT_ACK ,"out_EVENT_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS ," in_EVENT_ADDRESS ",Tgeneral_address_t); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Address_management.\n"),name.c_str()); + + (*(_Address_management->in_CLOCK)) (*(in_CLOCK)); + (*(_Address_management->in_NRESET)) (*(in_NRESET)); + + INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_VAL ); + INSTANCE_SC_SIGNAL (_Address_management, in_ADDRESS_ACK ); + INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_INSTRUCTION_ADDRESS ); + INSTANCE1_SC_SIGNAL(_Address_management,out_ADDRESS_INSTRUCTION_ENABLE ,_param->_nb_instruction); + if (_param->_have_port_instruction_ptr) + INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_INST_IFETCH_PTR ); + INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID); + INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_VAL ); + INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_ACK ); + INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_PC_PREVIOUS ); + INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_PC_CURRENT ); + INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_PC_CURRENT_IS_DS_TAKE ); + INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_PC_NEXT ); + INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_PC_NEXT_IS_DS_TAKE ); + INSTANCE1_SC_SIGNAL(_Address_management, in_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_instruction); + if (_param->_have_port_instruction_ptr) + INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_INST_IFETCH_PTR ); + INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); + INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_VAL ); + INSTANCE_SC_SIGNAL (_Address_management,out_EVENT_ACK ); + INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS ); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_address = 75; + const int32_t percent_transaction_predict = 75; + const int32_t percent_transaction_event = 10; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + + in_ADDRESS_ACK->write(0); + out_PREDICT_VAL->write(0); + in_EVENT_VAL ->write(0); + + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Test Reset"); + + TEST(Tcontrol_t, out_ADDRESS_VAL->read(), false); + TEST(Tcontrol_t, in_PREDICT_ACK->read(), false); // can't send a prediction + TEST(Tcontrol_t, out_EVENT_ACK->read() , true ); // can receveive an event + + Tcontrol_t p_val = false; + Tcontrol_t c_val = false; + Tcontrol_t n_val = false; + + Tgeneral_data_t p_addr = 0x100; + Tgeneral_data_t c_addr = 0x100; + Tgeneral_data_t n_addr = 0x100; + Tcontrol_t c_enable [_param->_nb_instruction]; + Tcontrol_t n_enable [_param->_nb_instruction]; + + Tcontrol_t c_is_ds_take = 0; + Tinst_ifetch_ptr_t c_ifetch_ptr = 0; + Tbranch_state_t c_branch_state = BRANCH_STATE_NONE; + Tprediction_ptr_t c_branch_ptr = 0; + + Tcontrol_t n_is_ds_take = 0; + Tinst_ifetch_ptr_t n_ifetch_ptr = 0; + Tbranch_state_t n_branch_state = BRANCH_STATE_NONE; + Tprediction_ptr_t n_branch_ptr = 0; + + c_enable [0] = 1; + for (uint32_t i=1; i<_param->_nb_instruction; i++) + c_enable [i] = 0; + + LABEL("Send Reset"); + do + { + in_EVENT_VAL ->write(1); + in_EVENT_ADDRESS->write(c_addr); + SC_START(1); + } while (out_EVENT_ACK->read() == false); + in_EVENT_VAL ->write(0); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iterationwrite((rand()%100)write((rand()%100)write(rand() << 2); + + uint32_t begin = rand() % _param->_nb_instruction; + uint32_t end = (begin + (rand() % _param->_nb_instruction)); + end = (end > _param->_nb_instruction)?_param->_nb_instruction:end; + + in_PREDICT_ACK ->write((rand()%100)_nb_instruction; i++) + in_PREDICT_INSTRUCTION_ENABLE [i] ->write((i>=begin) and (i<=end)); + in_PREDICT_PC_NEXT ->write(rand() << 2); + in_PREDICT_PC_NEXT_IS_DS_TAKE ->write(rand()%2); + in_PREDICT_INST_IFETCH_PTR ->write(begin); + in_PREDICT_BRANCH_STATE ->write(c_addr%SIZE_BRANCH_STATE); + in_PREDICT_BRANCH_UPDATE_PREDICTION_ID->write(c_addr%_param->_size_branch_update_prediction); + + SC_START(0); + + LABEL("---------------------"); + LABEL(" * pc-4 : %d %.8x",p_val, p_addr); + LABEL(" * pc : %d %.8x",c_val, c_addr); + LABEL(" * pc+4 : %d %.8x",n_val, n_addr); + LABEL("---------------------"); + + if (out_PREDICT_VAL->read() and in_PREDICT_ACK->read()) + { + LABEL("PREDICT : Transaction accepted"); + + TEST(Tgeneral_address_t,out_PREDICT_PC_PREVIOUS ->read(),p_addr); + TEST(Tgeneral_address_t,out_PREDICT_PC_CURRENT ->read(),c_addr); + TEST(Tcontrol_t ,out_PREDICT_PC_CURRENT_IS_DS_TAKE->read(),c_is_ds_take); + } + + if (out_ADDRESS_VAL->read() and in_ADDRESS_ACK->read()) + { + LABEL("ADDRESS : Transaction accepted"); + LABEL(" * address wait : %.8x",c_addr); + + TEST(Tgeneral_address_t,out_ADDRESS_INSTRUCTION_ADDRESS ->read(),c_addr); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + TEST(Tcontrol_t ,out_ADDRESS_INSTRUCTION_ENABLE [i] ->read(),c_enable[i]); + if (_param->_have_port_instruction_ptr) + TEST(Tinst_ifetch_ptr_t,out_ADDRESS_INST_IFETCH_PTR ->read(),c_ifetch_ptr ); + TEST(Tbranch_state_t ,out_ADDRESS_BRANCH_STATE ->read(),c_branch_state); + if (_param->_have_port_branch_update_prediction_id) + TEST(Tprediction_ptr_t ,out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID->read(),c_branch_ptr ); + + p_val = true; + c_val = n_val; + + p_addr = c_addr; + + if (n_val) + { + c_addr = n_addr; + + c_ifetch_ptr = n_ifetch_ptr ; + c_branch_state = n_branch_state; + c_branch_ptr = n_branch_ptr ; + c_is_ds_take = n_is_ds_take ; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + c_enable [i] = n_enable [i]; + } + + n_val = false; + + LABEL(" * pc-4 : %d %.8x",p_val, p_addr); + LABEL(" * pc : %d %.8x",c_val, c_addr); + LABEL(" * pc+4 : %d %.8x",n_val, n_addr); + } + + if (out_PREDICT_VAL->read() and in_PREDICT_ACK->read()) + { + LABEL("PREDICT : Update information"); + + if (c_val) + { + LABEL(" * current is valid -> new next"); + n_val = true; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + n_enable [i] = in_PREDICT_INSTRUCTION_ENABLE [i] ->read(); + n_addr = in_PREDICT_PC_NEXT ->read(); + n_is_ds_take = in_PREDICT_PC_NEXT_IS_DS_TAKE ->read(); + n_ifetch_ptr = in_PREDICT_INST_IFETCH_PTR ->read(); + n_branch_state = in_PREDICT_BRANCH_STATE ->read(); + n_branch_ptr = in_PREDICT_BRANCH_UPDATE_PREDICTION_ID->read(); + } + else + { + LABEL(" * current is not valid -> new current"); + c_val = true; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + c_enable [i] = in_PREDICT_INSTRUCTION_ENABLE [i] ->read(); + c_addr = in_PREDICT_PC_NEXT ->read(); + c_is_ds_take = in_PREDICT_PC_NEXT_IS_DS_TAKE ->read(); + c_ifetch_ptr = in_PREDICT_INST_IFETCH_PTR ->read(); + c_branch_state = in_PREDICT_BRANCH_STATE ->read(); + c_branch_ptr = in_PREDICT_BRANCH_UPDATE_PREDICTION_ID->read(); + } + + LABEL(" * pc-4 : %d %.8x",p_val, p_addr); + LABEL(" * pc : %d %.8x",c_val, c_addr); + LABEL(" * pc+4 : %d %.8x",n_val, n_addr); + + } + + if (in_EVENT_VAL->read() and out_EVENT_ACK->read()) + { + LABEL("EVENT : Transaction accepted"); + + c_val = true; + n_val = false; + + c_addr = in_EVENT_ADDRESS->read(); + c_ifetch_ptr = 0; + c_branch_state = BRANCH_STATE_NONE; + c_branch_ptr = 0; + c_is_ds_take = 0; + + c_enable [0] = 1; + for (uint32_t i=1; i<_param->_nb_instruction; i++) + c_enable [i] = 0; + + LABEL(" * pc-4 : %d %.8x",p_val, p_addr); + LABEL(" * pc : %d %.8x",c_val, c_addr); + LABEL(" * pc+4 : %d %.8x",n_val, n_addr); + } + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete out_ADDRESS_VAL ; + delete in_ADDRESS_ACK ; + delete out_ADDRESS_INSTRUCTION_ADDRESS ; + delete [] out_ADDRESS_INSTRUCTION_ENABLE ; + delete out_ADDRESS_INST_IFETCH_PTR ; + delete out_ADDRESS_BRANCH_STATE ; + delete out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID; + delete out_PREDICT_VAL ; + delete in_PREDICT_ACK ; + delete out_PREDICT_PC_PREVIOUS ; + delete out_PREDICT_PC_CURRENT ; + delete out_PREDICT_PC_CURRENT_IS_DS_TAKE ; + delete in_PREDICT_PC_NEXT ; + delete in_PREDICT_PC_NEXT_IS_DS_TAKE ; + delete [] in_PREDICT_INSTRUCTION_ENABLE ; + delete in_PREDICT_INST_IFETCH_PTR ; + delete in_PREDICT_BRANCH_STATE ; + delete in_PREDICT_BRANCH_UPDATE_PREDICTION_ID; + delete in_EVENT_VAL ; + delete out_EVENT_ACK ; + delete in_EVENT_ADDRESS ; +#endif + + delete _Address_management; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/Address_management.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/Address_management.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/Address_management.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Address_management} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h (revision 78) @@ -0,0 +1,176 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_address_management_Address_management_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_address_management_Address_management_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + + class Address_management +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_ADDRESS_VAL ; + public : SC_IN (Tcontrol_t ) * in_ADDRESS_ACK ; //icache_req_ack and ifetch_queue_ack + public : SC_OUT(Tgeneral_address_t ) * out_ADDRESS_INSTRUCTION_ADDRESS ; + public : SC_OUT(Tcontrol_t ) ** out_ADDRESS_INSTRUCTION_ENABLE ; //[nb_instruction] + public : SC_OUT(Tinst_ifetch_ptr_t ) * out_ADDRESS_INST_IFETCH_PTR ; + public : SC_OUT(Tbranch_state_t ) * out_ADDRESS_BRANCH_STATE ; + public : SC_OUT(Tprediction_ptr_t ) * out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_PREDICT_VAL ; + public : SC_IN (Tcontrol_t ) * in_PREDICT_ACK ; + public : SC_OUT(Tgeneral_address_t ) * out_PREDICT_PC_PREVIOUS ; + public : SC_OUT(Tgeneral_address_t ) * out_PREDICT_PC_CURRENT ; + public : SC_OUT(Tcontrol_t ) * out_PREDICT_PC_CURRENT_IS_DS_TAKE ; + public : SC_IN (Tgeneral_address_t ) * in_PREDICT_PC_NEXT ; + public : SC_IN (Tcontrol_t ) * in_PREDICT_PC_NEXT_IS_DS_TAKE ; + public : SC_IN (Tcontrol_t ) ** in_PREDICT_INSTRUCTION_ENABLE ; //[nb_instruction] + public : SC_IN (Tinst_ifetch_ptr_t ) * in_PREDICT_INST_IFETCH_PTR ; + public : SC_IN (Tbranch_state_t ) * in_PREDICT_BRANCH_STATE ; + public : SC_IN (Tprediction_ptr_t ) * in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; + + // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_EVENT_VAL ; + public : SC_OUT(Tcontrol_t ) * out_EVENT_ACK ; + public : SC_IN (Tgeneral_address_t) * in_EVENT_ADDRESS ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t reg_PC_PREVIOUS_VAL; + private : Tgeneral_address_t reg_PC_PREVIOUS; + + private : Tcontrol_t reg_PC_CURRENT_VAL; + private : Tgeneral_address_t reg_PC_CURRENT; + private : Tcontrol_t reg_PC_CURRENT_IS_DS_TAKE; + private : Tcontrol_t * reg_PC_CURRENT_INSTRUCTION_ENABLE ; //[nb_instruction] + private : Tinst_ifetch_ptr_t reg_PC_CURRENT_INST_IFETCH_PTR ; + private : Tbranch_state_t reg_PC_CURRENT_BRANCH_STATE ; + private : Tprediction_ptr_t reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID; + + private : Tcontrol_t reg_PC_NEXT_VAL; + private : Tgeneral_address_t reg_PC_NEXT; + private : Tcontrol_t reg_PC_NEXT_IS_DS_TAKE; + private : Tcontrol_t * reg_PC_NEXT_INSTRUCTION_ENABLE ; //[nb_instruction] + private : Tinst_ifetch_ptr_t reg_PC_NEXT_INST_IFETCH_PTR ; + private : Tbranch_state_t reg_PC_NEXT_BRANCH_STATE ; + private : Tprediction_ptr_t reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID; + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t internal_ADDRESS_VAL; + private : Tcontrol_t internal_PREDICT_VAL; + private : Tcontrol_t internal_EVENT_ACK ; +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Address_management); +#endif + public : Address_management + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Address_management (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMoore (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h (revision 78) @@ -0,0 +1,58 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_address_management_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_address_management_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_instruction ; + public : uint32_t _size_address ; + public : uint32_t _size_branch_update_prediction; + + public : uint32_t _size_instruction_ptr ; + + public : bool _have_port_instruction_ptr ; + public : bool _have_port_branch_update_prediction_id; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_instruction, + uint32_t size_address , + uint32_t size_branch_update_prediction); + +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters & x); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management.cpp (revision 78) @@ -0,0 +1,125 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::Address_management" + Address_management::Address_management + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + log_printf(INFO,Address_management,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Address_management,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Address_management,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + // Affect output constant + internal_EVENT_ACK = 1; + PORT_WRITE(out_EVENT_ACK, internal_EVENT_ACK); + + log_printf(INFO,Address_management,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Address_management,FUNCTION,"Method - genMoore"); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Address_management::~Address_management" + Address_management::~Address_management (void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Address_management,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp (revision 78) @@ -0,0 +1,124 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + + +#undef FUNCTION +#define FUNCTION "Address_management::allocation" + void Address_management::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Address_management" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("address", OUT, SOUTH, "Access at request icache."); + + ALLOC_VALACK_OUT (out_ADDRESS_VAL ,VAL); + ALLOC_VALACK_IN ( in_ADDRESS_ACK ,ACK); + ALLOC_SIGNAL_OUT (out_ADDRESS_INSTRUCTION_ADDRESS ,"instruction_address" ,Tgeneral_address_t,_param->_size_address ); + ALLOC_SIGNAL_OUT (out_ADDRESS_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr ); + ALLOC_SIGNAL_OUT (out_ADDRESS_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); + ALLOC_SIGNAL_OUT (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + } + + { + ALLOC1_INTERFACE("address", OUT, SOUTH, "Access at request icache.",_param->_nb_instruction); + + ALLOC1_SIGNAL_OUT(out_ADDRESS_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("predict", IN, NORTH, "Request the prediction unit."); + + ALLOC_VALACK_OUT (out_PREDICT_VAL ,VAL); + ALLOC_VALACK_IN ( in_PREDICT_ACK ,ACK); + ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS ,"pc_previous" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT ,"pc_current" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE ,"pc_current_is_ds_take" ,Tcontrol_t ,1); + ALLOC_SIGNAL_IN ( in_PREDICT_PC_NEXT ,"pc_next" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_IN ( in_PREDICT_PC_NEXT_IS_DS_TAKE ,"pc_next_is_ds_take" ,Tcontrol_t ,1); + ALLOC_SIGNAL_IN ( in_PREDICT_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr); + ALLOC_SIGNAL_IN ( in_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); + ALLOC_SIGNAL_IN ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + } + { + ALLOC1_INTERFACE("predict", IN, NORTH, "Request the prediction unit.",_param->_nb_instruction); + + ALLOC1_SIGNAL_IN (in_PREDICT_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); + } + + // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("event", IN, SOUTH, "Event (miss, exception ...)"); + + ALLOC_VALACK_IN ( in_EVENT_VAL ,VAL); + ALLOC_VALACK_OUT(out_EVENT_ACK ,ACK); + ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS,"address",Tgeneral_address_t,_param->_size_address); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + reg_PC_CURRENT_INSTRUCTION_ENABLE = new Tcontrol_t [_param->_nb_instruction]; + reg_PC_NEXT_INSTRUCTION_ENABLE = new Tcontrol_t [_param->_nb_instruction]; + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_deallocation.cpp (revision 78) @@ -0,0 +1,74 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::deallocation" + void Address_management::deallocation (void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete out_ADDRESS_VAL ; + delete in_ADDRESS_ACK ; + delete out_ADDRESS_INSTRUCTION_ADDRESS ; + delete [] out_ADDRESS_INSTRUCTION_ENABLE ; + if (_param->_have_port_instruction_ptr) + delete out_ADDRESS_INST_IFETCH_PTR ; + delete out_ADDRESS_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID; + delete out_PREDICT_VAL ; + delete in_PREDICT_ACK ; + delete out_PREDICT_PC_PREVIOUS ; + delete out_PREDICT_PC_CURRENT ; + delete out_PREDICT_PC_CURRENT_IS_DS_TAKE ; + delete in_PREDICT_PC_NEXT ; + delete in_PREDICT_PC_NEXT_IS_DS_TAKE ; + delete [] in_PREDICT_INSTRUCTION_ENABLE ; + if (_param->_have_port_instruction_ptr) + delete in_PREDICT_INST_IFETCH_PTR ; + delete in_PREDICT_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete in_PREDICT_BRANCH_UPDATE_PREDICTION_ID; + delete in_EVENT_VAL ; + delete out_EVENT_ACK ; + delete in_EVENT_ADDRESS ; + } + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete reg_PC_CURRENT_INSTRUCTION_ENABLE; + delete reg_PC_NEXT_INSTRUCTION_ENABLE ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete _component; + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::end_cycle" +void Address_management::end_cycle () + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp (revision 78) @@ -0,0 +1,67 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::genMoore" + void Address_management::genMoore (void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + // ========================================= + // ===== ADDRESS =========================== + // ========================================= + + internal_ADDRESS_VAL = reg_PC_CURRENT_VAL; + + PORT_WRITE(out_ADDRESS_VAL ,internal_ADDRESS_VAL ); + PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS ,reg_PC_CURRENT ); + if (_param->_have_port_instruction_ptr) + PORT_WRITE(out_ADDRESS_INST_IFETCH_PTR ,reg_PC_CURRENT_INST_IFETCH_PTR ); + PORT_WRITE(out_ADDRESS_BRANCH_STATE ,reg_PC_CURRENT_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + PORT_WRITE(out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID); + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + PORT_WRITE(out_ADDRESS_INSTRUCTION_ENABLE [i], reg_PC_CURRENT_INSTRUCTION_ENABLE[i]); + + // ========================================= + // ===== PREDICT =========================== + // ========================================= + + internal_PREDICT_VAL = reg_PC_PREVIOUS_VAL and not reg_PC_NEXT_VAL; + + PORT_WRITE(out_PREDICT_VAL ,internal_PREDICT_VAL); + PORT_WRITE(out_PREDICT_PC_PREVIOUS ,reg_PC_PREVIOUS ); + PORT_WRITE(out_PREDICT_PC_CURRENT ,reg_PC_CURRENT ); + PORT_WRITE(out_PREDICT_PC_CURRENT_IS_DS_TAKE,reg_PC_CURRENT_IS_DS_TAKE); + + + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_statistics_allocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::statistics_allocation" + void Address_management::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Address_management", + param_statistics); + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::statistics_deallocation" + void Address_management::statistics_deallocation (void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + log_printf(INFO,Address_management,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 78) @@ -0,0 +1,138 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::transition" + void Address_management::transition (void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + reg_PC_PREVIOUS_VAL = 0; + reg_PC_CURRENT_VAL = 0; + reg_PC_NEXT_VAL = 0; + } + else + { + // ========================================= + // ===== ADDRESS =========================== + // ========================================= + // transaction with icache + if (internal_ADDRESS_VAL and PORT_READ(in_ADDRESS_ACK)) + { + // current pc became previous pc + reg_PC_PREVIOUS_VAL = 1; + reg_PC_PREVIOUS = reg_PC_CURRENT ; + + // next pc became next pc + reg_PC_CURRENT_VAL = reg_PC_NEXT_VAL; // can be not valid + + // if pc_next is not valid : don't erase PC and PC_IS_DS_TAKE : this register is send a the predict (to compute pc_next) + if (reg_PC_NEXT_VAL) + { + reg_PC_CURRENT = reg_PC_NEXT ; + reg_PC_CURRENT_IS_DS_TAKE = reg_PC_NEXT_IS_DS_TAKE ; + } + + reg_PC_CURRENT_INST_IFETCH_PTR = reg_PC_NEXT_INST_IFETCH_PTR ; + reg_PC_CURRENT_BRANCH_STATE = reg_PC_NEXT_BRANCH_STATE ; + reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = reg_PC_NEXT_INSTRUCTION_ENABLE [i]; + + // have not next pc + reg_PC_NEXT_VAL = 0; + } + + // ========================================= + // ===== PREDICT =========================== + // ========================================= + bool new_pc_current = not reg_PC_CURRENT_VAL; + if (PORT_READ(in_PREDICT_ACK) and internal_PREDICT_VAL) + if (new_pc_current) + { + reg_PC_CURRENT_VAL = 1; + reg_PC_CURRENT = PORT_READ(in_PREDICT_PC_NEXT ); + reg_PC_CURRENT_IS_DS_TAKE = PORT_READ(in_PREDICT_PC_NEXT_IS_DS_TAKE ); + if (_param->_have_port_instruction_ptr) + reg_PC_CURRENT_INST_IFETCH_PTR = PORT_READ(in_PREDICT_INST_IFETCH_PTR ); + reg_PC_CURRENT_BRANCH_STATE = PORT_READ(in_PREDICT_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = PORT_READ(in_PREDICT_INSTRUCTION_ENABLE [i]); + } + else + { + reg_PC_NEXT_VAL = 1; + reg_PC_NEXT = PORT_READ(in_PREDICT_PC_NEXT ); + reg_PC_NEXT_IS_DS_TAKE = PORT_READ(in_PREDICT_PC_NEXT_IS_DS_TAKE ); + if (_param->_have_port_instruction_ptr) + reg_PC_NEXT_INST_IFETCH_PTR = PORT_READ(in_PREDICT_INST_IFETCH_PTR ); + reg_PC_NEXT_BRANCH_STATE = PORT_READ(in_PREDICT_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + reg_PC_NEXT_INSTRUCTION_ENABLE [i] = PORT_READ(in_PREDICT_INSTRUCTION_ENABLE [i]); + } + + // ========================================= + // ===== EVENT ============================= + // ========================================= + if (PORT_READ(in_EVENT_VAL) and internal_EVENT_ACK) + { + reg_PC_CURRENT_VAL = 1; + reg_PC_CURRENT = PORT_READ(in_EVENT_ADDRESS); + // Event is never is ds_take : + // * branch miss speculation : can't be place a branch in delay slot + // * load miss speculation : the load is execute, the event_address is the next address (also the destination of branch) + // * exception : goto the first instruction of exception handler (also is not in delay slot). + reg_PC_CURRENT_IS_DS_TAKE = 0; + reg_PC_CURRENT_INST_IFETCH_PTR = 0; + reg_PC_CURRENT_BRANCH_STATE = BRANCH_STATE_NONE; + reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = 0; + + reg_PC_CURRENT_INSTRUCTION_ENABLE [0] = 1; // only the instruction at the event address is valid, because we have no information on the branch presence in the instruction bundle. + for (uint32_t i=1; i<_param->_nb_instruction; i++) + reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = 0; + + reg_PC_NEXT_VAL = 0; // cancel all prediction (event is send at the predict unit) + } + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::vhdl" + void Address_management::vhdl (void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::vhdl_body" + void Address_management::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::vhdl_declaration" + void Address_management::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters.cpp (revision 78) @@ -0,0 +1,64 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::Parameters" + Parameters::Parameters (uint32_t nb_instruction, + uint32_t size_address , + uint32_t size_branch_update_prediction) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + _nb_instruction = nb_instruction ; + _size_address = size_address ; + _size_branch_update_prediction = size_branch_update_prediction; + + _size_instruction_ptr = log2(nb_instruction); + + _have_port_instruction_ptr = _size_instruction_ptr > 0; + _have_port_branch_update_prediction_id = size_branch_update_prediction > 0; + + test(); + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Address_management::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Address_management,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Address_management,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Address_management::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + log_printf(FUNC,Address_management,FUNCTION,"End"); + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,41 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + Parameters_test test ("Address_management"); + + log_printf(FUNC,Address_management,FUNCTION,"End"); + + return test; + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace address_management { + + +#undef FUNCTION +#define FUNCTION "Address_management::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + XML xml ("address_management"); + + xml.balise_open("address_management"); + xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Address_management,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Address_management::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters & x) + { + log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Address_management,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace address_management +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libIfetch_queue.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Ifetch_queue = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Ifetch_queue_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue + +#-----[ Library ]------------------------------------------ + +Ifetch_queue_LIBRARY = -lIfetch_queue \ + $(Behavioural_LIBRARY) + +Ifetch_queue_DIR_LIBRARY = -L$(Ifetch_queue_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Ifetch_queue_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Ifetch_queue_DIR) --makefile=Makefile; + +Ifetch_queue_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Ifetch_queue_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Ifetch_queue_LIBRARY) + +DIR_LIBRARY = $(Ifetch_queue_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Ifetch_queue_library + +library_clean : Ifetch_queue_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/cfg/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/cfg/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/cfg/configuration.cfg (revision 78) @@ -0,0 +1,5 @@ +Ifetch_queue +1 8 *2 # _size_queue +1 8 *2 # _nb_instruction +1 1 *2 # _size_branch_update_prediction +32 32 *2 # _size_general_data Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,5 @@ +Ifetch_queue +1 8 *2 # _size_queue +1 8 *2 # _nb_instruction +1 1 *2 # _size_branch_update_prediction +32 32 *2 # _size_general_data Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,67 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h" + +#define NB_PARAMS 4 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * size_queue (uint32_t)\n")); + err (_(" * nb_instruction (uint32_t)\n")); + err (_(" * size_branch_update_prediction (uint32_t)\n")); + err (_(" * size_general_data (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _size_queue = fromString(argv[x++]); + uint32_t _nb_instruction = fromString(argv[x++]); + uint32_t _size_branch_update_prediction = fromString(argv[x++]); + uint32_t _size_general_data = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters + (_size_queue , + _nb_instruction , + _size_branch_update_prediction , + _size_general_data ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,416 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" +#include +#include + +#define NB_ITERATION 1 +#define CYCLE_MAX (2048*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + + +class entry_t +{ +public : uint32_t _cycle; +public : Tpacket_t _packet; +public : Tgeneral_address_t _addr; + +public : entry_t (uint32_t cycle, + Tpacket_t packet, + Tgeneral_address_t addr ) + { + _cycle = cycle ; + _packet = packet; + _addr = addr ; + } +}; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,1000); +#endif + + Ifetch_queue * _Ifetch_queue = new Ifetch_queue (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC_SC_SIGNAL ( in_ADDRESS_VAL ," in_ADDRESS_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_ADDRESS_ACK ,"out_ADDRESS_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_ADDRESS_IFETCH_QUEUE_ID ,"out_ADDRESS_IFETCH_QUEUE_ID ",Tifetch_queue_ptr_t ); + ALLOC1_SC_SIGNAL( in_ADDRESS_INSTRUCTION_ENABLE ," in_ADDRESS_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_instruction); + ALLOC_SC_SIGNAL ( in_ADDRESS_INSTRUCTION_ADDRESS ," in_ADDRESS_INSTRUCTION_ADDRESS ",Tgeneral_address_t ); + ALLOC_SC_SIGNAL ( in_ADDRESS_INST_IFETCH_PTR ," in_ADDRESS_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ); + ALLOC_SC_SIGNAL ( in_ADDRESS_BRANCH_STATE ," in_ADDRESS_BRANCH_STATE ",Tbranch_state_t ); + ALLOC_SC_SIGNAL ( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID," in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ); + ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_instruction); + ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_instruction); + ALLOC1_SC_SIGNAL(out_DECOD_INSTRUCTION ,"out_DECOD_INSTRUCTION ",Tinstruction_t ,_param->_nb_instruction); + ALLOC_SC_SIGNAL (out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_address_t ); + ALLOC_SC_SIGNAL (out_DECOD_INST_IFETCH_PTR ,"out_DECOD_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ); + ALLOC_SC_SIGNAL (out_DECOD_BRANCH_STATE ,"out_DECOD_BRANCH_STATE ",Tbranch_state_t ); + ALLOC_SC_SIGNAL (out_DECOD_BRANCH_UPDATE_PREDICTION_ID ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ); + ALLOC_SC_SIGNAL (out_DECOD_EXCEPTION ,"out_DECOD_EXCEPTION ",Tprediction_ptr_t ); + ALLOC_SC_SIGNAL ( in_ICACHE_RSP_VAL ," in_ICACHE_RSP_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_ICACHE_RSP_ACK ,"out_ICACHE_RSP_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_ICACHE_RSP_PACKET_ID ," in_ICACHE_RSP_PACKET_ID ",Tpacket_t ); + ALLOC1_SC_SIGNAL( in_ICACHE_RSP_INSTRUCTION ," in_ICACHE_RSP_INSTRUCTION ",Ticache_instruction_t,_param->_nb_instruction); + ALLOC_SC_SIGNAL ( in_ICACHE_RSP_ERROR ," in_ICACHE_RSP_ERROR ",Ticache_error_t ); + ALLOC_SC_SIGNAL ( in_EVENT_RESET_VAL ," in_EVENT_RESET_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_EVENT_RESET_ACK ,"out_EVENT_RESET_ACK ",Tcontrol_t ); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Ifetch_queue.\n"),name.c_str()); + + (*(_Ifetch_queue->in_CLOCK)) (*(in_CLOCK)); + (*(_Ifetch_queue->in_NRESET)) (*(in_NRESET)); + + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_ADDRESS_ACK ); + if (_param->_have_port_queue_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_ADDRESS_IFETCH_QUEUE_ID ); + INSTANCE1_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_INSTRUCTION_ENABLE ,_param->_nb_instruction); + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_INSTRUCTION_ADDRESS ); + if (_param->_have_port_instruction_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_INST_IFETCH_PTR ); + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID); + INSTANCE1_SC_SIGNAL(_Ifetch_queue,out_DECOD_VAL ,_param->_nb_instruction); + INSTANCE1_SC_SIGNAL(_Ifetch_queue, in_DECOD_ACK ,_param->_nb_instruction); + INSTANCE1_SC_SIGNAL(_Ifetch_queue,out_DECOD_INSTRUCTION ,_param->_nb_instruction); + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_ADDRESS ); + if (_param->_have_port_instruction_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_INST_IFETCH_PTR ); + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_BRANCH_UPDATE_PREDICTION_ID ); + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_EXCEPTION ); + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ICACHE_RSP_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_ICACHE_RSP_ACK ); + if (_param->_have_port_queue_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ICACHE_RSP_PACKET_ID ); + INSTANCE1_SC_SIGNAL(_Ifetch_queue, in_ICACHE_RSP_INSTRUCTION ,_param->_nb_instruction); + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ICACHE_RSP_ERROR ); + INSTANCE_SC_SIGNAL (_Ifetch_queue, in_EVENT_RESET_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_queue,out_EVENT_RESET_ACK ); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_address = 75; + const int32_t percent_transaction_decod = 75; + const int32_t percent_transaction_event_reset = 10; + const int32_t percent_icache_hit = 100; + const int32_t icache_miss_penality = 10; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + list list_wait_decod; + list list_req_icache; + + Tgeneral_data_t modulo_iberr = 23; + Tinstruction_t xor_inst = 0xdeadbeef; + Tgeneral_data_t address; + for (uint32_t iteration=0; iteration 0) and + (nb_request_out > 0)) + { + // ===== + // ===== ADDRESS + // ===== + in_ADDRESS_VAL ->write((nb_request_in > 0) and ((rand()%100)write(address); + uint32_t nb_inst_enable = (rand() % _param->_nb_instruction); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + in_ADDRESS_INSTRUCTION_ENABLE [i] ->write(i<=nb_inst_enable); + if (_param->_have_port_instruction_ptr) + in_ADDRESS_INST_IFETCH_PTR ->write(address%_param->_nb_instruction); + in_ADDRESS_BRANCH_STATE ->write(address%SIZE_BRANCH_STATE); + if (_param->_have_port_branch_update_prediction_id) + in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ->write(address%_param->_size_branch_update_prediction); + + // ===== + // ===== DECOD + // ===== + for (uint32_t i=0; i<_param->_nb_instruction; i++) + in_DECOD_ACK [i]->write(0); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + if ((rand()%100)>percent_transaction_decod) + break; + in_DECOD_ACK [i]->write(1); + } + + // ===== + // ===== ICACHE_RSP + // ===== + Tcontrol_t icache_rsp_val = not list_req_icache.empty() and (list_req_icache.front()._cycle == 0); + +// LABEL("Test ICACHE_RSP :"); +// LABEL(" * list_req_icache.empty() : %d",list_req_icache.empty()); +// if (not list_req_icache.empty()) +// LABEL(" * list_req_icache.front()._cycle : %d",list_req_icache.front()._cycle); + + in_ICACHE_RSP_VAL->write(icache_rsp_val); + + if (icache_rsp_val) + { + for (uint32_t i=0; i<_param->_nb_instruction; i++) + in_ICACHE_RSP_INSTRUCTION [i]->write((list_req_icache.front()._addr + 4*i)^xor_inst); + in_ICACHE_RSP_PACKET_ID ->write(list_req_icache.front()._packet); + in_ICACHE_RSP_ERROR ->write(((list_req_icache.front()._addr % modulo_iberr)==0)?ICACHE_ERROR_BUS_ERROR:ICACHE_ERROR_NONE); + } + + // ===== + // ===== EVENT_RESET + // ===== + in_EVENT_RESET_VAL->write((rand()%100)read() and + out_ADDRESS_ACK->read()) + { + LABEL("ADDRESS : transaction accepted"); + LABEL(" * address : %.8x",address); + + list_wait_decod.push_back(address); +// list_req_icache.insert(, entry_t((_param->_have_port_queue_ptr)?out_ADDRESS_IFETCH_QUEUE_ID->read():0,address)); + + uint32_t cycle = ((rand()%100)::iterator it; + for (it=list_req_icache.begin(); it != list_req_icache.end(); it++) + if (cycle < it->_cycle) + break; + + LABEL(" * list_req_icache : %d",list_req_icache.size()); + list_req_icache.insert(it,entry_t(cycle,(_param->_have_port_queue_ptr)?out_ADDRESS_IFETCH_QUEUE_ID->read():0,address)); + LABEL(" * list_req_icache : %d",list_req_icache.size()); + address += 4*_param->_nb_instruction; + } + + // ===== + // ===== DECOD + // ===== + bool have_decod_transaction = false; + uint32_t nb_decod_keep = 0; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + if (out_DECOD_VAL [i]->read()) + { + LABEL("DECOD_VAL [%d] ",i); + nb_decod_keep ++; + + if (in_DECOD_ACK [i]->read()) + { + LABEL("DECOD_ACK [%d] ",i); + + have_decod_transaction = true; + nb_decod_keep --; + + TEST(bool , list_wait_decod.empty() , false); + TEST(Tinstruction_t , out_DECOD_INSTRUCTION[i]->read(), (list_wait_decod.front()+4*i)^xor_inst); + } + } + } + + if (have_decod_transaction) + { + + Tgeneral_data_t addr = list_wait_decod.front(); + + LABEL("DECOD : transaction accepted"); + LABEL(" * address : %.8x",addr); + + TEST(Tgeneral_data_t ,out_DECOD_ADDRESS ->read(), addr); + TEST(Tbranch_state_t ,out_DECOD_BRANCH_STATE ->read(),addr%SIZE_BRANCH_STATE); + if (_param->_have_port_instruction_ptr) + TEST(Tinst_ifetch_ptr_t,out_DECOD_INST_IFETCH_PTR ->read(),addr%_param->_nb_instruction); + if (_param->_have_port_branch_update_prediction_id) + TEST(Tprediction_ptr_t ,out_DECOD_BRANCH_UPDATE_PREDICTION_ID->read(),addr%_param->_size_branch_update_prediction); + if ((addr % modulo_iberr) == 0) + TEST(Texception_t ,out_DECOD_EXCEPTION ->read(),EXCEPTION_IFETCH_BUS_ERROR); + else + TEST(Texception_t ,out_DECOD_EXCEPTION ->read(),EXCEPTION_IFETCH_NONE ); + + // all is decod + LABEL(" * nb_decod_keep : %d",nb_decod_keep); + if (nb_decod_keep == 0) + { + LABEL(" * decod all bundle"); + list_wait_decod.pop_front(); + nb_request_out --; + } + } + + // ===== + // ===== ICACHE_RSP + // ===== + if ( in_ICACHE_RSP_VAL->read() and + out_ICACHE_RSP_ACK->read()) + { + LABEL("ICACHE_RSP : transaction accepted"); + LABEL(" * address : %.8x",list_req_icache.front()._addr); + LABEL(" * list_req_icache : %d",list_req_icache.size()); + list_req_icache.pop_front(); + LABEL(" * list_req_icache : %d",list_req_icache.size()); + + } + + // ===== + // ===== EVENT_RESET + // ===== + if ( in_EVENT_RESET_VAL->read() and + out_EVENT_RESET_ACK->read() ) + { + LABEL("EVENT_RESET : transaction accepted"); + list_wait_decod.clear(); + } + + SC_START(1); + + for (list::iterator it=list_req_icache.begin(); it != list_req_icache.end(); it++) + { + LABEL("ICACHE : %d %d %.8x",it->_cycle, it->_packet, it->_addr); + if (it->_cycle > 0) + it->_cycle --; + } + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + delete in_ADDRESS_VAL ; + delete out_ADDRESS_ACK ; + delete out_ADDRESS_IFETCH_QUEUE_ID ; + delete [] in_ADDRESS_INSTRUCTION_ENABLE ; + delete in_ADDRESS_INSTRUCTION_ADDRESS ; + delete in_ADDRESS_INST_IFETCH_PTR ; + delete in_ADDRESS_BRANCH_STATE ; + delete in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID; + delete [] out_DECOD_VAL ; + delete [] in_DECOD_ACK ; + delete [] out_DECOD_INSTRUCTION ; + delete out_DECOD_ADDRESS ; + delete out_DECOD_INST_IFETCH_PTR ; + delete out_DECOD_BRANCH_STATE ; + delete out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + delete out_DECOD_EXCEPTION ; + delete in_ICACHE_RSP_VAL ; + delete out_ICACHE_RSP_ACK ; + delete in_ICACHE_RSP_PACKET_ID ; + delete [] in_ICACHE_RSP_INSTRUCTION ; + delete in_ICACHE_RSP_ERROR ; + delete in_EVENT_RESET_VAL ; + delete out_EVENT_RESET_ACK ; + +#endif + + delete _Ifetch_queue; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/Ifetch_queue.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/Ifetch_queue.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/Ifetch_queue.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Ifetch_queue} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h (revision 78) @@ -0,0 +1,175 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_queue_Ifetch_queue_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_queue_Ifetch_queue_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + class Ifetch_queue +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; + private : counter_t * _sum_use_queue ; + private : counter_t * _sum_use_queue_wait_rsp; + private : counter_t * _sum_use_queue_have_rsp; + private : counter_t * _sum_use_queue_error_wait_rsp; + + private : counter_t * _sum_inst_enable; + private : counter_t * _sum_transaction_address; + + private : counter_t * _average_occupation_bundle; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_ADDRESS_VAL ; + public : SC_OUT(Tcontrol_t ) * out_ADDRESS_ACK ; + public : SC_OUT(Tifetch_queue_ptr_t) * out_ADDRESS_IFETCH_QUEUE_ID ; + public : SC_IN (Tcontrol_t ) ** in_ADDRESS_INSTRUCTION_ENABLE ;//[nb_instruction] + public : SC_IN (Tgeneral_address_t ) * in_ADDRESS_INSTRUCTION_ADDRESS ; + public : SC_IN (Tinst_ifetch_ptr_t ) * in_ADDRESS_INST_IFETCH_PTR ; + public : SC_IN (Tbranch_state_t ) * in_ADDRESS_BRANCH_STATE ; + public : SC_IN (Tprediction_ptr_t ) * in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ; + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_DECOD_VAL ;//[nb_instruction] + public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_instruction] + public : SC_OUT(Tinstruction_t ) ** out_DECOD_INSTRUCTION ;//[nb_instruction] + public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; + public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; + public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; + public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; + + // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_ICACHE_RSP_VAL ; + public : SC_OUT(Tcontrol_t ) * out_ICACHE_RSP_ACK ; + public : SC_IN (Tpacket_t ) * in_ICACHE_RSP_PACKET_ID ; + public : SC_IN (Ticache_instruction_t)** in_ICACHE_RSP_INSTRUCTION ;//[nb_instruction] + public : SC_IN (Ticache_error_t ) * in_ICACHE_RSP_ERROR ; + + // ~~~~~[ Interface "event_reset" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_EVENT_RESET_VAL ;// val if : miss_speculation, exception, synchronization + public : SC_OUT(Tcontrol_t ) * out_EVENT_RESET_ACK ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t reg_PTR_READ ; + private : uint32_t reg_PTR_WRITE; + private : ifetch_queue_entry_t ** _queue; // ifetch_queue + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t internal_ADDRESS_ACK ; + private : Tcontrol_t * internal_DECOD_VAL ; + private : Tcontrol_t internal_ICACHE_RSP_ACK ; + private : Tcontrol_t internal_EVENT_RESET_ACK; +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Ifetch_queue); +#endif + public : Ifetch_queue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Ifetch_queue (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMoore (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h (revision 78) @@ -0,0 +1,62 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_queue_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_queue_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _size_queue ; + public : uint32_t _nb_instruction ; + public : uint32_t _size_branch_update_prediction ; + public : uint32_t _size_general_data ; + + public : uint32_t _size_queue_ptr ; + public : uint32_t _size_instruction_ptr ; + + public : bool _have_port_queue_ptr ; + public : bool _have_port_instruction_ptr ; + public : bool _have_port_branch_update_prediction_id; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t _size_queue , + uint32_t _nb_instruction , + uint32_t _size_branch_update_prediction, + uint32_t _size_general_data ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters & x); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h (revision 78) @@ -0,0 +1,69 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_queue_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_queue_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + typedef enum + { + IFETCH_QUEUE_STATE_EMPTY , // slot is empty + //IFETCH_QUEUE_STATE_WAIT_REQ , // slot is allocated - wait request to cache + IFETCH_QUEUE_STATE_WAIT_RSP , // slot have send a request - wait respons from cache + IFETCH_QUEUE_STATE_HAVE_RSP , // slot have a bloc of instruction - wait accept by decod + IFETCH_QUEUE_STATE_ERROR_WAIT_RSP // A event occure -> flush the queue but, ack rsp + } ifetch_queue_state_t; + + class ifetch_queue_entry_t + { + public : ifetch_queue_state_t _state ; + public : Tinstruction_t * _instruction ; + public : Tcontrol_t * _instruction_enable ; + public : Tgeneral_address_t _address ; + public : Tinst_ifetch_ptr_t _inst_ifetch_ptr ; + public : Tbranch_state_t _branch_state ; + public : Tprediction_ptr_t _branch_update_prediction_id; + public : Texception_t _exception ; + + public : ifetch_queue_entry_t (uint32_t nb_instruction) + { + _instruction = new Tinstruction_t [nb_instruction]; + _instruction_enable = new Tcontrol_t [nb_instruction]; + } + + public : ~ifetch_queue_entry_t (void) + { + delete _instruction ; + delete _instruction_enable; + } + +// public : friend std::ostream& operator<< (std::ostream& output, +// ifetch_queue_entry_t & x) +// { +// output << ; +// return output; +// } + + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp (revision 78) @@ -0,0 +1,128 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::Ifetch_queue" + Ifetch_queue::Ifetch_queue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + log_printf(INFO,Ifetch_queue,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Ifetch_queue,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Ifetch_queue,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + // constant output + internal_ICACHE_RSP_ACK = 1; + internal_EVENT_RESET_ACK = 1; + + PORT_WRITE(out_ICACHE_RSP_ACK , internal_ICACHE_RSP_ACK ); + PORT_WRITE(out_EVENT_RESET_ACK, internal_EVENT_RESET_ACK); + + log_printf(INFO,Ifetch_queue,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Ifetch_queue,FUNCTION,"Method - genMoore"); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::~Ifetch_queue" + Ifetch_queue::~Ifetch_queue (void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Ifetch_queue,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp (revision 78) @@ -0,0 +1,141 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::allocation" + void Ifetch_queue::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Ifetch_queue" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("address", IN, NORTH, "Transaction with PC management."); + + ALLOC_VALACK_IN ( in_ADDRESS_VAL ,VAL); + ALLOC_VALACK_OUT(out_ADDRESS_ACK ,ACK); + ALLOC_SIGNAL_IN ( in_ADDRESS_INSTRUCTION_ADDRESS ,"instruction_address" ,Tgeneral_address_t ,_param->_size_general_data ); + ALLOC_SIGNAL_IN ( in_ADDRESS_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_instruction_ptr ); + ALLOC_SIGNAL_IN ( in_ADDRESS_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); + ALLOC_SIGNAL_IN ( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + ALLOC_SIGNAL_OUT(out_ADDRESS_IFETCH_QUEUE_ID ,"ifetch_queue_id" ,Tifetch_queue_ptr_t,_param->_size_queue_ptr ); + + } + { + ALLOC1_INTERFACE("address", IN, NORTH, "Transaction with PC management.",_param->_nb_instruction); + + ALLOC1_SIGNAL_IN( in_ADDRESS_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("decod",OUT, EAST, "Send instruction bundle to the decod's stage.",_param->_nb_instruction); + + ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); + ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION,"instruction",Tinstruction_t,_param->_size_instruction); + } + { + ALLOC_INTERFACE("decod",OUT, EAST, "Send instruction bundle to the decod's stage."); + + ALLOC_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_general_data ); + ALLOC_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr ); + ALLOC_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); + ALLOC_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + ALLOC_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch ); + } + + // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("icache_rsp", IN, WEST, "Respons from Instruction Cache."); + + ALLOC_VALACK_IN ( in_ICACHE_RSP_VAL ,VAL); + ALLOC_VALACK_OUT(out_ICACHE_RSP_ACK ,ACK); + ALLOC_SIGNAL_IN ( in_ICACHE_RSP_PACKET_ID,"packet_id",Tpacket_t ,_param->_size_queue_ptr ); + ALLOC_SIGNAL_IN ( in_ICACHE_RSP_ERROR ,"error" ,Ticache_error_t,_param->_size_icache_error); + } + { + ALLOC1_INTERFACE("icache_rsp", IN, WEST, "Respons from Instruction Cache.",_param->_nb_instruction); + + ALLOC1_SIGNAL_IN ( in_ICACHE_RSP_INSTRUCTION,"instruction",Ticache_instruction_t,_param->_size_instruction); + } + + // ~~~~~[ Interface "event_reset" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("event_reset", IN, NORTH, "An event occure and reset queue."); + + ALLOC_VALACK_IN ( in_EVENT_RESET_VAL,VAL); + ALLOC_VALACK_OUT(out_EVENT_RESET_ACK,ACK); + } + + // ~~~~~[ Internal ] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + internal_DECOD_VAL = new Tcontrol_t [_param->_nb_instruction]; + + _queue = new ifetch_queue_entry_t * [_param->_size_queue]; + for (uint32_t i=0;i<_param->_size_queue; i++) + _queue [i] = new ifetch_queue_entry_t (_param->_nb_instruction); + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp (revision 78) @@ -0,0 +1,76 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::deallocation" + void Ifetch_queue::deallocation (void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete in_ADDRESS_VAL ; + delete out_ADDRESS_ACK ; + if (_param->_have_port_queue_ptr) + delete out_ADDRESS_IFETCH_QUEUE_ID ; + delete [] in_ADDRESS_INSTRUCTION_ENABLE ; + delete in_ADDRESS_INSTRUCTION_ADDRESS ; + if (_param->_have_port_instruction_ptr) + delete in_ADDRESS_INST_IFETCH_PTR ; + delete in_ADDRESS_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID; + delete [] out_DECOD_VAL ; + delete [] in_DECOD_ACK ; + delete [] out_DECOD_INSTRUCTION ; + delete out_DECOD_ADDRESS ; + if (_param->_have_port_instruction_ptr) + delete out_DECOD_INST_IFETCH_PTR ; + delete out_DECOD_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + delete out_DECOD_EXCEPTION ; + delete in_ICACHE_RSP_VAL ; + delete out_ICACHE_RSP_ACK ; + if (_param->_have_port_queue_ptr) + delete in_ICACHE_RSP_PACKET_ID ; + delete [] in_ICACHE_RSP_INSTRUCTION ; + delete in_ICACHE_RSP_ERROR ; + delete in_EVENT_RESET_VAL ; + delete out_EVENT_RESET_ACK ; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete internal_DECOD_VAL; + delete [] _queue; + delete _component; + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::end_cycle" +void Ifetch_queue::end_cycle () + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp (revision 78) @@ -0,0 +1,64 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::genMoore" + void Ifetch_queue::genMoore (void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + // ========================================================== + // =====[ ADDRESS ]========================================== + // ========================================================== + internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); + + PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); + if (_param->_have_port_queue_ptr) + PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); + + // ========================================================== + // =====[ DECOD ]============================================ + // ========================================================== + bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; + PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); + PORT_WRITE(out_DECOD_INSTRUCTION [i], _queue[reg_PTR_READ]->_instruction [i]); + } + + PORT_WRITE(out_DECOD_ADDRESS , _queue[reg_PTR_READ]->_address ); + if (_param->_have_port_instruction_ptr) + PORT_WRITE(out_DECOD_INST_IFETCH_PTR , _queue[reg_PTR_READ]->_inst_ifetch_ptr ); + PORT_WRITE(out_DECOD_BRANCH_STATE , _queue[reg_PTR_READ]->_branch_state ); + if (_param->_have_port_branch_update_prediction_id) + PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id); + PORT_WRITE(out_DECOD_EXCEPTION , _queue[reg_PTR_READ]->_exception ); + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_allocation.cpp (revision 78) @@ -0,0 +1,62 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::statistics_allocation" + void Ifetch_queue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Ifetch_queue", + param_statistics); + + _sum_transaction_address = _stat->create_variable("sum_transaction_address"); + + _sum_use_queue = _stat->create_variable("sum_use_queue"); + _sum_use_queue_wait_rsp = _stat->create_variable("sum_use_queue_wait_rsp"); + _sum_use_queue_have_rsp = _stat->create_variable("sum_use_queue_have_rsp"); + _sum_use_queue_error_wait_rsp = _stat->create_variable("sum_use_queue_error_wait_rsp"); + _sum_inst_enable = _stat->create_variable("sum_inst_enable"); + + _average_occupation_bundle = _stat->create_counter ("average_occupation_bundle", "", "Occupation average of instruction's bundle."); + + _stat->create_expr ("average_occupation_bundle" ,"/ sum_inst_enable sum_transaction_address"); + _stat->create_expr_percent ("percent_occupation_bundle" ,"average_occupation_bundle", toString(_param->_nb_instruction),"Percent of instruction's bundle occupation."); + _stat->create_expr ("sum_use_queue" ,"+ + sum_use_queue_wait_rsp sum_use_queue_have_rsp sum_use_queue_error_wait_rsp"); + _stat->create_expr_average_by_cycle("average_use_queue" ,"sum_use_queue" ,"","Average occupation of ifetch queue"); + _stat->create_expr_percent ("percent_use_queue" ,"average_use_queue" ,toString(_param->_size_queue),"Percent of occupation of ifetch queue"); + _stat->create_expr_percent ("percent_use_queue_wait_rsp" ,"sum_use_queue_wait_rsp" ,"sum_use_queue","Part of ifetch queue that wait the respons icache"); + _stat->create_expr_percent ("percent_use_queue_have_rsp" ,"sum_use_queue_have_rsp" ,"sum_use_queue","Part of ifetch queue that wait the decod"); + _stat->create_expr_percent ("percent_use_queue_error_wait_rsp","sum_use_queue_error_wait_rsp","sum_use_queue","Part of ifetch queue that have an error and wait the respons icache"); + + _stat->create_expr_average ("average_miss_icache" ,"+ sum_use_queue_wait_rsp sum_use_queue_error_wait_rsp", "sum_transaction_address", "", "Average Miss Instruction Cache"); + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::statistics_deallocation" + void Ifetch_queue::statistics_deallocation (void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + log_printf(INFO,Ifetch_queue,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp (revision 78) @@ -0,0 +1,173 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::transition" + void Ifetch_queue::transition (void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + reg_PTR_READ = 0; + reg_PTR_WRITE = 0; + + for (uint32_t i=0; i<_param->_size_queue; i++) + _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; + } + else + { + // ========================================================== + // =====[ ADDRESS ]========================================== + // ========================================================== + if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK) + { + // New slot in ifetch_queue is allocated + + _queue[reg_PTR_WRITE]->_state = IFETCH_QUEUE_STATE_WAIT_RSP; + +#ifdef STATISTICS + (*_sum_transaction_address) ++; +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]); +#ifdef STATISTICS + (*_sum_inst_enable) += enable; +#endif + _queue[reg_PTR_WRITE]->_instruction_enable [i] = enable; + } + _queue[reg_PTR_WRITE]->_address = PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS ); + _queue[reg_PTR_WRITE]->_inst_ifetch_ptr = (_param->_have_port_instruction_ptr)?PORT_READ(in_ADDRESS_INST_IFETCH_PTR ):0; + _queue[reg_PTR_WRITE]->_branch_state = PORT_READ(in_ADDRESS_BRANCH_STATE ); + _queue[reg_PTR_WRITE]->_branch_update_prediction_id = (_param->_have_port_branch_update_prediction_id)?PORT_READ(in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID):0; + + reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue; + } + + // ========================================================== + // =====[ DECOD ]============================================ + // ========================================================== + bool have_instruction_decod = false; + bool have_instruction_enable = false; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i])) + { + have_instruction_decod = true; + _queue[reg_PTR_READ]->_instruction_enable [i] = false; + } + have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; + } + + // Test if all is decoded + if (have_instruction_decod and not have_instruction_enable) + { + // all is decod + _queue[reg_PTR_READ]->_state = IFETCH_QUEUE_STATE_EMPTY; + reg_PTR_READ = (reg_PTR_READ+1)%_param->_size_queue; + } + + // ========================================================== + // =====[ ICACHE_RSP ]======================================= + // ========================================================== + if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK) + { + Tpacket_t ptr = (_param->_have_port_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + _queue[ptr]->_instruction [i] = PORT_READ(in_ICACHE_RSP_INSTRUCTION [i]); + + switch (PORT_READ(in_ICACHE_RSP_ERROR)) + { + case ICACHE_ERROR_NONE : _queue[ptr]->_exception = EXCEPTION_IFETCH_NONE ; break; + case ICACHE_ERROR_BUS_ERROR : _queue[ptr]->_exception = EXCEPTION_IFETCH_BUS_ERROR; break; + default : ERRORMORPHEO(FUNCTION,"icache_rsp_error : unknow value."); + } + + switch (_queue[ptr]->_state) + { + case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_HAVE_RSP; break; + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; + default : ERRORMORPHEO(FUNCTION,"icache_rsp : invalid ifetch_queue state."); + } + } + + // ========================================================== + // =====[ EVENT_RESET ]====================================== + // ========================================================== + if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK) + { + // Scan all entry of queue and test the status + for (uint32_t i=0; i<_param->_size_queue; i++) + switch (_queue[i]->_state) + { + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : break; + case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[i]->_state = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP; break; + default : _queue[i]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; + } + + // all entry is empty (or wait respons to flush) + // reset ptr + // 1) reg_PTR_READ = reg_PTR_WRITE = = 0 + // 2) reg_PTR_READ = reg_PTR_WRITE + // In method 1), the probalitie than the entry pointed by reg_PTR_WRITE is a slot with state "error_wait_rsp" is more importate that the method 2) + reg_PTR_READ = reg_PTR_WRITE; + } + +// log_printf(TRACE,Ifetch_queue,FUNCTION,"reg_PTR_WRITE : %d",reg_PTR_WRITE); +// log_printf(TRACE,Ifetch_queue,FUNCTION,"reg_PTR_READ : %d",reg_PTR_READ ); +// for (uint32_t i=0; i<_param->_size_queue; i++) +// { +// log_printf(TRACE,Ifetch_queue,FUNCTION,"[%d] %d %.8x %d - %d %d %d", i, _queue [i]->_state, _queue [i]->_address,_queue [i]->_inst_ifetch_ptr,_queue [i]->_branch_state,_queue [i]->_branch_update_prediction_id,_queue [i]->_exception); + +// for (uint32_t j=0; j<_param->_nb_instruction; j++) +// log_printf(TRACE,Ifetch_queue,FUNCTION," * %d %.8x", _queue [i]->_instruction_enable[i], _queue [i]->_instruction[i]); +// } + +#ifdef STATISTICS + for (uint32_t i=0; i<_param->_size_queue; i++) + switch (_queue[i]->_state) + { + case IFETCH_QUEUE_STATE_EMPTY : break; + case IFETCH_QUEUE_STATE_WAIT_RSP : (*_sum_use_queue_wait_rsp ) ++; break; + case IFETCH_QUEUE_STATE_HAVE_RSP : (*_sum_use_queue_have_rsp ) ++; break; + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : (*_sum_use_queue_error_wait_rsp) ++; break; + default : break; + } +#endif + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::vhdl" + void Ifetch_queue::vhdl (void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::vhdl_body" + void Ifetch_queue::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::vhdl_declaration" + void Ifetch_queue::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 78) @@ -0,0 +1,68 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::Parameters" + Parameters::Parameters (uint32_t size_queue , + uint32_t nb_instruction , + uint32_t size_branch_update_prediction, + uint32_t size_general_data ) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + _size_queue = size_queue ; + _nb_instruction = nb_instruction ; + _size_branch_update_prediction = size_branch_update_prediction; + _size_general_data = size_general_data ; + + _size_queue_ptr = log2(size_queue); + _size_instruction_ptr = log2(nb_instruction); + + _have_port_queue_ptr = _size_queue_ptr > 0; + _have_port_instruction_ptr = _size_instruction_ptr > 0; + _have_port_branch_update_prediction_id = size_branch_update_prediction > 0; + + test(); + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Ifetch_queue::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,53 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + Parameters_test test ("Ifetch_queue"); + + if (_size_queue == 1) + test.warning("To best perfomance, size_queue must be > 1."); + +// if (not _have_port_queue_ptr) +// test.information("They have not port '..._QUEUE_PTR'."); + +// if (not _have_port_instruction_ptr) +// test.information("They have not port '..._INST_IFETCH_PTR'."); + +// if (not _have_port_branch_update_prediction_id) +// test.information("They have not port '..._BRANCH_UPDATE_PREDICTION_ID'."); + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + + return test; + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,61 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + XML xml ("ifetch_queue"); + + xml.balise_open("ifetch_queue"); + xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); + xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); + xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); + xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Parameters & x) + { + log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libIfetch_unit_Glue.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Ifetch_unit_Glue = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Ifetch_unit_Glue_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue + +#-----[ Library ]------------------------------------------ + +Ifetch_unit_Glue_LIBRARY = -lIfetch_unit_Glue \ + $(Behavioural_LIBRARY) + +Ifetch_unit_Glue_DIR_LIBRARY = -L$(Ifetch_unit_Glue_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Ifetch_unit_Glue_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Ifetch_unit_Glue_DIR) --makefile=Makefile; + +Ifetch_unit_Glue_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Ifetch_unit_Glue_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Ifetch_unit_Glue_LIBRARY) + +DIR_LIBRARY = $(Ifetch_unit_Glue_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Ifetch_unit_Glue_library + +library_clean : Ifetch_unit_Glue_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,1 @@ +Ifetch_unit_Glue Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/include/test.h" + +#define NB_PARAMS 0 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * ()\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; +//const uint32_t size_data = atoi(argv[x++]); +//const uint32_t nb_port = atoi(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters + (//size_data, + //nb_port + ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,168 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Ifetch_unit_Glue * _Ifetch_unit_Glue = new Ifetch_unit_Glue (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC_SC_SIGNAL(out_ICACHE_REQ_VAL ,"out_ICACHE_REQ_VAL ",Tcontrol_t); + ALLOC_SC_SIGNAL( in_ICACHE_REQ_ADDRESS_VAL," in_ICACHE_REQ_ADDRESS_VAL",Tcontrol_t); + ALLOC_SC_SIGNAL(out_ICACHE_REQ_QUEUE_VAL ,"out_ICACHE_REQ_QUEUE_VAL ",Tcontrol_t); + ALLOC_SC_SIGNAL( in_ICACHE_REQ_ACK ," in_ICACHE_REQ_ACK ",Tcontrol_t); + ALLOC_SC_SIGNAL(out_ICACHE_REQ_ADDRESS_ACK,"out_ICACHE_REQ_ADDRESS_ACK",Tcontrol_t); + ALLOC_SC_SIGNAL( in_ICACHE_REQ_QUEUE_ACK ," in_ICACHE_REQ_QUEUE_ACK ",Tcontrol_t); + ALLOC_SC_SIGNAL(out_ICACHE_REQ_TYPE ,"out_ICACHE_REQ_TYPE ",Ticache_type_t); + ALLOC_SC_SIGNAL( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t); + ALLOC_SC_SIGNAL(out_EVENT_ADDRESS_VAL ,"out_EVENT_ADDRESS_VAL ",Tcontrol_t); + ALLOC_SC_SIGNAL(out_EVENT_QUEUE_VAL ,"out_EVENT_QUEUE_VAL ",Tcontrol_t); + ALLOC_SC_SIGNAL(out_EVENT_ACK ,"out_EVENT_ACK ",Tcontrol_t); + ALLOC_SC_SIGNAL( in_EVENT_ADDRESS_ACK ," in_EVENT_ADDRESS_ACK ",Tcontrol_t); + ALLOC_SC_SIGNAL( in_EVENT_QUEUE_ACK ," in_EVENT_QUEUE_ACK ",Tcontrol_t); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Ifetch_unit_Glue.\n"),name.c_str()); + + (*(_Ifetch_unit_Glue->in_CLOCK)) (*(in_CLOCK)); + (*(_Ifetch_unit_Glue->in_NRESET)) (*(in_NRESET)); + + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_VAL ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ADDRESS_VAL); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_QUEUE_VAL ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ACK ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_ADDRESS_ACK); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_QUEUE_ACK ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_TYPE ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_VAL ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_ADDRESS_VAL ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_QUEUE_VAL ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_ACK ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_ADDRESS_ACK ); + INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_QUEUE_ACK ); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete out_ICACHE_REQ_VAL ; + delete in_ICACHE_REQ_ADDRESS_VAL; + delete out_ICACHE_REQ_QUEUE_VAL ; + delete in_ICACHE_REQ_ACK ; + delete out_ICACHE_REQ_ADDRESS_ACK; + delete in_ICACHE_REQ_QUEUE_ACK ; + delete out_ICACHE_REQ_TYPE ; + delete in_EVENT_VAL ; + delete out_EVENT_ADDRESS_VAL ; + delete out_EVENT_QUEUE_VAL ; + delete out_EVENT_ACK ; + delete in_EVENT_ADDRESS_ACK ; + delete in_EVENT_QUEUE_ACK ; +#endif + + delete _Ifetch_unit_Glue; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/Ifetch_unit_Glue.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/Ifetch_unit_Glue.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/Ifetch_unit_Glue.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Ifetch_unit_Glue} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h (revision 78) @@ -0,0 +1,152 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_unit_glue_Ifetch_unit_Glue_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_unit_glue_Ifetch_unit_Glue_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + + class Ifetch_unit_Glue +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_ICACHE_REQ_VAL ; + public : SC_IN (Tcontrol_t ) * in_ICACHE_REQ_ADDRESS_VAL ; + public : SC_OUT(Tcontrol_t ) * out_ICACHE_REQ_QUEUE_VAL ; + + public : SC_IN (Tcontrol_t ) * in_ICACHE_REQ_ACK ; + public : SC_OUT(Tcontrol_t ) * out_ICACHE_REQ_ADDRESS_ACK ; + public : SC_IN (Tcontrol_t ) * in_ICACHE_REQ_QUEUE_ACK ; + + public : SC_OUT(Ticache_type_t ) * out_ICACHE_REQ_TYPE ; + + // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_EVENT_VAL ; + public : SC_OUT(Tcontrol_t ) * out_EVENT_ADDRESS_VAL ; + public : SC_OUT(Tcontrol_t ) * out_EVENT_QUEUE_VAL ; + + public : SC_OUT(Tcontrol_t ) * out_EVENT_ACK ; + public : SC_IN (Tcontrol_t ) * in_EVENT_ADDRESS_ACK ; + public : SC_IN (Tcontrol_t ) * in_EVENT_QUEUE_ACK ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Ifetch_unit_Glue); +#endif + public : Ifetch_unit_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Ifetch_unit_Glue (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif + public : void genMealy_icache_req (void); + public : void genMealy_event (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h (revision 78) @@ -0,0 +1,48 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_unit_glue_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_ifetch_unit_glue_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters & x); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue.cpp (revision 78) @@ -0,0 +1,155 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::Ifetch_unit_Glue" + Ifetch_unit_Glue::Ifetch_unit_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + PORT_WRITE(out_ICACHE_REQ_TYPE,ICACHE_TYPE_LOAD); + + if (_usage & USE_SYSTEMC) + { +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif +# endif + + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Method - genMealy_icache_req"); + + SC_METHOD (genMealy_icache_req); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + sensitive << (*(in_ICACHE_REQ_ADDRESS_VAL)) + << (*(in_ICACHE_REQ_ACK )) + << (*(in_ICACHE_REQ_QUEUE_ACK )); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + (*(out_ICACHE_REQ_VAL )) (*( in_ICACHE_REQ_ADDRESS_VAL)); + (*(out_ICACHE_REQ_VAL )) (*( in_ICACHE_REQ_QUEUE_ACK )); + + (*(out_ICACHE_REQ_QUEUE_VAL )) (*( in_ICACHE_REQ_ADDRESS_VAL)); + (*(out_ICACHE_REQ_QUEUE_VAL )) (*( in_ICACHE_REQ_ACK )); + + (*(out_ICACHE_REQ_ADDRESS_ACK)) (*( in_ICACHE_REQ_QUEUE_ACK )); + (*(out_ICACHE_REQ_ADDRESS_ACK)) (*( in_ICACHE_REQ_ACK )); +# endif + + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Method - genMealy_event"); + + SC_METHOD (genMealy_event); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + sensitive << (*(in_EVENT_VAL )) + << (*(in_EVENT_ADDRESS_ACK)) + << (*(in_EVENT_QUEUE_ACK )); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + (*(out_EVENT_ACK )) (*( in_EVENT_ADDRESS_ACK)); + (*(out_EVENT_ACK )) (*( in_EVENT_QUEUE_ACK )); + + (*(out_EVENT_QUEUE_VAL )) (*( in_EVENT_ADDRESS_ACK)); + (*(out_EVENT_QUEUE_VAL )) (*( in_EVENT_VAL )); + + (*(out_EVENT_ADDRESS_VAL)) (*( in_EVENT_QUEUE_ACK )); + (*(out_EVENT_ADDRESS_VAL)) (*( in_EVENT_VAL )); +# endif +#endif + } + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::~Ifetch_unit_Glue" + Ifetch_unit_Glue::~Ifetch_unit_Glue (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_allocation.cpp (revision 78) @@ -0,0 +1,99 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::allocation" + void Ifetch_unit_Glue::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Ifetch_unit_Glue" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("icache_req",OUT, WEST, "Instruction Cache request."); + + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_VAL ,"val" ,Tcontrol_t,1); + ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_VAL,"address_val",Tcontrol_t,1); + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_VAL ,"queue_val" ,Tcontrol_t,1); + ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ACK ,"ack" ,Tcontrol_t,1); + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS_ACK,"address_ack",Tcontrol_t,1); + ALLOC_SIGNAL_IN ( in_ICACHE_REQ_QUEUE_ACK ,"queue_ack" ,Tcontrol_t,1); + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_TYPE ,"type" ,Ticache_type_t,_param->_size_icache_type); + } + + // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("event",IN, EAST, "Event interface."); + + ALLOC_SIGNAL_IN ( in_EVENT_VAL ,"val" ,Tcontrol_t,1); + ALLOC_SIGNAL_OUT(out_EVENT_ADDRESS_VAL,"address_val",Tcontrol_t,1); + ALLOC_SIGNAL_OUT(out_EVENT_QUEUE_VAL ,"queue_val" ,Tcontrol_t,1); + ALLOC_SIGNAL_OUT(out_EVENT_ACK ,"ack" ,Tcontrol_t,1); + ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_ACK,"address_ack",Tcontrol_t,1); + ALLOC_SIGNAL_IN ( in_EVENT_QUEUE_ACK ,"queue_ack" ,Tcontrol_t,1); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_deallocation.cpp (revision 78) @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::deallocation" + void Ifetch_unit_Glue::deallocation (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete out_ICACHE_REQ_VAL ; + delete in_ICACHE_REQ_ADDRESS_VAL ; + delete out_ICACHE_REQ_QUEUE_VAL ; + delete in_ICACHE_REQ_ACK ; + delete out_ICACHE_REQ_ADDRESS_ACK ; + delete in_ICACHE_REQ_QUEUE_ACK ; + delete out_ICACHE_REQ_TYPE ; + + delete in_EVENT_VAL ; + delete out_EVENT_ADDRESS_VAL ; + delete out_EVENT_QUEUE_VAL ; + delete out_EVENT_ACK ; + delete in_EVENT_ADDRESS_ACK ; + delete in_EVENT_QUEUE_ACK ; + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::end_cycle" +void Ifetch_unit_Glue::end_cycle () + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_event.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_event.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_event.cpp (revision 78) @@ -0,0 +1,45 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::genMealy_event" + void Ifetch_unit_Glue::genMealy_event (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + Tcontrol_t address_ack = PORT_READ(in_EVENT_ADDRESS_ACK); + Tcontrol_t queue_ack = PORT_READ(in_EVENT_QUEUE_ACK ); + Tcontrol_t val = PORT_READ(in_EVENT_VAL ); + + PORT_WRITE(out_EVENT_ACK , address_ack and queue_ack); + PORT_WRITE(out_EVENT_ADDRESS_VAL, val and queue_ack); + PORT_WRITE(out_EVENT_QUEUE_VAL , address_ack and val); + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp (revision 78) @@ -0,0 +1,45 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::genMealy_icache_req" + void Ifetch_unit_Glue::genMealy_icache_req (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + Tcontrol_t address_val = PORT_READ(in_ICACHE_REQ_ADDRESS_VAL); + Tcontrol_t queue_ack = PORT_READ(in_ICACHE_REQ_QUEUE_ACK ); + Tcontrol_t ack = PORT_READ(in_ICACHE_REQ_ACK ); + + PORT_WRITE(out_ICACHE_REQ_VAL , address_val and queue_ack); // have a address valid and queue have a slot empty + PORT_WRITE(out_ICACHE_REQ_ADDRESS_ACK, ack and queue_ack); // cache can accept a new transaction and queue have a slot empty + PORT_WRITE(out_ICACHE_REQ_QUEUE_VAL , address_val and ack); // cache can accept a new transaction and the address is valid + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_statistics_allocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::statistics_allocation" + void Ifetch_unit_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Ifetch_unit_Glue", + param_statistics); + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::statistics_deallocation" + void Ifetch_unit_Glue::statistics_deallocation (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_transition.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::transition" + void Ifetch_unit_Glue::transition (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::vhdl" + void Ifetch_unit_Glue::vhdl (void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::vhdl_body" + void Ifetch_unit_Glue::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::vhdl_declaration" + void Ifetch_unit_Glue::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters.cpp (revision 78) @@ -0,0 +1,52 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::Parameters" + Parameters::Parameters () + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + test(); + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Ifetch_unit_Glue::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,41 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + Parameters_test test ("Ifetch_unit_Glue"); + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + + return test; + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,58 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + XML xml ("ifetch_unit_glue"); + + xml.balise_open("ifetch_unit_glue"); +// xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Ifetch_unit_Glue::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Parameters & x) + { + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace ifetch_unit_glue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libIfetch_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.deps (revision 78) @@ -0,0 +1,59 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Ifetch_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Address_management +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.deps +endif +ifndef Ifetch_queue +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.deps +endif +ifndef Ifetch_unit_Glue +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Ifetch_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit + +#-----[ Library ]------------------------------------------ + +Ifetch_unit_LIBRARY = -lIfetch_unit \ + $(Address_management_LIBRARY) \ + $(Ifetch_queue_LIBRARY) \ + $(Ifetch_unit_Glue_LIBRARY) \ + $(Behavioural_LIBRARY) + +Ifetch_unit_DIR_LIBRARY = -L$(Ifetch_unit_DIR)/lib \ + $(Address_management_DIR_LIBRARY) \ + $(Ifetch_queue_DIR_LIBRARY) \ + $(Ifetch_unit_Glue_DIR_LIBRARY) \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Ifetch_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Address_management_DIR) --makefile=Makefile; \ + $(MAKE) --directory=$(Ifetch_queue_DIR) --makefile=Makefile; \ + $(MAKE) --directory=$(Ifetch_unit_Glue_DIR) --makefile=Makefile; \ + $(MAKE) --directory=$(Ifetch_unit_DIR) --makefile=Makefile; + +Ifetch_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Address_management_DIR) --makefile=Makefile clean; \ + $(MAKE) --directory=$(Ifetch_queue_DIR) --makefile=Makefile clean; \ + $(MAKE) --directory=$(Ifetch_unit_Glue_DIR) --makefile=Makefile clean; \ + $(MAKE) --directory=$(Ifetch_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Ifetch_unit_LIBRARY) + +DIR_LIBRARY = $(Ifetch_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Ifetch_unit_library + +library_clean : Ifetch_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,5 @@ +Ifetch_unit +1 8 *2 # _size_queue +1 8 *2 # _nb_instruction +1 1 *2 # _size_branch_update_prediction +32 32 *2 # _size_general_data Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,30 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,67 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/include/test.h" + +#define NB_PARAMS 4 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * size_queue (uint32_t)\n")); + err (_(" * nb_instruction (uint32_t)\n")); + err (_(" * size_branch_update_prediction (uint32_t)\n")); + err (_(" * size_general_data (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _size_queue = fromString(argv[x++]); + uint32_t _nb_instruction = fromString(argv[x++]); + uint32_t _size_branch_update_prediction = fromString(argv[x++]); + uint32_t _size_general_data = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters + (_size_queue , + _nb_instruction , + _size_branch_update_prediction , + _size_general_data ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,244 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Ifetch_unit * _Ifetch_unit = new Ifetch_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC_SC_SIGNAL (out_ICACHE_REQ_VAL ,"out_ICACHE_REQ_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_ICACHE_REQ_ACK ," in_ICACHE_REQ_ACK ",Tcontrol_t ); +//ALLOC_SC_SIGNAL (out_ICACHE_REQ_THREAD_ID ,"out_ICACHE_REQ_THREAD_ID ",Tcontext_t ); + ALLOC_SC_SIGNAL (out_ICACHE_REQ_PACKET_ID ,"out_ICACHE_REQ_PACKET_ID ",Tpacket_t ); + ALLOC_SC_SIGNAL (out_ICACHE_REQ_ADDRESS ,"out_ICACHE_REQ_ADDRESS ",Ticache_instruction_t); + ALLOC_SC_SIGNAL (out_ICACHE_REQ_TYPE ,"out_ICACHE_REQ_TYPE ",Ticache_type_t ); + ALLOC_SC_SIGNAL ( in_ICACHE_RSP_VAL ," in_ICACHE_RSP_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_ICACHE_RSP_ACK ,"out_ICACHE_RSP_ACK ",Tcontrol_t ); +//ALLOC_SC_SIGNAL ( in_ICACHE_RSP_THREAD_ID ," in_ICACHE_RSP_THREAD_ID ",Tcontext_t ); + ALLOC_SC_SIGNAL ( in_ICACHE_RSP_PACKET_ID ," in_ICACHE_RSP_PACKET_ID ",Tpacket_t ); + ALLOC1_SC_SIGNAL( in_ICACHE_RSP_INSTRUCTION ," in_ICACHE_RSP_INSTRUCTION ",Ticache_instruction_t,_param->_nb_instruction); + ALLOC_SC_SIGNAL ( in_ICACHE_RSP_ERROR ," in_ICACHE_RSP_ERROR ",Ticache_error_t ); + ALLOC_SC_SIGNAL (out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_PREDICT_PC_PREVIOUS ,"out_PREDICT_PC_PREVIOUS ",Tgeneral_address_t ); + ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT ,"out_PREDICT_PC_CURRENT ",Tgeneral_address_t ); + ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT_IS_DS_TAKE ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT ," in_PREDICT_PC_NEXT ",Tgeneral_address_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT_IS_DS_TAKE ," in_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t ); + ALLOC1_SC_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE ," in_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_instruction); + ALLOC_SC_SIGNAL ( in_PREDICT_INST_IFETCH_PTR ," in_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_STATE ," in_PREDICT_BRANCH_STATE ",Tbranch_state_t ); + ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ); + ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_instruction); + ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_instruction); + ALLOC1_SC_SIGNAL(out_DECOD_INSTRUCTION ,"out_DECOD_INSTRUCTION ",Tinstruction_t ,_param->_nb_instruction); +//ALLOC_SC_SIGNAL (out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ); + ALLOC_SC_SIGNAL (out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_address_t ); + ALLOC_SC_SIGNAL (out_DECOD_INST_IFETCH_PTR ,"out_DECOD_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ); + ALLOC_SC_SIGNAL (out_DECOD_BRANCH_STATE ,"out_DECOD_BRANCH_STATE ",Tbranch_state_t ); + ALLOC_SC_SIGNAL (out_DECOD_BRANCH_UPDATE_PREDICTION_ID ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ); + ALLOC_SC_SIGNAL (out_DECOD_EXCEPTION ,"out_DECOD_EXCEPTION ",Texception_t ); + ALLOC_SC_SIGNAL ( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t ); + ALLOC_SC_SIGNAL (out_EVENT_ACK ,"out_EVENT_ACK ",Tcontrol_t ); + ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS ," in_EVENT_ADDRESS ",Tgeneral_address_t ); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Ifetch_unit.\n"),name.c_str()); + + (*(_Ifetch_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Ifetch_unit->in_NRESET)) (*(in_NRESET)); + + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_REQ_ACK ); +//INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_THREAD_ID ); + if (_param->_have_port_queue_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_PACKET_ID ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_ADDRESS ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_TYPE ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_RSP_ACK ); +//INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_THREAD_ID ); + if (_param->_have_port_queue_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_PACKET_ID ); + INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_INSTRUCTION ,_param->_nb_instruction); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_ERROR ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_ACK ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_PREVIOUS ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_CURRENT ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_CURRENT_IS_DS_TAKE ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_PC_NEXT ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_PC_NEXT_IS_DS_TAKE ); + INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_instruction); + if (_param->_have_port_instruction_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_INST_IFETCH_PTR ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); + INSTANCE1_SC_SIGNAL(_Ifetch_unit,out_DECOD_VAL ,_param->_nb_instruction); + INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_DECOD_ACK ,_param->_nb_instruction); + INSTANCE1_SC_SIGNAL(_Ifetch_unit,out_DECOD_INSTRUCTION ,_param->_nb_instruction); +//INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_CONTEXT_ID ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_ADDRESS ); + if (_param->_have_port_instruction_ptr) + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_INST_IFETCH_PTR ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_BRANCH_STATE ); + if (_param->_have_port_branch_update_prediction_id) + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_BRANCH_UPDATE_PREDICTION_ID ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_EXCEPTION ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_VAL ); + INSTANCE_SC_SIGNAL (_Ifetch_unit,out_EVENT_ACK ); + INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_ADDRESS ); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete out_ICACHE_REQ_VAL ; + delete in_ICACHE_REQ_ACK ; +//delete out_ICACHE_REQ_THREAD_ID ; + delete out_ICACHE_REQ_PACKET_ID ; + delete out_ICACHE_REQ_ADDRESS ; + delete out_ICACHE_REQ_TYPE ; + + delete in_ICACHE_RSP_VAL ; + delete out_ICACHE_RSP_ACK ; +//delete in_ICACHE_RSP_THREAD_ID ; + delete in_ICACHE_RSP_PACKET_ID ; + delete [] in_ICACHE_RSP_INSTRUCTION ; + delete in_ICACHE_RSP_ERROR ; + + delete out_PREDICT_VAL ; + delete in_PREDICT_ACK ; + delete out_PREDICT_PC_PREVIOUS ; + delete out_PREDICT_PC_CURRENT ; + delete out_PREDICT_PC_CURRENT_IS_DS_TAKE ; + delete in_PREDICT_PC_NEXT ; + delete in_PREDICT_PC_NEXT_IS_DS_TAKE ; + delete [] in_PREDICT_INSTRUCTION_ENABLE ; + delete in_PREDICT_INST_IFETCH_PTR ; + delete in_PREDICT_BRANCH_STATE ; + delete in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; + + delete [] out_DECOD_VAL ; + delete [] in_DECOD_ACK ; + delete [] out_DECOD_INSTRUCTION ; +//delete out_DECOD_CONTEXT_ID ; + delete out_DECOD_ADDRESS ; + delete out_DECOD_INST_IFETCH_PTR ; + delete out_DECOD_BRANCH_STATE ; + delete out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + delete out_DECOD_EXCEPTION ; + + delete in_EVENT_VAL ; + delete out_EVENT_ACK ; + delete in_EVENT_ADDRESS ; +#endif + + delete _Ifetch_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/Ifetch_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/Ifetch_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/Ifetch_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Ifetch_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h (revision 78) @@ -0,0 +1,178 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_Ifetch_unit_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_Ifetch_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + + class Ifetch_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_ICACHE_REQ_VAL ; + public : SC_IN (Tcontrol_t ) * in_ICACHE_REQ_ACK ; +//public : SC_OUT(Tcontext_t ) * out_ICACHE_REQ_THREAD_ID ; + public : SC_OUT(Tpacket_t ) * out_ICACHE_REQ_PACKET_ID ; + public : SC_OUT(Ticache_instruction_t) * out_ICACHE_REQ_ADDRESS ; + public : SC_OUT(Ticache_type_t ) * out_ICACHE_REQ_TYPE ; + + // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_ICACHE_RSP_VAL ; + public : SC_OUT(Tcontrol_t ) * out_ICACHE_RSP_ACK ; +//public : SC_IN (Tcontext_t ) * in_ICACHE_RSP_THREAD_ID ; + public : SC_IN (Tpacket_t ) * in_ICACHE_RSP_PACKET_ID ; + public : SC_IN (Ticache_instruction_t)** in_ICACHE_RSP_INSTRUCTION ;//[nb_instruction] + public : SC_IN (Ticache_error_t ) * in_ICACHE_RSP_ERROR ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) * out_PREDICT_VAL ; + public : SC_IN (Tcontrol_t ) * in_PREDICT_ACK ; + public : SC_OUT(Tgeneral_address_t ) * out_PREDICT_PC_PREVIOUS ; + public : SC_OUT(Tgeneral_address_t ) * out_PREDICT_PC_CURRENT ; + public : SC_OUT(Tcontrol_t ) * out_PREDICT_PC_CURRENT_IS_DS_TAKE ; + public : SC_IN (Tgeneral_address_t ) * in_PREDICT_PC_NEXT ; + public : SC_IN (Tcontrol_t ) * in_PREDICT_PC_NEXT_IS_DS_TAKE ; + public : SC_IN (Tcontrol_t ) ** in_PREDICT_INSTRUCTION_ENABLE ; //[nb_instruction] + public : SC_IN (Tinst_ifetch_ptr_t ) * in_PREDICT_INST_IFETCH_PTR ; + public : SC_IN (Tbranch_state_t ) * in_PREDICT_BRANCH_STATE ; + public : SC_IN (Tprediction_ptr_t ) * in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_DECOD_VAL ;//[nb_instruction] + public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_instruction] + public : SC_OUT(Tinstruction_t ) ** out_DECOD_INSTRUCTION ;//[nb_instruction] +//public : SC_OUT(Tcontext_t ) * out_DECOD_CONTEXT_ID ; + public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; + public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; + public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; + public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; + + // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) * in_EVENT_VAL ; + public : SC_OUT(Tcontrol_t ) * out_EVENT_ACK ; + public : SC_IN (Tgeneral_address_t) * in_EVENT_ADDRESS ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Address_management * _component_address_management; + private : morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue:: Ifetch_queue * _component_ifetch_queue; + private : morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue:: Ifetch_unit_Glue * _component_ifetch_unit_glue; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Ifetch_unit); +#endif + public : Ifetch_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Ifetch_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif +#endif + +#if VHDL + public : void vhdl (void); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h (revision 78) @@ -0,0 +1,67 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_ifetch_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _size_queue ; + public : uint32_t _nb_instruction ; + public : uint32_t _size_address ; + public : uint32_t _size_branch_update_prediction; + + public : uint32_t _size_queue_ptr ; + public : uint32_t _size_instruction_ptr ; + + public : bool _have_port_queue_ptr ; + public : bool _have_port_instruction_ptr ; + public : bool _have_port_branch_update_prediction_id; + + public :morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters * _param_address_management; + public :morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue:: Parameters * _param_ifetch_queue; + public :morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue:: Parameters * _param_ifetch_unit_glue; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t size_queue , + uint32_t nb_instruction , + uint32_t size_branch_update_prediction, + uint32_t size_address ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters & x); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit.cpp (revision 78) @@ -0,0 +1,109 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::Ifetch_unit" + Ifetch_unit::Ifetch_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + log_printf(INFO,Ifetch_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Ifetch_unit,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Ifetch_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Ifetch_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::~Ifetch_unit" + Ifetch_unit::~Ifetch_unit (void) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Ifetch_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp (revision 78) @@ -0,0 +1,499 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::allocation" + void Ifetch_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Ifetch_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("icache_req",OUT, WEST, "Instruction cache request."); + + ALLOC_VALACK_OUT(out_ICACHE_REQ_VAL ,VAL); + ALLOC_VALACK_IN ( in_ICACHE_REQ_ACK ,ACK); + //ALLOC_SIGNAL_OUT(out_ICACHE_REQ_THREAD_ID,"thread_id",Tcontext_t ,_param->_size_context_id ); + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_PACKET_ID,"packet_id",Tpacket_t ,_param->_size_queue_ptr ); + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS ,"address" ,Ticache_instruction_t,_param->_size_address ); + ALLOC_SIGNAL_OUT(out_ICACHE_REQ_TYPE ,"type" ,Ticache_type_t ,_param->_size_icache_type); + } + + // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("icache_rsp",IN , WEST, "Instruction cache respons."); + + ALLOC_VALACK_IN ( in_ICACHE_RSP_VAL ,VAL); + ALLOC_VALACK_OUT (out_ICACHE_RSP_ACK ,ACK); + //ALLOC_SIGNAL_IN ( in_ICACHE_RSP_THREAD_ID ,"thread_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC_SIGNAL_IN ( in_ICACHE_RSP_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_queue_ptr ); + ALLOC_SIGNAL_IN ( in_ICACHE_RSP_ERROR ,"error" ,Ticache_error_t ,_param->_size_icache_error); + } + { + ALLOC1_INTERFACE("icache_rsp",IN , WEST, "Instruction cache respons.",_param->_nb_instruction); + + ALLOC1_SIGNAL_IN ( in_ICACHE_RSP_INSTRUCTION,"instruction",Ticache_instruction_t,_param->_size_instruction ); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("predict",OUT, NORTH, "Acces Instruction cache respons."); + + ALLOC_VALACK_OUT (out_PREDICT_VAL ,VAL); + ALLOC_VALACK_IN ( in_PREDICT_ACK ,ACK); + ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS ,"pc_previous" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT ,"pc_current" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE ,"pc_current_is_ds_take" ,Tcontrol_t ,1); + ALLOC_SIGNAL_IN ( in_PREDICT_PC_NEXT ,"pc_next" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_IN ( in_PREDICT_PC_NEXT_IS_DS_TAKE ,"pc_next_is_ds_take" ,Tcontrol_t ,1); + ALLOC_SIGNAL_IN ( in_PREDICT_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr); + ALLOC_SIGNAL_IN ( in_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); + ALLOC_SIGNAL_IN ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + } + { + ALLOC1_INTERFACE("predict",IN , NORTH, "Acces Instruction cache respons.",_param->_nb_instruction); + + ALLOC1_SIGNAL_IN ( in_PREDICT_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("decod",OUT , EAST, "Send bundle to the decod unit."); + + //ALLOC_SIGNAL_OUT (out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC_SIGNAL_OUT (out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_address); + ALLOC_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr); + ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); + ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction); + ALLOC_SIGNAL_OUT (out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); + } + { + ALLOC1_INTERFACE("decod",OUT , EAST, "Send bundle to the decod unit.",_param->_nb_instruction); + + ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); + ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction); + } + + // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC_INTERFACE("event",IN , NORTH, "Event interface."); + + ALLOC_VALACK_IN ( in_EVENT_VAL ,VAL); + ALLOC_VALACK_OUT(out_EVENT_ACK ,ACK); + ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS,"address",Tgeneral_address_t,_param->_size_address); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string name; + + { + name = _name+"_address_management"; + std::cout << "Create : " << name << std::endl; + + _component_address_management = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Address_management + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_address_management); + + _component->set_component (_component_address_management->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_ifetch_queue"; + std::cout << "Create : " << name << std::endl; + + _component_ifetch_queue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_ifetch_queue); + + _component->set_component (_component_ifetch_queue->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_ifetch_unit_glue"; + std::cout << "Create : " << name << std::endl; + + _component_ifetch_unit_glue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Ifetch_unit_Glue + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_ifetch_unit_glue); + + _component->set_component (_component_ifetch_unit_glue->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; + + // =================================================================== + // =====[ address_management ]======================================== + // =================================================================== + { + src = _name+"_address_management"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"address", + dest,"icache_req"); + _component->interface_map (src ,"address", + dest+"_ifetch_unit_glue","address"); +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { +#ifdef POSITION + _component->interface_map (src ,"address_"+toString(i), + dest+"_ifetch_queue","address_"+toString(i)); +#endif + PORT_MAP(_component,src ,"out_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE", + dest+"_ifetch_queue", "in_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE"); + } + + PORT_MAP(_component,src ,"out_ADDRESS_VAL" , + dest+"_ifetch_unit_glue", "in_ICACHE_REQ_ADDRESS_VAL" ); + PORT_MAP(_component,src , "in_ADDRESS_ACK" , + dest+"_ifetch_unit_glue","out_ICACHE_REQ_ADDRESS_ACK" ); + PORT_MAP(_component,src ,"out_ADDRESS_INSTRUCTION_ADDRESS" , + dest,"out_ICACHE_REQ_ADDRESS"); + PORT_MAP(_component,src ,"out_ADDRESS_INSTRUCTION_ADDRESS" , + dest+"_ifetch_queue", "in_ADDRESS_INSTRUCTION_ADDRESS" ); + if (_param->_have_port_instruction_ptr) + PORT_MAP(_component,src ,"out_ADDRESS_INST_IFETCH_PTR" , + dest+"_ifetch_queue", "in_ADDRESS_INST_IFETCH_PTR" ); + PORT_MAP(_component,src ,"out_ADDRESS_BRANCH_STATE" , + dest+"_ifetch_queue", "in_ADDRESS_BRANCH_STATE" ); + if (_param->_have_port_branch_update_prediction_id) + PORT_MAP(_component,src ,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID", + dest+"_ifetch_queue", "in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID"); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"predict", + dest,"predict"); +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"predict_"+toString(i)); +#endif + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_INSTRUCTION_ENABLE" + ,dest, "in_PREDICT_"+toString(i)+"_INSTRUCTION_ENABLE" ); + } + + PORT_MAP(_component,src ,"out_PREDICT_VAL" + ,dest,"out_PREDICT_VAL" ); + PORT_MAP(_component,src , "in_PREDICT_ACK" + ,dest, "in_PREDICT_ACK" ); + PORT_MAP(_component,src ,"out_PREDICT_PC_PREVIOUS" + ,dest,"out_PREDICT_PC_PREVIOUS" ); + PORT_MAP(_component,src ,"out_PREDICT_PC_CURRENT" + ,dest,"out_PREDICT_PC_CURRENT" ); + PORT_MAP(_component,src ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE" + ,dest,"out_PREDICT_PC_CURRENT_IS_DS_TAKE" ); + PORT_MAP(_component,src , "in_PREDICT_PC_NEXT" + ,dest, "in_PREDICT_PC_NEXT" ); + PORT_MAP(_component,src , "in_PREDICT_PC_NEXT_IS_DS_TAKE" + ,dest, "in_PREDICT_PC_NEXT_IS_DS_TAKE" ); + if (_param->_have_port_instruction_ptr) + PORT_MAP(_component,src , "in_PREDICT_INST_IFETCH_PTR" + ,dest, "in_PREDICT_INST_IFETCH_PTR" ); + PORT_MAP(_component,src , "in_PREDICT_BRANCH_STATE" + ,dest, "in_PREDICT_BRANCH_STATE" ); + if (_param->_have_port_branch_update_prediction_id) + PORT_MAP(_component,src , "in_PREDICT_BRANCH_UPDATE_PREDICTION_ID" + ,dest, "in_PREDICT_BRANCH_UPDATE_PREDICTION_ID"); + } + + { + dest = _name+"_ifetch_unit_glue"; + +#ifdef POSITION + _component->interface_map (src ,"event", + dest,"event"); + _component->interface_map (src ,"event", + _name,"event"); +#endif + + PORT_MAP(_component,src , "in_EVENT_VAL" ,dest ,"out_EVENT_ADDRESS_VAL"); + PORT_MAP(_component,src ,"out_EVENT_ACK" ,dest , "in_EVENT_ADDRESS_ACK"); + PORT_MAP(_component,src , "in_EVENT_ADDRESS",_name, "in_EVENT_ADDRESS"); + } + } + + // =================================================================== + // =====[ ifetch_queue ]============================================== + // =================================================================== + { + src = _name+"_ifetch_queue"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"address", + dest,"address"); +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { +#ifdef POSITION + _component->interface_map (src ,"address_"+toString(i), + dest+"_address_management","address_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE" , + dest+"_address_management","out_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE" ); + } + + PORT_MAP(_component,src , "in_ADDRESS_VAL" , + dest+"_ifetch_unit_glue" ,"out_ICACHE_REQ_QUEUE_VAL" ); + PORT_MAP(_component,src ,"out_ADDRESS_ACK" , + dest+"_ifetch_unit_glue" , "in_ICACHE_REQ_QUEUE_ACK" ); + if (_param->_have_port_queue_ptr) + PORT_MAP(_component,src ,"out_ADDRESS_IFETCH_QUEUE_ID" , + dest ,"out_ICACHE_REQ_PACKET_ID" ); + PORT_MAP(_component,src , "in_ADDRESS_INSTRUCTION_ADDRESS" , + dest+"_address_management","out_ADDRESS_INSTRUCTION_ADDRESS" ); + if (_param->_have_port_instruction_ptr) + PORT_MAP(_component,src , "in_ADDRESS_INST_IFETCH_PTR" , + dest+"_address_management","out_ADDRESS_INST_IFETCH_PTR" ); + PORT_MAP(_component,src , "in_ADDRESS_BRANCH_STATE" , + dest+"_address_management","out_ADDRESS_BRANCH_STATE" ); + if (_param->_have_port_branch_update_prediction_id) + PORT_MAP(_component,src , "in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID", + dest+"_address_management","out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID"); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"icache_rsp", + dest,"icache_rsp"); +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { +#ifdef POSITION + _component->interface_map (src ,"icache_rsp_"+toString(i), + dest,"icache_rsp_"+toString(i)); +#endif + + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_VAL" , + dest,"out_DECOD_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_ACK" , + dest, "in_DECOD_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_INSTRUCTION" , + dest,"out_DECOD_"+toString(i)+"_INSTRUCTION" ); + } + + PORT_MAP(_component,src ,"out_DECOD_ADDRESS" ,dest,"out_DECOD_ADDRESS" ); + if (_param->_have_port_instruction_ptr) + PORT_MAP(_component,src ,"out_DECOD_INST_IFETCH_PTR" ,dest,"out_DECOD_INST_IFETCH_PTR" ); + PORT_MAP(_component,src ,"out_DECOD_BRANCH_STATE" ,dest,"out_DECOD_BRANCH_STATE" ); + if (_param->_have_port_branch_update_prediction_id) + PORT_MAP(_component,src ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID",dest,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID"); + PORT_MAP(_component,src ,"out_DECOD_EXCEPTION" ,dest,"out_DECOD_EXCEPTION" ); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"icache_rsp", + dest,"icache_rsp"); +#endif + + PORT_MAP(_component,src , "in_ICACHE_RSP_VAL" ,dest, "in_ICACHE_RSP_VAL" ); + PORT_MAP(_component,src ,"out_ICACHE_RSP_ACK" ,dest,"out_ICACHE_RSP_ACK" ); + if (_param->_have_port_queue_ptr) + PORT_MAP(_component,src , "in_ICACHE_RSP_PACKET_ID",dest, "in_ICACHE_RSP_PACKET_ID"); + PORT_MAP(_component,src , "in_ICACHE_RSP_ERROR" ,dest, "in_ICACHE_RSP_ERROR" ); + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { +#ifdef POSITION + _component->interface_map (src ,"icache_rsp_"+toString(i), + dest,"icache_rsp_"+toString(i)); +#endif + PORT_MAP(_component,src , "in_ICACHE_RSP_"+toString(i)+"_INSTRUCTION", + dest, "in_ICACHE_RSP_"+toString(i)+"_INSTRUCTION"); + } + } + + { + dest = _name+"_ifetch_unit_glue"; + +#ifdef POSITION + _component->interface_map (src ,"event_reset", + dest,"event"); +#endif + + PORT_MAP(_component,src , "in_EVENT_RESET_VAL",dest,"out_EVENT_QUEUE_VAL"); + PORT_MAP(_component,src ,"out_EVENT_RESET_ACK",dest, "in_EVENT_QUEUE_ACK"); + } + } + + // =================================================================== + // =====[ ifetch_unit_glue ]========================================== + // =================================================================== + { + src = _name+"_ifetch_unit_glue"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"icache_req", + dest,"icache_req"); +#endif + + PORT_MAP(_component,src ,"out_ICACHE_REQ_VAL" ,dest ,"out_ICACHE_REQ_VAL"); + PORT_MAP(_component,src , "in_ICACHE_REQ_ADDRESS_VAL",dest+"_address_management","out_ADDRESS_VAL"); + PORT_MAP(_component,src ,"out_ICACHE_REQ_QUEUE_VAL" ,dest+"_ifetch_queue" , "in_ADDRESS_VAL" ); + PORT_MAP(_component,src , "in_ICACHE_REQ_ACK" ,dest , "in_ICACHE_REQ_ACK"); + PORT_MAP(_component,src ,"out_ICACHE_REQ_ADDRESS_ACK",dest+"_address_management", "in_ADDRESS_ACK"); + PORT_MAP(_component,src , "in_ICACHE_REQ_QUEUE_ACK" ,dest+"_ifetch_queue" ,"out_ADDRESS_ACK"); + PORT_MAP(_component,src ,"out_ICACHE_REQ_TYPE" ,dest ,"out_ICACHE_REQ_TYPE"); + } + + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"event", + dest,"event"); +#endif + + PORT_MAP(_component,src , "in_EVENT_VAL" ,dest , "in_EVENT_VAL" ); + PORT_MAP(_component,src ,"out_EVENT_ADDRESS_VAL",dest+"_address_management", "in_EVENT_VAL" ); + PORT_MAP(_component,src ,"out_EVENT_QUEUE_VAL" ,dest+"_ifetch_queue" , "in_EVENT_RESET_VAL" ); + PORT_MAP(_component,src ,"out_EVENT_ACK" ,dest ,"out_EVENT_ACK" ); + PORT_MAP(_component,src , "in_EVENT_ADDRESS_ACK",dest+"_address_management","out_EVENT_ACK" ); + PORT_MAP(_component,src , "in_EVENT_QUEUE_ACK" ,dest+"_ifetch_queue" ,"out_EVENT_RESET_ACK" ); + } + } + + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _component->test_map(); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp (revision 78) @@ -0,0 +1,90 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::deallocation" + void Ifetch_unit::deallocation (void) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete out_ICACHE_REQ_VAL ; + delete in_ICACHE_REQ_ACK ; + //delete out_ICACHE_REQ_THREAD_ID ; + if (_param->_have_port_queue_ptr) + delete out_ICACHE_REQ_PACKET_ID ; + delete out_ICACHE_REQ_ADDRESS ; + delete out_ICACHE_REQ_TYPE ; + + delete in_ICACHE_RSP_VAL ; + delete out_ICACHE_RSP_ACK ; + //delete in_ICACHE_RSP_THREAD_ID ; + if (_param->_have_port_queue_ptr) + delete in_ICACHE_RSP_PACKET_ID ; + delete [] in_ICACHE_RSP_INSTRUCTION ; + delete in_ICACHE_RSP_ERROR ; + + delete out_PREDICT_VAL ; + delete in_PREDICT_ACK ; + delete out_PREDICT_PC_PREVIOUS ; + delete out_PREDICT_PC_CURRENT ; + delete out_PREDICT_PC_CURRENT_IS_DS_TAKE ; + delete in_PREDICT_PC_NEXT ; + delete in_PREDICT_PC_NEXT_IS_DS_TAKE ; + delete [] in_PREDICT_INSTRUCTION_ENABLE ; + if (_param->_have_port_instruction_ptr) + delete in_PREDICT_INST_IFETCH_PTR ; + delete in_PREDICT_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; + + delete [] out_DECOD_VAL ; + delete [] in_DECOD_ACK ; + delete [] out_DECOD_INSTRUCTION ; + //delete out_DECOD_CONTEXT_ID ; + delete out_DECOD_ADDRESS ; + if (_param->_have_port_instruction_ptr) + delete out_DECOD_INST_IFETCH_PTR ; + delete out_DECOD_BRANCH_STATE ; + if (_param->_have_port_branch_update_prediction_id) + delete out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + delete out_DECOD_EXCEPTION ; + + delete in_EVENT_VAL ; + delete out_EVENT_ACK ; + delete in_EVENT_ADDRESS ; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete _component_address_management; + delete _component_ifetch_queue; + delete _component_ifetch_unit_glue; + delete _component; + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,45 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::end_cycle" +void Ifetch_unit::end_cycle () + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_statistics_allocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::statistics_allocation" + void Ifetch_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Ifetch_unit", + param_statistics); + + _stat->add_stat(_component_address_management->_stat); + _stat->add_stat(_component_ifetch_queue->_stat); + _stat->add_stat(_component_ifetch_unit_glue->_stat); + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::statistics_deallocation" + void Ifetch_unit::statistics_deallocation (void) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + log_printf(INFO,Ifetch_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_transition.cpp (revision 78) @@ -0,0 +1,41 @@ +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::transition" + void Ifetch_unit::transition (void) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_vhdl.cpp (revision 78) @@ -0,0 +1,45 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::vhdl" + void Ifetch_unit::vhdl (void) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,82 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::Parameters" + Parameters::Parameters (uint32_t size_queue , + uint32_t nb_instruction , + uint32_t size_branch_update_prediction, + uint32_t size_address ) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + _size_queue = size_queue ; + _nb_instruction = nb_instruction ; + _size_branch_update_prediction = size_branch_update_prediction; + _size_address = size_address ; + + _size_queue_ptr = log2(size_queue); + _size_instruction_ptr = log2(nb_instruction); + + _have_port_queue_ptr = _size_queue_ptr > 0; + _have_port_instruction_ptr = _size_instruction_ptr > 0; + _have_port_branch_update_prediction_id = size_branch_update_prediction > 0; + + test(); + + _param_address_management = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Parameters + (nb_instruction , + size_address , + size_branch_update_prediction); + _param_ifetch_queue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue:: Parameters + (size_queue , + nb_instruction , + size_branch_update_prediction, + size_address ); + _param_ifetch_unit_glue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue:: Parameters + (); + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Ifetch_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + delete _param_address_management; + delete _param_ifetch_queue ; + delete _param_ifetch_unit_glue ; + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,39 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + Parameters_test test ("Ifetch_unit"); + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + + return test; + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,59 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { + + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + XML xml ("ifetch_unit"); + + xml.balise_open("ifetch_unit"); + xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); + xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); + xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Ifetch_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters & x) + { + log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Ifetch_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libBranch_Target_Buffer_Glue.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Branch_Target_Buffer_Glue = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Branch_Target_Buffer_Glue_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue + +#-----[ Library ]------------------------------------------ + +Branch_Target_Buffer_Glue_LIBRARY = -lBranch_Target_Buffer_Glue \ + $(Behavioural_LIBRARY) + +Branch_Target_Buffer_Glue_DIR_LIBRARY = -L$(Branch_Target_Buffer_Glue_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Branch_Target_Buffer_Glue_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Branch_Target_Buffer_Glue_DIR) --makefile=Makefile; + +Branch_Target_Buffer_Glue_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Branch_Target_Buffer_Glue_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Branch_Target_Buffer_Glue_LIBRARY) + +DIR_LIBRARY = $(Branch_Target_Buffer_Glue_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Branch_Target_Buffer_Glue_library + +library_clean : Branch_Target_Buffer_Glue_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,8 @@ +Branch_Target_Buffer_Glue +1 4 *4 # max_nb_instruction +4 16 *4 # size_buffer +1 4 *4 # associativity +32 32 *4 # size_address +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_decod +1 4 *4 # nb_inst_update Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,75 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/include/test.h" + +#define NB_PARAMS 7 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * max_nb_instruction (uint32_t)\n")); + err (_(" * size_buffer (uint32_t)\n")); + err (_(" * associativity (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_decod (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + uint32_t _max_nb_instruction = fromString(argv[x++]); + uint32_t _size_buffer = fromString(argv[x++]); + uint32_t _associativity = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_inst_update = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters + (_max_nb_instruction , + _size_buffer , + _associativity , + _size_address , + _nb_inst_predict , + _nb_inst_decod , + _nb_inst_update ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,263 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Branch_Target_Buffer_Glue * _Branch_Target_Buffer_Glue = new Branch_Target_Buffer_Glue (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_CONDITION ,"out_PREDICT_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_LAST_TAKE ,"out_PREDICT_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_IS_ACCURATE ,"out_PREDICT_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_REGISTER_VAL ,"out_PREDICT_REGISTER_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_REGISTER_ACK ," in_PREDICT_REGISTER_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_HIT ," in_PREDICT_REGISTER_HIT ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_ADDRESS_SRC ," in_PREDICT_REGISTER_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_ADDRESS_DEST," in_PREDICT_REGISTER_ADDRESS_DEST",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_CONDITION ," in_PREDICT_REGISTER_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_LAST_TAKE ," in_PREDICT_REGISTER_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_IS_ACCURATE ," in_PREDICT_REGISTER_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC1_SC_SIGNAL( in_PREDICT_SORT_VAL ," in_PREDICT_SORT_VAL ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_SORT_INDEX ," in_PREDICT_SORT_INDEX ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_VAL ,"out_PREDICT_VICTIM_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_VICTIM_ACK ," in_PREDICT_VICTIM_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_HIT ,"out_PREDICT_VICTIM_HIT ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_ADDRESS ,"out_PREDICT_VICTIM_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_INDEX ,"out_PREDICT_VICTIM_INDEX ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_VICTIM_VICTIM ,"out_PREDICT_VICTIM_VICTIM ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_REGISTER_VAL ,"out_DECOD_REGISTER_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_REGISTER_ACK ," in_DECOD_REGISTER_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_VICTIM_VAL ,"out_DECOD_VICTIM_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_VICTIM_ACK ," in_DECOD_VICTIM_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_VICTIM_ADDRESS ,"out_DECOD_VICTIM_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_SRC ," in_UPDATE_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_REGISTER_VAL ,"out_UPDATE_REGISTER_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_REGISTER_ACK ," in_UPDATE_REGISTER_ACK ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_VICTIM_VAL ,"out_UPDATE_VICTIM_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_VICTIM_ACK ," in_UPDATE_VICTIM_ACK ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_VICTIM_ADDRESS ,"out_UPDATE_VICTIM_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_update); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Branch_Target_Buffer_Glue.\n"),name.c_str()); + + (*(_Branch_Target_Buffer_Glue->in_CLOCK)) (*(in_CLOCK)); + (*(_Branch_Target_Buffer_Glue->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_HIT ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_CONDITION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_LAST_TAKE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_IS_ACCURATE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_REGISTER_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_ACK ,_param->_nb_inst_predict); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_HIT ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_ADDRESS_DEST,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_CONDITION ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_LAST_TAKE ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_IS_ACCURATE ,_param->_nb_inst_predict,_param->_associativity); + if (_param->_have_port_victim) + { + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_SORT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_SORT_INDEX ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_VICTIM_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_HIT ,_param->_nb_inst_predict); + if (not _param->_is_full_associative) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_ADDRESS ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_INDEX ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_VICTIM_VICTIM ,_param->_nb_inst_predict); + } + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_ACK ,_param->_nb_inst_decod); + if (not _param->_is_full_associative) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_ADDRESS_SRC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_REGISTER_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_REGISTER_ACK ,_param->_nb_inst_decod); + if (_param->_have_port_victim) + { + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_VICTIM_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_VICTIM_ACK ,_param->_nb_inst_decod); + if (not _param->_is_full_associative) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_VICTIM_ADDRESS ,_param->_nb_inst_decod); + } + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_ACK ,_param->_nb_inst_update); + if (not _param->_is_full_associative) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_ADDRESS_SRC ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_REGISTER_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_REGISTER_ACK ,_param->_nb_inst_update); + if (_param->_have_port_victim) + { + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_VICTIM_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_VICTIM_ACK ,_param->_nb_inst_update); + if (not _param->_is_full_associative) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_VICTIM_ADDRESS ,_param->_nb_inst_update); + } + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] out_PREDICT_HIT ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; + delete [] out_PREDICT_CONDITION ; + delete [] out_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_IS_ACCURATE ; + delete [] out_PREDICT_REGISTER_VAL ; + delete [] in_PREDICT_REGISTER_ACK ; + delete [] in_PREDICT_REGISTER_HIT ; + delete [] in_PREDICT_REGISTER_ADDRESS_SRC ; + delete [] in_PREDICT_REGISTER_ADDRESS_DEST; + delete [] in_PREDICT_REGISTER_CONDITION ; + delete [] in_PREDICT_REGISTER_LAST_TAKE ; + delete [] in_PREDICT_REGISTER_IS_ACCURATE ; + delete [] in_PREDICT_SORT_VAL ; + delete [] in_PREDICT_SORT_INDEX ; + delete [] out_PREDICT_VICTIM_VAL ; + delete [] in_PREDICT_VICTIM_ACK ; + delete [] out_PREDICT_VICTIM_HIT ; + delete [] out_PREDICT_VICTIM_ADDRESS ; + delete [] out_PREDICT_VICTIM_INDEX ; + delete [] in_PREDICT_VICTIM_VICTIM ; + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] in_DECOD_ADDRESS_SRC ; + delete [] out_DECOD_REGISTER_VAL ; + delete [] in_DECOD_REGISTER_ACK ; + delete [] out_DECOD_VICTIM_VAL ; + delete [] in_DECOD_VICTIM_ACK ; + delete [] out_DECOD_VICTIM_ADDRESS ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_ADDRESS_SRC ; + delete [] out_UPDATE_REGISTER_VAL ; + delete [] in_UPDATE_REGISTER_ACK ; + delete [] out_UPDATE_VICTIM_VAL ; + delete [] in_UPDATE_VICTIM_ACK ; + delete [] out_UPDATE_VICTIM_ADDRESS ; + +#endif + + delete _Branch_Target_Buffer_Glue; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/Branch_Target_Buffer_Glue.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/Branch_Target_Buffer_Glue.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/Branch_Target_Buffer_Glue.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Branch_Target_Buffer_Glue} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h (revision 78) @@ -0,0 +1,188 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_glue_Branch_Target_Buffer_Glue_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_glue_Branch_Target_Buffer_Glue_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + + class Branch_Target_Buffer_Glue +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_PREDICT_VAL ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_ACK ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_HIT ; //[nb_inst_predict] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_SRC ; //[nb_inst_predict] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_DEST ; //[nb_inst_predict] + public : SC_OUT(Tbranch_condition_t) ** out_PREDICT_CONDITION ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_LAST_TAKE ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_IS_ACCURATE ; //[nb_inst_predict] + + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_REGISTER_VAL ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_REGISTER_ACK ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) *** in_PREDICT_REGISTER_HIT ; //[nb_inst_predict][associativity] + public : SC_IN (Tgeneral_data_t ) *** in_PREDICT_REGISTER_ADDRESS_SRC ; //[nb_inst_predict][associativity] + public : SC_IN (Tgeneral_data_t ) *** in_PREDICT_REGISTER_ADDRESS_DEST ; //[nb_inst_predict][associativity] + public : SC_IN (Tbranch_condition_t) *** in_PREDICT_REGISTER_CONDITION ; //[nb_inst_predict][associativity] + public : SC_IN (Tcontrol_t ) *** in_PREDICT_REGISTER_LAST_TAKE ; //[nb_inst_predict][associativity] + public : SC_IN (Tcontrol_t ) *** in_PREDICT_REGISTER_IS_ACCURATE ; //[nb_inst_predict][associativity] + + public : SC_IN (Tptr_t ) ** in_PREDICT_SORT_VAL ; //[nb_inst_predict] + public : SC_IN (Tptr_t ) ** in_PREDICT_SORT_INDEX ; //[nb_inst_predict] + + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_VICTIM_VAL ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_VICTIM_ACK ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_VICTIM_HIT ; //[nb_inst_predict] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_VICTIM_ADDRESS ; //[nb_inst_predict] + public : SC_OUT(Tptr_t ) ** out_PREDICT_VICTIM_INDEX ; //[nb_inst_predict] + public : SC_IN (Tptr_t ) ** in_PREDICT_VICTIM_VICTIM ; //[nb_inst_predict] + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_DECOD_VAL ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_ACK ; //[nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) ** in_DECOD_ADDRESS_SRC ; //[nb_inst_decod] + + public : SC_OUT(Tcontrol_t ) ** out_DECOD_REGISTER_VAL ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_REGISTER_ACK ; //[nb_inst_decod] + + public : SC_OUT(Tcontrol_t ) ** out_DECOD_VICTIM_VAL ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_VICTIM_ACK ; //[nb_inst_decod] + public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_VICTIM_ADDRESS ; //[nb_inst_decod] + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_UPDATE_VAL ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_ACK ; //[nb_inst_update] + public : SC_IN (Tgeneral_data_t ) ** in_UPDATE_ADDRESS_SRC ; //[nb_inst_update] + + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_REGISTER_VAL ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_REGISTER_ACK ; //[nb_inst_update] + + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_VICTIM_VAL ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_VICTIM_ACK ; //[nb_inst_update] + public : SC_OUT(Tgeneral_data_t ) ** out_UPDATE_VICTIM_ADDRESS ; //[nb_inst_update] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Branch_Target_Buffer_Glue); +#endif + public : Branch_Target_Buffer_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Branch_Target_Buffer_Glue (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif + public : void genMealy_predict (void); + public : void genMealy_decod (void); + public : void genMealy_update (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h (revision 78) @@ -0,0 +1,74 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_glue_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_glue_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _max_nb_instruction; + public : uint32_t _size_buffer ; + public : uint32_t _associativity ; + public : uint32_t _size_address ; + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_decod ; + public : uint32_t _nb_inst_update ; + + public : uint32_t _size_bank ; + public : uint32_t _size_victim ; + public : uint32_t _size_victim_address; + + public : bool _have_port_victim ; + public : bool _is_full_associative ; + + public : Tgeneral_data_t _mask_bank ; + public : Tgeneral_data_t _shift_bank; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t max_nb_instruction, + uint32_t size_buffer , + uint32_t associativity , + uint32_t size_address , + uint32_t nb_inst_predict , + uint32_t nb_inst_decod , + uint32_t nb_inst_update ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters & x); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue.cpp (revision 78) @@ -0,0 +1,293 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::Branch_Target_Buffer_Glue" + Branch_Target_Buffer_Glue::Branch_Target_Buffer_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif +# endif + + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Method - genMealy_predict"); + + SC_METHOD (genMealy_predict); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + sensitive << (*(in_PREDICT_VAL [i])) + << (*(in_PREDICT_REGISTER_ACK [i])); + if (_param->_have_port_victim) + sensitive << (*(in_PREDICT_SORT_VAL [i])) + << (*(in_PREDICT_SORT_INDEX [i])) + << (*(in_PREDICT_VICTIM_ACK [i])); + for (uint32_t j=0; j<_param->_associativity; j++) + sensitive << (*(in_PREDICT_REGISTER_HIT [i][j])) + << (*(in_PREDICT_REGISTER_ADDRESS_SRC [i][j])) + << (*(in_PREDICT_REGISTER_ADDRESS_DEST [i][j])) + << (*(in_PREDICT_REGISTER_CONDITION [i][j])) + << (*(in_PREDICT_REGISTER_LAST_TAKE [i][j])) + << (*(in_PREDICT_REGISTER_IS_ACCURATE [i][j])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_HIT [i])) (*(in_PREDICT_REGISTER_HIT [i][j])); + if (_param->_have_port_victim) + (*(out_PREDICT_HIT [i])) (*(in_PREDICT_SORT_INDEX [i])); + + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_PREDICT_REGISTER_ADDRESS_SRC [i][j])); + if (_param->_have_port_victim) + (*(out_PREDICT_ADDRESS_SRC [i])) (*(in_PREDICT_SORT_INDEX [i])); + + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_PREDICT_REGISTER_ADDRESS_DEST [i][j])); + if (_param->_have_port_victim) + (*(out_PREDICT_ADDRESS_DEST [i])) (*(in_PREDICT_SORT_INDEX [i])); + + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_CONDITION [i])) (*(in_PREDICT_REGISTER_CONDITION [i][j])); + if (_param->_have_port_victim) + (*(out_PREDICT_CONDITION [i])) (*(in_PREDICT_SORT_INDEX [i])); + + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_LAST_TAKE [i])) (*(in_PREDICT_REGISTER_LAST_TAKE [i][j])); + if (_param->_have_port_victim) + (*(out_PREDICT_LAST_TAKE [i])) (*(in_PREDICT_SORT_INDEX [i])); + + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_IS_ACCURATE [i])) (*(in_PREDICT_REGISTER_IS_ACCURATE [i][j])); + if (_param->_have_port_victim) + (*(out_PREDICT_IS_ACCURATE [i])) (*(in_PREDICT_SORT_INDEX [i])); + + + (*(out_PREDICT_ACK [i])) (*(in_PREDICT_REGISTER_ACK [i])); + if (_param->_have_port_victim) + { + (*(out_PREDICT_ACK [i])) (*(in_PREDICT_SORT_VAL [i])); + (*(out_PREDICT_ACK [i])) (*(in_PREDICT_VICTIM_ACK [i])); + } + + (*(out_PREDICT_REGISTER_VAL [i])) (*(in_PREDICT_VAL [i])); + if (_param->_have_port_victim) + { + (*(out_PREDICT_REGISTER_VAL [i])) (*(in_PREDICT_SORT_VAL [i])); + (*(out_PREDICT_REGISTER_VAL [i])) (*(in_PREDICT_VICTIM_ACK [i])); + } + + if (_param->_have_port_victim) + { + (*(out_PREDICT_VICTIM_VAL [i])) (*(in_PREDICT_VAL [i])); + (*(out_PREDICT_VICTIM_VAL [i])) (*(in_PREDICT_REGISTER_ACK [i])); + (*(out_PREDICT_VICTIM_VAL [i])) (*(in_PREDICT_SORT_VAL [i])); + + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_VICTIM_HIT [i])) (*(in_PREDICT_REGISTER_HIT [i][j])); + (*(out_PREDICT_VICTIM_HIT [i])) (*(in_PREDICT_SORT_INDEX [i])); + + if (not _param->_is_full_associative) + { + for (uint32_t j=0; j<_param->_associativity; j++) + (*(out_PREDICT_VICTIM_ADDRESS [i])) (*(in_PREDICT_REGISTER_ADDRESS_SRC [i][j])); + (*(out_PREDICT_VICTIM_ADDRESS [i])) (*(in_PREDICT_SORT_INDEX [i])); + } + (*(out_PREDICT_VICTIM_INDEX [i])) (*(in_PREDICT_SORT_INDEX [i])); + } + } +# endif + + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Method - genMealy_decod"); + + SC_METHOD (genMealy_decod); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + sensitive << (*(in_DECOD_VAL [i])) + << (*(in_DECOD_REGISTER_ACK [i])); + if (_param->_have_port_victim) + { + if (not _param->_is_full_associative) + sensitive << (*(in_DECOD_ADDRESS_SRC [i])); + sensitive << (*(in_DECOD_VICTIM_ACK [i])); + } + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + (*(out_DECOD_ACK [i])) (*(in_DECOD_REGISTER_ACK [i])); + if (_param->_have_port_victim) + (*(out_DECOD_ACK [i])) (*(in_DECOD_VICTIM_ACK [i])); + + (*(out_DECOD_REGISTER_VAL [i])) (*(in_DECOD_VAL [i])); + if (_param->_have_port_victim) + (*(out_DECOD_REGISTER_VAL [i])) (*(in_DECOD_VICTIM_ACK [i])); + + if (_param->_have_port_victim) + { + (*(out_DECOD_VICTIM_VAL [i])) (*(in_DECOD_VAL [i])); + (*(out_DECOD_VICTIM_VAL [i])) (*(in_DECOD_REGISTER_ACK [i])); + + if (not _param->_is_full_associative) + (*(out_DECOD_VICTIM_ADDRESS [i])) (*(in_DECOD_ADDRESS_SRC [i])); + } + } +# endif + + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Method - genMealy_update"); + + SC_METHOD (genMealy_update); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + sensitive << (*(in_UPDATE_VAL [i])) + << (*(in_UPDATE_REGISTER_ACK [i])); + if (_param->_have_port_victim) + { + if (not _param->_is_full_associative) + sensitive << (*(in_UPDATE_ADDRESS_SRC [i])); + sensitive << (*(in_UPDATE_VICTIM_ACK [i])); + } + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + (*(out_UPDATE_ACK [i])) (*(in_UPDATE_REGISTER_ACK [i])); + if (_param->_have_port_victim) + (*(out_UPDATE_ACK [i])) (*(in_UPDATE_VICTIM_ACK [i])); + + (*(out_UPDATE_REGISTER_VAL [i])) (*(in_UPDATE_VAL [i])); + if (_param->_have_port_victim) + (*(out_UPDATE_REGISTER_VAL [i])) (*(in_UPDATE_VICTIM_ACK [i])); + + if (_param->_have_port_victim) + { + (*(out_UPDATE_VICTIM_VAL [i])) (*(in_UPDATE_VAL [i])); + (*(out_UPDATE_VICTIM_VAL [i])) (*(in_UPDATE_REGISTER_ACK [i])); + + if (not _param->_is_full_associative) + (*(out_UPDATE_VICTIM_ADDRESS [i])) (*(in_UPDATE_ADDRESS_SRC [i])); + } + } +# endif + +#endif + } + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::~Branch_Target_Buffer_Glue" + Branch_Target_Buffer_Glue::~Branch_Target_Buffer_Glue (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_allocation.cpp (revision 78) @@ -0,0 +1,156 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::allocation" + void Branch_Target_Buffer_Glue::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Branch_Target_Buffer_Glue" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + { + ALLOC1_INTERFACE("predict", IN, WEST, "predict",_param->_nb_inst_predict); + + ALLOC1_SIGNAL_IN ( in_PREDICT_VAL , "val" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_ACK , "ack" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_HIT , "hit" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC , "address_src" ,Tgeneral_data_t , _param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST , "address_dest" ,Tgeneral_data_t , _param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_CONDITION , "condition" ,Tbranch_condition_t, _param->_size_branch_condition); + ALLOC1_SIGNAL_OUT(out_PREDICT_LAST_TAKE , "last_take" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_IS_ACCURATE , "is_accurate" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_REGISTER_VAL , "register_val" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_IN ( in_PREDICT_REGISTER_ACK , "register_ack" ,Tcontrol_t , 1); + if (_param->_have_port_victim) + { + ALLOC1_SIGNAL_IN ( in_PREDICT_SORT_VAL ,"sort_val" ,Tptr_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_SORT_INDEX,"sort_index",Tptr_t,_param->_size_victim); + + ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_VAL , "victim_val" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_IN ( in_PREDICT_VICTIM_ACK , "victim_ack" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_HIT , "victim_hit" ,Tcontrol_t , 1); + ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_ADDRESS, "victim_address",Tgeneral_data_t , _param->_size_victim_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_VICTIM_INDEX , "victim_index" ,Tptr_t , _param->_size_victim); + ALLOC1_SIGNAL_IN ( in_PREDICT_VICTIM_VICTIM , "victim_victim" ,Tptr_t , _param->_size_victim); + } + } + { + ALLOC2_INTERFACE("predict", IN, WEST, "predict",_param->_nb_inst_predict, _param->_associativity); + + ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_HIT ,"register_hit" ,Tcontrol_t ,1); + ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_ADDRESS_SRC ,"register_address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_ADDRESS_DEST,"register_address_dest",Tgeneral_data_t ,_param->_size_address); + ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_CONDITION ,"register_condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_LAST_TAKE ,"register_last_take" ,Tcontrol_t ,1); + ALLOC2_SIGNAL_IN ( in_PREDICT_REGISTER_IS_ACCURATE ,"register_is_accurate" ,Tcontrol_t ,1); + } + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("decod", IN, WEST, "decod",_param->_nb_inst_decod); + + ALLOC1_SIGNAL_IN ( in_DECOD_VAL ,"val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_DECOD_ACK ,"ack" ,Tcontrol_t ,1); + if (not _param->_is_full_associative) + ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t,_param->_size_address); + + ALLOC1_SIGNAL_OUT(out_DECOD_REGISTER_VAL ,"register_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_DECOD_REGISTER_ACK ,"register_ack" ,Tcontrol_t ,1); + + if (_param->_have_port_victim) + { + ALLOC1_SIGNAL_OUT(out_DECOD_VICTIM_VAL ,"victim_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_DECOD_VICTIM_ACK ,"victim_ack" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_DECOD_VICTIM_ADDRESS,"victim_address",Tgeneral_data_t,_param->_size_victim_address); + } + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update", IN, WEST, "update",_param->_nb_inst_update); + + ALLOC1_SIGNAL_IN ( in_UPDATE_VAL ,"val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_ACK ,"ack" ,Tcontrol_t ,1); + if (not _param->_is_full_associative) + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t,_param->_size_address); + + ALLOC1_SIGNAL_OUT(out_UPDATE_REGISTER_VAL ,"register_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_REGISTER_ACK ,"register_ack" ,Tcontrol_t ,1); + + if (_param->_have_port_victim) + { + ALLOC1_SIGNAL_OUT(out_UPDATE_VICTIM_VAL ,"victim_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_VICTIM_ACK ,"victim_ack" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_VICTIM_ADDRESS,"victim_address",Tgeneral_data_t,_param->_size_victim_address); + } + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_deallocation.cpp (revision 78) @@ -0,0 +1,101 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::deallocation" + void Branch_Target_Buffer_Glue::deallocation (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] out_PREDICT_HIT ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; + delete [] out_PREDICT_CONDITION ; + delete [] out_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_IS_ACCURATE ; + delete [] out_PREDICT_REGISTER_VAL ; + delete [] in_PREDICT_REGISTER_ACK ; + delete [] in_PREDICT_REGISTER_HIT ; + delete [] in_PREDICT_REGISTER_ADDRESS_SRC ; + delete [] in_PREDICT_REGISTER_ADDRESS_DEST ; + delete [] in_PREDICT_REGISTER_CONDITION ; + delete [] in_PREDICT_REGISTER_LAST_TAKE ; + delete [] in_PREDICT_REGISTER_IS_ACCURATE ; + if (_param->_have_port_victim) + { + delete [] in_PREDICT_SORT_VAL ; + delete [] in_PREDICT_SORT_INDEX ; + delete [] out_PREDICT_VICTIM_VAL ; + delete [] in_PREDICT_VICTIM_ACK ; + delete [] out_PREDICT_VICTIM_HIT ; + if (not _param->_is_full_associative) + delete [] out_PREDICT_VICTIM_ADDRESS ; + delete [] out_PREDICT_VICTIM_INDEX ; + delete [] in_PREDICT_VICTIM_VICTIM ; + } + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + if (not _param->_is_full_associative) + delete [] in_DECOD_ADDRESS_SRC ; + delete [] out_DECOD_REGISTER_VAL ; + delete [] in_DECOD_REGISTER_ACK ; + if (_param->_have_port_victim) + { + delete [] out_DECOD_VICTIM_VAL ; + delete [] in_DECOD_VICTIM_ACK ; + if (not _param->_is_full_associative) + delete [] out_DECOD_VICTIM_ADDRESS ; + } + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + if (not _param->_is_full_associative) + delete [] in_UPDATE_ADDRESS_SRC ; + delete [] out_UPDATE_REGISTER_VAL ; + delete [] in_UPDATE_REGISTER_ACK ; + if (_param->_have_port_victim) + { + delete [] out_UPDATE_VICTIM_VAL ; + delete [] in_UPDATE_VICTIM_ACK ; + if (not _param->_is_full_associative) + delete [] out_UPDATE_VICTIM_ADDRESS ; + } + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::end_cycle" +void Branch_Target_Buffer_Glue::end_cycle () + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_decod.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_decod.cpp (revision 78) @@ -0,0 +1,54 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::genMealy_decod" + void Branch_Target_Buffer_Glue::genMealy_decod (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + Tcontrol_t val = PORT_READ(in_DECOD_VAL [i]); + Tcontrol_t register_ack = PORT_READ(in_DECOD_REGISTER_ACK [i]); + Tcontrol_t victim_ack = (_param->_have_port_victim)?PORT_READ(in_DECOD_VICTIM_ACK [i]):true; + + PORT_WRITE(out_DECOD_ACK [i], register_ack and victim_ack); + PORT_WRITE(out_DECOD_REGISTER_VAL [i], val and victim_ack); + + if (_param->_have_port_victim) + { + PORT_WRITE(out_DECOD_VICTIM_VAL [i], val and register_ack ); + if (not _param->_is_full_associative) + PORT_WRITE(out_DECOD_VICTIM_ADDRESS [i], (PORT_READ(in_DECOD_ADDRESS_SRC [i]) >> _param->_shift_bank)&_param->_mask_bank); + } + } + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_predict.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_predict.cpp (revision 78) @@ -0,0 +1,69 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::genMealy_predict" + void Branch_Target_Buffer_Glue::genMealy_predict (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + Tptr_t index = (_param->_have_port_victim)?PORT_READ(in_PREDICT_SORT_INDEX [i]):0; + Tcontrol_t hit = PORT_READ(in_PREDICT_REGISTER_HIT [i][index]); + Tgeneral_data_t addr = PORT_READ(in_PREDICT_REGISTER_ADDRESS_SRC [i][index]); + + // Multiplexor + PORT_WRITE(out_PREDICT_HIT [i],hit); + PORT_WRITE(out_PREDICT_ADDRESS_SRC [i],addr); + PORT_WRITE(out_PREDICT_ADDRESS_DEST [i],PORT_READ(in_PREDICT_REGISTER_ADDRESS_DEST [i][index])); + PORT_WRITE(out_PREDICT_CONDITION [i],PORT_READ(in_PREDICT_REGISTER_CONDITION [i][index])); + PORT_WRITE(out_PREDICT_LAST_TAKE [i],PORT_READ(in_PREDICT_REGISTER_LAST_TAKE [i][index])); + PORT_WRITE(out_PREDICT_IS_ACCURATE [i],PORT_READ(in_PREDICT_REGISTER_IS_ACCURATE [i][index])); + + Tcontrol_t val = PORT_READ(in_PREDICT_VAL [i]); + Tcontrol_t register_ack = PORT_READ(in_PREDICT_REGISTER_ACK [i]); + Tcontrol_t sort_val = (_param->_have_port_victim)?PORT_READ(in_PREDICT_SORT_VAL [i]):true; + Tcontrol_t victim_ack = (_param->_have_port_victim)?PORT_READ(in_PREDICT_VICTIM_ACK [i]):true; + + PORT_WRITE(out_PREDICT_ACK [i], register_ack and sort_val and victim_ack); + PORT_WRITE(out_PREDICT_REGISTER_VAL [i], val and sort_val and victim_ack); + + if (_param->_have_port_victim) + { + PORT_WRITE(out_PREDICT_VICTIM_VAL [i], val and register_ack and sort_val ); + PORT_WRITE(out_PREDICT_VICTIM_HIT [i], hit); + if (not _param->_is_full_associative) + PORT_WRITE(out_PREDICT_VICTIM_ADDRESS [i], (addr >> _param->_shift_bank)&_param->_mask_bank); + PORT_WRITE(out_PREDICT_VICTIM_INDEX [i], index); + } + } + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_update.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_update.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_update.cpp (revision 78) @@ -0,0 +1,54 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::genMealy_update" + void Branch_Target_Buffer_Glue::genMealy_update (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + Tcontrol_t val = PORT_READ(in_UPDATE_VAL [i]); + Tcontrol_t register_ack = PORT_READ(in_UPDATE_REGISTER_ACK [i]); + Tcontrol_t victim_ack = (_param->_have_port_victim)?PORT_READ(in_UPDATE_VICTIM_ACK [i]):true; + + PORT_WRITE(out_UPDATE_ACK [i], register_ack and victim_ack); + PORT_WRITE(out_UPDATE_REGISTER_VAL [i], val and victim_ack); + + if (_param->_have_port_victim) + { + PORT_WRITE(out_UPDATE_VICTIM_VAL [i], val and register_ack ); + if (not _param->_is_full_associative) + PORT_WRITE(out_UPDATE_VICTIM_ADDRESS [i], (PORT_READ(in_UPDATE_ADDRESS_SRC [i]) >> _param->_shift_bank)&_param->_mask_bank); + } + } + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_statistics_allocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::statistics_allocation" + void Branch_Target_Buffer_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Branch_Target_Buffer_Glue", + param_statistics); + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::statistics_deallocation" + void Branch_Target_Buffer_Glue::statistics_deallocation (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Branch_Target_Buffer_Glue,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_transition.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef SYSTEMC +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::transition" + void Branch_Target_Buffer_Glue::transition (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + end_cycle (); + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::vhdl" + void Branch_Target_Buffer_Glue::vhdl (void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::vhdl_body" + void Branch_Target_Buffer_Glue::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::vhdl_declaration" + void Branch_Target_Buffer_Glue::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters.cpp (revision 78) @@ -0,0 +1,80 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h" +#include "Common/include/BitManipulation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::Parameters" + Parameters::Parameters (uint32_t max_nb_instruction, + uint32_t size_buffer , + uint32_t associativity , + uint32_t size_address , + uint32_t nb_inst_predict , + uint32_t nb_inst_decod , + uint32_t nb_inst_update ) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + _max_nb_instruction = max_nb_instruction; + _size_buffer = size_buffer ; + _associativity = associativity ; + _size_address = size_address ; + _nb_inst_predict = nb_inst_predict ; + _nb_inst_decod = nb_inst_decod ; + _nb_inst_update = nb_inst_update ; + + _size_bank = size_buffer/associativity; + _size_victim = log2(associativity); + _size_victim_address = log2(_size_bank); + + _have_port_victim = (_size_victim > 0); + _is_full_associative = _size_bank == 1; + + _mask_bank = gen_mask (_size_victim_address); + _shift_bank = log2(max_nb_instruction)+2; + + test(); + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Branch_Target_Buffer_Glue::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,43 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + Parameters_test test ("Branch_Target_Buffer_Glue"); + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + + return test; + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,66 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_glue { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + XML xml ("branch_target_buffer_glue"); + + xml.balise_open("branch_target_buffer_glue"); + xml.singleton_begin("max_nb_instruction"); xml.attribut("value",toString(_max_nb_instruction)); xml.singleton_end(); + xml.singleton_begin("size_buffer "); xml.attribut("value",toString(_size_buffer )); xml.singleton_end(); + xml.singleton_begin("associativity "); xml.attribut("value",toString(_associativity )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict "); xml.attribut("value",toString(_nb_inst_predict )); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Glue::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters & x) + { + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Branch_Target_Buffer_Glue,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace branch_target_buffer_glue +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libBranch_Target_Buffer_Register.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Branch_Target_Buffer_Register = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Branch_Target_Buffer_Register_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register + +#-----[ Library ]------------------------------------------ + +Branch_Target_Buffer_Register_LIBRARY = -lBranch_Target_Buffer_Register \ + $(Behavioural_LIBRARY) + +Branch_Target_Buffer_Register_DIR_LIBRARY = -L$(Branch_Target_Buffer_Register_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Branch_Target_Buffer_Register_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Branch_Target_Buffer_Register_DIR) --makefile=Makefile; + +Branch_Target_Buffer_Register_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Branch_Target_Buffer_Register_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Branch_Target_Buffer_Register_LIBRARY) + +DIR_LIBRARY = $(Branch_Target_Buffer_Register_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Branch_Target_Buffer_Register_library + +library_clean : Branch_Target_Buffer_Register_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_mono_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_mono_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_mono_context.cfg (revision 78) @@ -0,0 +1,10 @@ +Branch_Target_Buffer_Register +1 1 +1 # nb_context +1 4 *2 # nb_instruction [0] [nb_context] +16 16 *4 # size_buffer +2 16 *4 # associativity +32 32 *2 # size_address +2 2 +1 # size_counter +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_decod +1 4 *4 # nb_inst_commit Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_multi_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_multi_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_multi_context.cfg (revision 78) @@ -0,0 +1,13 @@ +Branch_Target_Buffer_Register +4 4 +1 # nb_context +1 1 +1 # nb_instruction [0] [nb_context] +2 2 +1 # nb_instruction [1] [nb_context] +4 4 +1 # nb_instruction [2] [nb_context] +8 8 +1 # nb_instruction [3] [nb_context] +8 64 *4 # size_buffer +4 8 *2 # associativity +32 32 *2 # size_address +2 2 +1 # size_counter +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_decod +1 4 *4 # nb_inst_commit Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,89 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test.h" + +#define NB_PARAMS 8 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_context (uint32_t)\n")); + err (_(" * size_buffer (uint32_t)\n")); + err (_(" * associativity (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * size_counter (uint32_t)\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_decod (uint32_t)\n")); + err (_(" * nb_inst_commit (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + uint32_t _nb_context = fromString(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+_nb_context)) + usage (argc, argv); + + uint32_t * _nb_instruction = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _nb_instruction [i] = fromString(argv[x++]); + + uint32_t _size_buffer = fromString(argv[x++]); + uint32_t _associativity = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + uint32_t _size_counter = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_inst_commit = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters + (_nb_context , + _nb_instruction , + _size_buffer , + _associativity , + _size_address , + _size_counter , + _nb_inst_predict, + _nb_inst_decod , + _nb_inst_commit ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete _nb_instruction; + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,498 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/BitManipulation.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + + + class entry_t + { + public : Tcontrol_t _val ; + public : Tcontext_t _context ; + public : Tcontrol_t _address_dest_val; + public : Tgeneral_data_t _address_src ; + public : Tgeneral_data_t _address_dest ; + public : Tbranch_condition_t _condition ; + public : Tcontrol_t _last_take ; + public : Tcounter_t _accurate ; + + public : bool hit (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param, + Tgeneral_data_t addr_test, + Tcontext_t context) + { + Tgeneral_data_t addr_src_offset = (_address_src >> _param->_shift_offset)&_param->_mask_offset; + Tgeneral_data_t addr_src_index = (_address_src >> _param->_shift_bank )&_param->_mask_bank ; + Tgeneral_data_t addr_src_tag = (_address_src >> _param->_shift_tag ); + + Tgeneral_data_t addr_test_offset = (addr_test >> _param->_shift_offset)&_param->_mask_offset; + Tgeneral_data_t addr_test_index = (addr_test >> _param->_shift_bank )&_param->_mask_bank ; + Tgeneral_data_t addr_test_tag = (addr_test >> _param->_shift_tag ); + + bool is_hit = ( (_val == 1 ) and + (_context == context ) and + (addr_test_tag == addr_src_tag ) and + (addr_test_index == addr_src_index ) and + (addr_test_offset <= addr_src_offset )); + + LABEL("address_src (tag, index, offset) : %.8x %.8x %.8x",addr_src_tag, addr_src_index, addr_src_offset); + LABEL("address_test (tag, index, offset) : %.8x %.8x %.8x - hit : %d",addr_test_tag, addr_test_index, addr_test_offset, is_hit); + return is_hit; + } + + public : void print (void) + { + LABEL("%d - %.2d %.8x %.1d %.8x %.3d %.1d %.4d", + _val , + _context , + _address_src , + _address_dest_val, + _address_dest , + _condition , + _last_take , + _accurate ); + + } + + }; + + + +Tgeneral_data_t gen_addr (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param, + Tgeneral_data_t index) +{ + Tgeneral_data_t addr_tag = (rand()%(2*_param->_associativity)) << _param->_shift_tag ; + Tgeneral_data_t addr_index = (index &_param->_mask_bank ) << _param->_shift_bank ; + Tgeneral_data_t addr_offset = (rand()&_param->_mask_offset ) << _param->_shift_offset; + + LABEL("gen_addr (tag, index, offset) : %.8x %.8x %.8x",addr_tag, addr_index, addr_offset); + + return (addr_tag | + addr_index | + addr_offset ); +} + + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Branch_Target_Buffer_Register * _Branch_Target_Buffer_Register = new Branch_Target_Buffer_Register (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS ," in_PREDICT_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL(out_PREDICT_CONDITION ,"out_PREDICT_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL(out_PREDICT_LAST_TAKE ,"out_PREDICT_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC2_SC_SIGNAL(out_PREDICT_IS_ACCURATE ,"out_PREDICT_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity); + ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_HIT ,"out_DECOD_HIT ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_HIT_INDEX ,"out_DECOD_HIT_INDEX ",Tptr_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_VICTIM ," in_DECOD_VICTIM ",Tptr_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_CONDITION ," in_DECOD_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_LAST_TAKE ," in_DECOD_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_HIT ,"out_UPDATE_HIT ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_HIT_INDEX ,"out_UPDATE_HIT_INDEX ",Tptr_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_VICTIM ," in_UPDATE_VICTIM ",Tptr_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ," in_UPDATE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_SRC ," in_UPDATE_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_DEST ," in_UPDATE_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_CONDITION ," in_UPDATE_CONDITION ",Tbranch_condition_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_LAST_TAKE ," in_UPDATE_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_update); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Branch_Target_Buffer_Register.\n"),name.c_str()); + + (*(_Branch_Target_Buffer_Register->in_CLOCK)) (*(in_CLOCK)); + (*(_Branch_Target_Buffer_Register->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_PREDICT_ADDRESS ,_param->_nb_inst_predict); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_HIT ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_CONDITION ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_LAST_TAKE ,_param->_nb_inst_predict,_param->_associativity); + INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Register,out_PREDICT_IS_ACCURATE ,_param->_nb_inst_predict,_param->_associativity); + + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_DECOD_ACK ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_DECOD_HIT ,_param->_nb_inst_decod); + if (_param->_have_port_victim) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_DECOD_HIT_INDEX ,_param->_nb_inst_decod); + if (_param->_have_port_victim) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_VICTIM ,_param->_nb_inst_decod); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_ADDRESS_SRC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_ADDRESS_DEST ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_CONDITION ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_LAST_TAKE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod); + + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_UPDATE_ACK ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_UPDATE_HIT ,_param->_nb_inst_update); + if (_param->_have_port_victim) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register,out_UPDATE_HIT_INDEX ,_param->_nb_inst_update); + if (_param->_have_port_victim) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_VICTIM ,_param->_nb_inst_update); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_ADDRESS_SRC ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_ADDRESS_DEST ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_CONDITION ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_LAST_TAKE ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Register, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_predict = 75; + const int32_t percent_transaction_decod = 75; + const int32_t percent_transaction_update = 75; + + uint32_t num_index = 0; + entry_t tab_old [_param->_associativity]; + entry_t tab [_param->_associativity]; + + for (uint32_t i=0; i<_param->_associativity; i++) + tab[i]._val = false; + + SC_START(0); + LABEL("Initialisation"); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + in_PREDICT_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_decod ; i++) + in_DECOD_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_update ; i++) + in_UPDATE_VAL [i]->write(0); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_associativity; j++) + tab[j].print(); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + Tgeneral_data_t addr; + uint32_t j = rand()%_param->_associativity; + + if ( ((rand()%100)write((rand()%100)write(rand()%_param->_nb_context); + in_PREDICT_ADDRESS [i]->write(addr); + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + Tgeneral_data_t addr = gen_addr(_param, num_index); + + in_DECOD_VAL [i]->write((rand()%100)write(rand()%_param->_associativity); + in_DECOD_CONTEXT_ID [i]->write(rand()%_param->_nb_context); + in_DECOD_ADDRESS_SRC [i]->write(addr); + in_DECOD_ADDRESS_DEST [i]->write(~addr); + in_DECOD_CONDITION [i]->write((addr&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK); + in_DECOD_LAST_TAKE [i]->write(rand()%2); + in_DECOD_MISS_PREDICTION [i]->write(rand()%2); + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + Tgeneral_data_t addr = gen_addr(_param, num_index); + + in_UPDATE_VAL [i]->write((rand()%100)write(rand()%_param->_associativity); + in_UPDATE_CONTEXT_ID [i]->write(rand()%_param->_nb_context); + in_UPDATE_ADDRESS_SRC [i]->write(addr); + in_UPDATE_ADDRESS_DEST [i]->write(~addr); + in_UPDATE_CONDITION [i]->write((addr&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK); + in_UPDATE_LAST_TAKE [i]->write(rand()%2); + in_UPDATE_MISS_PREDICTION [i]->write(rand()%2); + } + + SC_START(0); + + for (uint32_t i=0; i<_param->_associativity; i++) + tab_old [i] = tab [i]; + + for (uint32_t i=0; i<_param->_nb_inst_predict ; i++) + if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read()) + { + LABEL("PREDICT [%d] : Transaction accepted",i); + LABEL(" * context : %d" ,in_PREDICT_CONTEXT_ID [i]->read()); + LABEL(" * address : %.8x",in_PREDICT_ADDRESS [i]->read()); + + Tcontext_t ctxt = in_PREDICT_CONTEXT_ID [i]->read(); + Tgeneral_data_t addr = in_PREDICT_ADDRESS [i]->read(); + + for (uint32_t j=0; j<_param->_associativity; j++) + { + LABEL(" * [%d]",j); + + bool hit = tab_old[j].hit(_param, addr, ctxt); + TEST(Tcontrol_t , out_PREDICT_HIT [i][j]->read(), hit); + + if (tab_old[j]._val) + { + Tgeneral_data_t addr_src = tab_old[j]._address_src; + + TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [i][j]->read(), addr_src); + TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [i][j]->read(), ~addr_src); + TEST(Tbranch_condition_t, out_PREDICT_CONDITION [i][j]->read(), ((addr_src&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK)); + TEST(Tcontrol_t , out_PREDICT_LAST_TAKE [i][j]->read(), tab_old[j]._last_take); +// TEST(Tcontrol_t , out_PREDICT_IS_ACCURATE [i][j]->read(), ); + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_decod ; i++) + if (in_DECOD_VAL [i]->read() and out_DECOD_ACK [i]->read()) + { + LABEL("DECOD [%d] : Transaction accepted",i); + LABEL(" * context : %d" ,in_DECOD_CONTEXT_ID [i]->read()); + LABEL(" * address_src : %.8x",in_DECOD_ADDRESS_SRC [i]->read()); + + bool hit = false; + + for (uint32_t j=0; j<_param->_associativity; j++) + hit |= ((tab_old[j]._val == 1) and + (tab_old[j]._context == in_DECOD_CONTEXT_ID [i]->read()) and + (tab_old[j]._address_src == in_DECOD_ADDRESS_SRC [i]->read())); + + if (not hit) + { + Tptr_t k = in_DECOD_VICTIM [i]->read(); + + LABEL(" * miss"); + LABEL(" * victim : %d",k); + + tab[k]._val = 1; + tab[k]._context = in_DECOD_CONTEXT_ID [i]->read(); + tab[k]._address_src = in_DECOD_ADDRESS_SRC [i]->read(); + tab[k]._address_dest_val = in_DECOD_CONDITION [i]->read() == BRANCH_CONDITION_FLAG_SET; + tab[k]._address_dest = in_DECOD_ADDRESS_DEST[i]->read(); + tab[k]._condition = in_DECOD_CONDITION [i]->read(); + tab[k]._last_take = in_DECOD_LAST_TAKE [i]->read(); + //tab[k]._accurate = _param->_first_accurate_if_hit; + } + else + { + LABEL(" * miss"); + } + + TEST(Tcontrol_t, out_DECOD_HIT [i]->read(), hit); + } + + for (uint32_t i=0; i<_param->_nb_inst_update ; i++) + if (in_UPDATE_VAL [i]->read() and out_UPDATE_ACK [i]->read()) + { + LABEL("UPDATE [%d] : Transaction accepted",i); + LABEL(" * context : %d" ,in_UPDATE_CONTEXT_ID [i]->read()); + LABEL(" * address_src : %.8x",in_UPDATE_ADDRESS_SRC [i]->read()); + + bool hit = false; + + Tptr_t k = 0; + for (uint32_t j=0; j<_param->_associativity; j++) + { + hit |= ((tab_old[j]._val == 1) and + (tab_old[j]._context == in_UPDATE_CONTEXT_ID [i]->read()) and + (tab_old[j]._address_src == in_UPDATE_ADDRESS_SRC [i]->read())); + if (hit) + { + k = j; + break; + } + } + + if (not hit) + { + k = in_UPDATE_VICTIM [i]->read(); + + LABEL(" * miss"); + LABEL(" * victim : %d",k); + + tab[k]._val = 1; + tab[k]._context = in_UPDATE_CONTEXT_ID [i]->read(); + tab[k]._address_src = in_UPDATE_ADDRESS_SRC [i]->read(); + tab[k]._address_dest_val = 1; + tab[k]._address_dest = in_UPDATE_ADDRESS_DEST[i]->read(); + tab[k]._condition = in_UPDATE_CONDITION [i]->read(); + tab[k]._last_take = in_UPDATE_LAST_TAKE [i]->read(); + //tab[k]._accurate = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit; + } + else + { + LABEL(" * hit"); + LABEL(" * update : %d",k); + + tab[k]._val = 1; + tab[k]._context = in_UPDATE_CONTEXT_ID [i]->read(); + tab[k]._address_src = in_UPDATE_ADDRESS_SRC [i]->read(); + tab[k]._address_dest_val = 1; + tab[k]._address_dest = in_UPDATE_ADDRESS_DEST[i]->read(); + tab[k]._condition = in_UPDATE_CONDITION [i]->read(); + tab[k]._last_take = in_UPDATE_LAST_TAKE [i]->read(); + //tab[k]._accurate = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit; + } + + TEST(Tcontrol_t, out_UPDATE_HIT [i]->read(), hit); + } + + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_CONTEXT_ID ; + delete [] in_PREDICT_ADDRESS ; + delete [] out_PREDICT_HIT ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; + delete [] out_PREDICT_CONDITION ; + delete [] out_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_IS_ACCURATE ; + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] out_DECOD_HIT ; + delete [] out_DECOD_HIT_INDEX ; + delete [] in_DECOD_VICTIM ; + delete [] in_DECOD_CONTEXT_ID ; + delete [] in_DECOD_ADDRESS_SRC ; + delete [] in_DECOD_ADDRESS_DEST ; + delete [] in_DECOD_CONDITION ; + delete [] in_DECOD_LAST_TAKE ; + delete [] in_DECOD_MISS_PREDICTION ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] out_UPDATE_HIT ; + delete [] out_UPDATE_HIT_INDEX ; + delete [] in_UPDATE_VICTIM ; + delete [] in_UPDATE_CONTEXT_ID ; + delete [] in_UPDATE_ADDRESS_SRC ; + delete [] in_UPDATE_ADDRESS_DEST ; + delete [] in_UPDATE_CONDITION ; + delete [] in_UPDATE_LAST_TAKE ; + delete [] in_UPDATE_MISS_PREDICTION; + +#endif + + delete _Branch_Target_Buffer_Register; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/Branch_Target_Buffer_Register.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/Branch_Target_Buffer_Register.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/Branch_Target_Buffer_Register.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Branch_Target_Buffer_Register} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h (revision 78) @@ -0,0 +1,181 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_register_Branch_Target_Buffer_Register_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_register_Branch_Target_Buffer_Register_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + + class Branch_Target_Buffer_Register +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_PREDICT_VAL ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_ACK ; //[nb_inst_predict] + public : SC_IN (Tcontext_t ) ** in_PREDICT_CONTEXT_ID ; //[nb_inst_predict] + public : SC_IN (Tgeneral_data_t ) ** in_PREDICT_ADDRESS ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) *** out_PREDICT_HIT ; //[nb_inst_predict][associativity] + public : SC_OUT(Tgeneral_data_t ) *** out_PREDICT_ADDRESS_SRC ; //[nb_inst_predict][associativity] + public : SC_OUT(Tgeneral_data_t ) *** out_PREDICT_ADDRESS_DEST ; //[nb_inst_predict][associativity] + public : SC_OUT(Tbranch_condition_t) *** out_PREDICT_CONDITION ; //[nb_inst_predict][associativity] + public : SC_OUT(Tcontrol_t ) *** out_PREDICT_LAST_TAKE ; //[nb_inst_predict][associativity] + public : SC_OUT(Tcontrol_t ) *** out_PREDICT_IS_ACCURATE ; //[nb_inst_predict][associativity] + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_DECOD_VAL ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_ACK ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_HIT ; //[nb_inst_decod] // hit = don't need a victim + public : SC_OUT(Tptr_t ) ** out_DECOD_HIT_INDEX ; //[nb_inst_decod] + public : SC_IN (Tptr_t ) ** in_DECOD_VICTIM ; //[nb_inst_decod] + public : SC_IN (Tcontext_t ) ** in_DECOD_CONTEXT_ID ; //[nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) ** in_DECOD_ADDRESS_SRC ; //[nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) ** in_DECOD_ADDRESS_DEST ; //[nb_inst_decod] + public : SC_IN (Tbranch_condition_t) ** in_DECOD_CONDITION ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_LAST_TAKE ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_MISS_PREDICTION ; //[nb_inst_decod] + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_UPDATE_VAL ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_ACK ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_HIT ; //[nb_inst_update] // hit = don't need a victim + public : SC_OUT(Tptr_t ) ** out_UPDATE_HIT_INDEX ; //[nb_inst_update] + public : SC_IN (Tptr_t ) ** in_UPDATE_VICTIM ; //[nb_inst_update] + public : SC_IN (Tcontext_t ) ** in_UPDATE_CONTEXT_ID ; //[nb_inst_update] + public : SC_IN (Tgeneral_data_t ) ** in_UPDATE_ADDRESS_SRC ; //[nb_inst_update] + public : SC_IN (Tgeneral_data_t ) ** in_UPDATE_ADDRESS_DEST ; //[nb_inst_update] + public : SC_IN (Tbranch_condition_t) ** in_UPDATE_CONDITION ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_LAST_TAKE ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_MISS_PREDICTION; //[nb_inst_update] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : btb_entry_t ** reg_BTB; //[size_bank][associativity] + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t * internal_DECOD_ACK ;//[nb_inst_decod] + private : Tcontrol_t * internal_DECOD_HIT ;//[nb_inst_decod] + private : uint32_t * internal_DECOD_NUM_BANK ;//[nb_inst_decod] + private : uint32_t * internal_DECOD_NUM_ENTRY ;//[nb_inst_decod] + + private : Tcontrol_t * internal_UPDATE_ACK ;//[nb_inst_update] + private : Tcontrol_t * internal_UPDATE_HIT ;//[nb_inst_update] + private : uint32_t * internal_UPDATE_NUM_BANK ;//[nb_inst_update] + private : uint32_t * internal_UPDATE_NUM_ENTRY;//[nb_inst_update] +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Branch_Target_Buffer_Register); +#endif + public : Branch_Target_Buffer_Register + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Branch_Target_Buffer_Register (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMealy_predict (void); + public : void genMealy_decod (void); + public : void genMealy_update (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h (revision 78) @@ -0,0 +1,88 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_register_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_register_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + +#define PERCENT_ACCURATE_LIMIT 25 + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_context ; + public : uint32_t * _nb_instruction ; + public : uint32_t _size_buffer ; + public : uint32_t _associativity ; + public : uint32_t _size_address ; + public : uint32_t _size_counter ; + public : uint32_t _nb_inst_predict; + public : uint32_t _nb_inst_decod ; + public : uint32_t _nb_inst_update ; + + public : uint32_t _size_bank ; + public : uint32_t _size_context_id; + public : uint32_t _size_victim ; + + public : bool _have_port_context_id; + public : bool _have_port_victim ; + + public : Tcounter_t _accurate_max ; + public : Tcounter_t _accurate_limit ; + public : Tcounter_t _first_accurate_if_hit ; + public : Tcounter_t _first_accurate_if_miss; + + + public : Tgeneral_data_t _mask_offset ; + public : Tgeneral_data_t _shift_offset; + public : Tgeneral_data_t _mask_bank ; + public : Tgeneral_data_t _shift_bank; + public : Tgeneral_data_t _shift_tag ; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_context , + uint32_t * nb_instruction , + uint32_t size_buffer , + uint32_t associativity , + uint32_t size_address , + uint32_t size_counter , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters & x); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Types.h (revision 78) @@ -0,0 +1,43 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_register_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_branch_target_buffer_register_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + class btb_entry_t + { + public : Tcontrol_t _val ; + public : Tcontext_t _context ; + public : Tcontrol_t _address_dest_val; // when the decod : address_dest_val = 0 when condition == READ_REGISTER or READ_STACK + public : Tgeneral_data_t _address_src ; + public : Tgeneral_data_t _address_dest ; + public : Tbranch_condition_t _condition ; + public : Tcontrol_t _last_take ; + public : Tcounter_t _accurate ; + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register.cpp (revision 78) @@ -0,0 +1,237 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::Branch_Target_Buffer_Register" + Branch_Target_Buffer_Register::Branch_Target_Buffer_Register + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + // Constant + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + PORT_WRITE(out_PREDICT_ACK [i],1); + } + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + internal_DECOD_ACK [i] = 1; + PORT_WRITE(out_DECOD_ACK [i], internal_DECOD_ACK [i]); + } + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + internal_UPDATE_ACK [i] = 1; + PORT_WRITE(out_UPDATE_ACK [i], internal_UPDATE_ACK [i]); + } + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Method - genMealy_predict"); + + SC_METHOD (genMealy_predict); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { +// sensitive << (*(in_PREDICT_VAL [i])) + sensitive << (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_PREDICT_CONTEXT_ID [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + for (uint32_t j=0; j<_param->_associativity; j++) + { + (*(out_PREDICT_HIT [i][j])) (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_HIT [i][j])) (*(in_PREDICT_CONTEXT_ID [i])); + + (*(out_PREDICT_ADDRESS_SRC [i][j])) (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_ADDRESS_SRC [i][j])) (*(in_PREDICT_CONTEXT_ID [i])); + + (*(out_PREDICT_ADDRESS_DEST [i][j])) (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_ADDRESS_DEST [i][j])) (*(in_PREDICT_CONTEXT_ID [i])); + + (*(out_PREDICT_CONDITION [i][j])) (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_CONDITION [i][j])) (*(in_PREDICT_CONTEXT_ID [i])); + + (*(out_PREDICT_LAST_TAKE [i][j])) (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_LAST_TAKE [i][j])) (*(in_PREDICT_CONTEXT_ID [i])); + + (*(out_PREDICT_IS_ACCURATE [i][j])) (*(in_PREDICT_ADDRESS [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_IS_ACCURATE [i][j])) (*(in_PREDICT_CONTEXT_ID [i])); + } +# endif + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Method - genMealy_decod"); + + SC_METHOD (genMealy_decod); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + sensitive << (*(in_DECOD_VAL [i])) + << (*(in_DECOD_ADDRESS_SRC [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_DECOD_CONTEXT_ID [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + (*(out_DECOD_HIT [i])) (*(in_DECOD_VAL [i])); + (*(out_DECOD_HIT [i])) (*(in_DECOD_ADDRESS_SRC [i])); + if (_param->_have_port_context_id) + (*(out_DECOD_HIT [i])) (*(in_DECOD_CONTEXT_ID [i])); + + if (_param->_have_port_victim) + { + (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_VAL [i])); + (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_ADDRESS_SRC [i])); + if (_param->_have_port_context_id) + (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_CONTEXT_ID [i])); + } + } +#endif + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Method - genMealy_update"); + + SC_METHOD (genMealy_update); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + sensitive << (*(in_UPDATE_VAL [i])) + << (*(in_UPDATE_ADDRESS_SRC [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_UPDATE_CONTEXT_ID [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + (*(out_UPDATE_HIT [i])) (*(in_UPDATE_VAL [i])); + (*(out_UPDATE_HIT [i])) (*(in_UPDATE_ADDRESS_SRC [i])); + if (_param->_have_port_context_id) + (*(out_UPDATE_HIT [i])) (*(in_UPDATE_CONTEXT_ID [i])); + + if (_param->_have_port_victim) + { + (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_VAL [i])); + (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_ADDRESS_SRC [i])); + if (_param->_have_port_context_id) + (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_CONTEXT_ID [i])); + } + } +# endif +#endif + + } + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::~Branch_Target_Buffer_Register" + Branch_Target_Buffer_Register::~Branch_Target_Buffer_Register (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp (revision 78) @@ -0,0 +1,146 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::allocation" + void Branch_Target_Buffer_Register::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Branch_Target_Buffer_Register" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN, SOUTH, "Compute next pc.", _param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_address); + + { + ALLOC2_INTERFACE("predict", OUT, SOUTH, "Compute next pc.", _param->_nb_inst_predict, _param->_associativity); + + ALLOC2_SIGNAL_OUT(out_PREDICT_HIT ,"hit" ,Tcontrol_t ,1); + ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST,"address_dest",Tgeneral_data_t ,_param->_size_address); + ALLOC2_SIGNAL_OUT(out_PREDICT_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_state); + ALLOC2_SIGNAL_OUT(out_PREDICT_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC2_SIGNAL_OUT(out_PREDICT_IS_ACCURATE ,"is_accurate" ,Tcontrol_t ,1); + } + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("decod", IN, SOUTH, "decod instruction", _param->_nb_inst_decod); + + ALLOC1_VALACK_IN ( in_DECOD_VAL ,VAL); + ALLOC1_VALACK_OUT(out_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_DECOD_HIT ,"hit" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_DECOD_HIT_INDEX ,"hit_index" ,Tptr_t ,_param->_size_victim); + ALLOC1_SIGNAL_IN ( in_DECOD_VICTIM ,"victim" ,Tptr_t ,_param->_size_victim); + ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_state); + ALLOC1_SIGNAL_IN ( in_DECOD_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update", IN, SOUTH, "update instruction", _param->_nb_inst_update); + + ALLOC1_VALACK_IN ( in_UPDATE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_UPDATE_HIT ,"hit" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_HIT_INDEX ,"hit_index" ,Tptr_t ,_param->_size_victim); + ALLOC1_SIGNAL_IN ( in_UPDATE_VICTIM ,"victim" ,Tptr_t ,_param->_size_victim); + ALLOC1_SIGNAL_IN ( in_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_state); + ALLOC1_SIGNAL_IN ( in_UPDATE_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); + } + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + reg_BTB = new btb_entry_t * [_param->_size_bank]; + for (uint32_t i=0; i<_param->_size_bank; i++) + reg_BTB [i] = new btb_entry_t [_param->_associativity]; + + internal_DECOD_ACK = new Tcontrol_t [_param->_nb_inst_decod]; + internal_DECOD_HIT = new Tcontrol_t [_param->_nb_inst_decod]; + internal_DECOD_NUM_BANK = new uint32_t [_param->_nb_inst_decod]; + internal_DECOD_NUM_ENTRY = new uint32_t [_param->_nb_inst_decod]; + + internal_UPDATE_ACK = new Tcontrol_t [_param->_nb_inst_update]; + internal_UPDATE_HIT = new Tcontrol_t [_param->_nb_inst_update]; + internal_UPDATE_NUM_BANK = new uint32_t [_param->_nb_inst_update]; + internal_UPDATE_NUM_ENTRY = new uint32_t [_param->_nb_inst_update]; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_deallocation.cpp (revision 78) @@ -0,0 +1,99 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::deallocation" + void Branch_Target_Buffer_Register::deallocation (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + if (_param->_have_port_context_id) + delete [] in_PREDICT_CONTEXT_ID ; + delete [] in_PREDICT_ADDRESS ; + delete [] out_PREDICT_HIT ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; + delete [] out_PREDICT_CONDITION ; + delete [] out_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_IS_ACCURATE ; + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] out_DECOD_HIT ; + if (_param->_have_port_victim) + delete [] out_DECOD_HIT_INDEX ; + if (_param->_have_port_victim) + delete [] in_DECOD_VICTIM ; + if (_param->_have_port_context_id) + delete [] in_DECOD_CONTEXT_ID ; + delete [] in_DECOD_ADDRESS_SRC ; + delete [] in_DECOD_ADDRESS_DEST ; + delete [] in_DECOD_CONDITION ; + delete [] in_DECOD_LAST_TAKE ; + delete [] in_DECOD_MISS_PREDICTION ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] out_UPDATE_HIT ; + if (_param->_have_port_victim) + delete [] out_UPDATE_HIT_INDEX ; + if (_param->_have_port_victim) + delete [] in_UPDATE_VICTIM ; + if (_param->_have_port_context_id) + delete [] in_UPDATE_CONTEXT_ID ; + delete [] in_UPDATE_ADDRESS_SRC ; + delete [] in_UPDATE_ADDRESS_DEST ; + delete [] in_UPDATE_CONDITION ; + delete [] in_UPDATE_LAST_TAKE ; + delete [] in_UPDATE_MISS_PREDICTION; + + delete [] reg_BTB; + + delete [] internal_DECOD_ACK ; + delete [] internal_DECOD_HIT ; + delete [] internal_DECOD_NUM_BANK ; + delete [] internal_DECOD_NUM_ENTRY ; + + delete [] internal_UPDATE_ACK ; + delete [] internal_UPDATE_HIT ; + delete [] internal_UPDATE_NUM_BANK ; + delete [] internal_UPDATE_NUM_ENTRY; + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::end_cycle" +void Branch_Target_Buffer_Register::end_cycle () + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_decod.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_decod.cpp (revision 78) @@ -0,0 +1,67 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::genMealy_decod" + void Branch_Target_Buffer_Register::genMealy_decod (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; + Tgeneral_data_t address = PORT_READ(in_DECOD_ADDRESS_SRC [i]); + + Tcontrol_t hit = false; + uint32_t num_bank = (address>>_param->_shift_bank)&_param->_mask_bank; + uint32_t num_entry = 0; + + if (PORT_READ(in_DECOD_VAL [i])) + for (;num_entry < _param->_associativity; num_entry ++) + { + hit = ((reg_BTB[num_bank][num_entry]._val == 1 ) and + (reg_BTB[num_bank][num_entry]._context == context) and + (reg_BTB[num_bank][num_entry]._address_src == address)); + + if (hit) + break; + } + + internal_DECOD_HIT [i] = hit ; + internal_DECOD_NUM_BANK [i] = num_bank ; + internal_DECOD_NUM_ENTRY [i] = num_entry; + + PORT_WRITE(out_DECOD_HIT [i], hit); + if (_param->_have_port_victim) + PORT_WRITE(out_DECOD_HIT_INDEX [i], num_entry); + } + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_predict.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_predict.cpp (revision 78) @@ -0,0 +1,76 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::genMealy_predict" + void Branch_Target_Buffer_Register::genMealy_predict (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; + Tgeneral_data_t address = PORT_READ(in_PREDICT_ADDRESS [i]); + uint32_t num_bank = (address>>_param->_shift_bank)&_param->_mask_bank; + + Tgeneral_data_t address_tag = address >> _param->_shift_tag ; + Tgeneral_data_t address_offset = (address >> _param->_shift_offset)&_param->_mask_offset; + +// log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION,"address_ (tag, bank, offset) : %.8x %.8x %.8x",address_tag,num_bank, address_offset); + + for (uint32_t j=0; j<_param->_associativity; j++) + { + Tgeneral_data_t address_src_tag = reg_BTB[num_bank][j]._address_src >> _param->_shift_tag ; + Tgeneral_data_t address_src_offset = (reg_BTB[num_bank][j]._address_src >> _param->_shift_offset)&_param->_mask_offset; + + Tcontrol_t hit = ((reg_BTB[num_bank][j]._val == 1 ) and + (reg_BTB[num_bank][j]._context == context ) and + (address_src_tag == address_tag ) and + //address_bank is the same + (address_src_offset >= address_offset)); + +// log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION,"address_src (tag, bank, offset) : %.8x %.8x %.8x - hit : %d",address_src_tag,num_bank,address_src_offset, hit); + + // Hit : + // * entry is valid + // * context is the same + // * address_src must be higher that the address, because the address lower is previous the current pc. + PORT_WRITE(out_PREDICT_HIT [i][j],hit); + PORT_WRITE(out_PREDICT_ADDRESS_SRC [i][j],reg_BTB[num_bank][j]._address_src ); + PORT_WRITE(out_PREDICT_ADDRESS_DEST [i][j],reg_BTB[num_bank][j]._address_dest); + PORT_WRITE(out_PREDICT_CONDITION [i][j],reg_BTB[num_bank][j]._condition ); + PORT_WRITE(out_PREDICT_LAST_TAKE [i][j],reg_BTB[num_bank][j]._last_take ); + PORT_WRITE(out_PREDICT_IS_ACCURATE [i][j],((reg_BTB[num_bank][j]._accurate >= _param->_accurate_limit) and + (reg_BTB[num_bank][j]._address_dest_val == 1))); + } + } + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_update.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_update.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_update.cpp (revision 78) @@ -0,0 +1,67 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::genMealy_update" + void Branch_Target_Buffer_Register::genMealy_update (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; + Tgeneral_data_t address = PORT_READ(in_UPDATE_ADDRESS_SRC [i]); + + Tcontrol_t hit = false; + uint32_t num_bank = (address>>_param->_shift_bank)&_param->_mask_bank; + uint32_t num_entry = 0; + + if (PORT_READ(in_UPDATE_VAL [i])) + for (;num_entry < _param->_associativity; num_entry ++) + { + hit = ((reg_BTB[num_bank][num_entry]._val == 1 ) and + (reg_BTB[num_bank][num_entry]._context == context) and + (reg_BTB[num_bank][num_entry]._address_src == address)); + + if (hit) + break; + } + + internal_UPDATE_HIT [i] = hit ; + internal_UPDATE_NUM_BANK [i] = num_bank ; + internal_UPDATE_NUM_ENTRY [i] = num_entry; + + PORT_WRITE(out_UPDATE_HIT [i], hit); + if (_param->_have_port_victim) + PORT_WRITE(out_UPDATE_HIT_INDEX [i], num_entry); + } + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_statistics_allocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::statistics_allocation" + void Branch_Target_Buffer_Register::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Branch_Target_Buffer_Register", + param_statistics); + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::statistics_deallocation" + void Branch_Target_Buffer_Register::statistics_deallocation (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_transition.cpp (revision 78) @@ -0,0 +1,162 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::transition" + void Branch_Target_Buffer_Register::transition (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + for (uint32_t i=0; i<_param->_size_bank; i++) + for (uint32_t j=0; j<_param->_associativity; j++) + reg_BTB [i][j]._val = false; + } + else + { + // ======================================================= + // =====[ PREDICT ]======================================= + // ======================================================= + + // ======================================================= + // =====[ DECOD ]========================================= + // ======================================================= + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i]) + { + bool hit = internal_DECOD_HIT [i]; +// uint32_t num_bank = internal_DECOD_NUM_BANK [i]; +// uint32_t num_entry = (hit)?internal_DECOD_NUM_ENTRY [i]:((_param->_have_port_victim)?PORT_READ(in_DECOD_VICTIM [i]):0); + + // detect new branch !!! insert in branch target buffer + if (not hit) + { + // =====[ Miss Case ] + uint32_t num_bank = internal_DECOD_NUM_BANK [i]; + uint32_t num_entry = (_param->_have_port_victim)?PORT_READ(in_DECOD_VICTIM [i]):0; + + // dest_val if not jr or jalr + Tbranch_condition_t cond = PORT_READ(in_DECOD_CONDITION [i]); + bool dest_val = not ((cond == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK ) or + (cond == BRANCH_CONDITION_READ_STACK )); + + reg_BTB[num_bank][num_entry]._val = 1; + reg_BTB[num_bank][num_entry]._context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; + reg_BTB[num_bank][num_entry]._address_src = PORT_READ(in_DECOD_ADDRESS_SRC [i]); + reg_BTB[num_bank][num_entry]._address_dest = PORT_READ(in_DECOD_ADDRESS_DEST [i]); + reg_BTB[num_bank][num_entry]._address_dest_val = dest_val; + reg_BTB[num_bank][num_entry]._condition = cond; + reg_BTB[num_bank][num_entry]._last_take = PORT_READ(in_DECOD_LAST_TAKE [i]); + reg_BTB[num_bank][num_entry]._accurate = _param->_first_accurate_if_hit; + } + // else (hit) : no update -> it's not the last result of the branch + } + + // ======================================================= + // =====[ UPDATE ]========================================= + // ======================================================= + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + if (PORT_READ(in_UPDATE_VAL [i]) and internal_UPDATE_ACK [i]) + { + bool hit = internal_UPDATE_HIT [i]; + uint32_t num_bank = internal_UPDATE_NUM_BANK [i]; + uint32_t num_entry = (hit)?internal_UPDATE_NUM_ENTRY [i]:((_param->_have_port_victim)?PORT_READ(in_UPDATE_VICTIM [i]):0); + bool miss_pred = PORT_READ(in_UPDATE_MISS_PREDICTION [i]); + + // detect new branch !!! insert in branch target buffer + Tcounter_t accurate_new = 0; + + if (hit) + { + // =====[ Hit Case ] + // * Have destination + // * if cond == read_register or read_stack : destination valid in commit stage + // * if cond != read_register or read_stack : destination valid in decod stage + // * in all case : is valid in this step + Tcounter_t accurate_old = reg_BTB[num_bank][num_entry]._accurate; + // hit : increase accurate + // miss : decrease accurate + Tcounter_t accurate_new = (miss_pred)?((accurate_old>0)?(accurate_old-1):accurate_old):((accurate_old<_param->_accurate_max)?(accurate_old+1):accurate_old); + + // test if accurate go to the threshold + if ((accurate_old >= _param->_accurate_limit) and + (accurate_new < _param->_accurate_limit)) + accurate_new = 0; + + //reg_BTB[num_bank][num_entry]._val : no update because hit + //reg_BTB[num_bank][num_entry]._context : no update because hit + //reg_BTB[num_bank][num_entry]._address_src : no update because hit + //reg_BTB[num_bank][num_entry]._condition : no update because hit + } + else + { + // =====[ Miss Case ] + //reg_BTB[num_bank][num_entry]._val = 1; + //reg_BTB[num_bank][num_entry]._context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; + //reg_BTB[num_bank][num_entry]._address_src = PORT_READ(in_UPDATE_ADDRESS_SRC [i]); + //reg_BTB[num_bank][num_entry]._condition = PORT_READ(in_UPDATE_CONDITION [i]); + + accurate_new = (miss_pred)?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit; + } + + // =====[ All Case ] + reg_BTB[num_bank][num_entry]._val = 1; + reg_BTB[num_bank][num_entry]._context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; + reg_BTB[num_bank][num_entry]._address_src = PORT_READ(in_UPDATE_ADDRESS_SRC [i]); + reg_BTB[num_bank][num_entry]._condition = PORT_READ(in_UPDATE_CONDITION [i]); + + reg_BTB[num_bank][num_entry]._address_dest_val = 1; + reg_BTB[num_bank][num_entry]._address_dest = PORT_READ(in_UPDATE_ADDRESS_DEST [i]); + reg_BTB[num_bank][num_entry]._last_take = PORT_READ(in_UPDATE_LAST_TAKE [i]); + reg_BTB[num_bank][num_entry]._accurate = accurate_new; + } + + for (uint32_t i=0; i<_param->_size_bank; i++) + for (uint32_t j=0; j<_param->_associativity; j++) + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION,"[%.4d][%.4d] %d - %.2d %.8x %.1d %.8x %.3d %.1d %.4d", + i,j, + reg_BTB [i][j]._val , + reg_BTB [i][j]._context , + reg_BTB [i][j]._address_src , + reg_BTB [i][j]._address_dest_val, + reg_BTB [i][j]._address_dest , + reg_BTB [i][j]._condition , + reg_BTB [i][j]._last_take , + reg_BTB [i][j]._accurate ); + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::vhdl" + void Branch_Target_Buffer_Register::vhdl (void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::vhdl_body" + void Branch_Target_Buffer_Register::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::vhdl_declaration" + void Branch_Target_Buffer_Register::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters.cpp (revision 78) @@ -0,0 +1,111 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h" +#include "Common/include/BitManipulation.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::Parameters" + Parameters::Parameters (uint32_t nb_context , + uint32_t * nb_instruction , + uint32_t size_buffer , + uint32_t associativity , + uint32_t size_address , + uint32_t size_counter , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update ) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + _nb_context = nb_context ; + _nb_instruction = nb_instruction ; + _size_buffer = size_buffer ; + _associativity = associativity ; + _size_address = size_address ; + _size_counter = size_counter ; + _nb_inst_predict = nb_inst_predict; + _nb_inst_decod = nb_inst_decod ; + _nb_inst_update = nb_inst_update ; + + _size_bank = size_buffer/associativity; + _size_context_id = log2(nb_context); + _size_victim = log2(associativity); + + _have_port_context_id = (_size_context_id > 0); + _have_port_victim = (_size_victim > 0); + + _accurate_max = (1<<_size_counter); + _accurate_limit = (_accurate_max*PERCENT_ACCURATE_LIMIT)/100; + _first_accurate_if_hit = (1<<(_size_counter-1)); //b1000 + _first_accurate_if_miss = _first_accurate_if_hit-1; //b0111 + + uint32_t max_inst = max(nb_instruction, nb_context); + uint32_t size_offset = log2(max_inst); + uint32_t size_bank = log2(_size_bank); + + _mask_offset = gen_mask (size_offset); + _mask_bank = gen_mask (size_bank ); + _shift_offset = 2; + _shift_bank = _shift_offset+size_offset; + _shift_tag = _shift_bank +size_bank ; + +// std::cout << "max_inst : " << toString(max_inst ) << std::endl; +// std::cout << "size_offset : " << toString(size_offset) << std::endl; +// std::cout << "size_bank : " << toString(size_bank ) << std::endl; +// std::cout << "mask_offset : " << toString(_mask_offset ) << std::endl; +// std::cout << "mask_bank : " << toString(_mask_bank ) << std::endl; +// std::cout << "shift_offset : " << toString(_shift_offset) << std::endl; +// std::cout << "shift_bank : " << toString(_shift_bank ) << std::endl; +// std::cout << "shift_tag : " << toString(_shift_tag ) << std::endl; +// std::cout << "accurate_max : " << toString(_accurate_max ) << std::endl; +// std::cout << "first_accurate_if_hit : " << toString(_first_accurate_if_hit ) << std::endl; +// std::cout << "first_accurate_if_miss : " << toString(_first_accurate_if_miss) << std::endl; +// std::cout << "accurate_limit : " << toString(_accurate_limit ) << std::endl; + + test(); + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Branch_Target_Buffer_Register::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,62 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + Parameters_test test ("Branch_Target_Buffer_Register"); + + if (_size_counter < 2 ) + test.error("size_counter must be >= 2."); + + if ((_associativity == 0) or + (_associativity > _size_buffer)) + test.error("associativity must be > 0 and <= size_buffer."); + + if (_associativity == 1) // special case : full assoc and direct map ... also we print direct map + test.information("Branch Target Buffer is Direct Map"); + else + if (_associativity == _size_buffer) + test.information("Branch Target Buffer is Full associative"); + else + test.information("Branch Target Buffer is Semi associative"); + + for (uint32_t i=0; i<_nb_context; i++) + if (_associativity < (_nb_instruction[i]/2)) + test.error("associativity must be >= nb_instruction["+toString(i)+"]/2."); + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + + return test; + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,76 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { +namespace branch_target_buffer_register { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + XML xml ("branch_target_buffer_register"); + + xml.balise_open("branch_target_buffer_register"); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("size_buffer "); xml.attribut("value",toString(_size_buffer )); xml.singleton_end(); + xml.singleton_begin("associativity "); xml.attribut("value",toString(_associativity )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("size_counter "); xml.attribut("value",toString(_size_counter )); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict"); xml.attribut("value",toString(_nb_inst_predict)); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_context; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction [i])); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer_Register::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters & x) + { + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace branch_target_buffer_register +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libBranch_Target_Buffer.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.deps (revision 78) @@ -0,0 +1,66 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Branch_Target_Buffer = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Branch_Target_Buffer_Glue +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.deps +endif +ifndef Branch_Target_Buffer_Register +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.deps +endif +ifndef Sort +include $(DIR_MORPHEO)/Behavioural/Generic/Sort/Makefile.deps +endif +ifndef Victim +include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Branch_Target_Buffer_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer + +#-----[ Library ]------------------------------------------ + +Branch_Target_Buffer_LIBRARY = -lBranch_Target_Buffer \ + $(Branch_Target_Buffer_Glue_LIBRARY) \ + $(Branch_Target_Buffer_Register_LIBRARY) \ + $(Sort_LIBRARY) \ + $(Victim_LIBRARY) \ + $(Behavioural_LIBRARY) + +Branch_Target_Buffer_DIR_LIBRARY = -L$(Branch_Target_Buffer_DIR)/lib \ + $(Branch_Target_Buffer_Glue_DIR_LIBRARY) \ + $(Branch_Target_Buffer_Register_DIR_LIBRARY) \ + $(Sort_DIR_LIBRARY) \ + $(Victim_DIR_LIBRARY) \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Branch_Target_Buffer_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Branch_Target_Buffer_Glue_library; \ + $(MAKE) Branch_Target_Buffer_Register_library; \ + $(MAKE) Sort_library; \ + $(MAKE) Victim_library; \ + $(MAKE) --directory=$(Branch_Target_Buffer_DIR) --makefile=Makefile; + +Branch_Target_Buffer_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Branch_Target_Buffer_Glue_library_clean; \ + $(MAKE) Branch_Target_Buffer_Register_library_clean; \ + $(MAKE) Sort_library_clean; \ + $(MAKE) Victim_library_clean; \ + $(MAKE) --directory=$(Branch_Target_Buffer_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Branch_Target_Buffer_LIBRARY) + +DIR_LIBRARY = $(Branch_Target_Buffer_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Branch_Target_Buffer_library + +library_clean : Branch_Target_Buffer_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/cfg/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/cfg/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/cfg/configuration.cfg (revision 78) @@ -0,0 +1,11 @@ +Branch_Target_Buffer +1 1 +1 # nb_context +1 4 *2 # nb_instruction [0] [nb_context] +16 16 *4 # size_buffer +2 16 *4 # associativity +32 32 *2 # size_address +2 2 +1 # size_counter +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_decod +1 4 *4 # nb_inst_commit +3 3 +1 # victim_scheme Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/config_mono_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/config_mono_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/config_mono_context.cfg (revision 78) @@ -0,0 +1,11 @@ +Branch_Target_Buffer +1 1 +1 # nb_context +1 4 *2 # nb_instruction [0] [nb_context] +16 16 *4 # size_buffer +2 16 *4 # associativity +32 32 *2 # size_address +2 2 +1 # size_counter +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_decod +1 4 *4 # nb_inst_commit +3 3 +1 # victim_scheme Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/config_multi_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/config_multi_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/config_multi_context.cfg (revision 78) @@ -0,0 +1,14 @@ +Branch_Target_Buffer +4 4 +1 # nb_context +1 1 +1 # nb_instruction [0] [nb_context] +2 2 +1 # nb_instruction [1] [nb_context] +4 4 +1 # nb_instruction [2] [nb_context] +8 8 +1 # nb_instruction [3] [nb_context] +8 64 *4 # size_buffer +4 8 *2 # associativity +32 32 *2 # size_address +2 2 +1 # size_counter +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_decod +1 4 *4 # nb_inst_commit +3 3 +1 # victim_scheme Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,92 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/include/test.h" + +#define NB_PARAMS 9 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * size_buffer (uint32_t )\n")); + err (_(" * associativity (uint32_t )\n")); + err (_(" * size_address (uint32_t )\n")); + err (_(" * size_counter (uint32_t )\n")); + err (_(" * nb_inst_predict (uint32_t )\n")); + err (_(" * nb_inst_decod (uint32_t )\n")); + err (_(" * nb_inst_commit (uint32_t )\n")); + err (_(" * victim_scheme (Tvictim_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + uint32_t _nb_context = fromString(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+_nb_context)) + usage (argc, argv); + + uint32_t * _nb_instruction = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _nb_instruction [i] = fromString(argv[x++]); + + uint32_t _size_buffer = fromString(argv[x++]); + uint32_t _associativity = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + uint32_t _size_counter = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_inst_commit = fromString(argv[x++]); + Tvictim_t _victim_scheme = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters + (_nb_context , + _nb_instruction , + _size_buffer , + _associativity , + _size_address , + _size_counter , + _nb_inst_predict, + _nb_inst_decod , + _nb_inst_commit , + _victim_scheme ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete _nb_instruction; + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,212 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Branch_Target_Buffer * _Branch_Target_Buffer = new Branch_Target_Buffer (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS ," in_PREDICT_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_CONDITION ,"out_PREDICT_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_LAST_TAKE ,"out_PREDICT_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_IS_ACCURATE ,"out_PREDICT_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_CONDITION ," in_DECOD_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_LAST_TAKE ," in_DECOD_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ," in_UPDATE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_SRC ," in_UPDATE_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_DEST ," in_UPDATE_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_CONDITION ," in_UPDATE_CONDITION ",Tbranch_condition_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_LAST_TAKE ," in_UPDATE_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_update); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Branch_Target_Buffer.\n"),name.c_str()); + + (*(_Branch_Target_Buffer->in_CLOCK)) (*(in_CLOCK)); + (*(_Branch_Target_Buffer->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_PREDICT_ADDRESS ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_HIT ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_CONDITION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_LAST_TAKE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_PREDICT_IS_ACCURATE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_DECOD_ACK ,_param->_nb_inst_decod); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_ADDRESS_SRC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_ADDRESS_DEST ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_CONDITION ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_LAST_TAKE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer,out_UPDATE_ACK ,_param->_nb_inst_update); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_ADDRESS_SRC ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_ADDRESS_DEST ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_CONDITION ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_LAST_TAKE ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_CONTEXT_ID ; + delete [] in_PREDICT_ADDRESS ; + delete [] out_PREDICT_HIT ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; + delete [] out_PREDICT_CONDITION ; + delete [] out_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_IS_ACCURATE ; + + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] in_DECOD_CONTEXT_ID ; + delete [] in_DECOD_ADDRESS_SRC ; + delete [] in_DECOD_ADDRESS_DEST ; + delete [] in_DECOD_CONDITION ; + delete [] in_DECOD_LAST_TAKE ; + delete [] in_DECOD_MISS_PREDICTION ; + + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_CONTEXT_ID ; + delete [] in_UPDATE_ADDRESS_SRC ; + delete [] in_UPDATE_ADDRESS_DEST ; + delete [] in_UPDATE_CONDITION ; + delete [] in_UPDATE_LAST_TAKE ; + delete [] in_UPDATE_MISS_PREDICTION; +#endif + + delete _Branch_Target_Buffer; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/Branch_Target_Buffer.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/Branch_Target_Buffer.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/Branch_Target_Buffer.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Branch_Target_Buffer} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h (revision 78) @@ -0,0 +1,173 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_Branch_Target_Buffer_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_Branch_Target_Buffer_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +#include "Behavioural/Generic/Sort/include/Sort.h" +#include "Behavioural/Generic/Victim/include/Victim.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Branch_Target_Buffer_Glue.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + + class Branch_Target_Buffer +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_PREDICT_VAL ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_ACK ; //[nb_inst_predict] + public : SC_IN (Tcontext_t ) ** in_PREDICT_CONTEXT_ID ; //[nb_inst_predict] + public : SC_IN (Tgeneral_data_t ) ** in_PREDICT_ADDRESS ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_HIT ; //[nb_inst_predict] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_SRC ; //[nb_inst_predict] + public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_DEST ; //[nb_inst_predict] + public : SC_OUT(Tbranch_condition_t) ** out_PREDICT_CONDITION ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_LAST_TAKE ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_IS_ACCURATE ; //[nb_inst_predict] + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_DECOD_VAL ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_ACK ; //[nb_inst_decod] +//public : SC_OUT(Tcontrol_t ) ** out_DECOD_HIT ; //[nb_inst_decod] +//public : SC_IN (Tptr_t ) ** in_DECOD_VICTIM ; //[nb_inst_decod] + public : SC_IN (Tcontext_t ) ** in_DECOD_CONTEXT_ID ; //[nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) ** in_DECOD_ADDRESS_SRC ; //[nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) ** in_DECOD_ADDRESS_DEST ; //[nb_inst_decod] + public : SC_IN (Tbranch_condition_t) ** in_DECOD_CONDITION ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_LAST_TAKE ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_MISS_PREDICTION ; //[nb_inst_decod] + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_UPDATE_VAL ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_ACK ; //[nb_inst_update] +//public : SC_OUT(Tcontrol_t ) ** out_UPDATE_HIT ; //[nb_inst_update] +//public : SC_IN (Tptr_t ) ** in_UPDATE_VICTIM ; //[nb_inst_update] + public : SC_IN (Tcontext_t ) ** in_UPDATE_CONTEXT_ID ; //[nb_inst_update] + public : SC_IN (Tgeneral_data_t ) ** in_UPDATE_ADDRESS_SRC ; //[nb_inst_update] + public : SC_IN (Tgeneral_data_t ) ** in_UPDATE_ADDRESS_DEST ; //[nb_inst_update] + public : SC_IN (Tbranch_condition_t) ** in_UPDATE_CONDITION ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_LAST_TAKE ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_MISS_PREDICTION; //[nb_inst_update] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : morpheo::behavioural::generic::sort::Sort ** _component_sort; + public : morpheo::behavioural::generic::victim::Victim * _component_victim; + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Branch_Target_Buffer_Glue * _component_branch_target_buffer_glue; + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Branch_Target_Buffer_Register * _component_branch_target_buffer_register; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Branch_Target_Buffer); +#endif + public : Branch_Target_Buffer + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Branch_Target_Buffer (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif +#endif + +#if VHDL + public : void vhdl (void); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h (revision 78) @@ -0,0 +1,85 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_branch_target_buffer_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Parameters.h" + +#include "Behavioural/Generic/Sort/include/Parameters.h" +#include "Behavioural/Generic/Victim/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_context ; + public : uint32_t * _nb_instruction ; + public : uint32_t _size_buffer ; + public : uint32_t _associativity ; + public : uint32_t _size_address ; + public : uint32_t _size_counter ; + public : uint32_t _nb_inst_predict; + public : uint32_t _nb_inst_decod ; + public : uint32_t _nb_inst_update ; + public : Tvictim_t _victim_scheme ; + + public : uint32_t _size_bank ; + public : uint32_t _size_context_id; + public : uint32_t _size_victim ; + + public : bool _have_port_context_id; + public : bool _have_component_victim; + public : bool _is_full_associative; + + public : morpheo::behavioural::generic::sort::Parameters * _param_sort; + public : morpheo::behavioural::generic::victim::Parameters * _param_victim; + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters * _param_branch_target_buffer_glue; + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param_branch_target_buffer_register; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_context , + uint32_t * nb_instruction , + uint32_t size_buffer , + uint32_t associativity , + uint32_t size_address , + uint32_t size_counter , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update , + Tvictim_t victim_scheme ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters & x); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer.cpp (revision 78) @@ -0,0 +1,111 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::Branch_Target_Buffer" + Branch_Target_Buffer::Branch_Target_Buffer + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + log_printf(INFO,Branch_Target_Buffer,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Branch_Target_Buffer,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Branch_Target_Buffer,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Branch_Target_Buffer,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::~Branch_Target_Buffer" + Branch_Target_Buffer::~Branch_Target_Buffer (void) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Branch_Target_Buffer,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp (revision 78) @@ -0,0 +1,601 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::allocation" + void Branch_Target_Buffer::allocation + ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Branch_Target_Buffer" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN, SOUTH, "Predict (next pc) interface", _param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_HIT ,"hit" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST,"address_dest",Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_OUT(out_PREDICT_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_IS_ACCURATE ,"is_accurate" ,Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("decod", IN, SOUTH, "Decod Interface", _param->_nb_inst_decod); + + ALLOC1_VALACK_IN ( in_DECOD_VAL ,VAL); + ALLOC1_VALACK_OUT(out_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_IN ( in_DECOD_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update", IN, SOUTH, "Update interface", _param->_nb_inst_update); + + ALLOC1_VALACK_IN ( in_UPDATE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_IN ( in_UPDATE_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string name; + + if (_param->_have_component_victim) + { + _component_sort = new morpheo::behavioural::generic::sort::Sort * [_param->_nb_inst_predict]; + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + name = _name+"_sort_"+toString(i); + std::cout << "Create : " << name << std::endl; + + _component_sort [i] = new morpheo::behavioural::generic::sort::Sort + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_sort); + + _component->set_component (_component_sort [i] ->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_victim"; + std::cout << "Create : " << name << std::endl; + + _component_victim = new morpheo::behavioural::generic::victim::Victim + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_victim); + + _component->set_component (_component_victim->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + } + + { + name = _name+"_glue"; + std::cout << "Create : " << name << std::endl; + + _component_branch_target_buffer_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Branch_Target_Buffer_Glue + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_branch_target_buffer_glue); + + _component->set_component (_component_branch_target_buffer_glue->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_register"; + std::cout << "Create : " << name << std::endl; + + _component_branch_target_buffer_register = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Branch_Target_Buffer_Register + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_branch_target_buffer_register); + + _component->set_component (_component_branch_target_buffer_register->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; + + if (_param->_have_component_victim) + { + //================================================================ + //=====[ Sort ]=================================================== + //================================================================ + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + src = _name+"_sort_"+toString(i); + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + for (uint32_t j=0; j<_param->_associativity; j++) + { + dest = _name+"_register"; +#ifdef POSITION + _component->interface_map (src ,"input_" +toString(i), + dest,"predict_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src , "in_INPUT_"+toString(j)+"_VAL" , + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_HIT" ); + COMPONENT_MAP(_component,src , "in_INPUT_"+toString(j)+"_DATA", + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_ADDRESS_SRC"); + + // out_OUTPUT_VAL -> glue + // out_OUTPUT_INDEX -> glue + // out_OUTPUT_ADDRESS -> no exist + } + } + + //================================================================ + //=====[ Victim ]================================================= + //================================================================ + { + src = _name+"_victim"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + + // in_ACCESS_VAL -> glue, register + //out_ACCESS_ACK -> glue, register + // in_ACCESS_ADDRESS -> glue, register + // in_ACCESS_HIT -> glue, register + // in_ACCESS_ENTITY -> glue, register + //out_ACCESS_VICTIM -> glue, register + } + } + } + + //==================================================================== + //=====[ Glue ]======================================================= + //==================================================================== + { + src = _name+"_glue"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"predict_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_VAL" , + dest, "in_PREDICT_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ACK" , + dest,"out_PREDICT_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_HIT" , + dest,"out_PREDICT_"+toString(i)+"_HIT" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC" , + dest,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST", + dest,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST"); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_CONDITION" , + dest,"out_PREDICT_"+toString(i)+"_CONDITION" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_LAST_TAKE" , + dest,"out_PREDICT_"+toString(i)+"_LAST_TAKE" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_IS_ACCURATE" , + dest,"out_PREDICT_"+toString(i)+"_IS_ACCURATE" ); + + dest = _name+"_register"; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"predict_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_REGISTER_VAL", + dest, "in_PREDICT_"+toString(i)+"_VAL"); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_REGISTER_ACK", + dest,"out_PREDICT_"+toString(i)+"_ACK"); + + for (uint32_t j=0; j<_param->_associativity; j++) + { +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i)+"_"+toString(j), + dest,"predict_"+toString(i)+"_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_"+toString(j)+"_REGISTER_HIT" , + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_HIT" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_"+toString(j)+"_REGISTER_ADDRESS_SRC" , + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_ADDRESS_SRC" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_"+toString(j)+"_REGISTER_ADDRESS_DEST", + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_ADDRESS_DEST"); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_"+toString(j)+"_REGISTER_CONDITION" , + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_CONDITION" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_"+toString(j)+"_REGISTER_LAST_TAKE" , + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_LAST_TAKE" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_"+toString(j)+"_REGISTER_IS_ACCURATE" , + dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_IS_ACCURATE" ); + } + + if (_param->_have_component_victim) + { + dest = _name+"_sort_"+toString(i); +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"output_0"); +#endif + + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_SORT_VAL" , + dest,"out_OUTPUT_0_VAL" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_SORT_INDEX", + dest,"out_OUTPUT_0_INDEX"); + + dest = _name+"_victim"; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"access_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VICTIM_VAL" , + dest, "in_ACCESS_"+toString(i)+"_VAL" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_VICTIM_ACK" , + dest,"out_ACCESS_"+toString(i)+"_ACK" ); + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VICTIM_HIT" , + dest, "in_ACCESS_"+toString(i)+"_HIT" ); + if (not _param->_is_full_associative) + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VICTIM_ADDRESS", + dest, "in_ACCESS_"+toString(i)+"_ADDRESS"); + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VICTIM_INDEX" , + dest, "in_ACCESS_"+toString(i)+"_ENTITY" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_VICTIM_VICTIM" , + dest,"out_ACCESS_"+toString(i)+"_VICTIM" ); + } + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"decod_"+toString(i), + dest,"decod_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_VAL" , + dest, "in_DECOD_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_ACK" , + dest,"out_DECOD_"+toString(i)+"_ACK" ); + if (not _param->_is_full_associative) + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_ADDRESS_SRC", + dest, "in_DECOD_"+toString(i)+"_ADDRESS_SRC"); + + dest = _name+"_register"; +#ifdef POSITION + _component->interface_map (src ,"decod_"+toString(i), + dest,"decod_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_REGISTER_VAL", + dest, "in_DECOD_"+toString(i)+"_VAL"); + COMPONENT_MAP(_component,src , "in_DECOD_"+toString(i)+"_REGISTER_ACK", + dest,"out_DECOD_"+toString(i)+"_ACK"); + + if (_param->_have_component_victim) + { + uint32_t j = _param->_nb_inst_predict+i; + + dest = _name+"_victim"; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"access_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_VICTIM_VAL" , + dest, "in_ACCESS_"+toString(j)+"_VAL" ); + COMPONENT_MAP(_component,src , "in_DECOD_"+toString(i)+"_VICTIM_ACK" , + dest,"out_ACCESS_"+toString(j)+"_ACK" ); + if (not _param->_is_full_associative) + COMPONENT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_VICTIM_ADDRESS", + dest, "in_ACCESS_"+toString(j)+"_ADDRESS"); + } + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(i), + dest,"update_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_VAL" , + dest, "in_UPDATE_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_ACK" , + dest,"out_UPDATE_"+toString(i)+"_ACK" ); + if (not _param->_is_full_associative) + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_ADDRESS_SRC", + dest, "in_UPDATE_"+toString(i)+"_ADDRESS_SRC"); + + dest = _name+"_register"; +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(i), + dest,"update_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_REGISTER_VAL", + dest, "in_UPDATE_"+toString(i)+"_VAL"); + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_REGISTER_ACK", + dest,"out_UPDATE_"+toString(i)+"_ACK"); + + if (_param->_have_component_victim) + { + uint32_t j = _param->_nb_inst_predict+_param->_nb_inst_decod+i; + + dest = _name+"_victim"; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"access_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_VICTIM_VAL" , + dest, "in_ACCESS_"+toString(j)+"_VAL" ); + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_VICTIM_ACK" , + dest,"out_ACCESS_"+toString(j)+"_ACK" ); + if (not _param->_is_full_associative) + COMPONENT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_VICTIM_ADDRESS", + dest, "in_ACCESS_"+toString(j)+"_ADDRESS"); + } + } + } + + //==================================================================== + //=====[ Register ]=================================================== + //==================================================================== + { + src = _name+"_register"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"predict_"+toString(i)); +#endif + + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_CONTEXT_ID", + dest, "in_PREDICT_"+toString(i)+"_CONTEXT_ID"); + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_ADDRESS" , + dest, "in_PREDICT_"+toString(i)+"_ADDRESS" ); + + // in_PREDICT_VAL -> glue + //out_PREDICT_ACK -> glue + //out_PREDICT_HIT -> glue, sort + //out_PREDICT_ADDRESS_SRC -> glue, sort + //out_PREDICT_ADDRESS_DEST -> glue + //out_PREDICT_CONDITION -> glue + //out_PREDICT_LAST_TAKE -> glue + //out_PREDICT_IS_ACCURATE -> glue + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"decod_"+toString(i), + dest,"decod_"+toString(i)); +#endif + + // in_DECOD_VAL -> glue + //out_DECOD_ACK -> glue + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_CONTEXT_ID" , + dest, "in_DECOD_"+toString(i)+"_CONTEXT_ID" ); + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_ADDRESS_SRC" , + dest, "in_DECOD_"+toString(i)+"_ADDRESS_SRC" ); + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_ADDRESS_DEST" , + dest, "in_DECOD_"+toString(i)+"_ADDRESS_DEST" ); + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_CONDITION" , + dest, "in_DECOD_"+toString(i)+"_CONDITION" ); + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_LAST_TAKE" , + dest, "in_DECOD_"+toString(i)+"_LAST_TAKE" ); + PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_MISS_PREDICTION", + dest, "in_DECOD_"+toString(i)+"_MISS_PREDICTION"); + + if (_param->_have_component_victim) + { + uint32_t j = _param->_nb_inst_predict+i; + + dest = _name+"_victim"; +#ifdef POSITION + _component->interface_map (src ,"decod_"+toString(i), + dest,"access_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_HIT" , + dest, "in_ACCESS_"+toString(j)+"_HIT" ); + COMPONENT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_HIT_INDEX", + dest, "in_ACCESS_"+toString(j)+"_ENTITY"); + COMPONENT_MAP(_component,src , "in_DECOD_"+toString(i)+"_VICTIM" , + dest,"out_ACCESS_"+toString(j)+"_VICTIM"); + } + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(i), + dest,"update_"+toString(i)); +#endif + + // in_UPDATE_VAL -> glue + //out_UPDATE_ACK -> glue + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_CONTEXT_ID" , + dest, "in_UPDATE_"+toString(i)+"_CONTEXT_ID" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_ADDRESS_SRC" , + dest, "in_UPDATE_"+toString(i)+"_ADDRESS_SRC" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_ADDRESS_DEST" , + dest, "in_UPDATE_"+toString(i)+"_ADDRESS_DEST" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_CONDITION" , + dest, "in_UPDATE_"+toString(i)+"_CONDITION" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_LAST_TAKE" , + dest, "in_UPDATE_"+toString(i)+"_LAST_TAKE" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_MISS_PREDICTION", + dest, "in_UPDATE_"+toString(i)+"_MISS_PREDICTION"); + + if (_param->_have_component_victim) + { + uint32_t j = _param->_nb_inst_predict+_param->_nb_inst_decod+i; + + dest = _name+"_victim"; +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(i), + dest,"access_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_HIT" , + dest, "in_ACCESS_"+toString(j)+"_HIT" ); + COMPONENT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_HIT_INDEX", + dest, "in_ACCESS_"+toString(j)+"_ENTITY"); + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_VICTIM" , + dest,"out_ACCESS_"+toString(j)+"_VICTIM"); + } + } + } + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _component->test_map(); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp (revision 78) @@ -0,0 +1,84 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::deallocation" + void Branch_Target_Buffer::deallocation (void) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + if (_param->_have_port_context_id) + delete [] in_PREDICT_CONTEXT_ID ; + delete [] in_PREDICT_ADDRESS ; + delete [] out_PREDICT_HIT ; + delete [] out_PREDICT_ADDRESS_SRC ; + delete [] out_PREDICT_ADDRESS_DEST ; + delete [] out_PREDICT_CONDITION ; + delete [] out_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_IS_ACCURATE ; + + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + if (_param->_have_port_context_id) + delete [] in_DECOD_CONTEXT_ID ; + delete [] in_DECOD_ADDRESS_SRC ; + delete [] in_DECOD_ADDRESS_DEST ; + delete [] in_DECOD_CONDITION ; + delete [] in_DECOD_LAST_TAKE ; + delete [] in_DECOD_MISS_PREDICTION ; + + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + if (_param->_have_port_context_id) + delete [] in_UPDATE_CONTEXT_ID ; + delete [] in_UPDATE_ADDRESS_SRC ; + delete [] in_UPDATE_ADDRESS_DEST ; + delete [] in_UPDATE_CONDITION ; + delete [] in_UPDATE_LAST_TAKE ; + delete [] in_UPDATE_MISS_PREDICTION; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + if (_param->_have_component_victim) + { + delete [] _component_sort; + delete _component_victim; + } + delete _component_branch_target_buffer_glue; + delete _component_branch_target_buffer_register; + + delete _component; + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::end_cycle" +void Branch_Target_Buffer::end_cycle () + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_statistics_allocation.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::statistics_allocation" + void Branch_Target_Buffer::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Branch_Target_Buffer", + param_statistics); + + if (_param->_have_component_victim) + { + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + _stat->add_stat(_component_sort [i]->_stat); + _stat->add_stat(_component_victim ->_stat); + } + _stat->add_stat(_component_branch_target_buffer_glue ->_stat); + _stat->add_stat(_component_branch_target_buffer_register->_stat); + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::statistics_deallocation" + void Branch_Target_Buffer::statistics_deallocation (void) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + log_printf(INFO,Branch_Target_Buffer,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_transition.cpp (revision 78) @@ -0,0 +1,43 @@ +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::transition" + void Branch_Target_Buffer::transition (void) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_vhdl.cpp (revision 78) @@ -0,0 +1,47 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Branch_Target_Buffer.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::vhdl" + void Branch_Target_Buffer::vhdl (void) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters.cpp (revision 78) @@ -0,0 +1,134 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::Parameters" + Parameters::Parameters (uint32_t nb_context , + uint32_t * nb_instruction , + uint32_t size_buffer , + uint32_t associativity , + uint32_t size_address , + uint32_t size_counter , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update , + Tvictim_t victim_scheme ) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + _nb_context = nb_context ; + _nb_instruction = nb_instruction ; + _size_buffer = size_buffer ; + _associativity = associativity ; + _size_address = size_address ; + _size_counter = size_counter ; + _nb_inst_predict = nb_inst_predict; + _nb_inst_decod = nb_inst_decod ; + _nb_inst_update = nb_inst_update ; + _victim_scheme = victim_scheme ; + + _size_bank = size_buffer/associativity; + _size_context_id = log2(nb_context); + _size_victim = log2(associativity); + + _have_port_context_id = (_size_context_id > 0); + _have_component_victim = (_size_victim > 0); + _is_full_associative = _size_bank == 1; + uint32_t nb_access = nb_inst_predict + nb_inst_decod + nb_inst_update; + + if (_have_component_victim) + { + _param_sort = new morpheo::behavioural::generic::sort::Parameters + (_associativity, // nb_input + 1 , // nb_output + true , // ascending + _size_victim , // size_data + true , // have_port_index_out + false // have_port_data_out + ); + + _param_victim = new morpheo::behavioural::generic::victim::Parameters + (_victim_scheme, //victim_scheme + _associativity, //nb_entity + _size_bank , //nb_entry + nb_access , //nb_access + false //table_global + ); + } + + _param_branch_target_buffer_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters + ( + max(_nb_instruction, _nb_context), + _size_buffer , + _associativity , + _size_address , + _nb_inst_predict , + _nb_inst_decod , + _nb_inst_update ); + + _param_branch_target_buffer_register = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters + (_nb_context , + _nb_instruction , + _size_buffer , + _associativity , + _size_address , + _size_counter , + _nb_inst_predict, + _nb_inst_decod , + _nb_inst_update ); + + test(); + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Branch_Target_Buffer::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + if (_have_component_victim) + { + delete _param_sort; + delete _param_victim; + } + + delete _param_branch_target_buffer_glue; + delete _param_branch_target_buffer_register; + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,41 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + Parameters_test test ("Branch_Target_Buffer"); + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + + return test; + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,75 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace branch_target_buffer { + + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + XML xml ("branch_target_buffer"); + + xml.balise_open("branch_target_buffer"); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("size_buffer "); xml.attribut("value",toString(_size_buffer )); xml.singleton_end(); + xml.singleton_begin("associativity "); xml.attribut("value",toString(_associativity )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("size_counter "); xml.attribut("value",toString(_size_counter )); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict"); xml.attribut("value",toString(_nb_inst_predict)); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + xml.singleton_begin("victim_scheme "); xml.attribut("value",toString(_victim_scheme )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_context; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction [i])); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Branch_Target_Buffer::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::Parameters & x) + { + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Branch_Target_Buffer,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace branch_target_buffer +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libDirection_Glue.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Direction_Glue = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Direction_Glue_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue + +#-----[ Library ]------------------------------------------ + +Direction_Glue_LIBRARY = -lDirection_Glue \ + $(Behavioural_LIBRARY) + +Direction_Glue_DIR_LIBRARY = -L$(Direction_Glue_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Direction_Glue_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Direction_Glue_DIR) --makefile=Makefile; + +Direction_Glue_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Direction_Glue_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Direction_Glue_LIBRARY) + +DIR_LIBRARY = $(Direction_Glue_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Direction_Glue_library + +library_clean : Direction_Glue_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,6 @@ +Direction_Glue +0 8 +1 # predictor_scheme +1 4 *4 # nb_inst_predict +1 4 *4 # nb_inst_update +32 32 *4 # size_address +1 4 *4 # size_history Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,69 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/include/test.h" + +#define NB_PARAMS 5 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * predictor_scheme (Tpredictor_t)\n")); + err (_(" * nb_inst_predict (uint32_t )\n")); + err (_(" * nb_inst_update (uint32_t )\n")); + err (_(" * size_address (uint32_t )\n")); + err (_(" * size_history (uint32_t )\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + Tpredictor_t _predictor_scheme = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_update = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + uint32_t _size_history = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters + (_predictor_scheme, + _nb_inst_predict , + _nb_inst_update , + _size_address , + _size_history ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,310 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/BitManipulation.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Direction_Glue * _Direction_Glue = new Direction_Glue (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS_SRC ," in_PREDICT_ADDRESS_SRC ",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_STATIC ," in_PREDICT_STATIC ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_LAST_TAKE ," in_PREDICT_LAST_TAKE ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HISTORY ,"out_PREDICT_HISTORY ",Thistory_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIRECTION ,"out_PREDICT_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_PREDICTOR_VAL ,"out_PREDICT_PREDICTOR_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_PREDICTOR_ACK ," in_PREDICT_PREDICTOR_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_PREDICTOR_ADDRESS_SRC,"out_PREDICT_PREDICTOR_ADDRESS_SRC",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_PREDICTOR_HISTORY ," in_PREDICT_PREDICTOR_HISTORY ",Thistory_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_PREDICTOR_DIRECTION ," in_PREDICT_PREDICTOR_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_HISTORY ," in_UPDATE_HISTORY ",Thistory_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_DIRECTION ," in_UPDATE_DIRECTION ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_PREDICTOR_VAL ,"out_UPDATE_PREDICTOR_VAL ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_PREDICTOR_ACK ," in_UPDATE_PREDICTOR_ACK ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_PREDICTOR_ADDRESS ,"out_UPDATE_PREDICTOR_ADDRESS ",Taddress_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_PREDICTOR_HISTORY ,"out_UPDATE_PREDICTOR_HISTORY ",Thistory_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_PREDICTOR_DIRECTION ,"out_UPDATE_PREDICTOR_DIRECTION ",Tcontrol_t,_param->_nb_inst_update); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Direction_Glue.\n"),name.c_str()); + + (*(_Direction_Glue->in_CLOCK)) (*(in_CLOCK)); + (*(_Direction_Glue->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_PREDICT_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_STATIC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_LAST_TAKE ,_param->_nb_inst_predict); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_PREDICT_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + if (_param->_have_component_meta_predictor) + { + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_PREDICT_PREDICTOR_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_PREDICTOR_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_PREDICT_PREDICTOR_ADDRESS_SRC,_param->_nb_inst_predict); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_PREDICTOR_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_PREDICT_PREDICTOR_DIRECTION ,_param->_nb_inst_predict); + } + + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_UPDATE_VAL ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_UPDATE_ACK ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_UPDATE_ADDRESS ,_param->_nb_inst_update ); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_UPDATE_HISTORY ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_UPDATE_DIRECTION ,_param->_nb_inst_update ); + if (_param->_have_component_meta_predictor) + { + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_UPDATE_PREDICTOR_VAL ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Direction_Glue, in_UPDATE_PREDICTOR_ACK ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_UPDATE_PREDICTOR_ADDRESS ,_param->_nb_inst_update ); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_UPDATE_PREDICTOR_HISTORY ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Direction_Glue,out_UPDATE_PREDICTOR_DIRECTION ,_param->_nb_inst_update ); + } + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_inst_predict; i++) + { + in_PREDICT_VAL [i]->write(rand()%2); + in_PREDICT_ADDRESS_SRC [i]->write(range(rand(),_param->_size_address)); + in_PREDICT_STATIC [i]->write(rand()%2); + in_PREDICT_LAST_TAKE [i]->write(rand()%2); + in_PREDICT_PREDICTOR_ACK [i]->write(rand()%2); + in_PREDICT_PREDICTOR_HISTORY [i]->write(range(rand(),_param->_size_history)); + in_PREDICT_PREDICTOR_DIRECTION [i]->write(rand()%2); + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + in_UPDATE_VAL [i]->write(rand()%2); + in_UPDATE_ADDRESS [i]->write(range(rand(),_param->_size_address)); + in_UPDATE_HISTORY [i]->write(range(rand(),_param->_size_history)); + in_UPDATE_DIRECTION [i]->write(rand()%2); + in_UPDATE_PREDICTOR_ACK [i]->write(rand()%2); + } + + SC_START(0); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + switch (_param->_predictor_scheme) + { + case PREDICTOR_NEVER_TAKE : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), 0); + break; + } + case PREDICTOR_ALWAYS_TAKE : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), 1); + break; + } + case PREDICTOR_STATIC : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), in_PREDICT_STATIC [i]->read()); + break; + } + case PREDICTOR_LAST_TAKE : + { + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), in_PREDICT_LAST_TAKE [i]->read()); + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), in_PREDICT_PREDICTOR_ACK [i]->read()); + TEST(Thistory_t,out_PREDICT_HISTORY [i]->read(), in_PREDICT_PREDICTOR_HISTORY [i]->read()); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), in_PREDICT_PREDICTOR_DIRECTION [i]->read()); + TEST(Tcontrol_t,out_PREDICT_PREDICTOR_VAL [i]->read(), in_PREDICT_VAL [i]->read()); + TEST(Taddress_t,out_PREDICT_PREDICTOR_ADDRESS_SRC [i]->read(), in_PREDICT_ADDRESS_SRC [i]->read()); + + break; + } + default : + { + break; + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + + + switch (_param->_predictor_scheme) + { + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + TEST(Tcontrol_t,out_UPDATE_ACK [i]->read(), in_UPDATE_PREDICTOR_ACK [i]->read()); + TEST(Tcontrol_t,out_UPDATE_PREDICTOR_VAL [i]->read(), in_UPDATE_VAL [i]->read()); + TEST(Taddress_t,out_UPDATE_PREDICTOR_ADDRESS [i]->read(), in_UPDATE_ADDRESS [i]->read()); + TEST(Thistory_t,out_UPDATE_PREDICTOR_HISTORY [i]->read(), in_UPDATE_HISTORY [i]->read()); + TEST(Tcontrol_t,out_UPDATE_PREDICTOR_DIRECTION [i]->read(), in_UPDATE_DIRECTION [i]->read()); + + break; + } + case PREDICTOR_NEVER_TAKE : + case PREDICTOR_ALWAYS_TAKE : + case PREDICTOR_STATIC : + case PREDICTOR_LAST_TAKE : + default : + { + TEST(Tcontrol_t,out_UPDATE_ACK [i]->read(), 1); + + break; + } + } + } + + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS_SRC ; + delete [] in_PREDICT_STATIC ; + delete [] in_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_HISTORY ; + delete [] out_PREDICT_DIRECTION ; + delete [] out_PREDICT_PREDICTOR_VAL ; + delete [] in_PREDICT_PREDICTOR_ACK ; + delete [] out_PREDICT_PREDICTOR_ADDRESS_SRC; + delete [] in_PREDICT_PREDICTOR_HISTORY ; + delete [] in_PREDICT_PREDICTOR_DIRECTION ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_ADDRESS ; + delete [] in_UPDATE_HISTORY ; + delete [] in_UPDATE_DIRECTION ; + delete [] out_UPDATE_PREDICTOR_VAL ; + delete [] in_UPDATE_PREDICTOR_ACK ; + delete [] out_UPDATE_PREDICTOR_ADDRESS ; + delete [] out_UPDATE_PREDICTOR_HISTORY ; + delete [] out_UPDATE_PREDICTOR_DIRECTION ; +#endif + + delete _Direction_Glue; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/Direction_Glue.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/Direction_Glue.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/Direction_Glue.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Direction_Glue} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h (revision 78) @@ -0,0 +1,162 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_direction_glue_Direction_Glue_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_direction_glue_Direction_Glue_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + + class Direction_Glue +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PREDICT_VAL ; + public : SC_OUT(Tcontrol_t) ** out_PREDICT_ACK ; + public : SC_IN (Taddress_t) ** in_PREDICT_ADDRESS_SRC ; + public : SC_IN (Tcontrol_t) ** in_PREDICT_STATIC ; + public : SC_IN (Tcontrol_t) ** in_PREDICT_LAST_TAKE ; + public : SC_OUT(Thistory_t) ** out_PREDICT_HISTORY ; + public : SC_OUT(Tcontrol_t) ** out_PREDICT_DIRECTION ; + + public : SC_OUT(Tcontrol_t) ** out_PREDICT_PREDICTOR_VAL ; + public : SC_IN (Tcontrol_t) ** in_PREDICT_PREDICTOR_ACK ; + public : SC_OUT(Taddress_t) ** out_PREDICT_PREDICTOR_ADDRESS_SRC; + public : SC_IN (Thistory_t) ** in_PREDICT_PREDICTOR_HISTORY ; + public : SC_IN (Tcontrol_t) ** in_PREDICT_PREDICTOR_DIRECTION ; + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; + public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ; + public : SC_IN (Thistory_t) ** in_UPDATE_HISTORY ; + public : SC_IN (Tcontrol_t) ** in_UPDATE_DIRECTION ; + + public : SC_OUT(Tcontrol_t) ** out_UPDATE_PREDICTOR_VAL ; + public : SC_IN (Tcontrol_t) ** in_UPDATE_PREDICTOR_ACK ; + public : SC_OUT(Taddress_t) ** out_UPDATE_PREDICTOR_ADDRESS ; + public : SC_OUT(Thistory_t) ** out_UPDATE_PREDICTOR_HISTORY ; + public : SC_OUT(Tcontrol_t) ** out_UPDATE_PREDICTOR_DIRECTION; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Direction_Glue); +#endif + public : Direction_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Direction_Glue (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif + public : void genMealy_predict (void); + public : void genMealy_update (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h (revision 78) @@ -0,0 +1,63 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_direction_glue_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_direction_glue_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : Tpredictor_t _predictor_scheme; + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_update ; + public : uint32_t _size_address ; + public : uint32_t _size_history ; + + public : bool _have_component_meta_predictor; + public : bool _have_port_history; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (Tpredictor_t predictor_scheme, + uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + uint32_t size_history ); + // public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters & x); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Types.h (revision 78) @@ -0,0 +1,33 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_direction_glue_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_direction_glue_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue.cpp (revision 78) @@ -0,0 +1,260 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::Direction_Glue" + Direction_Glue::Direction_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Direction_Glue,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Direction_Glue,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Direction_Glue,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + bool need_genmealy_predict = true; + bool need_genmealy_update = true; + + // Constant + if (not _param->_have_component_meta_predictor) + { + // no need update + need_genmealy_update = false; + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + PORT_WRITE(out_UPDATE_ACK [i], 1); + + // always ack + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + PORT_WRITE(out_PREDICT_ACK [i], 1); + + // constant direction : never / always + switch (_param->_predictor_scheme) + { + case PREDICTOR_NEVER_TAKE : + { + need_genmealy_predict = false; + PORT_WRITE(out_PREDICT_DIRECTION [i], 0); + break; + } + case PREDICTOR_ALWAYS_TAKE : + { + need_genmealy_predict = false; + PORT_WRITE(out_PREDICT_DIRECTION [i], 1); + break; + } + default : break; + } + } + } + +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + log_printf(INFO,Direction_Glue,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif +# endif + + if (need_genmealy_predict) + { + log_printf(INFO,Direction_Glue,FUNCTION,"Method - genMealy_predict"); + + SC_METHOD (genMealy_predict); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + switch (_param->_predictor_scheme) + { + case PREDICTOR_STATIC : + { + sensitive << (*(in_PREDICT_STATIC [i])); + break; + } + case PREDICTOR_LAST_TAKE : + { + sensitive << (*(in_PREDICT_LAST_TAKE [i])); + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + sensitive << (*(in_PREDICT_VAL [i])) + << (*(in_PREDICT_ADDRESS_SRC [i])) + << (*(in_PREDICT_PREDICTOR_ACK [i])) + << (*(in_PREDICT_PREDICTOR_HISTORY [i])) + << (*(in_PREDICT_PREDICTOR_DIRECTION [i])); + break; + } + default : + { + break; + } + } + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + + switch (_param->_predictor_scheme) + { + case PREDICTOR_STATIC : + { + (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_STATIC [i])); + + break; + } + case PREDICTOR_LAST_TAKE : + { + (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_LAST_TAKE [i])); + + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + (*(out_PREDICT_ACK [i])) (*(in_PREDICT_PREDICTOR_ACK [i])); + (*(out_PREDICT_HISTORY [i])) (*(in_PREDICT_PREDICTOR_HISTORY [i])); + (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_PREDICTOR_DIRECTION [i])); + (*(out_PREDICT_PREDICTOR_VAL [i])) (*(in_PREDICT_VAL [i])); + (*(out_PREDICT_PREDICTOR_ADDRESS_SRC [i])) (*(in_PREDICT_ADDRESS_SRC [i])); + + break; + } + default : + { + break; + } + } + } +# endif + } + + if (need_genmealy_update) + { + log_printf(INFO,Direction_Glue,FUNCTION,"Method - genMealy_update"); + + SC_METHOD (genMealy_update); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + sensitive << (*(in_UPDATE_VAL [i])) + << (*(in_UPDATE_PREDICTOR_ACK [i])) + << (*(in_UPDATE_ADDRESS [i])) + << (*(in_UPDATE_HISTORY [i])) + << (*(in_UPDATE_DIRECTION [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + (*(out_UPDATE_PREDICTOR_VAL [i])) (*(in_UPDATE_VAL [i])); + (*(out_UPDATE_ACK [i])) (*(in_UPDATE_PREDICTOR_ACK [i])); + (*(out_UPDATE_PREDICTOR_ADDRESS [i])) (*(in_UPDATE_ADDRESS [i])); + (*(out_UPDATE_PREDICTOR_HISTORY [i])) (*(in_UPDATE_HISTORY [i])); + (*(out_UPDATE_PREDICTOR_DIRECTION [i])) (*(in_UPDATE_DIRECTION [i])); + } +# endif + } +#endif + } + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Direction_Glue::~Direction_Glue" + Direction_Glue::~Direction_Glue (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Direction_Glue,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_allocation.cpp (revision 78) @@ -0,0 +1,116 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::allocation" + void Direction_Glue::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Direction_Glue" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN, SOUTH, "predict's interface", _param->_nb_inst_predict); + + ALLOC1_SIGNAL_IN ( in_PREDICT_VAL ,"val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_ACK ,"ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_STATIC ,"static" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_LAST_TAKE ,"last_take" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_HISTORY ,"history" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIRECTION ,"direction" ,Tcontrol_t,1); + if (_param->_have_component_meta_predictor) + { + ALLOC1_SIGNAL_OUT(out_PREDICT_PREDICTOR_VAL ,"predictor_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_PREDICTOR_ACK ,"predictor_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_PREDICTOR_ADDRESS_SRC,"predictor_address_src",Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_PREDICTOR_HISTORY ,"predictor_history" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_PREDICT_PREDICTOR_DIRECTION ,"predictor_direction" ,Tcontrol_t,1); + } + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update", IN, SOUTH, "update's interface", _param->_nb_inst_update); + + ALLOC1_SIGNAL_IN ( in_UPDATE_VAL ,"val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_ACK ,"ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS ,"address" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_HISTORY ,"history" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_UPDATE_DIRECTION ,"direction" ,Tcontrol_t,1); + if (_param->_have_component_meta_predictor) + { + ALLOC1_SIGNAL_OUT(out_UPDATE_PREDICTOR_VAL ,"predictor_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_PREDICTOR_ACK ,"predictor_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_PREDICTOR_ADDRESS ,"predictor_address" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_UPDATE_PREDICTOR_HISTORY ,"predictor_history" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_OUT(out_UPDATE_PREDICTOR_DIRECTION,"predictor_direction",Tcontrol_t,1); + } + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_deallocation.cpp (revision 78) @@ -0,0 +1,79 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::deallocation" + void Direction_Glue::deallocation (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS_SRC ; + delete [] in_PREDICT_STATIC ; + delete [] in_PREDICT_LAST_TAKE ; + if (_param->_have_port_history) + delete [] out_PREDICT_HISTORY ; + delete [] out_PREDICT_DIRECTION ; + if (_param->_have_component_meta_predictor) + { + delete [] out_PREDICT_PREDICTOR_VAL ; + delete [] in_PREDICT_PREDICTOR_ACK ; + delete [] out_PREDICT_PREDICTOR_ADDRESS_SRC; + if (_param->_have_port_history) + delete [] in_PREDICT_PREDICTOR_HISTORY ; + delete [] in_PREDICT_PREDICTOR_DIRECTION ; + } + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_ADDRESS ; + if (_param->_have_port_history) + delete [] in_UPDATE_HISTORY ; + delete [] in_UPDATE_DIRECTION ; + if (_param->_have_component_meta_predictor) + { + delete [] out_UPDATE_PREDICTOR_VAL ; + delete [] in_UPDATE_PREDICTOR_ACK ; + delete [] out_UPDATE_PREDICTOR_ADDRESS ; + if (_param->_have_port_history) + delete [] out_UPDATE_PREDICTOR_HISTORY ; + delete [] out_UPDATE_PREDICTOR_DIRECTION; + } + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::end_cycle" +void Direction_Glue::end_cycle () + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_predict.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_predict.cpp (revision 78) @@ -0,0 +1,85 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::genMealy_predict" + void Direction_Glue::genMealy_predict (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + // constant direction : never / always + switch (_param->_predictor_scheme) + { + case PREDICTOR_STATIC : + { + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + PORT_WRITE(out_PREDICT_DIRECTION [i], PORT_READ(in_PREDICT_STATIC [i])); + + break; + } + case PREDICTOR_LAST_TAKE : + { + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + PORT_WRITE(out_PREDICT_DIRECTION [i], PORT_READ(in_PREDICT_LAST_TAKE [i])); + + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + // not use : + // in_PREDICT_LAST_TAKE + // in_PREDICT_STATIC + + PORT_WRITE(out_PREDICT_PREDICTOR_VAL [i], PORT_READ(in_PREDICT_VAL [i])); + PORT_WRITE(out_PREDICT_ACK [i], PORT_READ(in_PREDICT_PREDICTOR_ACK [i])); + PORT_WRITE(out_PREDICT_PREDICTOR_ADDRESS_SRC [i], PORT_READ(in_PREDICT_ADDRESS_SRC [i])); + PORT_WRITE(out_PREDICT_HISTORY [i], PORT_READ(in_PREDICT_PREDICTOR_HISTORY [i])); + PORT_WRITE(out_PREDICT_DIRECTION [i], PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [i])); + } + + break; + } + default : + { + ERRORMORPHEO(FUNCTION,"No valid predictor scheme"); + break; + } + } + + + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_update.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_update.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_update.cpp (revision 78) @@ -0,0 +1,47 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::genMealy_update" + void Direction_Glue::genMealy_update (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + PORT_WRITE(out_UPDATE_PREDICTOR_VAL [i], PORT_READ(in_UPDATE_VAL [i])); + PORT_WRITE(out_UPDATE_ACK [i], PORT_READ(in_UPDATE_PREDICTOR_ACK [i])); + PORT_WRITE(out_UPDATE_PREDICTOR_ADDRESS [i], PORT_READ(in_UPDATE_ADDRESS [i])); + PORT_WRITE(out_UPDATE_PREDICTOR_HISTORY [i], PORT_READ(in_UPDATE_HISTORY [i])); + PORT_WRITE(out_UPDATE_PREDICTOR_DIRECTION [i], PORT_READ(in_UPDATE_DIRECTION [i])); + } + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_statistics_allocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::statistics_allocation" + void Direction_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Direction_Glue", + param_statistics); + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::statistics_deallocation" + void Direction_Glue::statistics_deallocation (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Direction_Glue,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_transition.cpp (revision 78) @@ -0,0 +1,42 @@ +#ifdef SYSTEMC +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::transition" + void Direction_Glue::transition (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + end_cycle (); + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::vhdl" + void Direction_Glue::vhdl (void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::vhdl_body" + void Direction_Glue::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::vhdl_declaration" + void Direction_Glue::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters.cpp (revision 78) @@ -0,0 +1,88 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + +#undef FUNCTION +#define FUNCTION "Direction_Glue::Parameters" + Parameters::Parameters (Tpredictor_t predictor_scheme, + uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + uint32_t size_history ) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + _predictor_scheme = predictor_scheme; + _nb_inst_predict = nb_inst_predict ; + _nb_inst_update = nb_inst_update ; + _size_address = size_address ; + + switch (predictor_scheme) + { + case PREDICTOR_NEVER_TAKE : + case PREDICTOR_ALWAYS_TAKE : + case PREDICTOR_STATIC : + case PREDICTOR_LAST_TAKE : + { + _have_component_meta_predictor = false; + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + _have_component_meta_predictor = true; + break; + } + } + + _size_history = (_have_component_meta_predictor)?size_history:0; + + _have_port_history = (_size_history>0); + + test(); + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Direction_Glue::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Direction_Glue,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Direction_Glue::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,43 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + Parameters_test test ("Direction_Glue"); + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + + return test; + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,64 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace direction_glue { + + +#undef FUNCTION +#define FUNCTION "Direction_Glue::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + XML xml ("direction_glue"); + + xml.balise_open("direction_glue"); + xml.singleton_begin("predictor_scheme"); xml.attribut("value",toString(_predictor_scheme)); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict "); xml.attribut("value",toString(_nb_inst_predict )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("size_history "); xml.attribut("value",toString(_size_history )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Direction_Glue::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters & x) + { + log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace direction_glue +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libDirection.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.deps (revision 78) @@ -0,0 +1,52 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Direction = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Direction_Glue +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.deps +endif +#ifndef Meta_Predictor +#include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Makefile.deps +#endif + +#-----[ Directory ]---------------------------------------- + +Direction_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction + +#-----[ Library ]------------------------------------------ + +Direction_LIBRARY = -lDirection \ + $(Behavioural_LIBRARY) \ + $(Direction_Glue_LIBRARY) +# $(Meta_Predictor_LIBRARY) + +Direction_DIR_LIBRARY = -L$(Direction_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) \ + $(Direction_Glue_DIR_LIBRARY) +# $(Meta_Predictor_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Direction_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Direction_Glue_library; \ + $(MAKE) --directory=$(Direction_DIR) --makefile=Makefile; +# $(MAKE) Meta_Predictor_library; \ + +Direction_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Direction_Glue_library_clean; \ + $(MAKE) --directory=$(Direction_DIR) --makefile=Makefile clean; +# $(MAKE) Meta_Predictor_library_clean; \ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Direction_LIBRARY) + +DIR_LIBRARY = $(Direction_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Direction_library + +library_clean : Direction_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,26 @@ +Direction +0 3 +1 # _predictor_scheme +1 4 *4 # _nb_inst_predict +1 4 *4 # _nb_inst_update +32 32 *2 # _size_address +1 1 +1 # _predictor_0_have_bht +1 1 +1 # _predictor_0_bht_size_shifter +1 1 +1 # _predictor_0_bht_nb_shifter +1 1 +1 # _predictor_0_have_pht +1 1 +1 # _predictor_0_pht_size_counter +1 1 +1 # _predictor_0_pht_nb_counter +1 1 +1 # _predictor_0_pht_size_address_share +1 1 +1 # _predictor_1_have_bht +1 1 +1 # _predictor_1_bht_size_shifter +1 1 +1 # _predictor_1_bht_nb_shifter +1 1 +1 # _predictor_1_have_pht +1 1 +1 # _predictor_1_pht_size_counter +1 1 +1 # _predictor_1_pht_nb_counter +1 1 +1 # _predictor_1_pht_size_address_share +1 1 +1 # _predictor_2_have_bht +1 1 +1 # _predictor_2_bht_size_shifter +1 1 +1 # _predictor_2_bht_nb_shifter +1 1 +1 # _predictor_2_have_pht +1 1 +1 # _predictor_2_pht_size_counter +1 1 +1 # _predictor_2_pht_nb_counter +1 1 +1 # _predictor_2_pht_size_address_share Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,99 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/include/test.h" + +#define NB_PARAMS 25 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * predictor_scheme (Tpredictor_t)\n")); + err (_(" * nb_inst_predict (uint32_t )\n")); + err (_(" * nb_inst_update (uint32_t )\n")); + err (_(" * size_address (uint32_t )\n")); + err (_(" * have_bht [3] (bool )\n")); + err (_(" * bht_size_shifter [3] (uint32_t )\n")); + err (_(" * bht_nb_shifter [3] (uint32_t )\n")); + err (_(" * have_pht [3] (bool )\n")); + err (_(" * pht_size_counter [3] (uint32_t )\n")); + err (_(" * pht_nb_counter [3] (uint32_t )\n")); + err (_(" * pht_size_address_share [3] (uint32_t )\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + Tpredictor_t _predictor_scheme = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_update = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + bool _have_bht [3]; + uint32_t _bht_size_shifter [3]; + uint32_t _bht_nb_shifter [3]; + bool _have_pht [3]; + uint32_t _pht_size_counter [3]; + uint32_t _pht_nb_counter [3]; + uint32_t _pht_size_address_share [3]; + + for (uint32_t i=0; i<3; i++) + { + _have_bht [i] = fromString(argv[x++]); + _bht_size_shifter [i] = fromString(argv[x++]); + _bht_nb_shifter [i] = fromString(argv[x++]); + _have_pht [i] = fromString(argv[x++]); + _pht_size_counter [i] = fromString(argv[x++]); + _pht_nb_counter [i] = fromString(argv[x++]); + _pht_size_address_share [i] = fromString(argv[x++]); + } + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters + (_predictor_scheme , + _nb_inst_predict , + _nb_inst_update , + _size_address , + _have_bht , + _bht_size_shifter , + _bht_nb_shifter , + _have_pht , + _pht_size_counter , + _pht_nb_counter , + _pht_size_address_share); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,257 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/BitManipulation.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Direction * _Direction = new Direction (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS_SRC ," in_PREDICT_ADDRESS_SRC ",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_STATIC ," in_PREDICT_STATIC ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_LAST_TAKE ," in_PREDICT_LAST_TAKE ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HISTORY ,"out_PREDICT_HISTORY ",Thistory_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIRECTION ,"out_PREDICT_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_HISTORY ," in_UPDATE_HISTORY ",Thistory_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_DIRECTION ," in_UPDATE_DIRECTION ",Tcontrol_t,_param->_nb_inst_update); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Direction.\n"),name.c_str()); + + (*(_Direction->in_CLOCK)) (*(in_CLOCK)); + (*(_Direction->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Direction, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction,out_PREDICT_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction, in_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction, in_PREDICT_STATIC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction, in_PREDICT_LAST_TAKE ,_param->_nb_inst_predict); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Direction,out_PREDICT_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction,out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Direction, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Direction,out_UPDATE_ACK ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Direction, in_UPDATE_ADDRESS ,_param->_nb_inst_update); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Direction, in_UPDATE_HISTORY ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Direction, in_UPDATE_DIRECTION ,_param->_nb_inst_update); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_inst_predict; i++) + { + in_PREDICT_VAL [i]->write(rand()%2); + in_PREDICT_ADDRESS_SRC [i]->write(range(rand(),_param->_size_address)); + in_PREDICT_STATIC [i]->write(rand()%2); + in_PREDICT_LAST_TAKE [i]->write(rand()%2); + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + in_UPDATE_VAL [i]->write(rand()%2); + in_UPDATE_ADDRESS [i]->write(range(rand(),_param->_size_address)); + in_UPDATE_HISTORY [i]->write(range(rand(),_param->_size_history)); + in_UPDATE_DIRECTION [i]->write(rand()%2); + } + + SC_START(0); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + switch (_param->_predictor_scheme) + { + case PREDICTOR_NEVER_TAKE : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), 0); + break; + } + case PREDICTOR_ALWAYS_TAKE : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), 1); + break; + } + case PREDICTOR_STATIC : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), in_PREDICT_STATIC [i]->read()); + break; + } + case PREDICTOR_LAST_TAKE : + { + TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(), 1); + TEST(Tcontrol_t,out_PREDICT_DIRECTION [i]->read(), in_PREDICT_LAST_TAKE [i]->read()); + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + break; + } + default : + { + break; + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + + + switch (_param->_predictor_scheme) + { + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + break; + } + case PREDICTOR_NEVER_TAKE : + case PREDICTOR_ALWAYS_TAKE : + case PREDICTOR_STATIC : + case PREDICTOR_LAST_TAKE : + default : + { + TEST(Tcontrol_t,out_UPDATE_ACK [i]->read(), 1); + break; + } + } + } + + SC_START(1); + + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS_SRC ; + delete [] in_PREDICT_STATIC ; + delete [] in_PREDICT_LAST_TAKE ; + delete [] out_PREDICT_HISTORY ; + delete [] out_PREDICT_DIRECTION ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_ADDRESS ; + delete [] in_UPDATE_HISTORY ; + delete [] in_UPDATE_DIRECTION ; + +#endif + + delete _Direction; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/Direction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/Direction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/Direction.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Direction} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h (revision 78) @@ -0,0 +1,145 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_Direction_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_Direction_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + class Direction +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PREDICT_VAL ; + public : SC_OUT(Tcontrol_t) ** out_PREDICT_ACK ; + public : SC_IN (Taddress_t) ** in_PREDICT_ADDRESS_SRC; + public : SC_IN (Tcontrol_t) ** in_PREDICT_STATIC ; + public : SC_IN (Tcontrol_t) ** in_PREDICT_LAST_TAKE ; + public : SC_OUT(Thistory_t) ** out_PREDICT_HISTORY ; + public : SC_OUT(Tcontrol_t) ** out_PREDICT_DIRECTION ; + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; + public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ; + public : SC_IN (Thistory_t) ** in_UPDATE_HISTORY ; + public : SC_IN (Tcontrol_t) ** in_UPDATE_DIRECTION ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Direction_Glue * _component_glue; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Direction); +#endif + public : Direction + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Direction (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif +#endif + +#if VHDL + public : void vhdl (void); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h (revision 78) @@ -0,0 +1,80 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_direction_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Parameters.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : Tpredictor_t _predictor_scheme ; + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_update ; + public : uint32_t _size_address ; + public : bool _have_bht [3]; + public : uint32_t _bht_size_shifter [3]; + public : uint32_t _bht_nb_shifter [3]; + public : bool _have_pht [3]; + public : uint32_t _pht_size_counter [3]; + public : uint32_t _pht_nb_counter [3]; + public : uint32_t _pht_size_address_share [3]; + + public : uint32_t _size_history; + + public : bool _have_component_meta_predictor; + public : bool _have_port_history; + + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters * _param_glue; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (Tpredictor_t predictor_scheme , + uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + bool have_bht [3], + uint32_t bht_size_shifter [3], + uint32_t bht_nb_shifter [3], + bool have_pht [3], + uint32_t pht_size_counter [3], + uint32_t pht_nb_counter [3], + uint32_t pht_size_address_share [3]); + +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters & x); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction.cpp (revision 78) @@ -0,0 +1,111 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::Direction" + Direction::Direction + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + log_printf(INFO,Direction,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Direction,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Direction,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Direction,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Direction::~Direction" + Direction::~Direction (void) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Direction,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_allocation.cpp (revision 78) @@ -0,0 +1,195 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + + +#undef FUNCTION +#define FUNCTION "Direction::allocation" + void Direction::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Direction" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN, SOUTH, "Interface predict",_param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS_SRC,"address_src",Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_STATIC ,"static" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_LAST_TAKE ,"last_take" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_HISTORY ,"history" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIRECTION ,"direction" ,Tcontrol_t,1); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update", IN, SOUTH, "Interface update",_param->_nb_inst_update); + + ALLOC1_VALACK_IN ( in_UPDATE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS ,"address" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_HISTORY ,"history" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_UPDATE_DIRECTION,"direction",Tcontrol_t,1); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string name; + + { + name = _name+"_glue"; + std::cout << "Create : " << name << std::endl; + + _component_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Direction_Glue + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_glue); + + _component->set_component (_component_glue->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; + + { + src = _name+"_glue"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"predict_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_VAL" , + dest, "in_PREDICT_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ACK" , + dest,"out_PREDICT_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_ADDRESS_SRC", + dest, "in_PREDICT_"+toString(i)+"_ADDRESS_SRC"); + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_STATIC" , + dest, "in_PREDICT_"+toString(i)+"_STATIC" ); + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_LAST_TAKE" , + dest, "in_PREDICT_"+toString(i)+"_LAST_TAKE" ); + if (_param->_have_port_history) + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_HISTORY" , + dest,"out_PREDICT_"+toString(i)+"_HISTORY" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_DIRECTION" , + dest,"out_PREDICT_"+toString(i)+"_DIRECTION" ); + +// PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_PREDICTOR_VAL" ,dest,"out_PREDICT_"+toString(i)+"_PREDICTOR_VAL" ); +// PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_PREDICTOR_ACK" ,dest, "in_PREDICT_"+toString(i)+"_PREDICTOR_ACK" ); +// PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_PREDICTOR_ADDRESS_SRC",dest,"out_PREDICT_"+toString(i)+"_PREDICTOR_ADDRESS_SRC"); +// PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_PREDICTOR_HISTORY" ,dest, "in_PREDICT_"+toString(i)+"_PREDICTOR_HISTORY" ); +// PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_PREDICTOR_DIRECTION" ,dest, "in_PREDICT_"+toString(i)+"_PREDICTOR_DIRECTION" ); + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(i), + dest,"update_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_VAL" , + dest, "in_UPDATE_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_ACK" , + dest,"out_UPDATE_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_ADDRESS" , + dest, "in_UPDATE_"+toString(i)+"_ADDRESS" ); + if (_param->_have_port_history) + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_HISTORY" , + dest, "in_UPDATE_"+toString(i)+"_HISTORY" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_DIRECTION", + dest, "in_UPDATE_"+toString(i)+"_DIRECTION"); +// PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_PREDICTOR_VAL" ,dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_VAL" ); +// PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_PREDICTOR_ACK" ,dest, "in_UPDATE_"+toString(i)+"_PREDICTOR_ACK" ); +// PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_PREDICTOR_ADDRESS" ,dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_ADDRESS" ); +// PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_PREDICTOR_HISTORY" ,dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_HISTORY" ); +// PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_PREDICTOR_DIRECTION",dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_DIRECTION"); + } + } + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _component->test_map(); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_deallocation.cpp (revision 78) @@ -0,0 +1,59 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::deallocation" + void Direction::deallocation (void) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS_SRC ; + delete [] in_PREDICT_STATIC ; + delete [] in_PREDICT_LAST_TAKE ; + if (_param->_have_port_history) + delete [] out_PREDICT_HISTORY ; + delete [] out_PREDICT_DIRECTION ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_ADDRESS ; + if (_param->_have_port_history) + delete [] in_UPDATE_HISTORY ; + delete [] in_UPDATE_DIRECTION ; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete _component_glue; + delete _component; + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::end_cycle" +void Direction::end_cycle () + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_statistics_allocation.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::statistics_allocation" + void Direction::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Direction", + param_statistics); + + _stat->add_stat(_component_glue->_stat); + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::statistics_deallocation" + void Direction::statistics_deallocation (void) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + log_printf(INFO,Direction,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_transition.cpp (revision 78) @@ -0,0 +1,43 @@ +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::transition" + void Direction::transition (void) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_vhdl.cpp (revision 78) @@ -0,0 +1,47 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::vhdl" + void Direction::vhdl (void) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters.cpp (revision 78) @@ -0,0 +1,181 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::Parameters" + Parameters::Parameters (Tpredictor_t predictor_scheme , + uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + bool have_bht [3], + uint32_t bht_size_shifter [3], + uint32_t bht_nb_shifter [3], + bool have_pht [3], + uint32_t pht_size_counter [3], + uint32_t pht_nb_counter [3], + uint32_t pht_size_address_share [3]) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + _predictor_scheme = predictor_scheme ; + _nb_inst_predict = nb_inst_predict ; + _nb_inst_update = nb_inst_update ; + _size_address = size_address ; + + for (uint32_t i=0; i<3; i++) + { + _have_bht [i] = have_bht [i]; + _bht_size_shifter [i] = bht_size_shifter [i]; + _bht_nb_shifter [i] = bht_nb_shifter [i]; + _have_pht [i] = have_pht [i]; + _pht_size_counter [i] = pht_size_counter [i]; + _pht_nb_counter [i] = pht_nb_counter [i]; + _pht_size_address_share [i] = pht_size_address_share [i]; + } + + switch (predictor_scheme) + { + case PREDICTOR_NEVER_TAKE : + case PREDICTOR_ALWAYS_TAKE : + case PREDICTOR_STATIC : + case PREDICTOR_LAST_TAKE : + { + _have_component_meta_predictor = false; + + for (uint32_t i=0; i<3; i++) + { + _have_bht [i] = false; + _have_pht [i] = false; + } + + break; + } + case PREDICTOR_COUNTER : + { + _have_bht [0] = false; + _have_pht [0] = true ; + for (uint32_t i=1; i<3; i++) + { + _have_bht [i] = false; + _have_pht [i] = false; + } + + _have_component_meta_predictor = true; + break; + } + case PREDICTOR_LOCAL : + { + _have_bht [0] = true; + _have_pht [0] = true; + _bht_nb_shifter [0] = (_bht_nb_shifter [0]<2)?2:_bht_nb_shifter [0]; // min : 2 + for (uint32_t i=1; i<3; i++) + { + _have_bht [i] = false; + _have_pht [i] = false; + } + + _have_component_meta_predictor = true; + break; + } + case PREDICTOR_GLOBAL : + { + + _have_bht [0] = true; + _have_pht [0] = true; + _bht_nb_shifter [0] = 1; // one global shifter + for (uint32_t i=1; i<3; i++) + { + _have_bht [i] = false; + _have_pht [i] = false; + } + + _have_component_meta_predictor = true; + break; + } + case PREDICTOR_META : + { + // predictor_0 = global + // predictor_1 = local + // predictor_2 = counter : select between predictor_0 and predictor_1 + _have_bht [0] = true; + _have_pht [0] = true; + _bht_nb_shifter [0] = (_bht_nb_shifter [0]<2)?2:_bht_nb_shifter [0]; // min : 2 + _have_bht [1] = true; + _have_pht [1] = true; + _bht_nb_shifter [1] = 1; // one global shifter + _have_bht [2] = false; + _have_pht [2] = true; + + _have_component_meta_predictor = true; + break; + } + case PREDICTOR_CUSTOM : + { + // keep user define + _have_component_meta_predictor = true; + break; + } + } + + _size_history = 0; + + for (uint32_t i=0; i<3; i++) + _size_history += (((_have_bht [i])?_bht_size_shifter [i]:0) + + ((_have_pht [i])?_pht_size_counter [i]:0)); + + _have_port_history = (_size_history > 0); + + _param_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters + (_predictor_scheme, + _nb_inst_predict , + _nb_inst_update , + _size_address , + _size_history ); + + test(); + + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Direction::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Direction,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Direction,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Direction::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + delete _param_glue; + log_printf(FUNC,Direction,FUNCTION,"End"); + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,67 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + Parameters_test test ("Direction"); + + if (_nb_inst_predict == 0) + test.error("nb_inst_predict must be > 0."); + + if (_nb_inst_update == 0) + test.error("nb_inst_update must be > 0."); + + switch (_predictor_scheme) + { + case PREDICTOR_NEVER_TAKE : + case PREDICTOR_ALWAYS_TAKE : + case PREDICTOR_STATIC : + case PREDICTOR_LAST_TAKE : + { + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + test.error("Unimplemented predictor_scheme : \""+toString(_predictor_scheme)+"\". (Coming Soon)"); + break; + } + } + + log_printf(FUNC,Direction,FUNCTION,"End"); + + return test; + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,82 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { + + +#undef FUNCTION +#define FUNCTION "Direction::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + XML xml ("direction"); + + xml.balise_open("direction"); + xml.singleton_begin("predictor_scheme "); xml.attribut("value",toString(_predictor_scheme)); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict "); xml.attribut("value",toString(_nb_inst_predict )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + + xml.comment("predictor_scheme : "); + xml.comment(" * predictor_never_take : don't use \"predictor_{0,1,2}\" parameters."); + xml.comment(" * predictor_always_take : don't use \"predictor_{0,1,2}\" parameters."); + xml.comment(" * predictor_static : don't use \"predictor_{0,1,2}\" parameters."); + xml.comment(" * predictor_last_take : don't use \"predictor_{0,1,2}\" parameters."); + xml.comment(" * predictor_counter : use \"predictor_0\" parameters."); + xml.comment(" * predictor_local : use \"predictor_0\" parameters."); + xml.comment(" * predictor_global : use \"predictor_0\" parameters."); + xml.comment(" * predictor_meta : use \"predictor_{0,1,2}\" parameters."); + xml.comment(" * predictor_custom : use \"predictor_{0,1,2}\" parameters."); + for (uint32_t i=0; i<3; i++) + { + xml.singleton_begin("predictor_"+toString(i)+"_have_bht "); xml.attribut("value",toString(_have_bht [i])); xml.singleton_end(); + xml.singleton_begin("predictor_"+toString(i)+"_bht_size_shifter "); xml.attribut("value",toString(_bht_size_shifter [i])); xml.singleton_end(); + xml.singleton_begin("predictor_"+toString(i)+"_bht_nb_shifter "); xml.attribut("value",toString(_bht_nb_shifter [i])); xml.singleton_end(); + xml.singleton_begin("predictor_"+toString(i)+"_have_pht "); xml.attribut("value",toString(_have_pht [i])); xml.singleton_end(); + xml.singleton_begin("predictor_"+toString(i)+"_pht_size_counter "); xml.attribut("value",toString(_pht_size_counter [i])); xml.singleton_end(); + xml.singleton_begin("predictor_"+toString(i)+"_pht_nb_counter "); xml.attribut("value",toString(_pht_nb_counter [i])); xml.singleton_end(); + xml.singleton_begin("predictor_"+toString(i)+"_pht_size_address_share"); xml.attribut("value",toString(_pht_size_address_share [i])); xml.singleton_end(); + } + xml.balise_close(); + + log_printf(FUNC,Direction,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Direction::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::Parameters & x) + { + log_printf(FUNC,Direction,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Direction,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libPrediction_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.deps (revision 78) @@ -0,0 +1,68 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Prediction_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Branch_Target_Buffer +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.deps +endif +ifndef Direction +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.deps +endif +ifndef Return_Address_Stack +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.deps +endif +ifndef Update_Prediction_Table +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Prediction_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit + +#-----[ Library ]------------------------------------------ + +Prediction_unit_LIBRARY = -lPrediction_unit \ + $(Behavioural_LIBRARY) \ + $(Branch_Target_Buffer_LIBRARY) \ + $(Direction_LIBRARY) \ + $(Return_Address_Stack_LIBRARY) \ + $(Update_Prediction_Table_LIBRARY) + + +Prediction_unit_DIR_LIBRARY = -L$(Prediction_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) \ + $(Branch_Target_Buffer_DIR_LIBRARY) \ + $(Direction_DIR_LIBRARY) \ + $(Return_Address_Stack_DIR_LIBRARY) \ + $(Update_Prediction_Table_DIR_LIBRARY) + + +#-----[ Rules ]-------------------------------------------- + +Prediction_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Branch_Target_Buffer_library; \ + $(MAKE) Direction_library; \ + $(MAKE) Return_Address_Stack_library; \ + $(MAKE) Update_Prediction_Table_library; \ + $(MAKE) --directory=$(Prediction_unit_DIR) --makefile=Makefile; + +Prediction_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Branch_Target_Buffer_library_clean; \ + $(MAKE) Direction_library_clean; \ + $(MAKE) Return_Address_Stack_library_clean; \ + $(MAKE) Update_Prediction_Table_library_clean; \ + $(MAKE) --directory=$(Prediction_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libReturn_Address_Stack.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Return_Address_Stack = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Return_Address_Stack_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack + +#-----[ Library ]------------------------------------------ + +Return_Address_Stack_LIBRARY = -lReturn_Address_Stack \ + $(Behavioural_LIBRARY) + +Return_Address_Stack_DIR_LIBRARY = -L$(Return_Address_Stack_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Return_Address_Stack_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Return_Address_Stack_DIR) --makefile=Makefile; + +Return_Address_Stack_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Return_Address_Stack_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Return_Address_Stack_LIBRARY) + +DIR_LIBRARY = $(Return_Address_Stack_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Return_Address_Stack_library + +library_clean : Return_Address_Stack_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg (revision 78) @@ -0,0 +1,7 @@ +Return_Address_Stack +1 1 +1 # nb_context +2 2 *2 # size_queue [0] +32 32 *2 # size_address +1 1 +1 # nb_inst_predict +1 1 +1 # nb_inst_decod +1 1 +1 # nb_inst_update Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_multi_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_multi_context.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_multi_context.cfg (revision 78) @@ -0,0 +1,10 @@ +Return_Address_Stack +4 4 +1 # nb_context +2 2 *2 # size_queue [0] +4 4 *2 # size_queue [1] +8 8 *2 # size_queue [2] +16 16 *2 # size_queue [3] +32 32 *2 # size_address +1 1 +1 # nb_inst_predict +1 1 +1 # nb_inst_decod +1 1 +1 # nb_inst_update Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,82 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/include/test.h" + +#define NB_PARAMS 5 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_context (uint32_t)\n")); + err (_(" * size_queue [nb_context] (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_decod (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _nb_context = fromString(argv[x++]); + + if (argc < static_cast(2+NB_PARAMS+_nb_context)) + usage (argc, argv); + + uint32_t * _size_queue = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _size_queue [i] = fromString(argv[x++]); + + uint32_t _size_address = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_inst_update = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters + (_nb_context , + _size_queue , + _size_address , + _nb_inst_predict , + _nb_inst_decod , + _nb_inst_update ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete _size_queue; + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,204 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Return_Address_Stack * _Return_Address_Stack = new Return_Address_Stack (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_PUSH ," in_PREDICT_PUSH ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS_PUSH ," in_PREDICT_ADDRESS_PUSH ",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_POP ,"out_PREDICT_ADDRESS_POP ",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_INDEX ,"out_PREDICT_INDEX ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL( in_DECOD_PUSH ," in_DECOD_PUSH ",Tcontrol_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL(out_DECOD_HIT ,"out_DECOD_HIT ",Tcontrol_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_PUSH ," in_DECOD_ADDRESS_PUSH ",Taddress_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS_POP ,"out_DECOD_ADDRESS_POP ",Taddress_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL(out_DECOD_INDEX ,"out_DECOD_INDEX ",Tptr_t ,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t,_param->_nb_inst_decod ); + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL( in_UPDATE_CONTEXT_ID ," in_UPDATE_CONTEXT_ID ",Tcontext_t,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL( in_UPDATE_PUSH ," in_UPDATE_PUSH ",Tcontrol_t,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL( in_UPDATE_INDEX ," in_UPDATE_INDEX ",Tptr_t ,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t,_param->_nb_inst_update ); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Return_Address_Stack.\n"),name.c_str()); + + (*(_Return_Address_Stack->in_CLOCK)) (*(in_CLOCK)); + (*(_Return_Address_Stack->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_HIT ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_PUSH ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_PREDICT_ADDRESS_PUSH ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_ADDRESS_POP ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_PREDICT_INDEX ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_VAL ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_ACK ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_PUSH ,_param->_nb_inst_decod ); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_HIT ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_ADDRESS_PUSH ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_ADDRESS_POP ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_DECOD_INDEX ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_VAL ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack,out_UPDATE_ACK ,_param->_nb_inst_update ); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_CONTEXT_ID ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_PUSH ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_INDEX ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_ADDRESS ,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update ); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_CONTEXT_ID ; + delete [] out_PREDICT_HIT ; + delete [] in_PREDICT_PUSH ; + delete [] in_PREDICT_ADDRESS_PUSH ; + delete [] out_PREDICT_ADDRESS_POP ; + delete [] out_PREDICT_INDEX ; + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] in_DECOD_PUSH ; + delete [] in_DECOD_CONTEXT_ID ; + delete [] out_DECOD_HIT ; + delete [] in_DECOD_ADDRESS_PUSH ; + delete [] out_DECOD_ADDRESS_POP ; + delete [] out_DECOD_INDEX ; + delete [] in_DECOD_MISS_PREDICTION; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + delete [] in_UPDATE_CONTEXT_ID ; + delete [] in_UPDATE_PUSH ; + delete [] in_UPDATE_INDEX ; + delete [] in_UPDATE_ADDRESS ; + +#endif + + delete _Return_Address_Stack; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/Return_Address_Stack.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/Return_Address_Stack.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/Return_Address_Stack.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Return_Address_Stack} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h (revision 78) @@ -0,0 +1,64 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_return_address_stack_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_return_address_stack_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_context ; + public : uint32_t * _size_queue ;//[nb_context] + public : uint32_t _size_address ; + public : uint32_t _nb_inst_predict; + public : uint32_t _nb_inst_decod ; + public : uint32_t _nb_inst_update ; + + public : uint32_t _size_context_id; + public : uint32_t _size_index ; + + public : uint32_t _have_port_context_id; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_context , + uint32_t * size_queue , + uint32_t size_address , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters & x); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h (revision 78) @@ -0,0 +1,173 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_return_address_stack_Return_Address_Stack_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_return_address_stack_Return_Address_Stack_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + + class Return_Address_Stack +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PREDICT_VAL ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_ACK ; //[nb_inst_predict] + public : SC_IN (Tcontext_t) ** in_PREDICT_CONTEXT_ID ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_HIT ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t) ** in_PREDICT_PUSH ; //[nb_inst_predict] 1 = push, else pop + public : SC_IN (Taddress_t) ** in_PREDICT_ADDRESS_PUSH ; //[nb_inst_predict] + public : SC_OUT(Taddress_t) ** out_PREDICT_ADDRESS_POP ; //[nb_inst_predict] if pop:addr_top else addr_old + public : SC_OUT(Tptr_t ) ** out_PREDICT_INDEX ; //[nb_inst_predict] + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_DECOD_VAL ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t) ** out_DECOD_ACK ; //[nb_inst_decod] + public : SC_IN (Tcontext_t) ** in_DECOD_CONTEXT_ID ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t) ** out_DECOD_HIT ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t) ** in_DECOD_PUSH ; //[nb_inst_decod] 1 = push, else pop + public : SC_IN (Taddress_t) ** in_DECOD_ADDRESS_PUSH ; //[nb_inst_decod] + public : SC_OUT(Taddress_t) ** out_DECOD_ADDRESS_POP ; //[nb_inst_decod] if pop:addr_top else addr_old + public : SC_OUT(Tptr_t ) ** out_DECOD_INDEX ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t) ** in_DECOD_MISS_PREDICTION ; //[nb_inst_decod] predict at stage 1 is a miss + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; //[nb_inst_update] + public : SC_IN (Tcontext_t) ** in_UPDATE_CONTEXT_ID ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_PUSH ; //[nb_inst_update] 1 = push, else pop + public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ; //[nb_inst_update] + public : SC_IN (Tptr_t ) ** in_UPDATE_INDEX ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_MISS_PREDICTION; //[nb_inst_update] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : ras_entry_t ** reg_stack ; //[nb_context][size_queue] + private : Tptr_t * reg_TOP ; //[nb_context] + private : Tptr_t * reg_BOTTOM ; //[nb_context] + private : Tcontrol_t * reg_EMPTY ; //[nb_context] + private : Tptr_t * reg_PREDICT_TOP ; //[nb_context] + private : Tptr_t * reg_PREDICT_BOTTOM; //[nb_context] + private : Tcontrol_t * reg_PREDICT_EMPTY ; //[nb_context] + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : Tcontrol_t * internal_PREDICT_ACK; //[nb_inst_predict] + public : Tcontrol_t * internal_PREDICT_HIT; //[nb_inst_predict] + public : Tcontrol_t * internal_DECOD_ACK ; //[nb_inst_decod ] + public : Tcontrol_t * internal_DECOD_HIT ; //[nb_inst_decod ] + public : Tcontrol_t * internal_UPDATE_ACK ; //[nb_inst_update ] +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Return_Address_Stack); +#endif + public : Return_Address_Stack + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Return_Address_Stack (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMealy_predict (void); +// public : void genMealy_decod (void); +// public : void genMealy_update (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Types.h (revision 78) @@ -0,0 +1,37 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_return_address_stack_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_return_address_stack_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + class ras_entry_t + { + public : bool _val ; + public : bool _predict; + public : bool _miss ; + public : Taddress_t _address; + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters.cpp (revision 78) @@ -0,0 +1,71 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::Parameters" + Parameters::Parameters (uint32_t nb_context , + uint32_t * size_queue , + uint32_t size_address , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update ) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + _nb_context = nb_context ; + _size_queue = size_queue ; + _size_address = size_address ; + _nb_inst_predict = nb_inst_predict; + _nb_inst_decod = nb_inst_decod ; + _nb_inst_update = nb_inst_update ; + + _size_context_id = log2(nb_context); + _size_index = max(size_queue,nb_context); + + _have_port_context_id = _size_context_id > 0; + + test(); + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Return_Address_Stack::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,45 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + Parameters_test test ("Return_Address_Stack"); + + for (uint32_t i=0; i<_nb_context; i++) + if (_size_queue [i] < 2) + test.error("context \""+toString(i)+"\" : size_queue must be > 2"); + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + + return test; + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,71 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + XML xml ("return_address_stack"); + + xml.balise_open("return_address_stack"); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict"); xml.attribut("value",toString(_nb_inst_predict)); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_context; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue [i])); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters & x) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp (revision 78) @@ -0,0 +1,156 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::Return_Address_Stack" + Return_Address_Stack::Return_Address_Stack + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::return_address_stack::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + log_printf(INFO,Return_Address_Stack,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Return_Address_Stack,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Return_Address_Stack,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + internal_PREDICT_ACK [i] = 1; + PORT_WRITE(out_PREDICT_ACK [i], internal_PREDICT_ACK [i]); + } + for (uint32_t i=0; i<_param->_nb_inst_decod ; i++) + { + internal_DECOD_ACK [i] = 1; + PORT_WRITE(out_DECOD_ACK [i], internal_DECOD_ACK [i]); + } + for (uint32_t i=0; i<_param->_nb_inst_update ; i++) + { + internal_UPDATE_ACK [i] = 1; + PORT_WRITE(out_UPDATE_ACK [i], internal_UPDATE_ACK [i]); + } + + log_printf(INFO,Return_Address_Stack,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Return_Address_Stack,FUNCTION,"Method - genMealy_predict"); + + SC_METHOD (genMealy_predict); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal registers + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + if (_param->_have_port_context_id) + sensitive << (*( in_PREDICT_CONTEXT_ID [i])); + sensitive << (*( in_PREDICT_PUSH [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + if (_param->_have_port_context_id) + (*(out_PREDICT_HIT [i])) (*( in_PREDICT_CONTEXT_ID [i])); + (*(out_PREDICT_HIT [i])) (*( in_PREDICT_PUSH [i])); + + if (_param->_have_port_context_id) + (*(out_PREDICT_ADDRESS_POP [i])) (*( in_PREDICT_CONTEXT_ID [i])); + (*(out_PREDICT_ADDRESS_POP [i])) (*( in_PREDICT_PUSH [i])); + + if (_param->_have_port_context_id) + (*(out_PREDICT_INDEX [i])) (*( in_PREDICT_CONTEXT_ID [i])); + (*(out_PREDICT_INDEX [i])) (*( in_PREDICT_PUSH [i])); + } +# endif +#endif + } + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::~Return_Address_Stack" + Return_Address_Stack::~Return_Address_Stack (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Return_Address_Stack,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp (revision 78) @@ -0,0 +1,135 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::allocation" + void Return_Address_Stack::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Return_Address_Stack" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN, SOUTH, "predict's interface", _param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t,_param->_size_context_id); + ALLOC1_SIGNAL_OUT(out_PREDICT_HIT ,"hit" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_PUSH ,"push" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS_PUSH,"address_push",Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_POP ,"address_pop" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_INDEX ,"index" ,Tptr_t ,_param->_size_index); + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("decod", IN, SOUTH, "decod's interface", _param->_nb_inst_decod); + + ALLOC1_VALACK_IN ( in_DECOD_VAL ,VAL); + ALLOC1_VALACK_OUT(out_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t,_param->_size_context_id); + ALLOC1_SIGNAL_OUT(out_DECOD_HIT ,"hit" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_DECOD_PUSH ,"push" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_PUSH ,"address_push" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS_POP ,"address_pop" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_DECOD_INDEX ,"index" ,Tptr_t ,_param->_size_index); + ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update", IN, SOUTH, "update's interface", _param->_nb_inst_update); + + ALLOC1_VALACK_IN ( in_UPDATE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_UPDATE_PUSH ,"push" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS ,"address" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_INDEX ,"index" ,Tptr_t ,_param->_size_index); + ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); + } + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + reg_stack = new ras_entry_t * [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + reg_stack [i] = new ras_entry_t [_param->_size_queue [i]]; + + reg_TOP = new Tptr_t [_param->_nb_context]; + reg_BOTTOM = new Tptr_t [_param->_nb_context]; + reg_EMPTY = new Tcontrol_t [_param->_nb_context]; + + reg_PREDICT_TOP = new Tptr_t [_param->_nb_context]; + reg_PREDICT_BOTTOM = new Tptr_t [_param->_nb_context]; + reg_PREDICT_EMPTY = new Tcontrol_t [_param->_nb_context]; + + internal_PREDICT_ACK = new Tcontrol_t [_param->_nb_inst_predict]; + internal_PREDICT_HIT = new Tcontrol_t [_param->_nb_inst_predict]; + internal_DECOD_ACK = new Tcontrol_t [_param->_nb_inst_decod ]; + internal_DECOD_HIT = new Tcontrol_t [_param->_nb_inst_decod ]; + internal_UPDATE_ACK = new Tcontrol_t [_param->_nb_inst_update ]; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp (revision 78) @@ -0,0 +1,88 @@ +*/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::deallocation" + void Return_Address_Stack::deallocation (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + if (_param->_have_port_context_id) + delete [] in_PREDICT_CONTEXT_ID ; + delete [] out_PREDICT_HIT ; + delete [] in_PREDICT_PUSH ; + delete [] in_PREDICT_ADDRESS_PUSH ; + delete [] out_PREDICT_ADDRESS_POP ; + delete [] out_PREDICT_INDEX ; + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] in_DECOD_PUSH ; + if (_param->_have_port_context_id) + delete [] in_DECOD_CONTEXT_ID ; + delete [] out_DECOD_HIT ; + delete [] in_DECOD_ADDRESS_PUSH ; + delete [] out_DECOD_ADDRESS_POP ; + delete [] out_DECOD_INDEX ; + delete [] in_DECOD_MISS_PREDICTION; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; + if (_param->_have_port_context_id) + delete [] in_UPDATE_CONTEXT_ID ; + delete [] in_UPDATE_PUSH ; + delete [] in_UPDATE_INDEX ; + delete [] in_UPDATE_ADDRESS ; + } + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete [] reg_stack; + delete [] reg_TOP; + delete [] reg_BOTTOM; + delete [] reg_EMPTY; + delete [] reg_PREDICT_TOP; + delete [] reg_PREDICT_BOTTOM; + delete [] reg_PREDICT_EMPTY; + + delete [] internal_PREDICT_ACK; + delete [] internal_PREDICT_HIT; + delete [] internal_DECOD_ACK; + delete [] internal_DECOD_HIT; + delete [] internal_UPDATE_ACK; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::end_cycle" +void Return_Address_Stack::end_cycle () + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp (revision 78) @@ -0,0 +1,72 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::genMealy_decod" + void Return_Address_Stack::genMealy_decod (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + +#ifdef DEBUG_TEST + bool context_valid [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + context_valid [i] = true; +#endif + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; + +#ifdef DEBUG_TEST + if (PORT_READ(in_DECOD_VAL [i])) + { + if (context_valid[context] == false) + ERRORMORPHEO(FUNCTION,"Can't have 2 transactions with the same context_id"); + context_valid[context] = false; + } +#endif + + Tptr_t top = reg_TOP[context]; + Tcontrol_t push = PORT_READ(in_DECOD_PUSH [i]); + + // if push : value is hit + // if pop : val and not miss + internal_DECOD_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss)); + PORT_WRITE(out_DECOD_HIT [i], internal_DECOD_HIT [i]); + + // if pop : address_pop = stack [top] + // if push : stock [top+1] = address_push; also stock [top+1] is erase ! give the old value at the update table + if (push) + top = (top+1)%_param->_size_queue[context]; + + PORT_WRITE(out_DECOD_ADDRESS_POP [i], reg_stack[context][top]._address); + PORT_WRITE(out_DECOD_INDEX [i], top); + } + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp (revision 78) @@ -0,0 +1,72 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::genMealy_predict" + void Return_Address_Stack::genMealy_predict (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + +#ifdef DEBUG_TEST + bool context_valid [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + context_valid [i] = true; +#endif + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; + +#ifdef DEBUG_TEST + if (PORT_READ(in_PREDICT_VAL [i])) + { + if (context_valid[context] == false) + ERRORMORPHEO(FUNCTION,"Can't have 2 transactions with the same context_id"); + context_valid[context] = false; + } +#endif + + Tptr_t top = reg_PREDICT_TOP[context]; + Tcontrol_t push = PORT_READ(in_PREDICT_PUSH [i]); + + // if push : value is hit + // if pop : val and not miss + internal_PREDICT_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss)); + PORT_WRITE(out_PREDICT_HIT [i], internal_PREDICT_HIT [i]); + + // if pop : address_pop = stack [top] + // if push : stock [top+1] = address_push; also stock [top+1] is erase ! give the old value at the update table + if (push) + top = (top+1)%_param->_size_queue[context]; + + PORT_WRITE(out_PREDICT_ADDRESS_POP [i], reg_stack[context][top]._address); + PORT_WRITE(out_PREDICT_INDEX [i], top); + } + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_statistics_allocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::statistics_allocation" + void Return_Address_Stack::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Return_Address_Stack", + param_statistics); + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::statistics_deallocation" + void Return_Address_Stack::statistics_deallocation (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + log_printf(INFO,Return_Address_Stack,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 78) @@ -0,0 +1,200 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::transition" + void Return_Address_Stack::transition (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET)) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + reg_TOP [i] = 0; + reg_BOTTOM [i] = 0; + + reg_PREDICT_TOP [i] = 0; + reg_PREDICT_BOTTOM [i] = 0; + + for (uint32_t j=0; j<_param->_size_queue [i]; j++) + reg_stack[i][j]._val = false; + } + } + else + { + // =================================================================== + // =====[ PREDICT ]=================================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + if (PORT_READ(in_PREDICT_VAL [i]) and internal_PREDICT_ACK [i]) + { + Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; + Tcontrol_t push = PORT_READ(in_PREDICT_PUSH [i]); + Tptr_t top_old = reg_PREDICT_TOP [i]; + Tptr_t top_new; + + if (internal_PREDICT_HIT [i]) + { + if (push) + { + // push + top_new = (top_old+1)%_param->_size_queue[context]; + + reg_stack [context][top_new]._val = true; // New addr + reg_stack [context][top_new]._predict = true; // Is speculative (erase a old addr) + //reg_stack [context][top_new]._miss = ; + reg_stack [context][top_new]._address = PORT_READ(in_PREDICT_ADDRESS_PUSH [i]); + + // the stack is full, erase the most old stack + if (top_new == reg_PREDICT_BOTTOM [i]) + reg_PREDICT_BOTTOM [i] = (reg_PREDICT_BOTTOM [i]+1)%_param->_size_queue[context]; + } + else + { + // pop + top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); + + //reg_stack [context][top_new]._val = ; + //reg_stack [context][top_new]._predict = ; + //reg_stack [context][top_new]._miss = ; + //reg_stack [context][top_new]._address = ; + + // the stack is empty + if (top_old == reg_PREDICT_BOTTOM [i]) + reg_PREDICT_BOTTOM [i] = top_new; + + } + + reg_PREDICT_TOP [i] = top_new; + } + } + +// // =================================================================== +// // =====[ DECOD ]===================================================== +// // =================================================================== +// for (uint32_t i=0; i<_param->_nb_inst_decod; i++) +// if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i]) +// { +// Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; +// Tcontrol_t push = PORT_READ(in_DECOD_PUSH [i]); +// Tptr_t top_old = reg_TOP [i]; +// Tptr_t top_new; + +// Tcontrol_t hit = PORT_READ(in_DECOD_HIT [i]); +// Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); + +// if (push) +// { +// // push +// top_new = (top_old+1)%_param->_size_queue[context]; + +// reg_stack [context][top_new]._val = true; +// reg_stack [context][top_new]._predict = false; +// reg_stack [context][top_new]._miss = false; +// reg_stack [context][top_new]._address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]); + +// // the stack is full, erase the most old stack +// if (top_old == reg_BOTTOM [i]) +// reg_BOTTOM [i] = top_new; +// } +// else +// { +// // pop +// top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); + +// //reg_stack [context][top_new]._val = ; +// //reg_stack [context][top_new]._predict = ; +// //reg_stack [context][top_new]._miss = ; +// //reg_stack [context][top_new]._address = ; +// } + +// reg_TOP [i] = top_new; + +// // have previous miss of ifetch ? +// // 2 miss : +// // 1) miss predict : is very limited (local at context), can be update very quickly +// // 2) miss decod : result is in commit stage ... +// if (miss) +// { +// reg_PREDICT_BOTTOM [i] = reg_BOTTOM [i]; +// reg_PREDICT_TOP [i] = reg_TOP [i]; + +// for (uint32_t j=0; j<_param->_size_queue [i]; j++) +// if (reg_stack [context][top_new]._predict) +// { +// reg_stack [context][top_new]._predict = false; +// reg_stack [context][top_new]._miss = true; +// } +// } +// } + + // =================================================================== + // =====[ UPDATE ]=================================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + if (PORT_READ(in_UPDATE_VAL [i]) and internal_UPDATE_ACK [i]) + { + Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; + Tcontrol_t push = PORT_READ(in_UPDATE_PUSH [i]); + Tptr_t index = PORT_READ(in_UPDATE_INDEX [i]); + + if (PORT_READ(in_UPDATE_MISS_PREDICTION [i])) + { + if (push) + { + // push + top_new = (top_old+1)%_param->_size_queue[context]; + + reg_stack [context][index]._val = true; + reg_stack [context][index]._predict = false; + reg_stack [context][index]._miss = false; + reg_stack [context][index]._address = PORT_READ(in_UPDATE_ADDRESS [i]); + + } + else + { + //reg_stack [context][top_new]._val = ; + //reg_stack [context][top_new]._predict = ; + //reg_stack [context][top_new]._miss = ; + //reg_stack [context][top_new]._address = ; + } + + // Mouais bof ....... + reg_PREDICT_TOP [i] = index; + } + } + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::vhdl" + void Return_Address_Stack::vhdl (void) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::vhdl_body" + void Return_Address_Stack::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace return_address_stack { + + +#undef FUNCTION +#define FUNCTION "Return_Address_Stack::vhdl_declaration" + void Return_Address_Stack::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); + log_printf(FUNC,Return_Address_Stack,FUNCTION,"End"); + }; + +}; // end namespace return_address_stack +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Prediction_unit_LIBRARY) + +DIR_LIBRARY = $(Prediction_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Prediction_unit_library + +library_clean : Prediction_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,1 @@ +Prediction_unit Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,30 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h" + +#define NB_PARAMS 0 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * ()\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; +//const uint32_t size_data = atoi(argv[x++]); +//const uint32_t nb_port = atoi(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters + (//size_data, + //nb_port + ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,127 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Prediction_unit * _Prediction_unit = new Prediction_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Prediction_unit.\n"),name.c_str()); + + (*(_Prediction_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Prediction_unit->in_NRESET)) (*(in_NRESET)); + + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; +#endif + + delete _Prediction_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libUpdate_Prediction_Table.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Update_Prediction_Table = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Update_Prediction_Table_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table + +#-----[ Library ]------------------------------------------ + +Update_Prediction_Table_LIBRARY = -lUpdate_Prediction_Table \ + $(Behavioural_LIBRARY) + +Update_Prediction_Table_DIR_LIBRARY = -L$(Update_Prediction_Table_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Update_Prediction_Table_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Update_Prediction_Table_DIR) --makefile=Makefile; + +Update_Prediction_Table_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Update_Prediction_Table_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Update_Prediction_Table_LIBRARY) + +DIR_LIBRARY = $(Update_Prediction_Table_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Update_Prediction_Table_library + +library_clean : Update_Prediction_Table_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,1 @@ +Update_Prediction_Table Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" + +#define NB_PARAMS 0 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * ()\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; +//const uint32_t size_data = atoi(argv[x++]); +//const uint32_t nb_port = atoi(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters + (//size_data, + //nb_port + ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,127 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Update_Prediction_Table * _Update_Prediction_Table = new Update_Prediction_Table (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Update_Prediction_Table.\n"),name.c_str()); + + (*(_Update_Prediction_Table->in_CLOCK)) (*(in_CLOCK)); + (*(_Update_Prediction_Table->in_NRESET)) (*(in_NRESET)); + + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; +#endif + + delete _Update_Prediction_Table; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/Update_Prediction_Table.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/Update_Prediction_Table.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/Update_Prediction_Table.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Update_Prediction_Table} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h (revision 78) @@ -0,0 +1,48 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_update_prediction_table_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_update_prediction_table_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters & x); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 78) @@ -0,0 +1,31 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_update_prediction_table_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_update_prediction_table_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 78) @@ -0,0 +1,129 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_update_prediction_table_Update_Prediction_Table_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_update_prediction_table_Update_Prediction_Table_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + + class Update_Prediction_Table +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Update_Prediction_Table); +#endif + public : Update_Prediction_Table + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Update_Prediction_Table (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); +//public : void genMoore (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp (revision 78) @@ -0,0 +1,52 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::Parameters" + Parameters::Parameters () + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + test(); + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Update_Prediction_Table::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,41 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + Parameters_test test ("Update_Prediction_Table"); + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + + return test; + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,58 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + XML xml ("update_prediction_table"); + + xml.balise_open("update_prediction_table"); +// xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters & x) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp (revision 78) @@ -0,0 +1,111 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::Update_Prediction_Table" + Update_Prediction_Table::Update_Prediction_Table + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::~Update_Prediction_Table" + Update_Prediction_Table::~Update_Prediction_Table (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 78) @@ -0,0 +1,73 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::allocation" + void Update_Prediction_Table::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Update_Prediction_Table" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 78) @@ -0,0 +1,44 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::deallocation" + void Update_Prediction_Table::deallocation (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::end_cycle" +void Update_Prediction_Table::end_cycle () + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::statistics_allocation" + void Update_Prediction_Table::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Update_Prediction_Table", + param_statistics); + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::statistics_deallocation" + void Update_Prediction_Table::statistics_deallocation (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::transition" + void Update_Prediction_Table::transition (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::vhdl" + void Update_Prediction_Table::vhdl (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::vhdl_body" + void Update_Prediction_Table::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::vhdl_declaration" + void Update_Prediction_Table::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/Prediction_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/Prediction_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/Prediction_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Prediction_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h (revision 78) @@ -0,0 +1,46 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters & x); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h (revision 78) @@ -0,0 +1,126 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_Prediction_unit_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_Prediction_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + + class Prediction_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Prediction_unit); +#endif + public : Prediction_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Prediction_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif +#endif + +#if VHDL + public : void vhdl (void); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,50 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::Parameters" + Parameters::Parameters () + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + test(); + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Prediction_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Prediction_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Prediction_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,39 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + Parameters_test test ("Prediction_unit"); + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + + return test; + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,56 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + XML xml ("prediction_unit"); + + xml.balise_open("prediction_unit"); +// xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Prediction_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters & x) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit.cpp (revision 78) @@ -0,0 +1,109 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::Prediction_unit" + Prediction_unit::Prediction_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + log_printf(INFO,Prediction_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Prediction_unit,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Prediction_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Prediction_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Prediction_unit::~Prediction_unit" + Prediction_unit::~Prediction_unit (void) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Prediction_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp (revision 78) @@ -0,0 +1,79 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::allocation" + void Prediction_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Prediction_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; + + + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _component->test_map(); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp (revision 78) @@ -0,0 +1,42 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::deallocation" + void Prediction_unit::deallocation (void) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,45 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::end_cycle" +void Prediction_unit::end_cycle () + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_statistics_allocation.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::statistics_allocation" + void Prediction_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Prediction_unit", + param_statistics); + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::statistics_deallocation" + void Prediction_unit::statistics_deallocation (void) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + log_printf(INFO,Prediction_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_transition.cpp (revision 78) @@ -0,0 +1,41 @@ +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::transition" + void Prediction_unit::transition (void) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_vhdl.cpp (revision 78) @@ -0,0 +1,45 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit::vhdl" + void Prediction_unit::vhdl (void) + { + log_printf(FUNC,Prediction_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libLoad_Store_pointer_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Load_Store_pointer_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Load_Store_pointer_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit + +#-----[ Library ]------------------------------------------ + +Load_Store_pointer_unit_LIBRARY = -lLoad_Store_pointer_unit \ + $(Behavioural_LIBRARY) + +Load_Store_pointer_unit_DIR_LIBRARY = -L$(Load_Store_pointer_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Load_Store_pointer_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Load_Store_pointer_unit_DIR) --makefile=Makefile; + +Load_Store_pointer_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Load_Store_pointer_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Load_Store_pointer_unit_LIBRARY) + +DIR_LIBRARY = $(Load_Store_pointer_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Load_Store_pointer_unit_library + +library_clean : Load_Store_pointer_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,9 @@ +Load_Store_pointer_unit +1 1 *2 # nb_front_end +1 1 *2 # nb_context [0] [nb_front_end] +1 1 *2 # nb_load_store_queue +2 4 *2 # size_store_queue [0] [nb_load_store_queue] +1 4 *2 # size_load_queue [0] [nb_load_store_queue] +0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context] +1 4 *4 # nb_inst_insert +1 4 *4 # nb_inst_retire Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,106 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/include/test.h" + +#define NB_PARAMS 4 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_front_end (uint32_t)\n")); + err (_(" * nb_context [nb_front_end] (uint32_t)\n")); + err (_(" * nb_load_store_queue (uint32_t)\n")); + err (_(" * size_store_queue [nb_load_store_queue] (uint32_t)\n")); + err (_(" * size_load_queue [nb_load_store_queue] (uint32_t)\n")); + err (_(" * link_load_store_unit_with_thread [nb_front_end][nb_context](uint32_t)\n")); + err (_(" * nb_inst_insert (uint32_t)\n")); + err (_(" * nb_inst_retire (uint32_t)\n")); + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _nb_front_end = atoi(argv[x++]); + + if (argc < static_cast(2+NB_PARAMS+_nb_front_end)) + usage (argc, argv); + + uint32_t * _nb_context = new uint32_t [_nb_front_end]; + uint32_t nb_thread = 0; + for (uint32_t i=0; i<_nb_front_end; i++) + { + _nb_context [i] = atoi(argv[x++]); + nb_thread += _nb_context [i]; + } + + uint32_t _nb_load_store_queue = atoi(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+_nb_front_end+2*_nb_load_store_queue+nb_thread)) + usage (argc, argv); + + uint32_t * _size_store_queue = new uint32_t [_nb_load_store_queue]; + uint32_t * _size_load_queue = new uint32_t [_nb_load_store_queue]; + + for (uint32_t i=0; i<_nb_load_store_queue; i++) + _size_store_queue [i] = atoi(argv[x++]); + for (uint32_t i=0; i<_nb_load_store_queue; i++) + _size_load_queue [i] = atoi(argv[x++]); + + uint32_t ** _link_load_store_unit_with_thread = new uint32_t * [_nb_front_end]; + for (uint32_t i=0; i<_nb_front_end; i++) + { + _link_load_store_unit_with_thread [i] = new uint32_t [_nb_context[i]]; + for (uint32_t j=0; j<_nb_context[i]; j++) + _link_load_store_unit_with_thread [i][j] = atoi(argv[x++]); + } + + uint32_t _nb_inst_insert = atoi(argv[x++]); + uint32_t _nb_inst_retire = atoi(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters + (_nb_front_end , + _nb_context , + _nb_load_store_queue , + _size_store_queue , + _size_load_queue , + _link_load_store_unit_with_thread, + _nb_inst_insert , + _nb_inst_retire ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,405 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/Max.h" +#include "Behavioural/include/Allocation.h" +#include + +#define NB_ITERATION 256 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +class request_t +{ +public : Tcontext_t _front_end_id ; +public : Tcontext_t _context_id ; +public : Ttype_t _type ; +public : Toperation_t _operation ; +public : Tlsq_ptr_t _store_queue_ptr_write; +public : Tlsq_ptr_t _load_queue_ptr_write ; + +public : request_t (Tcontext_t front_end_id , + Tcontext_t context_id , + Ttype_t type , + Toperation_t operation , + Tlsq_ptr_t store_queue_ptr_write, + Tlsq_ptr_t load_queue_ptr_write ) + { + _front_end_id = front_end_id ; + _context_id = context_id ; + _type = type ; + _operation = operation ; + _store_queue_ptr_write = store_queue_ptr_write; + _load_queue_ptr_write = load_queue_ptr_write ; + } +}; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Load_Store_pointer_unit * _Load_Store_pointer_unit = new Load_Store_pointer_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_FRONT_END_ID ," in_INSERT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_CONTEXT_ID ," in_INSERT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_TYPE ," in_INSERT_TYPE ",Ttype_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_OPERATION ," in_INSERT_OPERATION ",Toperation_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,"out_INSERT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID ," in_RETIRE_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID ," in_RETIRE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_TYPE ," in_RETIRE_TYPE ",Ttype_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION ," in_RETIRE_OPERATION ",Toperation_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE," in_RETIRE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ," in_RETIRE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_retire); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Load_Store_pointer_unit.\n"),name.c_str()); + + (*(_Load_Store_pointer_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Load_Store_pointer_unit->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_INSERT_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit,out_INSERT_ACK ,_param->_nb_inst_insert); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_INSERT_FRONT_END_ID ,_param->_nb_inst_insert); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_INSERT_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_INSERT_TYPE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_INSERT_OPERATION ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit,out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert); + if (_param->_have_port_load_queue_ptr) + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit,out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert); + + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit,out_RETIRE_ACK ,_param->_nb_inst_retire); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_TYPE ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_OPERATION ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire); + if (_param->_have_port_load_queue_ptr) + INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_insert = 75; + const int32_t percent_transaction_retire = 75; + + Ttype_t type [2]; + type [0] = TYPE_MEMORY; + type [1] = TYPE_ALU; + + Toperation_t operation[2]; + operation [0] = OPERATION_MEMORY_LOAD_8_Z; + operation [1] = OPERATION_MEMORY_STORE_32; + + list rob; + list::iterator it; + + Tlsq_ptr_t _STORE_QUEUE_PTR_WRITE [_param->_nb_load_store_queue]; + bool _STORE_QUEUE_USE [_param->_nb_load_store_queue][max(_param->_size_store_queue,_param->_nb_load_store_queue)]; + Tlsq_ptr_t _STORE_QUEUE_NB_USE [_param->_nb_load_store_queue]; + Tlsq_ptr_t _LOAD_QUEUE_PTR_WRITE [_param->_nb_load_store_queue]; + bool _LOAD_QUEUE_USE [_param->_nb_load_store_queue][max(_param->_size_load_queue,_param->_nb_load_store_queue)]; + + for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) + { + _STORE_QUEUE_PTR_WRITE [i] = 0; + _STORE_QUEUE_NB_USE [i] = 0; + _LOAD_QUEUE_PTR_WRITE [i] = 0; + + for (uint32_t j=0; j(_param->_size_store_queue,_param->_nb_load_store_queue); j++) + _STORE_QUEUE_USE [i][j] = false; + for (uint32_t j=0; j(_param->_size_load_queue,_param->_nb_load_store_queue); j++) + _LOAD_QUEUE_USE [i][j] = false; + } + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_inst_insert; i++) + { + in_INSERT_VAL [i] ->write((rand()%100)_nb_front_end; + in_INSERT_FRONT_END_ID [i] ->write(front_end_id); + in_INSERT_CONTEXT_ID [i] ->write(rand()%_param->_nb_context[front_end_id]); + in_INSERT_TYPE [i] ->write(type [rand()%2]); + in_INSERT_OPERATION [i] ->write(operation[rand()%2]); + } + + it = rob.begin(); + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + in_RETIRE_VAL [i] ->write(((rand()%100)write(it->_front_end_id ); + in_RETIRE_CONTEXT_ID [i]->write(it->_context_id ); + in_RETIRE_TYPE [i]->write(it->_type ); + in_RETIRE_OPERATION [i]->write(it->_operation ); + in_RETIRE_STORE_QUEUE_PTR_WRITE [i]->write(it->_store_queue_ptr_write); + in_RETIRE_LOAD_QUEUE_PTR_WRITE [i]->write(it->_load_queue_ptr_write ); + + it++; + } + } + + SC_START(0); + + it = rob.begin(); + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + bool pop = false; + if (in_RETIRE_VAL[i]->read()) + { + if (in_RETIRE_TYPE [i]->read() != TYPE_MEMORY) + TEST(Tcontrol_t, out_RETIRE_ACK[i]->read(),true); + + if (out_RETIRE_ACK[i]->read()) + { + pop = true; + + LABEL("RETIRE[%d] Transaction accepted",i); + if (it->_type == TYPE_MEMORY) + { + LABEL(" * Type MEMORY"); + if (is_operation_memory_store(it->_operation)) + { + LABEL(" * Operation STORE"); + uint32_t lsq = _param->_link_load_store_unit_with_thread[it->_front_end_id][it->_context_id]; + uint32_t ptr = it->_store_queue_ptr_write; + + LABEL(" * lsq : %d",lsq); + LABEL(" * ptr : %d",ptr); + + _STORE_QUEUE_NB_USE [lsq] --; + _STORE_QUEUE_USE [lsq][ptr] = false; + } + else + { + LABEL(" * Operation LOAD"); + uint32_t lsq = _param->_link_load_store_unit_with_thread[it->_front_end_id][it->_context_id]; + uint32_t ptr = it->_load_queue_ptr_write; + + LABEL(" * lsq : %d",lsq); + LABEL(" * ptr : %d",ptr); + + _LOAD_QUEUE_USE [lsq][ptr] = false; + } + } + it = rob.erase(it); + } + } + + if ((pop == false) and (i< rob.size())) + it++; + } + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + if (in_INSERT_VAL[i]->read()) + { + if (in_INSERT_TYPE [i]->read() != TYPE_MEMORY) + TEST(Tcontrol_t, out_INSERT_ACK[i]->read(),true); + + if (out_INSERT_ACK[i]->read()) + { + rob.push_back(request_t( in_INSERT_FRONT_END_ID [i]->read(), + in_INSERT_CONTEXT_ID [i]->read(), + in_INSERT_TYPE [i]->read(), + in_INSERT_OPERATION [i]->read(), + out_INSERT_STORE_QUEUE_PTR_WRITE [i]->read(), + out_INSERT_LOAD_QUEUE_PTR_WRITE [i]->read())); + + LABEL("INSERT[%d] Transaction accepted",i); + + if (in_INSERT_TYPE [i]->read() == TYPE_MEMORY) + { + LABEL(" * Type MEMORY"); + if (is_operation_memory_store(in_INSERT_OPERATION [i]->read())) + { + LABEL(" * Operation STORE"); + uint32_t lsq = _param->_link_load_store_unit_with_thread[in_INSERT_FRONT_END_ID[i]->read()][in_INSERT_CONTEXT_ID[i]->read()]; + uint32_t ptr = _STORE_QUEUE_PTR_WRITE [lsq]; + + LABEL(" * lsq : %d",lsq); + LABEL(" * ptr : %d",ptr); + + TEST(bool , _STORE_QUEUE_USE [lsq][ptr], false); + TEST(Tlsq_ptr_t, out_INSERT_STORE_QUEUE_PTR_WRITE [i]->read(),ptr ); + TEST(Tlsq_ptr_t, out_INSERT_LOAD_QUEUE_PTR_WRITE [i]->read(),_LOAD_QUEUE_PTR_WRITE [lsq]); + TEST(bool ,static_cast(_STORE_QUEUE_NB_USE [lsq]+1)<_param->_size_store_queue[lsq], true); + + _STORE_QUEUE_PTR_WRITE [lsq] = (ptr+1)%_param->_size_store_queue[lsq]; + _STORE_QUEUE_NB_USE [lsq] ++; + _STORE_QUEUE_USE [lsq][ptr] = true; + } + else + { + LABEL(" * Operation LOAD"); + uint32_t lsq = _param->_link_load_store_unit_with_thread[in_INSERT_FRONT_END_ID[i]->read()][in_INSERT_CONTEXT_ID[i]->read()]; + uint32_t ptr = _LOAD_QUEUE_PTR_WRITE [lsq]; + + LABEL(" * lsq : %d",lsq); + LABEL(" * ptr : %d",ptr); + + TEST(bool , _LOAD_QUEUE_USE [lsq][ptr], false); + TEST(Tlsq_ptr_t, out_INSERT_STORE_QUEUE_PTR_WRITE [i]->read(),_STORE_QUEUE_PTR_WRITE [lsq]); + TEST(Tlsq_ptr_t, out_INSERT_LOAD_QUEUE_PTR_WRITE [i]->read(),ptr ); + + _LOAD_QUEUE_PTR_WRITE [lsq] = (ptr+1)%_param->_size_load_queue[lsq]; + _LOAD_QUEUE_USE [lsq][ptr] = true; + } + } + } + } + + + for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) + { + std::string str; + + LABEL("LOAD_STORE_QUEUE [%d]",i); + + LABEL(" * STORE_QUEUE_PTR_WRITE : %d",_STORE_QUEUE_PTR_WRITE [i]); + LABEL(" * STORE_QUEUE_NB_USE : %d",_STORE_QUEUE_NB_USE [i]); + + str = ""; + for (uint32_t j=0; j<_param->_size_store_queue[i]; j++) + str += toString(_STORE_QUEUE_USE [i][j]) + " "; + LABEL(" * %s",str.c_str()); + + LABEL(" * LOAD_QUEUE_PTR_WRITE : %d",_LOAD_QUEUE_PTR_WRITE [i]); + + str = ""; + for (uint32_t j=0; j<_param->_size_load_queue[i]; j++) + str += toString(_LOAD_QUEUE_USE [i][j]) + " "; + LABEL(" * %s",str.c_str()); + } + + + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_INSERT_VAL ; + delete [] out_INSERT_ACK ; + delete [] in_INSERT_FRONT_END_ID ; + delete [] in_INSERT_CONTEXT_ID ; + delete [] in_INSERT_TYPE ; + delete [] in_INSERT_OPERATION ; + delete [] out_INSERT_STORE_QUEUE_PTR_WRITE; + delete [] out_INSERT_LOAD_QUEUE_PTR_WRITE ; + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + delete [] in_RETIRE_FRONT_END_ID ; + delete [] in_RETIRE_CONTEXT_ID ; + delete [] in_RETIRE_TYPE ; + delete [] in_RETIRE_OPERATION ; + delete [] in_RETIRE_STORE_QUEUE_PTR_WRITE; + delete [] in_RETIRE_LOAD_QUEUE_PTR_WRITE ; + +#endif + + delete _Load_Store_pointer_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/Load_Store_pointer_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/Load_Store_pointer_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/Load_Store_pointer_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Load_Store_pointer_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h (revision 78) @@ -0,0 +1,164 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_load_store_pointer_unit_Load_Store_pointer_unit_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_load_store_pointer_unit_Load_Store_pointer_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Types.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + + class Load_Store_pointer_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_INSERT_VAL ; // [nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_ACK ; // [nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_INSERT_FRONT_END_ID ; // [nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_INSERT_CONTEXT_ID ; // [nb_inst_insert] + public : SC_IN (Ttype_t ) ** in_INSERT_TYPE ; // [nb_inst_insert] + public : SC_IN (Toperation_t ) ** in_INSERT_OPERATION ; // [nb_inst_insert] + public : SC_OUT(Tlsq_ptr_t ) ** out_INSERT_STORE_QUEUE_PTR_WRITE; // [nb_inst_insert] + public : SC_OUT(Tlsq_ptr_t ) ** out_INSERT_LOAD_QUEUE_PTR_WRITE ; // [nb_inst_insert] + + // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_RETIRE_VAL ; // [nb_inst_retire] + public : SC_OUT(Tcontrol_t ) ** out_RETIRE_ACK ; // [nb_inst_retire] + public : SC_IN (Tcontext_t ) ** in_RETIRE_FRONT_END_ID ; // [nb_inst_retire] + public : SC_IN (Tcontext_t ) ** in_RETIRE_CONTEXT_ID ; // [nb_inst_retire] + public : SC_IN (Ttype_t ) ** in_RETIRE_TYPE ; // [nb_inst_retire] + public : SC_IN (Toperation_t ) ** in_RETIRE_OPERATION ; // [nb_inst_retire] + public : SC_IN (Tlsq_ptr_t ) ** in_RETIRE_STORE_QUEUE_PTR_WRITE; // [nb_inst_retire] + public : SC_IN (Tlsq_ptr_t ) ** in_RETIRE_LOAD_QUEUE_PTR_WRITE ; // [nb_inst_retire] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : Tlsq_ptr_t * reg_STORE_QUEUE_PTR_WRITE; // [nb_load_store_queue] + public : bool ** reg_STORE_QUEUE_USE ; // [nb_load_store_queue][size_store_queue] + public : Tlsq_ptr_t * reg_STORE_QUEUE_NB_USE ; // [nb_load_store_queue] + public : Tlsq_ptr_t * reg_LOAD_QUEUE_PTR_WRITE ; // [nb_load_store_queue] + public : bool ** reg_LOAD_QUEUE_USE ; // [nb_load_store_queue][size_load_queue] + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : Tcontrol_t * internal_INSERT_ACK ; // [nb_inst_insert] + public : operation_use_t * internal_INSERT_OPERATION_USE; // [nb_inst_insert] + public : uint32_t * internal_INSERT_LSQ ; // [nb_inst_insert] + public : Tlsq_ptr_t * internal_INSERT_PTR ; // [nb_inst_insert] + + public : Tcontrol_t * internal_RETIRE_ACK ; // [nb_inst_retire] + public : operation_use_t * internal_RETIRE_OPERATION_USE; // [nb_inst_retire] + public : uint32_t * internal_RETIRE_LSQ ; // [nb_inst_retire] + public : Tlsq_ptr_t * internal_RETIRE_PTR ; // [nb_inst_retire] + +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Load_Store_pointer_unit); +#endif + public : Load_Store_pointer_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Load_Store_pointer_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMealy_insert (void); + public : void genMealy_retire (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h (revision 78) @@ -0,0 +1,72 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_load_store_pointer_unit_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_load_store_pointer_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ; //[nb_front_end] + public : uint32_t _nb_load_store_queue ; + public : uint32_t * _size_store_queue ; //[nb_load_store_queue] + public : uint32_t * _size_load_queue ; //[nb_load_store_queue] + public : uint32_t ** _link_load_store_unit_with_thread; //[nb_front_end][nb_context] + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; + + public : uint32_t _size_front_end_id ; + public : uint32_t _size_context_id ; + public : uint32_t _size_store_queue_ptr ; + public : uint32_t _size_load_queue_ptr ; + + public : uint32_t _have_port_front_end_id ; + public : uint32_t _have_port_context_id ; + public : uint32_t _have_port_load_queue_ptr ; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_load_store_queue , + uint32_t * size_store_queue , + uint32_t * size_load_queue , + uint32_t ** link_load_store_unit_with_thread, + uint32_t nb_inst_insert , + uint32_t nb_inst_retire ); + +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters & x); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Types.h (revision 78) @@ -0,0 +1,35 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_load_store_pointer_unit_Types_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_load_store_pointer_unit_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + typedef enum {OPERATION_USE_NONE, + OPERATION_USE_LOAD_QUEUE, + OPERATION_USE_STORE_QUEUE} operation_use_t; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp (revision 78) @@ -0,0 +1,198 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::Load_Store_pointer_unit" + Load_Store_pointer_unit::Load_Store_pointer_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Method - genMealy_insert"); + + SC_METHOD (genMealy_insert); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + if (_param->_have_port_front_end_id) + sensitive << (*(in_INSERT_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_INSERT_CONTEXT_ID [i])); + sensitive << (*(in_INSERT_VAL [i])) + << (*(in_INSERT_TYPE [i])) + << (*(in_INSERT_OPERATION [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + (*(out_INSERT_ACK [i])) (*( in_INSERT_VAL [i])); + if (_param->_have_port_front_end_id) + (*(out_INSERT_ACK [i])) (*( in_INSERT_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + (*(out_INSERT_ACK [i])) (*( in_INSERT_CONTEXT_ID [i])); + (*(out_INSERT_ACK [i])) (*( in_INSERT_TYPE [i])); + (*(out_INSERT_ACK [i])) (*( in_INSERT_OPERATION [i])); + + (*(out_INSERT_STORE_QUEUE_PTR_WRITE [i])) (*( in_INSERT_VAL [i])); + if (_param->_have_port_front_end_id) + (*(out_INSERT_STORE_QUEUE_PTR_WRITE [i])) (*( in_INSERT_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + (*(out_INSERT_STORE_QUEUE_PTR_WRITE [i])) (*( in_INSERT_CONTEXT_ID [i])); + (*(out_INSERT_STORE_QUEUE_PTR_WRITE [i])) (*( in_INSERT_TYPE [i])); + (*(out_INSERT_STORE_QUEUE_PTR_WRITE [i])) (*( in_INSERT_OPERATION [i])); + + if (_param->_have_port_load_queue_ptr) + { + (*(out_INSERT_LOAD_QUEUE_PTR_WRITE [i])) (*( in_INSERT_VAL [i])); + if (_param->_have_port_front_end_id) + (*(out_INSERT_LOAD_QUEUE_PTR_WRITE [i])) (*( in_INSERT_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + (*(out_INSERT_LOAD_QUEUE_PTR_WRITE [i])) (*( in_INSERT_CONTEXT_ID [i])); + (*(out_INSERT_LOAD_QUEUE_PTR_WRITE [i])) (*( in_INSERT_TYPE [i])); + (*(out_INSERT_LOAD_QUEUE_PTR_WRITE [i])) (*( in_INSERT_OPERATION [i])); + } + } +# endif + + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Method - genMealy_retire"); + + SC_METHOD (genMealy_retire); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + if (_param->_have_port_front_end_id) + sensitive << (*(in_RETIRE_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_RETIRE_CONTEXT_ID [i])); + if (_param->_have_port_load_queue_ptr) + sensitive << (*(in_RETIRE_LOAD_QUEUE_PTR_WRITE [i])); + sensitive << (*(in_RETIRE_VAL [i])) + << (*(in_RETIRE_TYPE [i])) + << (*(in_RETIRE_OPERATION [i])) + << (*(in_RETIRE_STORE_QUEUE_PTR_WRITE [i]));; + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_VAL [i])); + if (_param->_have_port_front_end_id) + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_CONTEXT_ID [i])); + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_TYPE [i])); + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_OPERATION [i])); + if (_param->_have_port_load_queue_ptr) + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_LOAD_QUEUE_PTR_WRITE [i])); + (*(out_RETIRE_ACK [i])) (*( in_RETIRE_STORE_QUEUE_PTR_WRITE [i])); + } +# endif + +#endif + } + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::~Load_Store_pointer_unit" + Load_Store_pointer_unit::~Load_Store_pointer_unit (void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp (revision 78) @@ -0,0 +1,123 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::allocation" + void Load_Store_pointer_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Load_Store_pointer_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("insert", IN, EAST, "insert to the re order buffer an instruction", _param->_nb_inst_insert); + + ALLOC1_VALACK_IN ( in_INSERT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_INSERT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_IN ( in_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t,_param->_size_operation ); + ALLOC1_SIGNAL_OUT(out_INSERT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); + ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ); + } + + // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("retire", IN, EAST, "retire from the re order buffer an instruction", _param->_nb_inst_retire); + + ALLOC1_VALACK_IN ( in_RETIRE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_RETIRE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RETIRE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_IN ( in_RETIRE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_RETIRE_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_IN ( in_RETIRE_OPERATION ,"operation" ,Toperation_t,_param->_size_operation ); + ALLOC1_SIGNAL_IN ( in_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); + ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + reg_STORE_QUEUE_PTR_WRITE = new Tlsq_ptr_t [_param->_nb_load_store_queue]; + reg_STORE_QUEUE_USE = new bool * [_param->_nb_load_store_queue]; + reg_STORE_QUEUE_NB_USE = new Tlsq_ptr_t [_param->_nb_load_store_queue]; + reg_LOAD_QUEUE_PTR_WRITE = new Tlsq_ptr_t [_param->_nb_load_store_queue]; + reg_LOAD_QUEUE_USE = new bool * [_param->_nb_load_store_queue]; + + for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) + { + reg_STORE_QUEUE_USE [i] = new bool [_param->_size_store_queue [i]]; + reg_LOAD_QUEUE_USE [i] = new bool [_param->_size_load_queue [i]]; + } + + internal_INSERT_ACK = new Tcontrol_t [_param->_nb_inst_insert]; + internal_INSERT_OPERATION_USE = new operation_use_t [_param->_nb_inst_insert]; + internal_INSERT_LSQ = new uint32_t [_param->_nb_inst_insert]; + internal_INSERT_PTR = new Tlsq_ptr_t [_param->_nb_inst_insert]; + + internal_RETIRE_ACK = new Tcontrol_t [_param->_nb_inst_retire]; + internal_RETIRE_OPERATION_USE = new operation_use_t [_param->_nb_inst_retire]; + internal_RETIRE_LSQ = new uint32_t [_param->_nb_inst_retire]; + internal_RETIRE_PTR = new Tlsq_ptr_t [_param->_nb_inst_retire]; + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp (revision 78) @@ -0,0 +1,86 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::deallocation" + void Load_Store_pointer_unit::deallocation (void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_INSERT_VAL ; + delete [] out_INSERT_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_INSERT_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_INSERT_CONTEXT_ID ; + delete [] in_INSERT_TYPE ; + delete [] in_INSERT_OPERATION ; + delete [] out_INSERT_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) + delete [] out_INSERT_LOAD_QUEUE_PTR_WRITE ; + + // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RETIRE_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RETIRE_CONTEXT_ID ; + delete [] in_RETIRE_TYPE ; + delete [] in_RETIRE_OPERATION ; + delete [] in_RETIRE_STORE_QUEUE_PTR_WRITE; + if (_param->_have_port_load_queue_ptr) + delete [] in_RETIRE_LOAD_QUEUE_PTR_WRITE ; + + } + + delete [] reg_STORE_QUEUE_PTR_WRITE ; + delete [] reg_STORE_QUEUE_USE ; + delete [] reg_STORE_QUEUE_NB_USE ; + delete [] reg_LOAD_QUEUE_PTR_WRITE ; + delete [] reg_LOAD_QUEUE_USE ; + delete [] internal_INSERT_ACK ; + delete [] internal_INSERT_OPERATION_USE; + delete [] internal_INSERT_LSQ ; + delete [] internal_INSERT_PTR ; + delete [] internal_RETIRE_ACK ; + delete [] internal_RETIRE_OPERATION_USE; + delete [] internal_RETIRE_LSQ ; + delete [] internal_RETIRE_PTR ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::end_cycle" +void Load_Store_pointer_unit::end_cycle () + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_insert.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_insert.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_insert.cpp (revision 78) @@ -0,0 +1,103 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::genMealy_insert" + void Load_Store_pointer_unit::genMealy_insert (void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + bool use_lsq [_param->_nb_load_store_queue]; + for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) + use_lsq [i] = false; + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontrol_t ack = false; + Tlsq_ptr_t store_queue_ptr_write = 0; + Tlsq_ptr_t load_queue_ptr_write = 0; + + if ( (PORT_READ(in_INSERT_VAL [i]) == true ) and + (PORT_READ(in_INSERT_TYPE [i]) == TYPE_MEMORY)) + { + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_INSERT_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_INSERT_CONTEXT_ID [i]):0; + + uint32_t lsq = _param->_link_load_store_unit_with_thread[front_end_id][context_id]; + + // Test if a previous instruction use the same lsq + // Authorize once memory access by load store unit + if (use_lsq [lsq] == false) + { + use_lsq [lsq] = true; + + uint32_t ptr; + + store_queue_ptr_write = reg_STORE_QUEUE_PTR_WRITE [lsq]; + load_queue_ptr_write = reg_LOAD_QUEUE_PTR_WRITE [lsq]; + + // operation became of decod_stage. Also operation is != store_head_ok and store_head_ko + if (is_operation_memory_store(PORT_READ(in_INSERT_OPERATION [i]))) + { + internal_INSERT_OPERATION_USE [i] = OPERATION_USE_STORE_QUEUE; + + ptr = reg_STORE_QUEUE_PTR_WRITE [lsq]; + + ack = not reg_STORE_QUEUE_USE [lsq][ptr] and (static_cast(reg_STORE_QUEUE_NB_USE [lsq]+1) < _param->_size_store_queue[lsq]); + } + else + { + internal_INSERT_OPERATION_USE [i] = OPERATION_USE_LOAD_QUEUE; + + ptr = reg_LOAD_QUEUE_PTR_WRITE [lsq]; + + ack = (not reg_LOAD_QUEUE_USE [lsq][ptr]); + } + + internal_INSERT_LSQ [i] = lsq; + internal_INSERT_PTR [i] = ptr; + } + } + else + { + ack = true; + + internal_INSERT_OPERATION_USE [i] = OPERATION_USE_NONE; + } + + // Write output + internal_INSERT_ACK [i] = ack; + PORT_WRITE(out_INSERT_ACK [i], ack); + PORT_WRITE(out_INSERT_STORE_QUEUE_PTR_WRITE [i], store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) + PORT_WRITE(out_INSERT_LOAD_QUEUE_PTR_WRITE [i], load_queue_ptr_write ); + } + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp (revision 78) @@ -0,0 +1,91 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::genMealy_retire" + void Load_Store_pointer_unit::genMealy_retire (void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + bool use_lsq [_param->_nb_load_store_queue]; + for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) + use_lsq [i] = false; + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + Tcontrol_t ack = false; + + if ( (PORT_READ(in_RETIRE_VAL [i]) == true ) and + (PORT_READ(in_RETIRE_TYPE [i]) == TYPE_MEMORY)) + { + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; + uint32_t lsq = _param->_link_load_store_unit_with_thread[front_end_id][context_id]; + + // Test if a previous instruction use the same lsq + // Authorize once memory access by load store unit + if (use_lsq [lsq] == false) + { + use_lsq [lsq] = true; + ack = true; + + uint32_t ptr; + + // operation became of decod_stage. Also operation is != store_head_ok and store_head_ko + if (is_operation_memory_store(PORT_READ(in_RETIRE_OPERATION [i]))) + { + internal_RETIRE_OPERATION_USE [i] = OPERATION_USE_STORE_QUEUE; + + ptr = PORT_READ(in_RETIRE_STORE_QUEUE_PTR_WRITE [i]); + } + else + { + internal_RETIRE_OPERATION_USE [i] = OPERATION_USE_LOAD_QUEUE; + + ptr = (_param->_have_port_load_queue_ptr)?PORT_READ(in_RETIRE_LOAD_QUEUE_PTR_WRITE [i]):0; + } + + internal_RETIRE_LSQ [i] = lsq; + internal_RETIRE_PTR [i] = ptr; + } + } + else + { + ack = true; + + internal_RETIRE_OPERATION_USE [i] = OPERATION_USE_NONE; + } + + // Write output + internal_RETIRE_ACK [i] = ack; + PORT_WRITE(out_RETIRE_ACK [i], ack); + } + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_statistics_declaration.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::statistics_declaration" + void Load_Store_pointer_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Load_Store_pointer_unit", + param_statistics); + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_transition.cpp (revision 78) @@ -0,0 +1,178 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::transition" + void Load_Store_pointer_unit::transition (void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) + { + reg_STORE_QUEUE_PTR_WRITE [i] = 0; + reg_STORE_QUEUE_NB_USE [i] = 0; + reg_LOAD_QUEUE_PTR_WRITE [i] = 0; + + for (uint32_t j=0; j<_param->_size_store_queue[i]; j++) + reg_STORE_QUEUE_USE [i][j] = false; + for (uint32_t j=0; j<_param->_size_load_queue[i]; j++) + reg_LOAD_QUEUE_USE [i][j] = false; + } + } + else + { + // ===================================================== + // =====[ INSERT ]====================================== + // ===================================================== + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i]) + { +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"INSERT [%d]",i); + + switch (internal_INSERT_OPERATION_USE [i]) + { + case OPERATION_USE_STORE_QUEUE : + { +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * use STORE_QUEUE"); + + uint32_t lsq = internal_INSERT_LSQ [i]; + Tlsq_ptr_t ptr = internal_INSERT_PTR [i]; + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * lsq : %d",lsq); +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * ptr : %d",ptr); + + reg_STORE_QUEUE_PTR_WRITE [lsq] = (ptr+1)%_param->_size_store_queue[lsq]; + reg_STORE_QUEUE_NB_USE [lsq] ++; + reg_STORE_QUEUE_USE [lsq][ptr] = true; + + break; + } + case OPERATION_USE_LOAD_QUEUE : + { +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * use LOAD_QUEUE"); + + uint32_t lsq = internal_INSERT_LSQ [i]; + Tlsq_ptr_t ptr = internal_INSERT_PTR [i]; + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * lsq : %d",lsq); +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * ptr : %d",ptr); + + reg_LOAD_QUEUE_PTR_WRITE [lsq] = (ptr+1)%_param->_size_load_queue[lsq]; + reg_LOAD_QUEUE_USE [lsq][ptr] = true; + + break; + } + default : + { + break; + } + } + } + + // ===================================================== + // =====[ RETIRE ]====================================== + // ===================================================== + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i]) + { +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"RETIRE [%d]",i); + + switch (internal_RETIRE_OPERATION_USE [i]) + { + case OPERATION_USE_STORE_QUEUE : + { +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * use STORE_QUEUE"); + + uint32_t lsq = internal_RETIRE_LSQ [i]; + Tlsq_ptr_t ptr = internal_RETIRE_PTR [i]; + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * lsq : %d",lsq); +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * ptr : %d",ptr); + +// reg_STORE_QUEUE_PTR_WRITE [lsq] = ((ptr==0)?_param->_size_store_queue[lsq]:ptr)-1; + reg_STORE_QUEUE_NB_USE [lsq] --; + reg_STORE_QUEUE_USE [lsq][ptr] = false; + + break; + } + case OPERATION_USE_LOAD_QUEUE : + { +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * use LOAD_QUEUE"); + + uint32_t lsq = internal_RETIRE_LSQ [i]; + Tlsq_ptr_t ptr = internal_RETIRE_PTR [i]; + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * lsq : %d",lsq); +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * ptr : %d",ptr); + +// reg_LOAD_QUEUE_PTR_WRITE [lsq] = ((ptr==0)?_param->_size_load_queue[lsq]:ptr)-1; + reg_LOAD_QUEUE_USE [lsq][ptr] = false; + + break; + } + default : + { + break; + } + } + } + } + + +// for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) +// { +// std::string str; + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"LOAD_STORE_QUEUE [%d]",i); + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * STORE_QUEUE_PTR_WRITE : %d",reg_STORE_QUEUE_PTR_WRITE [i]); +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * STORE_QUEUE_NB_USE : %d",reg_STORE_QUEUE_NB_USE [i]); + +// str = ""; +// for (uint32_t j=0; j<_param->_size_store_queue[i]; j++) +// str += toString(reg_STORE_QUEUE_USE [i][j]) + " "; +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * %s",str.c_str()); + +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * LOAD_QUEUE_PTR_WRITE : %d",reg_LOAD_QUEUE_PTR_WRITE [i]); + +// str = ""; +// for (uint32_t j=0; j<_param->_size_load_queue[i]; j++) +// str += toString(reg_LOAD_QUEUE_USE [i][j]) + " "; +// log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * %s",str.c_str()); +// } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::vhdl" + void Load_Store_pointer_unit::vhdl (void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::vhdl_body" + void Load_Store_pointer_unit::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::vhdl_declaration" + void Load_Store_pointer_unit::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,82 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::Parameters" + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_load_store_queue , + uint32_t * size_store_queue , + uint32_t * size_load_queue , + uint32_t ** link_load_store_unit_with_thread, + uint32_t nb_inst_insert , + uint32_t nb_inst_retire ) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _nb_load_store_queue = nb_load_store_queue ; + _size_store_queue = size_store_queue ; + _size_load_queue = size_load_queue ; + _link_load_store_unit_with_thread = link_load_store_unit_with_thread; + _nb_inst_insert = nb_inst_insert ; + _nb_inst_retire = nb_inst_retire ; + + uint32_t max_nb_context = max(nb_context, nb_front_end); + uint32_t max_size_store_queue = max(size_store_queue, nb_load_store_queue); + uint32_t max_size_load_queue = max(size_load_queue, nb_load_store_queue); + + _size_front_end_id = log2(nb_front_end ); + _size_context_id = log2(max_nb_context ); + _size_store_queue_ptr = log2(max_size_store_queue); + _size_load_queue_ptr = log2(max_size_load_queue ); + _have_port_front_end_id = (_size_front_end_id > 0); + _have_port_context_id = (_size_context_id > 0); + _have_port_load_queue_ptr = (_size_load_queue_ptr > 0); + + test(); + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Load_Store_pointer_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,63 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + std::string msg = ""; + + for (uint32_t i=0; i<_nb_load_store_queue; i++) + { + if (not (_size_store_queue [i] > 1)) + msg += " - The size of store_queue["+toString(i)+"] must be greater or equal at 2.\n"; + if (not (_size_load_queue [i] > 0)) + msg += " - The size of load_queue["+toString(i)+"] must be greater or equal at 1.\n"; + } + + bool map_lsq [_nb_load_store_queue]; + for (uint32_t i=0; i<_nb_load_store_queue; i++) + map_lsq [i] = false; + for (uint32_t i=0; i<_nb_front_end; i++) + for (uint32_t j=0; j<_nb_context[i]; j++) + if (_link_load_store_unit_with_thread[i][j] < _nb_load_store_queue) + map_lsq [_link_load_store_unit_with_thread[i][j]] = true; + else + msg += " - The number of load_store_unit for the thread ["+toString(i)+"]["+toString(j)+"] is too high.\n"; + + for (uint32_t i=0; i<_nb_load_store_queue; i++) + if (map_lsq [i] == false) + msg += " - The load store unit ["+toString(i)+"] is not linked with a thread.\n"; + + return msg; + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,80 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace load_store_pointer_unit { + + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + XML xml ("load_store_pointer_unit"); + + xml.balise_open("load_store_pointer_unit"); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); + xml.singleton_begin("nb_load_store_queue "); xml.attribut("value",toString(_nb_load_store_queue )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_front_end; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","front_end"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + xml. balise_close(); + } + for (uint32_t i=0;i<_nb_load_store_queue; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","load_store_queue"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("size_store_queue "); xml.attribut("value",toString(_size_store_queue [i])); xml.singleton_end(); + xml. singleton_begin("size_load_queue "); xml.attribut("value",toString(_size_load_queue [i])); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Load_Store_pointer_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters & x) + { + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace load_store_pointer_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libDependency_checking_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Dependency_checking_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Dependency_checking_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit + +#-----[ Library ]------------------------------------------ + +Dependency_checking_unit_LIBRARY = -lDependency_checking_unit \ + $(Behavioural_LIBRARY) + +Dependency_checking_unit_DIR_LIBRARY = -L$(Dependency_checking_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Dependency_checking_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Dependency_checking_unit_DIR) --makefile=Makefile; + +Dependency_checking_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Dependency_checking_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Dependency_checking_unit_LIBRARY) + +DIR_LIBRARY = $(Dependency_checking_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Dependency_checking_unit_library + +library_clean : Dependency_checking_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,6 @@ +Dependency_checking_unit +1 4 *2 # nb_front_end +1 4 *2 # max_nb_context +64 64 *2 # nb_general_register +16 16 *2 # nb_special_register +1 8 *2 # nb_inst_insert Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,69 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/include/test.h" + +#define NB_PARAMS 5 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_front_end (uint32_t)\n")); + err (_(" * max_nb_context (uint32_t)\n")); + err (_(" * nb_general_register (uint32_t)\n")); + err (_(" * nb_special_register (uint32_t)\n")); + err (_(" * nb_inst_insert (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != 2+NB_PARAMS) + usage (argc, argv); + + uint32_t x = 1; + + const string name = argv[x++]; + uint32_t _nb_front_end = atoi(argv[x++]); + uint32_t _max_nb_context = atoi(argv[x++]); + uint32_t _nb_general_register = atoi(argv[x++]); + uint32_t _nb_special_register = atoi(argv[x++]); + uint32_t _nb_inst_insert = atoi(argv[x++]); + + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters + (_nb_front_end , + _max_nb_context , + _nb_general_register, + _nb_special_register, + _nb_inst_insert ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + exit (EXIT_FAILURE); + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + exit (EXIT_FAILURE); + } + + return (EXIT_SUCCESS); +} + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,452 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" +#include + +#define NB_ITERATION 32 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Dependency_checking_unit * _Dependency_checking_unit = new Dependency_checking_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + +// ALLOC1_SC_SIGNAL( in_RENAME_IN_VAL ," in_RENAME_IN_VAL ",Tcontrol_t ,_param->_nb_inst_insert); +// ALLOC1_SC_SIGNAL(out_RENAME_IN_ACK ,"out_RENAME_IN_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID ," in_RENAME_IN_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID ," in_RENAME_IN_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_READ_RA ," in_RENAME_IN_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA_LOG ," in_RENAME_IN_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA_PHY ," in_RENAME_IN_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_READ_RB ," in_RENAME_IN_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB_LOG ," in_RENAME_IN_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB_PHY ," in_RENAME_IN_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_READ_RC ," in_RENAME_IN_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC_LOG ," in_RENAME_IN_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC_PHY ," in_RENAME_IN_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_WRITE_RD ," in_RENAME_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD_LOG ," in_RENAME_IN_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD_PHY_OLD ," in_RENAME_IN_NUM_REG_RD_PHY_OLD ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD_PHY_NEW ," in_RENAME_IN_NUM_REG_RD_PHY_NEW ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_WRITE_RE ," in_RENAME_IN_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE_LOG ," in_RENAME_IN_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE_PHY_OLD ," in_RENAME_IN_NUM_REG_RE_PHY_OLD ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE_PHY_NEW ," in_RENAME_IN_NUM_REG_RE_PHY_NEW ",Tspecial_address_t,_param->_nb_inst_insert); +// ALLOC1_SC_SIGNAL(out_RENAME_OUT_VAL ,"out_RENAME_OUT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); +// ALLOC1_SC_SIGNAL( in_RENAME_OUT_ACK ," in_RENAME_OUT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_FRONT_END_ID ,"out_RENAME_OUT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_CONTEXT_ID ,"out_RENAME_OUT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RA ,"out_RENAME_OUT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RA_LOG ,"out_RENAME_OUT_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RA_PHY ,"out_RENAME_OUT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RB ,"out_RENAME_OUT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RB_LOG ,"out_RENAME_OUT_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RB_PHY ,"out_RENAME_OUT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RC ,"out_RENAME_OUT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RC_LOG ,"out_RENAME_OUT_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RC_PHY ,"out_RENAME_OUT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_WRITE_RD ,"out_RENAME_OUT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD_LOG ,"out_RENAME_OUT_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD_PHY_OLD,"out_RENAME_OUT_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD_PHY_NEW,"out_RENAME_OUT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_WRITE_RE ,"out_RENAME_OUT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE_LOG ,"out_RENAME_OUT_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE_PHY_OLD,"out_RENAME_OUT_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE_PHY_NEW,"out_RENAME_OUT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Dependency_checking_unit.\n"),name.c_str()); + + (*(_Dependency_checking_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Dependency_checking_unit->in_NRESET)) (*(in_NRESET)); + +// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_VAL ,_param->_nb_inst_insert); +// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_IN_ACK ,_param->_nb_inst_insert); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_FRONT_END_ID ,_param->_nb_inst_insert); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_READ_RA ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RA_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RA_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_READ_RB ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RB_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RB_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_READ_RC ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RC_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RC_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_WRITE_RD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RD_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_WRITE_RE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RE_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_IN_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert); + +// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_VAL ,_param->_nb_inst_insert); +// INSTANCE1_SC_SIGNAL(_Dependency_checking_unit, in_RENAME_OUT_ACK ,_param->_nb_inst_insert); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_FRONT_END_ID ,_param->_nb_inst_insert); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_READ_RA ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RA_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RA_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_READ_RB ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RB_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RB_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_READ_RC ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RC_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RC_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_WRITE_RD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RD_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_WRITE_RE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RE_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Dependency_checking_unit,out_RENAME_OUT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + int32_t percent_transaction_read = 75; + int32_t percent_transaction_write = 75; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_front_end][_param->_max_nb_context][_param->_nb_general_register_logic]; + Tspecial_address_t rat_spr [_param->_nb_front_end][_param->_max_nb_context][_param->_nb_special_register_logic]; + std::list free_list_gpr [_param->_nb_front_end][_param->_max_nb_context]; + std::list free_list_spr [_param->_nb_front_end][_param->_max_nb_context]; + + for (uint32_t x=0; x< _param->_nb_front_end; x++) + for (uint32_t y=0; y<_param->_max_nb_context; y++) + { + for (uint32_t i=0; i<_param->_nb_general_register_logic; i++) + rat_gpr [x][y][i] = i; + for (uint32_t i=_param->_nb_general_register_logic; i<_param->_nb_general_register; i++) + free_list_gpr[x][y].push_back(i); + for (uint32_t i=0; i<_param->_nb_special_register_logic; i++) + rat_spr [x][y][i] = i; + for (uint32_t i=_param->_nb_special_register_logic; i<_param->_nb_special_register; i++) + free_list_spr[x][y].push_back(i); + } + + int32_t nb_request = 32; + + while (nb_request >= 0) + { +// uint32_t nb_in_val = rand()%_param->_nb_inst_insert; +// uint32_t nb_out_ack = rand()%_param->_nb_inst_insert; + + std::list::iterator it_gpr [_param->_nb_front_end][_param->_max_nb_context]; + std::list::iterator it_spr [_param->_nb_front_end][_param->_max_nb_context]; + + for (uint32_t x=0; x< _param->_nb_front_end; x++) + for (uint32_t y=0; y<_param->_max_nb_context; y++) + { + it_gpr [x][y] = free_list_gpr [x][y].begin(); + it_spr [x][y] = free_list_spr [x][y].begin(); + } + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontext_t front_end_id= rand()%_param->_nb_front_end; + Tcontext_t context_id = rand()%_param->_max_nb_context; + + Tgeneral_address_t ra_log = rand()%_param->_nb_general_register_logic; + Tgeneral_address_t rb_log = rand()%_param->_nb_general_register_logic; + Tspecial_address_t rc_log = rand()%_param->_nb_special_register_logic; + Tgeneral_address_t rd_log = rand()%_param->_nb_general_register_logic; + Tspecial_address_t re_log = rand()%_param->_nb_special_register_logic; + Tcontrol_t read_ra = ((rand()%100)write(iwrite(front_end_id ); + in_RENAME_IN_CONTEXT_ID [i]->write(context_id ); + in_RENAME_IN_READ_RA [i]->write(read_ra ); + in_RENAME_IN_NUM_REG_RA_LOG [i]->write(ra_log ); + in_RENAME_IN_NUM_REG_RA_PHY [i]->write(rat_gpr[front_end_id][context_id][ra_log]); + in_RENAME_IN_READ_RB [i]->write(read_rb ); + in_RENAME_IN_NUM_REG_RB_LOG [i]->write(rb_log ); + in_RENAME_IN_NUM_REG_RB_PHY [i]->write(rat_gpr[front_end_id][context_id][rb_log]); + in_RENAME_IN_READ_RC [i]->write(read_rc ); + in_RENAME_IN_NUM_REG_RC_LOG [i]->write(rc_log ); + in_RENAME_IN_NUM_REG_RC_PHY [i]->write(rat_spr[front_end_id][context_id][rc_log]); + in_RENAME_IN_WRITE_RD [i]->write(write_rd ); + in_RENAME_IN_NUM_REG_RD_LOG [i]->write(rd_log ); + in_RENAME_IN_NUM_REG_RD_PHY_OLD [i]->write(rat_gpr[front_end_id][context_id][rd_log]); + in_RENAME_IN_NUM_REG_RD_PHY_NEW [i]->write((write_rd)?*it_gpr[front_end_id][context_id]:0); + in_RENAME_IN_WRITE_RE [i]->write(write_re ); + in_RENAME_IN_NUM_REG_RE_LOG [i]->write(re_log ); + in_RENAME_IN_NUM_REG_RE_PHY_OLD [i]->write(rat_spr[front_end_id][context_id][re_log]); + in_RENAME_IN_NUM_REG_RE_PHY_NEW [i]->write((write_re)?*it_spr[front_end_id][context_id]:0); + +// in_RENAME_OUT_ACK [i]->write(i_nb_inst_insert; i++) + { +// if ( in_RENAME_IN_VAL [i]->read() == +// out_RENAME_IN_ACK [i]->read() == +// out_RENAME_OUT_VAL [i]->read() == +// in_RENAME_OUT_ACK [i]->read() == 1) + { + nb_request --; + + LABEL("Rename_out [%d]",i); + + Tcontext_t front_end_id= (_param->_have_port_front_end_id)?in_RENAME_IN_FRONT_END_ID [i]->read():0; + Tcontext_t context_id = (_param->_have_port_context_id )?in_RENAME_IN_CONTEXT_ID [i]->read():0; + + if (_param->_have_port_front_end_id) + TEST(Tcontext_t ,out_RENAME_OUT_FRONT_END_ID [i]->read(), front_end_id); + if (_param->_have_port_context_id) + TEST(Tcontext_t ,out_RENAME_OUT_CONTEXT_ID [i]->read(), context_id); + + + Tcontrol_t read_ra = in_RENAME_IN_READ_RA [i]->read(); + Tgeneral_address_t num_reg_ra_log = in_RENAME_IN_NUM_REG_RA_LOG [i]->read(); + Tcontrol_t read_rb = in_RENAME_IN_READ_RB [i]->read(); + Tgeneral_address_t num_reg_rb_log = in_RENAME_IN_NUM_REG_RB_LOG [i]->read(); + Tcontrol_t read_rc = in_RENAME_IN_READ_RC [i]->read(); + Tspecial_address_t num_reg_rc_log = in_RENAME_IN_NUM_REG_RC_LOG [i]->read(); + Tcontrol_t write_rd = in_RENAME_IN_WRITE_RD [i]->read(); + Tgeneral_address_t num_reg_rd_log = in_RENAME_IN_NUM_REG_RD_LOG [i]->read(); + Tgeneral_address_t num_reg_rd_phy_old = in_RENAME_IN_NUM_REG_RD_PHY_OLD [i]->read(); + Tgeneral_address_t num_reg_rd_phy_new = in_RENAME_IN_NUM_REG_RD_PHY_NEW [i]->read(); + Tcontrol_t write_re = in_RENAME_IN_WRITE_RE [i]->read(); + Tspecial_address_t num_reg_re_log = in_RENAME_IN_NUM_REG_RE_LOG [i]->read(); + Tspecial_address_t num_reg_re_phy_old = in_RENAME_IN_NUM_REG_RE_PHY_OLD [i]->read(); + Tspecial_address_t num_reg_re_phy_new = in_RENAME_IN_NUM_REG_RE_PHY_NEW [i]->read(); + + TEST(Tcontrol_t ,out_RENAME_OUT_READ_RA [i]->read(), read_ra ); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA_LOG [i]->read(), num_reg_ra_log ); + if (read_ra) + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA_PHY [i]->read(), rat_gpr[front_end_id][context_id][num_reg_ra_log]); + TEST(Tcontrol_t ,out_RENAME_OUT_READ_RB [i]->read(), read_rb ); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB_LOG [i]->read(), num_reg_rb_log ); + if (read_rb) + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB_PHY [i]->read(), rat_gpr[front_end_id][context_id][num_reg_rb_log]); + TEST(Tcontrol_t ,out_RENAME_OUT_READ_RC [i]->read(), read_rc ); + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC_LOG [i]->read(), num_reg_rc_log ); + if (read_rc) + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC_PHY [i]->read(), rat_spr[front_end_id][context_id][num_reg_rc_log]); + TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RD [i]->read(), write_rd ); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD_LOG [i]->read(), num_reg_rd_log ); + if (write_rd) + { + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i]->read(), rat_gpr[front_end_id][context_id][num_reg_rd_log]); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD_PHY_NEW [i]->read(), free_list_gpr[front_end_id][context_id].front()); + } + TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RE [i]->read(), write_re ); + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE_LOG [i]->read(), num_reg_re_log ); + if (write_re) + { + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i]->read(), rat_spr[front_end_id][context_id][num_reg_re_log]); + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE_PHY_NEW [i]->read(), free_list_spr[front_end_id][context_id].front()); + } + + if (write_rd) + { + free_list_gpr[front_end_id][context_id].pop_front(); + free_list_gpr[front_end_id][context_id].push_back(num_reg_rd_phy_old); + rat_gpr [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new; + } + if (write_re) + { + free_list_spr[front_end_id][context_id].pop_front(); + free_list_spr[front_end_id][context_id].push_back(num_reg_re_phy_old); + rat_spr [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new; + } + + } + } + SC_START(1); + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + +// delete [] in_RENAME_IN_VAL ; +// delete [] out_RENAME_IN_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RENAME_IN_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RENAME_IN_CONTEXT_ID ; + delete [] in_RENAME_IN_READ_RA ; + delete [] in_RENAME_IN_NUM_REG_RA_LOG ; + delete [] in_RENAME_IN_NUM_REG_RA_PHY ; + delete [] in_RENAME_IN_READ_RB ; + delete [] in_RENAME_IN_NUM_REG_RB_LOG ; + delete [] in_RENAME_IN_NUM_REG_RB_PHY ; + delete [] in_RENAME_IN_READ_RC ; + delete [] in_RENAME_IN_NUM_REG_RC_LOG ; + delete [] in_RENAME_IN_NUM_REG_RC_PHY ; + delete [] in_RENAME_IN_WRITE_RD ; + delete [] in_RENAME_IN_NUM_REG_RD_LOG ; + delete [] in_RENAME_IN_NUM_REG_RD_PHY_OLD ; + delete [] in_RENAME_IN_NUM_REG_RD_PHY_NEW ; + delete [] in_RENAME_IN_WRITE_RE ; + delete [] in_RENAME_IN_NUM_REG_RE_LOG ; + delete [] in_RENAME_IN_NUM_REG_RE_PHY_OLD ; + delete [] in_RENAME_IN_NUM_REG_RE_PHY_NEW ; +// delete [] out_RENAME_OUT_VAL ; +// delete [] in_RENAME_OUT_ACK ; + if (_param->_have_port_front_end_id) + delete [] out_RENAME_OUT_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] out_RENAME_OUT_CONTEXT_ID ; + delete [] out_RENAME_OUT_READ_RA ; + delete [] out_RENAME_OUT_NUM_REG_RA_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RA_PHY ; + delete [] out_RENAME_OUT_READ_RB ; + delete [] out_RENAME_OUT_NUM_REG_RB_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RB_PHY ; + delete [] out_RENAME_OUT_READ_RC ; + delete [] out_RENAME_OUT_NUM_REG_RC_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RC_PHY ; + delete [] out_RENAME_OUT_WRITE_RD ; + delete [] out_RENAME_OUT_NUM_REG_RD_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RD_PHY_OLD; + delete [] out_RENAME_OUT_NUM_REG_RD_PHY_NEW; + delete [] out_RENAME_OUT_WRITE_RE ; + delete [] out_RENAME_OUT_NUM_REG_RE_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RE_PHY_OLD; + delete [] out_RENAME_OUT_NUM_REG_RE_PHY_NEW; + +#endif + + delete _Dependency_checking_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/Dependency_checking_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/Dependency_checking_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/Dependency_checking_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Dependency_checking_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h (revision 78) @@ -0,0 +1,178 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_dependency_checking_unit_Dependency_checking_unit_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_dependency_checking_unit_Dependency_checking_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + + class Dependency_checking_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // Interface + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_IN (Tcontrol_t ) ** in_RENAME_IN_VAL ;//[nb_inst_insert] +// public : SC_OUT(Tcontrol_t ) ** out_RENAME_IN_ACK ;//[nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_RENAME_IN_FRONT_END_ID ;//[nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_RENAME_IN_CONTEXT_ID ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_IN_READ_RA ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RA_LOG ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RA_PHY ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_IN_READ_RB ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RB_LOG ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RB_PHY ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_IN_READ_RC ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_IN_NUM_REG_RC_LOG ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_IN_NUM_REG_RC_PHY ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_IN_WRITE_RD ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RD_LOG ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RD_PHY_OLD ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_IN_NUM_REG_RD_PHY_NEW ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_IN_WRITE_RE ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_IN_NUM_REG_RE_LOG ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_IN_NUM_REG_RE_PHY_OLD ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_IN_NUM_REG_RE_PHY_NEW ;//[nb_inst_insert] + + // ~~~~~[ Interface "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_VAL ;//[nb_inst_insert] +// public : SC_IN (Tcontrol_t ) ** in_RENAME_OUT_ACK ;//[nb_inst_insert] + public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_FRONT_END_ID ;//[nb_inst_insert] + public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_CONTEXT_ID ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RA ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RA_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RA_PHY ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RB ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RB_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RB_PHY ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RC ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RC_LOG ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RC_PHY ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_WRITE_RD ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RD_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_WRITE_RE ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RE_LOG ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Dependency_checking_unit); +#endif + public : Dependency_checking_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Dependency_checking_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +#endif + public : void genMealy (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h (revision 78) @@ -0,0 +1,67 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_dependency_checking_unit_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_dependency_checking_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_front_end ; + public : uint32_t _max_nb_context ; + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : uint32_t _nb_inst_insert ; + + public : uint32_t _size_front_end_id ; + public : uint32_t _size_context_id ; + public : uint32_t _size_general_register ; + public : uint32_t _size_special_register ; + + public : uint32_t _have_port_context_id ; + public : uint32_t _have_port_front_end_id; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_front_end , + uint32_t max_nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + uint32_t nb_inst_insert ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters & x); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp (revision 78) @@ -0,0 +1,245 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::Dependency_checking_unit" + Dependency_checking_unit::Dependency_checking_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif +# endif + + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Method - genMealy"); + + SC_METHOD (genMealy); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0;i<_param->_nb_inst_insert; i++) + { + sensitive // << (*(in_RENAME_IN_VAL [i])) +// << (*(in_RENAME_OUT_ACK [i])) + << (*(in_RENAME_IN_READ_RA [i])) + << (*(in_RENAME_IN_NUM_REG_RA_LOG [i])) + << (*(in_RENAME_IN_NUM_REG_RA_PHY [i])) + << (*(in_RENAME_IN_READ_RB [i])) + << (*(in_RENAME_IN_NUM_REG_RB_LOG [i])) + << (*(in_RENAME_IN_NUM_REG_RB_PHY [i])) + << (*(in_RENAME_IN_READ_RC [i])) + << (*(in_RENAME_IN_NUM_REG_RC_LOG [i])) + << (*(in_RENAME_IN_NUM_REG_RC_PHY [i])) + << (*(in_RENAME_IN_WRITE_RD [i])) + << (*(in_RENAME_IN_NUM_REG_RD_LOG [i])) + << (*(in_RENAME_IN_NUM_REG_RD_PHY_OLD [i])) + << (*(in_RENAME_IN_NUM_REG_RD_PHY_NEW [i])) + << (*(in_RENAME_IN_WRITE_RE [i])) + << (*(in_RENAME_IN_NUM_REG_RE_LOG [i])) + << (*(in_RENAME_IN_NUM_REG_RE_PHY_OLD [i])) + << (*(in_RENAME_IN_NUM_REG_RE_PHY_NEW [i])); + if (_param->_have_port_front_end_id) + sensitive << (*(in_RENAME_IN_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + sensitive << (*(in_RENAME_IN_CONTEXT_ID [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0;i<_param->_nb_inst_insert; i++) + { +// (*(out_RENAME_OUT_VAL [i])) (*(in_RENAME_IN_VAL [i])); +// (*(out_RENAME_IN_ACK [i])) (*(in_RENAME_OUT_ACK [i])); + if (_param->_have_port_front_end_id) + (*(out_RENAME_OUT_FRONT_END_ID [i])) (*(in_RENAME_IN_FRONT_END_ID [i])); + if (_param->_have_port_context_id) + (*(out_RENAME_OUT_CONTEXT_ID [i])) (*(in_RENAME_IN_CONTEXT_ID [i])); + (*(out_RENAME_OUT_READ_RA [i])) (*(in_RENAME_IN_READ_RA [i])); + (*(out_RENAME_OUT_NUM_REG_RA_LOG [i])) (*(in_RENAME_IN_NUM_REG_RA_LOG [i])); + (*(out_RENAME_OUT_READ_RB [i])) (*(in_RENAME_IN_READ_RB [i])); + (*(out_RENAME_OUT_NUM_REG_RB_LOG [i])) (*(in_RENAME_IN_NUM_REG_RB_LOG [i])); + (*(out_RENAME_OUT_READ_RC [i])) (*(in_RENAME_IN_READ_RC [i])); + (*(out_RENAME_OUT_NUM_REG_RC_LOG [i])) (*(in_RENAME_IN_NUM_REG_RC_LOG [i])); + (*(out_RENAME_OUT_WRITE_RD [i])) (*(in_RENAME_IN_WRITE_RD [i])); + (*(out_RENAME_OUT_NUM_REG_RD_LOG [i])) (*(in_RENAME_IN_NUM_REG_RD_LOG [i])); + (*(out_RENAME_OUT_NUM_REG_RD_PHY_NEW [i])) (*(in_RENAME_IN_NUM_REG_RD_PHY_NEW [i])); + (*(out_RENAME_OUT_WRITE_RE [i])) (*(in_RENAME_IN_WRITE_RE [i])); + (*(out_RENAME_OUT_NUM_REG_RE_LOG [i])) (*(in_RENAME_IN_NUM_REG_RE_LOG [i])); + (*(out_RENAME_OUT_NUM_REG_RE_PHY_NEW [i])) (*(in_RENAME_IN_NUM_REG_RE_PHY_NEW [i])); + + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RD_PHY_OLD [i])); + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_WRITE_RD [i])); + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RD_LOG [i])); + for (int32_t j=i-1; j>=0; j--) + { + if (_param->_have_port_front_end_id) + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_FRONT_END_ID [j])); + if (_param->_have_port_context_id) + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_CONTEXT_ID [j])); + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_WRITE_RD [j])); + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RD_LOG [j])); + (*(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RD_PHY_NEW [j])); + } + + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RE_PHY_OLD [i])); + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_WRITE_RE [i])); + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RE_LOG [i])); + for (int32_t j=i-1; j>=0; j--) + { + if (_param->_have_port_front_end_id) + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_FRONT_END_ID [j])); + if (_param->_have_port_context_id) + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_CONTEXT_ID [j])); + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_WRITE_RE [j])); + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RE_LOG [j])); + (*(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i])) (*(in_RENAME_IN_NUM_REG_RE_PHY_NEW [j])); + } + + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_NUM_REG_RA_PHY [i])); + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_READ_RA [i])); + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_NUM_REG_RA_LOG [i])); + for (int32_t j=i-1; j>=0; j--) + { + if (_param->_have_port_front_end_id) + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_FRONT_END_ID [j])); + if (_param->_have_port_context_id) + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_CONTEXT_ID [j])); + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_WRITE_RD [j])); + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_NUM_REG_RD_LOG [j])); + (*(out_RENAME_OUT_NUM_REG_RA_PHY [i])) (*(in_RENAME_IN_NUM_REG_RD_PHY_NEW [j])); + } + + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_NUM_REG_RB_PHY [i])); + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_READ_RB [i])); + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_NUM_REG_RB_LOG [i])); + for (int32_t j=i-1; j>=0; j--) + { + if (_param->_have_port_front_end_id) + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_FRONT_END_ID [j])); + if (_param->_have_port_context_id) + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_CONTEXT_ID [j])); + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_WRITE_RD [j])); + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_NUM_REG_RD_LOG [j])); + (*(out_RENAME_OUT_NUM_REG_RB_PHY [i])) (*(in_RENAME_IN_NUM_REG_RD_PHY_NEW [j])); + } + + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_NUM_REG_RC_PHY [i])); + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_READ_RC [i])); + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_NUM_REG_RC_LOG [i])); + for (int32_t j=i-1; j>=0; j--) + { + if (_param->_have_port_front_end_id) + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_FRONT_END_ID [j])); + if (_param->_have_port_context_id) + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_CONTEXT_ID [j])); + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_WRITE_RE [j])); + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_NUM_REG_RE_LOG [j])); + (*(out_RENAME_OUT_NUM_REG_RC_PHY [i])) (*(in_RENAME_IN_NUM_REG_RE_PHY_NEW [j])); + } + } +# endif + + } +#endif + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::~Dependency_checking_unit" + Dependency_checking_unit::~Dependency_checking_unit (void) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Dependency_checking_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp (revision 78) @@ -0,0 +1,129 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::allocation" + void Dependency_checking_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Dependency_checking_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + + // ~~~~~[ Interface "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("rename_in", IN, EAST, "Registers before near dependency checking", _param->_nb_inst_insert); + +// ALLOC1_VALACK_IN ( in_RENAME_IN_VAL ,VAL); +// ALLOC1_VALACK_OUT(out_RENAME_IN_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register ); + } + + // ~~~~~[ Interface "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("rename_out", OUT, WEST, "Registers after near dependency checking", _param->_nb_inst_insert); + +// ALLOC1_VALACK_OUT(out_RENAME_OUT_VAL ,VAL); +// ALLOC1_VALACK_IN ( in_RENAME_OUT_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register ); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp (revision 78) @@ -0,0 +1,94 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::deallocation" + void Dependency_checking_unit::deallocation (void) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + +// delete [] in_RENAME_IN_VAL ; +// delete [] out_RENAME_IN_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RENAME_IN_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RENAME_IN_CONTEXT_ID ; + delete [] in_RENAME_IN_READ_RA ; + delete [] in_RENAME_IN_NUM_REG_RA_LOG ; + delete [] in_RENAME_IN_NUM_REG_RA_PHY ; + delete [] in_RENAME_IN_READ_RB ; + delete [] in_RENAME_IN_NUM_REG_RB_LOG ; + delete [] in_RENAME_IN_NUM_REG_RB_PHY ; + delete [] in_RENAME_IN_READ_RC ; + delete [] in_RENAME_IN_NUM_REG_RC_LOG ; + delete [] in_RENAME_IN_NUM_REG_RC_PHY ; + delete [] in_RENAME_IN_WRITE_RD ; + delete [] in_RENAME_IN_NUM_REG_RD_LOG ; + delete [] in_RENAME_IN_NUM_REG_RD_PHY_OLD ; + delete [] in_RENAME_IN_NUM_REG_RD_PHY_NEW ; + delete [] in_RENAME_IN_WRITE_RE ; + delete [] in_RENAME_IN_NUM_REG_RE_LOG ; + delete [] in_RENAME_IN_NUM_REG_RE_PHY_OLD ; + delete [] in_RENAME_IN_NUM_REG_RE_PHY_NEW ; + +// delete [] out_RENAME_OUT_VAL ; +// delete [] in_RENAME_OUT_ACK ; + if (_param->_have_port_front_end_id) + delete [] out_RENAME_OUT_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] out_RENAME_OUT_CONTEXT_ID ; + delete [] out_RENAME_OUT_READ_RA ; + delete [] out_RENAME_OUT_NUM_REG_RA_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RA_PHY ; + delete [] out_RENAME_OUT_READ_RB ; + delete [] out_RENAME_OUT_NUM_REG_RB_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RB_PHY ; + delete [] out_RENAME_OUT_READ_RC ; + delete [] out_RENAME_OUT_NUM_REG_RC_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RC_PHY ; + delete [] out_RENAME_OUT_WRITE_RD ; + delete [] out_RENAME_OUT_NUM_REG_RD_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RD_PHY_OLD; + delete [] out_RENAME_OUT_NUM_REG_RD_PHY_NEW; + delete [] out_RENAME_OUT_WRITE_RE ; + delete [] out_RENAME_OUT_NUM_REG_RE_LOG ; + delete [] out_RENAME_OUT_NUM_REG_RE_PHY_OLD; + delete [] out_RENAME_OUT_NUM_REG_RE_PHY_NEW; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::end_cycle" +void Dependency_checking_unit::end_cycle () + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp (revision 78) @@ -0,0 +1,181 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::genMealy" + void Dependency_checking_unit::genMealy (void) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + +// Tcontrol_t val [_param->_nb_inst_insert]; +// Tcontrol_t ack [_param->_nb_inst_insert]; + Tcontext_t front_end_id [_param->_nb_inst_insert]; + Tcontext_t context_id [_param->_nb_inst_insert]; + Tcontrol_t read_ra [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_ra_log [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_ra_phy [_param->_nb_inst_insert]; + Tcontrol_t read_rb [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_rb_log [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_rb_phy [_param->_nb_inst_insert]; + Tcontrol_t read_rc [_param->_nb_inst_insert]; + Tspecial_address_t num_reg_rc_log [_param->_nb_inst_insert]; + Tspecial_address_t num_reg_rc_phy [_param->_nb_inst_insert]; + Tcontrol_t write_rd [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_rd_log [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_rd_phy_old [_param->_nb_inst_insert]; + Tgeneral_address_t num_reg_rd_phy_new [_param->_nb_inst_insert]; + Tcontrol_t write_re [_param->_nb_inst_insert]; + Tspecial_address_t num_reg_re_log [_param->_nb_inst_insert]; + Tspecial_address_t num_reg_re_phy_old [_param->_nb_inst_insert]; + Tspecial_address_t num_reg_re_phy_new [_param->_nb_inst_insert]; + + // 4 dependency : + // * Read after Read : it's a false dependency + // * Write after Read : it's inhibt by rename process + // * Write after Write : for the num_reg_old + // * Read after Write : dependency + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + // =====[ Input ]================================================== +// val [i] = PORT_READ(in_RENAME_IN_VAL [i]); +// ack [i] = PORT_READ(in_RENAME_OUT_ACK [i]); + front_end_id [i] = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [i]):0; + context_id [i] = (_param->_have_port_context_id )?PORT_READ(in_RENAME_IN_CONTEXT_ID [i]):0; + read_ra [i] = PORT_READ(in_RENAME_IN_READ_RA [i]); + num_reg_ra_log [i] = PORT_READ(in_RENAME_IN_NUM_REG_RA_LOG [i]); + num_reg_ra_phy [i] = PORT_READ(in_RENAME_IN_NUM_REG_RA_PHY [i]); + read_rb [i] = PORT_READ(in_RENAME_IN_READ_RB [i]); + num_reg_rb_log [i] = PORT_READ(in_RENAME_IN_NUM_REG_RB_LOG [i]); + num_reg_rb_phy [i] = PORT_READ(in_RENAME_IN_NUM_REG_RB_PHY [i]); + read_rc [i] = PORT_READ(in_RENAME_IN_READ_RC [i]); + num_reg_rc_log [i] = PORT_READ(in_RENAME_IN_NUM_REG_RC_LOG [i]); + num_reg_rc_phy [i] = PORT_READ(in_RENAME_IN_NUM_REG_RC_PHY [i]); + write_rd [i] = PORT_READ(in_RENAME_IN_WRITE_RD [i]); + num_reg_rd_log [i] = PORT_READ(in_RENAME_IN_NUM_REG_RD_LOG [i]); + num_reg_rd_phy_old [i] = PORT_READ(in_RENAME_IN_NUM_REG_RD_PHY_OLD [i]); + num_reg_rd_phy_new [i] = PORT_READ(in_RENAME_IN_NUM_REG_RD_PHY_NEW [i]); + write_re [i] = PORT_READ(in_RENAME_IN_WRITE_RE [i]); + num_reg_re_log [i] = PORT_READ(in_RENAME_IN_NUM_REG_RE_LOG [i]); + num_reg_re_phy_old [i] = PORT_READ(in_RENAME_IN_NUM_REG_RE_PHY_OLD [i]); + num_reg_re_phy_new [i] = PORT_READ(in_RENAME_IN_NUM_REG_RE_PHY_NEW [i]); + + // ================================================================ + // =====[ Write after Write ]====================================== + // ================================================================ + if (write_rd [i]) + // Inverse scan : with x < y, instruction x is before in the sequential order program that the instruction y + for (int32_t j=i-1; j>=0; j--) + if ((write_rd [j] == 1 ) and + (num_reg_rd_log [j] == num_reg_rd_log [i]) and + (front_end_id [j] == front_end_id [i]) and + (context_id [j] == context_id [i]) ) + { + num_reg_rd_phy_old [i] = num_reg_rd_phy_new [j]; + break; // find the most recently dependency + } + + if (write_re [i]) + // Inverse scan : with x < y, instruction x is before in the sequential order program that the instruction y + for (int32_t j=i-1; j>=0; j--) + if ((write_re [j] == 1 ) and + (num_reg_re_log [j] == num_reg_re_log [i]) and + (front_end_id [j] == front_end_id [i]) and + (context_id [j] == context_id [i]) ) + { + num_reg_re_phy_old [i] = num_reg_re_phy_new [j]; + break; // find the most recently dependency + } + // ================================================================ + // =====[ Read after Write ]====================================== + // ================================================================ + if (read_ra [i]) + // Inverse scan : with x < y, instruction x is before in the sequential order program that the instruction y + for (int32_t j=i-1; j>=0; j--) + if ((write_rd [j] == 1 ) and + (num_reg_rd_log [j] == num_reg_ra_log [i]) and + (front_end_id [j] == front_end_id [i]) and + (context_id [j] == context_id [i]) ) + { + num_reg_ra_phy [i] = num_reg_rd_phy_new [j]; + break; // find the most recently dependency + } + + if (read_rb [i]) + // Inverse scan : with x < y, instruction x is before in the sequential order program that the instruction y + for (int32_t j=i-1; j>=0; j--) + if ((write_rd [j] == 1 ) and + (num_reg_rd_log [j] == num_reg_rb_log [i]) and + (front_end_id [j] == front_end_id [i]) and + (context_id [j] == context_id [i]) ) + { + num_reg_rb_phy [i] = num_reg_rd_phy_new [j]; + break; // find the most recently dependency + } + + if (read_rc [i]) + // Inverse scan : with x < y, instruction x is before in the sequential order program that the instruction y + for (int32_t j=i-1; j>=0; j--) + if ((write_re [j] == 1 ) and + (num_reg_re_log [j] == num_reg_rc_log [i]) and + (front_end_id [j] == front_end_id [i]) and + (context_id [j] == context_id [i]) ) + { + num_reg_rc_phy [i] = num_reg_re_phy_new [j]; + break; // find the most recently dependency + } + + // =====[ Output ]================================================= +// PORT_WRITE(out_RENAME_OUT_VAL [i], val [i]); +// PORT_WRITE(out_RENAME_IN_ACK [i], ack [i]); + if (_param->_have_port_front_end_id) + PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i], front_end_id [i]); + if (_param->_have_port_context_id) + PORT_WRITE(out_RENAME_OUT_CONTEXT_ID [i], context_id [i]); + PORT_WRITE(out_RENAME_OUT_READ_RA [i], read_ra [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RA_LOG [i], num_reg_ra_log [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RA_PHY [i], num_reg_ra_phy [i]); + PORT_WRITE(out_RENAME_OUT_READ_RB [i], read_rb [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RB_LOG [i], num_reg_rb_log [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RB_PHY [i], num_reg_rb_phy [i]); + PORT_WRITE(out_RENAME_OUT_READ_RC [i], read_rc [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RC_LOG [i], num_reg_rc_log [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RC_PHY [i], num_reg_rc_phy [i]); + PORT_WRITE(out_RENAME_OUT_WRITE_RD [i], write_rd [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RD_LOG [i], num_reg_rd_log [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RD_PHY_NEW [i], num_reg_rd_phy_new [i]); + PORT_WRITE(out_RENAME_OUT_WRITE_RE [i], write_re [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RE_LOG [i], num_reg_re_log [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old [i]); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RE_PHY_NEW [i], num_reg_re_phy_new [i]); + } + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_statistics_declaration.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::statistics_declaration" + void Dependency_checking_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Dependency_checking_unit", + param_statistics); + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_transition.cpp (revision 78) @@ -0,0 +1,45 @@ +#ifdef SYSTEMC +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::transition" + void Dependency_checking_unit::transition (void) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::vhdl" + void Dependency_checking_unit::vhdl (void) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::vhdl_body" + void Dependency_checking_unit::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::vhdl_declaration" + void Dependency_checking_unit::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,73 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::Parameters" + Parameters::Parameters (uint32_t nb_front_end , + uint32_t max_nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + uint32_t nb_inst_insert ) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + _nb_front_end = nb_front_end ; + _max_nb_context = max_nb_context ; + _nb_general_register = nb_general_register; + _nb_special_register = nb_special_register; + _nb_inst_insert = nb_inst_insert ; + + _size_front_end_id = log2(nb_front_end ); + _size_context_id = log2(max_nb_context ); + _size_general_register = log2(nb_general_register); + _size_special_register = log2(nb_special_register); + + _have_port_front_end_id = _size_front_end_id>0; + _have_port_context_id = _size_context_id >0; + + test(); + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Dependency_checking_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,43 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + std::string msg = ""; + + return msg; + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,64 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace dependency_checking_unit { + + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + XML xml ("dependency_checking_unit"); + + xml.balise_open("dependency_checking_unit"); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("max_nb_context "); xml.attribut("value",toString(_max_nb_context )); xml.singleton_end(); + xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Dependency_checking_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Parameters & x) + { + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace dependency_checking_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libFree_List_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Free_List_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Free_List_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit + +#-----[ Library ]------------------------------------------ + +Free_List_unit_LIBRARY = -lFree_List_unit \ + $(Behavioural_LIBRARY) + +Free_List_unit_DIR_LIBRARY = -L$(Free_List_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Free_List_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Free_List_unit_DIR) --makefile=Makefile; + +Free_List_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Free_List_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Free_List_unit_LIBRARY) + +DIR_LIBRARY = $(Free_List_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Free_List_unit_library + +library_clean : Free_List_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/config_mono_pop.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/config_mono_pop.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/config_mono_pop.cfg (revision 78) @@ -0,0 +1,8 @@ +Free_List_unit +1 1 *2 # nb_thread +64 64 *2 # nb_general_register +16 16 *2 # nb_special_register +1 4 *2 # nb_bank +1 1 *2 # nb_pop +1 4 *2 # nb_push +0 1 +1 # priority Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/config_multi_pop.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/config_multi_pop.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/config_multi_pop.cfg (revision 78) @@ -0,0 +1,8 @@ +Free_List_unit +1 1 *2 # nb_thread +64 64 *2 # nb_general_register +16 16 *2 # nb_special_register +4 8 *2 # nb_bank +1 4 *2 # nb_pop +2 2 *2 # nb_push +0 1 +1 # priority Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,78 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/include/test.h" + +#define NB_PARAMS 7 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_("nb_thread (uint32_t )\n")); + err (_("nb_general_register (uint32_t )\n")); + err (_("nb_special_register (uint32_t )\n")); + err (_("nb_bank (uint32_t )\n")); + err (_("nb_pop (uint32_t )\n")); + err (_("nb_push (uint32_t )\n")); + err (_("priority (Tpriority_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != 2+NB_PARAMS) + usage (argc, argv); + + uint32_t x = 1; + + const string name = argv[x++]; +//const uint32_t size_data = atoi(argv[x++]); +//const uint32_t nb_port = atoi(argv[x++]); + + uint32_t _nb_thread = atoi(argv[x++]); + uint32_t _nb_general_register = atoi(argv[x++]); + uint32_t _nb_special_register = atoi(argv[x++]); + uint32_t _nb_bank = atoi(argv[x++]); + uint32_t _nb_pop = atoi(argv[x++]); + uint32_t _nb_push = atoi(argv[x++]); + Tpriority_t _priority = fromString(argv[x++]); + + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters + (_nb_thread , + _nb_general_register, + _nb_special_register, + _nb_bank , + _nb_pop , + _nb_push , + _priority ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + exit (EXIT_FAILURE); + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + exit (EXIT_FAILURE); + } + + return (EXIT_SUCCESS); +} + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,268 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Free_List_unit * _Free_List_unit = new Free_List_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_POP_VAL ," in_POP_VAL ",Tcontrol_t ,_param->_nb_pop ); + ALLOC1_SC_SIGNAL(out_POP_ACK ,"out_POP_ACK ",Tcontrol_t ,_param->_nb_pop ); + ALLOC1_SC_SIGNAL( in_POP_GPR_VAL ," in_POP_GPR_VAL ",Tcontrol_t ,_param->_nb_pop ); + ALLOC1_SC_SIGNAL(out_POP_GPR_NUM_REG ,"out_POP_GPR_NUM_REG ",Tgeneral_address_t,_param->_nb_pop ); + ALLOC1_SC_SIGNAL( in_POP_SPR_VAL ," in_POP_SPR_VAL ",Tcontrol_t ,_param->_nb_pop ); + ALLOC1_SC_SIGNAL(out_POP_SPR_NUM_REG ,"out_POP_SPR_NUM_REG ",Tspecial_address_t,_param->_nb_pop ); + ALLOC1_SC_SIGNAL( in_PUSH_GPR_VAL ," in_PUSH_GPR_VAL ",Tcontrol_t ,_param->_nb_push); + ALLOC1_SC_SIGNAL(out_PUSH_GPR_ACK ,"out_PUSH_GPR_ACK ",Tcontrol_t ,_param->_nb_push); + ALLOC1_SC_SIGNAL( in_PUSH_GPR_NUM_REG," in_PUSH_GPR_NUM_REG",Tgeneral_address_t,_param->_nb_push); + ALLOC1_SC_SIGNAL( in_PUSH_SPR_VAL ," in_PUSH_SPR_VAL ",Tcontrol_t ,_param->_nb_push); + ALLOC1_SC_SIGNAL(out_PUSH_SPR_ACK ,"out_PUSH_SPR_ACK ",Tcontrol_t ,_param->_nb_push); + ALLOC1_SC_SIGNAL( in_PUSH_SPR_NUM_REG," in_PUSH_SPR_NUM_REG",Tspecial_address_t,_param->_nb_push); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Free_List_unit.\n"),name.c_str()); + + (*(_Free_List_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Free_List_unit->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_POP_VAL ,_param->_nb_pop ); + INSTANCE1_SC_SIGNAL(_Free_List_unit,out_POP_ACK ,_param->_nb_pop ); + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_POP_GPR_VAL ,_param->_nb_pop ); + INSTANCE1_SC_SIGNAL(_Free_List_unit,out_POP_GPR_NUM_REG ,_param->_nb_pop ); + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_POP_SPR_VAL ,_param->_nb_pop ); + INSTANCE1_SC_SIGNAL(_Free_List_unit,out_POP_SPR_NUM_REG ,_param->_nb_pop ); + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_PUSH_GPR_VAL ,_param->_nb_push); + INSTANCE1_SC_SIGNAL(_Free_List_unit,out_PUSH_GPR_ACK ,_param->_nb_push); + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_PUSH_GPR_NUM_REG,_param->_nb_push); + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_PUSH_SPR_VAL ,_param->_nb_push); + INSTANCE1_SC_SIGNAL(_Free_List_unit,out_PUSH_SPR_ACK ,_param->_nb_push); + INSTANCE1_SC_SIGNAL(_Free_List_unit, in_PUSH_SPR_NUM_REG,_param->_nb_push); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_pop = 75; + const int32_t percent_transaction_push = 75; + + bool gpr_free [_param->_nb_general_register]; + bool spr_free [_param->_nb_general_register]; + + for (uint32_t i=0; i<_param->_nb_general_register; i++) + gpr_free [i] = false; + for (uint32_t i=0; i<_param->_nb_special_register; i++) + spr_free [i] = false; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + + LABEL("After reset all free-list is empty"); + + // Test GPR + for (uint32_t i=0; i<_param->_nb_pop; i++) + { + in_POP_GPR_VAL [i]->write(1); + } + SC_START(0); + + for (uint32_t i=0; i<_param->_nb_pop; i++) + TEST(Tcontrol_t, out_POP_ACK[i]->read(), false); + + // Test SPR + for (uint32_t i=0; i<_param->_nb_pop; i++) + { + in_POP_GPR_VAL [i]->write(0); + in_POP_SPR_VAL [i]->write(1); + } + SC_START(0); + + for (uint32_t i=0; i<_param->_nb_pop; i++) + TEST(Tcontrol_t, out_POP_ACK[i]->read(), false); + + // Reset val + for (uint32_t i=0; i<_param->_nb_pop; i++) + { + in_POP_GPR_VAL [i]->write(0); + in_POP_SPR_VAL [i]->write(0); + } + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration 1) + { + for (uint32_t i=0; i<_param->_nb_push; i++) + { + Tgeneral_address_t gpr_reg = rand()%_param->_nb_general_register; + in_PUSH_GPR_VAL [i]->write(not gpr_free[gpr_reg] and ((rand()%100)write(gpr_reg); + + Tspecial_address_t spr_reg = rand()%_param->_nb_special_register; + in_PUSH_SPR_VAL [i]->write(not spr_free[spr_reg] and ((rand()%100)write(spr_reg); + } + + for (uint32_t i=0; i<_param->_nb_pop; i++) + { + in_POP_VAL [i]->write((rand()%100)write(rand()%2); + in_POP_SPR_VAL [i]->write(rand()%2); + } + + SC_START(0); + + for (uint32_t i=0; i<_param->_nb_pop; i++) + if (in_POP_VAL [i]->read() and out_POP_ACK[i]->read()) + { + nb_request --; + if (in_POP_GPR_VAL [i]->read()) + { + Tgeneral_address_t reg = out_POP_GPR_NUM_REG [i]->read(); + + TEST(bool, gpr_free[reg],true); + + Tgeneral_address_t bank = reg >> _param->_bank_gpr_size_slot; + TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); + + gpr_free[reg] = false; + } + + if (in_POP_SPR_VAL [i]->read()) + { + Tspecial_address_t reg = out_POP_SPR_NUM_REG [i]->read(); + + TEST(bool,spr_free[reg],true); + + Tspecial_address_t bank = reg >> _param->_bank_spr_size_slot; + TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); + + spr_free[reg] = false; + } + } + + for (uint32_t i=0; i<_param->_nb_push; i++) + { + if (in_PUSH_GPR_VAL [i]->read() and out_PUSH_GPR_ACK [i]->read()) + gpr_free[in_PUSH_GPR_NUM_REG [i]->read()] = true; + if (in_PUSH_SPR_VAL [i]->read() and out_PUSH_SPR_ACK [i]->read()) + spr_free[in_PUSH_SPR_NUM_REG [i]->read()] = true; + } + SC_START(1); + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_POP_VAL ; + delete [] out_POP_ACK ; + delete [] in_POP_GPR_VAL ; + delete [] out_POP_GPR_NUM_REG ; + delete [] in_POP_SPR_VAL ; + delete [] out_POP_SPR_NUM_REG ; + delete [] in_PUSH_GPR_VAL ; + delete [] out_PUSH_GPR_ACK ; + delete [] in_PUSH_GPR_NUM_REG; + delete [] in_PUSH_SPR_VAL ; + delete [] out_PUSH_SPR_ACK ; + delete [] in_PUSH_SPR_NUM_REG; +#endif + + delete _Free_List_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/Free_List_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/Free_List_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/Free_List_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Free_List_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h (revision 78) @@ -0,0 +1,163 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_free_list_unit_Free_List_unit_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_free_list_unit_Free_List_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + + class Free_List_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // Interface + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_POP_VAL ; + public : SC_OUT(Tcontrol_t) ** out_POP_ACK ; + public : SC_IN (Tcontrol_t ) ** in_POP_GPR_VAL ; // write_rd + public : SC_OUT(Tgeneral_address_t) ** out_POP_GPR_NUM_REG; // num_reg_rd + public : SC_IN (Tcontrol_t ) ** in_POP_SPR_VAL ; // write_re + public : SC_OUT(Tspecial_address_t) ** out_POP_SPR_NUM_REG; // num_reg_re + + // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PUSH_GPR_VAL ; // gpr_free (cf stat_list) + public : SC_OUT(Tcontrol_t) ** out_PUSH_GPR_ACK ; + public : SC_IN (Tgeneral_address_t) ** in_PUSH_GPR_NUM_REG; + + // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PUSH_SPR_VAL ; // spr_free (cf stat_list) + public : SC_OUT(Tcontrol_t) ** out_PUSH_SPR_ACK ; + public : SC_IN (Tspecial_address_t) ** in_PUSH_SPR_NUM_REG; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : std::list * _gpr_list; //[nb_bank] + private : std::list * _spr_list; //[nb_bank] + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t internal_BANK_PRIORITY; + + private : Tcontrol_t * internal_POP_ACK ; //[nb_pop] + private : uint32_t * internal_POP_GPR_BANK ; //[nb_pop] + private : uint32_t * internal_POP_SPR_BANK ; //[nb_pop] + + private : Tcontrol_t * internal_PUSH_GPR_ACK ; //[nb_push] + private : Tcontrol_t * internal_PUSH_SPR_ACK ; //[nb_push] + private : uint32_t * internal_PUSH_GPR_BANK; //[nb_push] + private : uint32_t * internal_PUSH_SPR_BANK; //[nb_push] +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Free_List_unit); +#endif + public : Free_List_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Free_List_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMealy_pop (void); + public : void genMealy_push_gpr (void); + public : void genMealy_push_spr (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h (revision 78) @@ -0,0 +1,75 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_free_list_unit_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_free_list_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_thread ; + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : uint32_t _nb_bank ; + public : uint32_t _nb_pop ; + public : uint32_t _nb_push ; + public : Tpriority_t _priority ; + + public : uint32_t _size_general_register; + public : uint32_t _size_special_register; + + public : uint32_t _nb_bank_by_pop ; + public : uint32_t _bank_gpr_nb_slot ; + public : uint32_t _bank_gpr_size_slot ; + public : uint32_t _bank_spr_nb_slot ; + public : uint32_t _bank_spr_size_slot ; + public : uint32_t _mask_gpr ; + public : uint32_t _mask_spr ; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_thread , + uint32_t nb_general_register, + uint32_t nb_special_register, + uint32_t nb_bank , + uint32_t nb_pop , + uint32_t nb_push , + Tpriority_t priority ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters & x); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp (revision 78) @@ -0,0 +1,174 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::Free_List_unit" + Free_List_unit::Free_List_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + log_printf(INFO,Free_List_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Free_List_unit,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Free_List_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Free_List_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Free_List_unit,FUNCTION,"Method - genMealy_pop"); + + SC_METHOD (genMealy_pop); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_pop; i++) + sensitive << (*(in_POP_GPR_VAL[i])) + << (*(in_POP_SPR_VAL[i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_pop; i++) + { + (*(out_POP_GPR_NUM_REG [i])) (*(in_POP_GPR_VAL[i])); + (*(out_POP_SPR_NUM_REG [i])) (*(in_POP_SPR_VAL[i])); + (*(out_POP_ACK [i])) (*(in_POP_GPR_VAL[i])); + (*(out_POP_ACK [i])) (*(in_POP_SPR_VAL[i])); + } +# endif + + log_printf(INFO,Free_List_unit,FUNCTION,"Method - genMealy_push_gpr"); + + SC_METHOD (genMealy_push_gpr); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_push; i++) + sensitive << (*(in_PUSH_GPR_VAL [i])) + << (*(in_PUSH_GPR_NUM_REG[i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_push; i++) + { + (*(out_PUSH_GPR_ACK [i])) (*(in_PUSH_GPR_VAL [i])); + (*(out_PUSH_GPR_ACK [i])) (*(in_PUSH_GPR_NUM_REG[i])); + } +# endif + + log_printf(INFO,Free_List_unit,FUNCTION,"Method - genMealy_push_spr"); + + SC_METHOD (genMealy_push_spr); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_push; i++) + sensitive << (*(in_PUSH_SPR_VAL [i])) + << (*(in_PUSH_SPR_NUM_REG[i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_push; i++) + { + (*(out_PUSH_SPR_ACK [i])) (*(in_PUSH_SPR_VAL [i])); + (*(out_PUSH_SPR_ACK [i])) (*(in_PUSH_SPR_NUM_REG[i])); + } +# endif + +#endif + } + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Free_List_unit::~Free_List_unit" + Free_List_unit::~Free_List_unit (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Free_List_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Free_List_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp (revision 78) @@ -0,0 +1,116 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::allocation" + void Free_List_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Free_List_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + + // ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("pop", IN, NORTH, "New destination register", _param->_nb_pop); + + ALLOC1_VALACK_IN ( in_POP_VAL ,VAL); + ALLOC1_VALACK_OUT(out_POP_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_POP_GPR_VAL ,"gpr_val" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_POP_GPR_NUM_REG,"gpr_num_reg",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_POP_SPR_VAL ,"spr_val" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_POP_SPR_NUM_REG,"spr_num_reg",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("push_gpr", IN, NORTH, "General register free", _param->_nb_push); + + ALLOC1_VALACK_IN ( in_PUSH_GPR_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PUSH_GPR_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PUSH_GPR_NUM_REG,"num_reg",Tgeneral_address_t,_param->_size_general_register); + } + + // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("push_spr", IN, NORTH, "General register free", _param->_nb_push); + + ALLOC1_VALACK_IN ( in_PUSH_SPR_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PUSH_SPR_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PUSH_SPR_NUM_REG,"num_reg",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _gpr_list = new std::list [_param->_nb_bank]; + _spr_list = new std::list [_param->_nb_bank]; + + internal_POP_ACK = new Tcontrol_t [_param->_nb_pop]; + internal_POP_GPR_BANK = new uint32_t [_param->_nb_pop]; + internal_POP_SPR_BANK = new uint32_t [_param->_nb_pop]; + + internal_PUSH_GPR_ACK = new Tcontrol_t [_param->_nb_push]; + internal_PUSH_SPR_ACK = new Tcontrol_t [_param->_nb_push]; + internal_PUSH_GPR_BANK = new uint32_t [_param->_nb_push]; + internal_PUSH_SPR_BANK = new uint32_t [_param->_nb_push]; + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp (revision 78) @@ -0,0 +1,72 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::deallocation" + void Free_List_unit::deallocation (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_POP_VAL ; + delete [] out_POP_ACK ; + delete [] in_POP_GPR_VAL ; + delete [] out_POP_GPR_NUM_REG; + delete [] in_POP_SPR_VAL ; + delete [] out_POP_SPR_NUM_REG; + + delete [] in_PUSH_GPR_VAL ; + delete [] out_PUSH_GPR_ACK ; + delete [] in_PUSH_GPR_NUM_REG; + + delete [] in_PUSH_SPR_VAL ; + delete [] out_PUSH_SPR_ACK ; + delete [] in_PUSH_SPR_NUM_REG; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] _gpr_list; + delete [] _spr_list; + + delete [] internal_POP_ACK ; + delete [] internal_POP_GPR_BANK; + delete [] internal_POP_SPR_BANK; + + delete [] internal_PUSH_GPR_ACK ; + delete [] internal_PUSH_SPR_ACK ; + delete [] internal_PUSH_GPR_BANK; + delete [] internal_PUSH_SPR_BANK; + + delete _component; + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::end_cycle" +void Free_List_unit::end_cycle () + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp (revision 78) @@ -0,0 +1,91 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::genMealy_pop" + void Free_List_unit::genMealy_pop (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_pop; i++) + { + uint32_t offset = i*_param->_nb_bank_by_pop; + + // GPR + bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]); + + if (not gpr_ack) + for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) + { + uint32_t bank = offset+((j+internal_BANK_PRIORITY)%_param->_nb_bank_by_pop); + + if (not _gpr_list[bank].empty()) + { + // find + gpr_ack = true; + internal_POP_GPR_BANK [i] = bank; + PORT_WRITE(out_POP_GPR_NUM_REG [i], + //(bank << _param->_shift) | + _gpr_list[bank].front()); + + break; + } + } + + // SPR + bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]); + + if (not spr_ack) + for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) + { + uint32_t bank = offset+((j+internal_BANK_PRIORITY)%_param->_nb_bank_by_pop); + + if (not _spr_list[bank].empty()) + { + // find + spr_ack = true; + internal_POP_SPR_BANK [i] = bank; + PORT_WRITE(out_POP_SPR_NUM_REG [i], + //(bank << _param->_shift) | + _spr_list[bank].front()); + + break; + } + } + + internal_POP_ACK [i] = gpr_ack and spr_ack; + + PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); + } + + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp (revision 78) @@ -0,0 +1,65 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::genMealy_push_gpr" + void Free_List_unit::genMealy_push_gpr (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + bool bank_use [_param->_nb_bank]; + for (uint32_t i=0; i<_param->_nb_bank; i++) + bank_use [i] = false; + + for (uint32_t i=0; i<_param->_nb_push; i++) + { + bool gpr_ack = not PORT_READ(in_PUSH_GPR_VAL[i]); + + if (not gpr_ack) + { + // num_bank : MSB + uint32_t bank = PORT_READ(in_PUSH_GPR_NUM_REG[i]) >> _param->_bank_gpr_size_slot; + + if (not bank_use [bank]) + { + // find + gpr_ack = true; + internal_PUSH_GPR_BANK [i] = bank; + bank_use [bank] = true; + } + } + + internal_PUSH_GPR_ACK [i] = gpr_ack; + PORT_WRITE(out_PUSH_GPR_ACK [i], internal_PUSH_GPR_ACK [i]); + } + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp (revision 78) @@ -0,0 +1,65 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::genMealy_push_spr" + void Free_List_unit::genMealy_push_spr (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + bool bank_use [_param->_nb_bank]; + for (uint32_t i=0; i<_param->_nb_bank; i++) + bank_use [i] = false; + + for (uint32_t i=0; i<_param->_nb_push; i++) + { + bool spr_ack = not PORT_READ(in_PUSH_SPR_VAL[i]); + + if (not spr_ack) + { + // num_bank : MSB + uint32_t bank = PORT_READ(in_PUSH_SPR_NUM_REG[i]) >> _param->_bank_spr_size_slot; + + if (not bank_use [bank]) + { + // find + spr_ack = true; + internal_PUSH_SPR_BANK [i] = bank; + bank_use [bank] = true; + } + } + + internal_PUSH_SPR_ACK [i] = spr_ack; + PORT_WRITE(out_PUSH_SPR_ACK [i], internal_PUSH_SPR_ACK [i]); + } + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_statistics_declaration.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::statistics_declaration" + void Free_List_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Free_List_unit", + param_statistics); + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp (revision 78) @@ -0,0 +1,90 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::transition" + void Free_List_unit::transition (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + internal_BANK_PRIORITY = 0; + for (uint32_t i=0; i<_param->_nb_bank; i++) + { + _gpr_list[i].clear(); + _spr_list[i].clear(); + } + } + else + { + // ================================================== + // =====[ POP ]====================================== + // ================================================== +// log_printf(TRACE,Free_List_unit,FUNCTION,"Test transaction POP"); + for (uint32_t i=0; i<_param->_nb_pop; i++) + if (PORT_READ(in_POP_VAL[i]) and internal_POP_ACK [i]) + { + if (PORT_READ(in_POP_GPR_VAL [i])) + _gpr_list [internal_POP_GPR_BANK[i]].pop_front(); + + if (PORT_READ(in_POP_SPR_VAL [i])) + _spr_list [internal_POP_SPR_BANK[i]].pop_front(); + } + + // ================================================== + // =====[ PUSH_GPR ]================================= + // ================================================== +// log_printf(TRACE,Free_List_unit,FUNCTION,"Test transaction PUSH_GPR"); + for (uint32_t i=0; i<_param->_nb_push; i++) + if (PORT_READ(in_PUSH_GPR_VAL[i]) and internal_PUSH_GPR_ACK [i]) + _gpr_list [internal_PUSH_GPR_BANK[i]].push_back(//_param->_mask_gpr & + PORT_READ(in_PUSH_GPR_NUM_REG [i])); + + // ================================================== + // =====[ PUSH_SPR ]================================= + // ================================================== +// log_printf(TRACE,Free_List_unit,FUNCTION,"Test transaction PUSH_SPR"); + for (uint32_t i=0; i<_param->_nb_push; i++) + if (PORT_READ(in_PUSH_SPR_VAL[i]) and internal_PUSH_SPR_ACK [i]) + _spr_list [internal_PUSH_SPR_BANK[i]].push_back(//_param->_mask_spr & + PORT_READ(in_PUSH_SPR_NUM_REG [i])); + + if (_param->_priority == PRIORITY_ROUND_ROBIN) + internal_BANK_PRIORITY = (internal_BANK_PRIORITY+1)%_param->_nb_bank_by_pop; + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::vhdl" + void Free_List_unit::vhdl (void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::vhdl_body" + void Free_List_unit::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::vhdl_declaration" + void Free_List_unit::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,90 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h" +#include "Common/include/BitManipulation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::Parameters" + Parameters::Parameters (uint32_t nb_thread , + uint32_t nb_general_register, + uint32_t nb_special_register, + uint32_t nb_bank , + uint32_t nb_pop , + uint32_t nb_push , + Tpriority_t priority ) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + _nb_thread = nb_thread ; + _nb_general_register = nb_general_register; + _nb_special_register = nb_special_register; + _nb_bank = nb_bank ; + _nb_pop = nb_pop ; + _nb_push = nb_push ; + _priority = priority ; + + test(); + + _size_general_register = log2(nb_general_register); + _size_special_register = log2(nb_special_register); + + _nb_bank_by_pop = _nb_bank / _nb_pop; + + uint32_t gpr_nb_slot = nb_general_register - nb_thread*_nb_general_register_logic; + + _bank_gpr_nb_slot = gpr_nb_slot/nb_bank; + _bank_gpr_size_slot = _size_general_register-log2(nb_bank); + + _mask_gpr = gen_mask (_bank_gpr_size_slot); + + uint32_t spr_nb_slot = nb_special_register - nb_thread*_nb_special_register_logic; + + _bank_spr_nb_slot = spr_nb_slot/nb_bank; + _bank_spr_size_slot = _size_special_register-log2(nb_bank); + + _mask_spr = gen_mask (_bank_spr_size_slot); + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Free_List_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Free_List_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Free_List_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,56 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + std::string msg = ""; + + if (_nb_general_register <= _nb_thread*_nb_general_register_logic) + msg += " - The number of physical general register is insufficient.\n"; + if (_nb_special_register <= _nb_thread*_nb_special_register_logic) + msg += " - The number of physical special register is insufficient.\n"; + if (not is_multiple (_nb_bank, _nb_pop)) + msg += " - Number of pop must be a multiple of number of bank.\n"; + if (not is_power2 (_nb_bank)) + msg += " - Number of bank must be a power of 2.\n"; + + if ((_priority != PRIORITY_STATIC) and + (_priority != PRIORITY_ROUND_ROBIN)) + msg += " - Unsupported priority scheme. Supported scheme are "+toString(PRIORITY_STATIC)+" and "+toString(PRIORITY_ROUND_ROBIN)+".\n"; + + return msg; + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,65 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace free_list_unit { + + +#undef FUNCTION +#define FUNCTION "Free_List_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + XML xml ("free_list_unit"); + + xml.balise_open("free_list_unit"); + xml.singleton_begin("nb_thread "); xml.attribut("value",toString(_nb_thread )); xml.singleton_end(); + xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("nb_bank "); xml.attribut("value",toString(_nb_bank )); xml.singleton_end(); + xml.singleton_begin("nb_pop "); xml.attribut("value",toString(_nb_pop )); xml.singleton_end(); + xml.singleton_begin("nb_push "); xml.attribut("value",toString(_nb_push )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Free_List_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Parameters & x) + { + log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace free_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libRegister_translation_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.deps (revision 78) @@ -0,0 +1,75 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Register_translation_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +ifndef Dependency_checking_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/Makefile.deps +endif +ifndef Free_List_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps +endif +ifndef Register_Address_Translation_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.deps +endif +ifndef Stat_List_unit +include $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.deps +endif +ifndef Register_translation_unit_Glue +include $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.deps +endif + + + +#-----[ Directory ]---------------------------------------- + +Register_translation_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit + +#-----[ Library ]------------------------------------------ + +Register_translation_unit_LIBRARY = -lRegister_translation_unit \ + $(Behavioural_LIBRARY) \ + $(Register_Address_Translation_unit_LIBRARY) \ + $(Free_List_unit_LIBRARY) \ + $(Stat_List_unit_LIBRARY) \ + $(Dependency_checking_unit_LIBRARY) \ + $(Register_translation_unit_Glue_LIBRARY) + +Register_translation_unit_DIR_LIBRARY = -L$(Register_translation_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) \ + $(Register_Address_Translation_unit_DIR_LIBRARY)\ + $(Free_List_unit_DIR_LIBRARY) \ + $(Stat_List_unit_DIR_LIBRARY) \ + $(Dependency_checking_unit_DIR_LIBRARY) \ + $(Register_translation_unit_Glue_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Register_translation_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Register_Address_Translation_unit_library; \ + $(MAKE) Free_List_unit_library; \ + $(MAKE) Stat_List_unit_library; \ + $(MAKE) Dependency_checking_unit_library; \ + $(MAKE) Register_translation_unit_Glue_library; \ + $(MAKE) --directory=$(Register_translation_unit_DIR) --makefile=Makefile; + +Register_translation_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Register_Address_Translation_unit_library_clean;\ + $(MAKE) Free_List_unit_library_clean; \ + $(MAKE) Stat_List_unit_library_clean; \ + $(MAKE) Dependency_checking_unit_library_clean; \ + $(MAKE) Register_translation_unit_Glue_library_clean; \ + $(MAKE) --directory=$(Register_translation_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libRegister_Address_Translation_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Register_Address_Translation_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Register_Address_Translation_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit + +#-----[ Library ]------------------------------------------ + +Register_Address_Translation_unit_LIBRARY = -lRegister_Address_Translation_unit \ + $(Behavioural_LIBRARY) + +Register_Address_Translation_unit_DIR_LIBRARY = -L$(Register_Address_Translation_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Register_Address_Translation_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Register_Address_Translation_unit_DIR) --makefile=Makefile; + +Register_Address_Translation_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Register_Address_Translation_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Register_Address_Translation_unit_LIBRARY) + +DIR_LIBRARY = $(Register_Address_Translation_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Register_Address_Translation_unit_library + +library_clean : Register_Address_Translation_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_mono_front_end.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_mono_front_end.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_mono_front_end.cfg (revision 78) @@ -0,0 +1,7 @@ +Register_Address_Translation_unit +1 1 +1 # nb_front_end +1 1 +1 # nb_context [0] [nb_front_end] +4 4 *2 # nb_general_register +4 4 *2 # nb_special_register +4 4 +1 # nb_inst_insert +4 4 +1 # nb_inst_retire Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_multi_front_end.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_multi_front_end.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_multi_front_end.cfg (revision 78) @@ -0,0 +1,10 @@ +Register_Address_Translation_unit +4 4 +1 # nb_front_end +1 1 +1 # nb_context [0] [nb_front_end] +2 2 +1 # nb_context [1] [nb_front_end] +1 1 +1 # nb_context [2] [nb_front_end] +4 4 +1 # nb_context [3] [nb_front_end] +64 64 *2 # nb_general_register +16 16 *2 # nb_special_register +4 4 +1 # nb_inst_insert +4 4 +1 # nb_inst_retire Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,81 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/include/test.h" + +#define NB_PARAMS 5 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_front_end (uint32_t)\n")); + err (_(" * nb_context [nb_front_end] (uint32_t)\n")); + err (_(" * nb_general_register (uint32_t)\n")); + err (_(" * nb_special_register (uint32_t)\n")); + err (_(" * nb_inst_insert (uint32_t)\n")); + err (_(" * nb_inst_retire (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < 2+NB_PARAMS) + usage (argc, argv); + + uint32_t x = 1; + + const string name = argv[x++]; + + uint32_t _nb_front_end = atoi(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+_nb_front_end)) + usage (argc, argv); + + uint32_t * _nb_context = new uint32_t [_nb_front_end]; + + for (uint32_t i=0; i<_nb_front_end; i++) + _nb_context [i] = atoi(argv[x++]); + + uint32_t _nb_general_register = atoi(argv[x++]); + uint32_t _nb_special_register = atoi(argv[x++]); + uint32_t _nb_inst_insert = atoi(argv[x++]); + uint32_t _nb_inst_retire = atoi(argv[x++]); + + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters + (_nb_front_end , + _nb_context , + _nb_general_register , + _nb_special_register , + _nb_inst_insert , + _nb_inst_retire ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + exit (EXIT_FAILURE); + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + exit (EXIT_FAILURE); + } + + return (EXIT_SUCCESS); +} + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,507 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/Max.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 64 +#define CYCLE_MAX (1024*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Register_Address_Translation_unit * _Register_Address_Translation_unit = new Register_Address_Translation_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_RENAME_VAL ," in_RENAME_VAL ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_ACK ,"out_RENAME_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_FRONT_END_ID ," in_RENAME_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_CONTEXT_ID ," in_RENAME_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RA_LOG ," in_RENAME_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RB_LOG ," in_RENAME_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RC_LOG ," in_RENAME_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RD_LOG ," in_RENAME_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RE_LOG ," in_RENAME_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_NUM_REG_RA_PHY ,"out_RENAME_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_NUM_REG_RB_PHY ,"out_RENAME_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_NUM_REG_RC_PHY ,"out_RENAME_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_NUM_REG_RD_PHY_OLD,"out_RENAME_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_NUM_REG_RE_PHY_OLD,"out_RENAME_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert); + + ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); +//ALLOC1_SC_SIGNAL( in_INSERT_FRONT_END_ID ," in_INSERT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); +//ALLOC1_SC_SIGNAL( in_INSERT_CONTEXT_ID ," in_INSERT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD ," in_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE ," in_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_LOG ," in_INSERT_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_LOG ," in_INSERT_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY ," in_INSERT_NUM_REG_RD_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY ," in_INSERT_NUM_REG_RE_PHY ",Tspecial_address_t,_param->_nb_inst_insert); + + ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID ," in_RETIRE_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID ," in_RETIRE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_EVENT_STATE ," in_RETIRE_EVENT_STATE ",Tevent_state_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE ," in_RETIRE_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ," in_RETIRE_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ," in_RETIRE_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Register_Address_Translation_unit.\n"),name.c_str()); + + (*(_Register_Address_Translation_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Register_Address_Translation_unit->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RENAME_ACK ,_param->_nb_inst_insert); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_NUM_REG_RA_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_NUM_REG_RB_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_NUM_REG_RC_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_NUM_REG_RD_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RENAME_NUM_REG_RE_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RENAME_NUM_REG_RA_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RENAME_NUM_REG_RB_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RENAME_NUM_REG_RC_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RENAME_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RENAME_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert); + + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_INSERT_ACK ,_param->_nb_inst_insert); +//if (_param->_have_port_front_end_id) +//INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_FRONT_END_ID ,_param->_nb_inst_insert); +//if (_param->_have_port_context_id) +//INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_WRITE_RD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_WRITE_RE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_NUM_REG_RD_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_INSERT_NUM_REG_RE_PHY ,_param->_nb_inst_insert); + + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_ACK ,_param->_nb_inst_retire); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_EVENT_STATE ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_WRITE_RE ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_insert = 75; + const int32_t percent_transaction_retire = 75; + + uint32_t max_nb_context = max(_param->_nb_context,_param->_nb_front_end); + + Tgeneral_address_t rat_gpr [_param->_nb_front_end][max_nb_context][_param->_nb_general_register_logic]; + Tspecial_address_t rat_spr [_param->_nb_front_end][max_nb_context][_param->_nb_special_register_logic]; + bool rat_gpr_updt [_param->_nb_front_end][max_nb_context][_param->_nb_general_register_logic]; + bool rat_spr_updt [_param->_nb_front_end][max_nb_context][_param->_nb_special_register_logic]; + + uint32_t gpr=1; + uint32_t spr=0; + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + rat_gpr [i][j][0] = 0; + + for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) + { + rat_gpr [i][j][k] = gpr++; + rat_gpr_updt [i][j][k] = false; + } + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + { + rat_spr [i][j][k] = spr++; + rat_spr_updt [i][j][k] = false; + } + } + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_inst_insert; i++) + { + in_RENAME_VAL [i]->write(0); + in_INSERT_VAL [i]->write(0); + } + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + in_RETIRE_VAL [i]->write(0); + + nb_request = 32; + while (nb_request > 1) + { + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontrol_t val = (rand()%100)_nb_front_end; + + in_RENAME_VAL [i]->write(val); + in_RENAME_FRONT_END_ID [i]->write(front_end_id); + in_RENAME_CONTEXT_ID [i]->write(rand() % (_param->_nb_context[front_end_id])); + in_RENAME_NUM_REG_RA_LOG [i]->write((rand() % (_param->_nb_general_register_logic-1))+1); + in_RENAME_NUM_REG_RB_LOG [i]->write((rand() % (_param->_nb_general_register_logic-1))+1); + in_RENAME_NUM_REG_RC_LOG [i]->write( rand() % _param->_nb_special_register_logic); + in_RENAME_NUM_REG_RD_LOG [i]->write((rand() % (_param->_nb_general_register_logic-1))+1); + in_RENAME_NUM_REG_RE_LOG [i]->write( rand() % _param->_nb_special_register_logic); + in_INSERT_VAL [i]->write(val); + in_INSERT_WRITE_RD [i]->write(rand() % 2); + in_INSERT_WRITE_RE [i]->write(rand() % 2); + in_INSERT_NUM_REG_RD_LOG [i]->write((rand() % (_param->_nb_general_register_logic-1))+1); + in_INSERT_NUM_REG_RE_LOG [i]->write( rand() % _param->_nb_special_register_logic); + in_INSERT_NUM_REG_RD_PHY [i]->write(rand() % _param->_nb_general_register); + in_INSERT_NUM_REG_RE_PHY [i]->write(rand() % _param->_nb_special_register); + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + Tcontrol_t val = (rand()%100)_nb_front_end; + + in_RETIRE_VAL [i]->write(val); + in_RETIRE_FRONT_END_ID [i]->write(front_end_id); + in_RETIRE_CONTEXT_ID [i]->write(rand() % (_param->_nb_context[front_end_id])); + in_RETIRE_EVENT_STATE [i]->write(EVENT_STATE_NO_EVENT); + in_RETIRE_WRITE_RD [i]->write(rand() % 2); + in_RETIRE_WRITE_RE [i]->write(rand() % 2); + in_RETIRE_NUM_REG_RD_LOG [i]->write(rand() % _param->_nb_general_register_logic); + in_RETIRE_NUM_REG_RE_LOG [i]->write(rand() % _param->_nb_special_register_logic); + in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rand() % _param->_nb_general_register); + in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(rand() % _param->_nb_special_register); + } + + SC_START(1); + + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontext_t front_end_id = in_RENAME_FRONT_END_ID [i]->read(); + Tcontext_t context_id = in_RENAME_CONTEXT_ID [i]->read(); + if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read()) + { + if (in_INSERT_WRITE_RD [i]->read() == 1) + rat_gpr[front_end_id][context_id][in_INSERT_NUM_REG_RD_LOG[i]->read()] = in_INSERT_NUM_REG_RD_PHY[i]->read(); + if (in_INSERT_WRITE_RE [i]->read() == 1) + rat_spr[front_end_id][context_id][in_INSERT_NUM_REG_RE_LOG[i]->read()] = in_INSERT_NUM_REG_RE_PHY[i]->read(); + } + } + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontext_t front_end_id = in_RENAME_FRONT_END_ID [i]->read(); + Tcontext_t context_id = in_RENAME_CONTEXT_ID [i]->read(); + if (in_RENAME_VAL [i]->read() and out_RENAME_ACK [i]->read()) + { + nb_request --; + + TEST(Tgeneral_address_t,out_RENAME_NUM_REG_RA_PHY [i]->read(), rat_gpr[front_end_id][context_id][in_RENAME_NUM_REG_RA_LOG[i]->read()]); + TEST(Tgeneral_address_t,out_RENAME_NUM_REG_RB_PHY [i]->read(), rat_gpr[front_end_id][context_id][in_RENAME_NUM_REG_RB_LOG[i]->read()]); + TEST(Tspecial_address_t,out_RENAME_NUM_REG_RC_PHY [i]->read(), rat_spr[front_end_id][context_id][in_RENAME_NUM_REG_RC_LOG[i]->read()]); + TEST(Tgeneral_address_t,out_RENAME_NUM_REG_RD_PHY_OLD[i]->read(), rat_gpr[front_end_id][context_id][in_RENAME_NUM_REG_RD_LOG[i]->read()]); + TEST(Tspecial_address_t,out_RENAME_NUM_REG_RE_PHY_OLD[i]->read(), rat_spr[front_end_id][context_id][in_RENAME_NUM_REG_RE_LOG[i]->read()]); + } + + } + } + + // Event + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + in_RENAME_VAL [i]->write(0); + in_INSERT_VAL [i]->write(0); + } + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + in_RETIRE_VAL [i]->write(0); + + Tcontext_t retire_front_end_id [_param->_nb_inst_retire]; + Tcontext_t retire_context_id [_param->_nb_inst_retire]; + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + retire_front_end_id [i] = rand() % _param->_nb_front_end; + retire_context_id [i] = rand() % (_param->_nb_context[retire_front_end_id [i]]); + + for (uint32_t k=0; k<_param->_nb_general_register_logic; k++) + rat_gpr_updt [retire_front_end_id [i]][retire_context_id [i]][k] = false; + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + rat_spr_updt [retire_front_end_id [i]][retire_context_id [i]][k] = false; + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + in_RETIRE_VAL [i]->write(1); + in_RETIRE_FRONT_END_ID [i]->write(retire_front_end_id [i]); + in_RETIRE_CONTEXT_ID [i]->write(retire_context_id [i]); + in_RETIRE_EVENT_STATE [i]->write(EVENT_STATE_EVENT); + in_RETIRE_WRITE_RD [i]->write(0); + in_RETIRE_WRITE_RE [i]->write(0); + + do + { + SC_START(1); + } + while (out_RETIRE_ACK[i]->read() == 0); + + in_RETIRE_VAL [i]->write(0); + } + + SC_START(1); + + nb_request = 32; + while (nb_request > 1) + { + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontrol_t val = (rand()%100)_nb_front_end; + + in_RENAME_VAL [i]->write(val); + in_RENAME_FRONT_END_ID [i]->write(front_end_id); + in_RENAME_CONTEXT_ID [i]->write(rand() % (_param->_nb_context[front_end_id])); + in_RENAME_NUM_REG_RA_LOG [i]->write(rand() % _param->_nb_general_register_logic); + in_RENAME_NUM_REG_RB_LOG [i]->write(rand() % _param->_nb_general_register_logic); + in_RENAME_NUM_REG_RC_LOG [i]->write(rand() % _param->_nb_special_register_logic); + in_RENAME_NUM_REG_RD_LOG [i]->write(rand() % _param->_nb_general_register_logic); + in_RENAME_NUM_REG_RE_LOG [i]->write(rand() % _param->_nb_special_register_logic); + in_INSERT_VAL [i]->write(val); + in_INSERT_WRITE_RD [i]->write(rand() % 2); + in_INSERT_WRITE_RE [i]->write(rand() % 2); + in_INSERT_NUM_REG_RD_LOG [i]->write(rand() % _param->_nb_general_register_logic); + in_INSERT_NUM_REG_RE_LOG [i]->write(rand() % _param->_nb_special_register_logic); + in_INSERT_NUM_REG_RD_PHY [i]->write(rand() % _param->_nb_general_register); + in_INSERT_NUM_REG_RE_PHY [i]->write(rand() % _param->_nb_special_register); + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + Tcontrol_t val = (rand()%100)write(val); + in_RETIRE_FRONT_END_ID [i]->write(retire_front_end_id [i]); + in_RETIRE_CONTEXT_ID [i]->write(retire_context_id [i]); + in_RETIRE_EVENT_STATE [i]->write(EVENT_STATE_WAITEND); + in_RETIRE_WRITE_RD [i]->write(rand() % 2); + in_RETIRE_WRITE_RE [i]->write(rand() % 2); + in_RETIRE_NUM_REG_RD_LOG [i]->write(rand() % _param->_nb_general_register_logic); + in_RETIRE_NUM_REG_RE_LOG [i]->write(rand() % _param->_nb_special_register_logic); + in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rand() % _param->_nb_general_register); + in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(rand() % _param->_nb_special_register); + } + + SC_START(1); + + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontext_t front_end_id = in_RENAME_FRONT_END_ID [i]->read(); + Tcontext_t context_id = in_RENAME_CONTEXT_ID [i]->read(); + if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read()) + { + if (in_INSERT_WRITE_RD [i]->read() == 1) + rat_gpr[front_end_id][context_id][in_INSERT_NUM_REG_RD_LOG[i]->read()] = in_INSERT_NUM_REG_RD_PHY[i]->read(); + if (in_INSERT_WRITE_RE [i]->read() == 1) + rat_spr[front_end_id][context_id][in_INSERT_NUM_REG_RE_LOG[i]->read()] = in_INSERT_NUM_REG_RE_PHY[i]->read(); + } + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + Tcontext_t front_end_id = in_RETIRE_FRONT_END_ID [i]->read(); + Tcontext_t context_id = in_RETIRE_CONTEXT_ID [i]->read(); + if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read()) + { + if (in_RETIRE_WRITE_RD [i]->read() == 1) + { + if (rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] == false) + rat_gpr[front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] = in_RETIRE_NUM_REG_RD_PHY_OLD[i]->read(); + rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] = true; + } + if (in_RETIRE_WRITE_RE [i]->read() == 1) + { + if (rat_spr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] == false) + rat_spr[front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] = in_RETIRE_NUM_REG_RE_PHY_OLD[i]->read(); + rat_spr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] = true; + } + } + } + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontext_t front_end_id = in_RENAME_FRONT_END_ID [i]->read(); + Tcontext_t context_id = in_RENAME_CONTEXT_ID [i]->read(); + if (in_RENAME_VAL [i]->read() and out_RENAME_ACK [i]->read()) + { + nb_request --; + + TEST(Tgeneral_address_t,out_RENAME_NUM_REG_RA_PHY [i]->read(), rat_gpr[front_end_id][context_id][in_RENAME_NUM_REG_RA_LOG[i]->read()]); + TEST(Tgeneral_address_t,out_RENAME_NUM_REG_RB_PHY [i]->read(), rat_gpr[front_end_id][context_id][in_RENAME_NUM_REG_RB_LOG[i]->read()]); + TEST(Tspecial_address_t,out_RENAME_NUM_REG_RC_PHY [i]->read(), rat_spr[front_end_id][context_id][in_RENAME_NUM_REG_RC_LOG[i]->read()]); + TEST(Tgeneral_address_t,out_RENAME_NUM_REG_RD_PHY_OLD[i]->read(), rat_gpr[front_end_id][context_id][in_RENAME_NUM_REG_RD_LOG[i]->read()]); + TEST(Tspecial_address_t,out_RENAME_NUM_REG_RE_PHY_OLD[i]->read(), rat_spr[front_end_id][context_id][in_RENAME_NUM_REG_RE_LOG[i]->read()]); + } + + } + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_RENAME_VAL ; + delete [] out_RENAME_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RENAME_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RENAME_CONTEXT_ID ; + delete [] in_RENAME_NUM_REG_RA_LOG ; + delete [] in_RENAME_NUM_REG_RB_LOG ; + delete [] in_RENAME_NUM_REG_RC_LOG ; + delete [] in_RENAME_NUM_REG_RD_LOG ; + delete [] in_RENAME_NUM_REG_RE_LOG ; + delete [] out_RENAME_NUM_REG_RA_PHY ; + delete [] out_RENAME_NUM_REG_RB_PHY ; + delete [] out_RENAME_NUM_REG_RC_PHY ; + delete [] out_RENAME_NUM_REG_RD_PHY_OLD; + delete [] out_RENAME_NUM_REG_RE_PHY_OLD; + + delete [] in_INSERT_VAL ; + delete [] out_INSERT_ACK ; +//if (_param->_have_port_front_end_id) +//delete [] in_INSERT_FRONT_END_ID ; +//if (_param->_have_port_context_id) +//delete [] in_INSERT_CONTEXT_ID ; + delete [] in_INSERT_WRITE_RD ; + delete [] in_INSERT_WRITE_RE ; + delete [] in_INSERT_NUM_REG_RD_LOG ; + delete [] in_INSERT_NUM_REG_RE_LOG ; + delete [] in_INSERT_NUM_REG_RD_PHY ; + delete [] in_INSERT_NUM_REG_RE_PHY ; + + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RETIRE_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RETIRE_CONTEXT_ID ; + delete [] in_RETIRE_EVENT_STATE ; + delete [] in_RETIRE_WRITE_RD ; + delete [] in_RETIRE_WRITE_RE ; + delete [] in_RETIRE_NUM_REG_RD_LOG ; + delete [] in_RETIRE_NUM_REG_RE_LOG ; + delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; + +#endif + + delete _Register_Address_Translation_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/Register_Address_Translation_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/Register_Address_Translation_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/Register_Address_Translation_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Register_Address_Translation_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h (revision 78) @@ -0,0 +1,70 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_address_translation_unit_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_address_translation_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; + + public : uint32_t _size_front_end_id ; + public : uint32_t _size_context_id ; + public : uint32_t _size_general_register ; + public : uint32_t _size_special_register ; + + public : uint32_t _have_port_context_id ; + public : uint32_t _have_port_front_end_id; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register, + uint32_t nb_special_register, + uint32_t nb_inst_insert , + uint32_t nb_inst_retire + ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters & x); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h (revision 78) @@ -0,0 +1,179 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_address_translation_unit_Register_Address_Translation_unit_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_address_translation_unit_Register_Address_Translation_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + + class Register_Address_Translation_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // Interface + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_RENAME_VAL ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_ACK ;//[nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_RENAME_FRONT_END_ID ;//[nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_RENAME_CONTEXT_ID ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RA_LOG ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RB_LOG ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_NUM_REG_RC_LOG ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RD_LOG ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_NUM_REG_RE_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_NUM_REG_RA_PHY ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_NUM_REG_RB_PHY ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_NUM_REG_RC_PHY ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_NUM_REG_RD_PHY_OLD;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_NUM_REG_RE_PHY_OLD;//[nb_inst_insert] + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_INSERT_VAL ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_ACK ;//[nb_inst_insert] +//public : SC_IN (Tcontext_t ) ** in_INSERT_FRONT_END_ID ;//[nb_inst_insert] = in_rename_front_end_id +//public : SC_IN (Tcontext_t ) ** in_INSERT_CONTEXT_ID ;//[nb_inst_insert] = in_rename_context_id + public : SC_IN (Tcontrol_t ) ** in_INSERT_WRITE_RD ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_WRITE_RE ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RD_LOG ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RE_LOG ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RD_PHY ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RE_PHY ;//[nb_inst_insert] + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_RETIRE_VAL ;//[nb_inst_retire] + public : SC_OUT(Tcontrol_t ) ** out_RETIRE_ACK ;//[nb_inst_retire] + public : SC_IN (Tcontext_t ) ** in_RETIRE_FRONT_END_ID ;//[nb_inst_retire] + public : SC_IN (Tcontext_t ) ** in_RETIRE_CONTEXT_ID ;//[nb_inst_retire] + public : SC_IN (Tevent_state_t ) ** in_RETIRE_EVENT_STATE ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RE ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_LOG ;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_LOG ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_PHY_OLD;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t * internal_RENAME_ACK; //[nb_inst_insert] + private : Tcontrol_t * internal_INSERT_ACK; //[nb_inst_insert] + private : Tcontrol_t * internal_RETIRE_ACK; //[nb_inst_retire] + + private : Tgeneral_address_t *** rat_gpr; //[nb_front_end][nb_context][nb_general_register_logic] + private : bool *** rat_gpr_update_table; //[nb_front_end][nb_context][nb_general_register_logic] + private : Tspecial_address_t *** rat_spr; //[nb_front_end][nb_context][nb_special_register_logic] + private : bool *** rat_spr_update_table; //[nb_front_end][nb_context][nb_special_register_logic] +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Register_Address_Translation_unit); +#endif + public : Register_Address_Translation_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Register_Address_Translation_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMoore (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,76 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h" +#include "Common/include/Max.h" +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::Parameters" + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register, + uint32_t nb_special_register, + uint32_t nb_inst_insert , + uint32_t nb_inst_retire ) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _nb_general_register = nb_general_register; + _nb_special_register = nb_special_register; + _nb_inst_insert = nb_inst_insert ; + _nb_inst_retire = nb_inst_retire ; + + _size_front_end_id = log2(nb_front_end ); + _size_context_id = log2(max(nb_context, nb_front_end)); + _size_general_register = log2(nb_general_register); + _size_special_register = log2(nb_special_register); + + _have_port_front_end_id = _size_front_end_id>0; + _have_port_context_id = _size_context_id >0; + + test(); + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Register_Address_Translation_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,43 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + std::string msg = ""; + + return msg; + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,74 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + XML xml ("register_address_translation_unit"); + + xml.balise_open("register_address_translation_unit"); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); + + for (uint32_t i=0;i<_nb_front_end; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","front_end"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters & x) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp (revision 78) @@ -0,0 +1,141 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::Register_Address_Translation_unit" + Register_Address_Translation_unit::Register_Address_Translation_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + // Constant : accepted already transaction + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + internal_RENAME_ACK [i] = 1; + internal_INSERT_ACK [i] = 1; + + PORT_WRITE(out_RENAME_ACK[i],internal_RENAME_ACK [i]); + PORT_WRITE(out_INSERT_ACK[i],internal_INSERT_ACK [i]); + } + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + internal_RETIRE_ACK [i] = 1; + + PORT_WRITE(out_RETIRE_ACK[i],internal_RETIRE_ACK [i]); + } + + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Method - genMoore"); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::~Register_Address_Translation_unit" + Register_Address_Translation_unit::~Register_Address_Translation_unit (void) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp (revision 78) @@ -0,0 +1,152 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::allocation" + void Register_Address_Translation_unit::allocation + ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Register_Address_Translation_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("rename",IN,EAST,"Input to rename source logical register", _param->_nb_inst_insert); + + ALLOC1_VALACK_IN ( in_RENAME_VAL , VAL); + ALLOC1_VALACK_OUT(out_RENAME_ACK , ACK); + ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("insert",IN,NORTH,"Input to rename destination logical register", _param->_nb_inst_insert); + + ALLOC1_VALACK_IN ( in_INSERT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_INSERT_ACK ,ACK); +// ALLOC1_SIGNAL_IN ( in_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); +// ALLOC1_SIGNAL_IN ( in_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_LOG,"num_reg_rd_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_LOG,"num_reg_re_log",Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY,"num_reg_rd_phy",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY,"num_reg_re_phy",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("retire",IN,NORTH,"Input to update on event", _param->_nb_inst_retire); + + ALLOC1_VALACK_IN ( in_RETIRE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_RETIRE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RETIRE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_IN ( in_RETIRE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"event_state" ,Tevent_state_t ,_param->_size_event_state ); + ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RE ,"write_re" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + internal_RENAME_ACK = new Tcontrol_t [_param->_nb_inst_insert]; + internal_INSERT_ACK = new Tcontrol_t [_param->_nb_inst_insert]; + internal_RETIRE_ACK = new Tcontrol_t [_param->_nb_inst_retire]; + + rat_gpr = new Tgeneral_address_t ** [_param->_nb_front_end]; + rat_gpr_update_table = new bool ** [_param->_nb_front_end]; + rat_spr = new Tspecial_address_t ** [_param->_nb_front_end]; + rat_spr_update_table = new bool ** [_param->_nb_front_end]; + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + { + rat_gpr [i] = new Tgeneral_address_t * [_param->_nb_context[i]]; + rat_gpr_update_table [i] = new bool * [_param->_nb_context[i]]; + rat_spr [i] = new Tspecial_address_t * [_param->_nb_context[i]]; + rat_spr_update_table [i] = new bool * [_param->_nb_context[i]]; + + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + rat_gpr [i][j] = new Tgeneral_address_t [_param->_nb_general_register_logic]; + rat_gpr_update_table [i][j] = new bool [_param->_nb_general_register_logic]; + rat_spr [i][j] = new Tspecial_address_t [_param->_nb_special_register_logic]; + rat_spr_update_table [i][j] = new bool [_param->_nb_special_register_logic]; + } + } + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp (revision 78) @@ -0,0 +1,97 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::deallocation" + void Register_Address_Translation_unit::deallocation (void) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_RENAME_VAL ; + delete [] out_RENAME_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RENAME_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RENAME_CONTEXT_ID ; + delete [] in_RENAME_NUM_REG_RA_LOG ; + delete [] in_RENAME_NUM_REG_RB_LOG ; + delete [] in_RENAME_NUM_REG_RC_LOG ; + delete [] in_RENAME_NUM_REG_RD_LOG ; + delete [] in_RENAME_NUM_REG_RE_LOG ; + delete [] out_RENAME_NUM_REG_RA_PHY ; + delete [] out_RENAME_NUM_REG_RB_PHY ; + delete [] out_RENAME_NUM_REG_RC_PHY ; + delete [] out_RENAME_NUM_REG_RD_PHY_OLD; + delete [] out_RENAME_NUM_REG_RE_PHY_OLD; + + delete [] in_INSERT_VAL ; + delete [] out_INSERT_ACK ; +// if (_param->_have_port_front_end_id) +// delete [] in_INSERT_FRONT_END_ID ; +// if (_param->_have_port_context_id) +// delete [] in_INSERT_CONTEXT_ID ; + delete [] in_INSERT_WRITE_RD ; + delete [] in_INSERT_WRITE_RE ; + delete [] in_INSERT_NUM_REG_RD_LOG ; + delete [] in_INSERT_NUM_REG_RE_LOG ; + delete [] in_INSERT_NUM_REG_RD_PHY ; + delete [] in_INSERT_NUM_REG_RE_PHY ; + + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RETIRE_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RETIRE_CONTEXT_ID ; + delete [] in_RETIRE_EVENT_STATE ; + delete [] in_RETIRE_WRITE_RD ; + delete [] in_RETIRE_WRITE_RE ; + delete [] in_RETIRE_NUM_REG_RD_LOG ; + delete [] in_RETIRE_NUM_REG_RE_LOG ; + delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] internal_RENAME_ACK; + delete [] internal_INSERT_ACK; + delete [] internal_RETIRE_ACK; + + delete [] rat_gpr ; + delete [] rat_gpr_update_table; + delete [] rat_spr ; + delete [] rat_spr_update_table; + delete _component; + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::end_cycle" +void Register_Address_Translation_unit::end_cycle () + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMoore.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMoore.cpp (revision 78) @@ -0,0 +1,51 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::genMoore" + void Register_Address_Translation_unit::genMoore (void) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; + + PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RA_LOG [i])]); + PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RB_LOG [i])]); + PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RC_LOG [i])]); + PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RD_LOG [i])]); + PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RE_LOG [i])]); + } + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_statistics_declaration.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::statistics_declaration" + void Register_Address_Translation_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Register_Address_Translation_unit", + param_statistics); + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp (revision 78) @@ -0,0 +1,140 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::transition" + void Register_Address_Translation_unit::transition (void) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + uint32_t gpr = 1; + uint32_t spr = 0; + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + rat_gpr [i][j][0] = 0; + + for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) + rat_gpr [i][j][k] = gpr++; + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + rat_spr [i][j][k] = spr++; + } + } + else + { + // Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0) + + // ===================================================== + // ====[ INSERT ]======================================= + // ===================================================== + // First : interface insert + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + // Test transaction + if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i]) + { + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; + + // Test if write + if (PORT_READ(in_INSERT_WRITE_RD [i]) == 1) + rat_gpr[front_end_id][context_id][PORT_READ(in_INSERT_NUM_REG_RD_LOG [i])] = PORT_READ(in_INSERT_NUM_REG_RD_PHY [i]); + if (PORT_READ(in_INSERT_WRITE_RE [i]) == 1) + rat_spr[front_end_id][context_id][PORT_READ(in_INSERT_NUM_REG_RE_LOG [i])] = PORT_READ(in_INSERT_NUM_REG_RE_PHY [i]); + } + + // ===================================================== + // ====[ RETIRE ]======================================= + // ===================================================== + // Second : interface retire + // (because if an event on the same thread : the instruction is already renamed) + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i]) + { + // if no event : no effect, because the RAT content the most recently register + // but if they have a event (exception or miss speculation), the rat must restore the oldest value + // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register + // the retire interface became of the Re Order Buffer, also is in program sequence ! + if (PORT_READ(in_RETIRE_EVENT_STATE [i]) != EVENT_STATE_NO_EVENT) + { + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; + + // Test if event have just occure + if (PORT_READ(in_RETIRE_EVENT_STATE [i]) == EVENT_STATE_EVENT) + { + // Reset update_table + for (uint32_t j=0; j<_param->_nb_general_register_logic; j++) + rat_gpr_update_table[front_end_id][context_id][j] = 0; + for (uint32_t j=0; j<_param->_nb_special_register_logic; j++) + rat_spr_update_table[front_end_id][context_id][j] = 0; + } + + + // Test if write and have not a previous update + if (PORT_READ(in_RETIRE_WRITE_RD [i]) == 1) + { + Tgeneral_address_t rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]); + + log_printf(NONE,Register_Address_Translation_unit,FUNCTION,"retire[%d]",i); + log_printf(NONE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); + log_printf(NONE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id ); + log_printf(NONE,Register_Address_Translation_unit,FUNCTION," * rd_log : %d",rd_log ); + + if (rat_gpr_update_table[front_end_id][context_id][rd_log] == 0) + { + rat_gpr [front_end_id][context_id][rd_log] = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]); + rat_gpr_update_table[front_end_id][context_id][rd_log] = 1; + } + } + + if (PORT_READ(in_RETIRE_WRITE_RE [i]) == 1) + { + Tspecial_address_t re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]); + + if (rat_spr_update_table[front_end_id][context_id][re_log] == 0) + { + rat_spr [front_end_id][context_id][re_log] = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]); + rat_spr_update_table[front_end_id][context_id][re_log] = 1; + } + } + } + } + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::vhdl" + void Register_Address_Translation_unit::vhdl (void) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::vhdl_body" + void Register_Address_Translation_unit::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::vhdl_declaration" + void Register_Address_Translation_unit::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); + log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libRegister_translation_unit_Glue.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Register_translation_unit_Glue = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Register_translation_unit_Glue_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue + +#-----[ Library ]------------------------------------------ + +Register_translation_unit_Glue_LIBRARY = -lRegister_translation_unit_Glue \ + $(Behavioural_LIBRARY) + +Register_translation_unit_Glue_DIR_LIBRARY = -L$(Register_translation_unit_Glue_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Register_translation_unit_Glue_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Register_translation_unit_Glue_DIR) --makefile=Makefile; + +Register_translation_unit_Glue_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Register_translation_unit_Glue_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Register_translation_unit_Glue_LIBRARY) + +DIR_LIBRARY = $(Register_translation_unit_Glue_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Register_translation_unit_Glue_library + +library_clean : Register_translation_unit_Glue_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,3 @@ +Register_translation_unit_Glue +1 4 *2 # nb_inst_insert +1 4 *2 # nb_inst_retire Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/include/test.h" + +#define NB_PARAMS 2 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_inst_insert (uint32_t)\n")); + err (_(" * nb_inst_retire (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + uint32_t _nb_inst_insert = atoi(argv[x++]); + uint32_t _nb_inst_retire = atoi(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters + (_nb_inst_insert, + _nb_inst_retire); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,239 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 256 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Register_translation_unit_Glue * _Register_translation_unit_Glue = new Register_translation_unit_Glue (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_INSERT_RENAME_VAL ," in_INSERT_RENAME_VAL ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_RENAME_ACK ,"out_INSERT_RENAME_ACK ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_INSERT_VAL ,"out_INSERT_INSERT_VAL ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_INSERT_ACK ," in_INSERT_INSERT_ACK ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_RAT_INSERT_VAL,"out_INSERT_RAT_INSERT_VAL",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_RAT_RENAME_ACK," in_INSERT_RAT_RENAME_ACK",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_RAT_INSERT_ACK," in_INSERT_RAT_INSERT_ACK",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_FREE_LIST_VAL ,"out_INSERT_FREE_LIST_VAL ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_FREE_LIST_ACK ," in_INSERT_FREE_LIST_ACK ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_VAL ,"out_INSERT_STAT_LIST_VAL ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_STAT_LIST_ACK ," in_INSERT_STAT_LIST_ACK ",Tcontrol_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_RAT_VAL ,"out_RETIRE_RAT_VAL ",Tcontrol_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_RAT_ACK ," in_RETIRE_RAT_ACK ",Tcontrol_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_STAT_LIST_VAL ,"out_RETIRE_STAT_LIST_VAL ",Tcontrol_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_STAT_LIST_ACK ," in_RETIRE_STAT_LIST_ACK ",Tcontrol_t,_param->_nb_inst_retire); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Register_translation_unit_Glue.\n"),name.c_str()); + + (*(_Register_translation_unit_Glue->in_CLOCK)) (*(in_CLOCK)); + (*(_Register_translation_unit_Glue->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_RENAME_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RENAME_ACK ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_INSERT_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_INSERT_ACK ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_INSERT_VAL,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_RAT_RENAME_ACK,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_RAT_INSERT_ACK,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_FREE_LIST_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_FREE_LIST_ACK ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_STAT_LIST_ACK ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_ACK ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_RAT_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_RAT_ACK ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_STAT_LIST_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_STAT_LIST_ACK ,_param->_nb_inst_retire); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_inst_insert;i++) + { + in_INSERT_RENAME_VAL [i]->write(rand()%2); + in_INSERT_INSERT_ACK [i]->write(rand()%2); + in_INSERT_RAT_RENAME_ACK[i]->write(rand()%2); + in_INSERT_RAT_INSERT_ACK[i]->write(rand()%2); + in_INSERT_FREE_LIST_ACK [i]->write(rand()%2); + in_INSERT_STAT_LIST_ACK [i]->write(rand()%2); + } + + for (uint32_t i=0; i<_param->_nb_inst_retire;i++) + { + in_RETIRE_VAL [i]->write(rand()%2); + in_RETIRE_RAT_ACK [i]->write(rand()%2); + in_RETIRE_STAT_LIST_ACK [i]->write(rand()%2); + } + + SC_START(0); + + for (uint32_t i=0; i<_param->_nb_inst_insert;i++) + { + TEST(Tcontrol_t,out_INSERT_RENAME_ACK [i]->read(),(in_INSERT_INSERT_ACK [i]->read() and + in_INSERT_RAT_RENAME_ACK [i]->read() and + in_INSERT_RAT_INSERT_ACK [i]->read() and + in_INSERT_FREE_LIST_ACK [i]->read() and + in_INSERT_STAT_LIST_ACK [i]->read() )); + TEST(Tcontrol_t,out_INSERT_INSERT_VAL [i]->read(),(in_INSERT_RENAME_VAL [i]->read() and + in_INSERT_RAT_RENAME_ACK [i]->read() and + in_INSERT_RAT_INSERT_ACK [i]->read() and + in_INSERT_FREE_LIST_ACK [i]->read() and + in_INSERT_STAT_LIST_ACK [i]->read() )); + TEST(Tcontrol_t,out_INSERT_RAT_INSERT_VAL [i]->read(),(in_INSERT_RENAME_VAL [i]->read() and + in_INSERT_INSERT_ACK [i]->read() and + in_INSERT_RAT_RENAME_ACK [i]->read() and + in_INSERT_FREE_LIST_ACK [i]->read() and + in_INSERT_STAT_LIST_ACK [i]->read() )); + TEST(Tcontrol_t,out_INSERT_FREE_LIST_VAL [i]->read(),(in_INSERT_RENAME_VAL [i]->read() and + in_INSERT_INSERT_ACK [i]->read() and + in_INSERT_RAT_RENAME_ACK [i]->read() and + in_INSERT_RAT_INSERT_ACK [i]->read() and + in_INSERT_STAT_LIST_ACK [i]->read() )); + TEST(Tcontrol_t,out_INSERT_STAT_LIST_VAL [i]->read(),(in_INSERT_RENAME_VAL [i]->read() and + in_INSERT_INSERT_ACK [i]->read() and + in_INSERT_RAT_RENAME_ACK [i]->read() and + in_INSERT_RAT_INSERT_ACK [i]->read() and + in_INSERT_FREE_LIST_ACK [i]->read() )); + } + + for (uint32_t i=0; i<_param->_nb_inst_retire;i++) + { + TEST(Tcontrol_t,out_RETIRE_ACK [i]->read(),(in_RETIRE_RAT_ACK [i]->read() and + in_RETIRE_STAT_LIST_ACK [i]->read())); + TEST(Tcontrol_t,out_RETIRE_RAT_VAL [i]->read(),(in_RETIRE_VAL [i]->read() and + in_RETIRE_STAT_LIST_ACK [i]->read())); + TEST(Tcontrol_t,out_RETIRE_STAT_LIST_VAL [i]->read(),(in_RETIRE_VAL [i]->read() and + in_RETIRE_RAT_ACK [i]->read())); + } + + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_INSERT_RENAME_VAL ; + delete [] out_INSERT_RENAME_ACK ; + delete [] out_INSERT_INSERT_VAL ; + delete [] in_INSERT_INSERT_ACK ; + delete [] out_INSERT_RAT_INSERT_VAL; + delete [] in_INSERT_RAT_RENAME_ACK; + delete [] in_INSERT_RAT_INSERT_ACK; + delete [] out_INSERT_FREE_LIST_VAL ; + delete [] in_INSERT_FREE_LIST_ACK ; + delete [] out_INSERT_STAT_LIST_VAL ; + delete [] in_INSERT_STAT_LIST_ACK ; + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + delete [] out_RETIRE_RAT_VAL ; + delete [] in_RETIRE_RAT_ACK ; + delete [] out_RETIRE_STAT_LIST_VAL ; + delete [] in_RETIRE_STAT_LIST_ACK ; + +#endif + + delete _Register_translation_unit_Glue; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/Register_translation_unit_Glue.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/Register_translation_unit_Glue.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/Register_translation_unit_Glue.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Register_translation_unit_Glue} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h (revision 78) @@ -0,0 +1,54 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_translation_unit_glue_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_translation_unit_glue_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_inst_insert; + public : uint32_t _nb_inst_retire; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_inst_insert, + uint32_t nb_inst_retire); + +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters & x); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h (revision 78) @@ -0,0 +1,154 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_translation_unit_glue_Register_translation_unit_Glue_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_register_translation_unit_glue_Register_translation_unit_Glue_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + + class Register_translation_unit_Glue +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET; + + // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_INSERT_RENAME_VAL ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t) ** out_INSERT_RENAME_ACK ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t) ** out_INSERT_INSERT_VAL ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t) ** in_INSERT_INSERT_ACK ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t) ** out_INSERT_RAT_INSERT_VAL;//[nb_inst_insert] + public : SC_IN (Tcontrol_t) ** in_INSERT_RAT_RENAME_ACK;//[nb_inst_insert] + public : SC_IN (Tcontrol_t) ** in_INSERT_RAT_INSERT_ACK;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t) ** out_INSERT_FREE_LIST_VAL ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t) ** in_INSERT_FREE_LIST_ACK ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t) ** out_INSERT_STAT_LIST_VAL ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t) ** in_INSERT_STAT_LIST_ACK ;//[nb_inst_insert] + + // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_RETIRE_VAL ;//[nb_inst_retire] + public : SC_OUT(Tcontrol_t) ** out_RETIRE_ACK ;//[nb_inst_retire] + public : SC_OUT(Tcontrol_t) ** out_RETIRE_RAT_VAL ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t) ** in_RETIRE_RAT_ACK ;//[nb_inst_retire] + public : SC_OUT(Tcontrol_t) ** out_RETIRE_STAT_LIST_VAL;//[nb_inst_retire] + public : SC_IN (Tcontrol_t) ** in_RETIRE_STAT_LIST_ACK;//[nb_inst_retire] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Register_translation_unit_Glue); +#endif + public : Register_translation_unit_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Register_translation_unit_Glue (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif + public : void genMealy_insert (void); + public : void genMealy_retire (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp (revision 78) @@ -0,0 +1,59 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::Parameters" + Parameters::Parameters (uint32_t nb_inst_insert, + uint32_t nb_inst_retire) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + _nb_inst_insert = nb_inst_insert; + _nb_inst_retire = nb_inst_retire; + + test(); + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Register_translation_unit_Glue::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,43 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + std::string msg = ""; + + return msg; + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,61 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + XML xml ("register_translation_unit_glue"); + + xml.balise_open("register_translation_unit_glue"); + xml.singleton_begin("nb_inst_insert"); xml.attribut("value",toString(_nb_inst_insert)); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire"); xml.attribut("value",toString(_nb_inst_retire)); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters & x) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp (revision 78) @@ -0,0 +1,189 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::Register_translation_unit_Glue" + Register_translation_unit_Glue::Register_translation_unit_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_retire"); + + SC_METHOD (genMealy_retire); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + sensitive << (*(in_RETIRE_VAL [i])) + << (*(in_RETIRE_RAT_ACK [i])) + << (*(in_RETIRE_STAT_LIST_ACK [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + (*(out_RETIRE_ACK [i])) (*(in_RETIRE_RAT_ACK [i])); + (*(out_RETIRE_ACK [i])) (*(in_RETIRE_STAT_LIST_ACK [i])); + + (*(out_RETIRE_RAT_VAL [i])) (*(in_RETIRE_VAL [i])); + (*(out_RETIRE_RAT_VAL [i])) (*(in_RETIRE_STAT_LIST_ACK [i])); + + (*(out_RETIRE_STAT_LIST_VAL [i])) (*(in_RETIRE_VAL [i])); + (*(out_RETIRE_STAT_LIST_VAL [i])) (*(in_RETIRE_RAT_ACK [i])); + } +# endif + + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert"); + + SC_METHOD (genMealy_insert); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + sensitive << (*(in_INSERT_RENAME_VAL [i])) + << (*(in_INSERT_INSERT_ACK [i])) + << (*(in_INSERT_RAT_RENAME_ACK [i])) + << (*(in_INSERT_RAT_INSERT_ACK [i])) + << (*(in_INSERT_FREE_LIST_ACK [i])) + << (*(in_INSERT_STAT_LIST_ACK [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + (*(out_INSERT_RENAME_ACK [i])) (*(in_INSERT_INSERT_ACK [i])); + (*(out_INSERT_RENAME_ACK [i])) (*(in_INSERT_RAT_RENAME_ACK [i])); + (*(out_INSERT_RENAME_ACK [i])) (*(in_INSERT_RAT_INSERT_ACK [i])); + (*(out_INSERT_RENAME_ACK [i])) (*(in_INSERT_FREE_LIST_ACK [i])); + (*(out_INSERT_RENAME_ACK [i])) (*(in_INSERT_STAT_LIST_ACK [i])); + + (*(out_INSERT_INSERT_VAL [i])) (*(in_INSERT_RENAME_VAL [i])); + (*(out_INSERT_INSERT_VAL [i])) (*(in_INSERT_RAT_RENAME_ACK [i])); + (*(out_INSERT_INSERT_VAL [i])) (*(in_INSERT_RAT_INSERT_ACK [i])); + (*(out_INSERT_INSERT_VAL [i])) (*(in_INSERT_FREE_LIST_ACK [i])); + (*(out_INSERT_INSERT_VAL [i])) (*(in_INSERT_STAT_LIST_ACK [i])); + + (*(out_INSERT_RAT_INSERT_VAL [i])) (*(in_INSERT_RENAME_VAL [i])); + (*(out_INSERT_RAT_INSERT_VAL [i])) (*(in_INSERT_INSERT_ACK [i])); + (*(out_INSERT_RAT_INSERT_VAL [i])) (*(in_INSERT_RAT_RENAME_ACK [i])); + (*(out_INSERT_RAT_INSERT_VAL [i])) (*(in_INSERT_FREE_LIST_ACK [i])); + (*(out_INSERT_RAT_INSERT_VAL [i])) (*(in_INSERT_STAT_LIST_ACK [i])); + + (*(out_INSERT_FREE_LIST_VAL [i])) (*(in_INSERT_RENAME_VAL [i])); + (*(out_INSERT_FREE_LIST_VAL [i])) (*(in_INSERT_INSERT_ACK [i])); + (*(out_INSERT_FREE_LIST_VAL [i])) (*(in_INSERT_RAT_RENAME_ACK [i])); + (*(out_INSERT_FREE_LIST_VAL [i])) (*(in_INSERT_RAT_INSERT_ACK [i])); + (*(out_INSERT_FREE_LIST_VAL [i])) (*(in_INSERT_STAT_LIST_ACK [i])); + + (*(out_INSERT_STAT_LIST_VAL [i])) (*(in_INSERT_RENAME_VAL [i])); + (*(out_INSERT_STAT_LIST_VAL [i])) (*(in_INSERT_INSERT_ACK [i])); + (*(out_INSERT_STAT_LIST_VAL [i])) (*(in_INSERT_RAT_RENAME_ACK [i])); + (*(out_INSERT_STAT_LIST_VAL [i])) (*(in_INSERT_RAT_INSERT_ACK [i])); + (*(out_INSERT_STAT_LIST_VAL [i])) (*(in_INSERT_FREE_LIST_ACK [i])); + } +# endif + +#endif + } + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::~Register_translation_unit_Glue" + Register_translation_unit_Glue::~Register_translation_unit_Glue (void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp (revision 78) @@ -0,0 +1,105 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::allocation" + void Register_translation_unit_Glue::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Register_translation_unit_Glue" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_NO); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_NO); + } + + // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("insert",OUT, EAST, "insert's interface", _param->_nb_inst_insert); + + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_VAL ,"rename_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_INSERT_RENAME_ACK ,"rename_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_INSERT_INSERT_VAL ,"insert_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_INSERT_INSERT_ACK ,"insert_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_INSERT_RAT_INSERT_VAL,"rat_insert_val",Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_INSERT_RAT_RENAME_ACK,"rat_rename_ack",Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_INSERT_RAT_INSERT_ACK,"rat_insert_ack",Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_INSERT_FREE_LIST_VAL ,"free_list_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_INSERT_FREE_LIST_ACK ,"free_list_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_VAL ,"stat_list_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_INSERT_STAT_LIST_ACK ,"stat_list_ack" ,Tcontrol_t,1); + } + + // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("retire", IN, WEST, "retire's interface", _param->_nb_inst_retire); + + ALLOC1_SIGNAL_IN ( in_RETIRE_VAL ,"val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_RETIRE_ACK ,"ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_RETIRE_RAT_VAL ,"rat_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_RETIRE_RAT_ACK ,"rat_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_RETIRE_STAT_LIST_VAL,"stat_list_val",Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_RETIRE_STAT_LIST_ACK,"stat_list_ack",Tcontrol_t,1); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp (revision 78) @@ -0,0 +1,65 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::deallocation" + void Register_translation_unit_Glue::deallocation (void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_INSERT_RENAME_VAL ; + delete [] out_INSERT_RENAME_ACK ; + delete [] out_INSERT_INSERT_VAL ; + delete [] in_INSERT_INSERT_ACK ; + delete [] out_INSERT_RAT_INSERT_VAL; + delete [] in_INSERT_RAT_RENAME_ACK; + delete [] in_INSERT_RAT_INSERT_ACK; + delete [] out_INSERT_FREE_LIST_VAL ; + delete [] in_INSERT_FREE_LIST_ACK ; + delete [] out_INSERT_STAT_LIST_VAL ; + delete [] in_INSERT_STAT_LIST_ACK ; + + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + delete [] out_RETIRE_RAT_VAL ; + delete [] in_RETIRE_RAT_ACK ; + delete [] out_RETIRE_STAT_LIST_VAL ; + delete [] in_RETIRE_STAT_LIST_ACK ; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::end_cycle" +void Register_translation_unit_Glue::end_cycle () + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp (revision 78) @@ -0,0 +1,75 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::genMealy_insert" + void Register_translation_unit_Glue::genMealy_insert (void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tcontrol_t rename_val = PORT_READ(in_INSERT_RENAME_VAL [i]); + Tcontrol_t insert_ack = PORT_READ(in_INSERT_INSERT_ACK [i]); + Tcontrol_t rat_rename_ack = PORT_READ(in_INSERT_RAT_RENAME_ACK [i]); + Tcontrol_t rat_insert_ack = PORT_READ(in_INSERT_RAT_INSERT_ACK [i]); + Tcontrol_t free_list_ack = PORT_READ(in_INSERT_FREE_LIST_ACK [i]); + Tcontrol_t stat_list_ack = PORT_READ(in_INSERT_STAT_LIST_ACK [i]); + + PORT_WRITE(out_INSERT_RENAME_ACK [i], (insert_ack and + rat_rename_ack and + rat_insert_ack and + free_list_ack and + stat_list_ack )); + PORT_WRITE(out_INSERT_INSERT_VAL [i], (rename_val and + rat_rename_ack and + rat_insert_ack and + free_list_ack and + stat_list_ack )); + PORT_WRITE(out_INSERT_RAT_INSERT_VAL [i], (rename_val and + insert_ack and + rat_rename_ack and + free_list_ack and + stat_list_ack )); + PORT_WRITE(out_INSERT_FREE_LIST_VAL [i], (rename_val and + insert_ack and + rat_rename_ack and + rat_insert_ack and + stat_list_ack )); + PORT_WRITE(out_INSERT_STAT_LIST_VAL [i], (rename_val and + insert_ack and + rat_rename_ack and + rat_insert_ack and + free_list_ack )); + } + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::genMealy_retire" + void Register_translation_unit_Glue::genMealy_retire (void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + Tcontrol_t val = PORT_READ(in_RETIRE_VAL [i]); + Tcontrol_t rat_ack = PORT_READ(in_RETIRE_RAT_ACK [i]); + Tcontrol_t stat_list_ack = PORT_READ(in_RETIRE_STAT_LIST_ACK [i]); + + PORT_WRITE(out_RETIRE_ACK [i], rat_ack and stat_list_ack); + PORT_WRITE(out_RETIRE_RAT_VAL [i], val and stat_list_ack); + PORT_WRITE(out_RETIRE_STAT_LIST_VAL [i], val and rat_ack); + } + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_statistics_declaration.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::statistics_declaration" + void Register_translation_unit_Glue::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Register_translation_unit_Glue", + param_statistics); + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_transition.cpp (revision 78) @@ -0,0 +1,45 @@ +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::transition" + void Register_translation_unit_Glue::transition (void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::vhdl" + void Register_translation_unit_Glue::vhdl (void) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::vhdl_body" + void Register_translation_unit_Glue::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_translation_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit_Glue::vhdl_declaration" + void Register_translation_unit_Glue::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit_glue +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Register_translation_unit_LIBRARY) + +DIR_LIBRARY = $(Register_translation_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Register_translation_unit_library + +library_clean : Register_translation_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,10 @@ +Register_translation_unit +1 1 *2 #nb_front_end +1 1 *2 #nb_context [nb_front_end] +64 64 *2 #nb_general_register +16 16 *2 #nb_special_register +1 4 *4 #nb_inst_insert +1 4 *4 #nb_inst_retire +1 4 *4 #nb_reg_free +8 8 *2 #nb_bank +1 2 *2 #size_read_counter Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.save =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.save (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.save (revision 78) @@ -0,0 +1,10 @@ +Register_translation_unit +1 1 *2 #nb_front_end +1 1 *2 #nb_context [nb_front_end] +64 64 *2 #nb_general_register +16 16 *2 #nb_special_register +1 4 *4 #nb_inst_insert +1 4 *4 #nb_inst_retire +1 4 *4 #nb_reg_free +8 8 *2 #nb_bank +1 2 *2 #size_read_counter Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,88 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/include/test.h" + +#define NB_PARAMS 8 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_front_end (uint32_t)\n")); + err (_(" * nb_context [nb_front_end] (uint32_t)\n")); + err (_(" * nb_general_register (uint32_t)\n")); + err (_(" * nb_special_register (uint32_t)\n")); + err (_(" * nb_inst_insert (uint32_t)\n")); + err (_(" * nb_inst_retire (uint32_t)\n")); + err (_(" * nb_reg_free (uint32_t)\n")); + err (_(" * nb_bank (uint32_t)\n")); + err (_(" * size_read_counter (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < 2+NB_PARAMS) + usage (argc, argv); + + uint32_t x = 1; + string name = argv[x++]; + + uint32_t _nb_front_end = atoi(argv[x++]); + uint32_t * _nb_context = new uint32_t [_nb_front_end]; + + for (uint32_t i=0; i<_nb_front_end; i++) + _nb_context [i] = atoi(argv[x++]); + + uint32_t _nb_general_register = atoi(argv[x++]); + uint32_t _nb_special_register = atoi(argv[x++]); + uint32_t _nb_inst_insert = atoi(argv[x++]); + uint32_t _nb_inst_retire = atoi(argv[x++]); + uint32_t _nb_reg_free = atoi(argv[x++]); + uint32_t _nb_bank = atoi(argv[x++]); + uint32_t _size_read_counter = atoi(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters + (_nb_front_end , + _nb_context , + _nb_general_register , + _nb_special_register , + _nb_inst_insert , + _nb_inst_retire , + _nb_reg_free , + _nb_bank , + _size_read_counter ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete _nb_context; + + return (_return); +} + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,303 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Register_translation_unit * _Register_translation_unit = new Register_translation_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_RENAME_VAL ," in_RENAME_VAL ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_RENAME_ACK ,"out_RENAME_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_FRONT_END_ID ," in_RENAME_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_CONTEXT_ID ," in_RENAME_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_READ_RA ," in_RENAME_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RA_LOG ," in_RENAME_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_READ_RB ," in_RENAME_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RB_LOG ," in_RENAME_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_READ_RC ," in_RENAME_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RC_LOG ," in_RENAME_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_WRITE_RD ," in_RENAME_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RD_LOG ," in_RENAME_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_WRITE_RE ," in_RENAME_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RENAME_NUM_REG_RE_LOG ," in_RENAME_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + + ALLOC1_SC_SIGNAL(out_INSERT_VAL ,"out_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_ACK ," in_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_FRONT_END_ID ,"out_INSERT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_CONTEXT_ID ,"out_INSERT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_READ_RA ,"out_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RA_LOG ,"out_INSERT_NUM_REG_RA_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RA_PHY ,"out_INSERT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_READ_RB ,"out_INSERT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RB_LOG ,"out_INSERT_NUM_REG_RB_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RB_PHY ,"out_INSERT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_READ_RC ,"out_INSERT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RC_LOG ,"out_INSERT_NUM_REG_RC_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RC_PHY ,"out_INSERT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_WRITE_RD ,"out_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_LOG ,"out_INSERT_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD,"out_INSERT_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW,"out_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_WRITE_RE ,"out_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_LOG ,"out_INSERT_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD,"out_INSERT_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW,"out_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert); + + ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID ," in_RETIRE_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID ," in_RETIRE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_EVENT_STATE ," in_RETIRE_EVENT_STATE ",Tevent_state_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA ," in_RETIRE_READ_RA ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ," in_RETIRE_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB ," in_RETIRE_READ_RB ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ," in_RETIRE_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC ," in_RETIRE_READ_RC ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ," in_RETIRE_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ," in_RETIRE_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE ," in_RETIRE_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ," in_RETIRE_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Register_translation_unit.\n"),name.c_str()); + + (*(_Register_translation_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Register_translation_unit->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_RENAME_ACK ,_param->_nb_inst_insert); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_READ_RA ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_NUM_REG_RA_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_READ_RB ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_NUM_REG_RB_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_READ_RC ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_NUM_REG_RC_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_WRITE_RD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_NUM_REG_RD_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_WRITE_RE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RENAME_NUM_REG_RE_LOG ,_param->_nb_inst_insert); + + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_INSERT_ACK ,_param->_nb_inst_insert); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_READ_RA ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RA_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_READ_RB ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RB_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_READ_RC ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RC_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_WRITE_RD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_WRITE_RE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); + + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit,out_RETIRE_ACK ,_param->_nb_inst_retire); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_EVENT_STATE ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_READ_RA ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_READ_RB ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_READ_RC ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_WRITE_RE ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Register_translation_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_RENAME_VAL ; + delete [] out_RENAME_ACK ; + delete [] in_RENAME_FRONT_END_ID ; + delete [] in_RENAME_CONTEXT_ID ; + delete [] in_RENAME_READ_RA ; + delete [] in_RENAME_NUM_REG_RA_LOG ; + delete [] in_RENAME_READ_RB ; + delete [] in_RENAME_NUM_REG_RB_LOG ; + delete [] in_RENAME_READ_RC ; + delete [] in_RENAME_NUM_REG_RC_LOG ; + delete [] in_RENAME_WRITE_RD ; + delete [] in_RENAME_NUM_REG_RD_LOG ; + delete [] in_RENAME_WRITE_RE ; + delete [] in_RENAME_NUM_REG_RE_LOG ; + + delete [] out_INSERT_VAL ; + delete [] in_INSERT_ACK ; + delete [] out_INSERT_FRONT_END_ID ; + delete [] out_INSERT_CONTEXT_ID ; + delete [] out_INSERT_READ_RA ; + delete [] out_INSERT_NUM_REG_RA_LOG ; + delete [] out_INSERT_NUM_REG_RA_PHY ; + delete [] out_INSERT_READ_RB ; + delete [] out_INSERT_NUM_REG_RB_LOG ; + delete [] out_INSERT_NUM_REG_RB_PHY ; + delete [] out_INSERT_READ_RC ; + delete [] out_INSERT_NUM_REG_RC_LOG ; + delete [] out_INSERT_NUM_REG_RC_PHY ; + delete [] out_INSERT_WRITE_RD ; + delete [] out_INSERT_NUM_REG_RD_LOG ; + delete [] out_INSERT_NUM_REG_RD_PHY_OLD; + delete [] out_INSERT_NUM_REG_RD_PHY_NEW; + delete [] out_INSERT_WRITE_RE ; + delete [] out_INSERT_NUM_REG_RE_LOG ; + delete [] out_INSERT_NUM_REG_RE_PHY_OLD; + delete [] out_INSERT_NUM_REG_RE_PHY_NEW; + + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + delete [] in_RETIRE_FRONT_END_ID ; + delete [] in_RETIRE_CONTEXT_ID ; + delete [] in_RETIRE_EVENT_STATE ; + delete [] in_RETIRE_READ_RA ; + delete [] in_RETIRE_NUM_REG_RA_PHY ; + delete [] in_RETIRE_READ_RB ; + delete [] in_RETIRE_NUM_REG_RB_PHY ; + delete [] in_RETIRE_READ_RC ; + delete [] in_RETIRE_NUM_REG_RC_PHY ; + delete [] in_RETIRE_WRITE_RD ; + delete [] in_RETIRE_NUM_REG_RD_LOG ; + delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RD_PHY_NEW; + delete [] in_RETIRE_WRITE_RE ; + delete [] in_RETIRE_NUM_REG_RE_LOG ; + delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RE_PHY_NEW; +#endif + + delete _Register_translation_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libStat_List_unit.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Stat_List_unit = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Stat_List_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit + +#-----[ Library ]------------------------------------------ + +Stat_List_unit_LIBRARY = -lStat_List_unit \ + $(Behavioural_LIBRARY) + +Stat_List_unit_DIR_LIBRARY = -L$(Stat_List_unit_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Stat_List_unit_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Stat_List_unit_DIR) --makefile=Makefile; + +Stat_List_unit_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Stat_List_unit_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Stat_List_unit_LIBRARY) + +DIR_LIBRARY = $(Stat_List_unit_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Stat_List_unit_library + +library_clean : Stat_List_unit_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_mono_thread.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_mono_thread.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_mono_thread.cfg (revision 78) @@ -0,0 +1,10 @@ +Stat_List_unit +1 1 *2 #_nb_front_end +1 1 *2 #_nb_context +64 64 *2 #_nb_general_register +16 16 *2 #_nb_special_register +1 4 *2 #_nb_inst_insert +1 4 *2 #_nb_inst_retire +1 4 *2 #_nb_reg_free +4 4 *2 #_nb_bank +2 2 +1 #_size_counter Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_multi_thread.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_multi_thread.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_multi_thread.cfg (revision 78) @@ -0,0 +1,11 @@ +Stat_List_unit +2 2 *2 #_nb_front_end +1 3 +1 #_nb_context [0] +2 2 *2 #_nb_context [1] +256 256 *2 #_nb_general_register +64 64 *2 #_nb_special_register +4 4 *2 #_nb_inst_insert +4 4 *2 #_nb_inst_retire +4 4 *2 #_nb_reg_free +4 8 *2 #_nb_bank +2 4 *2 #_size_counter Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h (revision 78) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,91 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h" + +#define NB_PARAMS 8 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_front_end (uint32_t)\n")); + err (_(" * nb_context [nb_front_end] (uint32_t)\n")); + err (_(" * nb_general_register (uint32_t)\n")); + err (_(" * nb_special_register (uint32_t)\n")); + err (_(" * nb_inst_insert (uint32_t)\n")); + err (_(" * nb_inst_retire (uint32_t)\n")); + err (_(" * nb_reg_free (uint32_t)\n")); + err (_(" * nb_bank (uint32_t)\n")); + err (_(" * size_counter (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + const string name = argv[x++]; + + uint32_t _nb_front_end = atoi(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+_nb_front_end)) + usage (argc, argv); + + uint32_t * _nb_context = new uint32_t [_nb_front_end]; + for (uint32_t i=0; i<_nb_front_end; i++) + _nb_context [i] = atoi(argv[x++]); + + uint32_t _nb_general_register = atoi(argv[x++]); + uint32_t _nb_special_register = atoi(argv[x++]); + uint32_t _nb_inst_insert = atoi(argv[x++]); + uint32_t _nb_inst_retire = atoi(argv[x++]); + uint32_t _nb_reg_free = atoi(argv[x++]); + uint32_t _nb_bank = atoi(argv[x++]); + uint32_t _size_counter = atoi(argv[x++]); + + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters + (_nb_front_end , + _nb_context , + _nb_general_register , + _nb_special_register , + _nb_inst_insert , + _nb_inst_retire , + _nb_reg_free , + _nb_bank , + _size_counter ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); + exit (EXIT_FAILURE); + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + exit (EXIT_FAILURE); + } + + delete [] _nb_context; + + return (EXIT_SUCCESS); +} + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,693 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" +#include + +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + + +class entry_t +{ +public : bool _is_free ; +public : bool _is_link ; +public : bool _is_valid; +public : uint32_t _counter ; +}; + + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Stat_List_unit * _Stat_List_unit = new Stat_List_unit (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_READ_RA ," in_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY ," in_INSERT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_READ_RB ," in_INSERT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY ," in_INSERT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_READ_RC ," in_INSERT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY ," in_INSERT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD ," in_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE ," in_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert); + ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA ," in_RETIRE_READ_RA ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ," in_RETIRE_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB ," in_RETIRE_READ_RB ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ," in_RETIRE_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC ," in_RETIRE_READ_RC ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ," in_RETIRE_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE ," in_RETIRE_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire); + ALLOC1_SC_SIGNAL(out_PUSH_GPR_VAL ,"out_PUSH_GPR_VAL ",Tcontrol_t ,_param->_nb_reg_free); + ALLOC1_SC_SIGNAL( in_PUSH_GPR_ACK ," in_PUSH_GPR_ACK ",Tcontrol_t ,_param->_nb_reg_free); + ALLOC1_SC_SIGNAL(out_PUSH_GPR_NUM_REG ,"out_PUSH_GPR_NUM_REG ",Tgeneral_address_t,_param->_nb_reg_free); + ALLOC1_SC_SIGNAL(out_PUSH_SPR_VAL ,"out_PUSH_SPR_VAL ",Tcontrol_t ,_param->_nb_reg_free); + ALLOC1_SC_SIGNAL( in_PUSH_SPR_ACK ," in_PUSH_SPR_ACK ",Tcontrol_t ,_param->_nb_reg_free); + ALLOC1_SC_SIGNAL(out_PUSH_SPR_NUM_REG ,"out_PUSH_SPR_NUM_REG ",Tspecial_address_t,_param->_nb_reg_free); + + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Stat_List_unit.\n"),name.c_str()); + + (*(_Stat_List_unit->in_CLOCK)) (*(in_CLOCK)); + (*(_Stat_List_unit->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE ,_param->_nb_inst_insert); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); + + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_VAL ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RE ,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire); + + INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_VAL ,_param->_nb_reg_free); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_GPR_ACK ,_param->_nb_reg_free); + INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_NUM_REG ,_param->_nb_reg_free); + + INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_VAL ,_param->_nb_reg_free); + INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_SPR_ACK ,_param->_nb_reg_free); + INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_NUM_REG ,_param->_nb_reg_free); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + int32_t percent_transaction_insert = 95; + int32_t percent_transaction_retire = 95; + int32_t percent_transaction_push = 95; + + uint32_t nb_thread = 0; + for (uint32_t i=0; i<_param->_nb_front_end; i++) + nb_thread += _param->_nb_context [i]; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_general_register]; + entry_t spr_status [_param->_nb_special_register]; + + for (uint32_t i=0; i<_param->_nb_general_register; i++) + { + gpr_status[i]._is_free = false; + gpr_status[i]._is_link = (i<(nb_thread*31+1)); + gpr_status[i]._is_valid = true; + gpr_status[i]._counter = 0; + } + for (uint32_t i=0; i<_param->_nb_special_register; i++) + { + spr_status[i]._is_free = false; + spr_status[i]._is_link = (i<(nb_thread*2)); + spr_status[i]._is_valid = true; + spr_status[i]._counter = 0; + } + + std::list free_list_gpr; + std::list free_list_spr; + + // Test free register + while ((free_list_gpr.size() < (_param->_nb_general_register - (nb_thread*31+1))) and + (free_list_spr.size() < (_param->_nb_special_register - (nb_thread*2 )))) + { + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + in_INSERT_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + in_RETIRE_VAL [i]->write(0); + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + in_PUSH_GPR_ACK [i]->write((rand()%100)write((rand()%100)_nb_reg_free; i++) + { + if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read()) + { + Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read(); + + LABEL("PUSH_GPR [%d] - Accepted",i); + LABEL(" * reg : %d",reg); + LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); + LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); + LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); + LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); + + TEST(bool, true,((gpr_status[reg]._is_free == 0) and + (gpr_status[reg]._is_link == 0) and + (gpr_status[reg]._is_valid == 1) and + (gpr_status[reg]._counter == 0))); + + gpr_status[reg]._is_free = 1; + free_list_gpr.push_back(reg); + } + + if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read()) + { + Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read(); + + LABEL("PUSH_SPR [%d] - Accepted",i); + LABEL(" * reg : %d",reg); + LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); + LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); + LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); + LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); + + TEST(bool, true,((spr_status[reg]._is_free == 0) and + (spr_status[reg]._is_link == 0) and + (spr_status[reg]._is_valid == 1) and + (spr_status[reg]._counter == 0))); + + spr_status[reg]._is_free = 1; + free_list_spr.push_back(reg); + } + } + + SC_START(1); + } + + LABEL("======================="); + LABEL("===== END OF INIT ====="); + LABEL("======================="); + + int32_t nb_cycle = 64; + + while (nb_cycle > 0) + { + std::list::iterator it_gpr = free_list_gpr.begin(); + std::list::iterator it_spr = free_list_spr.begin(); + + + entry_t gpr_status_insert [_param->_nb_general_register]; + entry_t spr_status_insert [_param->_nb_special_register]; + entry_t gpr_status_retire [_param->_nb_general_register]; + entry_t spr_status_retire [_param->_nb_special_register]; + + for (uint32_t i=0; i<_param->_nb_general_register; i++) + { + gpr_status_insert [i] = gpr_status[i]; + gpr_status_retire [i] = gpr_status[i]; + } + for (uint32_t i=0; i<_param->_nb_special_register; i++) + { + spr_status_insert [i] = spr_status[i]; + spr_status_retire [i] = spr_status[i]; + } + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1; + Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1; + Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ; + Tgeneral_address_t rd = (it_gpr != free_list_gpr.end())?*it_gpr:0; + Tspecial_address_t re = (it_spr != free_list_spr.end())?*it_spr:0; + + Tcontrol_t read_ra = (gpr_status_insert[ra]._is_link) and (gpr_status_insert[ra]._counter < _param->_max_reader); + Tcontrol_t read_rb = (gpr_status_insert[rb]._is_link) and (gpr_status_insert[rb]._counter < _param->_max_reader); + Tcontrol_t read_rc = (spr_status_insert[rc]._is_link) and (spr_status_insert[rc]._counter < _param->_max_reader); + Tcontrol_t write_rd = (it_gpr != free_list_gpr.end()); + Tcontrol_t write_re = (it_spr != free_list_spr.end()); + + in_INSERT_VAL [i]->write((rand()%100) < percent_transaction_insert); + in_INSERT_READ_RA [i]->write(read_ra ); + in_INSERT_NUM_REG_RA_PHY [i]->write(ra); + in_INSERT_READ_RB [i]->write(read_rb ); + in_INSERT_NUM_REG_RB_PHY [i]->write(rb); + in_INSERT_READ_RC [i]->write(read_rc ); + in_INSERT_NUM_REG_RC_PHY [i]->write(rc); + in_INSERT_WRITE_RD [i]->write(write_rd); + in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd); + in_INSERT_WRITE_RE [i]->write(write_re); + in_INSERT_NUM_REG_RE_PHY_NEW [i]->write(re); + + if (read_ra) + gpr_status_insert[ra]._counter++; + if (read_rb) + gpr_status_insert[rb]._counter++; + if (read_rc) + spr_status_insert[rc]._counter++; + if (write_rd) + it_gpr ++; + if (write_re) + it_spr ++; + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1; + Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1; + Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ; + Tgeneral_address_t rd_old = (rand()%(_param->_nb_general_register-1))+1; + Tgeneral_address_t rd_new = (rand()%(_param->_nb_general_register-1))+1; + Tspecial_address_t re_old = (rand()%(_param->_nb_special_register )) ; + Tspecial_address_t re_new = (rand()%(_param->_nb_special_register )) ; + + Tcontrol_t read_ra = (gpr_status_retire[ra]._is_link) and (gpr_status_retire[ra]._counter > 0); + Tcontrol_t read_rb = (gpr_status_retire[rb]._is_link) and (gpr_status_retire[rb]._counter > 0); + Tcontrol_t read_rc = (spr_status_retire[rc]._is_link) and (spr_status_retire[rc]._counter > 0); + Tcontrol_t write_rd = ( (gpr_status_retire[rd_old]._is_link ) and + (gpr_status_retire[rd_old]._is_valid) and + (gpr_status_retire[rd_new]._is_link ) and + not (gpr_status_retire[rd_new]._is_valid)); + Tcontrol_t write_re = ( (spr_status_retire[re_old]._is_link ) and + (spr_status_retire[re_old]._is_valid) and + (spr_status_retire[re_new]._is_link ) and + not (spr_status_retire[re_new]._is_valid)); + + in_RETIRE_VAL [i]->write((rand()%100) < percent_transaction_retire); + in_RETIRE_READ_RA [i]->write(read_ra ); + in_RETIRE_NUM_REG_RA_PHY [i]->write(ra); + in_RETIRE_READ_RB [i]->write(read_rb ); + in_RETIRE_NUM_REG_RB_PHY [i]->write(rb); + in_RETIRE_READ_RC [i]->write(read_rc ); + in_RETIRE_NUM_REG_RC_PHY [i]->write(rc); + in_RETIRE_WRITE_RD [i]->write(write_rd); + in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rd_old); + in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rd_new); + in_RETIRE_WRITE_RE [i]->write(write_re); + in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(re_old); + in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(re_new); + + if (read_ra) + { + gpr_status_retire[ra]._counter --; + } + if (read_rb) + { + gpr_status_retire[rb]._counter --; + } + if (read_rc) + { + spr_status_retire[rc]._counter --; + } + if (write_rd) + { + gpr_status_retire[rd_old]._is_link = 0; + gpr_status_retire[rd_new]._is_valid = 1; + } + if (write_re) + { + spr_status_retire[re_old]._is_link = 0; + spr_status_retire[re_new]._is_valid = 1; + } + + } + + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + in_PUSH_GPR_ACK [i]->write((rand()%100)write((rand()%100)_nb_inst_insert; i++) + { + Tcontrol_t write_rd = in_INSERT_WRITE_RD [i]->read(); + Tcontrol_t write_re = in_INSERT_WRITE_RE [i]->read(); + + if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read()) + { + Tcontrol_t read_ra = in_INSERT_READ_RA [i]->read(); + Tgeneral_address_t ra = in_INSERT_NUM_REG_RA_PHY [i]->read(); + Tcontrol_t read_rb = in_INSERT_READ_RB [i]->read(); + Tgeneral_address_t rb = in_INSERT_NUM_REG_RB_PHY [i]->read(); + Tcontrol_t read_rc = in_INSERT_READ_RC [i]->read(); + Tspecial_address_t rc = in_INSERT_NUM_REG_RC_PHY [i]->read(); + Tgeneral_address_t rd_new = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read(); + Tspecial_address_t re_new = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read(); + + LABEL("INSERT [%d] - Accepted",i); + LABEL(" * read_ra : %d",read_ra ); + LABEL(" * reg_ra : %d",ra ); + LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free ); + LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link ); + LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid); + LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter ); + LABEL(" * read_rb : %d",read_rb ); + LABEL(" * reg_rb : %d",rb ); + LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free ); + LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid); + LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter ); + LABEL(" * read_rc : %d",read_rc ); + LABEL(" * reg_rc : %d",rc ); + LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free ); + LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid); + LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter ); + LABEL(" * read_rd : %d",write_rd); + LABEL(" * reg_rd_new : %d",rd_new ); + LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free ); + LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid); + LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter ); + LABEL(" * read_re : %d",write_re); + LABEL(" * reg_re_new : %d",re_new ); + LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free ); + LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link ); + LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid); + LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter ); + + if (read_ra) + { + gpr_status[ra]._counter ++; + } + if (read_rb) + { + gpr_status[rb]._counter ++; + } + if (read_rc) + { + spr_status[rc]._counter ++; + } + if (write_rd) + { + Tgeneral_address_t reg = *it_gpr; + TEST(Tgeneral_address_t,reg,rd_new); + + it_gpr = free_list_gpr.erase(it_gpr); + + gpr_status[reg]._is_free = 0; + gpr_status[reg]._is_link = 1; + gpr_status[reg]._is_valid = 0; + } + + if (write_re) + { + Tspecial_address_t reg = *it_spr; + TEST(Tspecial_address_t,reg,re_new); + + it_spr = free_list_spr.erase(it_spr); + + spr_status[reg]._is_free = 0; + spr_status[reg]._is_link = 1; + spr_status[reg]._is_valid = 0; + } + } + else + { + if (write_rd) + it_gpr ++; + if (write_re) + it_spr ++; + } + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read()) + { + Tcontrol_t read_ra = in_RETIRE_READ_RA [i]->read(); + Tgeneral_address_t ra = in_RETIRE_NUM_REG_RA_PHY [i]->read(); + Tcontrol_t read_rb = in_RETIRE_READ_RB [i]->read(); + Tgeneral_address_t rb = in_RETIRE_NUM_REG_RB_PHY [i]->read(); + Tcontrol_t read_rc = in_RETIRE_READ_RC [i]->read(); + Tspecial_address_t rc = in_RETIRE_NUM_REG_RC_PHY [i]->read(); + Tcontrol_t write_rd = in_RETIRE_WRITE_RD [i]->read(); + Tgeneral_address_t rd_old = in_RETIRE_NUM_REG_RD_PHY_OLD [i]->read(); + Tgeneral_address_t rd_new = in_RETIRE_NUM_REG_RD_PHY_NEW [i]->read(); + Tcontrol_t write_re = in_RETIRE_WRITE_RE [i]->read(); + Tgeneral_address_t re_old = in_RETIRE_NUM_REG_RE_PHY_OLD [i]->read(); + Tgeneral_address_t re_new = in_RETIRE_NUM_REG_RE_PHY_NEW [i]->read(); + + LABEL("RETIRE [%d] - Accepted",i); + LABEL(" * read_ra : %d",read_ra ); + LABEL(" * reg_ra : %d",ra ); + LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free ); + LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link ); + LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid); + LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter ); + LABEL(" * read_rb : %d",read_rb ); + LABEL(" * reg_rb : %d",rb ); + LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free ); + LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid); + LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter ); + LABEL(" * read_rc : %d",read_rc ); + LABEL(" * reg_rc : %d",rc ); + LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free ); + LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid); + LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter ); + LABEL(" * read_rd : %d",write_rd); + LABEL(" * reg_rd_old : %d",rd_old ); + LABEL(" * status[%d]._is_free : %d",rd_old,spr_status[rd_old]._is_free ); + LABEL(" * status[%d]._is_link : %d",rd_old,spr_status[rd_old]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rd_old,spr_status[rd_old]._is_valid); + LABEL(" * status[%d]._counter : %d",rd_old,spr_status[rd_old]._counter ); + LABEL(" * reg_rd_new : %d",rd_new ); + LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free ); + LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link ); + LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid); + LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter ); + LABEL(" * read_re : %d",write_re); + LABEL(" * reg_re_old : %d",re_old ); + LABEL(" * status[%d]._is_free : %d",re_old,spr_status[re_old]._is_free ); + LABEL(" * status[%d]._is_link : %d",re_old,spr_status[re_old]._is_link ); + LABEL(" * status[%d]._is_valid : %d",re_old,spr_status[re_old]._is_valid); + LABEL(" * status[%d]._counter : %d",re_old,spr_status[re_old]._counter ); + LABEL(" * reg_re_new : %d",re_new ); + LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free ); + LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link ); + LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid); + LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter ); + + if (read_ra) + { + gpr_status[ra]._counter --; + } + if (read_rb) + { + gpr_status[rb]._counter --; + } + if (read_rc) + { + spr_status[rc]._counter --; + } + if (write_rd) + { + gpr_status[rd_old]._is_link = 0; + gpr_status[rd_new]._is_valid = 1; + } + if (write_re) + { + spr_status[re_old]._is_link = 0; + spr_status[re_new]._is_valid = 1; + } + } + + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read()) + { + Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read(); + + LABEL("PUSH_GPR [%d] - Accepted",i); + LABEL(" * reg : %d",reg); + LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); + LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); + LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); + LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); + + TEST(bool, true,((gpr_status[reg]._is_free == 0) and + (gpr_status[reg]._is_link == 0) and + (gpr_status[reg]._is_valid == 1) and + (gpr_status[reg]._counter == 0))); + + gpr_status[reg]._is_free = 1; + free_list_gpr.push_back(reg); + } + + if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read()) + { + Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read(); + + LABEL("PUSH_SPR [%d] - Accepted",i); + LABEL(" * reg : %d",reg); + LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); + LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); + LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); + LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); + + TEST(bool, true,((spr_status[reg]._is_free == 0) and + (spr_status[reg]._is_link == 0) and + (spr_status[reg]._is_valid == 1) and + (spr_status[reg]._counter == 0))); + + spr_status[reg]._is_free = 1; + free_list_spr.push_back(reg); + } + } + + SC_START(1); + nb_cycle --; + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_INSERT_VAL ; + delete [] out_INSERT_ACK ; + delete [] in_INSERT_READ_RA ; + delete [] in_INSERT_NUM_REG_RA_PHY ; + delete [] in_INSERT_READ_RB ; + delete [] in_INSERT_NUM_REG_RB_PHY ; + delete [] in_INSERT_READ_RC ; + delete [] in_INSERT_NUM_REG_RC_PHY ; + delete [] in_INSERT_WRITE_RD ; + delete [] in_INSERT_NUM_REG_RD_PHY_NEW; + delete [] in_INSERT_WRITE_RE ; + delete [] in_INSERT_NUM_REG_RE_PHY_NEW; + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + delete [] in_RETIRE_READ_RA ; + delete [] in_RETIRE_NUM_REG_RA_PHY ; + delete [] in_RETIRE_READ_RB ; + delete [] in_RETIRE_NUM_REG_RB_PHY ; + delete [] in_RETIRE_READ_RC ; + delete [] in_RETIRE_NUM_REG_RC_PHY ; + delete [] in_RETIRE_WRITE_RD ; + delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RD_PHY_NEW; + delete [] in_RETIRE_WRITE_RE ; + delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RE_PHY_NEW; + delete [] out_PUSH_GPR_VAL ; + delete [] in_PUSH_GPR_ACK ; + delete [] out_PUSH_GPR_NUM_REG ; + delete [] out_PUSH_SPR_VAL ; + delete [] in_PUSH_SPR_ACK ; + delete [] out_PUSH_SPR_NUM_REG ; + +#endif + + delete _Stat_List_unit; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/Stat_List_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/Stat_List_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/Stat_List_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Stat_List_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h (revision 78) @@ -0,0 +1,87 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; + public : uint32_t _nb_reg_free ; + public : uint32_t _nb_bank ; + public : uint32_t _size_counter ; + + public : uint32_t _size_general_register ; + public : uint32_t _size_special_register ; + + public : uint32_t _max_reader ; + public : uint32_t _nb_gpr_use_init ; + public : uint32_t _nb_spr_use_init ; + + public : uint32_t _nb_general_register_by_bank; + public : uint32_t _nb_special_register_by_bank; + + public : uint32_t _nb_bank_by_port_free ; + + public : uint32_t _shift_gpr; + public : uint32_t _shift_spr; + + public : Tgeneral_address_t _mask_gpr; + public : Tspecial_address_t _mask_spr; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t nb_reg_free , + uint32_t nb_bank , + uint32_t size_counter ); + +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters & x); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h (revision 78) @@ -0,0 +1,181 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Stat_List_unit_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Stat_List_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + + class Stat_List_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // Interface + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET; + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_INSERT_VAL ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_ACK ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_READ_RA ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RA_PHY ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_READ_RB ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RB_PHY ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_READ_RC ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RC_PHY ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_WRITE_RD ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_WRITE_RE ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_RETIRE_VAL ;//[nb_inst_retire] + public : SC_OUT(Tcontrol_t ) ** out_RETIRE_ACK ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_PHY_OLD;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_PHY_NEW;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RE ;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_NEW;//[nb_inst_retire] + + // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t) ** out_PUSH_GPR_VAL ;//[nb_reg_free] + public : SC_IN (Tcontrol_t) ** in_PUSH_GPR_ACK ;//[nb_reg_free] + public : SC_OUT(Tgeneral_address_t) ** out_PUSH_GPR_NUM_REG ;//[nb_reg_free] + + // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t) ** out_PUSH_SPR_VAL ;//[nb_reg_free] + public : SC_IN (Tcontrol_t) ** in_PUSH_SPR_ACK ;//[nb_reg_free] + public : SC_OUT(Tspecial_address_t) ** out_PUSH_SPR_NUM_REG ;//[nb_reg_free] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : stat_list_entry_t ** gpr_stat_list; //[nb_bank][nb_general_register_by_bank] + private : stat_list_entry_t ** spr_stat_list; //[nb_bank][nb_general_register_by_bank] + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t internal_GPR_PTR_FREE; + private : uint32_t internal_SPR_PTR_FREE; + + private : Tcontrol_t * internal_INSERT_ACK ;//[nb_inst_insert] + private : Tcontrol_t * internal_RETIRE_ACK ;//[nb_inst_retire] + private : Tcontrol_t * internal_PUSH_GPR_VAL ;//[nb_reg_free] + private : uint32_t * internal_PUSH_GPR_NUM_BANK;//[nb_reg_free] + private : Tcontrol_t * internal_PUSH_SPR_VAL ;//[nb_reg_free] + private : uint32_t * internal_PUSH_SPR_NUM_BANK;//[nb_reg_free] +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Stat_List_unit); +#endif + public : Stat_List_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Stat_List_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMoore (void); + public : void genMealy (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h (revision 78) @@ -0,0 +1,109 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Types_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + class stat_list_entry_t + { + private : bool _is_free ; // set = is present in free list + private : bool _is_link ; // set = is present in rat + private : bool _is_valid; // set = an instruction have write in this register + private : uint32_t _counter ; // number of register that must read this register + + public : stat_list_entry_t (void) {}; + public : ~stat_list_entry_t (void) {}; + + public : void reset (bool is_link) + { + _is_free = 0; + _is_link = is_link; + _is_valid = 1; + _counter = 0; + } + + public : void insert_read (void) + { + _counter ++; + } + public : void insert_write (void) + { + _is_free = 0; + _is_link = 1; + _is_valid = 0; + } + + public : void retire_read (void) + { + _counter --; + } + + public : void retire_write_old (void) + { + _is_link = 0; + } + + public : void retire_write_new (void) + { + _is_valid = 1; + } + + public : void free (void) + { + _is_free = 1; + } + + public : bool can_insert_read (uint32_t max_reader) + { + return ((_counter+1) < max_reader); + } + + public : bool can_free (void) + { + return ((_is_free == 0) and + (_is_link == 0) and + (_is_valid == 1) and + (_counter == 0)); + } + + public : friend std::ostream& operator<< (std::ostream& output_stream, + stat_list_entry_t & x) + { + output_stream << x._is_free << " " + << x._is_link << " " + << x._is_valid << " " + << x._counter; + + return output_stream; + } + + }; + + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,98 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h" +#include "Common/include/Max.h" +#include "Common/include/BitManipulation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::Parameters" + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t nb_reg_free , + uint32_t nb_bank , + uint32_t size_counter ) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _nb_general_register = nb_general_register; + _nb_special_register = nb_special_register; + _nb_inst_insert = nb_inst_insert ; + _nb_inst_retire = nb_inst_retire ; + _nb_reg_free = nb_reg_free ; + _nb_bank = nb_bank ; + _size_counter = size_counter ; + + _size_general_register = log2(nb_general_register); + _size_special_register = log2(nb_special_register); + + _max_reader = 1<(log2(_nb_general_register_by_bank)); + _mask_spr = gen_mask(log2(_nb_special_register_by_bank)); + + test(); + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Stat_List_unit::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,61 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + std::string msg = ""; + + if (not is_multiple(_nb_bank, _nb_reg_free)) + msg += " - nb_bank must be a multiple of nb_reg_free.\n"; + + if (_nb_general_register < _nb_gpr_use_init) + msg += " - the number of physical general register is insuffisant. (you need less "+toString(_nb_gpr_use_init)+" registers.\n"; + + if (_nb_special_register < _nb_spr_use_init) + msg += " - the number of physical special register is insuffisant. (you need less "+toString(_nb_spr_use_init)+" registers.\n"; + + if (not is_power2(_nb_general_register)) + msg += " - the number of physical general register must be a power of 2.\n"; + + if (not is_power2(_nb_special_register)) + msg += " - the number of physical special register must be a power of 2.\n"; + + if (not is_power2(_nb_bank)) + msg += " - the number of bank must be a power of 2.\n"; + + return msg; + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,77 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + XML xml ("stat_list_unit"); + + xml.balise_open("stat_list_unit"); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); + xml.singleton_begin("nb_reg_free "); xml.attribut("value",toString(_nb_reg_free )); xml.singleton_end(); + xml.singleton_begin("nb_bank "); xml.attribut("value",toString(_nb_bank )); xml.singleton_end(); + xml.singleton_begin("size_counter "); xml.attribut("value",toString(_size_counter )); xml.singleton_end(); + + for (uint32_t i=0;i<_nb_front_end; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","front_end"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters & x) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp (revision 78) @@ -0,0 +1,159 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::Stat_List_unit" + Stat_List_unit::Stat_List_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + log_printf(INFO,Stat_List_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Stat_List_unit,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Stat_List_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + // Constant + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + internal_RETIRE_ACK[i] = 1; + PORT_WRITE(out_RETIRE_ACK[i], internal_RETIRE_ACK[i]); + } + + log_printf(INFO,Stat_List_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Stat_List_unit,FUNCTION,"Method - genMoore"); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Stat_List_unit,FUNCTION,"Method - genMealy"); + + SC_METHOD (genMealy); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + sensitive << (*(in_INSERT_READ_RA [i])) + << (*(in_INSERT_NUM_REG_RA_PHY [i])) + << (*(in_INSERT_READ_RB [i])) + << (*(in_INSERT_NUM_REG_RB_PHY [i])) + << (*(in_INSERT_READ_RC [i])) + << (*(in_INSERT_NUM_REG_RC_PHY [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RA [i])); + (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RA_PHY [i])); + (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RB [i])); + (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RB_PHY [i])); + (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RC [i])); + (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RC_PHY [i])); + } +# endif + +#endif + } + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::~Stat_List_unit" + Stat_List_unit::~Stat_List_unit (void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Stat_List_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Stat_List_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp (revision 78) @@ -0,0 +1,146 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::allocation" + void Stat_List_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Stat_List_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("insert",IN,SOUTH,"Insert a renaming result",_param->_nb_inst_insert); + + ALLOC1_VALACK_IN ( in_INSERT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_INSERT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_INSERT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_INSERT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_INSERT_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("retire",IN,NORTH,"Retire a renaming result",_param->_nb_inst_retire); + + ALLOC1_VALACK_IN ( in_RETIRE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_RETIRE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("push_gpr",OUT,SOUTH,"Free a general register",_param->_nb_reg_free); + + ALLOC1_VALACK_OUT(out_PUSH_GPR_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PUSH_GPR_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PUSH_GPR_NUM_REG,"num_reg",Tgeneral_address_t,_param->_size_general_register); + } + + // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("push_spr",OUT,SOUTH,"Free a special register",_param->_nb_reg_free); + + ALLOC1_VALACK_OUT(out_PUSH_SPR_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PUSH_SPR_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PUSH_SPR_NUM_REG,"num_reg",Tspecial_address_t,_param->_size_special_register); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + gpr_stat_list = new stat_list_entry_t * [_param->_nb_bank]; + spr_stat_list = new stat_list_entry_t * [_param->_nb_bank]; + + for (uint32_t i=0; i<_param->_nb_bank; i++) + { + gpr_stat_list [i] = new stat_list_entry_t [_param->_nb_general_register_by_bank]; + spr_stat_list [i] = new stat_list_entry_t [_param->_nb_special_register_by_bank]; + } + + internal_INSERT_ACK = new Tcontrol_t [_param->_nb_inst_insert]; + internal_RETIRE_ACK = new Tcontrol_t [_param->_nb_inst_retire]; + internal_PUSH_GPR_VAL = new Tcontrol_t [_param->_nb_reg_free]; + internal_PUSH_GPR_NUM_BANK = new uint32_t [_param->_nb_reg_free]; + internal_PUSH_SPR_VAL = new Tcontrol_t [_param->_nb_reg_free]; + internal_PUSH_SPR_NUM_BANK = new uint32_t [_param->_nb_reg_free]; + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp (revision 78) @@ -0,0 +1,91 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::deallocation" + void Stat_List_unit::deallocation (void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_INSERT_VAL ; + delete [] out_INSERT_ACK ; + delete [] in_INSERT_READ_RA ; + delete [] in_INSERT_NUM_REG_RA_PHY ; + delete [] in_INSERT_READ_RB ; + delete [] in_INSERT_NUM_REG_RB_PHY ; + delete [] in_INSERT_READ_RC ; + delete [] in_INSERT_NUM_REG_RC_PHY ; + delete [] in_INSERT_WRITE_RD ; + delete [] in_INSERT_NUM_REG_RD_PHY_NEW; + delete [] in_INSERT_WRITE_RE ; + delete [] in_INSERT_NUM_REG_RE_PHY_NEW; + + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + delete [] in_RETIRE_READ_RA ; + delete [] in_RETIRE_NUM_REG_RA_PHY ; + delete [] in_RETIRE_READ_RB ; + delete [] in_RETIRE_NUM_REG_RB_PHY ; + delete [] in_RETIRE_READ_RC ; + delete [] in_RETIRE_NUM_REG_RC_PHY ; + delete [] in_RETIRE_WRITE_RD ; + delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RD_PHY_NEW; + delete [] in_RETIRE_WRITE_RE ; + delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RE_PHY_NEW; + + delete [] out_PUSH_GPR_VAL ; + delete [] in_PUSH_GPR_ACK ; + + delete [] out_PUSH_GPR_NUM_REG ; + delete [] out_PUSH_SPR_VAL ; + delete [] in_PUSH_SPR_ACK ; + delete [] out_PUSH_SPR_NUM_REG ; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] gpr_stat_list; + delete [] spr_stat_list; + + delete [] internal_INSERT_ACK ; + delete [] internal_RETIRE_ACK ; + delete [] internal_PUSH_GPR_VAL ; + delete [] internal_PUSH_GPR_NUM_BANK; + delete [] internal_PUSH_SPR_VAL ; + delete [] internal_PUSH_SPR_NUM_BANK; + + delete _component; + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::end_cycle" +void Stat_List_unit::end_cycle () + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp (revision 78) @@ -0,0 +1,71 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::genMealy" + void Stat_List_unit::genMealy (void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + bool ack = true; + + if (PORT_READ(in_INSERT_READ_RA [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + ack &= gpr_stat_list [bank][reg].can_insert_read(_param->_max_reader); + } + + if (PORT_READ(in_INSERT_READ_RB [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + ack &= gpr_stat_list [bank][reg].can_insert_read(_param->_max_reader); + } + + if (PORT_READ(in_INSERT_READ_RC [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_spr; + uint32_t reg = num_reg & _param->_mask_spr ; + ack &= spr_stat_list [bank][reg].can_insert_read(_param->_max_reader); + } + + internal_INSERT_ACK [i] = ack; + PORT_WRITE(out_INSERT_ACK [i], ack); + } + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp (revision 78) @@ -0,0 +1,83 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::genMoore" + void Stat_List_unit::genMoore (void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + uint32_t gpr_ptr = internal_GPR_PTR_FREE; + uint32_t spr_ptr = internal_SPR_PTR_FREE; + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + uint32_t offset = i*_param->_nb_bank_by_port_free; + + // PUSH_GPR + { + uint32_t bank_gpr; + + for (bank_gpr=offset; bank_gpr_nb_bank_by_port_free; bank_gpr++) + if (gpr_stat_list[bank_gpr][gpr_ptr].can_free()) + break; + + bool val = (bank_gpr != offset+_param->_nb_bank_by_port_free); + + internal_PUSH_GPR_VAL [i] = val; + internal_PUSH_GPR_NUM_BANK [i] = bank_gpr; + + PORT_WRITE(out_PUSH_GPR_VAL [i], val); + if (val) + PORT_WRITE(out_PUSH_GPR_NUM_REG[i], ((bank_gpr<<_param->_shift_gpr) | gpr_ptr)); + } + + // PUSH_SPR + { + uint32_t bank_spr; + + for (bank_spr=offset; bank_spr_nb_bank_by_port_free; bank_spr++) + if (spr_stat_list[bank_spr][spr_ptr].can_free()) + break; + + bool val = (bank_spr != (offset+_param->_nb_bank_by_port_free)); + + internal_PUSH_SPR_VAL [i] = val; + internal_PUSH_SPR_NUM_BANK [i] = bank_spr; + + PORT_WRITE(out_PUSH_SPR_VAL [i], val); + if (val) + PORT_WRITE(out_PUSH_SPR_NUM_REG[i], ((bank_spr<<_param->_shift_spr) | spr_ptr)); + } + } + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_statistics_declaration.cpp (revision 78) @@ -0,0 +1,43 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::statistics_declaration" + void Stat_List_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Stat_List_unit", + param_statistics); + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp (revision 78) @@ -0,0 +1,214 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::transition" + void Stat_List_unit::transition (void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + uint32_t gpr = 0; + uint32_t spr = 0; + + for (uint32_t i=0; i<_param->_nb_bank; i++) + { + for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) + gpr_stat_list [i][j].reset((gpr++)<_param->_nb_gpr_use_init); + for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) + spr_stat_list [i][j].reset((spr++)<_param->_nb_spr_use_init); + } + internal_GPR_PTR_FREE = 0; + internal_SPR_PTR_FREE = 0; + } + else + { + // ===================================================== + // =====[ INSERT ]====================================== + // ===================================================== + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + if (PORT_READ(in_INSERT_VAL[i]) and internal_INSERT_ACK[i]) + { + if (PORT_READ(in_INSERT_READ_RA [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].insert_read(); + } + + if (PORT_READ(in_INSERT_READ_RB [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].insert_read(); + } + + if (PORT_READ(in_INSERT_READ_RC [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_spr; + uint32_t reg = num_reg & _param->_mask_spr ; + spr_stat_list [bank][reg].insert_read(); + } + + if (PORT_READ(in_INSERT_WRITE_RD [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].insert_write(); + } + + if (PORT_READ(in_INSERT_WRITE_RE [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]); + uint32_t bank = num_reg >> _param->_shift_spr; + uint32_t reg = num_reg & _param->_mask_spr ; + spr_stat_list [bank][reg].insert_write(); + } + } + + // ===================================================== + // =====[ RETIRE ]====================================== + // ===================================================== + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + if (PORT_READ(in_RETIRE_VAL[i]) and internal_RETIRE_ACK[i]) + { + if (PORT_READ(in_RETIRE_READ_RA [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RA_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].retire_read(); + } + + if (PORT_READ(in_RETIRE_READ_RB [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RB_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].retire_read(); + } + + if (PORT_READ(in_RETIRE_READ_RC [i])) + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RC_PHY [i]); + uint32_t bank = num_reg >> _param->_shift_spr; + uint32_t reg = num_reg & _param->_mask_spr ; + spr_stat_list [bank][reg].retire_read(); + } + + if (PORT_READ(in_RETIRE_WRITE_RD [i])) + { + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].retire_write_old(); + } + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]); + uint32_t bank = num_reg >> _param->_shift_gpr; + uint32_t reg = num_reg & _param->_mask_gpr ; + gpr_stat_list [bank][reg].retire_write_new(); + } + } + + if (PORT_READ(in_RETIRE_WRITE_RE [i])) + { + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]); + uint32_t bank = num_reg >> _param->_shift_spr; + uint32_t reg = num_reg & _param->_mask_spr ; + spr_stat_list [bank][reg].retire_write_old(); + } + { + Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]); + uint32_t bank = num_reg >> _param->_shift_spr; + uint32_t reg = num_reg & _param->_mask_spr ; + spr_stat_list [bank][reg].retire_write_new(); + } + } + } + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + // ===================================================== + // =====[ PUSH_GPR ]==================================== + // ===================================================== + if (internal_PUSH_GPR_VAL [i] and PORT_READ(in_PUSH_GPR_ACK [i])) + gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][internal_GPR_PTR_FREE].free(); + + // ===================================================== + // =====[ PUSH_SPR ]==================================== + // ===================================================== + if (internal_PUSH_SPR_VAL [i] and PORT_READ(in_PUSH_SPR_ACK [i])) + spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][internal_SPR_PTR_FREE].free(); + } + + // Update pointer + internal_GPR_PTR_FREE = ((internal_GPR_PTR_FREE==0)?_param->_nb_general_register_by_bank:internal_GPR_PTR_FREE)-1; + internal_SPR_PTR_FREE = ((internal_SPR_PTR_FREE==0)?_param->_nb_special_register_by_bank:internal_SPR_PTR_FREE)-1; + } + +// log_printf(TRACE,Stat_List_unit,FUNCTION,"Print gpr_stat_list :"); +// for (uint32_t i=0; i<_param->_nb_bank; i++) +// { +// log_printf(TRACE,Stat_List_unit,FUNCTION," * Bank : %d",i); +// for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) +// { +// std::ostringstream str; +// str << gpr_stat_list [i][j]; +// log_printf(TRACE,Stat_List_unit,FUNCTION," [%d] %s",j,str.str().c_str()); + +// } +// } +// log_printf(TRACE,Stat_List_unit,FUNCTION,"Print spr_stat_list :"); +// for (uint32_t i=0; i<_param->_nb_bank; i++) +// { +// log_printf(TRACE,Stat_List_unit,FUNCTION," * Bank : %d",i); +// for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) +// { +// std::ostringstream str; +// str << spr_stat_list [i][j]; +// log_printf(TRACE,Stat_List_unit,FUNCTION," [%d] %s",j,str.str().c_str()); +// } +// } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl.cpp (revision 78) @@ -0,0 +1,52 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::vhdl" + void Stat_List_unit::vhdl (void) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp (revision 78) @@ -0,0 +1,39 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::vhdl_body" + void Stat_List_unit::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,38 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace stat_list_unit { + + +#undef FUNCTION +#define FUNCTION "Stat_List_unit::vhdl_declaration" + void Stat_List_unit::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); + }; + +}; // end namespace stat_list_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/Register_translation_unit.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/Register_translation_unit.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/Register_translation_unit.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Register_translation_unit} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h (revision 78) @@ -0,0 +1,84 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; + public : uint32_t _nb_reg_free ; + public : uint32_t _nb_bank ; + public : uint32_t _size_read_counter ; + + public : uint32_t _size_front_end_id ; + public : uint32_t _size_context_id ; + public : uint32_t _size_general_register ; + public : uint32_t _size_special_register ; + + public : uint32_t _have_port_context_id ; + public : uint32_t _have_port_front_end_id; + + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit:: Parameters * _param_dependency_checking_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit:: Parameters * _param_free_list_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters * _param_register_address_translation_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit:: Parameters * _param_stat_list_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue:: Parameters * _param_register_translation_unit_glue; + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t nb_reg_free , + uint32_t nb_bank , + uint32_t size_read_counter ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters & x); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h (revision 78) @@ -0,0 +1,197 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_Register_translation_unit_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_Register_translation_unit_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + + class Register_translation_unit +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // Interface + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_RENAME_VAL ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_ACK ;//[nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_RENAME_FRONT_END_ID ;//[nb_inst_insert] + public : SC_IN (Tcontext_t ) ** in_RENAME_CONTEXT_ID ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_READ_RA ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RA_LOG ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_READ_RB ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RB_LOG ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_READ_RC ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_NUM_REG_RC_LOG ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_WRITE_RD ;//[nb_inst_insert] + public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RD_LOG ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_WRITE_RE ;//[nb_inst_insert] + public : SC_IN (Tspecial_address_t) ** in_RENAME_NUM_REG_RE_LOG ;//[nb_inst_insert] + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[nb_inst_insert] + public : SC_OUT(Tcontext_t ) ** out_INSERT_FRONT_END_ID ;//[nb_inst_insert] + public : SC_OUT(Tcontext_t ) ** out_INSERT_CONTEXT_ID ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_READ_RA ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RA_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RA_PHY ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_READ_RB ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RB_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RB_PHY ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_READ_RC ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_INSERT_NUM_REG_RC_LOG ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_INSERT_NUM_REG_RC_PHY ;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_WRITE_RD ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RD_LOG ;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert] + public : SC_OUT(Tgeneral_address_t) ** out_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert] + public : SC_OUT(Tcontrol_t ) ** out_INSERT_WRITE_RE ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_INSERT_NUM_REG_RE_LOG ;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert] + public : SC_OUT(Tspecial_address_t) ** out_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_RETIRE_VAL ;//[nb_inst_retire] + public : SC_OUT(Tcontrol_t ) ** out_RETIRE_ACK ;//[nb_inst_retire] + public : SC_IN (Tcontext_t ) ** in_RETIRE_FRONT_END_ID ;//[nb_inst_retire] + public : SC_IN (Tcontext_t ) ** in_RETIRE_CONTEXT_ID ;//[nb_inst_retire] + public : SC_IN (Tevent_state_t ) ** in_RETIRE_EVENT_STATE ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_LOG ;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_PHY_OLD;//[nb_inst_retire] + public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_PHY_NEW;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RE ;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_LOG ;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire] + public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_NEW;//[nb_inst_retire] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Dependency_checking_unit * _component_dependency_checking_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Free_List_unit * _component_free_list_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit * _component_register_address_translation_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Stat_List_unit * _component_stat_list_unit; + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Register_translation_unit_Glue * _component_register_translation_unit_glue; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Register_translation_unit); +#endif + public : Register_translation_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Register_translation_unit (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif +#endif + +#if VHDL + public : void vhdl (void); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp (revision 78) @@ -0,0 +1,133 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::Parameters" + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t nb_reg_free , + uint32_t nb_bank , + uint32_t size_read_counter ) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _nb_general_register = nb_general_register; + _nb_special_register = nb_special_register; + _nb_inst_insert = nb_inst_insert ; + _nb_inst_retire = nb_inst_retire ; + _nb_reg_free = nb_reg_free ; + _nb_bank = nb_bank ; + _size_read_counter = size_read_counter ; + + uint32_t max_nb_context = max(nb_context, nb_front_end); + + _size_front_end_id = log2(nb_front_end ); + _size_context_id = log2(max_nb_context ); + _size_general_register = log2(nb_general_register); + _size_special_register = log2(nb_special_register); + + _have_port_front_end_id = _size_front_end_id>0; + _have_port_context_id = _size_context_id >0; + + + uint32_t nb_thread = 0; + for (uint32_t i=0; i + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + std::string msg = ""; + + return msg; + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,74 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + XML xml ("register_translation_unit"); + + xml.balise_open("register_translation_unit"); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); + xml.singleton_begin("nb_reg_free "); xml.attribut("value",toString(_nb_reg_free )); xml.singleton_end(); + xml.singleton_begin("nb_bank "); xml.attribut("value",toString(_nb_bank )); xml.singleton_end(); + xml.singleton_begin("size_read_counter "); xml.attribut("value",toString(_size_read_counter )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_front_end; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","front_end"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters & x) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp (revision 78) @@ -0,0 +1,113 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::Register_translation_unit" + Register_translation_unit::Register_translation_unit + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + log_printf(INFO,Register_translation_unit,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Register_translation_unit,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Register_translation_unit,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Register_translation_unit,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + +#endif + } + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::~Register_translation_unit" + Register_translation_unit::~Register_translation_unit (void) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Register_translation_unit,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Register_translation_unit,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp (revision 78) @@ -0,0 +1,787 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::allocation" + void Register_translation_unit::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Register_translation_unit" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("rename", IN, EAST, "Instruction with logical register", _param->_nb_inst_insert); + + ALLOC1_VALACK_IN ( in_RENAME_VAL ,VAL); + ALLOC1_VALACK_OUT(out_RENAME_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_RENAME_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG,"num_reg_ra_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG,"num_reg_rb_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG,"num_reg_rc_log",Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG,"num_reg_rd_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG,"num_reg_re_log",Tspecial_address_t,_param->_size_special_register_logic); + } + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("insert",OUT,WEST , "Instruction with physical register", _param->_nb_inst_insert); + + ALLOC1_VALACK_OUT(out_INSERT_VAL ,VAL); + ALLOC1_VALACK_IN ( in_INSERT_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_OUT(out_INSERT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_INSERT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_INSERT_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register ); + } + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("retire",IN ,NORTH, "Retire instruction, update renaming structure.", _param->_nb_inst_retire); + ALLOC1_VALACK_IN ( in_RETIRE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_RETIRE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RETIRE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_IN ( in_RETIRE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"event_state" ,Tevent_state_t ,_param->_size_event_state ); + ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register ); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string name; + { + name = _name+"_dependency_checking_unit"; + std::cout << "Create : " << name << std::endl; + + _component_dependency_checking_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Dependency_checking_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_dependency_checking_unit); + + _component->set_component (_component_dependency_checking_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_free_list_unit"; + std::cout << "Create : " << name << std::endl; + + _component_free_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Free_List_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_free_list_unit); + + _component->set_component (_component_free_list_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_register_address_translation_unit"; + std::cout << "Create : " << name << std::endl; + + _component_register_address_translation_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_register_address_translation_unit); + + _component->set_component (_component_register_address_translation_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_stat_list_unit"; + std::cout << "Create : " << name << std::endl; + + _component_stat_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Stat_List_unit + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_stat_list_unit); + + _component->set_component (_component_stat_list_unit->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + { + name = _name+"_register_translation_unit_glue"; + std::cout << "Create : " << name << std::endl; + + _component_register_translation_unit_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Register_translation_unit_Glue + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_register_translation_unit_glue); + + _component->set_component (_component_register_translation_unit_glue->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; + + // =================================================================== + // =====[ dependency_checking_unit ]================================== + // =================================================================== + { + src = _name+"_dependency_checking_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"rename_in_"+toString(i) + dest,"rename_"+toString(i)); +#endif + +// PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_VAL" ,dest,); +// PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(i)+"_ACK" ,dest,); + if (_param->_have_port_front_end_id) + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_FRONT_END_ID" , + dest, "in_RENAME_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_CONTEXT_ID" , + dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_READ_RA" , + dest, "in_RENAME_"+toString(i)+"_READ_RA" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_READ_RB" , + dest, "in_RENAME_"+toString(i)+"_READ_RB" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_READ_RC" , + dest, "in_RENAME_"+toString(i)+"_READ_RC" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_WRITE_RD" , + dest, "in_RENAME_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_WRITE_RE" , + dest, "in_RENAME_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG" ); + + dest = _name+"_register_address_translation_unit"; + + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY" , + dest,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY" , + dest,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY" , + dest,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY" ); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD", + dest,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD"); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD", + dest,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD"); + + dest = _name+"_free_list_unit"; + + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW", + dest,"out_POP_"+toString(i)+"_GPR_NUM_REG"); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW", + dest,"out_POP_"+toString(i)+"_SPR_NUM_REG"); + } + + // ~~~~~[ Interface "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"rename_out_"+toString(i), + dest,"insert_"+toString(i)); +#endif + +// PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_VAL" , +// dest,"out_INSERT_"+toString(i)+"_VAL" ); +// PORT_MAP(_component,src , "in_RENAME_OUT_"+toString(i)+"_ACK" , +// dest, "in_INSERT_"+toString(i)+"_ACK" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_FRONT_END_ID" , + dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_context_id) + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_CONTEXT_ID" , + dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RA" , + dest,"out_INSERT_"+toString(i)+"_READ_RA" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_LOG" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_LOG" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RB" , + dest,"out_INSERT_"+toString(i)+"_READ_RB" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_LOG" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_LOG" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RC" , + dest,"out_INSERT_"+toString(i)+"_READ_RC" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_LOG" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_LOG" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD" , + dest,"out_INSERT_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD", + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD"); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW", + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW"); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE" , + dest,"out_INSERT_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG" , + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG" ); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD", + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD"); + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW", + dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); + } + } + + // =================================================================== + // =====[ free_list_unit ]============================================ + // =================================================================== + { + src = _name+"_free_list_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"pop_"+toString(i) + dest,"rename_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_POP_"+toString(i)+"_GPR_VAL" , + dest,"in_RENAME_"+toString(i)+"_WRITE_RD"); + PORT_MAP(_component,src , "in_POP_"+toString(i)+"_SPR_VAL" , + dest,"in_RENAME_"+toString(i)+"_WRITE_RE"); + + dest = _name+"_register_translation_unit_glue"; + PORT_MAP(_component,src , "in_POP_"+toString(i)+"_VAL" , + dest,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" ); + PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_ACK" , + dest, "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" ); + + dest = _name+"_dependency_checking_unit"; + + PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_GPR_NUM_REG", + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW"); + PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_SPR_NUM_REG", + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); + } + // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + dest = _name+"_stat_list_unit"; +#ifdef POSITION + _component->interface_map (src ,"push_gpr_"+toString(i) + dest,"push_gpr_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_VAL" , + dest,"out_PUSH_GPR_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_ACK" , + dest, "in_PUSH_GPR_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_NUM_REG", + dest,"out_PUSH_GPR_"+toString(i)+"_NUM_REG"); + +#ifdef POSITION + _component->interface_map (src ,"push_spr_"+toString(i) + dest,"push_spr_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_VAL" , + dest,"out_PUSH_SPR_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_ACK" , + dest, "in_PUSH_SPR_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_NUM_REG", + dest,"out_PUSH_SPR_"+toString(i)+"_NUM_REG"); + } + } + + // =================================================================== + // =====[ register_address_translation_unit ]========================= + // =================================================================== + { + src = _name+"_register_address_translation_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"rename_"+toString(i) + dest,"rename_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_VAL" , + dest, "in_RENAME_"+toString(i)+"_VAL" ); + if (_param->_have_port_front_end_id) + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_FRONT_END_ID" , + dest, "in_RENAME_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_CONTEXT_ID" , + dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID" ); + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" ); + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG" ); + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG" ); + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG" ); + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG" , + dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG" ); + + dest = _name+"_register_translation_unit_glue"; + PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_ACK", + dest, "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK"); + + dest = _name+"_dependency_checking_unit"; + PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY" , + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY" ); + PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY" , + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY" ); + PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY" , + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY" ); + PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD", + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD"); + PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD", + dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD"); + } + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name+"_dependency_checking_unit"; +#ifdef POSITION + _component->interface_map (src ,"rename_"+toString(i) + dest,"rename_in_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD" , + dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE" , + dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_LOG", + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG"); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_LOG", + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG"); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY", + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD"); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY", + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD"); + + dest = _name+"_register_translation_unit_glue"; + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_VAL", + dest,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL"); + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK", + dest, "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK"); + } + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"retire_"+toString(i) + dest,"retire_"+toString(i)); +#endif + + if (_param->_have_port_front_end_id) + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_FRONT_END_ID" , + dest, "in_RETIRE_"+toString(i)+"_FRONT_END_ID" ); + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_CONTEXT_ID" , + dest, "in_RETIRE_"+toString(i)+"_CONTEXT_ID" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_EVENT_STATE" , + dest, "in_RETIRE_"+toString(i)+"_EVENT_STATE" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD" , + dest, "in_RETIRE_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE" , + dest, "in_RETIRE_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG" , + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG" , + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD"); + + dest = _name+"_register_translation_unit_glue"; + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL" , + dest,"out_RETIRE_"+toString(i)+"_RAT_VAL" ); + PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK" , + dest, "in_RETIRE_"+toString(i)+"_RAT_ACK" ); + } + } + + // =================================================================== + // =====[ stat_list_unit ]============================================ + // =================================================================== + { + src = _name+"_stat_list_unit"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name+"_dependency_checking_unit"; +#ifdef POSITION + _component->interface_map (src ,"insert_"+toString(i) + dest,"rename_out_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RA" , + dest,"out_RENAME_OUT_"+toString(i)+"_READ_RA" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RA_PHY" , + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RB" , + dest,"out_RENAME_OUT_"+toString(i)+"_READ_RB" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RB_PHY" , + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RC" , + dest,"out_RENAME_OUT_"+toString(i)+"_READ_RC" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RC_PHY" , + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD" , + dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW", + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW"); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE" , + dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW", + dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); + + dest = _name+"_register_translation_unit_glue"; + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_VAL" , + dest,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL"); + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK" , + dest, "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" ); + } + + // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"retire_"+toString(i) + dest,"retire_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RA" , + dest, "in_RETIRE_"+toString(i)+"_READ_RA" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RA_PHY" , + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RA_PHY" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RB" , + dest, "in_RETIRE_"+toString(i)+"_READ_RB" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RB_PHY" , + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RB_PHY" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RC" , + dest, "in_RETIRE_"+toString(i)+"_READ_RC" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RC_PHY" , + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RC_PHY" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD" , + dest, "in_RETIRE_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW", + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE" , + dest, "in_RETIRE_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW", + dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); + + dest = _name+"_register_translation_unit_glue"; + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL", + dest,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL"); + PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK", + dest, "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK"); + } + + // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + dest = _name+"_free_list_unit"; +#ifdef POSITION + _component->interface_map (src ,"push_gpr_"+toString(i) + dest,"push_gpr_"+toString(i)); +#endif + + PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_VAL" , + dest, "in_PUSH_GPR_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_ACK" , + dest,"out_PUSH_GPR_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_NUM_REG", + dest, "in_PUSH_GPR_"+toString(i)+"_NUM_REG"); + +#ifdef POSITION + _component->interface_map (src ,"push_spr_"+toString(i) + dest,"push_spr_"+toString(i)); +#endif + + PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_VAL" , + dest, "in_PUSH_SPR_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_ACK" , + dest,"out_PUSH_SPR_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_NUM_REG", + dest, "in_PUSH_SPR_"+toString(i)+"_NUM_REG"); + } + } + + // =================================================================== + // =====[ register_translation_unit_glue ]============================ + // =================================================================== + { + src = _name+"_register_translation_unit_glue"; + std::cout << "Instance : " << src << std::endl; + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"insert_"+toString(i), + dest,"insert_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RENAME_VAL" , + dest, "in_RENAME_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RENAME_ACK" , + dest,"out_RENAME_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_INSERT_VAL" , + dest,"out_INSERT_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_INSERT_ACK" , + dest, "in_INSERT_"+toString(i)+"_ACK" ); + + dest = _name+"_register_address_translation_unit"; + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL", + dest, "in_INSERT_"+toString(i)+"_VAL"); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK", + dest,"out_RENAME_"+toString(i)+"_ACK"); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK", + dest,"out_INSERT_"+toString(i)+"_ACK"); + + dest = _name+"_free_list_unit"; + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" , + dest, "in_POP_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" , + dest,"out_POP_"+toString(i)+"_ACK" ); + + dest = _name+"_stat_list_unit"; + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL" , + dest, "in_INSERT_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" , + dest,"out_INSERT_"+toString(i)+"_ACK" ); + } + + // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"retire", + dest,"retire"); +#endif + + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL" , + dest, "in_RETIRE_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK" , + dest,"out_RETIRE_"+toString(i)+"_ACK" ); + + dest = _name+"_register_address_translation_unit"; + PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RAT_VAL" , + dest, "in_RETIRE_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RAT_ACK" , + dest,"out_RETIRE_"+toString(i)+"_ACK" ); + + dest = _name+"_stat_list_unit"; + PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL", + dest, "in_RETIRE_"+toString(i)+"_VAL"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK", + dest,"out_RETIRE_"+toString(i)+"_ACK"); + } + } + + + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _component->test_map(); + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp (revision 78) @@ -0,0 +1,113 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::deallocation" + void Register_translation_unit::deallocation (void) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_RENAME_VAL ; + delete [] out_RENAME_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RENAME_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RENAME_CONTEXT_ID ; + delete [] in_RENAME_READ_RA ; + delete [] in_RENAME_NUM_REG_RA_LOG ; + delete [] in_RENAME_READ_RB ; + delete [] in_RENAME_NUM_REG_RB_LOG ; + delete [] in_RENAME_READ_RC ; + delete [] in_RENAME_NUM_REG_RC_LOG ; + delete [] in_RENAME_WRITE_RD ; + delete [] in_RENAME_NUM_REG_RD_LOG ; + delete [] in_RENAME_WRITE_RE ; + delete [] in_RENAME_NUM_REG_RE_LOG ; + + delete [] out_INSERT_VAL ; + delete [] in_INSERT_ACK ; + if (_param->_have_port_front_end_id) + delete [] out_INSERT_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] out_INSERT_CONTEXT_ID ; + delete [] out_INSERT_READ_RA ; + delete [] out_INSERT_NUM_REG_RA_LOG ; + delete [] out_INSERT_NUM_REG_RA_PHY ; + delete [] out_INSERT_READ_RB ; + delete [] out_INSERT_NUM_REG_RB_LOG ; + delete [] out_INSERT_NUM_REG_RB_PHY ; + delete [] out_INSERT_READ_RC ; + delete [] out_INSERT_NUM_REG_RC_LOG ; + delete [] out_INSERT_NUM_REG_RC_PHY ; + delete [] out_INSERT_WRITE_RD ; + delete [] out_INSERT_NUM_REG_RD_LOG ; + delete [] out_INSERT_NUM_REG_RD_PHY_OLD; + delete [] out_INSERT_NUM_REG_RD_PHY_NEW; + delete [] out_INSERT_WRITE_RE ; + delete [] out_INSERT_NUM_REG_RE_LOG ; + delete [] out_INSERT_NUM_REG_RE_PHY_OLD; + delete [] out_INSERT_NUM_REG_RE_PHY_NEW; + + delete [] in_RETIRE_VAL ; + delete [] out_RETIRE_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RETIRE_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RETIRE_CONTEXT_ID ; + delete [] in_RETIRE_EVENT_STATE ; + delete [] in_RETIRE_READ_RA ; + delete [] in_RETIRE_NUM_REG_RA_PHY ; + delete [] in_RETIRE_READ_RB ; + delete [] in_RETIRE_NUM_REG_RB_PHY ; + delete [] in_RETIRE_READ_RC ; + delete [] in_RETIRE_NUM_REG_RC_PHY ; + delete [] in_RETIRE_WRITE_RD ; + delete [] in_RETIRE_NUM_REG_RD_LOG ; + delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RD_PHY_NEW; + delete [] in_RETIRE_WRITE_RE ; + delete [] in_RETIRE_NUM_REG_RE_LOG ; + delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; + delete [] in_RETIRE_NUM_REG_RE_PHY_NEW; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component_dependency_checking_unit ; + delete _component_free_list_unit ; + delete _component_register_address_translation_unit; + delete _component_stat_list_unit ; + delete _component_register_translation_unit_glue ; + + delete _component; + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::end_cycle" +void Register_translation_unit::end_cycle () + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_statistics_declaration.cpp (revision 78) @@ -0,0 +1,47 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::statistics_declaration" + void Register_translation_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Register_translation_unit", + param_statistics); + + _stat->add_stat(_component_dependency_checking_unit ->_stat); + _stat->add_stat(_component_free_list_unit ->_stat); + _stat->add_stat(_component_register_address_translation_unit->_stat); + _stat->add_stat(_component_stat_list_unit ->_stat); + _stat->add_stat(_component_register_translation_unit_glue ->_stat); + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_transition.cpp (revision 78) @@ -0,0 +1,43 @@ +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::transition" + void Register_translation_unit::transition (void) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +# endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_vhdl.cpp (revision 78) @@ -0,0 +1,47 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_translation_unit::vhdl" + void Register_translation_unit::vhdl (void) + { + log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); + }; + +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libRename_select.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Rename_select = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Rename_select_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select + +#-----[ Library ]------------------------------------------ + +Rename_select_LIBRARY = -lRename_select \ + $(Behavioural_LIBRARY) + +Rename_select_DIR_LIBRARY = -L$(Rename_select_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Rename_select_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Rename_select_DIR) --makefile=Makefile; + +Rename_select_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Rename_select_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Rename_select_LIBRARY) + +DIR_LIBRARY = $(Rename_select_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Rename_select_library + +library_clean : Rename_select_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/config_mono_front_end.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/config_mono_front_end.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/config_mono_front_end.cfg (revision 78) @@ -0,0 +1,10 @@ +Rename_select +1 1 +1 # nb_front_end +1 1 +1 # nb_context [0] [nb_front_end] +1 1 +1 # max_branch_speculated +32 32 *2 # size_general_data +1 4 *4 # nb_inst_rename +1 4 *4 # nb_inst_decod [0] [nb_front_end] +1 1 *4 # nb_front_end_select +0 1 +1 # priority +0 1 +1 # load_balancing Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/config_multi_front_end.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/config_multi_front_end.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/config_multi_front_end.cfg (revision 78) @@ -0,0 +1,16 @@ +Rename_select +4 4 +1 # nb_front_end +2 2 +1 # nb_context [0] [nb_front_end] +4 4 +1 # nb_context [1] [nb_front_end] +3 3 +1 # nb_context [2] [nb_front_end] +1 1 +1 # nb_context [3] [nb_front_end] +1 1 +1 # max_branch_speculated +32 32 *2 # size_general_data +4 4 *4 # nb_inst_rename +3 3 *4 # nb_inst_decod [0] [nb_front_end] +1 1 *4 # nb_inst_decod [1] [nb_front_end] +2 2 *4 # nb_inst_decod [2] [nb_front_end] +4 4 *4 # nb_inst_decod [3] [nb_front_end] +1 4 +1 # nb_front_end_select +0 1 +1 # priority +0 1 +1 # load_balancing Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/include/test.h (revision 78) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine; +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit; + +using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select; + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,95 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/include/test.h" + +#define NB_PARAMS 7 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_front_end (uint32_t )\n")); + err (_(" * nb_context [nb_front_end] (uint32_t )\n")); + err (_(" * max_branch_speculated (uint32_t )\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * nb_inst_rename (uint32_t )\n")); + err (_(" * nb_inst_decod [nb_front_end] (uint32_t )\n")); + err (_(" * nb_front_end_select (uint32_t )\n")); + err (_(" * priority (Tpriority_t )\n")); + err (_(" * load_balancing (Tload_balancing_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _nb_front_end = atoi(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+2*_nb_front_end)) + usage (argc, argv); + + uint32_t * _nb_context = new uint32_t [_nb_front_end]; + for (uint32_t i=0; i<_nb_front_end; i++) + _nb_context [i] = atoi(argv[x++]); + + uint32_t _max_branch_speculated= atoi(argv[x++]); + uint32_t _size_general_data = atoi(argv[x++]); + uint32_t _nb_inst_rename = atoi(argv[x++]); + uint32_t * _nb_inst_decod = new uint32_t [_nb_front_end]; + for (uint32_t i=0; i<_nb_front_end; i++) + _nb_inst_decod [i] = atoi(argv[x++]); + + uint32_t _nb_front_end_select = atoi(argv[x++]); + Tpriority_t _priority = fromString(argv[x++]); + Tload_balancing_t _load_balancing = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters + (_nb_front_end , + _nb_context , + _max_branch_speculated, + _size_general_data , + _nb_inst_rename , + _nb_inst_decod , + _nb_front_end_select , + _priority , + _load_balancing ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete _nb_context ; + delete _nb_inst_decod; + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,371 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/BitManipulation.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 256 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Rename_select * _Rename_select = new Rename_select (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC2_SC_SIGNAL( in_RENAME_IN_VAL ," in_RENAME_IN_VAL ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL(out_RENAME_IN_ACK ,"out_RENAME_IN_ACK ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID ," in_RENAME_IN_FRONT_END_ID ",Tcontext_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID ," in_RENAME_IN_CONTEXT_ID ",Tcontext_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_DEPTH ," in_RENAME_IN_DEPTH ",Tdepth_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_TYPE ," in_RENAME_IN_TYPE ",Ttype_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_OPERATION ," in_RENAME_IN_OPERATION ",Toperation_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS ," in_RENAME_IN_ADDRESS ",Tgeneral_data_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT ," in_RENAME_IN_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT ," in_RENAME_IN_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RA ," in_RENAME_IN_READ_RA ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA ," in_RENAME_IN_NUM_REG_RA ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RB ," in_RENAME_IN_READ_RB ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB ," in_RENAME_IN_NUM_REG_RB ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RC ," in_RENAME_IN_READ_RC ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC ," in_RENAME_IN_NUM_REG_RC ",Tspecial_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RD ," in_RENAME_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD ," in_RENAME_IN_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RE ," in_RENAME_IN_WRITE_RE ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE ," in_RENAME_IN_NUM_REG_RE ",Tspecial_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + ALLOC2_SC_SIGNAL( in_RENAME_IN_EXCEPTION_USE ," in_RENAME_IN_EXCEPTION_USE ",Texception_t ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + + ALLOC1_SC_SIGNAL(out_RENAME_OUT_VAL ,"out_RENAME_OUT_VAL ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL( in_RENAME_OUT_ACK ," in_RENAME_OUT_ACK ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_FRONT_END_ID ,"out_RENAME_OUT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_CONTEXT_ID ,"out_RENAME_OUT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_DEPTH ,"out_RENAME_OUT_DEPTH ",Tdepth_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_TYPE ,"out_RENAME_OUT_TYPE ",Ttype_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_OPERATION ,"out_RENAME_OUT_OPERATION ",Toperation_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS ,"out_RENAME_OUT_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_HAS_IMMEDIAT ,"out_RENAME_OUT_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_IMMEDIAT ,"out_RENAME_OUT_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RA ,"out_RENAME_OUT_READ_RA ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RA ,"out_RENAME_OUT_NUM_REG_RA ",Tgeneral_address_t,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RB ,"out_RENAME_OUT_READ_RB ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RB ,"out_RENAME_OUT_NUM_REG_RB ",Tgeneral_address_t,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_READ_RC ,"out_RENAME_OUT_READ_RC ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RC ,"out_RENAME_OUT_NUM_REG_RC ",Tspecial_address_t,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_WRITE_RD ,"out_RENAME_OUT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RD ,"out_RENAME_OUT_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_WRITE_RE ,"out_RENAME_OUT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE ,"out_RENAME_OUT_NUM_REG_RE ",Tspecial_address_t,_param->_nb_inst_rename); + ALLOC1_SC_SIGNAL(out_RENAME_OUT_EXCEPTION_USE,"out_RENAME_OUT_EXCEPTION_USE",Texception_t ,_param->_nb_inst_rename); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Rename_select.\n"),name.c_str()); + + (*(_Rename_select->in_CLOCK)) (*(in_CLOCK)); + (*(_Rename_select->in_NRESET)) (*(in_NRESET)); + + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_VAL ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select,out_RENAME_IN_ACK ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + if (_param->_have_port_front_end_id) + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_FRONT_END_ID ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + if (_param->_have_port_context_id) + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_CONTEXT_ID ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + if (_param->_have_port_depth) + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_DEPTH ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_TYPE ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_HAS_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RA ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RA ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RB ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RB ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RC ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RC ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_WRITE_RD ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RD ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_WRITE_RE ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RE ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_EXCEPTION_USE ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_VAL ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select, in_RENAME_OUT_ACK ,_param->_nb_inst_rename); + if (_param->_have_port_front_end_id) + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_FRONT_END_ID ,_param->_nb_inst_rename); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_CONTEXT_ID ,_param->_nb_inst_rename); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_DEPTH ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_TYPE ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_OPERATION ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_ADDRESS ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_HAS_IMMEDIAT ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_IMMEDIAT ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_READ_RA ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NUM_REG_RA ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_READ_RB ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NUM_REG_RB ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_READ_RC ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NUM_REG_RC ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_WRITE_RD ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NUM_REG_RD ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_WRITE_RE ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NUM_REG_RE ,_param->_nb_inst_rename); + INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_EXCEPTION_USE,_param->_nb_inst_rename); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + const int32_t percent_transaction_rename_in = 75; + const int32_t percent_transaction_rename_out = 75; + + uint32_t nb_rename_in = 0; + for (uint32_t i=0; i<_param->_nb_front_end; i++) + nb_rename_in += _param->_nb_inst_decod[i]; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) + { + in_RENAME_IN_VAL [i][j]->write((rand()%100)write(range(rand(),_param->_size_front_end_id )); + in_RENAME_IN_CONTEXT_ID [i][j]->write(range(rand(),log2(_param->_nb_context[i]) )); + in_RENAME_IN_DEPTH [i][j]->write(range(rand(),_param->_size_depth )); + in_RENAME_IN_TYPE [i][j]->write(range(rand(),_param->_size_type )); + in_RENAME_IN_OPERATION [i][j]->write(range(rand(),_param->_size_operation )); + in_RENAME_IN_ADDRESS [i][j]->write(address++ ); + in_RENAME_IN_HAS_IMMEDIAT [i][j]->write(range(rand(),1 )); + in_RENAME_IN_IMMEDIAT [i][j]->write(range(rand(),_param->_size_general_data )); + in_RENAME_IN_READ_RA [i][j]->write(range(rand(),1 )); + in_RENAME_IN_NUM_REG_RA [i][j]->write(range(rand(),_param->_size_general_register_logic)); + in_RENAME_IN_READ_RB [i][j]->write(range(rand(),1 )); + in_RENAME_IN_NUM_REG_RB [i][j]->write(range(rand(),_param->_size_general_register_logic)); + in_RENAME_IN_READ_RC [i][j]->write(range(rand(),1 )); + in_RENAME_IN_NUM_REG_RC [i][j]->write(range(rand(),_param->_size_special_register_logic)); + in_RENAME_IN_WRITE_RD [i][j]->write(range(rand(),1 )); + in_RENAME_IN_NUM_REG_RD [i][j]->write(range(rand(),_param->_size_general_register_logic)); + in_RENAME_IN_WRITE_RE [i][j]->write(range(rand(),1 )); + in_RENAME_IN_NUM_REG_RE [i][j]->write(range(rand(),_param->_size_special_register_logic)); + in_RENAME_IN_EXCEPTION_USE[i][j]->write(range(rand(),_param->_size_exception )); + } + + for (uint32_t i=0; i<_param->_nb_inst_rename; i++) + in_RENAME_OUT_ACK [i]->write((rand()%100)_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) + { + rename_in_use[address++] = false; + + if (in_RENAME_IN_VAL [i][j]->read() and out_RENAME_IN_ACK [i][j]->read()) + { + nb_transaction_rename_in ++; + } + } + + for (uint32_t i=0; i<_param->_nb_inst_rename; i++) + { + if (out_RENAME_OUT_VAL [i]->read() and in_RENAME_OUT_ACK [i]->read()) + { + nb_transaction_rename_out ++; + + // Test + address = out_RENAME_OUT_ADDRESS [i]->read(); + + TEST(bool, address_nb_front_end; x++) + for (uint32_t y=0; y<_param->_nb_inst_decod[x]; y++) + if (in_RENAME_IN_ADDRESS [x][y]->read() == address) + { + find = true; + + if (_param->_have_port_front_end_id) + TEST(Tcontext_t ,out_RENAME_OUT_FRONT_END_ID [i]->read(),in_RENAME_IN_FRONT_END_ID [x][y]->read()); + if (_param->_have_port_context_id) + TEST(Tcontext_t ,out_RENAME_OUT_CONTEXT_ID [i]->read(),in_RENAME_IN_CONTEXT_ID [x][y]->read()); + if (_param->_have_port_depth) + TEST(Tdepth_t ,out_RENAME_OUT_DEPTH [i]->read(),in_RENAME_IN_DEPTH [x][y]->read()); + TEST(Ttype_t ,out_RENAME_OUT_TYPE [i]->read(),in_RENAME_IN_TYPE [x][y]->read()); + TEST(Toperation_t ,out_RENAME_OUT_OPERATION [i]->read(),in_RENAME_IN_OPERATION [x][y]->read()); + TEST(Tcontrol_t ,out_RENAME_OUT_HAS_IMMEDIAT [i]->read(),in_RENAME_IN_HAS_IMMEDIAT [x][y]->read()); + TEST(Tgeneral_data_t ,out_RENAME_OUT_IMMEDIAT [i]->read(),in_RENAME_IN_IMMEDIAT [x][y]->read()); + TEST(Tcontrol_t ,out_RENAME_OUT_READ_RA [i]->read(),in_RENAME_IN_READ_RA [x][y]->read()); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA [i]->read(),in_RENAME_IN_NUM_REG_RA [x][y]->read()); + TEST(Tcontrol_t ,out_RENAME_OUT_READ_RB [i]->read(),in_RENAME_IN_READ_RB [x][y]->read()); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB [i]->read(),in_RENAME_IN_NUM_REG_RB [x][y]->read()); + TEST(Tcontrol_t ,out_RENAME_OUT_READ_RC [i]->read(),in_RENAME_IN_READ_RC [x][y]->read()); + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC [i]->read(),in_RENAME_IN_NUM_REG_RC [x][y]->read()); + TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RD [i]->read(),in_RENAME_IN_WRITE_RD [x][y]->read()); + TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD [i]->read(),in_RENAME_IN_NUM_REG_RD [x][y]->read()); + TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RE [i]->read(),in_RENAME_IN_WRITE_RE [x][y]->read()); + TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE [i]->read(),in_RENAME_IN_NUM_REG_RE [x][y]->read()); + TEST(Texception_t ,out_RENAME_OUT_EXCEPTION_USE[i]->read(),in_RENAME_IN_EXCEPTION_USE[x][y]->read()); + + } + + TEST(bool, find, true); + } + } + + TEST(uint32_t, nb_transaction_rename_in, nb_transaction_rename_out); + + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_RENAME_IN_VAL ; + delete [] out_RENAME_IN_ACK ; + delete [] in_RENAME_IN_FRONT_END_ID ; + delete [] in_RENAME_IN_CONTEXT_ID ; + delete [] in_RENAME_IN_DEPTH ; + delete [] in_RENAME_IN_TYPE ; + delete [] in_RENAME_IN_OPERATION ; + delete [] in_RENAME_IN_ADDRESS ; + delete [] in_RENAME_IN_HAS_IMMEDIAT ; + delete [] in_RENAME_IN_IMMEDIAT ; + delete [] in_RENAME_IN_READ_RA ; + delete [] in_RENAME_IN_NUM_REG_RA ; + delete [] in_RENAME_IN_READ_RB ; + delete [] in_RENAME_IN_NUM_REG_RB ; + delete [] in_RENAME_IN_READ_RC ; + delete [] in_RENAME_IN_NUM_REG_RC ; + delete [] in_RENAME_IN_WRITE_RD ; + delete [] in_RENAME_IN_NUM_REG_RD ; + delete [] in_RENAME_IN_WRITE_RE ; + delete [] in_RENAME_IN_NUM_REG_RE ; + delete [] in_RENAME_IN_EXCEPTION_USE ; + + delete [] out_RENAME_OUT_VAL ; + delete [] in_RENAME_OUT_ACK ; + delete [] out_RENAME_OUT_FRONT_END_ID ; + delete [] out_RENAME_OUT_CONTEXT_ID ; + delete [] out_RENAME_OUT_DEPTH ; + delete [] out_RENAME_OUT_TYPE ; + delete [] out_RENAME_OUT_OPERATION ; + delete [] out_RENAME_OUT_ADDRESS ; + delete [] out_RENAME_OUT_HAS_IMMEDIAT ; + delete [] out_RENAME_OUT_IMMEDIAT ; + delete [] out_RENAME_OUT_READ_RA ; + delete [] out_RENAME_OUT_NUM_REG_RA ; + delete [] out_RENAME_OUT_READ_RB ; + delete [] out_RENAME_OUT_NUM_REG_RB ; + delete [] out_RENAME_OUT_READ_RC ; + delete [] out_RENAME_OUT_NUM_REG_RC ; + delete [] out_RENAME_OUT_WRITE_RD ; + delete [] out_RENAME_OUT_NUM_REG_RD ; + delete [] out_RENAME_OUT_WRITE_RE ; + delete [] out_RENAME_OUT_NUM_REG_RE ; + delete [] out_RENAME_OUT_EXCEPTION_USE; +#endif + + delete _Rename_select; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/Rename_select.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/Rename_select.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/Rename_select.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Rename_select} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h (revision 78) @@ -0,0 +1,76 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_select_Parameters_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_select_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _max_branch_speculated ; + public : uint32_t _size_general_data ; + public : uint32_t _nb_inst_rename ; + public : uint32_t * _nb_inst_decod ;//[nb_front_end] + public : uint32_t _nb_front_end_select ; + public : Tpriority_t _priority ; + public : Tload_balancing_t _load_balancing ; + + public : uint32_t _max_nb_inst_decod ; + + public : uint32_t _size_front_end_id ; + public : uint32_t _size_context_id ; + public : uint32_t _size_depth ; + + public : bool _have_port_front_end_id; + public : bool _have_port_context_id ; + public : bool _have_port_depth ; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t max_branch_speculated, + uint32_t size_general_data , + uint32_t nb_inst_rename , + uint32_t * nb_inst_decod , + uint32_t nb_front_end_select , + Tpriority_t priority , + Tload_balancing_t load_balancing ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : std::string msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters & x); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h (revision 78) @@ -0,0 +1,177 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_select_Rename_select_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_select_Rename_select_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" +#include + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + + class Rename_select +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_VAL ;//[nb_front_end][nb_inst_decod] + public : SC_OUT(Tcontrol_t ) *** out_RENAME_IN_ACK ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontext_t ) *** in_RENAME_IN_FRONT_END_ID ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontext_t ) *** in_RENAME_IN_CONTEXT_ID ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tdepth_t ) *** in_RENAME_IN_DEPTH ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Ttype_t ) *** in_RENAME_IN_TYPE ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Toperation_t ) *** in_RENAME_IN_OPERATION ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_HAS_IMMEDIAT ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tgeneral_data_t ) *** in_RENAME_IN_IMMEDIAT ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_READ_RA ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tgeneral_address_t) *** in_RENAME_IN_NUM_REG_RA ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_READ_RB ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tgeneral_address_t) *** in_RENAME_IN_NUM_REG_RB ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_READ_RC ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tspecial_address_t) *** in_RENAME_IN_NUM_REG_RC ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_WRITE_RD ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tgeneral_address_t) *** in_RENAME_IN_NUM_REG_RD ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_WRITE_RE ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tspecial_address_t) *** in_RENAME_IN_NUM_REG_RE ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Texception_t ) *** in_RENAME_IN_EXCEPTION_USE ;//[nb_front_end][nb_inst_decod] + + // ~~~~~[ Interface : "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_VAL ;//[nb_inst_rename] + public : SC_IN (Tcontrol_t ) ** in_RENAME_OUT_ACK ;//[nb_inst_rename] + public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_FRONT_END_ID ;//[nb_inst_rename] + public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_CONTEXT_ID ;//[nb_inst_rename] + public : SC_OUT(Tdepth_t ) ** out_RENAME_OUT_DEPTH ;//[nb_inst_rename] + public : SC_OUT(Ttype_t ) ** out_RENAME_OUT_TYPE ;//[nb_inst_rename] + public : SC_OUT(Toperation_t ) ** out_RENAME_OUT_OPERATION ;//[nb_inst_rename] + public : SC_OUT(Tgeneral_data_t ) ** out_RENAME_OUT_ADDRESS ;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_HAS_IMMEDIAT ;//[nb_inst_rename] + public : SC_OUT(Tgeneral_data_t ) ** out_RENAME_OUT_IMMEDIAT ;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RA ;//[nb_inst_rename] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RA ;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RB ;//[nb_inst_rename] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RB ;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RC ;//[nb_inst_rename] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RC ;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_WRITE_RD ;//[nb_inst_rename] + public : SC_OUT(Tgeneral_address_t) ** out_RENAME_OUT_NUM_REG_RD ;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_WRITE_RE ;//[nb_inst_rename] + public : SC_OUT(Tspecial_address_t) ** out_RENAME_OUT_NUM_REG_RE ;//[nb_inst_rename] + public : SC_OUT(Texception_t ) ** out_RENAME_OUT_EXCEPTION_USE;//[nb_inst_rename] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t reg_FRONT_END_PRIORITY; + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : std::list select; +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Rename_select); +#endif + public : Rename_select + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Rename_select (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); + public : void genMealy (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h (revision 78) @@ -0,0 +1,42 @@ +#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_select_Types_h +#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_select_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + class select_t + { + public : uint32_t _front_end ; + public : uint32_t _inst_decod; + + public : select_t (uint32_t front_end, + uint32_t inst_decod) + { + _front_end = front_end ; + _inst_decod = inst_decod; + } + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp (revision 78) @@ -0,0 +1,82 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h" +#include "Common/include/Max.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::Parameters" + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t max_branch_speculated, + uint32_t size_general_data , + uint32_t nb_inst_rename , + uint32_t * nb_inst_decod , + uint32_t nb_front_end_select , + Tpriority_t priority , + Tload_balancing_t load_balancing ) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _max_branch_speculated = max_branch_speculated; + _size_general_data = size_general_data ; + _nb_inst_rename = nb_inst_rename ; + _nb_inst_decod = nb_inst_decod ; + _nb_front_end_select = nb_front_end_select ; + _priority = priority ; + _load_balancing = load_balancing ; + + _max_nb_inst_decod = max(nb_inst_decod,nb_front_end); + + _size_front_end_id = log2(nb_front_end); + _size_context_id = log2(max(nb_context,nb_front_end)); + _size_depth = log2(max_branch_speculated); + + _have_port_front_end_id= _size_front_end_id > 0; + _have_port_context_id = _size_context_id > 0; + _have_port_depth = _size_depth > 0; + + test(); + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Rename_select::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Rename_select,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Rename_select,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Rename_select::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,53 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::msg_error" + std::string Parameters::msg_error(void) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + std::string msg = ""; + + if ((_nb_front_end_select == 0) or + (_nb_front_end_select > _nb_front_end)) + msg += " - nb_front_end_select must be in [1:nb_front_end].\n"; + + if ((_priority != PRIORITY_STATIC) and + (_priority != PRIORITY_ROUND_ROBIN)) + msg += " - Unsupported priority scheme. Supported scheme are : "+toString(PRIORITY_STATIC)+" and "+toString(PRIORITY_ROUND_ROBIN)+".\n"; + + if ((_load_balancing != LOAD_BALANCING_BALANCE) and + (_load_balancing != LOAD_BALANCING_MAXIMUM_FOR_PRIORITY)) + msg += " - Unsupported load_balancing scheme. Supported scheme are : "+toString(LOAD_BALANCING_BALANCE)+" and "+toString(LOAD_BALANCING_MAXIMUM_FOR_PRIORITY)+".\n"; + + return msg; + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,74 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + XML xml ("rename_select"); + + xml.balise_open("rename_select"); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("max_branch_speculated"); xml.attribut("value",toString(_max_branch_speculated)); xml.singleton_end(); + xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); + xml.singleton_begin("nb_inst_rename "); xml.attribut("value",toString(_nb_inst_rename )); xml.singleton_end(); + xml.singleton_begin("nb_front_end_select "); xml.attribut("value",toString(_nb_front_end_select )); xml.singleton_end(); + xml.singleton_begin("priority "); xml.attribut("value",toString(_priority )); xml.singleton_end(); + xml.singleton_begin("load_balancing "); xml.attribut("value",toString(_load_balancing )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_front_end; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","front_end"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i])); xml.singleton_end(); + xml. singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod [i])); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Rename_select::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters & x) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp (revision 78) @@ -0,0 +1,217 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::Rename_select" + Rename_select::Rename_select + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + log_printf(INFO,Rename_select,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Rename_select,FUNCTION,"Allocation of statistics"); + + statistics_declaration(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Rename_select,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Rename_select,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Rename_select,FUNCTION,"Method - genMealy"); + + SC_METHOD (genMealy); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++) + { + sensitive << (*(in_RENAME_IN_VAL [i][j])) + << (*(in_RENAME_IN_TYPE [i][j])) + << (*(in_RENAME_IN_OPERATION [i][j])) + << (*(in_RENAME_IN_ADDRESS [i][j])) + << (*(in_RENAME_IN_HAS_IMMEDIAT [i][j])) + << (*(in_RENAME_IN_IMMEDIAT [i][j])) + << (*(in_RENAME_IN_READ_RA [i][j])) + << (*(in_RENAME_IN_NUM_REG_RA [i][j])) + << (*(in_RENAME_IN_READ_RB [i][j])) + << (*(in_RENAME_IN_NUM_REG_RB [i][j])) + << (*(in_RENAME_IN_READ_RC [i][j])) + << (*(in_RENAME_IN_NUM_REG_RC [i][j])) + << (*(in_RENAME_IN_WRITE_RD [i][j])) + << (*(in_RENAME_IN_NUM_REG_RD [i][j])) + << (*(in_RENAME_IN_WRITE_RE [i][j])) + << (*(in_RENAME_IN_NUM_REG_RE [i][j])) + << (*(in_RENAME_IN_EXCEPTION_USE [i][j])); + if (_param->_have_port_front_end_id) + sensitive << (*(in_RENAME_IN_FRONT_END_ID [i][j])); + if (_param->_have_port_context_id) + sensitive << (*(in_RENAME_IN_CONTEXT_ID [i][j])); + if (_param->_have_port_depth) + sensitive << (*(in_RENAME_IN_DEPTH [i][j])); + } + for (uint32_t i=0; i<_param->_nb_inst_rename; i++) + sensitive << (*(in_RENAME_OUT_ACK [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++) + for (uint32_t x=0; x<_param->_nb_inst_rename; x++) + { + (*(out_RENAME_IN_ACK [i][j])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_IN_ACK [i][j])) (*(in_RENAME_OUT_ACK [x] )); + } + + for (uint32_t x=0; x<_param->_nb_inst_rename; x++) + { + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++) + { + (*(out_RENAME_OUT_VAL [x])) (*(in_RENAME_IN_VAL [i][j])); + + if (_param->_have_port_front_end_id) + { + (*(out_RENAME_OUT_FRONT_END_ID [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_FRONT_END_ID [x])) (*(in_RENAME_IN_FRONT_END_ID [i][j])); + } + if (_param->_have_port_context_id) + { + (*(out_RENAME_OUT_CONTEXT_ID [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_CONTEXT_ID [x])) (*(in_RENAME_IN_CONTEXT_ID [i][j])); + } + if (_param->_have_port_depth) + { + (*(out_RENAME_OUT_DEPTH [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_DEPTH [x])) (*(in_RENAME_IN_DEPTH [i][j])); + } + (*(out_RENAME_OUT_TYPE [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_TYPE [x])) (*(in_RENAME_IN_TYPE [i][j])); + (*(out_RENAME_OUT_OPERATION [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_OPERATION [x])) (*(in_RENAME_IN_OPERATION [i][j])); + (*(out_RENAME_OUT_ADDRESS [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_ADDRESS [x])) (*(in_RENAME_IN_ADDRESS [i][j])); + (*(out_RENAME_OUT_HAS_IMMEDIAT [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_HAS_IMMEDIAT [x])) (*(in_RENAME_IN_HAS_IMMEDIAT [i][j])); + (*(out_RENAME_OUT_IMMEDIAT [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_IMMEDIAT [x])) (*(in_RENAME_IN_IMMEDIAT [i][j])); + (*(out_RENAME_OUT_READ_RA [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_READ_RA [x])) (*(in_RENAME_IN_READ_RA [i][j])); + (*(out_RENAME_OUT_NUM_REG_RA [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_NUM_REG_RA [x])) (*(in_RENAME_IN_NUM_REG_RA [i][j])); + (*(out_RENAME_OUT_READ_RB [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_READ_RB [x])) (*(in_RENAME_IN_READ_RB [i][j])); + (*(out_RENAME_OUT_NUM_REG_RB [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_NUM_REG_RB [x])) (*(in_RENAME_IN_NUM_REG_RB [i][j])); + (*(out_RENAME_OUT_READ_RC [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_READ_RC [x])) (*(in_RENAME_IN_READ_RC [i][j])); + (*(out_RENAME_OUT_NUM_REG_RC [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_NUM_REG_RC [x])) (*(in_RENAME_IN_NUM_REG_RC [i][j])); + (*(out_RENAME_OUT_WRITE_RD [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_WRITE_RD [x])) (*(in_RENAME_IN_WRITE_RD [i][j])); + (*(out_RENAME_OUT_NUM_REG_RD [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_NUM_REG_RD [x])) (*(in_RENAME_IN_NUM_REG_RD [i][j])); + (*(out_RENAME_OUT_WRITE_RE [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_WRITE_RE [x])) (*(in_RENAME_IN_WRITE_RE [i][j])); + (*(out_RENAME_OUT_NUM_REG_RE [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_NUM_REG_RE [x])) (*(in_RENAME_IN_NUM_REG_RE [i][j])); + (*(out_RENAME_OUT_EXCEPTION_USE [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_EXCEPTION_USE [x])) (*(in_RENAME_IN_EXCEPTION_USE [i][j])); + } + } +# endif + +#endif + } + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Rename_select::~Rename_select" + Rename_select::~Rename_select (void) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Rename_select,FUNCTION,"Generate Statistics file"); + + delete _stat; + } +#endif + + log_printf(INFO,Rename_select,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp (revision 78) @@ -0,0 +1,129 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + + +#undef FUNCTION +#define FUNCTION "Rename_select::allocation" + void Rename_select::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Rename_select" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[alloc_interface_it1]); + + _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_VALACK_OUT(out_RENAME_IN_ACK ,ACK, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_general_data , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RA ,"read_ra" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RB ,"read_rb" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RC ,"read_rc" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t ,_param->_size_exception , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]); + } + + // ~~~~~[ Interface : "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("rename_out", IN, EAST, "output of decod's stage", _param->_nb_inst_rename); + + ALLOC1_VALACK_OUT(out_RENAME_OUT_VAL ,VAL); + ALLOC1_VALACK_IN ( in_RENAME_OUT_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION_USE ,"exception_use",Texception_t ,_param->_size_exception ); + } + + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp (revision 78) @@ -0,0 +1,94 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::deallocation" + void Rename_select::deallocation (void) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_RENAME_IN_VAL ; + delete [] out_RENAME_IN_ACK ; + if (_param->_have_port_front_end_id) + delete [] in_RENAME_IN_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] in_RENAME_IN_CONTEXT_ID ; + if (_param->_have_port_depth) + delete [] in_RENAME_IN_DEPTH ; + delete [] in_RENAME_IN_TYPE ; + delete [] in_RENAME_IN_OPERATION ; + delete [] in_RENAME_IN_ADDRESS ; + delete [] in_RENAME_IN_HAS_IMMEDIAT ; + delete [] in_RENAME_IN_IMMEDIAT ; + delete [] in_RENAME_IN_READ_RA ; + delete [] in_RENAME_IN_NUM_REG_RA ; + delete [] in_RENAME_IN_READ_RB ; + delete [] in_RENAME_IN_NUM_REG_RB ; + delete [] in_RENAME_IN_READ_RC ; + delete [] in_RENAME_IN_NUM_REG_RC ; + delete [] in_RENAME_IN_WRITE_RD ; + delete [] in_RENAME_IN_NUM_REG_RD ; + delete [] in_RENAME_IN_WRITE_RE ; + delete [] in_RENAME_IN_NUM_REG_RE ; + delete [] in_RENAME_IN_EXCEPTION_USE ; + + delete [] out_RENAME_OUT_VAL ; + delete [] in_RENAME_OUT_ACK ; + if (_param->_have_port_front_end_id) + delete [] out_RENAME_OUT_FRONT_END_ID ; + if (_param->_have_port_context_id) + delete [] out_RENAME_OUT_CONTEXT_ID ; + if (_param->_have_port_depth) + delete [] out_RENAME_OUT_DEPTH ; + delete [] out_RENAME_OUT_TYPE ; + delete [] out_RENAME_OUT_OPERATION ; + delete [] out_RENAME_OUT_ADDRESS ; + delete [] out_RENAME_OUT_HAS_IMMEDIAT ; + delete [] out_RENAME_OUT_IMMEDIAT ; + delete [] out_RENAME_OUT_READ_RA ; + delete [] out_RENAME_OUT_NUM_REG_RA ; + delete [] out_RENAME_OUT_READ_RB ; + delete [] out_RENAME_OUT_NUM_REG_RB ; + delete [] out_RENAME_OUT_READ_RC ; + delete [] out_RENAME_OUT_NUM_REG_RC ; + delete [] out_RENAME_OUT_WRITE_RD ; + delete [] out_RENAME_OUT_NUM_REG_RD ; + delete [] out_RENAME_OUT_WRITE_RE ; + delete [] out_RENAME_OUT_NUM_REG_RE ; + delete [] out_RENAME_OUT_EXCEPTION_USE; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_end_cycle.cpp (revision 78) @@ -0,0 +1,47 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::end_cycle" +void Rename_select::end_cycle () + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 78) @@ -0,0 +1,94 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::genMealy" + void Rename_select::genMealy (void) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + Tcontrol_t ack [_param->_nb_front_end][_param->_max_nb_inst_decod]; + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) + ack [i][j] = false; + + std::list::iterator it=select.begin(); + + for (uint32_t i=0; i<_param->_nb_inst_rename; i++) + { + Tcontrol_t val = false; + + while ((it != select.end()) and (val == false)) + { + Tcontext_t x = it->_front_end ; + uint32_t y = it->_inst_decod; + + // Test if this instruction is valid + if (PORT_READ(in_RENAME_IN_VAL[x][y]) == 1) + { + // Find !!! + val = true; + ack [x][y] = PORT_READ(in_RENAME_OUT_ACK [i]); + + if (_param->_have_port_front_end_id) + PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i],PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y])); + if (_param->_have_port_context_id) + PORT_WRITE(out_RENAME_OUT_CONTEXT_ID [i],PORT_READ(in_RENAME_IN_CONTEXT_ID [x][y])); + if (_param->_have_port_depth) + PORT_WRITE(out_RENAME_OUT_DEPTH [i],PORT_READ(in_RENAME_IN_DEPTH [x][y])); + PORT_WRITE(out_RENAME_OUT_TYPE [i],PORT_READ(in_RENAME_IN_TYPE [x][y])); + PORT_WRITE(out_RENAME_OUT_OPERATION [i],PORT_READ(in_RENAME_IN_OPERATION [x][y])); + PORT_WRITE(out_RENAME_OUT_ADDRESS [i],PORT_READ(in_RENAME_IN_ADDRESS [x][y])); + PORT_WRITE(out_RENAME_OUT_HAS_IMMEDIAT [i],PORT_READ(in_RENAME_IN_HAS_IMMEDIAT [x][y])); + PORT_WRITE(out_RENAME_OUT_IMMEDIAT [i],PORT_READ(in_RENAME_IN_IMMEDIAT [x][y])); + PORT_WRITE(out_RENAME_OUT_READ_RA [i],PORT_READ(in_RENAME_IN_READ_RA [x][y])); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RA [i],PORT_READ(in_RENAME_IN_NUM_REG_RA [x][y])); + PORT_WRITE(out_RENAME_OUT_READ_RB [i],PORT_READ(in_RENAME_IN_READ_RB [x][y])); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RB [i],PORT_READ(in_RENAME_IN_NUM_REG_RB [x][y])); + PORT_WRITE(out_RENAME_OUT_READ_RC [i],PORT_READ(in_RENAME_IN_READ_RC [x][y])); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RC [i],PORT_READ(in_RENAME_IN_NUM_REG_RC [x][y])); + PORT_WRITE(out_RENAME_OUT_WRITE_RD [i],PORT_READ(in_RENAME_IN_WRITE_RD [x][y])); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RD [i],PORT_READ(in_RENAME_IN_NUM_REG_RD [x][y])); + PORT_WRITE(out_RENAME_OUT_WRITE_RE [i],PORT_READ(in_RENAME_IN_WRITE_RE [x][y])); + PORT_WRITE(out_RENAME_OUT_NUM_REG_RE [i],PORT_READ(in_RENAME_IN_NUM_REG_RE [x][y])); + PORT_WRITE(out_RENAME_OUT_EXCEPTION_USE[i],PORT_READ(in_RENAME_IN_EXCEPTION_USE [x][y])); + } + + it ++; + } + + PORT_WRITE(out_RENAME_OUT_VAL [i], val); + } + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) + PORT_WRITE(out_RENAME_IN_ACK [i][j], ack [i][j]); + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_statistics_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_statistics_declaration.cpp (revision 78) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::statistics_declaration" + void Rename_select::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Rename_select", + param_statistics); + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_transition.cpp (revision 78) @@ -0,0 +1,114 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::transition" + void Rename_select::transition (void) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + select.clear(); + reg_FRONT_END_PRIORITY = 0; + } + else + { + switch (_param->_priority) + { + case PRIORITY_STATIC : + { + reg_FRONT_END_PRIORITY = (reg_FRONT_END_PRIORITY+_param->_nb_front_end_select)%_param->_nb_front_end; + break; + } + case PRIORITY_ROUND_ROBIN : + { + reg_FRONT_END_PRIORITY = (reg_FRONT_END_PRIORITY+1)%_param->_nb_front_end; + break; + } + default: + { + break; + } + } + + // flush list + select.clear(); + + // Compute next scan order !!! + switch (_param->_load_balancing) + { + case LOAD_BALANCING_BALANCE : + { + for (uint32_t j=0; j<_param->_max_nb_inst_decod; j++) + for (uint32_t i=0; i<_param->_nb_front_end_select; i++) + { + uint32_t x=(reg_FRONT_END_PRIORITY+i)%_param->_nb_front_end; + + // Test valid inst_decod + if (j < _param->_nb_inst_decod[x]) + select.push_back(select_t(x,j)); + } + + break; + } + case LOAD_BALANCING_MAXIMUM_FOR_PRIORITY : + { + + for (uint32_t i=0; i<_param->_nb_front_end_select; i++) + { + uint32_t x=(reg_FRONT_END_PRIORITY+i)%_param->_nb_front_end; + + for (uint32_t j=0; j<_param->_nb_inst_decod[x]; j++) + select.push_back(select_t(x,j)); + } + + break; + } + default : + { + break; + } + } + +// #if (DEBUG >= DEBUG_TRACE) +// log_printf(TRACE,Rename_select,FUNCTION,"Select priority (front_end, inst_decod)"); +// for (std::list::iterator it=select.begin(); +// it != select.end(); +// it++) +// log_printf(TRACE,Rename_select,FUNCTION," %d %d",it->_front_end, it->_inst_decod); +// #endif + } + +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl.cpp (revision 78) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::vhdl" + void Rename_select::vhdl (void) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl_body.cpp (revision 78) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::vhdl_body" + void Rename_select::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace rename_select { + + +#undef FUNCTION +#define FUNCTION "Rename_select::vhdl_declaration" + void Rename_select::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Rename_select,FUNCTION,"Begin"); + log_printf(FUNC,Rename_select,FUNCTION,"End"); + }; + +}; // end namespace rename_select +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/Makefile.deps (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/Makefile.deps (revision 78) @@ -13,25 +13,41 @@ include $(DIR_MORPHEO)/Behavioural/Makefile.deps endif +ifndef Operation +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps +endif +ifndef Instruction +include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Custom_DIR = $(DIR_MORPHEO)/Behavioural/./Custom #-----[ Library ]------------------------------------------ -Custom_LIBRARY = -lCustom \ + +Custom_LIBRARY = -lCustom \ + $(Operation_LIBRARY) \ + $(Instruction_LIBRARY) \ $(Behavioural_LIBRARY) -Custom_DIR_LIBRARY = -L$(DIR_MORPHEO)/Behavioural/./Custom/lib \ +Custom_DIR_LIBRARY = -L$(Custom_DIR)/lib \ + $(Operation_DIR_LIBRARY) \ + $(Instruction_DIR_LIBRARY) \ $(Behavioural_DIR_LIBRARY) - -Custom_DEPENDENCIES = Behavioural_library - -Custom_CLEAN = Behavioural_library_clean #-----[ Rules ]-------------------------------------------- -#.NOTPARALLEL : Custom_library Custom_library_clean +Custom_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Instruction_library; \ + $(MAKE) Operation_library; \ + $(MAKE) --directory=$(Custom_DIR) --makefile=Makefile; -Custom_library : $(Custom_DEPENDENCIES) + +Custom_library_clean : @\ - $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/./Custom --makefile=Makefile; - -Custom_library_clean : $(Custom_CLEAN) - @\ - $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/./Custom --makefile=Makefile clean; + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Instruction_library_clean; \ + $(MAKE) Operation_library_clean; \ + $(MAKE) --directory=$(Custom_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom.h (revision 78) @@ -15,6 +15,8 @@ #include "Behavioural/include/Usage.h" #include "Behavioural/include/Constants.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" namespace morpheo { @@ -23,6 +25,7 @@ // TODO get_custom_vhdl - // TODO : complete the custom_decod_t type - typedef uint32_t custom_decod_t; + typedef uint32_t custom_vhdl_t; + + typedef morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::function_decod_t custom_decod_t; typedef morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::function_execute_t custom_execute_genMoore_t; @@ -34,11 +37,13 @@ typedef struct { - bool (*_get_valid_group) (uint32_t); - uint32_t (*_get_nb_register) (uint32_t); - access_mode_t (*_get_access_mode) (uint32_t, uint32_t); - custom_decod_t * (*_get_custom_decod) (uint32_t); - custom_execute_genMoore_t * (*_get_custom_execute_genMoore) (uint32_t); + bool (*_get_valid_group ) (uint32_t); + uint32_t (*_get_nb_register ) (uint32_t); + access_mode_t (*_get_access_mode ) (uint32_t, uint32_t); + custom_decod_t * (*_get_custom_decod ) (Toperation_t); + custom_execute_genMoore_t * (*_get_custom_execute_genMoore ) (Toperation_t); custom_execute_transition_t * (*_get_custom_execute_transition) (uint32_t); - custom_execute_transition_t * (*_get_custom_execute_reset) (uint32_t); + custom_execute_transition_t * (*_get_custom_execute_reset ) (uint32_t); + custom_vhdl_t * (*_get_vhdl_decod ) (void); + custom_vhdl_t * (*_get_vhdl_execute ) (void); } custom_information_t; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_default.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_default.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_default.h (revision 78) @@ -23,4 +23,7 @@ custom_execute_transition_t * default_get_custom_execute_transition (uint32_t group); custom_execute_transition_t * default_get_custom_execute_reset (uint32_t group); + custom_vhdl_t * default_get_vhdl_decod (void); + custom_vhdl_t * default_get_vhdl_execute (void); + custom_information_t default_get_custom_information (uint32_t context); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_example.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_example.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_example.h (revision 78) @@ -23,4 +23,7 @@ custom_execute_transition_t * example_get_custom_execute_transition (uint32_t group); custom_execute_transition_t * example_get_custom_execute_reset (uint32_t group); + custom_vhdl_t * example_get_vhdl_decod (void); + custom_vhdl_t * example_get_vhdl_execute (void); + custom_information_t example_get_custom_information (uint32_t context); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_default.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_default.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_default.cpp (revision 78) @@ -120,5 +120,5 @@ } - return NULL; // unimplemented function + return &(morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::instruction_illegal); // unimplemented function } @@ -208,4 +208,18 @@ #undef FUNCTION +#define FUNCTION "custom::default_get_vhdl_decod" + custom_vhdl_t * default_get_vhdl_decod (void) + { + return NULL; // unimplemented function + } + +#undef FUNCTION +#define FUNCTION "custom::default_get_vhdl_execute" + custom_vhdl_t * default_get_vhdl_execute (void) + { + return NULL; // unimplemented function + } + +#undef FUNCTION #define FUNCTION "custom::default_get_custom_information" custom_information_t default_get_custom_information (uint32_t context) @@ -220,4 +234,6 @@ info._get_custom_execute_transition = &morpheo::behavioural::custom::default_get_custom_execute_transition; info._get_custom_execute_reset = &morpheo::behavioural::custom::default_get_custom_execute_reset ; + info._get_vhdl_decod = &morpheo::behavioural::custom::default_get_vhdl_decod ; + info._get_vhdl_execute = &morpheo::behavioural::custom::default_get_vhdl_execute ; return info; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_example.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_example.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_example.cpp (revision 78) @@ -147,6 +147,5 @@ } - return NULL; // unimplemented function - + return &(morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::instruction_illegal); // unimplemented function } @@ -251,4 +250,18 @@ #undef FUNCTION +#define FUNCTION "custom::example_get_vhdl_decod" + custom_vhdl_t * example_get_vhdl_decod (void) + { + return NULL; // unimplemented function + } + +#undef FUNCTION +#define FUNCTION "custom::example_get_vhdl_execute" + custom_vhdl_t * example_get_vhdl_execute (void) + { + return NULL; // unimplemented function + } + +#undef FUNCTION #define FUNCTION "custom::example_get_custom_information" custom_information_t example_get_custom_information (uint32_t context) @@ -265,4 +278,6 @@ info._get_custom_execute_transition = &morpheo::behavioural::custom::example_get_custom_execute_transition; info._get_custom_execute_reset = &morpheo::behavioural::custom::example_get_custom_execute_reset ; + info._get_vhdl_decod = &morpheo::behavioural::custom::example_get_vhdl_decod ; + info._get_vhdl_execute = &morpheo::behavioural::custom::example_get_vhdl_execute ; return info; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Parameters.h (revision 78) @@ -32,5 +32,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Parameters_msg_error.cpp (revision 78) @@ -17,13 +17,13 @@ #undef FUNCTION #define FUNCTION "Queue::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Queue,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test("Queue"); log_printf(FUNC,Queue,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp (revision 78) @@ -7,5 +7,5 @@ */ -#define NB_ITERATION 1 +#define NB_ITERATION 16 #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/include/test.h" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h (revision 78) @@ -37,5 +37,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h (revision 78) @@ -52,8 +52,4 @@ private : counter_t * _stat_nb_read; private : counter_t * _stat_nb_write; - private : counter_t * _stat_average_read ; - private : counter_t * _stat_average_write; - private : counter_t * _stat_percent_use_read ; - private : counter_t * _stat_percent_use_write; #endif @@ -88,5 +84,5 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : SC_REGISTER (Tdata_t) ** reg_DATA ; + private : Tdata_t * reg_DATA; // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_msg_error.cpp (revision 78) @@ -17,43 +17,21 @@ namespace registerfile_monolithic { - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { - std::string msg = ""; + Parameters_test test("RegisterFile_Monolithic"); if ((8*sizeof(Tdata_t)) < _size_word) - { - msg += " - type \"Tdata_t\" is too little to the size defined by size_word\n"; - msg += " * size_word : " + toString(_size_word) + "\n"; - msg += " * Tdata_t (bits): " + toString(8*(sizeof(Tdata_t))) + "\n"; - } + test.error("Type \"Tdata_t\" is too little to the size defined by size_word"); if ((8*sizeof(Taddress_t)) < log2(_nb_word)) - { - msg += " - type \"Taddress_t\" is too little to the size defined by nb_word\n"; - msg += " * nb_word : " + toString(_nb_word) + "\n"; - msg += " > size (bits) : " + toString(log2(_nb_word)) + "\n"; - msg += " * Taddress_t (bits) : " + toString(8*(sizeof(Taddress_t))) + "\n"; - } + test.error("type \"Taddress_t\" is too little to the size defined by nb_word"); if ((_nb_port_read + _nb_port_read_write) < 1) - { - msg += " - you need a read port\n"; - msg += " * nb_port_read : " + toString(_nb_port_read) + "\n"; - msg += " * nb_port_read_write : " + toString(_nb_port_read_write) + "\n"; - } + test.error("you need a read port"); if ((_nb_port_write + _nb_port_read_write) < 1) - { - msg += " - you need a write port\n"; - msg += " * nb_port_write : " + toString(_nb_port_write) + "\n"; - msg += " * nb_port_read_write : " + toString(_nb_port_read_write) + "\n"; - } -// if (_nb_word < 2) -// { -// msg += " - nb_word must be >= 2\n"; -// msg += " * nb_word : " + toString(_nb_word) + "\n"; -// } + test.error("you need a write port"); - return msg; + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp (revision 78) @@ -120,12 +120,6 @@ // ----- Register - reg_DATA = new SC_REGISTER (Tdata_t) * [_param->_nb_word]; + reg_DATA = new Tdata_t [_param->_nb_word]; - for (uint32_t i=0; i<_param->_nb_word; i++) - { - std::string rename = "reg_DATA[" + toString(i) + "]"; - reg_DATA [i] = new SC_REGISTER (Tdata_t) (rename.c_str()); - } - #ifdef POSITION _component->generate_file(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp (revision 78) @@ -29,11 +29,8 @@ else address = 0; - Tdata_t data = REGISTER_READ(reg_DATA[address]); + Tdata_t data = reg_DATA[address]; log_printf(TRACE,RegisterFile,"genMealy_read","[%d] -> %.8x",static_cast(address),static_cast(data)); -#ifdef STATISTICS - (*_stat_nb_read) ++; -#endif // Write in registerFile PORT_WRITE(out_READ_DATA[i],data); @@ -61,5 +58,5 @@ address = 0; - data = REGISTER_READ(reg_DATA[address]); + data = reg_DATA[address]; log_printf(TRACE,RegisterFile,"genMealy_read","[%d] -> %.8x",static_cast(address),static_cast(data)); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_statistics_declaration.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_statistics_declaration.cpp (revision 78) @@ -23,16 +23,10 @@ _stat_nb_read = _stat->create_variable("nb_read" ); _stat_nb_write = _stat->create_variable("nb_write"); - - _stat_average_read = _stat->create_counter("average_read" , "", "Average read by cycle"); - _stat_average_write = _stat->create_counter("average_write", "", "Average write by cycle"); - _stat_percent_use_read = _stat->create_counter("percent_use_read" , "%", "Read port usage"); - _stat_percent_use_write = _stat->create_counter("percent_use_write", "%", "Write port usage"); + _stat->create_expr_average_by_cycle("average_read" , "nb_read" , "", "Average read by cycle" ); + _stat->create_expr_average_by_cycle("average_write", "nb_write", "", "Average write by cycle"); - _stat->create_expr("average_read" , "/ nb_read cycle", false); - _stat->create_expr("average_write", "/ nb_write cycle", false); - - _stat->create_expr("percent_use_read" , "/ * average_read 100 " + toString(_param->_nb_port_read +_param->_nb_port_read_write), false); - _stat->create_expr("percent_use_write", "/ * average_write 100 " + toString(_param->_nb_port_write+_param->_nb_port_read_write), false); + _stat->create_expr_percent ("percent_use_read" , "average_read" , toString(_param->_nb_port_read +_param->_nb_port_read_write), "Percent read by cycle" ); + _stat->create_expr_percent ("percent_use_write", "average_write", toString(_param->_nb_port_write+_param->_nb_port_read_write), "Percent write by cycle"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp (revision 78) @@ -38,5 +38,5 @@ // Write in registerFile - REGISTER_WRITE(reg_DATA[address],data); + reg_DATA[address] = data; } } @@ -62,5 +62,5 @@ // Write in registerFile - REGISTER_WRITE(reg_DATA[address],data); + reg_DATA[address] = data; } #ifdef STATISTICS Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h (revision 78) @@ -64,5 +64,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h (revision 78) @@ -73,5 +73,5 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : SC_REGISTER (Tdata_t) *** reg_DATA ; + private : Tdata_t ** reg_DATA; // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters_msg_error.cpp (revision 78) @@ -15,33 +15,22 @@ - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,RegisterFile_Multi_Banked,"msg_error","Begin"); - std::string msg = ""; + Parameters_test test("RegisterFile_Multi_Banked"); if (_nb_port_read < _nb_port_read_by_bank) - { - msg += " - Each bank read's port must be higher at number of read port\n"; - msg += " * nb_port_read : " + toString(_nb_port_read ) + "\n"; - msg += " * nb_port_read_by_bank : " + toString(_nb_port_read_by_bank) + "\n"; - } + test.error("Each bank read's port must be higher at number of read port"); if (_nb_port_write < _nb_port_write_by_bank) - { - msg += " - Each bank write's port must be higher at number of write port\n"; - msg += " * nb_port_write : " + toString(_nb_port_write ) + "\n"; - msg += " * nb_port_write_by_bank : " + toString(_nb_port_write_by_bank) + "\n"; - } + test.error("Each bank write's port must be higher at number of write port"); if (_nb_bank < 1) - { - msg += " - nb_bank must be higher at 1\n"; - msg += " * nb_bank : " + toString(_nb_bank ) + "\n"; - } - - return msg; + test.error("nb_bank must be higher at 1"); log_printf(FUNC,RegisterFile_Multi_Banked,"msg_error","End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp (revision 78) @@ -96,15 +96,9 @@ // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - reg_DATA = new SC_REGISTER (Tdata_t) ** [_param->_nb_bank]; + reg_DATA = new Tdata_t * [_param->_nb_bank]; for (uint32_t i=0; i<_param->_nb_bank; i++) { - reg_DATA [i] = new SC_REGISTER (Tdata_t) * [_param->_nb_word]; - - for (uint32_t j=0; j<_param->_nb_word; j++) - { - std::string rename = "reg_DATA_" + toString(i) + "_" + toString(j); - reg_DATA [i][j] = new SC_REGISTER (Tdata_t) (rename.c_str()); - } + reg_DATA [i] = new Tdata_t [_param->_nb_word]; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp (revision 78) @@ -62,5 +62,5 @@ log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * bank_port : %d",j); - Tdata_t data = REGISTER_READ(reg_DATA[bank][num_reg]); + Tdata_t data = reg_DATA[bank][num_reg]; log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * data : %d",data); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp (revision 78) @@ -64,5 +64,5 @@ log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * bank_port : %d",j); - Tdata_t data = REGISTER_READ(reg_DATA[bank][num_reg]); + Tdata_t data = reg_DATA[bank][num_reg]; log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * data : %d",data); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp (revision 78) @@ -31,5 +31,5 @@ // Write in registerFile - REGISTER_WRITE(reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]],data); + reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]] = data; } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h (revision 78) @@ -43,5 +43,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/RegisterFile.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/RegisterFile.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/RegisterFile.h (revision 78) @@ -5,5 +5,5 @@ * $Id$ * - * [ Description ] + * [ Description ] * */ @@ -41,5 +41,5 @@ #endif { - // -----[ fields ]---------------------------------------------------- + // -----[ fields ]---------------------------------------------------- // Parameters protected : const std::string _name; @@ -54,5 +54,5 @@ #ifdef SYSTEMC - // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // Interface public : SC_CLOCK * in_CLOCK ; @@ -73,13 +73,13 @@ #endif - // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ protected : morpheo::behavioural::generic::registerfile::registerfile_monolithic ::RegisterFile_Monolithic ::RegisterFile_Monolithic * component_RegisterFile_Monolithic ; protected : morpheo::behavioural::generic::registerfile::registerfile_multi_banked::RegisterFile_Multi_Banked::RegisterFile_Multi_Banked * component_RegisterFile_Multi_Banked; - // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - // -----[ methods ]--------------------------------------------------- + // -----[ methods ]--------------------------------------------------- #ifdef SYSTEMC Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters_msg_error.cpp (revision 78) @@ -16,14 +16,10 @@ - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { - log_printf(FUNC,RegisterFile,"msg_error","Begin"); - if (_instance == instance_RegisterFile_Monolithic) return _param_registerfile_monolithic ->msg_error(); else return _param_registerfile_multi_banked->msg_error(); - - log_printf(FUNC,RegisterFile,"msg_error","End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h (revision 78) @@ -34,5 +34,5 @@ public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); public : std::string print (uint32_t depth); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters_msg_error.cpp (revision 78) @@ -17,20 +17,16 @@ - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Select_Priority_Fixed,"msg_error","Begin"); - std::string msg = ""; + Parameters_test test ("Select_Priority_Fixed"); if ((_encoding_one_hot or _encoding_compact) == false) - { - msg += " - you must select a less one encoding\n"; - msg += " * encoding_one_hot : " + toString(_encoding_one_hot) + "\n"; - msg += " * encoding_compact : " + toString(_encoding_compact) + "\n"; - } + test.error("you must select a less one encoding"); log_printf(FUNC,Select_Priority_Fixed,"msg_error","End"); - return msg; + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libSort.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/Makefile.deps (revision 78) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Sort = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Sort_DIR = $(DIR_MORPHEO)/Behavioural/Generic/Sort + +#-----[ Library ]------------------------------------------ + +Sort_LIBRARY = -lSort \ + $(Behavioural_LIBRARY) + +Sort_DIR_LIBRARY = -L$(Sort_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Sort_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Sort_DIR) --makefile=Makefile; + +Sort_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Sort_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Sort_LIBRARY) + +DIR_LIBRARY = $(Sort_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Sort_library + +library_clean : Sort_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,7 @@ +Sort +8 8 *2 # nb_input +1 8 *2 # nb_output +1 1 +1 # ascending +16 16 *2 # size_data +1 1 +1 # have_port_index_out +1 1 +1 # have_port_data_out Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/include/test.h (revision 78) @@ -0,0 +1,28 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Generic/Sort/include/Sort.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::generic; + +using namespace morpheo::behavioural::generic::sort; + +void test (string name, + morpheo::behavioural::generic::sort::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,74 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/SelfTest/include/test.h" + +#define NB_PARAMS 6 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_input (uint32_t)\n")); + err (_(" * nb_output (uint32_t)\n")); + err (_(" * ascending (bool )\n")); + err (_(" * size_data (uint32_t)\n")); + err (_(" * have_port_index_out (bool )\n")); + err (_(" * have_port_data_out (bool )\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _nb_input = fromString(argv[x++]); + uint32_t _nb_output = fromString(argv[x++]); + bool _ascending = fromString(argv[x++]); + uint32_t _size_data = fromString(argv[x++]); + bool _have_port_index_out = fromString(argv[x++]); + bool _have_port_data_out = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + + try + { + morpheo::behavioural::generic::sort::Parameters * param = new morpheo::behavioural::generic::sort::Parameters + (_nb_input , + _nb_output , + _ascending , + _size_data , + _have_port_index_out, + _have_port_data_out ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,222 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Generic/Sort/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Common/include/BitManipulation.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 1024 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + + +class entry_t +{ +public : Tcontrol_t _val ; +public : Tdata_t _data; +}; + + +void test (string name, + morpheo::behavioural::generic::sort::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Sort * _Sort = new Sort (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_INPUT_VAL ," in_INPUT_VAL ",Tcontrol_t,_param->_nb_input ); + ALLOC1_SC_SIGNAL( in_INPUT_DATA ," in_INPUT_DATA ",Tdata_t ,_param->_nb_input ); + ALLOC1_SC_SIGNAL(out_OUTPUT_VAL ,"out_OUTPUT_VAL ",Tcontrol_t,_param->_nb_output); + ALLOC1_SC_SIGNAL(out_OUTPUT_INDEX,"out_OUTPUT_INDEX",Taddress_t,_param->_nb_output); + ALLOC1_SC_SIGNAL(out_OUTPUT_DATA ,"out_OUTPUT_DATA ",Tdata_t ,_param->_nb_output); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Sort.\n"),name.c_str()); + + (*(_Sort->in_CLOCK)) (*(in_CLOCK)); + (*(_Sort->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Sort, in_INPUT_VAL ,_param->_nb_input ); + INSTANCE1_SC_SIGNAL(_Sort, in_INPUT_DATA ,_param->_nb_input ); + INSTANCE1_SC_SIGNAL(_Sort,out_OUTPUT_VAL ,_param->_nb_output); + if (_param->_have_port_index_out) + INSTANCE1_SC_SIGNAL(_Sort,out_OUTPUT_INDEX,_param->_nb_output); + if (_param->_have_port_data_out) + INSTANCE1_SC_SIGNAL(_Sort,out_OUTPUT_DATA ,_param->_nb_output); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + entry_t tab [_param->_nb_input]; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + SC_START(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration_nb_input; i++) + { + tab [i]._val = rand ()%2; + tab [i]._data = range(rand(),_param->_size_data); + + in_INPUT_VAL [i]->write(tab [i]._val ); + in_INPUT_DATA [i]->write(tab [i]._data); + + LABEL("INPUT [%d] %d - %d",i, tab [i]._val, tab [i]._data); + } + + SC_START(1); + + if (_param->_ascending) + { + Tdata_t data_min = 0; + for (uint32_t i=0; i<_param->_nb_output; i++) + { + bool find = false; + Tdata_t data = range(static_cast(-1),_param->_size_data); + uint32_t ptr = 0; + // find max +// LABEL(" * data_min : %d",data_min); + + for (uint32_t j=0; j<_param->_nb_input; j++) + { +// LABEL("tab[%d]._val : %d",j,tab [j]._val ); +// LABEL("tab[%d]._data : %d",j,tab [j]._data); +// LABEL(" * find : %d",find); +// LABEL(" * data : %d",data); +// LABEL(" * ptr : %d",ptr ); + + if ((tab [j]._val == 1) and + (tab [j]._data >= data_min) and + (tab [j]._data <= data)) + { + if (not (find and (data == tab [j]._data))) + ptr = j; + + data = tab [j]._data; + find = true; + } + } + +// LABEL("-------------"); +// LABEL(" * find : %d",find); +// LABEL(" * data : %d",data); +// LABEL(" * ptr : %d",ptr ); + + data_min = data; + tab [ptr]._val = false; + + LABEL("OUTPUT [%d] %d - %d",i, out_OUTPUT_VAL [i]->read(), out_OUTPUT_DATA [i]->read(), out_OUTPUT_INDEX [i]->read()); + + TEST(Tcontrol_t,out_OUTPUT_VAL [i]->read(),find); + + if (find) + { + if (_param->_have_port_index_out) + TEST(Taddress_t,out_OUTPUT_INDEX [i]->read(),ptr ); + if (_param->_have_port_data_out) + TEST(Tdata_t ,out_OUTPUT_DATA [i]->read(),data); + } + } + } + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_INPUT_VAL ; + delete [] in_INPUT_DATA ; + delete [] out_OUTPUT_VAL ; + delete [] out_OUTPUT_INDEX; + delete [] out_OUTPUT_DATA ; +#endif + + delete _Sort; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/Sort.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/Sort.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/Sort.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Sort} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Parameters.h (revision 78) @@ -0,0 +1,57 @@ +#ifndef morpheo_behavioural_generic_sort_Parameters_h +#define morpheo_behavioural_generic_sort_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/Generic/Sort/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_input ; + public : uint32_t _nb_output ; + public : bool _ascending ; + public : uint32_t _size_data ; + public : bool _have_port_index_out; + public : bool _have_port_data_out ; + + public : uint32_t _size_address ; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_input , + uint32_t nb_output , + bool ascending , + uint32_t size_data , + bool have_port_index_out, + bool have_port_data_out ); + +//public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::generic::sort::Parameters & x); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Sort.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Sort.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Sort.h (revision 78) @@ -0,0 +1,134 @@ +#ifndef morpheo_behavioural_generic_sort_Sort_h +#define morpheo_behavioural_generic_sort_Sort_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Generic/Sort/include/Types.h" +#include "Behavioural/Generic/Sort/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace generic { +namespace sort { + + + class Sort +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "input" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_INPUT_VAL ; + public : SC_IN (Tdata_t ) ** in_INPUT_DATA ; + + // ~~~~~[ Interface : "output" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT (Tcontrol_t) ** out_OUTPUT_VAL ; + public : SC_OUT (Taddress_t) ** out_OUTPUT_INDEX; + public : SC_OUT (Tdata_t ) ** out_OUTPUT_DATA ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Sort); +#endif + public : Sort + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Sort (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC +# if defined(STATISTICS) or defined(VHDL_TESTBENCH) + public : void transition (void); +# endif + public : void genMealy (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/include/Types.h (revision 78) @@ -0,0 +1,69 @@ +#ifndef morpheo_behavioural_generic_sort_Types_h +#define morpheo_behavioural_generic_sort_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + typedef uint32_t Taddress_t; + typedef uint32_t Tdata_t; + + class sort_t + { + public : Tcontrol_t val ; + public : Tdata_t data ; + public : Taddress_t index; + + bool operator<(const sort_t & x) const + { + int test = (((val)?1:0)<<1) + ((x.val)?1:0); + bool res; + switch (test) + { + case 1 : {res = false; break;} /* 01 - a not valid, b valid */ + case 2 : {res = true ; break;} /* 10 - a valid, b not valid */ + default : {res = data < x.data; break;} /* 00 - a not valid, b not valid */ + /* 11 - a valid, b valid */ + } +// cout << *this << "\t" << x << "\ttest : " << test << " - res : " << res << endl; + + return res; + } + +// bool operator>(const sort_t & x) const +// { +// int test = (((val)?1:0)<<1) + ((x.val)?1:0); + +// switch (test) +// { +// case 1 : {return true ; } /* 01 - a not valid, b valid */ +// case 2 : {return false; } /* 10 - a valid, b not valid */ +// default : {return data > x.data;} /* 00 - a not valid, b not valid */ +// /* 11 - a valid, b valid */ +// } +// } + + friend std::ostream& operator<< (std::ostream& output_stream, const sort_t & x) + { + output_stream << "[" << x.index << "] " << x.val << " - " << x.data; + + return output_stream; + } + }; + +}; // end namespace sort +}; // end namespace generic +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters.cpp (revision 78) @@ -0,0 +1,61 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::Parameters" + Parameters::Parameters (uint32_t nb_input , + uint32_t nb_output , + bool ascending , + uint32_t size_data , + bool have_port_index_out, + bool have_port_data_out ) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + _nb_input = nb_input ; + _nb_output = nb_output ; + _ascending = ascending ; + _size_data = size_data ; + _have_port_index_out = have_port_index_out; + _have_port_data_out = have_port_data_out ; + + _size_address = log2(nb_input); + + test(); + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Sort::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Sort,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Sort,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Sort::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,55 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Generic/Sort/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + Parameters_test test ("Sort"); + + // Test if param : n == 2^k + if (is_positive(log2(_nb_input)) == false) + test.error("nb_input is not a power of 2."); + + // Test functionnal + if (_nb_input < _nb_output) + test.error("nb_input must be higher than nb_output."); + + if (is_between_exclusive (_size_data,0 ,(8*sizeof(Tdata_t))) == false) + test.error("type \"Tdata_t\" is too little to the size defined by size_data."); + + if (is_between_exclusive (static_cast(log2(_nb_input)),0 ,(8*sizeof(Taddress_t))) == false) + test.error("type \"Taddress_t\" is too little to the size defined by nb_input."); + + if ((not _have_port_index_out) and (not _have_port_data_out)) + test.error("Need ouput : index, data (sorted) or both."); + + if (not _ascending) + test.error("descending order not supported. (Coming Soon)"); + + log_printf(FUNC,Sort,FUNCTION,"End"); + + return test; + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,57 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + XML xml ("sort"); + + xml.balise_open("sort"); + xml.singleton_begin("nb_input "); xml.attribut("value",toString(_nb_input )); xml.singleton_end(); + xml.singleton_begin("nb_output "); xml.attribut("value",toString(_nb_output )); xml.singleton_end(); + xml.singleton_begin("ascending "); xml.attribut("value",toString(_ascending )); xml.singleton_end(); + xml.singleton_begin("size_data "); xml.attribut("value",toString(_size_data )); xml.singleton_end(); + xml.singleton_begin("have_port_index_out"); xml.attribut("value",toString(_have_port_index_out)); xml.singleton_end(); + xml.singleton_begin("have_port_data_out "); xml.attribut("value",toString(_have_port_data_out )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Sort,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Sort::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::generic::sort::Parameters & x) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Sort,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort.cpp (revision 78) @@ -0,0 +1,135 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::Sort" + Sort::Sort + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::generic::sort::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + log_printf(INFO,Sort,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + log_printf(INFO,Sort,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (_usage & USE_VHDL) + { + // generate the vhdl + log_printf(INFO,Sort,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (_usage & USE_SYSTEMC) + { + log_printf(INFO,Sort,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Sort,FUNCTION,"Method - genMealy"); + + SC_METHOD (genMealy); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't use internal register + for (uint32_t i=0; i<_param->_nb_input; i++) + sensitive << (*(in_INPUT_VAL [i])) + << (*(in_INPUT_DATA [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_output; i++) + for (uint32_t j=0; j<_param->_nb_input; j++) + { + (*(out_OUTPUT_VAL [i])) (*(in_INPUT_VAL [j])); + (*(out_OUTPUT_VAL [i])) (*(in_INPUT_DATA [j])); + + if (_param->_have_port_index_out) + { + (*(out_OUTPUT_INDEX [i])) (*(in_INPUT_VAL [j])); + (*(out_OUTPUT_INDEX [i])) (*(in_INPUT_DATA [j])); + } + if (_param->_have_port_data_out) + { + (*(out_OUTPUT_DATA [i])) (*(in_INPUT_VAL [j])); + (*(out_OUTPUT_DATA [i])) (*(in_INPUT_DATA [j])); + } + } +# endif + +#endif + } + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Sort::~Sort" + Sort::~Sort (void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Sort,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_allocation.cpp (revision 78) @@ -0,0 +1,87 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + + +#undef FUNCTION +#define FUNCTION "Sort::allocation" + void Sort::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Sort" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "input" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("input", IN, WEST, "List of data unsort",_param->_nb_input); + + ALLOC1_SIGNAL_IN(in_INPUT_VAL ,"val" , Tcontrol_t, 1); + ALLOC1_SIGNAL_IN(in_INPUT_DATA,"data", Tdata_t , _param->_size_data); + } + + // ~~~~~[ Interface : "output" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("output",OUT, EAST, "List of data sort",_param->_nb_output); + + ALLOC1_SIGNAL_OUT(out_OUTPUT_VAL ,"val" ,Tcontrol_t,1); + if (_param->_have_port_index_out) + ALLOC1_SIGNAL_OUT(out_OUTPUT_INDEX,"index",Taddress_t,_param->_size_address); + if (_param->_have_port_data_out) + ALLOC1_SIGNAL_OUT(out_OUTPUT_DATA ,"data" ,Tdata_t ,_param->_size_data ); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_deallocation.cpp (revision 78) @@ -0,0 +1,46 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::deallocation" + void Sort::deallocation (void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_INPUT_VAL ; + delete [] in_INPUT_DATA ; + delete [] out_OUTPUT_VAL ; + if (_param->_have_port_index_out) + delete [] out_OUTPUT_INDEX; + if (_param->_have_port_data_out) + delete [] out_OUTPUT_DATA ; + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_end_cycle.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_end_cycle.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_end_cycle.cpp (revision 78) @@ -0,0 +1,41 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::end_cycle" +void Sort::end_cycle () + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + +#ifdef STATISTICS + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + _interfaces->testbench(); +#endif + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_genMealy.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_genMealy.cpp (revision 78) @@ -0,0 +1,55 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::genMealy" + void Sort::genMealy (void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + sort_t array [_param->_nb_input]; + + // Push input in a array + for (uint32_t i=0; i<_param->_nb_input; i++) + { + array[i].index = i; + array[i].val = PORT_READ ( in_INPUT_VAL [i]); + array[i].data = PORT_READ ( in_INPUT_DATA [i]); + } + + // Sort array + //if (_param->_ascending == true) + std::stable_sort(array, array+_param->_nb_input); + + // Write output + for (uint32_t i=0; i<_param->_nb_output; i++) + { + PORT_WRITE (out_OUTPUT_VAL [i],array[i].val ); + if (_param->_have_port_index_out) + PORT_WRITE (out_OUTPUT_INDEX [i],array[i].index); + if (_param->_have_port_data_out) + PORT_WRITE (out_OUTPUT_DATA [i],array[i].data ); + } + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_statistics_allocation.cpp (revision 78) @@ -0,0 +1,35 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::statistics_allocation" + void Sort::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Sort", + param_statistics); + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,35 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::statistics_deallocation" + void Sort::statistics_deallocation (void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + log_printf(INFO,Sort,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_transition.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_transition.cpp (revision 78) @@ -0,0 +1,35 @@ +#ifdef SYSTEMC +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::transition" + void Sort::transition (void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + end_cycle (); + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl.cpp (revision 78) @@ -0,0 +1,44 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::vhdl" + void Sort::vhdl (void) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl_body.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl_body.cpp (revision 78) @@ -0,0 +1,31 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::vhdl_body" + void Sort::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl_declaration.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_vhdl_declaration.cpp (revision 78) @@ -0,0 +1,30 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Sort/include/Sort.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace sort { + + +#undef FUNCTION +#define FUNCTION "Sort::vhdl_declaration" + void Sort::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Sort,FUNCTION,"Begin"); + log_printf(FUNC,Sort,FUNCTION,"End"); + }; + +}; // end namespace sort +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile (revision 78) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libVictim.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile.defs =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile.defs (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile.defs (revision 78) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile.deps (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Makefile.deps (revision 78) @@ -0,0 +1,84 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Victim = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif +#ifndef Victim_Random +#include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Victim_Random/Makefile.deps +#endif +#ifndef Victim_Round_Robin +#include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Victim_Round_Robin/Makefile.deps +#endif +#ifndef Victim_NLU +#include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Victim_NLU/Makefile.deps +#endif +ifndef Victim_Pseudo_LRU +include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Victim_Pseudo_LRU/Makefile.deps +endif +#ifndef Victim_LRU +#include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Victim_LRU/Makefile.deps +#endif +#ifndef Victim_FIFO +#include $(DIR_MORPHEO)/Behavioural/Generic/Victim/Victim_FIFO/Makefile.deps +#endif + +#-----[ Directory ]---------------------------------------- + +Victim_DIR = $(DIR_MORPHEO)/Behavioural/Generic/Victim + +#-----[ Library ]------------------------------------------ + +Victim_LIBRARY = -lVictim \ + $(Victim_Pseudo_LRU_LIBRARY) \ + $(Behavioural_LIBRARY) + +# $(Victim_Random_LIBRARY) \ +# $(Victim_Round_Robin_LIBRARY) \ +# $(Victim_NLU_LIBRARY) \ +# $(Victim_LRU_LIBRARY) \ +# $(Victim_FIFO_LIBRARY) \ + +Victim_DIR_LIBRARY = -L$(Victim_DIR)/lib \ + $(Victim_Pseudo_LRU_DIR_LIBRARY) \ + $(Behavioural_DIR_LIBRARY) + +# $(Victim_Random_DIR_LIBRARY) \ +# $(Victim_Round_Robin_DIR_LIBRARY) \ +# $(Victim_NLU_DIR_LIBRARY) \ +# $(Victim_LRU_DIR_LIBRARY) \ +# $(Victim_FIFO_DIR_LIBRARY) \ + +#-----[ Rules ]-------------------------------------------- + +Victim_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) Victim_Pseudo_LRU_library; \ + $(MAKE) --directory=$(Victim_DIR) --makefile=Makefile; + +# $(MAKE) Victim_Random_library; \ +# $(MAKE) Victim_Round_Robin_library; \ +# $(MAKE) Victim_NLU_library; \ +# $(MAKE) Victim_LRU_library; \ +# $(MAKE) Victim_FIFO_library; \ + +Victim_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) Victim_Pseudo_LRU_library_clean; \ + $(MAKE) --directory=$(Victim_DIR) --makefile=Makefile clean; + +# $(MAKE) Victim_Random_library_clean; \ +# $(MAKE) Victim_Round_Robin_library_clean; \ +# $(MAKE) Victim_NLU_library_clean; \ +# $(MAKE) Victim_LRU_library_clean; \ +# $(MAKE) Victim_FIFO_library_clean; \ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/Makefile (revision 78) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Victim_LIBRARY) + +DIR_LIBRARY = $(Victim_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Victim_library + +library_clean : Victim_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/configuration.cfg (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/configuration.cfg (revision 78) @@ -0,0 +1,6 @@ +Victim +3 3 +1 # victim_scheme +2 8 *4 # nb_entity +1 8 *4 # nb_entry +1 4 *4 # nb_access +0 1 +1 # table_global Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/include/test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/include/test.h (revision 78) @@ -0,0 +1,28 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Generic/Victim/include/Victim.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::generic; + +using namespace morpheo::behavioural::generic::victim; + +void test (string name, + morpheo::behavioural::generic::victim::Parameters * param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/src/main.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/src/main.cpp (revision 78) @@ -0,0 +1,69 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/SelfTest/include/test.h" + +#define NB_PARAMS 5 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * victim_scheme (Tvictim_t)\n")); + err (_(" * nb_entity (uint32_t )\n")); + err (_(" * nb_entry (uint32_t )\n")); + err (_(" * nb_access (uint32_t )\n")); + err (_(" * table_global (bool )\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc != static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + Tvictim_t _victim_scheme = fromString(argv[x++]); + uint32_t _nb_entity = fromString(argv[x++]); + uint32_t _nb_entry = fromString(argv[x++]); + uint32_t _nb_access = fromString(argv[x++]); + bool _table_global = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::generic::victim::Parameters * param = new morpheo::behavioural::generic::victim::Parameters + (_victim_scheme, + _nb_entity , + _nb_entry , + _nb_access , + _table_global ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + return (_return); +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/src/test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/SelfTest/src/test.cpp (revision 78) @@ -0,0 +1,149 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#include "Behavioural/Generic/Victim/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +#define NB_ITERATION 10 +#define CYCLE_MAX (128*NB_ITERATION) + +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + +void test (string name, + morpheo::behavioural::generic::victim::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Victim * _Victim = new Victim (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param); + +#ifdef SYSTEMC + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_ACCESS_VAL ," in_ACCESS_VAL ",Tcontrol_t,_param->_nb_access); + ALLOC1_SC_SIGNAL(out_ACCESS_ACK ,"out_ACCESS_ACK ",Tcontrol_t,_param->_nb_access); + ALLOC1_SC_SIGNAL( in_ACCESS_ADDRESS," in_ACCESS_ADDRESS",Taddress_t,_param->_nb_access); + ALLOC1_SC_SIGNAL( in_ACCESS_HIT ," in_ACCESS_HIT ",Tcontrol_t,_param->_nb_access); + ALLOC1_SC_SIGNAL( in_ACCESS_ENTITY ," in_ACCESS_ENTITY ",Tentity_t ,_param->_nb_access); + ALLOC1_SC_SIGNAL(out_ACCESS_VICTIM ,"out_ACCESS_VICTIM ",Tentity_t ,_param->_nb_access); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Victim.\n"),name.c_str()); + + (*(_Victim->in_CLOCK)) (*(in_CLOCK)); + (*(_Victim->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Victim, in_ACCESS_VAL ,_param->_nb_access); + INSTANCE1_SC_SIGNAL(_Victim,out_ACCESS_ACK ,_param->_nb_access); + if (_param->_have_port_address) + INSTANCE1_SC_SIGNAL(_Victim, in_ACCESS_ADDRESS,_param->_nb_access); + INSTANCE1_SC_SIGNAL(_Victim, in_ACCESS_HIT ,_param->_nb_access); + INSTANCE1_SC_SIGNAL(_Victim, in_ACCESS_ENTITY ,_param->_nb_access); + INSTANCE1_SC_SIGNAL(_Victim,out_ACCESS_VICTIM ,_param->_nb_access); + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + for (uint32_t iteration=0; iteration : ............ Stop Simulation\n"),name.c_str()); + + delete _Victim; + + delete in_CLOCK; + delete in_NRESET; + + delete [] in_ACCESS_VAL ; + delete [] out_ACCESS_ACK ; + delete [] in_ACCESS_ADDRESS; + delete [] in_ACCESS_HIT ; + delete [] in_ACCESS_ENTITY ; + delete [] out_ACCESS_VICTIM ; +#endif + +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/TODO =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/TODO (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/TODO (revision 78) @@ -1,7 +1,11 @@ - Ajouter quelques algorithme de selection + * Random + -> LFSR (?) qui ne tourne pas à chaque cycle mais à chaque in_access_val = '1' * Round Robin -> simple compteur de log2(N) bits + * Not Last Used + -> idem random mais : sauvegarde le dernier élément accéder. Si rand = last_elt, alors on renvoye not rand * True LRU -> fifo matériel. Un élément accéder sera placer en fin de fifo. - * Random - -> LFSR (?) qui ne tourne pas à chaque cycle mais à chaque in_access_val = '1' + * fifo + idem true LRU mais aucun evenement lors de l'accès Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg (revision 78) @@ -1,5 +1,5 @@ Victim_Pseudo_LRU -4 16 *2 # nb_entity -1 4 *2 # nb_access -1 4 *2 # nb_update -1 16 *2 # size_table +4 16 *4 # nb_entity +1 4 *4 # nb_access # 1 4 *4 # nb_update +1 16 *4 # size_table +0 1 +1 # table_global Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/main.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/main.cpp (revision 78) @@ -14,8 +14,9 @@ cerr << " " << exec << " name_instance list_params" << endl << "list_params is :" << endl - << " - nb_entity (unsigned int)" << endl - << " - nb_access (unsigned int)" << endl - << " - nb_update (unsigned int)" << endl - << " - size_table (unsigned int)" << endl; + << " - nb_entity (unsigned int)" << endl + << " - nb_access (unsigned int)" << endl +// << " - nb_update (unsigned int)" << endl + << " - size_table (unsigned int)" << endl + << " - table_global (bool )" << endl; exit (1); } @@ -30,14 +31,16 @@ usage (argv[0]); - const string name = argv[1]; - const uint32_t nb_entity = atoi(argv[2]); - const uint32_t nb_access = atoi(argv[3]); - const uint32_t nb_update = atoi(argv[4]); - const uint32_t size_table = atoi(argv[5]); - - morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters param (nb_entity , - nb_access , - nb_update , - size_table); + const string name = argv[1]; + const uint32_t nb_entity = atoi(argv[2]); + const uint32_t nb_access = atoi(argv[3]); +// const uint32_t nb_update = atoi(argv[4]); + const uint32_t size_table = atoi(argv[4]); + const bool table_global = atoi(argv[5]); + morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters param + (nb_entity , + nb_access , +// nb_update , + size_table, + table_global); test (name,param); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/test.cpp (revision 78) @@ -15,10 +15,4 @@ cout << "<" << name << "> : Simulation SystemC" << endl; - if (param._nb_update < 1) - { - cerr << "<" << name << "> : To test, need a less one update's port" << endl; - exit (EXIT_FAILURE); - } - try { @@ -45,5 +39,5 @@ param_stat, #endif - param); + ¶m); #ifdef SYSTEMC @@ -57,10 +51,7 @@ sc_signal ACCESS_ACK [param._nb_access]; sc_signal ACCESS_ADDRESS [param._nb_access]; + sc_signal ACCESS_HIT [param._nb_access]; sc_signal ACCESS_ENTITY [param._nb_access]; - - sc_signal UPDATE_VAL [param._nb_update]; - sc_signal UPDATE_ACK [param._nb_update]; - sc_signal UPDATE_ADDRESS [param._nb_update]; - sc_signal UPDATE_ENTITY [param._nb_update]; + sc_signal ACCESS_VICTIM [param._nb_access]; /******************************************************** @@ -77,17 +68,11 @@ (*(_Victim_Pseudo_LRU-> in_ACCESS_VAL [i])) (ACCESS_VAL [i]); (*(_Victim_Pseudo_LRU->out_ACCESS_ACK [i])) (ACCESS_ACK [i]); - if (param._size_table>1) + if (param._size_address>1) (*(_Victim_Pseudo_LRU-> in_ACCESS_ADDRESS [i])) (ACCESS_ADDRESS [i]); - (*(_Victim_Pseudo_LRU->out_ACCESS_ENTITY [i])) (ACCESS_ENTITY [i]); + (*(_Victim_Pseudo_LRU-> in_ACCESS_HIT [i])) (ACCESS_HIT [i]); + (*(_Victim_Pseudo_LRU-> in_ACCESS_ENTITY [i])) (ACCESS_ENTITY [i]); + (*(_Victim_Pseudo_LRU->out_ACCESS_VICTIM [i])) (ACCESS_VICTIM [i]); } - for (uint32_t i=0; i in_UPDATE_VAL [i])) (UPDATE_VAL [i]); - (*(_Victim_Pseudo_LRU->out_UPDATE_ACK [i])) (UPDATE_ACK [i]); - if (param._size_table>1) - (*(_Victim_Pseudo_LRU-> in_UPDATE_ADDRESS [i])) (UPDATE_ADDRESS [i]); - (*(_Victim_Pseudo_LRU-> in_UPDATE_ENTITY [i])) (UPDATE_ENTITY [i]); - } /******************************************************** * Simulation - Begin @@ -105,21 +90,18 @@ ACCESS_VAL[i].write(0); } - for (uint32_t i=0; i(sc_simulation_time()) << endl; - for (uint32_t i=0; i1) - UPDATE_ADDRESS [i].write(addr); - UPDATE_ENTITY [i].write(entity); + ACCESS_VAL [i].write(val ); + if (param._size_address>1) + ACCESS_ADDRESS [i].write(addr); + ACCESS_ENTITY [i].write(entity); sc_start(0); - cout << "\t[" << i << "] " << val << " - " << UPDATE_ACK[i].read() << " addr : " << addr << " -> " << entity << endl; + cout << "\t[" << i << "] " << val << " - " << ACCESS_ACK[i].read() << " addr : " << addr << " -> " << entity << endl; } sc_start(1); @@ -143,7 +125,7 @@ - for (uint32_t i=0; i1) + if (param._size_address>1) ACCESS_ADDRESS [i].write(addr); sc_start(0); - Tentity_t entity = ACCESS_ENTITY [i].read(); + Tentity_t entity = ACCESS_VICTIM [i].read(); cout << "\t[" << i << "] " << val << " - " << ACCESS_ACK[i].read() << " addr : " << addr << " -> " << entity << endl; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h (revision 78) @@ -24,19 +24,22 @@ public : const uint32_t _nb_entity ; // number of entity public : const uint32_t _nb_access ; // number of port to select an entity - public : const uint32_t _nb_update ; // number of port to update the internal entity +//public : const uint32_t _nb_update ; // number of port to update the internal entity public : const uint32_t _size_table; // Size of victim_pseudo_lru's table + public : const bool _table_global; + public : const uint32_t _size_address; //-----[ methods ]----------------------------------------------------------- public : Parameters (uint32_t nb_entity , uint32_t nb_access , - uint32_t nb_update , - uint32_t size_table); +// uint32_t nb_update , + uint32_t size_table, + bool table_global); public : Parameters (Parameters & param) ; public : ~Parameters () ; - public : std::string msg_error (void); - public : std::string print (uint32_t depth); - public : friend std::ostream& operator<< (std::ostream& output_stream, - morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters & x); + public : Parameters_test msg_error (void); + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters & x); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Types.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Types.h (revision 78) @@ -9,5 +9,5 @@ */ -#include "Behavioural/include/Types.h" +#include "Behavioural/Generic/Victim/include/Types.h" namespace morpheo { @@ -17,6 +17,111 @@ namespace victim_pseudo_lru { - typedef uint32_t Taddress_t; - typedef uint32_t Tentity_t; + class entry_t + { + // Numerotation of victim_pseudo_lru's tree + // Tree of Pseudo-LRU + // + // | d2 [3] | + // | 0_______|_______1 | + // | | | | + // | d1 [1] [5] | + // | 0___|___1 0___|___1 | + // | | | | | | + // | d0 [0] [2] [4] [6] | + // | 0_|_1 0_|_1 0_|_1 0_|_1 | + // | | | | | | | | | | + // | Way Way Way Way Way Way Way Way | + // | 0 1 2 3 4 5 6 7 | + // + // Access : Way N with N=2*n -> bit 2*n = 0 + // with N=2*n+1 -> bit 2*n = 1 + // + // if bit = B, depth = D, next_B = B+D if B==1 + // = B-D if B==0 + // + // Update : + + private : bool * _entry; + private : uint32_t _size; + + public : entry_t () + { + }; + public : entry_t (uint32_t size) : _size (size) + { + _entry = new bool [size]; + + // initialisation + for (uint32_t i=0; i>1)-1; // middle + + for (int32_t i=static_cast(log2(_size)-1); i>= 1; i--) + { + index = one_access (index,(1<<(i-1))); + } + index = one_access (index,0); + + // reverse by one_access make always a reverse + uint32_t offset = (_entry[index]==true)?1:0; + + return index+offset; + } + + private : uint32_t one_update (uint32_t index, uint32_t offset, uint32_t value) + { + uint32_t mask = (offset==0)?1:(offset<<1); + bool val = ((value & mask) != 0); + + // reverse + _entry[index] = not val; + + if (val == true) + // Compute next slot + return index + offset; + else + return index - offset; + } + public : void update (uint32_t value) + { + uint32_t index = (_size>>1)-1; // middle + + for (int32_t i=static_cast(log2(_size)-1); i>=1; i--) + { + index = one_update (index,1<<(i-1),value); + } + index = one_update (index,0,value); + } + + public : std::string print () + { + std::string res = ""; + + for (int32_t i=static_cast(_size)-1; i>=0; i--) + res += toString(_entry[i]) + " "; + + return res; + } + }; }; // end namespace victim_pseudo_lru Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h (revision 78) @@ -5,5 +5,5 @@ * $Id$ * - * [ Description ] + * [ Description ] * */ @@ -53,118 +53,9 @@ #endif { - // -----[ internal class ]-------------------------------------------- - protected : class entry_t - { - // Numerotation of victim_pseudo_lru's tree - // Tree of Pseudo-LRU - // - // | d2 [3] | - // | 0_______|_______1 | - // | | | | - // | d1 [1] [5] | - // | 0___|___1 0___|___1 | - // | | | | | | - // | d0 [0] [2] [4] [6] | - // | 0_|_1 0_|_1 0_|_1 0_|_1 | - // | | | | | | | | | | - // | Way Way Way Way Way Way Way Way | - // | 0 1 2 3 4 5 6 7 | - // - // Access : Way N with N=2*n -> bit 2*n = 0 - // with N=2*n+1 -> bit 2*n = 1 - // - // if bit = B, depth = D, next_B = B+D if B==1 - // = B-D if B==0 - // - // Update : + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; - private : bool * _entry; - private : uint32_t _size; - - public : entry_t () - { - }; - public : entry_t (uint32_t size) : _size (size) - { - _entry = new bool [size]; - - // initialisation - for (uint32_t i=0; i>1)-1; // medium - - for (int32_t i=static_cast(log2(_size)-1); i>= 1; i--) - { - index = one_access (index,(1<<(i-1))); - } - index = one_access (index,0); - - // reverse by one_access make always a reverse - uint32_t offset = (_entry[index]==true)?1:0; - - return index+offset; - } - - private : uint32_t one_update (uint32_t index, uint32_t offset, uint32_t value) - { - uint32_t mask = (offset==0)?1:(offset<<1); - bool val = ((value & mask) != 0); - - // reverse - _entry[index] = not val; - - if (val == true) - // Compute next slot - return index + offset; - else - return index - offset; - } - public : void update (uint32_t value) - { - uint32_t index = (_size>>1)-1; // medium - - for (int32_t i=static_cast(log2(_size)-1); i>=1; i--) - { - index = one_update (index,1<<(i-1),value); - } - index = one_update (index,0,value); - } - - public : std::string print () - { - std::string res = ""; - - for (int32_t i=static_cast(_size)-1; i>=0; i--) - res += toString(_entry[i]) + " "; - - return res; - } - - }; - // -----[ fields ]---------------------------------------------------- - // Parameters - protected : const std::string _name; - - protected : const Parameters _param; + protected : const Parameters * _param; #ifdef STATISTICS public : Stat * _stat; @@ -175,5 +66,5 @@ #ifdef SYSTEMC - // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // Interface public : SC_CLOCK * in_CLOCK ; @@ -184,20 +75,18 @@ public : SC_OUT(Tcontrol_t) ** out_ACCESS_ACK ; public : SC_IN (Taddress_t) ** in_ACCESS_ADDRESS; - public : SC_OUT(Tentity_t ) ** out_ACCESS_ENTITY ; - // Interface update - public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; - public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; - public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS; - public : SC_IN (Tentity_t ) ** in_UPDATE_ENTITY ; + public : SC_IN (Tcontrol_t) ** in_ACCESS_HIT ; // hit = 1 : update next_victim with in_entity else with out_victim + public : SC_IN (Tentity_t ) ** in_ACCESS_ENTITY ; + public : SC_OUT(Tentity_t ) ** out_ACCESS_VICTIM ; // Interface update - // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ private : entry_t ** reg_TABLE; - // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : Tentity_t * internal_ACCESS_ENTITY; + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t * internal_ACCESS_ACK ; + private : Tentity_t * internal_ACCESS_VICTIM; #endif - // -----[ methods ]--------------------------------------------------- + // -----[ methods ]--------------------------------------------------- #ifdef SYSTEMC @@ -205,14 +94,15 @@ #endif - public : Victim_Pseudo_LRU ( + public : Victim_Pseudo_LRU + ( #ifdef SYSTEMC - sc_module_name name, + sc_module_name name, #else - std::string name, + std::string name, #endif #ifdef STATISTICS - morpheo::behavioural::Parameters_Statistics * param_statistics, + morpheo::behavioural::Parameters_Statistics * param_statistics, #endif - Parameters param ); + Parameters * param ); public : Victim_Pseudo_LRU (Parameters param ); @@ -224,5 +114,5 @@ public : void transition (void); - public : void genMealy_access (void); + public : void genMoore (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp (revision 78) @@ -17,10 +17,13 @@ Parameters::Parameters (uint32_t nb_entity , uint32_t nb_access , - uint32_t nb_update , - uint32_t size_table): +// uint32_t nb_update , + uint32_t size_table, + bool table_global): _nb_entity (nb_entity ), _nb_access (nb_access ), - _nb_update (nb_update ), - _size_table (size_table) +// _nb_update (nb_update ), + _size_table ((table_global == true)?1:size_table), + _table_global (table_global), + _size_address (size_table) { test(); @@ -30,6 +33,8 @@ _nb_entity (param._nb_entity ), _nb_access (param._nb_access ), - _nb_update (param._nb_update ), - _size_table (param._size_table) +// _nb_update (param._nb_update ), + _size_table (param._size_table), + _table_global(param._table_global), + _size_address(param._size_address) { test(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_msg_error.cpp (revision 78) @@ -16,50 +16,27 @@ namespace victim_pseudo_lru { - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { - std::string msg = ""; + Parameters_test test ("Victime_Pseudo_LRU"); if (_nb_entity < 2) - { - msg += " - nb_entity must be >= 2\n"; - msg += " * nb_entity : " + toString(_nb_entity) + "\n"; - } - + test.error("nb_entity must be >= 2"); + if (is_positive(log2(_nb_entity)) == false) - { - msg += " - nb_entity is not a power of 2\n"; - msg += " * nb_entity : " + toString(_nb_entity) + "\n"; - } + test.error("nb_entity is not a power of 2"); if (_nb_access < 1) - { - msg += " - nb_access must be >= 1\n"; - msg += " * nb_access : " + toString(_nb_access) + "\n"; - } + test.error("nb_access must be >= 1"); if (_size_table < 1) - { - msg += " - size_table must be >= 1\n"; - msg += " * size_table : " + toString(_size_table) + "\n"; - } + test.error("size_table must be >= 1"); if (is_between_inclusive (static_cast(log2(_nb_entity)),0 ,(8*sizeof(Tentity_t))) == false) - { - msg += " - type \"Tentity_t\" is too little to the size defined by nb_entity\n"; - msg += " * nb_entity : " + toString(_nb_entity) + "\n"; - msg += " * Tentity_t (bits) : " + toString(8*(sizeof(Tentity_t))) + "\n"; - } + test.error("type \"Tentity_t\" is too little to the size defined by nb_entity"); if (is_between_inclusive (static_cast(log2(_size_table)),0 ,(8*sizeof(Taddress_t))) == false) - { - msg += " - type \"Taddress_t\" is too little to the size defined by size_table\n"; - msg += " * size_table : " + toString(_size_table) + "\n"; - msg += " > size (bits) : " + toString(log2(_size_table)) + "\n"; - msg += " * Taddress_t (bits) : " + toString(8*(sizeof(Taddress_t))) + "\n"; - } + test.error("type \"Taddress_t\" is too little to the size defined by size_table"); - - - return msg; + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_print.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_print.cpp (revision 78) @@ -21,8 +21,9 @@ xml.balise_open("victim_pseudo_lru"); - xml.singleton_begin("nb_entity "); xml.attribut("value",toString(_nb_entity )); xml.singleton_end(); - xml.singleton_begin("nb_access "); xml.attribut("value",toString(_nb_access )); xml.singleton_end(); - xml.singleton_begin("nb_update "); xml.attribut("value",toString(_nb_update )); xml.singleton_end(); - xml.singleton_begin("size_table"); xml.attribut("value",toString(_size_table)); xml.singleton_end(); + xml.singleton_begin("nb_entity "); xml.attribut("value",toString(_nb_entity )); xml.singleton_end(); + xml.singleton_begin("nb_access "); xml.attribut("value",toString(_nb_access )); xml.singleton_end(); +// xml.singleton_begin("nb_update "); xml.attribut("value",toString(_nb_update )); xml.singleton_end(); + xml.singleton_begin("size_table "); xml.attribut("value",toString(_size_table )); xml.singleton_end(); + xml.singleton_begin("table_global"); xml.attribut("value",toString(_table_global)); xml.singleton_end(); xml.balise_close(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp (revision 78) @@ -22,5 +22,5 @@ morpheo::behavioural::Parameters_Statistics * param_statistics, #endif - morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters param ): + morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters * param ): _name (name) ,_param (param) @@ -52,30 +52,17 @@ sensitive << (*(in_CLOCK)).pos(); - SC_METHOD (genMealy_access); + SC_METHOD (genMoore); dont_initialize (); sensitive << (*(in_CLOCK)).neg(); - for (uint32_t i=0; i<_param._nb_access; i++) - { - sensitive << *(in_ACCESS_VAL [i]); - if (_param._size_table>1) - sensitive << *(in_ACCESS_ADDRESS [i]); - } #ifdef SYSTEMCASS_SPECIFIC - log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","List dependency information"); - // List dependency information - for (uint32_t i=0; i<_param._nb_access; i++) - { - (*(out_ACCESS_ENTITY [i])) (*( in_ACCESS_VAL [i])); - if (_param._size_table>1) - (*(out_ACCESS_ENTITY [i])) (*( in_ACCESS_ADDRESS [i])); - } #endif // Constant - ack is always at one - for (uint32_t i=0; i<_param._nb_access; i++) - PORT_WRITE (out_ACCESS_ACK [i], 1); - for (uint32_t i=0; i<_param._nb_update; i++) - PORT_WRITE (out_UPDATE_ACK [i], 1); + for (uint32_t i=0; i<_param->_nb_access; i++) + { + internal_ACCESS_ACK [i] = 1; + PORT_WRITE (out_ACCESS_ACK [i], internal_ACCESS_ACK [i]); + } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp (revision 78) @@ -8,4 +8,5 @@ #include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h" +#include "Behavioural/include/Allocation.h" namespace morpheo { @@ -42,59 +43,23 @@ // ~~~~~[ Interface : "access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { - in_ACCESS_VAL = new SC_IN (Tcontrol_t) * [_param._nb_access]; - out_ACCESS_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_access]; - if (_param._size_table>1) - in_ACCESS_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_access]; - out_ACCESS_ENTITY = new SC_OUT(Tentity_t ) * [_param._nb_access]; - - for (uint32_t i=0; i<_param._nb_access; i++) - { - Interface_fifo * interface = _interfaces->set_interface("access_"+toString(i) -#ifdef POSITION - , IN ,WEST, "Access" -#endif - ); + ALLOC1_INTERFACE("access",IN,WEST, "Access", _param->_nb_access); - in_ACCESS_VAL [i] = interface->set_signal_valack_in ("val" , VAL); - out_ACCESS_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); - - if (_param._size_table>1) - in_ACCESS_ADDRESS [i] = interface->set_signal_in ("address",static_cast(log2(_param._size_table))); - out_ACCESS_ENTITY [i] = interface->set_signal_out ("entity" ,static_cast(log2(_param._nb_entity ))); - } + ALLOC1_VALACK_IN ( in_ACCESS_VAL ,VAL); + ALLOC1_VALACK_OUT(out_ACCESS_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_ACCESS_HIT ,"hit" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_ACCESS_ADDRESS,"address",Taddress_t,log2(_param->_size_address)); + ALLOC1_SIGNAL_IN ( in_ACCESS_ENTITY ,"entity" ,Tentity_t ,log2(_param->_nb_entity )); + ALLOC1_SIGNAL_OUT(out_ACCESS_VICTIM ,"victim" ,Tentity_t ,log2(_param->_nb_entity )); } - // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - - { - in_UPDATE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_update]; - out_UPDATE_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_update]; - if (_param._size_table>1) - in_UPDATE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_update]; - in_UPDATE_ENTITY = new SC_IN (Tentity_t ) * [_param._nb_update]; - - for (uint32_t i=0; i<_param._nb_update; i++) - { - Interface_fifo * interface = _interfaces->set_interface("update_"+toString(i) -#ifdef POSITION - , IN ,EAST, "Update" -#endif - ); + // -----[ Register ]--------------------------------------------------- + reg_TABLE = new entry_t * [_param->_size_table]; - in_UPDATE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); - out_UPDATE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); - if (_param._size_table>1) - in_UPDATE_ADDRESS [i] = interface->set_signal_in ("address",static_cast(log2(_param._size_table))); - in_UPDATE_ENTITY [i] = interface->set_signal_in ("entity" ,static_cast(log2(_param._nb_entity ))); - } - } - // -----[ Register ]--------------------------------------------------- - reg_TABLE = new entry_t * [_param._size_table]; - - for (uint32_t i=0; i<_param._size_table; i++) - reg_TABLE [i] = new entry_t (_param._nb_entity); + for (uint32_t i=0; i<_param->_size_table; i++) + reg_TABLE [i] = new entry_t (_param->_nb_entity); // -----[ Internal ]--------------------------------------------------- - internal_ACCESS_ENTITY = new Tentity_t [_param._nb_entity]; + internal_ACCESS_ACK = new Tcontrol_t [_param->_nb_access]; + internal_ACCESS_VICTIM = new Tentity_t [_param->_nb_access]; #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp (revision 78) @@ -3,5 +3,5 @@ * $Id$ * - * [ Description ] + * [ Description ] * */ @@ -19,29 +19,21 @@ delete in_CLOCK; delete in_NRESET; - // -----[ Interface access ]------------------------------------------- + // -----[ Interface access ]------------------------------------------- delete [] in_ACCESS_VAL ; delete [] out_ACCESS_ACK ; - if (_param._size_table>1) + if (_param->_size_address>1) delete [] in_ACCESS_ADDRESS; - delete [] out_ACCESS_ENTITY ; + delete [] in_ACCESS_HIT ; + delete [] in_ACCESS_ENTITY ; + delete [] out_ACCESS_VICTIM ; - // -----[ Interface update ]------------------------------------------- - delete [] in_UPDATE_VAL ; - delete [] out_UPDATE_ACK ; - if (_param._size_table>1) - delete [] in_UPDATE_ADDRESS; - delete [] in_UPDATE_ENTITY ; - - // -----[ Register ]--------------------------------------------------- + // -----[ Register ]--------------------------------------------------- delete [] reg_TABLE; - // -----[ Internal ]--------------------------------------------------- - delete [] internal_ACCESS_ENTITY; + // -----[ Internal ]--------------------------------------------------- + delete [] internal_ACCESS_ACK ; + delete [] internal_ACCESS_VICTIM; -#ifdef POSITION delete _component; -#else - delete _interfaces; -#endif }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_genMealy_access.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_genMealy_access.cpp (revision 77) +++ (revision ) @@ -1,46 +1,0 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h" - -namespace morpheo { -namespace behavioural { -namespace generic { -namespace victim { -namespace victim_pseudo_lru { - - void Victim_Pseudo_LRU::genMealy_access (void) - { - for (uint32_t i=0; i<_param._nb_access; i++) - { - if (PORT_READ (in_ACCESS_VAL[i]) == 1) - { - Taddress_t address; - - if (_param._size_table>1) - address = PORT_READ (in_ACCESS_ADDRESS[i]); - else - address = 0; - - internal_ACCESS_ENTITY[i] = reg_TABLE[address]->access(); - } - else - { - internal_ACCESS_ENTITY[i] = 0; - } - - PORT_WRITE(out_ACCESS_ENTITY[i], internal_ACCESS_ENTITY[i]); - }//end for i - }; - -}; // end namespace victim_pseudo_lru -}; // end namespace victim -}; // end namespace generic -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_genMoore.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_genMoore.cpp (revision 78) @@ -0,0 +1,34 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { +namespace victim_pseudo_lru { + + void Victim_Pseudo_LRU::genMoore (void) + { + for (uint32_t i=0; i<_param->_nb_access; i++) + { + Taddress_t address = (_param->_size_table>1)?PORT_READ(in_ACCESS_ADDRESS[i]):0; + + internal_ACCESS_VICTIM[i] = reg_TABLE[address]->access(); + + PORT_WRITE(out_ACCESS_VICTIM[i], internal_ACCESS_VICTIM[i]); + }//end for i + }; + +}; // end namespace victim_pseudo_lru +}; // end namespace victim +}; // end namespace generic +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp (revision 78) @@ -17,48 +17,32 @@ void Victim_Pseudo_LRU::transition (void) { -#ifdef STATISTICS - uint32_t _stat_nb_access = 0; - uint32_t _stat_nb_update = 0; -#endif + for (uint32_t i=0; i<_param->_nb_access; i++) + { + if (PORT_READ (in_ACCESS_VAL[i]) and internal_ACCESS_ACK) + { + Taddress_t address = (_param->_size_table>1)?PORT_READ(in_ACCESS_ADDRESS[i]):0; + Tentity_t entity; - for (uint32_t i=0; i<_param._nb_access; i++) - { - // Access ... (ack is always at 1) - if (PORT_READ (in_ACCESS_VAL[i]) == 1) - { -#ifdef STATISTICS - _stat_nb_access ++; -#endif - Taddress_t address; + if (PORT_READ(in_ACCESS_HIT [i])) + { + // Hit : don't need a victim +// #ifdef STATISTICS +// _stat_nb_update ++; +// #endif + entity = PORT_READ(in_ACCESS_ENTITY[i]); + } + else + { + // Miss : need victim +// #ifdef STATISTICS +// _stat_nb_access ++; +// #endif + entity = internal_ACCESS_VICTIM[i]; + } - if (_param._size_table>1) - address = PORT_READ (in_ACCESS_ADDRESS[i]); - else - address = 0; - - reg_TABLE[address]->update(internal_ACCESS_ENTITY[i]); + reg_TABLE[address]->update(entity); } }//end for i - for (uint32_t i=0; i<_param._nb_update; i++) - { - // Update ... (ack is always at 1) - if (PORT_READ (in_UPDATE_VAL[i]) == 1) - { -#ifdef STATISTICS - _stat_nb_update ++; -#endif - - Taddress_t address; - - if (_param._size_table>1) - address = PORT_READ (in_UPDATE_ADDRESS[i]); - else - address = 0; - - reg_TABLE[address]->update(PORT_READ(in_UPDATE_ENTITY[i])); - } - }//end for i - #if defined(STATISTICS) or defined(VHDL_TESTBENCH) end_cycle (); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp (revision 78) @@ -35,5 +35,5 @@ vhdl->set_body ("-- Way Way Way Way Way Way Way Way "); vhdl->set_body ("-- 0 1 2 3 4 5 6 7 "); - for (uint32_t i=0; i<_param._nb_access; i++) + for (uint32_t i=0; i<_param->_nb_access; i++) { vhdl->set_body (""); @@ -42,5 +42,5 @@ std::string access_address; - if (_param._size_table>1) + if (_param->_size_table>1) access_address = "conv_integer(in_ACCESS_"+toString(i)+"_ADDRESS)"; else @@ -50,5 +50,5 @@ vhdl->set_body (""); - for (int32_t j=static_cast(log2(_param._nb_entity)-1); j>=0; j--) + for (int32_t j=static_cast(log2(_param->_nb_entity)-1); j>=0; j--) { vhdl->set_body ("access_entity_"+toString(i)+"("+toString(j)+") <= "); @@ -56,10 +56,10 @@ uint32_t cpt=0; - for (int32_t k=(1<(_param._nb_entity-1); k+=(1<<(j+1))) + for (int32_t k=(1<(_param->_nb_entity-1); k+=(1<<(j+1))) { std::string cond = ""; // Create the condition - for (uint32_t l=j+1; l(log2(_param._nb_entity));l++) + for (uint32_t l=j+1; l(log2(_param->_nb_entity));l++) { if (l==static_cast(j+1)) @@ -85,10 +85,10 @@ vhdl->set_body (""); vhdl->set_body ("-- port access"); - for (uint32_t i=0; i<_param._nb_access; i++) - for (int32_t j=static_cast(log2(_param._nb_entity)-1); j>=0; j--) + for (uint32_t i=0; i<_param->_nb_access; i++) + for (int32_t j=static_cast(log2(_param->_nb_entity)-1); j>=0; j--) { uint32_t cpt=0; - for (int32_t k=(1<(_param._nb_entity-1); k+=(1<<(j+1))) + for (int32_t k=(1<(_param->_nb_entity-1); k+=(1<<(j+1))) { bool have_cond = false; @@ -96,5 +96,5 @@ // condition to change the bit - for (uint32_t l=j+1; l(log2(_param._nb_entity));l++) + for (uint32_t l=j+1; l(log2(_param->_nb_entity));l++) { have_cond = true; @@ -118,10 +118,10 @@ vhdl->set_body (""); vhdl->set_body ("-- port update"); - for (uint32_t i=0; i<_param._nb_update; i++) - for (int32_t j=static_cast(log2(_param._nb_entity)-1); j>=0; j--) + for (uint32_t i=0; i<_param->_nb_update; i++) + for (int32_t j=static_cast(log2(_param->_nb_entity)-1); j>=0; j--) { uint32_t cpt=0; - for (int32_t k=(1<(_param._nb_entity-1); k+=(1<<(j+1))) + for (int32_t k=(1<(_param->_nb_entity-1); k+=(1<<(j+1))) { bool have_cond = false; @@ -129,5 +129,5 @@ // condition to change the bit - for (uint32_t l=j+1; l(log2(_param._nb_entity));l++) + for (uint32_t l=j+1; l(log2(_param->_nb_entity));l++) { have_cond = true; @@ -146,5 +146,5 @@ std::string update_address; - if (_param._size_table>1) + if (_param->_size_table>1) update_address = "conv_integer(in_UPDATE_"+toString(i)+"_ADDRESS)"; else @@ -168,9 +168,9 @@ vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); vhdl->set_body ("\t\t-- Access port"); - for (uint32_t i=0; i<_param._nb_access; i++) + for (uint32_t i=0; i<_param->_nb_access; i++) { std::string access_address; - if (_param._size_table>1) + if (_param->_size_table>1) access_address = "conv_integer(in_ACCESS_"+toString(i)+"_ADDRESS)"; else @@ -183,9 +183,9 @@ vhdl->set_body ("\t\t-- Update port"); - for (uint32_t i=0; i<_param._nb_update; i++) + for (uint32_t i=0; i<_param->_nb_update; i++) { std::string update_address; - if (_param._size_table>1) + if (_param->_size_table>1) update_address = "conv_integer(in_UPDATE_"+toString(i)+"_ADDRESS)"; else @@ -207,5 +207,5 @@ vhdl->set_body ("-- Ack is always "); vhdl->set_body (""); - for (uint32_t i=0; i<_param._nb_access; i++) + for (uint32_t i=0; i<_param->_nb_access; i++) { vhdl->set_body ("out_ACCESS_"+toString(i)+"_ACK <= '1';"); @@ -213,5 +213,5 @@ } vhdl->set_body (""); - for (uint32_t i=0; i<_param._nb_update; i++) + for (uint32_t i=0; i<_param->_nb_update; i++) { vhdl->set_body ("out_UPDATE_"+toString(i)+"_ACK <= '1';"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp (revision 78) @@ -18,18 +18,18 @@ void Victim_Pseudo_LRU::vhdl_declaration (Vhdl * & vhdl) { - vhdl->set_type ("Ttable", "array (" + toString(_param._size_table-1) + " downto 0) of "+std_logic(_param._nb_entity-1)); + vhdl->set_type ("Ttable", "array (" + toString(_param->_size_table-1) + " downto 0) of "+std_logic(_param->_nb_entity-1)); vhdl->set_signal ("reg_TABLE", "Ttable"); - for (uint32_t i=0; i<_param._nb_access; i++) + for (uint32_t i=0; i<_param->_nb_access; i++) { - vhdl->set_signal ("access_entry_"+toString(i)+" ",std_logic(_param._nb_entity-1)); - vhdl->set_signal ("access_next_entry_"+toString(i)+"",std_logic(_param._nb_entity-1)); - vhdl->set_signal ("access_entity_"+toString(i)+" ",std_logic(static_cast(log2(_param._nb_entity)))); + vhdl->set_signal ("access_entry_"+toString(i)+" ",std_logic(_param->_nb_entity-1)); + vhdl->set_signal ("access_next_entry_"+toString(i)+"",std_logic(_param->_nb_entity-1)); + vhdl->set_signal ("access_entity_"+toString(i)+" ",std_logic(static_cast(log2(_param->_nb_entity)))); } - for (uint32_t i=0; i<_param._nb_update; i++) + for (uint32_t i=0; i<_param->_nb_update; i++) { - vhdl->set_signal ("update_next_entry_"+toString(i)+"",std_logic(_param._nb_entity-1)); + vhdl->set_signal ("update_next_entry_"+toString(i)+"",std_logic(_param->_nb_entity-1)); } }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/Makefile (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/Makefile (revision 78) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/Victim.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/Victim.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/Victim.tex (revision 78) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/sty/header.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/sty/header.sty (revision 78) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Victim} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/01_introduction.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/01_introduction.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/01_introduction.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/02_features.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/02_features.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/02_features.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Features} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/03_description.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/03_description.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/03_description.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/04_pinout.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/04_pinout.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/04_pinout.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/05_parameters.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/05_parameters.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/05_parameters.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/06_performance.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/06_performance.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/06_performance.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Performance} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/07_details.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/07_details.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/07_details.tex (revision 78) @@ -0,0 +1,1 @@ +\Section{Details} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/08_history.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/08_history.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/08_history.tex (revision 78) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/doc/tex/root.tex (revision 78) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Parameters.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Parameters.h (revision 78) @@ -0,0 +1,72 @@ +#ifndef morpheo_behavioural_generic_victim_Parameters_h +#define morpheo_behavioural_generic_victim_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" +#include "Behavioural/Generic/Victim/include/Types.h" + +// #include "Behavioural/Generic/Victim/Victim_Random/include/Parameters.h" +// #include "Behavioural/Generic/Victim/Victim_Round_Robin/include/Parameters.h" +// #include "Behavioural/Generic/Victim/Victim_NLU/include/Parameters.h" +#include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h" +// #include "Behavioural/Generic/Victim/Victim_LRU/include/Parameters.h" +// #include "Behavioural/Generic/Victim/Victim_FIFO/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : Tvictim_t _victim_scheme ; // Scheme to select the victim + public : uint32_t _nb_entity ; // number of entity + public : uint32_t _nb_entry ; // number of entry + public : uint32_t _nb_access ; // number of port to select an entity + public : bool _table_global ; // Have one table or one by entry + + public : uint32_t _size_entity ; + public : uint32_t _size_table ; // Size of internal table + public : uint32_t _size_address ; + + public : bool _have_port_address; + +//public : morpheo::behavioural::generic::victim::victim_random ::Parameters * _param_victim_random ; +//public : morpheo::behavioural::generic::victim::victim_round_robin::Parameters * _param_victim_round_robin; +//public : morpheo::behavioural::generic::victim::victim_nlu ::Parameters * _param_victim_nlu ; + public : morpheo::behavioural::generic::victim::victim_pseudo_lru ::Parameters * _param_victim_pseudo_lru ; +//public : morpheo::behavioural::generic::victim::victim_lru ::Parameters * _param_victim_lru ; +//public : morpheo::behavioural::generic::victim::victim_fifo ::Parameters * _param_victim_fifo ; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (Tvictim_t victim_scheme , + uint32_t nb_entity , + uint32_t nb_entry , + uint32_t nb_access , + bool table_global ); +//public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::generic::victim::Parameters & x); + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Types.h (revision 78) @@ -0,0 +1,25 @@ +#ifndef morpheo_behavioural_generic_victim_Types_h +#define morpheo_behavioural_generic_victim_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + typedef uint32_t Taddress_t; + typedef uint32_t Tentity_t; + +}; // end namespace victim +}; // end namespace generic +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Victim.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Victim.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/include/Victim.h (revision 78) @@ -0,0 +1,123 @@ +#ifndef morpheo_behavioural_generic_victim_Victim_h +#define morpheo_behavioural_generic_victim_Victim_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" + +#include "Behavioural/Generic/Victim/include/Types.h" +#include "Behavioural/Generic/Victim/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +// #include "Behavioural/Generic/Victim/Victim_Random/include/Victim_Random.h" +// #include "Behavioural/Generic/Victim/Victim_Round_Robin/include/Victim_Round_Robin.h" +// #include "Behavioural/Generic/Victim/Victim_NLU/include/Victim_NLU.h" +#include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h" +// #include "Behavioural/Generic/Victim/Victim_LRU/include/Victim_LRU.h" +// #include "Behavioural/Generic/Victim/Victim_FIFO/include/Victim_FIFO.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + class Victim +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "Access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_ACCESS_VAL ; + public : SC_OUT(Tcontrol_t) ** out_ACCESS_ACK ; + public : SC_IN (Taddress_t) ** in_ACCESS_ADDRESS; + public : SC_IN (Tcontrol_t) ** in_ACCESS_HIT ; + public : SC_IN (Tentity_t ) ** in_ACCESS_ENTITY ; + public : SC_OUT(Tentity_t ) ** out_ACCESS_VICTIM ; + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +//public : morpheo::behavioural::generic::victim::victim_random ::Victim_Random * _component_victim_random ; +//public : morpheo::behavioural::generic::victim::victim_round_robin::Victim_Round_Robin * _component_victim_round_robin; +//public : morpheo::behavioural::generic::victim::victim_nlu ::Victim_NLU * _component_victim_nlu ; + public : morpheo::behavioural::generic::victim::victim_pseudo_lru ::Victim_Pseudo_LRU * _component_victim_pseudo_lru ; +//public : morpheo::behavioural::generic::victim::victim_lru ::Victim_LRU * _component_victim_lru ; +//public : morpheo::behavioural::generic::victim::victim_fifo ::Victim_FIFO * _component_victim_fifo ; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Victim); +#endif + public : Victim + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage=USE_ALL + ); + public : ~Victim (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + }; +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters.cpp (revision 78) @@ -0,0 +1,87 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + +#undef FUNCTION +#define FUNCTION "Victim::Parameters" + Parameters::Parameters (Tvictim_t victim_scheme , + uint32_t nb_entity , + uint32_t nb_entry , + uint32_t nb_access , + bool table_global ) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + _victim_scheme = victim_scheme; + _nb_entity = nb_entity ; + _nb_entry = nb_entry ; + _nb_access = nb_access ; + _table_global = table_global ; + + _size_table = (table_global==true)?1:_nb_entry; + _size_entity = log2(nb_entity); + _size_address = log2(nb_entry); + + _have_port_address = _size_address>0; + + test(); + + switch (victim_scheme) + { +// case VICTIM_RANDOM : _param_victim_random = new morpheo::behavioural::generic::victim::victim_random ::Parameters (); break; +// case VICTIM_ROUND_ROBIN : _param_victim_round_robin = new morpheo::behavioural::generic::victim::victim_round_robin::Parameters (); break; +// case VICTIM_NLU : _param_victim_nlu = new morpheo::behavioural::generic::victim::victim_nlu ::Parameters (); break; + case VICTIM_PSEUDO_LRU : _param_victim_pseudo_lru = new morpheo::behavioural::generic::victim::victim_pseudo_lru ::Parameters (nb_entity, nb_access, nb_entry, table_global); break; +// case VICTIM_LRU : _param_victim_lru = new morpheo::behavioural::generic::victim::victim_lru ::Parameters (); break; +// case VICTIM_FIFO : _param_victim_fifo = new morpheo::behavioural::generic::victim::victim_fifo ::Parameters (); break; + default : break; + } + + log_printf(FUNC,Victim,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Victim::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Victim,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Victim,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Victim::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + switch (_victim_scheme) + { +// case VICTIM_RANDOM : delete _param_victim_random ; +// case VICTIM_ROUND_ROBIN : delete _param_victim_round_robin; +// case VICTIM_NLU : delete _param_victim_nlu ; + case VICTIM_PSEUDO_LRU : delete _param_victim_pseudo_lru ; +// case VICTIM_LRU : delete _param_victim_lru ; +// case VICTIM_FIFO : delete _param_victim_fifo ; + default : break; + } + + log_printf(FUNC,Victim,FUNCTION,"End"); + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters_msg_error.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters_msg_error.cpp (revision 78) @@ -0,0 +1,46 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Generic/Victim/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + +#undef FUNCTION +#define FUNCTION "Victim::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + Parameters_test test ("Victim"); + + switch (_victim_scheme) + { + case VICTIM_RANDOM : test.error("Victim scheme '"+toString(_victim_scheme)+"' is not supported. (Coming Soon)"); break; + case VICTIM_ROUND_ROBIN : test.error("Victim scheme '"+toString(_victim_scheme)+"' is not supported. (Coming Soon)"); break; + case VICTIM_NLU : test.error("Victim scheme '"+toString(_victim_scheme)+"' is not supported. (Coming Soon)"); break; +// case VICTIM_PSEUDO_LRU : test.error("Victim scheme '"+toString(_victim_scheme)+"' is not supported. (Coming Soon)"); break; + case VICTIM_LRU : test.error("Victim scheme '"+toString(_victim_scheme)+"' is not supported. (Coming Soon)"); break; + case VICTIM_FIFO : test.error("Victim scheme '"+toString(_victim_scheme)+"' is not supported. (Coming Soon)"); break; + default : break; + } + + log_printf(FUNC,Victim,FUNCTION,"End"); + + return test; + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters_print.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Parameters_print.cpp (revision 78) @@ -0,0 +1,56 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + +#undef FUNCTION +#define FUNCTION "Victim::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + XML xml ("victim"); + + xml.balise_open("victim"); + xml.singleton_begin("victim_scheme"); xml.attribut("value",toString(_victim_scheme)); xml.singleton_end(); + xml.singleton_begin("nb_entity "); xml.attribut("value",toString(_nb_entity )); xml.singleton_end(); + xml.singleton_begin("nb_entry "); xml.attribut("value",toString(_nb_entry )); xml.singleton_end(); + xml.singleton_begin("nb_access "); xml.attribut("value",toString(_nb_access )); xml.singleton_end(); + xml.singleton_begin("table_global "); xml.attribut("value",toString(_table_global )); xml.singleton_end(); + xml.balise_close(); + + log_printf(FUNC,Victim,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Victim::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::generic::victim::Parameters & x) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Victim,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim.cpp (revision 78) @@ -0,0 +1,80 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/include/Victim.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + +#undef FUNCTION +#define FUNCTION "Victim::Victim" + Victim::Victim + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::generic::victim::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + log_printf(INFO,Victim,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (_usage & USE_STATISTICS) + { + switch (_param->_victim_scheme) + { +// case VICTIM_RANDOM : _stat = _component_victim_random ->_stat; break; +// case VICTIM_ROUND_ROBIN : _stat = _component_victim_round_robin ->_stat; break; +// case VICTIM_NLU : _stat = _component_victim_nlu ->_stat; break; + case VICTIM_PSEUDO_LRU : _stat = _component_victim_pseudo_lru ->_stat; break; +// case VICTIM_LRU : _stat = _component_victim_lru ->_stat; break; +// case VICTIM_FIFO : _stat = _component_victim_fifo ->_stat; break; + default : break; + } + } +#endif + + log_printf(FUNC,Victim,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Victim::~Victim" + Victim::~Victim (void) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + log_printf(INFO,Victim,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Victim,FUNCTION,"End"); + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim_allocation.cpp (revision 78) @@ -0,0 +1,130 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/include/Victim.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + + +#undef FUNCTION +#define FUNCTION "Victim::allocation" + void Victim::allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + __ALLOC_SIGNAL(in_CLOCK ,"in_CLOCK" ,SC_CLOCK ); + __ALLOC_SIGNAL(in_NRESET,"in_NRESET",SC_IN (Tcontrol_t)); + } + + // ~~~~~[ Interface : "Access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + __ALLOC1_INTERFACE("ACCESS",_param->_nb_access); + + __ALLOC1_SIGNAL_IN ( in_ACCESS_VAL ,"VAL" ,Tcontrol_t); + __ALLOC1_SIGNAL_OUT(out_ACCESS_ACK ,"ACK" ,Tcontrol_t); + if (_param->_have_port_address) + __ALLOC1_SIGNAL_IN ( in_ACCESS_ADDRESS,"ADDRESS",Taddress_t); + __ALLOC1_SIGNAL_IN ( in_ACCESS_HIT ,"HIT" ,Tcontrol_t); + __ALLOC1_SIGNAL_IN ( in_ACCESS_ENTITY ,"ENTITY" ,Tentity_t ); + __ALLOC1_SIGNAL_OUT(out_ACCESS_VICTIM ,"VICTIM" ,Tentity_t ); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string name; + + switch (_param->_victim_scheme) + { +// case VICTIM_RANDOM : +// case VICTIM_ROUND_ROBIN : +// case VICTIM_NLU : + case VICTIM_PSEUDO_LRU : + { + std::cout << "Create : " << _name << std::endl; + + _component_victim_pseudo_lru = new morpheo::behavioural::generic::victim::victim_pseudo_lru::Victim_Pseudo_LRU + (_name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_victim_pseudo_lru); + break; + } +// case VICTIM_LRU : +// case VICTIM_FIFO : + default : break; + } + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + std::cout << "Instance : " << _name << std::endl; + + switch (_param->_victim_scheme) + { + +// case VICTIM_RANDOM : +// case VICTIM_ROUND_ROBIN : +// case VICTIM_NLU : + case VICTIM_PSEUDO_LRU : + { + { + (*(_component_victim_pseudo_lru-> in_CLOCK )) (*( in_CLOCK)); + (*(_component_victim_pseudo_lru-> in_NRESET)) (*( in_NRESET)); + } + + for (uint32_t i=0; i<_param->_nb_access; i++) + { + (*(_component_victim_pseudo_lru-> in_ACCESS_VAL [i])) (*( in_ACCESS_VAL [i])); + (*(_component_victim_pseudo_lru->out_ACCESS_ACK [i])) (*(out_ACCESS_ACK [i])); + if (_param->_have_port_address) + (*(_component_victim_pseudo_lru-> in_ACCESS_ADDRESS [i])) (*( in_ACCESS_ADDRESS [i])); + (*(_component_victim_pseudo_lru-> in_ACCESS_HIT [i])) (*( in_ACCESS_HIT [i])); + (*(_component_victim_pseudo_lru-> in_ACCESS_ENTITY [i])) (*( in_ACCESS_ENTITY [i])); + (*(_component_victim_pseudo_lru->out_ACCESS_VICTIM [i])) (*(out_ACCESS_VICTIM [i])); + } + + break; + } +// case VICTIM_LRU : +// case VICTIM_FIFO : + default : break; + } + + + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + switch (_param->_victim_scheme) + { +// case VICTIM_RANDOM : _component = _component_victim_random ->_component; break; +// case VICTIM_ROUND_ROBIN : _component = _component_victim_round_robin->_component; break; +// case VICTIM_NLU : _component = _component_victim_nlu ->_component; break; + case VICTIM_PSEUDO_LRU : _component = _component_victim_pseudo_lru ->_component; break; +// case VICTIM_LRU : _component = _component_victim_lru ->_component; break; +// case VICTIM_FIFO : _component = _component_victim_fifo ->_component; break; + default : break; + } + + log_printf(FUNC,Victim,FUNCTION,"End"); + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/src/Victim_deallocation.cpp (revision 78) @@ -0,0 +1,56 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Generic/Victim/include/Victim.h" + +namespace morpheo { +namespace behavioural { +namespace generic { +namespace victim { + + +#undef FUNCTION +#define FUNCTION "Victim::deallocation" + void Victim::deallocation (void) + { + log_printf(FUNC,Victim,FUNCTION,"Begin"); + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + switch (_param->_victim_scheme) + { +// case VICTIM_RANDOM : delete _component_victim_random ; break; +// case VICTIM_ROUND_ROBIN : delete _component_victim_round_robin; break; +// case VICTIM_NLU : delete _component_victim_nlu ; break; + case VICTIM_PSEUDO_LRU : delete _component_victim_pseudo_lru ; break; +// case VICTIM_LRU : delete _component_victim_lru ; break; +// case VICTIM_FIFO : delete _component_victim_fifo ; break; + default : break; + } + + if (_usage & USE_SYSTEMC) + { + delete in_CLOCK ; + delete in_NRESET; + + delete [] in_ACCESS_VAL ; + delete [] out_ACCESS_ACK ; + if (_param->_have_port_address) + delete [] in_ACCESS_ADDRESS; + delete [] in_ACCESS_HIT ; + delete [] in_ACCESS_ENTITY ; + delete [] out_ACCESS_VICTIM ; + } + + + log_printf(FUNC,Victim,FUNCTION,"End"); + }; + +}; // end namespace victim +}; // end namespace generic + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common (revision 78) @@ -29,8 +29,5 @@ FLAGS_COMMON = $(SYSTEMC_CFLAGS_$(SIMULATOR)) \ - -O3 \ - -g3 \ - -Wall \ - -Wunused + $(CXX_FLAGS) # -Wno-deprecated \ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 78) @@ -72,5 +72,5 @@ PERIOD[0]=1; \ \ - while $(READ) line; do \ + while read line; do \ LINE=($$line); \ \ @@ -117,7 +117,8 @@ export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ declare -i count=`$(GREP) -ch "Test OK" $@`; \ + declare timing=`$(GREP) -h "Timing" $@`; \ if $(TEST) $$count -ne 0; \ - then echo " $* ... OK"; \ - else echo " $* ... KO"; exit 1; \ + then echo -e " $* ... OK\t$$timing";\ + else echo " $* ... KO"; exit 1; \ fi; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 78) @@ -54,5 +54,5 @@ $(ECHO) -e "" >> $(FPGA_CFG_FILE_LOCAL); \ done; \ - ($(XILINX_ENV); $(CD) $(FPGA_CFG_FILE_GLOBAL_DIR); $(FPGA_CFG_FILE_GLOBAL)); \ + ($(XILINX_ENV); cd $(FPGA_CFG_FILE_GLOBAL_DIR); $(FPGA_CFG_FILE_GLOBAL)); \ $(MAKE) $(FPGA_LOG_FILES); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.deps (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.deps (revision 78) @@ -20,9 +20,9 @@ #-----[ Library ]------------------------------------------ -Behavioural_LIBRARY = -lCommon \ - -lBehavioural +Behavioural_LIBRARY = -lBehavioural \ + -lCommon -Behavioural_DIR_LIBRARY = -L$(Common_DIR)/lib \ - -L$(Behavioural_DIR)/lib +Behavioural_DIR_LIBRARY = -L$(Behavioural_DIR)/lib \ + -L$(Common_DIR)/lib #-----[ Rules ]-------------------------------------------- @@ -30,9 +30,9 @@ Behavioural_library : @\ - $(MAKE) Common_library; + $(MAKE) Common_library; \ $(MAKE) --directory=$(Behavioural_DIR) --makefile=Makefile; Behavioural_library_clean : @\ - $(MAKE) Common_library_clean; + $(MAKE) Common_library_clean; \ $(MAKE) --directory=$(Behavioural_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/Makefile.deps (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/Makefile.deps (revision 78) @@ -30,9 +30,9 @@ @COMPONENT_library : @\ - $(MAKE) Behavioural_library; + $(MAKE) Behavioural_library; \ $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile; @COMPONENT_library_clean : @\ - $(MAKE) Behavioural_library_clean; + $(MAKE) Behavioural_library_clean; \ $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/main.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/main.cpp (revision 78) @@ -14,4 +14,5 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); + err (_(" * ()\n")); exit (1); @@ -24,13 +25,14 @@ #endif { - if (argc != 2+NB_PARAMS) + if (argc != static_cast(2+NB_PARAMS)) usage (argc, argv); - uint32_t x = 1; + uint32_t x = 1; - const string name = argv[x++]; + string name = argv[x++]; //const uint32_t size_data = atoi(argv[x++]); //const uint32_t nb_port = atoi(argv[x++]); + int _return = EXIT_SUCCESS; try { @@ -46,14 +48,13 @@ catch (morpheo::ErrorMorpheo & error) { - msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); - exit (EXIT_FAILURE); + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; } catch (...) { err (_("<%s> : This test must generate a error.\n"),name.c_str()); - exit (EXIT_FAILURE); + _return = EXIT_FAILURE; } - return (EXIT_SUCCESS); + return (_return); } - Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h (revision 78) @@ -16,6 +16,6 @@ #include "Common/include/ToString.h" #include "Common/include/Debug.h" -#include "Behavioural/include/Types.h" +#include "Behavioural/@DIRECTORY/include/Types.h" #include "Behavioural/@DIRECTORY/include/Parameters.h" #ifdef STATISTICS @@ -53,5 +53,5 @@ #ifdef SYSTEMC // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - // Interface + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_CLOCK * in_CLOCK ; public : SC_IN (Tcontrol_t) * in_NRESET ; @@ -105,5 +105,6 @@ #ifdef STATISTICS - public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); #endif #if defined(STATISTICS) or defined(VHDL_TESTBENCH) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Parameters.h (revision 78) @@ -22,11 +22,11 @@ //-----[ methods ]----------------------------------------------------------- public : Parameters (); - public : Parameters (Parameters & param) ; +// public : Parameters (Parameters & param) ; public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); - public : std::string print (uint32_t depth); - public : friend std::ostream& operator<< (std::ostream& output_stream, + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, morpheo::behavioural::@NAMESPACE_USE::Parameters & x); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Types.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Types.h (revision 78) @@ -0,0 +1,21 @@ +#ifndef morpheo_behavioural_@DEFINE_Types_h +#define morpheo_behavioural_@DEFINE_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +@NAMESPACE_BEGIN + +@NAMESPACE_END +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp (revision 78) @@ -46,5 +46,5 @@ log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); - statistics_declaration(param_statistics); + statistics_allocation(param_statistics); } #endif @@ -87,7 +87,5 @@ if (_usage & USE_STATISTICS) { - log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); - - delete _stat; + statistics_deallocation(); } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp (revision 78) @@ -37,6 +37,6 @@ _interfaces = entity->set_interfaces(); - // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { Interface * interface = _interfaces->set_interface("" #ifdef POSITION @@ -46,8 +46,8 @@ #endif ); - - in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); - in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); - + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_allocation.cpp (revision 78) @@ -0,0 +1,31 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/@DIRECTORY/include/@COMPONENT.h" + +namespace morpheo { +namespace behavioural { +@NAMESPACE_BEGIN + +#undef FUNCTION +#define FUNCTION "@COMPONENT::statistics_allocation" + void @COMPONENT::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "@COMPONENT", + param_statistics); + + log_printf(FUNC,@COMPONENT,FUNCTION,"End"); + }; + +@NAMESPACE_END +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,31 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/@DIRECTORY/include/@COMPONENT.h" + +namespace morpheo { +namespace behavioural { +@NAMESPACE_BEGIN + +#undef FUNCTION +#define FUNCTION "@COMPONENT::statistics_deallocation" + void @COMPONENT::statistics_deallocation (void) + { + log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); + + log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,@COMPONENT,FUNCTION,"End"); + }; + +@NAMESPACE_END +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_declaration.cpp (revision 77) +++ (revision ) @@ -1,31 +1,0 @@ -#ifdef STATISTICS -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/@DIRECTORY/include/@COMPONENT.h" - -namespace morpheo { -namespace behavioural { -@NAMESPACE_BEGIN - -#undef FUNCTION -#define FUNCTION "@COMPONENT::statistics_declaration" - void @COMPONENT::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) - { - log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - - _stat = new Stat (static_cast(_name), - "@COMPONENT", - param_statistics); - - log_printf(FUNC,@COMPONENT,FUNCTION,"End"); - }; - -@NAMESPACE_END -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters.cpp (revision 78) @@ -21,12 +21,12 @@ }; -#undef FUNCTION -#define FUNCTION "@COMPONENT::Parameters (copy)" - Parameters::Parameters (Parameters & param) - { - log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - test(); - log_printf(FUNC,@COMPONENT,FUNCTION,"End"); - }; +// #undef FUNCTION +// #define FUNCTION "@COMPONENT::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,@COMPONENT,FUNCTION,"End"); +// }; #undef FUNCTION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters_msg_error.cpp (revision 78) @@ -16,13 +16,13 @@ #undef FUNCTION #define FUNCTION "@COMPONENT::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test ("@COMPONENT"); log_printf(FUNC,@COMPONENT,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/Makefile.deps (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/Makefile.deps (revision 78) @@ -30,9 +30,9 @@ @COMPONENT_library : @\ - $(MAKE) Behavioural_library; + $(MAKE) Behavioural_library; \ $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile; @COMPONENT_library_clean : @\ - $(MAKE) Behavioural_library_clean; + $(MAKE) Behavioural_library_clean; \ $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/main.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/main.cpp (revision 78) @@ -14,4 +14,5 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); + err (_(" * ()\n")); exit (1); @@ -24,13 +25,14 @@ #endif { - if (argc != 2+NB_PARAMS) + if (argc != static_cast(2+NB_PARAMS)) usage (argc, argv); - uint32_t x = 1; + uint32_t x = 1; - const string name = argv[x++]; + string name = argv[x++]; //const uint32_t size_data = atoi(argv[x++]); //const uint32_t nb_port = atoi(argv[x++]); + int _return = EXIT_SUCCESS; try { @@ -46,14 +48,13 @@ catch (morpheo::ErrorMorpheo & error) { - msg (_("<%s> : %s.\n"),name.c_str(), error.what ()); - exit (EXIT_FAILURE); + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; } catch (...) { err (_("<%s> : This test must generate a error.\n"),name.c_str()); - exit (EXIT_FAILURE); + _return = EXIT_FAILURE; } - return (EXIT_SUCCESS); + return (_return); } - Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h (revision 78) @@ -53,5 +53,5 @@ #ifdef SYSTEMC // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - // Interface + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_CLOCK * in_CLOCK ; public : SC_IN (Tcontrol_t) * in_NRESET ; @@ -104,5 +104,6 @@ #ifdef STATISTICS - public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); #endif #if defined(STATISTICS) or defined(VHDL_TESTBENCH) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/Parameters.h (revision 78) @@ -22,11 +22,11 @@ //-----[ methods ]----------------------------------------------------------- public : Parameters (); - public : Parameters (Parameters & param) ; +// public : Parameters (Parameters & param) ; public : ~Parameters () ; - public : std::string msg_error (void); + public : Parameters_test msg_error (void); - public : std::string print (uint32_t depth); - public : friend std::ostream& operator<< (std::ostream& output_stream, + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, morpheo::behavioural::@NAMESPACE_USE::Parameters & x); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp (revision 78) @@ -46,5 +46,5 @@ log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); - statistics_declaration(param_statistics); + statistics_allocation(param_statistics); } #endif @@ -87,7 +87,5 @@ if (_usage & USE_STATISTICS) { - log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); - - delete _stat; + statistics_deallocation(); } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp (revision 78) @@ -36,7 +36,7 @@ _interfaces = entity->set_interfaces(); - - // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { Interface * interface = _interfaces->set_interface("" #ifdef POSITION @@ -46,9 +46,17 @@ #endif ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + std::string src,dest; - in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); - in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); - // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _component->test_map(); #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_allocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_allocation.cpp (revision 78) @@ -0,0 +1,31 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/@DIRECTORY/include/@COMPONENT.h" + +namespace morpheo { +namespace behavioural { +@NAMESPACE_BEGIN + +#undef FUNCTION +#define FUNCTION "@COMPONENT::statistics_allocation" + void @COMPONENT::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "@COMPONENT", + param_statistics); + + log_printf(FUNC,@COMPONENT,FUNCTION,"End"); + }; + +@NAMESPACE_END +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_deallocation.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_deallocation.cpp (revision 78) @@ -0,0 +1,31 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/@DIRECTORY/include/@COMPONENT.h" + +namespace morpheo { +namespace behavioural { +@NAMESPACE_BEGIN + +#undef FUNCTION +#define FUNCTION "@COMPONENT::statistics_deallocation" + void @COMPONENT::statistics_deallocation (void) + { + log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); + + log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,@COMPONENT,FUNCTION,"End"); + }; + +@NAMESPACE_END +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_declaration.cpp (revision 77) +++ (revision ) @@ -1,31 +1,0 @@ -#ifdef STATISTICS -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/@DIRECTORY/include/@COMPONENT.h" - -namespace morpheo { -namespace behavioural { -@NAMESPACE_BEGIN - -#undef FUNCTION -#define FUNCTION "@COMPONENT::statistics_declaration" - void @COMPONENT::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics) - { - log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - - _stat = new Stat (static_cast(_name), - "@COMPONENT", - param_statistics); - - log_printf(FUNC,@COMPONENT,FUNCTION,"End"); - }; - -@NAMESPACE_END -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters.cpp (revision 78) @@ -21,12 +21,12 @@ }; -#undef FUNCTION -#define FUNCTION "@COMPONENT::Parameters (copy)" - Parameters::Parameters (Parameters & param) - { - log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - test(); - log_printf(FUNC,@COMPONENT,FUNCTION,"End"); - }; +// #undef FUNCTION +// #define FUNCTION "@COMPONENT::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,@COMPONENT,FUNCTION,"End"); +// }; #undef FUNCTION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters_msg_error.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters_msg_error.cpp (revision 78) @@ -16,13 +16,13 @@ #undef FUNCTION #define FUNCTION "@COMPONENT::msg_error" - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - std::string msg = ""; - - return msg; + Parameters_test test ("@COMPONENT"); log_printf(FUNC,@COMPONENT,FUNCTION,"End"); + + return test; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 78) @@ -7,4 +7,9 @@ // -----[ NO ITERATION ]------------------------------------------------- // ---------------------------------------------------------------------- + +#define __ALLOC_SIGNAL(sig, name, type) \ + { \ + sig = new type (name); \ + } #ifdef POSITION @@ -16,27 +21,19 @@ #endif -#define ALLOC_VALACK_IN( sig, name, type) \ +#define ALLOC_VAL_ACK_IN( sig, name, type) \ { \ sig = interface->set_signal_valack_in (name, type); \ } -#define ALLOC_VALACK_OUT( sig, name, type) \ +#define ALLOC_VAL_ACK_OUT( sig, name, type) \ { \ sig = interface->set_signal_valack_out(name, type); \ } -#define ALLOC_VAL_IN( sig) \ - { \ - sig = interface->set_signal_valack_in (VAL); \ +#define ALLOC_VALACK_IN( sig, type) \ + { \ + sig = interface->set_signal_valack_in (type); \ } -#define ALLOC_VAL_OUT( sig) \ - { \ - sig = interface->set_signal_valack_out(VAL); \ - } -#define ALLOC_ACK_IN( sig) \ - { \ - sig = interface->set_signal_valack_in (ACK); \ - } -#define ALLOC_ACK_OUT( sig) \ - { \ - sig = interface->set_signal_valack_out(ACK); \ +#define ALLOC_VALACK_OUT( sig, type) \ + { \ + sig = interface->set_signal_valack_out(type); \ } #define ALLOC_SIGNAL_IN( sig, name, type, size) \ @@ -60,4 +57,30 @@ // -----[ ITERATION 1 ]-------------------------------------------------- // ---------------------------------------------------------------------- + +#define __ALLOC1_INTERFACE(name, it1) \ + const std::string interface_name = name; \ + const uint32_t iterator_1 = it1; + +#define __ALLOC1_SIGNAL_IN( sig, name, type) \ + { \ + sig = new SC_IN(type) * [iterator_1]; \ + std::string separator="_"; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_interface( name+separator+toString(i), direction, localisation, str); \ + std::string separator="_"; \ + for (uint32_t alloc_interface_it1=0; alloc_interface_it1set_interface( name+separator+toString(alloc_interface_it1), direction, localisation, str); \ } \ } @@ -77,59 +100,42 @@ Interface_fifo * interface [iterator_1]; \ { \ - std::string separator="_"; \ - for (uint32_t i=0; iset_interface( name+separator+toString(i)); \ + std::string separator="_"; \ + for (uint32_t alloc_interface_it1=0; alloc_interface_it1set_interface( name+separator+toString(alloc_interface_it1)); \ } \ } #endif - -#define ALLOC1_VALACK_IN( sig, name, type) \ +#define ALLOC1_VAL_ACK_IN( sig, name, type) \ { \ sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_valack_in (name, type); \ - } \ - } -#define ALLOC1_VALACK_OUT(sig, name, type) \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_in (name, type); \ + } \ + } +#define ALLOC1_VAL_ACK_OUT(sig, name, type) \ { \ sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_valack_out(name, type); \ - } \ - } -#define ALLOC1_VAL_IN( sig) \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_out(name, type); \ + } \ + } +#define ALLOC1_VALACK_IN( sig, type) \ { \ sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_valack_in (VAL); \ - } \ - } -#define ALLOC1_VAL_OUT( sig) \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_in (type); \ + } \ + } +#define ALLOC1_VALACK_OUT( sig, type) \ { \ sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_valack_out(VAL); \ - } \ - } -#define ALLOC1_ACK_IN( sig) \ - { \ - sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_valack_in (ACK); \ - } \ - } -#define ALLOC1_ACK_OUT( sig) \ - { \ - sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_valack_out(ACK); \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_out(type); \ } \ } @@ -138,7 +144,7 @@ { \ sig = new SC_IN (type) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_in (name, size); \ + sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_in (name, size); \ } \ } @@ -148,7 +154,7 @@ { \ sig = new SC_OUT(type) * [iterator_1]; \ - for (uint32_t i=0; iset_signal_out (name, size); \ + sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_out (name, size); \ } \ } @@ -159,16 +165,169 @@ std::string separator="_"; \ std::string str; \ - for (uint32_t i=0; i (str.c_str()); \ - } \ - } - -#define INSTANCE1_SC_SIGNAL(component, sig, it1) \ - for (uint32_t i=0; isig[i])) (*(sig[i])); \ - } - + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 (str.c_str()); \ + } \ + } + +#define INSTANCE1_SC_SIGNAL(component, sig, it1) \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1sig[alloc_signal_it1])) (*(sig[alloc_signal_it1])); \ + } + +// ---------------------------------------------------------------------- +// -----[ ITERATION 2 ]-------------------------------------------------- +// ---------------------------------------------------------------------- + +#ifdef POSITION +#define ALLOC2_INTERFACE( name, direction, localisation, str, it1, it2) \ + uint32_t iterator_1 = 0; \ + uint32_t iterator_2 = 0; \ + Interface_fifo *** interface; \ + { \ + std::string separator="_"; \ + iterator_1 = it1; \ + interface = new Interface_fifo ** [iterator_1]; \ + for (uint32_t alloc_interface_it1=0; alloc_interface_it1set_interface( name+separator+toString(alloc_interface_it1)+separator+toString(alloc_interface_it2), direction, localisation, str); \ + } \ + } \ + } +#else +#define ALLOC2_INTERFACE( name, direction, localisation, str, it1, it2) \ + uint32_t iterator_1 = 0; \ + uint32_t iterator_2 = 0; \ + Interface_fifo *** interface; \ + { \ + std::string separator="_"; \ + iterator_1 = it1; \ + interface = new Interface_fifo ** [iterator_1]; \ + for (uint32_t alloc_interface_it1=0; alloc_interface_it1set_interface( name+separator+toString(alloc_interface_it1)+separator+toString(alloc_interface_it2)); \ + } \ + } \ + } #endif + +#define _ALLOC2_VAL_ACK_IN( sig, name, type, it1, it2) \ + { \ + sig = new SC_IN (Tcontrol_t) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_in (name, type); \ + } \ + } \ + } + +#define _ALLOC2_VAL_ACK_OUT( sig, name, type, it1, it2) \ + { \ + sig = new SC_OUT (Tcontrol_t) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_out (name, type); \ + } \ + } \ + } + +#define _ALLOC2_VALACK_IN( sig,type, it1, it2) \ + { \ + sig = new SC_IN (Tcontrol_t) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_in (type); \ + } \ + } \ + } + +#define _ALLOC2_VALACK_OUT( sig,type, it1, it2) \ + { \ + sig = new SC_OUT (Tcontrol_t) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_valack_out (type); \ + } \ + } \ + } + +#define _ALLOC2_SIGNAL_IN( sig, name, type, size, it1, it2) \ + if (size > 0) \ + { \ + sig = new SC_IN (type) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_in (name, size); \ + } \ + } \ + } + +#define _ALLOC2_SIGNAL_OUT( sig, name, type, size, it1, it2) \ + if (size > 0) \ + { \ + sig = new SC_OUT (type) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_out (name, size); \ + } \ + } \ + } + +#define ALLOC2_VAL_ACK_IN( sig, name, type ) _ALLOC2_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2) +#define ALLOC2_VAL_ACK_OUT(sig, name, type ) _ALLOC2_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2) +#define ALLOC2_VALACK_IN( sig, type ) _ALLOC2_VALACK_IN( sig, type , iterator_1, iterator_2) +#define ALLOC2_VALACK_OUT( sig, type ) _ALLOC2_VALACK_OUT( sig, type , iterator_1, iterator_2) +#define ALLOC2_SIGNAL_IN( sig, name, type, size) _ALLOC2_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2) +#define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2) + +#define ALLOC2_SC_SIGNAL( sig, name, type, it1, it2) \ + sc_signal *** sig = new sc_signal ** [it1]; \ + { \ + std::string separator="_"; \ + std::string str; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 * [it2]; \ + for (uint32_t alloc_signal_it2=0; alloc_signal_it2 (str.c_str()); \ + } \ + } \ + } + +#define INSTANCE2_SC_SIGNAL(component, sig, it1, it2) \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1sig[alloc_signal_it1][alloc_signal_it2])) (*(sig[alloc_signal_it1][alloc_signal_it2])); \ + } +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h (revision 78) @@ -25,4 +25,36 @@ namespace behavioural { +#ifdef DEBUG +# define PORT_MAP(x,a,b,c,d) \ + do \ + { \ + try \ + { \ + x->port_map(a,b,c,d); \ + } \ + catch (morpheo::ErrorMorpheo & error) \ + { \ + throw (ErrorMorpheo ("In file "+toString(__FILE__)+", at line "+toString(__LINE__)+"\n"+error.what ())); \ + } \ + } \ + while (0) +#else +# define PORT_MAP(x,a,b,c,d) \ + do \ + { \ + x->port_map(a,b,c,d); \ + } \ + while (0) +#endif + +#define COMPONENT_MAP(x,a,b,c,d) \ + do \ + { \ + PORT_MAP(x,a,b,c,d); \ + PORT_MAP(x,c,d,a,b); \ + } \ + while (0) + + typedef uint8_t Tinstance_t; @@ -35,6 +67,7 @@ typedef struct { - public : Tinstance_t _instance; - public : Entity * _entity ; +//public : Component * _component; + public : Entity * _entity ; + public : Tinstance_t _instance ; } Tcomponent_t; @@ -42,6 +75,6 @@ { // -----[ fields ]---------------------------------------------------- - private : const Tusage_t _usage; - private : Entity * _entity ; + private : const Tusage_t _usage; + private : Entity * _entity ; private : std::list * _list_component; @@ -57,5 +90,5 @@ #endif ); - private : std::string get_entity (void); + private : std::string get_entity (void); public : void set_component (Component * component @@ -69,5 +102,5 @@ ); - private : std::string get_component (void); + private : std::string get_component (void); private : Entity * find_entity (std::string name); @@ -87,8 +120,7 @@ std::string component_dest, std::string port_dest ); - public : void port_map (std::string component_src , - std::string port_src ); - public : bool test_map (void); + public : bool test_map (bool recursive=true); + private : bool test_map (uint32_t depth, bool recursive); #ifdef POSITION @@ -102,6 +134,6 @@ public : void generate_file (void); #endif - public : friend std::ostream& operator<< (std::ostream& output_stream, - morpheo::behavioural::Component & x); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::Component & x); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 78) @@ -161,13 +161,22 @@ # define OPERATION_FIND_L_FL1 0x2 // 000_0000 l.fl1 -# define OPERATION_SPECIAL_L_MFSPR 0x1 // 000_0000 l.mfspr -# define OPERATION_SPECIAL_L_MTSPR 0x2 // 000_0000 l.mtspr -# define OPERATION_SPECIAL_L_MAC 0x4 // 000_0000 l.mac , l.maci -# define OPERATION_SPECIAL_L_MACRC 0x8 // 000_0000 l.macrc -# define OPERATION_SPECIAL_L_MSB 0x10 // 000_0000 l.msb - -# define OPERATION_BRANCH_L_TEST_NF 0x1 // 000_0000 l.bnf -# define OPERATION_BRANCH_L_TEST_F 0x2 // 000_0000 l.bf -# define OPERATION_BRANCH_L_JALR 0x4 // 000_0000 l.jal , l.jalr , l.jr +# define OPERATION_SPECIAL_L_NOP 0xff // 000_0000 l.nop +# define OPERATION_SPECIAL_L_MFSPR 0x1 // 000_0001 l.mfspr +# define OPERATION_SPECIAL_L_MTSPR 0x2 // 000_0010 l.mtspr +# define OPERATION_SPECIAL_L_RFE 0x4 // 000_0100 l.rfe +# define OPERATION_SPECIAL_L_MAC 0x11 // 001_0001 l.mac , l.maci +# define OPERATION_SPECIAL_L_MACRC 0x12 // 001_0010 l.macrc +# define OPERATION_SPECIAL_L_MSB 0x14 // 001_0100 l.msb +# define OPERATION_SPECIAL_L_MSYNC 0x21 // 010_0001 l.msync +# define OPERATION_SPECIAL_L_PSYNC 0x22 // 010_0010 l.psync +# define OPERATION_SPECIAL_L_CSYNC 0x24 // 010_0100 l.csync +# define OPERATION_SPECIAL_L_SYS 0x41 // 100_0001 l.sys +# define OPERATION_SPECIAL_L_TRAP 0x42 // 100_0010 l.trap + + +# define OPERATION_BRANCH_NONE 0x1 // 000_0000 l.j +# define OPERATION_BRANCH_L_TEST_NF 0x2 // 000_0000 l.bnf +# define OPERATION_BRANCH_L_TEST_F 0x4 // 000_0000 l.bf +# define OPERATION_BRANCH_L_JALR 0x8 // 000_0000 l.jal , l.jalr , l.jr //-------------------------------------------------------[ Custom ]----- @@ -195,4 +204,10 @@ # define SIZE_EXCEPTION 5 +# define SIZE_EXCEPTION_USE 4 +# define SIZE_EXCEPTION_MEMORY 3 +# define SIZE_EXCEPTION_CUSTOM 3 +# define SIZE_EXCEPTION_ALU 2 +# define SIZE_EXCEPTION_DECOD 2 +# define SIZE_EXCEPTION_IFETCH 2 # define EXCEPTION_NONE 0x00 // none exception @@ -229,4 +244,5 @@ # define EXCEPTION_CUSTOM_6 0x1f // Reserved for custom exceptions + #define exception_to_address(x) (x<<8) @@ -253,4 +269,50 @@ # define EXCEPTION_ALU_SPR_ACCESS_INVALID 0x2 // SPR present in ALU but not compatible privilege # define EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE 0x3 // SPR not present in ALU + +# define EXCEPTION_DECOD_NONE 0x0 // none exception +# define EXCEPTION_DECOD_ILLEGAL_INSTRUCTION 0x1 // Instruction is illegal (no implemented) +# define EXCEPTION_DECOD_SYSCALL 0x2 // System Call +//#define EXCEPTION_DECOD_TRAP 0x4 // L.trap or debug unit (note : must read SR !) + +# define EXCEPTION_IFETCH_NONE 0x0 // Fetch Unit generate none exception +# define EXCEPTION_IFETCH_INSTRUCTION_TLB 0x1 // ITLB miss +# define EXCEPTION_IFETCH_INSTRUCTION_PAGE 0x2 // No matching or page violation protection in pages tables +# define EXCEPTION_IFETCH_BUS_ERROR 0x3 // Access at a invalid physical address + +# define EXCEPTION_USE_NONE 0x0 // +# define EXCEPTION_USE_ILLEGAL_INSTRUCTION 0x1 // illegal_instruction +# define EXCEPTION_USE_RANGE 0x2 // range +# define EXCEPTION_USE_MEMORY_WITH_ALIGNMENT 0x3 // TLB miss, page fault, bus error, alignment +# define EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT 0x4 // TLB miss, page fault, bus error +# define EXCEPTION_USE_SYSCALL 0x5 // syscall +# define EXCEPTION_USE_TRAP 0x6 // trap +# define EXCEPTION_USE_CUSTOM_0 0x7 // +# define EXCEPTION_USE_CUSTOM_1 0x8 // +# define EXCEPTION_USE_CUSTOM_2 0x9 // +# define EXCEPTION_USE_CUSTOM_3 0xa // +# define EXCEPTION_USE_CUSTOM_4 0xb // +# define EXCEPTION_USE_CUSTOM_5 0xc // +# define EXCEPTION_USE_CUSTOM_6 0xd // + + //=======================================================[ icache ]===== + + //--------------------------------------------------[ icache_type ]----- + +# define SIZE_ICACHE_TYPE 2 + +# define ICACHE_TYPE_LOAD 0x0 // 0000 +# define ICACHE_TYPE_LOCK 0x1 // 0001 +# define ICACHE_TYPE_INVALIDATE 0x2 // 0010 +# define ICACHE_TYPE_PREFETCH 0x3 // 0011 + +// just take the 2 less significative bits. +#define operation_to_icache_type(x) (x&0x3) + + //-------------------------------------------------[ icache_error ]----- + +# define SIZE_ICACHE_ERROR 1 + +# define ICACHE_ERROR_NONE 0x0 +# define ICACHE_ERROR_BUS_ERROR 0x1 //=======================================================[ dcache ]===== @@ -377,4 +439,11 @@ # define SPR_MACHI 2 // MAC High +# define NB_SPR_LOGIC 2 +# define LOG2_NB_SPR_LOGIC 1 + // SPR_LOGIC[0] = F + // SPR_LOGIC[1] = Carry, Overflow +# define SPR_LOGIC_SR_F 0x0 // Status register bit F (size = 1) +# define SPR_LOGIC_SR_CY_OV 0x1 // Status register bit overflow and carry (size = 2) + //----------------------------------------------[ spr_mode_access ]----- @@ -385,44 +454,415 @@ # define SPR_ACCESS_MODE_READ_ONLY_COND 0x5 // 101 special read + //--------------------------------------------------------[ event ]----- +# define SIZE_EVENT_STATE 2 + +# define EVENT_STATE_NO_EVENT 0 // no event : current case +# define EVENT_STATE_EVENT 1 // Have a event : make necessary to manage the event +# define EVENT_STATE_WAITEND 2 // Wait end of manage event (restaure a good context) +# define EVENT_STATE_END 3 // CPU can continue + +# define SIZE_EVENT_TYPE 3 + +# define EVENT_TYPE_NONE 0 // no event +# define EVENT_TYPE_MISS_SPECULATION 1 // miss of speculation (load or branch miss speculation) +# define EVENT_TYPE_EXCEPTION 2 // exception or interruption occure +# define EVENT_TYPE_BRANCH_NO_ACCURATE 3 // branch is no accurate (old speculation is a miss) +# define EVENT_TYPE_SPR_ACCESS 4 // decod a mtspr or mfspr instruction +# define EVENT_TYPE_MSYNC 5 // decod a memory synchronization +# define EVENT_TYPE_PSYNC 6 // decod a pipeline synchronization +# define EVENT_TYPE_CSYNC 7 // decod a context synchronization + + //-------------------------------------------------[ branch_state ]----- +# define SIZE_BRANCH_STATE 2 + +# define BRANCH_STATE_NONE 0x0 // 0 0 +# define BRANCH_STATE_NSPEC_TAKE 0x1 // 0 1 -> incondionnal +# define BRANCH_STATE_SPEC_NTAKE 0x2 // 1 0 +# define BRANCH_STATE_SPEC_TAKE 0x3 // 1 1 + + //---------------------------------------------[ branch_condition ]----- + +# define SIZE_BRANCH_CONDITION 4 + +# define BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK 0x0 // None condition (jump) +# define BRANCH_CONDITION_NONE_WITH_WRITE_STACK 0x8 // None condition (jump) +# define BRANCH_CONDITION_FLAG_UNSET 0x2 // Branch if Flag is clear +# define BRANCH_CONDITION_FLAG_SET 0x3 // Branch if Flag is set +# define BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK 0x4 // Branch if a register is read +# define BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK 0xc // Branch if a register is read +# define BRANCH_CONDITION_READ_STACK 0xf // Branch with pop in stack pointer + + //--------------------------------------------------[ instruction ]----- +# define NB_INSTRUCTION 213 // 92 ORBIS, 30 ORFPX (15 simple, 15 double), 91 ORVDX (38 on byte, 41 on half, 12 independant format) + + enum + { + // ORBIS + INSTRUCTION_L_ADD, + INSTRUCTION_L_ADDC, + INSTRUCTION_L_ADDI, + INSTRUCTION_L_ADDIC, + INSTRUCTION_L_AND, + INSTRUCTION_L_ANDI, + INSTRUCTION_L_BF, + INSTRUCTION_L_BNF, + INSTRUCTION_L_CMOV, + INSTRUCTION_L_CSYNC, + INSTRUCTION_L_CUST1, + INSTRUCTION_L_CUST2, + INSTRUCTION_L_CUST3, + INSTRUCTION_L_CUST4, + INSTRUCTION_L_CUST5, + INSTRUCTION_L_CUST6, + INSTRUCTION_L_CUST7, + INSTRUCTION_L_CUST8, + INSTRUCTION_L_DIV, + INSTRUCTION_L_DIVU, + INSTRUCTION_L_EXTBS, + INSTRUCTION_L_EXTBZ, + INSTRUCTION_L_EXTHS, + INSTRUCTION_L_EXTHZ, + INSTRUCTION_L_EXTWS, + INSTRUCTION_L_EXTWZ, + INSTRUCTION_L_FF1, + INSTRUCTION_L_FL1, + INSTRUCTION_L_J, + INSTRUCTION_L_JAL, + INSTRUCTION_L_JALR, + INSTRUCTION_L_JR, + INSTRUCTION_L_LBS, + INSTRUCTION_L_LBZ, + INSTRUCTION_L_LD, + INSTRUCTION_L_LHS, + INSTRUCTION_L_LHZ, + INSTRUCTION_L_LWS, + INSTRUCTION_L_LWZ, + INSTRUCTION_L_MAC, + INSTRUCTION_L_MACI, + INSTRUCTION_L_MACRC, + INSTRUCTION_L_MFSPR, + INSTRUCTION_L_MOVHI, + INSTRUCTION_L_MSB, + INSTRUCTION_L_MSYNC, + INSTRUCTION_L_MTSPR, + INSTRUCTION_L_MUL, + INSTRUCTION_L_MULI, + INSTRUCTION_L_MULU, + INSTRUCTION_L_NOP, + INSTRUCTION_L_OR, + INSTRUCTION_L_ORI, + INSTRUCTION_L_PSYNC, + INSTRUCTION_L_RFE, + INSTRUCTION_L_ROR, + INSTRUCTION_L_RORI, + INSTRUCTION_L_SB, + INSTRUCTION_L_SD, + INSTRUCTION_L_SFEQ, + INSTRUCTION_L_SFEQI, + INSTRUCTION_L_SFGES, + INSTRUCTION_L_SFGESI, + INSTRUCTION_L_SFGEU, + INSTRUCTION_L_SFGEUI, + INSTRUCTION_L_SFGTS, + INSTRUCTION_L_SFGTSI, + INSTRUCTION_L_SFGTU, + INSTRUCTION_L_SFGTUI, + INSTRUCTION_L_SFLES, + INSTRUCTION_L_SFLESI, + INSTRUCTION_L_SFLEU, + INSTRUCTION_L_SFLEUI, + INSTRUCTION_L_SFLTS, + INSTRUCTION_L_SFLTSI, + INSTRUCTION_L_SFLTU, + INSTRUCTION_L_SFLTUI, + INSTRUCTION_L_SFNE, + INSTRUCTION_L_SFNEI, + INSTRUCTION_L_SH, + INSTRUCTION_L_SLL, + INSTRUCTION_L_SLLI, + INSTRUCTION_L_SRA, + INSTRUCTION_L_SRAI, + INSTRUCTION_L_SRL, + INSTRUCTION_L_SRLI, + INSTRUCTION_L_SUB, + INSTRUCTION_L_SW, + INSTRUCTION_L_SYS, + INSTRUCTION_L_TRAP, + INSTRUCTION_L_XOR, + INSTRUCTION_L_XORI, + // ORFPX + INSTRUCTION_LF_ADD_D, + INSTRUCTION_LF_ADD_S, + INSTRUCTION_LF_CUST1_D, + INSTRUCTION_LF_CUST1_S, + INSTRUCTION_LF_DIV_D, + INSTRUCTION_LF_DIV_S, + INSTRUCTION_LF_FTOI_D, + INSTRUCTION_LF_FTOI_S, + INSTRUCTION_LF_ITOF_D, + INSTRUCTION_LF_ITOF_S, + INSTRUCTION_LF_MADD_D, + INSTRUCTION_LF_MADD_S, + INSTRUCTION_LF_MUL_D, + INSTRUCTION_LF_MUL_S, + INSTRUCTION_LF_REM_D, + INSTRUCTION_LF_REM_S, + INSTRUCTION_LF_SFEQ_D, + INSTRUCTION_LF_SFEQ_S, + INSTRUCTION_LF_SFGE_D, + INSTRUCTION_LF_SFGE_S, + INSTRUCTION_LF_SFGT_D, + INSTRUCTION_LF_SFGT_S, + INSTRUCTION_LF_SFLE_D, + INSTRUCTION_LF_SFLE_S, + INSTRUCTION_LF_SFLT_D, + INSTRUCTION_LF_SFLT_S, + INSTRUCTION_LF_SFNE_D, + INSTRUCTION_LF_SFNE_S, + INSTRUCTION_LF_SUB_D, + INSTRUCTION_LF_SUB_S, + // ORVDX + INSTRUCTION_LV_ADD_B, + INSTRUCTION_LV_ADD_H, + INSTRUCTION_LV_ADDS_B, + INSTRUCTION_LV_ADDS_H, + INSTRUCTION_LV_ADDU_B, + INSTRUCTION_LV_ADDU_H, + INSTRUCTION_LV_ADDUS_B, + INSTRUCTION_LV_ADDUS_H, + INSTRUCTION_LV_ALL_EQ_B, + INSTRUCTION_LV_ALL_EQ_H, + INSTRUCTION_LV_ALL_GE_B, + INSTRUCTION_LV_ALL_GE_H, + INSTRUCTION_LV_ALL_GT_B, + INSTRUCTION_LV_ALL_GT_H, + INSTRUCTION_LV_ALL_LE_B, + INSTRUCTION_LV_ALL_LE_H, + INSTRUCTION_LV_ALL_LT_B, + INSTRUCTION_LV_ALL_LT_H, + INSTRUCTION_LV_ALL_NE_B, + INSTRUCTION_LV_ALL_NE_H, + INSTRUCTION_LV_AND, + INSTRUCTION_LV_ANY_EQ_B, + INSTRUCTION_LV_ANY_EQ_H, + INSTRUCTION_LV_ANY_GE_B, + INSTRUCTION_LV_ANY_GE_H, + INSTRUCTION_LV_ANY_GT_B, + INSTRUCTION_LV_ANY_GT_H, + INSTRUCTION_LV_ANY_LE_B, + INSTRUCTION_LV_ANY_LE_H, + INSTRUCTION_LV_ANY_LT_B, + INSTRUCTION_LV_ANY_LT_H, + INSTRUCTION_LV_ANY_NE_B, + INSTRUCTION_LV_ANY_NE_H, + INSTRUCTION_LV_AVG_B, + INSTRUCTION_LV_AVG_H, + INSTRUCTION_LV_CMP_EQ_B, + INSTRUCTION_LV_CMP_EQ_H, + INSTRUCTION_LV_CMP_GE_B, + INSTRUCTION_LV_CMP_GE_H, + INSTRUCTION_LV_CMP_GT_B, + INSTRUCTION_LV_CMP_GT_H, + INSTRUCTION_LV_CMP_LE_B, + INSTRUCTION_LV_CMP_LE_H, + INSTRUCTION_LV_CMP_LT_B, + INSTRUCTION_LV_CMP_LT_H, + INSTRUCTION_LV_CMP_NE_B, + INSTRUCTION_LV_CMP_NE_H, + INSTRUCTION_LV_CUST1, + INSTRUCTION_LV_CUST2, + INSTRUCTION_LV_CUST3, + INSTRUCTION_LV_CUST4, + INSTRUCTION_LV_MADDS_H, + INSTRUCTION_LV_MAX_B, + INSTRUCTION_LV_MAX_H, + INSTRUCTION_LV_MERGE_B, + INSTRUCTION_LV_MERGE_H, + INSTRUCTION_LV_MIN_B, + INSTRUCTION_LV_MIN_H, + INSTRUCTION_LV_MSUBS_H, + INSTRUCTION_LV_MULS_H, + INSTRUCTION_LV_NAND, + INSTRUCTION_LV_NOR, + INSTRUCTION_LV_OR, + INSTRUCTION_LV_PACK_B, + INSTRUCTION_LV_PACK_H, + INSTRUCTION_LV_PACKS_B, + INSTRUCTION_LV_PACKS_H, + INSTRUCTION_LV_PACKUS_B, + INSTRUCTION_LV_PACKUS_H, + INSTRUCTION_LV_PERM_N, + INSTRUCTION_LV_RL_B, + INSTRUCTION_LV_RL_H, + INSTRUCTION_LV_SLL, + INSTRUCTION_LV_SLL_B, + INSTRUCTION_LV_SLL_H, + INSTRUCTION_LV_SRA_B, + INSTRUCTION_LV_SRA_H, + INSTRUCTION_LV_SRL, + INSTRUCTION_LV_SRL_B, + INSTRUCTION_LV_SRL_H, + INSTRUCTION_LV_SUB_B, + INSTRUCTION_LV_SUB_H, + INSTRUCTION_LV_SUBS_B, + INSTRUCTION_LV_SUBS_H, + INSTRUCTION_LV_SUBU_B, + INSTRUCTION_LV_SUBU_H, + INSTRUCTION_LV_SUBUS_B, + INSTRUCTION_LV_SUBUS_H, + INSTRUCTION_LV_UNPACK_B, + INSTRUCTION_LV_UNPACK_H, + INSTRUCTION_LV_XOR + }; + + //-----------------------------------------------[ Code Operation ]----- + +# define MAX_OPCOD_0 64 // Instructions with immediat +# define MAX_OPCOD_1 64 // Instruction ORFPX32/64 +# define MAX_OPCOD_2 256 // Instruction ORVDX64 +# define MAX_OPCOD_3 256 // Instructions Register-Register +# define MAX_OPCOD_4 32 // Instructions "set flag" with register +# define MAX_OPCOD_5 32 // Instructions "set flag" with immediat +# define MAX_OPCOD_6 4 // Instruction Shift/Rotate with immediat +# define MAX_OPCOD_7 16 // Instructions multiply with HI-LO +# define MAX_OPCOD_8 2 // Instructions acces at HI-LO +# define MAX_OPCOD_9 8 // Instructions special +# define MAX_OPCOD_10 4 // Instructions no operation +# define MAX_OPCOD_11 4 // Instruction Shift/Rotate with register +# define MAX_OPCOD_12 4 // Instructions extend +# define MAX_OPCOD_13 4 // Instructions extend (64b) + +// OPCOD_0 - [31:26] Instructions with immediat +# define OPCOD_L_J 0x00 // 000_000 +# define OPCOD_L_JAL 0x01 // 000_001 +# define OPCOD_L_BNF 0x03 // 000_011 +# define OPCOD_L_BF 0x04 // 000_100 +# define OPCOD_L_RFE 0x09 // 001_001 +# define OPCOD_L_JR 0x11 // 010_001 +# define OPCOD_L_JALR 0x12 // 010_010 +# define OPCOD_L_MACI 0x13 // 010_011 +# define OPCOD_L_CUST1 0x1c // 011_100 +# define OPCOD_L_CUST2 0x1d // 011_101 +# define OPCOD_L_CUST3 0x1e // 011_110 +# define OPCOD_L_CUST4 0x1f // 011_111 +# define OPCOD_L_CUST5 0x3c // 111_100 +# define OPCOD_L_CUST6 0x3d // 111_101 +# define OPCOD_L_CUST7 0x3e // 111_110 +# define OPCOD_L_CUST8 0x3f // 111_111 +# define OPCOD_L_LD 0x20 // 100_000 +# define OPCOD_L_LWZ 0x21 // 100_001 +# define OPCOD_L_LWS 0x22 // 100_010 +# define OPCOD_L_LBZ 0x23 // 100_011 +# define OPCOD_L_LBS 0x24 // 100_100 +# define OPCOD_L_LHZ 0x25 // 100_101 +# define OPCOD_L_LHS 0x26 // 100_110 +# define OPCOD_L_ADDI 0x27 // 100_111 +# define OPCOD_L_ADDIC 0x28 // 101_000 +# define OPCOD_L_ANDI 0x29 // 101_001 +# define OPCOD_L_ORI 0x2a // 101_010 +# define OPCOD_L_XORI 0x2b // 101_011 +# define OPCOD_L_MULI 0x2c // 101_100 +# define OPCOD_L_MFSPR 0x2d // 101_101 +# define OPCOD_L_MTSPR 0x30 // 110_000 +# define OPCOD_L_SD 0x34 // 110_100 +# define OPCOD_L_SW 0x35 // 110_101 +# define OPCOD_L_SB 0x36 // 110_110 +# define OPCOD_L_SH 0x37 // 110_111 + +# define OPCOD_1 0x33 // 110_011 // Instruction ORFPX32/64 +# define OPCOD_2 0x0a // 001_010 // Instruction ORVDX64 +# define OPCOD_3 0x38 // 111_000 // Instructions Register-Register +# define OPCOD_4 0x39 // 111_001 // Instructions "set flag" with register +# define OPCOD_5 0x2f // 101_111 // Instructions "set flag" with immediat +# define OPCOD_6 0x2e // 101_110 // Instruction Shift/Rotate with immediat +# define OPCOD_7 0x31 // 110_001 // Instructions multiply with HI-LO +# define OPCOD_8 0x06 // 000_110 // Instructions acces at HI-LO +# define OPCOD_9 0x08 // 001_000 // Instructions special +# define OPCOD_10 0x05 // 000_101 // Instructions no operation + +// OPCOD_3 instructions - [9:8] [3:0] Instructions Register-Register +# define OPCOD_L_ADD 0x00 // 00_0000 +# define OPCOD_L_ADDC 0x01 // 00_0001 +# define OPCOD_L_SUB 0x02 // 00_0010 +# define OPCOD_L_AND 0x03 // 00_0011 +# define OPCOD_L_OR 0x04 // 00_0100 +# define OPCOD_L_XOR 0x05 // 00_0101 +# define OPCOD_L_CMOV 0x0e // 00_1110 +# define OPCOD_L_FF1 0x0f // 00_1111 +# define OPCOD_L_FL1 0x1f // 01_1111 +# define OPCOD_L_MUL 0x36 // 11_0110 +# define OPCOD_L_DIV 0x39 // 11_1001 +# define OPCOD_L_DIVU 0x3a // 11_1010 +# define OPCOD_L_MULU 0x3b // 11_1011 + +# define OPCOD_11 0x8 // 1000 // Instruction Shift/Rotate with register +# define OPCOD_12 0xc // 1100 // Instructions extend +# define OPCOD_13 0xd // 1101 // Instructions extend (64b) + +// OPCOD_4 instructions - [25:21] Instructions "set flag" with register +# define OPCOD_L_SFEQ 0x00 // 00000 +# define OPCOD_L_SFNE 0x01 // 00001 +# define OPCOD_L_SFGTU 0x02 // 00010 +# define OPCOD_L_SFGEU 0x03 // 00011 +# define OPCOD_L_SFLTU 0x04 // 00100 +# define OPCOD_L_SFLEU 0x05 // 00101 +# define OPCOD_L_SFGTS 0x0a // 01010 +# define OPCOD_L_SFGES 0x0b // 01011 +# define OPCOD_L_SFLTS 0x0c // 01100 +# define OPCOD_L_SFLES 0x0d // 01101 + +// OPCOD_5 instructions - [25:21] Instructions "set flag" with immediat +# define OPCOD_L_SFEQI 0x00 // 00000 +# define OPCOD_L_SFNEI 0x01 // 00001 +# define OPCOD_L_SFGTUI 0x02 // 00010 +# define OPCOD_L_SFGEUI 0x03 // 00011 +# define OPCOD_L_SFLTUI 0x04 // 00100 +# define OPCOD_L_SFLEUI 0x05 // 00101 +# define OPCOD_L_SFGTSI 0x0a // 01010 +# define OPCOD_L_SFGESI 0x0b // 01011 +# define OPCOD_L_SFLTSI 0x0c // 01100 +# define OPCOD_L_SFLESI 0x0d // 01101 + +// OPCOD_6 instructions - [7:6] Instruction Shift/Rotate with immediat +# define OPCOD_L_SLLI 0x0 // 00 +# define OPCOD_L_SRLI 0x1 // 01 +# define OPCOD_L_SRAI 0x2 // 10 +# define OPCOD_L_RORI 0x3 // 11 + +// OPCOD_7 instructions - [3:0] Instructions multiply with HI-LO +# define OPCOD_L_MAC 0x1 // 0001 +# define OPCOD_L_MSB 0x2 // 0010 + +// OPCOD_8 instructions - [17] Instructions acces at HI-LO +# define OPCOD_L_MOVHI 0x0 // 0 +# define OPCOD_L_MACRC 0x1 // 1 + +// OPCOD_9 instructions - [25:23] Instruction special +# define OPCOD_L_SYS 0x0 // 000 +# define OPCOD_L_TRAP 0x2 // 010 +# define OPCOD_L_MSYNC 0x4 // 100 +# define OPCOD_L_PSYNC 0x5 // 101 +# define OPCOD_L_CSYNC 0x6 // 110 + +// OPCOD_10 instructions - [25:24] Instruction no operation +# define OPCOD_L_NOP 0x1 // 01 + +// OPCOD_11 instructions - [7:6] Instruction Shift/Rotate with register +# define OPCOD_L_SLL 0x0 // 00 +# define OPCOD_L_SRL 0x1 // 01 +# define OPCOD_L_SRA 0x2 // 10 +# define OPCOD_L_ROR 0x3 // 11 + +// OPCOD_12 instructions - [9:6] Instructions extend +# define OPCOD_L_EXTHS 0x0 // 0000 +# define OPCOD_L_EXTHZ 0x2 // 0010 +# define OPCOD_L_EXTBS 0x1 // 0001 +# define OPCOD_L_EXTBZ 0x3 // 0011 + +// OPCOD_13 instructions - [9:6] Instructions extend (64b) +# define OPCOD_L_EXTWS 0x0 // 0000 +# define OPCOD_L_EXTWZ 0x1 // 0001 + /* -#define _size_instruction 32 -#define _size_instruction_log2 5 - - //----------------------------------------------------[ Operation ]----- -// #define _nb_operation 32 -// #define _size_operation 5 - -#define _operation_none 0x0 -#define _operation_l_adds 0x1 -#define _operation_l_addu 0x2 -#define _operation_l_subs 0x3 -#define _operation_l_and 0x4 -#define _operation_l_or 0x5 -#define _operation_l_xor 0x6 -#define _operation_l_cmove 0x7 -#define _operation_l_read_imm 0x8 -#define _operation_l_movhi 0x9 -#define _operation_l_muls 0xa -#define _operation_l_mulu 0xb -#define _operation_l_divs 0xc -#define _operation_l_divu 0xd -#define _operation_l_exts 0xe -#define _operation_l_extz 0xf -#define _operation_l_ff1 0x10 -#define _operation_l_fl1 0x11 -#define _operation_l_sll 0x12 -#define _operation_l_sla 0x13 -#define _operation_l_srl 0x14 -#define _operation_l_ror 0x15 -#define _operation_l_cmp_eq 0x16 -#define _operation_l_cmp_ne 0x17 -#define _operation_l_cmp_ges 0x18 -#define _operation_l_cmp_geu 0x19 -#define _operation_l_cmp_gts 0x1a -#define _operation_l_cmp_gtu 0x1b -#define _operation_l_cmp_les 0x1c -#define _operation_l_cmp_leu 0x1d -#define _operation_l_cmp_lts 0x1e -#define _operation_l_cmp_ltu 0x1f //--------------------------------------------------[ destination ]----- @@ -466,9 +906,4 @@ #define mask_CONDITION_STACK 0x8 // Branch with pop in stack pointer - //-------------------------------------------------[ branch_state ]----- -#define cst_BRANCH_STATE_NONE 0x0 // 0 0 -#define cst_BRANCH_STATE_NSPEC_TAKE 0x1 // 0 1 -> incondionnal -#define cst_BRANCH_STATE_SPEC_NTAKE 0x2 // 1 0 -#define cst_BRANCH_STATE_SPEC_TAKE 0x3 // 1 1 */ @@ -620,213 +1055,4 @@ /* -//---------------------------------------------------- -// Code Operation (before decode) -//---------------------------------------------------- - -// Codop - [31:26] Instructions with immediat -#define OPCOD_L_J 0x00 // 000_000 -#define OPCOD_L_JAL 0x01 // 000_001 -#define OPCOD_L_BNF 0x03 // 000_011 -#define OPCOD_L_BF 0x04 // 000_100 -#define OPCOD_L_RFE 0x09 // 001_001 -#define OPCOD_L_JR 0x11 // 010_001 -#define OPCOD_L_JALR 0x12 // 010_010 -#define OPCOD_L_MACI 0x13 // 010_011 -#define OPCOD_L_CUST1 0x1c // 011_100 -#define OPCOD_L_CUST2 0x1d // 011_101 -#define OPCOD_L_CUST3 0x1e // 011_110 -#define OPCOD_L_CUST4 0x1f // 011_111 -#define OPCOD_L_CUST5 0x3c // 111_100 -#define OPCOD_L_CUST6 0x3d // 111_101 -#define OPCOD_L_CUST7 0x3e // 111_110 -#define OPCOD_L_CUST8 0x3f // 111_111 -#define OPCOD_L_LD 0x20 // 100_000 -#define OPCOD_L_LWZ 0x21 // 100_001 -#define OPCOD_L_LWS 0x22 // 100_010 -#define OPCOD_L_LBZ 0x23 // 100_011 -#define OPCOD_L_LBS 0x24 // 100_100 -#define OPCOD_L_LHZ 0x25 // 100_101 -#define OPCOD_L_LHS 0x26 // 100_110 -#define OPCOD_L_ADDI 0x27 // 100_111 -#define OPCOD_L_ADDIC 0x28 // 101_000 -#define OPCOD_L_ANDI 0x29 // 101_001 -#define OPCOD_L_ORI 0x2a // 101_010 -#define OPCOD_L_XORI 0x2b // 101_011 -#define OPCOD_L_MULI 0x2c // 101_100 -#define OPCOD_L_MFSPR 0x2d // 101_101 -#define OPCOD_L_MTSPR 0x30 // 110_000 -#define OPCOD_L_SD 0x32 // 110_010 -#define OPCOD_L_SW 0x35 // 110_101 -#define OPCOD_L_SB 0x36 // 110_110 -#define OPCOD_L_SH 0x37 // 110_111 - -#define OPCOD_INST_LV 0x0a // 001_010 // Instruction ORVDX64 -#define OPCOD_INST_LF 0x33 // 110_011 // Instruction ORFPX32/64 - -#define OPCOD_SPECIAL 0x38 // 111_000 // Instructions Register-Register -#define OPCOD_SPECIAL_1 0x39 // 111_001 // Instructions "set flag" with register -#define OPCOD_SPECIAL_2 0x2f // 101_111 // Instructions "set flag" with immediat -#define OPCOD_SPECIAL_6 0x2e // 101_110 // Instruction Shift/Rotate with immediat -#define OPCOD_SPECIAL_7 0x31 // 110_001 // Instructions multiply with HI-LO -#define OPCOD_SPECIAL_8 0x06 // 000_110 // Instructions acces at HI-LO - -// OPCOD_SPECIAL instructions - [9:8] [3:0] Instructions Register-Register -#define OPCOD_L_ADD 0x00 // 00_0000 -#define OPCOD_L_ADDC 0x01 // 00_0001 -#define OPCOD_L_SUB 0x02 // 00_0010 -#define OPCOD_L_AND 0x03 // 00_0011 -#define OPCOD_L_OR 0x04 // 00_0100 -#define OPCOD_L_XOR 0x05 // 00_0101 -#define OPCOD_L_CMOV 0x0e // 00_1110 -#define OPCOD_L_FF1 0x0f // 00_1111 -#define OPCOD_L_FL1 0x1f // 01_1111 -#define OPCOD_L_MUL 0x36 // 11_0110 -#define OPCOD_L_DIV 0x39 // 11_1001 -#define OPCOD_L_DIVU 0x3a // 11_1010 -#define OPCOD_L_MULU 0x3b // 11_1011 - -#define OPCOD_SPECIAL_3 0xc // 1100 // Instructions extend -#define OPCOD_SPECIAL_4 0xd // 1101 // Instructions extend (64b) -#define OPCOD_SPECIAL_5 0x8 // 1000 // Instruction Shift/Rotate with register - -// OPCOD_SPECIAL_1 instructions - [25:21] Instructions "set flag" with register -#define OPCOD_L_SFEQ 0x00 // 00000 -#define OPCOD_L_SFNE 0x01 // 00001 -#define OPCOD_L_SFGTU 0x02 // 00010 -#define OPCOD_L_SFGEU 0x03 // 00011 -#define OPCOD_L_SFLTU 0x04 // 00100 -#define OPCOD_L_SFLEU 0x05 // 00101 -#define OPCOD_L_SFGTS 0x0a // 01010 -#define OPCOD_L_SFGES 0x0b // 01011 -#define OPCOD_L_SFLTS 0x0c // 01100 -#define OPCOD_L_SFLES 0x0d // 01101 - -// OPCOD_SPECIAL_2 instructions - [25:21] Instructions "set flag" with immediat -#define OPCOD_L_SFEQI 0x00 // 00000 -#define OPCOD_L_SFNEI 0x01 // 00001 -#define OPCOD_L_SFGTUI 0x02 // 00010 -#define OPCOD_L_SFGEUI 0x03 // 00011 -#define OPCOD_L_SFLTUI 0x04 // 00100 -#define OPCOD_L_SFLEUI 0x05 // 00101 -#define OPCOD_L_SFGTSI 0x0a // 01010 -#define OPCOD_L_SFGESI 0x0b // 01011 -#define OPCOD_L_SFLTSI 0x0c // 01100 -#define OPCOD_L_SFLESI 0x0d // 01101 - -// OPCOD_SPECIAL_3 instructions - [9:6] Instructions extend -#define OPCOD_L_EXTHS 0x0 // 0000 -#define OPCOD_L_EXTHZ 0x2 // 0010 -#define OPCOD_L_EXTBS 0x1 // 0001 -#define OPCOD_L_EXTBZ 0x3 // 0011 - -// OPCOD_SPECIAL_4 instructions - [9:6] Instructions extend (64b) -#define OPCOD_L_EXTWS 0x0 // 0000 -#define OPCOD_L_EXTWZ 0x1 // 0001 - -// OPCOD_SPECIAL_5 instructions - [7:6] Instruction Shift/Rotate with register -#define OPCOD_L_SLL 0x0 // 00 -#define OPCOD_L_SRL 0x1 // 01 -#define OPCOD_L_SRA 0x2 // 10 -#define OPCOD_L_ROR 0x3 // 11 - -// OPCOD_SPECIAL_6 instructions - [7:6] Instruction Shift/Rotate with immediat -#define OPCOD_L_SLLI 0x0 // 00 -#define OPCOD_L_SRLI 0x1 // 01 -#define OPCOD_L_SRAI 0x2 // 10 -#define OPCOD_L_RORI 0x3 // 11 - -// OPCOD_SPECIAL_7 instructions - [3:0] Instructions multiply with HI-LO -#define OPCOD_L_MAC 0x1 // 0001 -#define OPCOD_L_MSB 0x2 // 0010 - -// OPCOD_SPECIAL_8 instructions - [17] Instructions acces at HI-LO -#define OPCOD_L_MOVHI 0x0 // 0 -#define OPCOD_L_MACRC 0x1 // 1 - -// Particular case Instructions systems -#define OPCOD_L_MSYNC 0x22000000 -#define OPCOD_L_CSYNC 0x23000000 -#define OPCOD_L_PSYNC 0x22800000 -#define OPCOD_L_NOP 0x1500 -#define OPCOD_L_SYS 0x2000 -#define OPCOD_L_TRAP 0x2100 - -//---------------------------------------------------- -// Code Operation (after decode) -//---------------------------------------------------- - -typedef enum - { - // ##### WARNING : This opcode must be the first##### - INST_L_NO_IMPLEMENTED , // Operation is not implemented - - INST_L_ADD , // L.ADD , L.ADDI , L.ADDC , L.ADDIC - INST_L_AND , // L.AND , L.ANDI - INST_L_OR , // L.OR , L.ORI - INST_L_XOR , // L.XOR , L.XORI - INST_L_CMOV , // L.CMOV - INST_L_SUB , // L.SUB - INST_L_FF1 , // L.FF1 - INST_L_EXTBS , // L.EXTBS - INST_L_EXTBZ , // L.EXTBZ - INST_L_EXTHS , // L.EXTHS - INST_L_EXTHZ , // L.EXTHZ - INST_L_EXTWS , // L.EXTWS - INST_L_EXTWZ , // L.EXTWZ - INST_L_e , // - INST_L_f , // - INST_L_MUL , // L.MUL , L.MULI - INST_L_MULU , // L.MULU - INST_L_DIV , // L.DIV - INST_L_DIVU , // L.DIVU - INST_L_SLL , // L.SLL , L.SLLI - INST_L_SRL , // L.SRL , L.SRLI - INST_L_SRA , // L.SRA , L.SRAI - INST_L_ROR , // L.ROR , L.RORI - INST_L_SFGES , // L.SFGES , L.SFGESI - INST_L_SFGEU , // L.SFGEU , L.SFGEUI - INST_L_SFGTS , // L.SFGTS , L.SFGTSI - INST_L_SFGTU , // L.SFGTU , L.SFGTUI - INST_L_SFLES , // L.SFLES , L.SFLESI - INST_L_SFLEU , // L.SFLEU , L.SFLEUI - INST_L_SFLTS , // L.SFLTS , L.SFLTSI - INST_L_SFLTU , // L.SFLTU , L.SFLTUI - INST_L_SFEQ , // L.SFEQ , L.SFEQI - INST_L_SFNE , // L.SFNE , L.SFNEI - INST_L_READ , // L.BNF , L.BF , L.JR - INST_L_MOVHI , // L.MOVI - INST_L_CSYNC , // L.CSYNC - INST_L_MSYNC , // L.MSYNC - INST_L_PSYNC , // L.PSYNC - INST_L_RFE , // L.RFE - INST_L_MAC , // L.MAC , L.MACI - INST_L_MSB , // L.MSB - INST_L_MACRC , // L.MACRC - INST_L_2b , // - INST_L_MEMB , // L.LBS , L.LBZ , L.SB - INST_L_MEMH , // L.LHS , L.LHZ , L.SH - INST_L_MEMW , // L.LWS , L.LWZ , L.SW - INST_L_MEMD , // L.LD , L.SD - INST_L_CUST1 , // L.CUST1 - INST_L_CUST2 , // L.CUST2 - INST_L_CUST3 , // L.CUST3 - INST_L_CUST4 , // L.CUST4 - INST_L_CUST5 , // L.CUST5 - INST_L_CUST6 , // L.CUST6 - INST_L_CUST7 , // L.CUST7 - INST_L_CUST8 , // L.CUST8 - INST_L_38 , // - INST_L_39 , // - INST_L_3a , // - INST_L_3b , // - INST_L_3c , // - INST_L_3d , // - INST_L_3e , // - INST_NOP // L.NOP - } opcod_t; - -#define LOG2_NB_INST_L 6 -#define NB_INST_L 64 // +1 -> INST_L_NO_IMPLEMENTED -//#define NB_INST_L (INST_L_NO_IMPLEMENTED+1) */ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h (revision 78) @@ -2,48 +2,74 @@ #define Debug_component_H -#define DEBUG_Behavioural false -#define DEBUG_Generic false -#define DEBUG_Counter false -#define DEBUG_Group false -#define DEBUG_Queue false -#define DEBUG_Queue_Control false -#define DEBUG_Shifter false -#define DEBUG_RegisterFile false -#define DEBUG_RegisterFile_Monolithic false -#define DEBUG_RegisterFile_Multi_Banked false -#define DEBUG_Select false -#define DEBUG_Select_Priority_Fixed false -#define Debug_Victim false -#define DEBUG_Victim_Pseudo_LRU false -#define DEBUG_Core false -#define DEBUG_Multi_Execute_loop false -#define DEBUG_Execute_loop false -#define DEBUG_Multi_Execute_unit false -#define DEBUG_Execute_unit false -#define DEBUG_Functionnal_unit false -#define DEBUG_Load_store_unit false -#define DEBUG_Multi_Read_unit false -#define DEBUG_Read_unit false -#define DEBUG_Read_queue false -#define DEBUG_Reservation_station false -#define DEBUG_Multi_Write_unit false -#define DEBUG_Write_unit false -#define DEBUG_Execute_queue false -#define DEBUG_Write_queue false -#define DEBUG_Network true -#define DEBUG_Execution_unit_to_Write_unit true -#define DEBUG_Read_unit_to_Execution_unit true -#define DEBUG_Register_unit false -#define DEBUG_Register_unit_Glue false -#define DEBUG_Multi_Front_end false -#define DEBUG_Front_end false -#define DEBUG_Prediction_unit false -#define DEBUG_Direction false -#define DEBUG_Meta_Predictor false -#define DEBUG_Meta_Predictor_Glue false -#define DEBUG_Two_Level_Branch_Predictor false -#define DEBUG_Two_Level_Branch_Predictor_Glue false -#define DEBUG_Branch_History_Table false -#define DEBUG_Pattern_History_Table false +# define DEBUG_true true +# define DEBUG_false false +# define DEBUG_Behavioural false +# define DEBUG_Generic false +# define DEBUG_Counter false +# define DEBUG_Queue false +# define DEBUG_Queue_Control false +# define DEBUG_RegisterFile false +# define DEBUG_RegisterFile_Monolithic false +# define DEBUG_RegisterFile_Multi_Banked false +# define DEBUG_Select false +# define DEBUG_Select_Priority_Fixed false +# define DEBUG_Shifter false +# define DEBUG_Sort false +# define DEBUG_Victim false +# define DEBUG_Victim_Pseudo_LRU false +# define DEBUG_Core false +# define DEBUG_Multi_Execute_loop false +# define DEBUG_Execute_loop false +# define DEBUG_Multi_Execute_unit false +# define DEBUG_Execute_unit false +# define DEBUG_Functionnal_unit false +# define DEBUG_Load_store_unit false +# define DEBUG_Multi_Read_unit false +# define DEBUG_Read_unit false +# define DEBUG_Read_queue false +# define DEBUG_Reservation_station false +# define DEBUG_Multi_Write_unit false +# define DEBUG_Write_unit false +# define DEBUG_Execute_queue false +# define DEBUG_Write_queue false +# define DEBUG_Network false +# define DEBUG_Execution_unit_to_Write_unit false +# define DEBUG_Read_unit_to_Execution_unit false +# define DEBUG_Register_unit false +# define DEBUG_Register_unit_Glue false +# define DEBUG_Multi_Front_end false +# define DEBUG_Front_end false +# define DEBUG_Decod_unit false +# define DEBUG_Decod false +# define DEBUG_Ifetch_unit false +# define DEBUG_Address_management false +# define DEBUG_Ifetch_queue false +# define DEBUG_Ifetch_unit_Glue false +# define DEBUG_Prediction_unit false +# define DEBUG_Branch_Target_Buffer false +# define DEBUG_Branch_Target_Buffer_Glue false +# define DEBUG_Branch_Target_Buffer_Register false +# define DEBUG_Direction false +# define DEBUG_Direction_Glue false +# define DEBUG_Meta_Predictor false +# define DEBUG_Meta_Predictor_Glue false +# define DEBUG_Two_Level_Branch_Predictor false +# define DEBUG_Two_Level_Branch_Predictor_Glue false +# define DEBUG_Branch_History_Table false +# define DEBUG_Pattern_History_Table false +# define DEBUG_Return_Address_Stack true +# define DEBUG_Update_Prediction_Table true +# define DEBUG_Multi_OOO_Engine false +# define DEBUG_OOO_Engine false +# define DEBUG_Rename_unit false +# define DEBUG_Load_Store_pointer_unit false +# define DEBUG_Register_translation_unit false +# define DEBUG_Dependency_checking_unit false +# define DEBUG_Free_List_unit false +# define DEBUG_Register_Address_Translation_unit false +# define DEBUG_Register_translation_unit_Glue false +# define DEBUG_Stat_List_unit false +//#define DEBUG_Rename_queue true +# define DEBUG_Rename_select false #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h (revision 78) @@ -78,5 +78,5 @@ #endif - public : bool test_map (bool top_level); + public : bool test_map (uint32_t depth,bool top_level); #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h (revision 78) @@ -22,2 +22,4 @@ # define DEBUG_TEST #endif + +#define MORPHEO_HOME "MORPHEO_HOME" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Identification.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Identification.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Identification.h (revision 78) @@ -0,0 +1,34 @@ +#ifndef morpheo_behavioural_Identification_h +#define morpheo_behavioural_Identification_h + +#include "Behavioural/include/Types.h" +#include "Common/include/BitManipulation.h" + +namespace morpheo { +namespace behavioural { + + uint32_t get_nb_thread (uint32_t nb_context , + uint32_t nb_front_end , + uint32_t nb_ooo_engine ); + Tcontext_t get_num_thread (Tcontext_t num_context_id , + uint32_t size_context_id , + Tcontext_t num_front_end_id , + uint32_t size_front_end_id , + Tcontext_t num_ooo_engine_id , + uint32_t size_ooo_engine_id); + Tcontext_t get_num_context (Tcontext_t num_thread , + uint32_t size_context_id , + uint32_t size_front_end_id , + uint32_t size_ooo_engine_id); + Tcontext_t get_num_front_end (Tcontext_t num_thread , + uint32_t size_context_id , + uint32_t size_front_end_id , + uint32_t size_ooo_engine_id); + Tcontext_t get_num_ooo_engine (Tcontext_t num_thread , + uint32_t size_context_id , + uint32_t size_front_end_id , + uint32_t size_ooo_engine_id); + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 78) @@ -229,5 +229,5 @@ #endif - public : bool test_map (bool top_level); + public : bool test_map (uint32_t depth, bool top_level); #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h (revision 78) @@ -80,5 +80,5 @@ #endif - public : bool test_map (bool top_level); + public : bool test_map (uint32_t depth, bool top_level); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h (revision 78) @@ -14,4 +14,5 @@ #include "Behavioural/include/Environnement.h" #include "Behavioural/include/Constants.h" +#include "Behavioural/include/Test.h" #include "Common/include/ErrorMorpheo.h" #include "Common/include/ToString.h" @@ -22,41 +23,68 @@ namespace behavioural { + class Parameters_test + { + private : std::string _component; + protected : std::string _error; + protected : std::string _warning; + protected : std::string _information; + + public : Parameters_test (std::string component) + { + _component = component; + _error = ""; + _warning = ""; + }; + public : ~Parameters_test (void) {}; + + public : bool have_error (void) { return (_error.length() != 0);}; + public : void error (std::string str) { _error += "[ ERROR ] <" + _component + "> " + str + "\n";} + public : void warning (std::string str) { _warning += "[ WARNING ] <" + _component + "> " + str + "\n";} + public : void information (std::string str) { _information += "[INFORMATION] <" + _component + "> " + str + "\n";} + public : std::string print (void) { return _error + _warning + _information;}; + }; + // Virtual Class - Interface of each component class Parameters { // -----[ fields ]---------------------------------------------------- - public : static const uint32_t _nb_operation = MAX_OPERATION; - public : static const uint32_t _nb_type = MAX_TYPE; - public : static const uint32_t _size_operation = SIZE_OPERATION; - public : static const uint32_t _size_type = SIZE_TYPE; - public : static const uint32_t _size_exception = SIZE_EXCEPTION; - public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; - public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; + public : static const uint32_t _size_instruction = 32; + public : static const uint32_t _nb_operation = MAX_OPERATION; + public : static const uint32_t _nb_type = MAX_TYPE; + public : static const uint32_t _size_operation = SIZE_OPERATION; + public : static const uint32_t _size_type = SIZE_TYPE; + public : static const uint32_t _size_exception = SIZE_EXCEPTION; + public : static const uint32_t _size_exception_use = SIZE_EXCEPTION_USE; + public : static const uint32_t _size_exception_memory = SIZE_EXCEPTION_MEMORY; + public : static const uint32_t _size_exception_custom = SIZE_EXCEPTION_CUSTOM; + public : static const uint32_t _size_exception_alu = SIZE_EXCEPTION_ALU ; + public : static const uint32_t _size_exception_decod = SIZE_EXCEPTION_DECOD ; + public : static const uint32_t _size_exception_ifetch = SIZE_EXCEPTION_IFETCH; + public : static const uint32_t _size_icache_type = SIZE_ICACHE_TYPE; + public : static const uint32_t _size_icache_error = SIZE_ICACHE_ERROR; + public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; + public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; + public : static const uint32_t _nb_general_register_logic = 32; + public : static const uint32_t _nb_special_register_logic = NB_SPR_LOGIC; + public : static const uint32_t _size_general_register_logic = 5; + public : static const uint32_t _size_special_register_logic = LOG2_NB_SPR_LOGIC; + public : static const uint32_t _size_event_state = SIZE_EVENT_STATE; + public : static const uint32_t _size_event_type = SIZE_EVENT_TYPE; + public : static const uint32_t _size_branch_state = SIZE_BRANCH_STATE; + public : static const uint32_t _size_branch_condition = SIZE_BRANCH_CONDITION; // -----[ methods ]--------------------------------------------------- - public : Parameters (void); - public : virtual ~Parameters (); + public : Parameters (void); + public : virtual ~Parameters (); // methods to print and test parameters - public : virtual std::string print (uint32_t depth) = 0; - public : virtual std::string msg_error (void) = 0; + public : virtual std::string print (uint32_t depth) = 0; + public : virtual Parameters_test msg_error (void) = 0; // methods to generate configuration file - // methods to test - public : void test (void); - public : bool is_natural (double val ); - public : bool is_positive (double val ); - public : bool is_multiple (uint32_t val1, - uint32_t val2); - public : bool is_between_inclusive (uint32_t val, - uint32_t min, - uint32_t max); - public : bool is_between_exclusive (uint32_t val, - uint32_t min, - uint32_t max); + public : void test (void); }; - }; // end namespace behavioural }; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 78) @@ -51,17 +51,18 @@ // -----[ fields ]---------------------------------------------------- - private : const std::string _name ; + private : const std::string _name ; private : const direction_t _direction ; private : const presence_port_t _presence_port ; private : uint32_t _size ; - private : Signal * _connect_to_signal; // the actual implementaion, this signal link with one signal (but if signal is an output, it can be connect with many signal ...) - private : Signal * _connect_from_signal; // producter of signal. If NULL, then producteur is the current entity - private : bool _is_allocate ; // Have allocate a sc_in or sc_out port - private : void * _sc_signal ; // sc_in or sc_out associated at this signal - private : void * _sc_signal_map ; // sc_out generated this signal - private : bool _is_map_as_src ; - private : bool _is_map_as_dest; - private : type_info_t _type_info ; + private : Signal * _connect_to_signal ; // the actual implementaion, this signal link with one signal (but if signal is an output, it can be connect with many signal ...) + private : Signal * _connect_from_signal ; // producter of signal. If NULL, then producteur is the current entity + private : bool _is_allocate ; // Have allocate a sc_in or sc_out port + private : void * _sc_signal ; // sc_in or sc_out associated at this signal + private : void * _sc_signal_map ; // sc_out generated this signal + private : bool _is_map_as_toplevel_dest ; + private : bool _is_map_as_component_src ; + private : bool _is_map_as_component_dest; + private : type_info_t _type_info ; #ifdef VHDL_TESTBENCH @@ -90,5 +91,5 @@ public : bool presence_testbench (void); - public : bool test_map (bool top_level); + public : bool test_map (uint32_t depth, bool top_level); public : void link (Signal * signal_dest, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h (revision 78) @@ -60,43 +60,60 @@ bool _generate_file; - public : Stat (std::string name_instance, - std::string name_component, - Parameters_Statistics * param); + public : Stat (std::string name_instance, + std::string name_component, + Parameters_Statistics * param); + public : Stat (std::string name_instance, + std::string name_component, + cycle_t nb_cycle_before_begin=0, + cycle_t period=0); + public : ~Stat (void); - public : Stat (std::string name_instance, - std::string name_component, - cycle_t nb_cycle_before_begin=0, - cycle_t period=0); - public : ~Stat (void); - - public : counter_t * create_variable (std::string varname); - public : counter_t * create_counter (std::string varname, - std::string unit, - std::string description); - private : counter_t * alloc_operand (counter_type_t type, - std::string varname, - std::string unit, - std::string description); - public : void create_expr (std::string varname, - std::string expr, - bool each_cycle=true); + public : counter_t * create_variable (std::string varname); + public : counter_t * create_counter (std::string varname, + std::string unit, + std::string description); + private : counter_t * alloc_operand (counter_type_t type, + std::string varname, + std::string unit, + std::string description); - private : Stat_binary_tree * string2tree (std::string expr); + public : void create_expr (std::string varname, + std::string expr, + bool each_cycle=false); + public : void create_expr_average (std::string varname, + std::string expr_sum, + std::string expr_deps, + std::string unit, + std::string description); - public : void end_cycle (void); - private : void end_simulation (void); - private : void test_and_save (bool force_save=false); - private : void eval_exprs (bool only_each_cycle=true); - private : void eval_expr (expr_t expr); - - private : bool is_valid_var (std::string expr); + public : void create_expr_average_by_cycle (std::string varname, + std::string expr_sum, + std::string unit, + std::string description); - private : void generate_file (void); + public : void create_expr_percent (std::string varname, + std::string expr_sum, + std::string expr_max, + std::string description); - private : bool have_counter (void); + private : Stat_binary_tree * string2tree (std::string expr); - public : void add_stat (Stat * stat); + public : void end_cycle (void); + private : void end_simulation (void); - public : std::string print (uint32_t depth=0); + private : void test_and_save (bool force_save=false); + + private : void eval_exprs (bool only_each_cycle=true); + private : void eval_expr (expr_t expr); + + private : bool is_valid_var (std::string expr); + + private : void generate_file (void); + + private : bool have_counter (void); + + public : void add_stat (Stat * stat); + + public : std::string print (uint32_t depth=0); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Test.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Test.h (revision 78) @@ -0,0 +1,31 @@ +#ifndef morpheo_behavioural_Test_h +#define morpheo_behavioural_Test_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include +#include + +namespace morpheo { +namespace behavioural { + + bool is_natural (double val); + bool is_positive (double val); + bool is_power2 (uint32_t val); + bool is_multiple (uint32_t val1, + uint32_t val2); + bool is_between_inclusive (uint32_t val, + uint32_t min, + uint32_t max); + bool is_between_exclusive (uint32_t val, + uint32_t min, + uint32_t max); +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 78) @@ -4,4 +4,6 @@ #include "Common/include/Types.h" #include "Common/include/ToString.h" +#include "Common/include/FromString.h" +#include "Common/include/ErrorMorpheo.h" #include "Behavioural/include/Constants.h" @@ -14,32 +16,87 @@ // ***** general - typedef bool Tcontrol_t; - typedef uint32_t Toperation_t; -//typedef uint32_t Tdestination1_t; -//typedef uint32_t Tdestination2_t; -//typedef uint32_t Texec_flag_t; -//typedef bool Texec_excep_t; -//typedef uint32_t Tcondition_t; -//typedef uint32_t Tbranch_state_t; - - typedef uint32_t Texception_t; - typedef uint32_t Tcontext_t; - typedef uint32_t Tpacket_t; - typedef uint32_t Ttype_t; - - // ***** Register - typedef uint32_t Tgeneral_address_t; - typedef uint32_t Tgeneral_data_t; - typedef uint32_t Tspecial_address_t; - typedef uint32_t Tspecial_data_t; + typedef uint32_t Tinstruction_t; + typedef bool Tcontrol_t; + typedef uint8_t Toperation_t; +//typedef uint32_t Tdestination1_t; +//typedef uint32_t Tdestination2_t; +//typedef uint32_t Texec_flag_t; +//typedef bool Texec_excep_t; + + typedef uint8_t Texception_t; + typedef uint8_t Tcontext_t; + typedef uint8_t Tpacket_t; + typedef uint8_t Ttype_t; + typedef uint8_t Tevent_state_t; + typedef uint8_t Tevent_type_t; + typedef uint8_t Tcounter_t; // universal counter + typedef uint8_t Tptr_t; // universal pointer + + // ***** Register + typedef uint32_t Tgeneral_address_t; + typedef uint32_t Tgeneral_data_t; + typedef uint32_t Tspecial_address_t; + typedef uint32_t Tspecial_data_t; // ***** component dependant - // ~~~~~ load store queue - typedef uint32_t Taccess_t; - typedef uint32_t Tlsq_ptr_t; - typedef uint32_t Tdcache_address_t; - typedef uint32_t Tdcache_data_t; - typedef bool Tdcache_error_t; - typedef uint32_t Tdcache_type_t; + // ~~~~~ load store queue + typedef uint8_t Taccess_t; + typedef uint8_t Tlsq_ptr_t; + typedef uint32_t Tdcache_address_t; + typedef uint32_t Tdcache_data_t; + typedef bool Tdcache_error_t; + typedef uint8_t Tdcache_type_t; + + // ~~~~~ prediction_unit + typedef uint8_t Thistory_t; + typedef uint8_t Tprediction_ptr_t; + typedef uint8_t Tbranch_state_t; + typedef uint8_t Tbranch_condition_t; + typedef uint8_t Tdepth_t; + typedef Tgeneral_data_t Taddress_t; + + + // ~~~~~ ifetch + typedef uint8_t Tinst_ifetch_ptr_t; + typedef uint8_t Tifetch_queue_ptr_t; + typedef uint32_t Ticache_address_t; + typedef uint32_t Ticache_instruction_t; + typedef bool Ticache_error_t; + typedef uint8_t Ticache_type_t; + + typedef enum + { + PRIORITY_STATIC, + PRIORITY_ROUND_ROBIN + } Tpriority_t; + + typedef enum + { + LOAD_BALANCING_BALANCE, + LOAD_BALANCING_MAXIMUM_FOR_PRIORITY + } Tload_balancing_t; + + typedef enum + { + VICTIM_RANDOM , // Random + VICTIM_ROUND_ROBIN, // Round Robin + VICTIM_NLU , // Not Last Used + VICTIM_PSEUDO_LRU , // Pseudo Least Recently Used + VICTIM_LRU , // Least Recently Used + VICTIM_FIFO // First IN First OUT + } Tvictim_t; + + typedef enum + { + PREDICTOR_NEVER_TAKE , // Branch is never Take + PREDICTOR_ALWAYS_TAKE , // Branch is always Take + PREDICTOR_STATIC , // If the adress of destination is previous, then the branch is take + PREDICTOR_LAST_TAKE , // The direction is as the last time (if is the first time : static) + PREDICTOR_COUNTER , // Counter table + PREDICTOR_LOCAL , // Counter bank indexed with history bank + PREDICTOR_GLOBAL , // Counter bank indexed with history table + PREDICTOR_META , // A meta_predictor choose between 2 predictor : the local or the global + PREDICTOR_CUSTOM // Note predefined scheme + } Tpredictor_t; //----------------------------------------------[ spr_mode_access ]----- @@ -56,22 +113,4 @@ } }; - - inline Tcontext_t get_num_thread (Tcontext_t num_context_id , uint32_t size_context_id , - Tcontext_t num_front_end_id , uint32_t size_front_end_id , - Tcontext_t num_ooo_engine_id, uint32_t size_ooo_engine_id) - { - return ((num_ooo_engine_id << (size_context_id + size_front_end_id)) | - (num_front_end_id << (size_context_id)) | - (num_context_id)); - } - - inline uint32_t get_nb_thread (uint32_t nb_context , - uint32_t nb_front_end , - uint32_t nb_ooo_engine ) - { - return (nb_ooo_engine * - nb_front_end * - nb_context) ; - } }; // end namespace behavioural @@ -96,5 +135,132 @@ }; + template<> inline std::string toString(const morpheo::behavioural::Tpriority_t& x) + { + switch (x) + { + case morpheo::behavioural::PRIORITY_STATIC : return "priority_static"; break; + case morpheo::behavioural::PRIORITY_ROUND_ROBIN : return "priority_round_robin"; break; + default : return "" ; break; + } + }; + + template<> inline morpheo::behavioural::Tpriority_t fromString(const std::string& x) + { + if ( (x.compare("0") == 0) or + (x.compare("priority_static") == 0)) + return morpheo::behavioural::PRIORITY_STATIC; + if ( (x.compare("1") == 0) or + (x.compare("priority_round_robin") == 0)) + return morpheo::behavioural::PRIORITY_ROUND_ROBIN; + throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); + }; + + template<> inline std::string toString(const morpheo::behavioural::Tload_balancing_t& x) + { + switch (x) + { + case morpheo::behavioural::LOAD_BALANCING_BALANCE : return "load_balancing_balance"; break; + case morpheo::behavioural::LOAD_BALANCING_MAXIMUM_FOR_PRIORITY : return "load_balancing_maximum_for_priority"; break; + default : return "" ; break; + } + }; + + template<> inline morpheo::behavioural::Tload_balancing_t fromString(const std::string& x) + { + if ( (x.compare("0") == 0) or + (x.compare("load_balancing_balance") == 0)) + return morpheo::behavioural::LOAD_BALANCING_BALANCE; + if ( (x.compare("1") == 0) or + (x.compare("load_balancing_maximum_for_priority") == 0)) + return morpheo::behavioural::LOAD_BALANCING_MAXIMUM_FOR_PRIORITY; + throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); + }; + + template<> inline std::string toString(const morpheo::behavioural::Tvictim_t& x) + { + switch (x) + { + case morpheo::behavioural::VICTIM_RANDOM : return "victim_random" ; break; + case morpheo::behavioural::VICTIM_ROUND_ROBIN : return "victim_round_robin"; break; + case morpheo::behavioural::VICTIM_NLU : return "victim_nlu" ; break; + case morpheo::behavioural::VICTIM_PSEUDO_LRU : return "victim_pseudo_lru" ; break; + case morpheo::behavioural::VICTIM_LRU : return "victim_lru" ; break; + case morpheo::behavioural::VICTIM_FIFO : return "victim_fifo" ; break; + default : return "" ; break; + } + }; + + template<> inline morpheo::behavioural::Tvictim_t fromString(const std::string& x) + { + if ( (x.compare("0") == 0) or + (x.compare("victim_random") == 0)) + return morpheo::behavioural::VICTIM_RANDOM; + if ( (x.compare("1") == 0) or + (x.compare("victim_round_robin") == 0)) + return morpheo::behavioural::VICTIM_ROUND_ROBIN; + if ( (x.compare("2") == 0) or + (x.compare("victim_nlu") == 0)) + return morpheo::behavioural::VICTIM_NLU; + if ( (x.compare("3") == 0) or + (x.compare("victim_pseudo_lru") == 0)) + return morpheo::behavioural::VICTIM_PSEUDO_LRU; + if ( (x.compare("4") == 0) or + (x.compare("victim_lru") == 0)) + return morpheo::behavioural::VICTIM_LRU; + if ( (x.compare("5") == 0) or + (x.compare("victim_fifo") == 0)) + return morpheo::behavioural::VICTIM_FIFO; + throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); + }; + + template<> inline std::string toString(const morpheo::behavioural::Tpredictor_t& x) + { + switch (x) + { + case morpheo::behavioural::PREDICTOR_NEVER_TAKE : return "predictor_never_take" ; break; + case morpheo::behavioural::PREDICTOR_ALWAYS_TAKE : return "predictor_always_take"; break; + case morpheo::behavioural::PREDICTOR_STATIC : return "predictor_static" ; break; + case morpheo::behavioural::PREDICTOR_LAST_TAKE : return "predictor_last_take" ; break; + case morpheo::behavioural::PREDICTOR_COUNTER : return "predictor_counter" ; break; + case morpheo::behavioural::PREDICTOR_LOCAL : return "predictor_local" ; break; + case morpheo::behavioural::PREDICTOR_GLOBAL : return "predictor_global" ; break; + case morpheo::behavioural::PREDICTOR_META : return "predictor_meta" ; break; + case morpheo::behavioural::PREDICTOR_CUSTOM : return "predictor_custom" ; break; + default : return "" ; break; + } + }; + + template<> inline morpheo::behavioural::Tpredictor_t fromString(const std::string& x) + { + if ( (x.compare("0") == 0) or + (x.compare("predictor_never_take") == 0)) + return morpheo::behavioural::PREDICTOR_NEVER_TAKE; + if ( (x.compare("1") == 0) or + (x.compare("predictor_always_take") == 0)) + return morpheo::behavioural::PREDICTOR_ALWAYS_TAKE; + if ( (x.compare("2") == 0) or + (x.compare("predictor_static") == 0)) + return morpheo::behavioural::PREDICTOR_STATIC; + if ( (x.compare("3") == 0) or + (x.compare("predictor_last_take") == 0)) + return morpheo::behavioural::PREDICTOR_LAST_TAKE; + if ( (x.compare("4") == 0) or + (x.compare("predictor_counter") == 0)) + return morpheo::behavioural::PREDICTOR_COUNTER; + if ( (x.compare("5") == 0) or + (x.compare("predictor_local") == 0)) + return morpheo::behavioural::PREDICTOR_LOCAL; + if ( (x.compare("6") == 0) or + (x.compare("predictor_global") == 0)) + return morpheo::behavioural::PREDICTOR_GLOBAL; + if ( (x.compare("7") == 0) or + (x.compare("predictor_meta") == 0)) + return morpheo::behavioural::PREDICTOR_META; + if ( (x.compare("8") == 0) or + (x.compare("predictor_custom") == 0)) + return morpheo::behavioural::PREDICTOR_CUSTOM; + throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); + }; + }; // end namespace morpheo - #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp (revision 78) @@ -20,9 +20,14 @@ log_printf(FUNC,Behavioural,FUNCTION,"Begin"); +// log_printf(NONE,Behavioural,FUNCTION,"Map %s.%s with %s.%s", +// component_src.c_str(), +// port_src.c_str(), +// component_dest.c_str(), +// port_dest.c_str()); + std::string name_entity = _entity->get_name(); // First entity Entity * entity_dest = find_entity(component_dest); - if (entity_dest == NULL) @@ -53,6 +58,6 @@ // need an internal signal ? - bool src_is_port = entity_src == _entity; - bool dest_is_port = entity_dest == _entity; + bool src_is_port = (entity_src == _entity); + bool dest_is_port = (entity_dest == _entity); if (src_is_port == true) @@ -67,7 +72,7 @@ // // Interface Component - // | | + // | | // ----> (IN) --X-> (IN) - // | | + // | | // <-X-- (OUT) <---- (OUT) // | | @@ -89,8 +94,7 @@ } + // Create internal signal signal_dest= signal_internal (entity_productor, signal_productor); signal_dest->set_size_max(signal_src->get_size()); - - dest_is_port = false; } @@ -111,49 +115,6 @@ }; - void Component::port_map (std::string component_src , - std::string port_src ) - { - log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - - Entity * entity_src = find_entity(component_src); - - if (entity_src == NULL) - throw (ErrorMorpheo (" in component \""+_entity->get_name()+"\", port map with unknow component \""+component_src+"\".")); - - Signal * signal_src = entity_src->find_signal (port_src); - - if (signal_src == NULL) - throw (ErrorMorpheo (" in component \""+_entity->get_name()+"\", port map with component \""+component_src+"\" and a unknow signal \""+port_src+"\".")); - - // need an internal signal ? - - if (entity_src == _entity) - throw (ErrorMorpheo (" src can't be an interface's port of the top level.")); - - if (signal_src->get_direction() != OUT) - throw (ErrorMorpheo (" the direction of the signal '"+signal_src->get_name()+"' must be OUT.")); - - Signal * signal_dest; - - signal_dest= signal_internal (entity_src, signal_src); - signal_dest->set_size_max(signal_src->get_size()); - - try - { - signal_src->link(signal_dest, - false); - } - catch (morpheo::ErrorMorpheo & error) - { - throw (ErrorMorpheo (" Error in mapping "+entity_src ->get_name()+"."+signal_src ->get_name()+" :\n"+error.what ())); - } - //catch (...) - // { - // } - - log_printf(FUNC,Behavioural,FUNCTION,"End"); - }; - }; // end namespace behavioural }; // end namespace morpheo + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp (revision 78) @@ -29,4 +29,5 @@ Tcomponent_t * entry = new Tcomponent_t; +// entry->_component= component; entry->_instance = instance; entry->_entity = entity; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp (revision 78) @@ -13,26 +13,41 @@ #undef FUNCTION #define FUNCTION "Component::test_map" - bool Component::test_map (void) + bool Component::test_map (bool recursive) + { + return test_map (0, recursive); + } + + bool Component::test_map (uint32_t depth, bool recursive) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); + std::string tab = std::string(depth,'\t'); std::string name = _entity->get_name(); bool test_ok = true; + if (_list_component->empty () == true) - log_printf(NONE,Behavioural,FUNCTION, "Component \"%s\" is a behavioural description",name.c_str()); + { + log_printf(NONE,Behavioural,FUNCTION, "%s* Component \"%s\" is a behavioural description",tab.c_str(),name.c_str()); + } else { - log_printf(NONE,Behavioural,FUNCTION, "Component \"%s\" is a structural description",name.c_str()); + log_printf(NONE,Behavioural,FUNCTION, "%s* Component \"%s\" is a structural description",tab.c_str(),name.c_str()); - log_printf(INFO,Behavioural,FUNCTION, "Test port I/O"); + log_printf(INFO,Behavioural,FUNCTION, "%s* Test port I/O",tab.c_str()); - test_ok &= _entity->test_map(true); + test_ok &= _entity->test_map(1,true); - log_printf(INFO,Behavioural,FUNCTION, "Test all internal component"); + log_printf(INFO,Behavioural,FUNCTION, "%s* Test all internal component",tab.c_str()); for (std::list::iterator i= _list_component->begin(); i != _list_component->end(); ++i) - test_ok &= (*i)->_entity->test_map(false); + test_ok &= (*i)->_entity->test_map(1,false); + +// if (recursive) +// for (std::list::iterator i= _list_component->begin(); +// i != _list_component->end(); +// ++i) +// test_ok &= (*i)->_component->test_map(1,recursive); } @@ -40,5 +55,5 @@ if (test_ok == false) - throw (ErrorMorpheo (" A lot of port is not connected.")); + throw (ERRORMORPHEO (FUNCTION,"A lot of port is not connected.")); return test_ok; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp (revision 78) @@ -7,5 +7,5 @@ #include "Behavioural/include/Entity.h" - +#include namespace morpheo { @@ -14,11 +14,19 @@ #undef FUNCTION #define FUNCTION "Entity::test_map" - bool Entity::test_map (bool top_level) + bool Entity::test_map (uint32_t depth, bool top_level) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - log_printf(NONE,Behavioural,FUNCTION, " * Test mapping : Entity \"%s\"",_name.c_str()); + std::string tab = std::string(depth,'\t'); + log_printf(NONE,Behavioural,FUNCTION, "%s* Test mapping : Entity \"%s\"",tab.c_str(),_name.c_str()); - bool _return = _interfaces->test_map(top_level); + bool _return = _interfaces->test_map(depth+1,top_level); + +#ifndef DEBUG + if (_return == false) + { + std::cerr << "In entity \"" << _name << "\" (type : \"" << _type << "\"), a lot of port is not connected !" << std::endl; + } +#endif log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Identification.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Identification.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Identification.cpp (revision 78) @@ -0,0 +1,49 @@ +#include "Behavioural/include/Identification.h" + +namespace morpheo { +namespace behavioural { + + uint32_t get_nb_thread (uint32_t nb_context , + uint32_t nb_front_end , + uint32_t nb_ooo_engine ) + { + return (nb_ooo_engine * + nb_front_end * + nb_context) ; + } + + Tcontext_t get_num_thread (Tcontext_t num_context_id , uint32_t size_context_id , + Tcontext_t num_front_end_id , uint32_t size_front_end_id , + Tcontext_t num_ooo_engine_id, uint32_t size_ooo_engine_id) + { + return ((num_ooo_engine_id << (size_context_id + size_front_end_id)) | + (num_front_end_id << (size_context_id)) | + (num_context_id)); + } + + Tcontext_t get_num_context (Tcontext_t num_thread , + uint32_t size_context_id , + uint32_t size_front_end_id , + uint32_t size_ooo_engine_id) + { + return range(num_thread, size_context_id); + } + + Tcontext_t get_num_front_end (Tcontext_t num_thread , + uint32_t size_context_id , + uint32_t size_front_end_id , + uint32_t size_ooo_engine_id) + { + return range(num_thread>>size_context_id, size_front_end_id); + } + + Tcontext_t get_num_ooo_engine (Tcontext_t num_thread , + uint32_t size_context_id , + uint32_t size_front_end_id , + uint32_t size_ooo_engine_id) + { + return range(num_thread>>(size_context_id+size_front_end_id), size_ooo_engine_id); + } + +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp (revision 78) @@ -14,16 +14,17 @@ #undef FUNCTION #define FUNCTION "Interface::test_map" - bool Interface::test_map (bool top_level) + bool Interface::test_map (uint32_t depth, bool top_level) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); + std::string tab = std::string(depth,'\t'); bool _return = true; - log_printf(INFO,Behavioural,FUNCTION, " * Interface \"%s\"",_name.c_str()); + log_printf(NONE,Behavioural,FUNCTION, "%s* Interface \"%s\"",tab.c_str(),_name.c_str()); for (std::list::iterator i = _list_signal->begin(); i != _list_signal->end(); ++i) - _return &= (*i)->test_map(top_level); + _return &= (*i)->test_map(depth+1,top_level); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp (revision 78) @@ -14,16 +14,18 @@ #undef FUNCTION #define FUNCTION "Interfaces::test_map" - bool Interfaces::test_map (bool top_level) + bool Interfaces::test_map (uint32_t depth, bool top_level) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); + std::string tab = std::string(depth,'\t'); + bool _return = true; - log_printf(INFO,Behavioural,FUNCTION, " * Interfaces \"%s\"",_name.c_str()); + log_printf(NONE,Behavioural,FUNCTION, "%s* Interfaces \"%s\"",tab.c_str(),_name.c_str()); for (std::list::iterator i = _list_interface->begin(); i != _list_interface->end(); ++i) - _return &= (*i)->test_map(top_level); + _return &= (*i)->test_map(depth+1, top_level); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_is_xxx.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_is_xxx.cpp (revision 77) +++ (revision ) @@ -1,26 +1,0 @@ -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Parameters.h" - - -namespace morpheo { -namespace behavioural { - - bool Parameters::is_natural (double val ) { return ( (val >= 0) && (floor(val) == ceil(val)));}; - bool Parameters::is_positive (double val ) { return ( (val >= 1) && (floor(val) == ceil(val)));}; - bool Parameters::is_multiple (uint32_t val1, - uint32_t val2) { return is_positive((1.0*val1)/(1.0*val2));}; - bool Parameters::is_between_inclusive (uint32_t val, - uint32_t min, - uint32_t max) { return ((val >= min) && (val <= max));}; - bool Parameters::is_between_exclusive (uint32_t val, - uint32_t min, - uint32_t max) { return ((val > min) && (val < max));}; - -}; // end namespace behavioural -}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_test.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_test.cpp (revision 78) @@ -17,8 +17,12 @@ { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - std::string msg = msg_error(); + + Parameters_test x = msg_error(); - if (msg.length() != 0) - throw (ErrorMorpheo (msg)); + std::cerr << x.print() << std::endl; + + if (x.have_error()) + throw (ErrorMorpheo ("Error(s) in parameters")); + log_printf(FUNC,Behavioural,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp (revision 78) @@ -20,16 +20,22 @@ { log_printf(FUNC,Behavioural,"Signal","Begin"); - _size = size; - _is_allocate = false; - _is_map_as_src = false; - _is_map_as_dest = false; - _connect_from_signal = NULL; - _connect_to_signal = NULL; - _sc_signal = NULL; - _sc_signal_map = NULL; - _type_info = UNKNOW; + _size = size; + _is_allocate = false; + _is_map_as_component_src = false; + _is_map_as_component_dest = false; + _is_map_as_toplevel_dest = false; + _connect_from_signal = NULL; + _connect_to_signal = NULL; + _sc_signal = NULL; + _sc_signal_map = NULL; + _type_info = UNKNOW; #ifdef VHDL_TESTBENCH _list_value = new std::list; #endif + + if (_size == 0) + throw ERRORMORPHEO(FUNCTION,"Size of signal '"+_name+"' is nul"); + + log_printf(FUNC,Behavioural,"Signal","End"); }; @@ -41,15 +47,16 @@ { log_printf(FUNC,Behavioural,"Signal (copy)","Begin"); - _size = signal._size; - _is_allocate = signal._is_allocate; - _is_map_as_src = signal._is_map_as_src ; - _is_map_as_dest = signal._is_map_as_dest; - _connect_from_signal = signal._connect_from_signal; - _connect_to_signal = signal._connect_to_signal; - _sc_signal = signal._sc_signal ; - _sc_signal_map = signal._sc_signal_map; - _type_info = signal._type_info ; + _size = signal._size; + _is_allocate = signal._is_allocate; + _is_map_as_component_src = signal._is_map_as_component_src ; + _is_map_as_component_dest = signal._is_map_as_component_dest; + _is_map_as_toplevel_dest = signal._is_map_as_component_dest; + _connect_from_signal = signal._connect_from_signal; + _connect_to_signal = signal._connect_to_signal; + _sc_signal = signal._sc_signal ; + _sc_signal_map = signal._sc_signal_map; + _type_info = signal._type_info ; #ifdef VHDL_TESTBENCH - _list_value = signal._list_value; + _list_value = signal._list_value; #endif log_printf(FUNC,Behavioural,"Signal (copy)","End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_connect.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_connect.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_connect.cpp (revision 78) @@ -17,7 +17,15 @@ { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - - //std::cout << "connected : " << get_name() << "\twith " << signal_dest->get_name() << std::endl; - + +// log_printf(TRACE,Behavioural,FUNCTION,"Connection between : %s with %s",get_name().c_str(),signal_dest->get_name().c_str()); +// log_printf(ALL,Behavioural,FUNCTION," * source"); +// log_printf(ALL,Behavioural,FUNCTION," * direction : %s",toString(_direction).c_str()); +// log_printf(ALL,Behavioural,FUNCTION," * sc_signal : %.8x",_sc_signal); +// log_printf(ALL,Behavioural,FUNCTION," * type_info : %s",toString(_type_info).c_str()); +// log_printf(ALL,Behavioural,FUNCTION," * destination"); +// log_printf(ALL,Behavioural,FUNCTION," * direction : %s",toString(signal_dest->_direction).c_str()); +// log_printf(ALL,Behavioural,FUNCTION," * sc_signal : %.8x",signal_dest->_sc_signal); +// log_printf(ALL,Behavioural,FUNCTION," * type_info : %s",toString(signal_dest->_type_info).c_str()); + if ((_direction == IN ) and (signal_dest->_direction == IN )) switch (_type_info) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp (revision 78) @@ -17,4 +17,6 @@ bool signal_dest_is_port) { + // signal_dest_is_port == 1 when the signal dest is in a top level interface. (else, signal_dest is type "INTERNAL") + log_printf(FUNC,Behavioural,FUNCTION,"Begin"); @@ -23,9 +25,7 @@ // Test if (signal_src ->_is_allocate == false) - throw (ErrorMorpheo (" Signal \""+_name+"\", can't map with signal \""+ get_name()+"\", because the first signal is not already allocate.")); + throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\", can't map with signal \""+ get_name()+"\", because the first signal is not already allocate.")); if (signal_dest->_is_allocate == false) - throw (ErrorMorpheo (" Signal \""+_name+"\", can't map with signal \""+signal_dest->get_name()+"\", because the second signal is not already allocate.")); - if (signal_src ->_is_map_as_src == true) - throw (ErrorMorpheo (" Can't mapping signal \""+_name+"\" with \""+signal_dest->get_name()+"\", because the first signal is already mapped.")); + throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\", can't map with signal \""+signal_dest->get_name()+"\", because the second signal is not already allocate.")); // List of all case @@ -43,21 +43,39 @@ not (not signal_dest_is_port and (((signal_src->_direction == IN ) and (signal_dest->_direction == INTERNAL)) or ((signal_src->_direction == OUT) and (signal_dest->_direction == INTERNAL))))) - throw (ErrorMorpheo (" Signal \""+_name+"\" can't been linked with signal \""+signal_dest->get_name()+"\" : illegal direction ("+toString(signal_src->_direction)+" with "+toString(signal_dest->_direction)+").")); + throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\" can't been linked with signal \""+signal_dest->get_name()+"\" : illegal direction ("+toString(signal_src->_direction)+" with "+toString(signal_dest->_direction)+").")); + + + // Multi consumer is authorized , no to multi producer! + bool source_have_multi_consumer = (signal_src ->_connect_to_signal != NULL); +// bool destination_have_multi_producer = (signal_dest->_connect_from_signal != NULL) and (signal_dest_is_port == false); +// if (destination_have_multi_producer) +// // throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\" can't been linked with signal \""+signal_dest->get_name()+"\" : destination have multi producer.")); +// log_printf(NONE,Behavioural,FUNCTION,"Signal \"%s\" can't been linked with signal \"%s\" : destination have multi producer.",_name.c_str(),signal_dest->get_name().c_str()); // update info source - signal_src ->_connect_to_signal = signal_dest; - signal_src ->_is_map_as_src = true; + signal_src ->_connect_to_signal = signal_dest; + signal_src ->_is_map_as_component_src = true; + + // update info destination + if (signal_dest_is_port == true) + signal_dest->_is_map_as_toplevel_dest = true; // because toplevel port can't be a source + else + // signal_dest is a internal signal + if (signal_src->_direction == OUT) + signal_dest->_is_map_as_component_dest = true; + else + signal_dest->_is_map_as_component_src = true; - // update info destination - signal_dest->_connect_from_signal = signal_src; - signal_dest->_is_map_as_dest = true; - // an internal signal and port can't be a source. // also, to fill the connect_to_signal's field - if ((signal_src->_direction == OUT) and - (signal_dest->_direction == INTERNAL)) - { - signal_dest->_connect_to_signal = signal_src; - } + if (signal_dest->_direction == INTERNAL) + if (signal_src->_direction == OUT) + signal_dest->_connect_from_signal = signal_src; + else + signal_dest->_connect_to_signal = signal_src; + else + signal_dest->_connect_from_signal = signal_src; + + // vhdl_testbench : to read an output producte by a internal component @@ -66,6 +84,8 @@ (signal_src ->_direction == OUT)) signal_dest->_sc_signal_map = signal_src ->_sc_signal_map; - - connect (signal_dest); + + // A signal can be connect once + if (not source_have_multi_consumer) + connect (signal_dest); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp (revision 78) @@ -14,32 +14,42 @@ #undef FUNCTION #define FUNCTION "Signal::test_map" - bool Signal::test_map (bool top_level) + bool Signal::test_map (uint32_t depth, bool top_level) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - log_printf(INFO,Behavioural,FUNCTION, " * Signal \"%s\"",_name.c_str()); - - bool _return = false; + std::string str = ""; + std::string tab = std::string(depth,'\t'); +// log_printf(NONE,Behavioural,FUNCTION, "%s* Signal \"%s\"",tab.c_str(),_name.c_str()); +// log_printf(NONE,Behavioural,FUNCTION, "%s%d - %d - %d",tab.c_str(), +// _is_map_as_toplevel_dest, +// _is_map_as_component_src, +// _is_map_as_component_dest); + bool _return = true; if (top_level == true) { - _return = _is_map_as_dest; - switch (_direction) { case morpheo::behavioural::IN : { - if (_return == false) - std::cerr << "Signal \"" << _name << "\" is not mapped with an outpout port or a component." << std::endl; + if (_is_map_as_toplevel_dest == false) + { + _return = false; + + str = "Signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + } break; } case morpheo::behavioural::OUT : { - if (_return == false) - std::cerr << "Signal \"" << _name << "\" is not mapped with an input port or a component." << std::endl; + if (_is_map_as_toplevel_dest == false) + { + _return = false; + str = "Signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + } break; } - //case morpheo::behavioural::INTERNAL : return "internal" ; break; - //case morpheo::behavioural::INOUT : return "inout" ; break; + //case morpheo::behavioural::INTERNAL : + //case morpheo::behavioural::INOUT : default : break; } @@ -47,16 +57,72 @@ else { - _return = _is_map_as_src and _is_map_as_dest; + // internal signal : + // Component --- I/O (as_src) + // Component --- Component (as_src and as_dest) - if (_return == false) + switch (_direction) { - if (_is_map_as_src == false) - std::cerr << "Signal \"" << _name << "\" is not mapped as source" << std::endl; - if (_is_map_as_dest == false) - std::cerr << "Signal \"" << _name << "\" is not mapped as destination" << std::endl; + case morpheo::behavioural::IN : + { + if (_is_map_as_component_src == false) + { + _return = false; + + str = "Signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + } + break; + } + case morpheo::behavioural::OUT : + { + if (_is_map_as_component_src == false) + { + _return = false; + + str = "Signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + } + break; + } + case morpheo::behavioural::INTERNAL : + { + if (_is_map_as_component_src == false) + { + _return = false; + + str = "Internal signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + } + + if (_is_map_as_component_dest == false) + { + if (_return == false) + str+="\n"; + + _return = false; + + str += "Internal signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + } + + break; + } + //case morpheo::behavioural::INOUT : + default : break; } } log_printf(FUNC,Behavioural,FUNCTION,"End"); + + + + if (_return == false) + { + log_printf(NONE,Behavioural,FUNCTION, "%s* %s",tab.c_str(),str.c_str()); + +#ifndef DEBUG + std::cerr << str << std::endl; +#endif + } + else + { +// log_printf(NONE,Behavioural,FUNCTION, "%s* Signal \"%s\" is OK.",tab.c_str(),_name.c_str()); + } return _return; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp (revision 78) @@ -4,5 +4,8 @@ namespace morpheo { namespace behavioural { - void Stat::create_expr (std::string varname, std::string expr, bool each_cycle) + + void Stat::create_expr (std::string varname, + std::string expr, + bool each_cycle) { if (is_valid_var (varname)) @@ -17,4 +20,33 @@ _list_expr->push_back(expression); } + + void Stat::create_expr_average (std::string varname, + std::string expr_sum, + std::string expr_deps, + std::string unit, + std::string description) + { + create_counter(varname,unit,description); + create_expr (varname, "/ "+expr_sum+" "+expr_deps, false); + } + + void Stat::create_expr_average_by_cycle (std::string varname, + std::string expr_sum, + std::string unit, + std::string description) + { + create_expr_average (varname, expr_sum, "cycle", unit, description); + } + + void Stat::create_expr_percent (std::string varname, + std::string expr_sum, + std::string expr_max, + std::string description) + { + create_counter(varname,"%",description); + create_expr (varname, "/ * "+expr_sum+" 100 "+expr_max, false); + } + + }; }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_string2tree.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_string2tree.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_string2tree.cpp (revision 78) @@ -9,6 +9,4 @@ Stat_binary_tree * Stat::string2tree (std::string expr) { - std::cout << "expr : " << expr << std::endl; - const std::string delims (" "); // délimiteur : " " const std::string numbers ("0123456789"); // délimiteur : " " Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Test.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Test.cpp (revision 78) @@ -0,0 +1,26 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Parameters.h" + + +namespace morpheo { +namespace behavioural { + + bool is_natural (double val ) { return ( (val >= 0) && (floor(val) == ceil(val)));}; + bool is_positive (double val ) { return ( (val >= 1) && (floor(val) == ceil(val)));}; + bool is_power2 (uint32_t val) { return is_natural(::log2(static_cast(val)));}; + bool is_multiple (uint32_t val1, + uint32_t val2) { return is_positive((1.0*val1)/(1.0*val2));}; + bool is_between_inclusive (uint32_t val, + uint32_t min, + uint32_t max) { return ((val >= min) && (val <= max));}; + bool is_between_exclusive (uint32_t val, + uint32_t min, + uint32_t max) { return ((val > min) && (val < max));}; +}; // end namespace behavioural +}; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_get_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_get_body.cpp (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_get_body.cpp (revision 78) @@ -27,5 +27,5 @@ std::string tabulation = indent(depth); -// body.insert(0,tabulation); + body.insert(0,tabulation); for (size_t pos=body.find('\n',0); pos #include + +std::string debug_tab (void); +void debug_function_begin (std::string component, std::string function); +void debug_function_end (std::string component, std::string function); // Debug's Level : @@ -27,6 +31,5 @@ #ifdef DEBUG -//Debug -# define log_printf(level, component, func, str... ) \ +# define log_printf(level, component, func, str... ) \ do \ { \ @@ -36,4 +39,5 @@ ( DEBUG_ ## component == true )) ) \ { \ + msg(_("%s"),debug_tab().c_str()); \ if (DEBUG >= DEBUG_ALL ) \ { \ @@ -48,11 +52,11 @@ } \ } \ - msg(_("<%s> "),func); \ if (DEBUG >= DEBUG_FUNC) \ { \ + msg(_("<%s> "),func); \ msg(_("In file %s, "),__FILE__); \ - msg(_("at line %d, "),__LINE__); \ + msg(_("at line %d " ),__LINE__); \ + msg(_(": ")); \ } \ - msg(_(": ")); \ msg(str); \ msg(_("\n")); \ @@ -60,14 +64,9 @@ } \ } while(0) - #else -// No debug - -# define log_printf(level, component, func, str... ) \ -do \ -{ \ -} while(0) - +# define log_printf(level, component, func, str... ) \ + do \ + { \ + } while(0) #endif // DEBUG - #endif // !DEBUG_H Index: trunk/IPs/systemC/processor/Morpheo/Common/include/FromString.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/FromString.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/FromString.h (revision 78) @@ -17,12 +17,17 @@ namespace morpheo { - template inline T fromString (const std::string& x) + template inline T fromString (const std::string& x) { return static_cast(x.c_str()); } - template<> inline int fromString (const std::string& x) + template<> inline uint32_t fromString (const std::string& x) { - return atoi(x.c_str()); + return static_cast(atoi(x.c_str())); + } + + template<> inline bool fromString (const std::string& x) + { + return atoi(x.c_str())!=0; } Index: trunk/IPs/systemC/processor/Morpheo/Common/include/Max.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/Max.h (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/Max.h (revision 78) @@ -0,0 +1,30 @@ +#ifndef morpheo_max +#define morpheo_max + +/* + * $Id$ + * + * with a stephane dubuisson initial idea + * + * [ Description ] + * + */ + +#include + +namespace morpheo { + + template inline T max (const T * x, uint32_t size1) + { + T res = 0; + + for (uint32_t i=0; i(sc_simulation_time()); - double average = static_cast(nb_cycles) / static_cast(time_end.tv_sec-x.time_begin.tv_sec); + double average = static_cast(nb_cycles) / static_cast(time_end.tv_sec-x.time_begin.tv_sec+1); - output_stream << nb_cycles << "\t(" << average << " cycles / seconds )" << std::endl; + output_stream << "Timing : " << nb_cycles << " cycles \t(" << average << " cycles/s)" << std::endl; return output_stream; Index: trunk/IPs/systemC/processor/Morpheo/Common/include/ToString.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/ToString.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/ToString.h (revision 78) @@ -58,45 +58,45 @@ } -// template<> inline std::string toString< int8_t> (const int8_t& x) -// { -// std::ostringstream out(""); -// out << x; -// return out.str(); -// } + template<> inline std::string toString< int8_t> (const int8_t& x) + { + std::ostringstream out(""); + out << static_cast< int32_t>(x); + return out.str(); + } -// template<> inline std::string toString (const uint8_t& x) -// { -// std::ostringstream out(""); -// out << x; -// return out.str(); -// } + template<> inline std::string toString (const uint8_t& x) + { + std::ostringstream out(""); + out << static_cast(x); + return out.str(); + } -// template<> inline std::string toString< int16_t> (const int16_t& x) -// { -// std::ostringstream out(""); -// out << x; -// return out.str(); -// } + template<> inline std::string toString< int16_t> (const int16_t& x) + { + std::ostringstream out(""); + out << static_cast< int32_t>(x); + return out.str(); + } -// template<> inline std::string toString (const uint16_t& x) -// { -// std::ostringstream out(""); -// out << x; -// return out.str(); -// } + template<> inline std::string toString (const uint16_t& x) + { + std::ostringstream out(""); + out << static_cast(x); + return out.str(); + } -// template<> inline std::string toString< int32_t> (const int32_t& x) -// { -// std::ostringstream out(""); -// out << x; -// return out.str(); -// } + template<> inline std::string toString< int32_t> (const int32_t& x) + { + std::ostringstream out(""); + out << x; + return out.str(); + } -// template<> inline std::string toString (const uint32_t& x) -// { -// std::ostringstream out(""); -// out << x; -// return out.str(); -// } + template<> inline std::string toString (const uint32_t& x) + { + std::ostringstream out(""); + out << x; + return out.str(); + } }; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h (revision 78) @@ -16,5 +16,6 @@ // Definition of type -#if ( defined(SC_CLOCK) || defined(SC_INTERNAL) || defined(SC_SIGNAL) || defined(SC_REGISTER) || defined(SC_IN) || defined(SC_OUT) ) +//#if ( defined(SC_CLOCK) || defined(SC_INTERNAL) || defined(SC_SIGNAL) || defined(SC_REGISTER) || defined(SC_IN) || defined(SC_OUT) ) +#if ( defined(SC_CLOCK) || defined(SC_IN) || defined(SC_OUT) ) # error "A type is already defined" #endif @@ -23,18 +24,18 @@ # error "Action is already defined" #endif -#if ( defined(INTERNAL_READ) || defined(INTERNAL_WRITE) ) -# error "Action is already defined" -#endif -#if ( defined(SIGNAL_READ) || defined(SIGNAL_WRITE) ) -# error "Action is already defined" -#endif -#if ( defined(REGISTER_READ) || defined(REGISTER_WRITE) ) -# error "Action is already defined" -#endif +// #if ( defined(INTERNAL_READ) || defined(INTERNAL_WRITE) ) +// # error "Action is already defined" +// #endif +// #if ( defined(SIGNAL_READ) || defined(SIGNAL_WRITE) ) +// # error "Action is already defined" +// #endif +// #if ( defined(REGISTER_READ) || defined(REGISTER_WRITE) ) +// # error "Action is already defined" +// #endif #define SC_CLOCK sc_in_clk -#define SC_INTERNAL(type) type -#define SC_REGISTER(type) sc_signal -#define SC_SIGNAL(type) sc_signal +// #define SC_INTERNAL(type) type +// #define SC_REGISTER(type) sc_signal +// #define SC_SIGNAL(type) sc_signal #define SC_IN(type) sc_in #define SC_OUT(type) sc_out @@ -42,10 +43,10 @@ #define PORT_READ(sig) sig->read() #define PORT_WRITE(sig,val) sig->write(val) -#define INTERNAL_READ(sig) (*sig) -#define INTERNAL_WRITE(sig,val) (*sig) = val -#define SIGNAL_READ(sig) sig->read() -#define SIGNAL_WRITE(sig,val) sig->write(val) -#define REGISTER_READ(sig) sig->read() -#define REGISTER_WRITE(sig,val) sig->write(val) +// #define INTERNAL_READ(sig) (*sig) +// #define INTERNAL_WRITE(sig,val) (*sig) = val +// #define SIGNAL_READ(sig) sig->read() +// #define SIGNAL_WRITE(sig,val) sig->write(val) +// #define REGISTER_READ(sig) sig->read() +// #define REGISTER_WRITE(sig,val) sig->write(val) #endif Index: trunk/IPs/systemC/processor/Morpheo/Common/src/Debug.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/src/Debug.cpp (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Common/src/Debug.cpp (revision 78) @@ -0,0 +1,23 @@ +#include "Common/include/Debug.h" + +static uint32_t _debug_depth = 0; + + +std::string debug_tab (void) +{ + return std::string(_debug_depth,'\t'); +} + +void debug_function_begin (std::string component, std::string function) +{ + _debug_depth ++; + + log_printf(FUNC,true,function.c_str(),"%sBegin",debug_tab().c_str()); +} + +void debug_function_end (std::string component, std::string function) +{ + log_printf(FUNC,true,function.c_str(),"%sEnd",debug_tab().c_str()); + + _debug_depth --; +} Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Documents/presentation-2008_02_25/fr/root.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Documents/presentation-2008_02_25/fr/root.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Documents/presentation-2008_02_25/fr/root.tex (revision 78) @@ -0,0 +1,246 @@ +\section{Vue d'ensemble} + +\slidetitle{Vue d'ensemble} +{ + \printgraph{MORPHEO_micro_architecture-overview}{0.48} +} +{ +} + +\slidetitle{Avancement} +{ + \printgraph{MORPHEO_micro_architecture-overview-20080225}{0.48} + +} +{ +} + +\section{Statistiques} + +\slidetitle{Statistiques} +{ + Refonte complète de la manière de générer les statistiques. + \begin{description} + \item[Déclaration]~ + \begin{itemize} + \item Stat * \_stat; + \item counter\_t * \_nb\_inst; + \end{itemize} + \item[Construction / Destruction]~\\ + La classe {\it Stat} à 4 paramètres : + \begin{enumerate} + \item Nom de l'instance + \item Nom du composant + \item Nombre de cycles à ignorer avant l'évaluation des statistiques + \item Période entre deux statistiques + \end{enumerate} + Lors de la destruction de l'objet, un fichier de statistiques au format XML est généré. + \end{description} +} +{ +} + +\slide +{ + \begin{description} + \item[Compteur]~ + \begin{itemize} + \item \_nb\_inst = \_stat $->$ create\_variable\\("nb\_inst"); + \item \_average\_inst = \_stat $->$ create\_counter\\("average\_inst", "IPC", "Instructions by cycle"); + \item \_stat $->$create\_expr\\("average\_inst", "/ nb\_inst cycle", false); + \end{itemize} + \item[Run time]~ + \begin{itemize} + \item (* \_nb\_inst) ++ ; + \item A la fin de chaque fonction de transition de chaque composant : \_stat $->$ end\_cycle(); + \end{itemize} + \item[Composant interne]~ + \begin{itemize} + \item \_stat $->$ add\_stat (component $->$ \_stat);\\ + Le fichier de statistiques du "top level" contiendra les statistiques des composants internes. + \end{itemize} + \end{description} +} +{ +} + +\section{Zoom sur ...} + +\subsection{Custom unit} +\slidetitle{Custom unit} +{ + La norme OpenRISC propose : + \begin{itemize} + \item 14 codes opérations réservés + \begin{itemize} + \item 8 ORBIS. + \item 2 ORFPX (1 simple précision et 1 double précision). + \item 4 ORVDX. + \end{itemize} + \item 8 groupes pour les registres spéciaux + \item 7 exceptions réservées + \end{itemize} +} +{ +} + +\slidetitle{Nos limitations} +{ + \begin{itemize} + \item Une instruction custom ne cible qu'un seul groupe custom. + \item Un groupe ne peut être instancier qu'une seule fois par thread. + \item L'interface de l'unité custom est fixe. + \item Les unités custom peuvent générer n'importe quelles exceptions custom (plus l'exception "RANGE"). + \item Seule une exécution d'opération custom provoque des exceptions. + \end{itemize} +} +{ +} + +\slidetitle{Implémentation} +{ + L'utilisateur doit fournir au composant "Execute\_loop" un pointeur sur une fonction dont le prototype est : + + \begin{itemize} + \item custom\_information\_t {\it get\_information} (int context); + \end{itemize} + + custom\_information\_t est une structure qui regroupe plusieurs pointeurs de fonction. +} +{ +} + +\slide +{ + + \begin{itemize} + \item bool {\it get\_valid\_group } (int gpr); + \item int {\it get\_nb\_register } (int gpr); + \item access\_mode\_t {\it get\_mode } (int gpr, int reg); + \item custom\_decod\_t * {\it get\_decod } (Toperation\_t op); + \item custom\_execute\_transition\_t * {\it get\_execute\_reset } (int gpr); + \item custom\_execute\_transition\_t * {\it get\_execute\_transition} (int gpr); + \item custom\_execute\_genMoore\_t * {\it get\_execute\_genMoore } (Toperation\_t op); + \item custom\_vhdl\_t * {\it get\_vhdl\_decod } (void); + \item custom\_vhdl\_t * {\it get\_vhdl\_execute } (void); + \end{itemize} +} +{ +} + +\subsection{Morpheo v1} +\slidetitle{Morpheo v1} +{ + \printgraph{MORPHEO_overview}{0.67} +} +{ +} + +\subsection{Load Store Unit} +\slidetitle{Load Store Unit} +{ + \begin{itemize} + \item MORPHEO v1 : perte de performance du à la gestion de la Load Store Unit. + \begin{itemize} + \item Load Store Unit est placé dans la OOO\_Engine : insertion in-order. + \item Le calcul d'adresse est réalisé par les ALU. + \item Lancement tardif des lectures. + \end{itemize} + \item Modèle mémoire : weakly ordered.\\Présence d'instruction de synchronisation. + \item Si mémoire virtuelle : Bit WOM (Weakly-Ordered-Memory)\\(si = 0, load/store in-order sans prefetch). + \end{itemize} + + + % Graphe expliquant l'implémentation de la LSU de la v1 +} +{ +} + +\slidetitle{Augmenter la performance (1)} +{ + \begin{itemize} + \item Insertion dans le LSU out-of-order + \begin{description} + \item [Comment ?] Gestion des pointeurs dans le OOO\_Engine + \item [Pourquoi ?] La LSU peut être placer dans l'Execute\_loop (au coeur de la boucle Read / Write). + \end{description} + \end{itemize} + + \printgraph{MORPHEO_component-load_store_queue-ooo}{1} +} +{ +} + + +\slidetitle{Augmenter la performance (2)} +{ + \begin{itemize} + \item Lectures spéculatives : Lancer la lecture avant de vérifier les dépendances avec des stores précédents. + \begin{description} + \item [Comment ?] Accès au cache dès réceptions de la lecture. Ajout d'une file d'attente qui va attendre puis vérifier les dépendence avec les stores. + \item [Pourquoi ?] Dépendances RAW entre accès mémoires relativement rare. + \end{description} + \end{itemize} + + \printgraph{MORPHEO_component-load_store_queue-load_speculative}{1} +} +{ +} + +\slidetitle{Augmenter la performance (3)} +{ + \begin{itemize} + \item Commit spéculatif des lectures. + \begin{description} + \item [Comment ?] Ecrire le résultat dans le banc de registres dès réceptions de la réponse. + \item [Pourquoi ?] Diminuer la surface de la store queue : vérifier des dépendances sur plusieurs cycles. + \end{description} + \end{itemize} + + \printgraph{MORPHEO_component-load_store_queue-commit_speculative}{1} +} +{ +} + +\slidetitle{Augmenter la performance (4)} +{ + \begin{itemize} + \item Bypass du résultat des lectures + \begin{description} + \item [Comment ?] Ajouter le contenu de la check queue au réseau de bypass. + \item [Pourquoi ?] Augmenter la performance. + \end{description} + \end{itemize} + + \printgraph{MORPHEO_component-load_store_queue-commit_speculative_bypass}{1} +} +{ +} + +\subsection{Rename Unit} +\slidetitle{Rename Unit} +{ + \begin{itemize} + \item Unité qui demande beaucoup de structure multi accès + \item Remplacement des structures à N accès par M strutures à 1 accès (M multiple de N) + \end{itemize} + + \printgraph{MORPHEO_component-free_list}{1} +} +{ +} + +\section{Etapes suivantes} +\slidetitle{Etapes suivantes} +{ + \begin{enumerate} + \item Finir systemC + \item Test ``limité'' + \item Cache non bloquant : wrapper plusieurs xcache + \item Test sur plate-forme réel + \item VHDL + \item Test avec la plate-forme précédente + \end{enumerate} +} +{ +} Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/doc-style.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/doc-style.sty (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/doc-style.sty (revision 78) @@ -3,5 +3,5 @@ \usepackage{makeidx} \usepackage{palatino} -\usepackage{fancyheadings} +%\usepackage{fancyheadings} \usepackage{float} \usepackage{verbatim} Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty (revision 78) @@ -39,8 +39,8 @@ } - \newcommand{\slidetitle}[3] - { - \slide{\frametitle{#1}#2}{#3} - } +\newcommand{\slidetitle}[3] + { + \slide{\frametitle{#1}#2}{#3} + } \newcommand{\Contents} Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.lang =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.lang (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.lang (revision 78) @@ -0,0 +1,1 @@ +fr Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.sty (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.sty (revision 78) @@ -0,0 +1,14 @@ +\def\review{2008/02/25} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Etat des lieux} + +\institute{Département SOC - Laboratoire d'informatique de Paris VI - France} + +\author{Mathieu Rosière\newline + encadrement :\newline + Nathalie Drach-Temam\newline + Jean-Lou Desbarbieux\newline + Franck Wajsbürt} + +\date{\review} Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.tex (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.tex (revision 78) @@ -0,0 +1,6 @@ +%\documentclass{article} +\documentclass{beamer} + +\usepackage{beamerthemetree} + +%\setbeameroption{show notes on second screen} Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.type =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.type (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-2008_02_25.type (revision 78) @@ -0,0 +1,1 @@ +ppt Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-internal_seminary_overview.tex =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-internal_seminary_overview.tex (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-internal_seminary_overview.tex (revision 78) @@ -2,7 +2,2 @@ \documentclass{beamer} \usepackage{beamerthemetree} - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Link/presentation-2008_02_25-fr =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Link/presentation-2008_02_25-fr (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Link/presentation-2008_02_25-fr (revision 78) @@ -0,0 +1,1 @@ +link ../Documents/presentation-2008_02_25/fr/ Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile (revision 78) @@ -133,5 +133,5 @@ done; \ declare -i NUM_TYPE; \ - $(READ) NUM_TYPE; \ + read NUM_TYPE; \ \ if $(TEST) "$$NUM_TYPE" -ge "$$CPT"; then \ @@ -143,10 +143,10 @@ $(ECHO) ""; \ $(ECHO) "Give the name of the documents :"; \ - $(READ) FILENAME; \ + read FILENAME; \ \ if $(TEST) -z "$$FILENAME" -o -d "$(DIR_TYPE)/$$FILENAME.type"; \ then \ $(ECHO) "Invalid name : string is empty, or filename is already used"; \ - exit; \ + exit; \ fi; \ \ @@ -194,5 +194,5 @@ CPT=$$(($$CPT+1)); \ done; \ - $(READ) NUM_FILE; \ + read NUM_FILE; \ \ if $(TEST) "$$NUM_FILE" -ge "$$CPT"; then \ @@ -201,5 +201,5 @@ \ $(ECHO) "Please reenter the document id to confirm the delete"; \ - $(READ) NUM_FILE_CONFIRM; \ + read NUM_FILE_CONFIRM; \ \ if $(TEST) "$$NUM_FILE" -eq "0" -o "$$NUM_FILE" -ne "$$NUM_FILE_CONFIRM"; then \ @@ -245,5 +245,5 @@ CPT=$$(($$CPT+1)); \ done; \ - $(READ) NUM_FILE; \ + read NUM_FILE; \ \ if $(TEST) "$$NUM_FILE" -ge "$$CPT"; then \ @@ -261,5 +261,5 @@ \ $(ECHO) "Give the new name of the documents :"; \ - $(READ) FILENAME_DEST; \ + read FILENAME_DEST; \ \ if $(TEST) -z "$$FILENAME_DEST" -o -d "$(DIR_TYPE)/$$FILENAME_DEST.type"; \ @@ -277,4 +277,7 @@ $(ECHO) "Rename file : $(DIR_PACKAGE)/$$FILENAME_SRC.sty"; \ $(MV) $(DIR_PACKAGE)/$$FILENAME_SRC.sty $(DIR_PACKAGE)/$$FILENAME_DEST.sty; \ + \ + $(ECHO) "Rename file : $(DIR_PACKAGE)/$$FILENAME_SRC.tex"; \ + $(MV) $(DIR_PACKAGE)/$$FILENAME_SRC.tex $(DIR_PACKAGE)/$$FILENAME_DEST.tex; \ \ $(ECHO) "Rename directory : $(DIR_DOCUMENTS)/$$FILENAME_SRC"; \ @@ -310,5 +313,5 @@ CPT=$$(($$CPT+1)); \ done; \ - $(READ) NUM_FILE; \ + read NUM_FILE; \ \ if $(TEST) "$$NUM_FILE" -ge "$$CPT"; then \ @@ -333,5 +336,5 @@ CPT=$$(($$CPT+1)); \ done; \ - $(READ) NUM_LANG; \ + read NUM_LANG; \ \ if $(TEST) "$$NUM_LANG" -ge "$$CPT"; then \ @@ -359,5 +362,5 @@ CPT=$$(($$CPT+1)); \ done; \ - $(READ) NUM_FORMAT; \ + read NUM_FORMAT; \ \ if $(TEST) "$$NUM_FORMAT" -ge "$$CPT"; then \ @@ -412,5 +415,5 @@ @\ $(ECHO) "Generate files : $*.eps"; \ - $(CD) $(DIR_GRAPH); $(GNUPLOT) $*.p; + cd $(DIR_GRAPH); $(GNUPLOT) $*.p; #-------------------------------------------------------------------------------- Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-free_list.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-free_list.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-free_list.fig (revision 78) @@ -0,0 +1,149 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 2250 4680 2610 5400 +2 1 0 1 0 7 50 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0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3870 4500 3870 4680 +-6 +6 4410 3960 4770 4680 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4455 4140 4455 4320 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4680 3960 4680 4320 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 4410 4320 4770 4320 4770 4500 4410 4500 4410 4320 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 4410 4320 4590 4500 4770 4320 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4590 4500 4590 4680 +-6 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 4050 5760 4410 5760 4410 5940 4050 5940 4050 5760 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 4050 5760 4230 5940 4410 5760 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3870 5400 4140 5760 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4590 5400 4320 5760 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4230 5940 4230 6300 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4680 3960 1890 3960 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 1890 4140 4455 4140 +4 2 0 50 -1 0 6 0.0000 0 75 285 3780 5535 "10" &\001 +4 2 0 50 -1 0 6 0.0000 0 75 285 4410 5535 "11" &\001 +4 2 0 50 -1 0 8 0.0000 0 120 375 1710 3960 push [0]\001 +4 2 0 50 -1 0 8 0.0000 0 120 375 1710 4140 push [1]\001 +4 1 0 50 -1 0 8 0.0000 0 120 330 2790 6480 pop [0]\001 +4 1 0 50 -1 0 8 0.0000 0 120 300 4230 6480 pop[1]\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-commit_speculative.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-commit_speculative.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-commit_speculative.fig (revision 78) @@ -0,0 +1,101 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 1890 4320 2430 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 1890 4320 2430 4320 2430 4590 1890 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2250 4320 2250 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2070 4320 2070 4590 +-6 +6 2790 4590 3330 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2790 4590 3330 4590 3330 4860 2790 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 4590 3150 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2970 4590 2970 4860 +-6 +6 4590 4320 5130 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 4590 4320 5130 4320 5130 4590 4590 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4950 4320 4950 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4770 4320 4770 4590 +-6 +6 2790 4050 3330 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2790 4050 3330 4050 3330 4320 2790 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 4050 3150 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2970 4050 2970 4320 +-6 +6 3690 4590 4230 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 3690 4590 4230 4590 4230 4860 3690 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4050 4590 4050 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3870 4590 3870 4860 +-6 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2430 4455 2790 4185 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2430 4455 2790 4725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3330 4725 3690 4725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4230 4725 4590 4455 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4275 4230 4275 4590 4455 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 3960 4590 3960 4455 3330 4455 3240 4275 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4455 3150 4455 3060 4275 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3150 4455 2970 4455 2880 4275 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3465 4050 3465 3690 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3330 4140 3465 4050 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 3330 4680 3465 4590 3465 4050 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3555 3690 3555 4590 3690 4680 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3555 4095 3338 4243 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3555 4095 4230 4095 4590 4455 +4 1 0 50 -1 0 8 0.0000 0 90 600 2160 4725 Reservation\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 5130 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 90 360 2160 4860 Station\001 +4 1 0 50 -1 0 8 0.0000 0 90 300 4860 4770 Write\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 4860 4905 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 285 3060 3780 Store\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 3930 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 240 3060 4995 Load\001 +4 2 8 50 -1 0 8 0.0000 0 105 480 3420 3600 cache req\001 +4 0 8 50 -1 0 8 0.0000 0 105 465 3600 3600 cache rsp\001 +4 1 0 50 -1 0 8 0.0000 0 75 330 3960 4995 Check\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3960 5130 Queue\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-commit_speculative_bypass.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-commit_speculative_bypass.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-commit_speculative_bypass.fig (revision 78) @@ -0,0 +1,120 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 1890 4320 2430 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 1890 4320 2430 4320 2430 4590 1890 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2250 4320 2250 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2070 4320 2070 4590 +-6 +6 2790 4590 3330 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2790 4590 3330 4590 3330 4860 2790 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 4590 3150 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2970 4590 2970 4860 +-6 +6 4590 4320 5130 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 4590 4320 5130 4320 5130 4590 4590 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4950 4320 4950 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4770 4320 4770 4590 +-6 +6 2790 4050 3330 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2790 4050 3330 4050 3330 4320 2790 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 4050 3150 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2970 4050 2970 4320 +-6 +6 3690 4590 4230 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 3690 4590 4230 4590 4230 4860 3690 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4050 4590 4050 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3870 4590 3870 4860 +-6 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2430 4455 2790 4185 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2430 4455 2790 4725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3330 4725 3690 4725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4230 4725 4590 4455 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4275 4230 4275 4590 4455 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 3960 4590 3960 4455 3330 4455 3240 4275 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4455 3150 4455 3060 4275 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3150 4455 2970 4455 2880 4275 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3465 4050 3465 3690 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3330 4140 3465 4050 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 3330 4680 3465 4590 3465 4050 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3555 3690 3555 4590 3690 4680 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3555 4140 3338 4243 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4140 4725 4140 5310 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3960 4725 3960 5310 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3780 4725 3780 5310 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4140 5310 2790 5310 2340 4500 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 2790 5310 2610 5310 2160 4500 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 2610 5310 2430 5310 1980 4500 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3555 4140 4275 4140 4590 4455 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 5130 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 90 300 4860 4770 Write\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 4860 4905 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 285 3060 3780 Store\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 3930 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 240 3060 4995 Load\001 +4 2 8 50 -1 0 8 0.0000 0 105 480 3420 3600 cache req\001 +4 0 8 50 -1 0 8 0.0000 0 105 465 3600 3600 cache rsp\001 +4 1 0 50 -1 0 8 0.0000 0 90 360 2160 4275 Station\001 +4 1 0 50 -1 0 8 0.0000 0 90 600 2160 4140 Reservation\001 +4 1 0 50 -1 0 6 0.0000 0 90 645 3510 5445 bypass network\001 +4 1 0 50 -1 0 8 0.0000 0 75 330 4410 4995 Check\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 4410 5130 Queue\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-load_speculative.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-load_speculative.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-load_speculative.fig (revision 78) @@ -0,0 +1,98 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 1890 4320 2430 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 1890 4320 2430 4320 2430 4590 1890 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2250 4320 2250 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2070 4320 2070 4590 +-6 +6 2790 4590 3330 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2790 4590 3330 4590 3330 4860 2790 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 4590 3150 4860 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2970 4590 2970 4860 +-6 +6 4590 4320 5130 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 4590 4320 5130 4320 5130 4590 4590 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4950 4320 4950 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4770 4320 4770 4590 +-6 +6 2790 4050 3330 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2790 4050 3330 4050 3330 4320 2790 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 4050 3150 4320 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2970 4050 2970 4320 +-6 +6 3690 4590 4230 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 3690 4590 4230 4590 4230 4860 3690 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4050 4590 4050 4860 +2 1 0 1 4 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3870 4590 3870 4860 +-6 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2430 4455 2790 4185 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2430 4455 2790 4725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3330 4725 3690 4725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4230 4725 4590 4455 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4275 4230 4275 4590 4455 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 3960 4590 3960 4455 3330 4455 3240 4275 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4455 3150 4455 3060 4275 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3150 4455 2970 4455 2880 4275 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3465 4050 3465 3690 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3330 4140 3465 4050 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 3330 4680 3465 4590 3465 4050 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3555 3690 3555 4590 3690 4680 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3563 4108 3338 4243 +4 1 0 50 -1 0 8 0.0000 0 90 600 2160 4725 Reservation\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 5130 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 90 360 2160 4860 Station\001 +4 1 0 50 -1 0 8 0.0000 0 90 300 4860 4770 Write\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 4860 4905 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 285 3060 3780 Store\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 3930 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 240 3060 4995 Load\001 +4 1 0 50 -1 0 8 0.0000 0 75 330 3960 4995 Check\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3960 5145 Queue\001 +4 2 8 50 -1 0 8 0.0000 0 105 480 3420 3600 cache req\001 +4 0 8 50 -1 0 8 0.0000 0 105 465 3600 3600 cache rsp\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-ooo.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-ooo.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_component-load_store_queue-ooo.fig (revision 78) @@ -0,0 +1,85 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 1890 4320 2430 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 1890 4320 2430 4320 2430 4590 1890 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2250 4320 2250 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2070 4320 2070 4590 +-6 +6 3870 4320 4410 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 3870 4320 4410 4320 4410 4590 3870 4590 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4230 4320 4230 4590 +2 1 0 1 0 7 50 -1 -1 0.000 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50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3150 4455 2970 4455 2880 4275 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3465 4050 3465 3690 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3330 4140 3465 4050 +2 1 0 1 8 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 3330 4680 3465 4590 3465 4050 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3555 3690 3555 4635 3330 4770 +2 1 0 1 8 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3563 4108 3338 4243 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3330 4815 3690 4815 3870 4455 +4 1 0 50 -1 0 8 0.0000 0 90 600 2160 4725 Reservation\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 5130 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 90 360 2160 4860 Station\001 +4 1 0 50 -1 0 8 0.0000 0 75 285 3060 3780 Store\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 3060 3930 Queue\001 +4 1 0 50 -1 0 8 0.0000 0 75 240 3060 4995 Load\001 +4 2 8 50 -1 0 8 0.0000 0 105 480 3420 3600 cache req\001 +4 0 8 50 -1 0 8 0.0000 0 105 465 3600 3600 cache rsp\001 +4 1 0 50 -1 0 8 0.0000 0 90 300 4140 4725 Write\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 4140 4860 Queue\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview-20080225.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview-20080225.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview-20080225.fig (revision 78) @@ -0,0 +1,176 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 1890 3690 2610 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 2610 4140 1890 4140 1890 3690 2610 3690 2610 4140 +4 1 0 50 -1 -1 12 0.0000 4 165 345 2250 4050 port\001 +4 1 0 50 -1 -1 12 0.0000 4 150 570 2250 3870 icache\001 +-6 +6 2970 3690 3690 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 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2610 7470 2610 7470 4320 +2 4 0 1 0 7 50 -1 20 3.000 0 0 8 0 0 5 + 8010 2880 8010 4320 7650 4320 7650 2880 8010 2880 +2 4 0 1 0 4 50 -1 20 4.000 0 0 7 0 0 5 + 2160 5310 1800 5310 1800 5130 2160 5130 2160 5310 +2 4 0 1 0 4 50 -1 20 4.000 0 0 7 0 0 5 + 11970 5040 11970 4680 8370 4680 8370 5040 11970 5040 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 2160 5040 1800 5040 1800 4860 2160 4860 2160 5040 +2 4 0 1 0 1 50 -1 20 3.000 0 0 7 0 0 5 + 9630 3510 9630 4320 9270 4320 9270 3510 9630 3510 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 10530 4410 9810 4410 9810 3960 10530 3960 10530 4410 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 10530 3870 9810 3870 9810 3420 10530 3420 10530 3870 +2 4 0 1 0 1 50 -1 20 3.000 0 0 7 0 0 5 + 11070 3510 11070 4320 10710 4320 10710 3510 11070 3510 +2 4 0 0 0 1 49 -1 20 2.000 0 0 7 0 0 5 + 5490 4140 5490 3690 5130 3690 5130 4140 5490 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 5490 4140 4770 4140 4770 3690 5490 3690 5490 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 4590 3510 3870 3510 3870 3060 4590 3060 4590 3510 +2 4 0 0 0 4 49 -1 20 2.000 0 0 7 0 0 5 + 4230 3060 4230 3510 4590 3510 4590 3060 4230 3060 +4 1 0 50 -1 -1 12 0.0000 4 195 660 10170 4905 register\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 10935 3915 select\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 9495 3915 select\001 +4 0 1 50 -1 -1 12 0.0000 4 150 435 1710 2205 Core\001 +4 0 1 50 -1 -1 12 0.0000 4 150 855 2790 2790 Front End\001 +4 0 1 50 -1 -1 12 0.0000 4 195 1365 8190 3015 Execution Loop\001 +4 0 1 50 -1 -1 12 0.0000 4 195 1770 5760 2520 Out Of Order Engine\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 7875 3600 select\001 +4 1 0 50 -1 -1 12 0.0000 4 120 690 10170 4230 execute\001 +4 1 0 50 -1 -1 12 0.0000 4 150 720 10170 3690 memory\001 +4 0 0 50 -1 -1 12 0.0000 4 195 1575 2340 5310 SystemC + VHDL\001 +4 0 0 50 -1 -1 12 0.0000 4 195 795 2340 5040 SystemC\001 +4 1 0 48 -1 -1 12 0.0000 4 195 780 4230 3330 predictor\001 +4 1 0 48 -1 -1 12 0.0000 4 150 525 5130 3960 decod\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview-20080327.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview-20080327.fig (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview-20080327.fig (revision 78) @@ -0,0 +1,172 @@ +#FIG 3.2 Produced by xfig version 3.2.5 +Landscape +Center +Metric +A4 +100.00 +Single +-2 +1200 2 +6 1890 3690 2610 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 2610 4140 1890 4140 1890 3690 2610 3690 2610 4140 +4 1 0 50 -1 -1 12 0.0000 4 165 345 2250 4050 port\001 +4 1 0 50 -1 -1 12 0.0000 4 150 570 2250 3870 icache\001 +-6 +6 4770 3240 5490 3690 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 5490 3690 4770 3690 4770 3240 5490 3240 5490 3690 +4 1 0 50 -1 -1 12 0.0000 4 120 645 5130 3420 context\001 +4 1 0 50 -1 -1 12 0.0000 4 120 420 5130 3600 state\001 +-6 +6 6570 3015 7290 3465 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 7290 3465 6570 3465 6570 3015 7290 3015 7290 3465 +4 1 0 50 -1 -1 12 0.0000 4 150 645 6930 3285 commit\001 +-6 +6 9810 2475 10530 2925 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 10530 2925 9810 2925 9810 2475 10530 2475 10530 2925 +4 1 0 50 -1 -1 12 0.0000 4 165 345 10170 2835 port\001 +4 1 0 50 -1 -1 12 0.0000 4 150 630 10170 2655 dcache\001 +-6 +6 8370 3690 9090 4140 +2 4 0 1 0 4 50 -1 20 4.000 0 0 7 0 0 5 + 9090 4140 8370 4140 8370 3690 9090 3690 9090 4140 +4 1 0 50 -1 -1 12 0.0000 4 150 390 8730 3960 read\001 +-6 +6 11250 3690 11970 4140 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 11970 4140 11250 4140 11250 3690 11970 3690 11970 4140 +4 1 0 50 -1 -1 12 0.0000 4 150 450 11610 3960 write\001 +-6 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 6930 3015 6930 2790 5130 2790 5130 3240 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 5130 2790 4230 2790 4230 3060 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6030 2790 6030 3690 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5490 3915 5850 3915 +2 1 0 1 0 31 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 6390 3690 6390 3240 6570 3240 +2 1 0 1 0 7 50 -1 20 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6570 3915 7650 3915 +2 1 0 1 0 7 50 -1 20 3.000 0 0 -1 0 0 1 + 7650 3780 +2 1 0 1 0 7 50 -1 20 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8010 3915 8370 3915 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 11970 3915 12150 3915 12150 3240 8010 3240 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 11430 4140 11430 4500 8820 4500 8820 4140 +2 1 0 1 0 7 50 -1 20 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8640 4680 8640 4140 +2 1 0 1 0 7 50 -1 20 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 11790 4140 11790 4680 +2 2 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 8190 3105 12330 3105 12330 5220 8190 5220 8190 3105 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 11070 3915 11250 3915 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 9090 3915 9270 3915 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 9630 4185 9810 4185 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 10530 4185 10710 4185 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 10530 3645 10710 3645 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 9630 3645 9810 3645 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 1 2 + 3 0 1.00 60.00 120.00 + 3 0 1.00 60.00 120.00 + 10170 2925 10170 3420 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 7650 3240 7290 3240 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6930 3465 6930 3915 +2 1 0 1 0 31 50 -1 -1 4.000 0 0 -1 1 1 3 + 3 0 1.00 60.00 120.00 + 3 0 1.00 60.00 120.00 + 4410 3510 4410 3780 4770 3780 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 1 2 + 3 0 1.00 60.00 120.00 + 3 0 1.00 60.00 120.00 + 2970 3915 2610 3915 +2 2 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 + 1710 5400 12510 5400 12510 2295 1710 2295 1710 5400 +2 1 0 1 0 31 50 -1 -1 4.000 0 0 -1 1 1 3 + 3 0 1.00 60.00 120.00 + 3 0 1.00 60.00 120.00 + 4050 3510 4050 3780 3690 3780 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3690 4050 4770 4050 +2 2 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 + 5580 2880 2790 2880 2790 4320 5580 4320 5580 2880 +2 2 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 7470 4320 5760 4320 5760 2610 7470 2610 7470 4320 +2 4 0 1 0 7 50 -1 20 3.000 0 0 8 0 0 5 + 8010 2880 8010 4320 7650 4320 7650 2880 8010 2880 +2 4 0 1 0 4 50 -1 20 4.000 0 0 7 0 0 5 + 2160 5310 1800 5310 1800 5130 2160 5130 2160 5310 +2 4 0 1 0 4 50 -1 20 4.000 0 0 7 0 0 5 + 11970 5040 11970 4680 8370 4680 8370 5040 11970 5040 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 2160 5040 1800 5040 1800 4860 2160 4860 2160 5040 +2 4 0 1 0 1 50 -1 20 3.000 0 0 7 0 0 5 + 9630 3510 9630 4320 9270 4320 9270 3510 9630 3510 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 10530 4410 9810 4410 9810 3960 10530 3960 10530 4410 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 10530 3870 9810 3870 9810 3420 10530 3420 10530 3870 +2 4 0 1 0 1 50 -1 20 3.000 0 0 7 0 0 5 + 11070 3510 11070 4320 10710 4320 10710 3510 11070 3510 +2 4 0 0 0 1 49 -1 20 2.000 0 0 7 0 0 5 + 5490 4140 5490 3690 5130 3690 5130 4140 5490 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 5490 4140 4770 4140 4770 3690 5490 3690 5490 4140 +2 4 0 1 0 7 50 -1 20 4.000 0 0 7 0 0 5 + 4590 3510 3870 3510 3870 3060 4590 3060 4590 3510 +2 4 0 0 0 4 49 -1 20 2.000 0 0 7 0 0 5 + 4230 3060 4230 3510 4590 3510 4590 3060 4230 3060 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 6570 4140 5850 4140 5850 3690 6570 3690 6570 4140 +2 4 0 1 0 1 50 -1 20 4.000 0 0 7 0 0 5 + 3690 4140 2970 4140 2970 3690 3690 3690 3690 4140 +4 1 0 50 -1 -1 12 0.0000 4 195 660 10170 4905 register\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 10935 3915 select\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 9495 3915 select\001 +4 0 1 50 -1 -1 12 0.0000 4 150 435 1710 2205 Core\001 +4 0 1 50 -1 -1 12 0.0000 4 150 855 2790 2790 Front End\001 +4 0 1 50 -1 -1 12 0.0000 4 195 1365 8190 3015 Execution Loop\001 +4 0 1 50 -1 -1 12 0.0000 4 195 1770 5760 2520 Out Of Order Engine\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 7875 3600 select\001 +4 1 0 50 -1 -1 12 0.0000 4 120 690 10170 4230 execute\001 +4 1 0 50 -1 -1 12 0.0000 4 150 720 10170 3690 memory\001 +4 0 0 50 -1 -1 12 0.0000 4 195 1575 2340 5310 SystemC + VHDL\001 +4 0 0 50 -1 -1 12 0.0000 4 195 795 2340 5040 SystemC\001 +4 1 0 48 -1 -1 12 0.0000 4 195 780 4230 3330 predictor\001 +4 1 0 48 -1 -1 12 0.0000 4 150 525 5130 3960 decod\001 +4 1 0 50 -1 -1 12 0.0000 4 150 435 3330 3960 fetch\001 +4 1 0 50 -1 -1 12 0.0000 4 105 660 6210 3960 rename\001 Index: trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig (revision 78) @@ -1,3 +1,3 @@ -#FIG 3.2 +#FIG 3.2 Produced by xfig version 3.2.5 Landscape Center @@ -8,56 +8,41 @@ -2 1200 2 -6 4770 3690 5490 4140 -2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 - 5490 4140 4770 4140 4770 3690 5490 3690 5490 4140 -4 1 0 50 -1 -1 12 0.0000 4 135 450 5130 3960 decod\001 --6 6 4770 3240 5490 3690 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 5490 3690 4770 3690 4770 3240 5490 3240 5490 3690 -4 1 0 50 -1 -1 12 0.0000 4 105 570 5130 3420 context\001 -4 1 0 50 -1 -1 12 0.0000 4 105 390 5130 3600 state\001 --6 -6 5850 3690 6570 4140 -2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 - 6570 4140 5850 4140 5850 3690 6570 3690 6570 4140 -4 1 0 50 -1 -1 12 0.0000 4 90 555 6210 3960 rename\001 +4 1 0 50 -1 -1 12 0.0000 4 120 645 5130 3420 context\001 +4 1 0 50 -1 -1 12 0.0000 4 120 420 5130 3600 state\001 -6 6 8370 3690 9090 4140 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 9090 4140 8370 4140 8370 3690 9090 3690 9090 4140 -4 1 0 50 -1 -1 12 0.0000 4 135 330 8730 3960 read\001 +4 1 0 50 -1 -1 12 0.0000 4 150 390 8730 3960 read\001 -6 6 11250 3690 11970 4140 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 11970 4140 11250 4140 11250 3690 11970 3690 11970 4140 -4 1 0 50 -1 -1 12 0.0000 4 135 390 11610 3960 write\001 +4 1 0 50 -1 -1 12 0.0000 4 150 450 11610 3960 write\001 -6 6 9810 2475 10530 2925 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 10530 2925 9810 2925 9810 2475 10530 2475 10530 2925 -4 1 0 50 -1 -1 12 0.0000 4 150 300 10170 2835 port\001 -4 1 0 50 -1 -1 12 0.0000 4 135 540 10170 2655 dcache\001 --6 -6 6570 3015 7290 3465 -2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 - 7290 3465 6570 3465 6570 3015 7290 3015 7290 3465 -4 1 0 50 -1 -1 12 0.0000 4 135 555 6930 3285 commit\001 +4 1 0 50 -1 -1 12 0.0000 4 165 345 10170 2835 port\001 +4 1 0 50 -1 -1 12 0.0000 4 150 630 10170 2655 dcache\001 -6 6 3825 3060 4635 3510 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 4590 3510 3870 3510 3870 3060 4590 3060 4590 3510 -4 1 0 50 -1 -1 12 0.0000 4 180 675 4230 3330 predictor\001 +4 1 0 50 -1 -1 12 0.0000 4 195 780 4230 3330 predictor\001 -6 6 2970 3690 3690 4140 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 3690 4140 2970 4140 2970 3690 3690 3690 3690 4140 -4 1 0 50 -1 -1 12 0.0000 4 135 390 3330 3960 fetch\001 +4 1 0 50 -1 -1 12 0.0000 4 150 435 3330 3960 fetch\001 -6 6 1890 3690 2610 4140 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 2610 4140 1890 4140 1890 3690 2610 3690 2610 4140 -4 1 0 50 -1 -1 12 0.0000 4 150 300 2250 4050 port\001 -4 1 0 50 -1 -1 12 0.0000 4 135 495 2250 3870 icache\001 +4 1 0 50 -1 -1 12 0.0000 4 165 345 2250 4050 port\001 +4 1 0 50 -1 -1 12 0.0000 4 150 570 2250 3870 icache\001 -6 6 1800 4590 5265 5355 @@ -68,7 +53,17 @@ 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 2160 5310 1800 5310 1800 5130 2160 5130 2160 5310 -4 0 0 50 -1 -1 12 0.0000 4 180 555 2340 4770 Groupe\001 -4 0 0 50 -1 -1 12 0.0000 4 180 2280 2340 5310 Une occurence dans le groupe\001 -4 0 0 50 -1 -1 12 0.0000 4 180 2760 2340 5040 Plusieurs occurences dans le groupe\001 +4 0 0 50 -1 -1 12 0.0000 4 195 660 2340 4770 Groupe\001 +4 0 0 50 -1 -1 12 0.0000 4 195 2610 2340 5310 Une occurence dans le groupe\001 +4 0 0 50 -1 -1 12 0.0000 4 195 3120 2340 5040 Plusieurs occurences dans le groupe\001 +-6 +6 6570 3015 7290 3465 +2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 + 7290 3465 6570 3465 6570 3015 7290 3015 7290 3465 +4 1 0 50 -1 -1 12 0.0000 4 150 645 6930 3285 commit\001 +-6 +6 4770 3690 5490 4140 +2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 + 5490 4140 4770 4140 4770 3690 5490 3690 5490 4140 +4 1 0 50 -1 0 12 0.0000 4 150 525 5130 3960 decod\001 -6 2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 @@ -170,12 +165,15 @@ 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 10530 3870 9810 3870 9810 3420 10530 3420 10530 3870 -4 1 0 50 -1 -1 12 0.0000 4 180 585 10170 4905 register\001 -4 1 0 50 -1 -1 12 1.5708 4 135 465 10935 3915 select\001 -4 1 0 50 -1 -1 12 1.5708 4 135 465 9495 3915 select\001 -4 0 1 50 -1 -1 12 0.0000 4 135 360 1710 2205 Core\001 -4 0 1 50 -1 -1 12 0.0000 4 135 750 2790 2790 Front End\001 -4 0 1 50 -1 -1 12 0.0000 4 180 1185 8190 3015 Execution Loop\001 -4 0 1 50 -1 -1 12 0.0000 4 180 1575 5760 2520 Out Of Order Engine\001 -4 1 0 50 -1 -1 12 1.5708 4 135 465 7875 3600 select\001 -4 1 0 50 -1 -1 12 0.0000 4 105 600 10170 4230 execute\001 -4 1 0 50 -1 -1 12 0.0000 4 135 600 10170 3690 memory\001 +2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 + 6570 4140 5850 4140 5850 3690 6570 3690 6570 4140 +4 1 0 50 -1 -1 12 0.0000 4 195 660 10170 4905 register\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 10935 3915 select\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 9495 3915 select\001 +4 0 1 50 -1 -1 12 0.0000 4 150 435 1710 2205 Core\001 +4 0 1 50 -1 -1 12 0.0000 4 150 855 2790 2790 Front End\001 +4 0 1 50 -1 -1 12 0.0000 4 195 1365 8190 3015 Execution Loop\001 +4 0 1 50 -1 -1 12 0.0000 4 195 1770 5760 2520 Out Of Order Engine\001 +4 1 0 50 -1 -1 12 1.5708 4 150 510 7875 3600 select\001 +4 1 0 50 -1 -1 12 0.0000 4 120 690 10170 4230 execute\001 +4 1 0 50 -1 -1 12 0.0000 4 150 720 10170 3690 memory\001 +4 1 0 50 -1 0 12 0.0000 4 105 660 6210 3960 rename\001 Index: trunk/IPs/systemC/processor/Morpheo/Script/execute.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/execute.sh (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/execute.sh (revision 78) @@ -7,7 +7,7 @@ declare FILE_CPT=; declare FILE_CPU=; -declare LOCK_CPT="$HOME/.lock-cpt"; -declare LOCK_CPU="$HOME/.lock-cpu"; - +declare LOCK_CPT="${HOME}/.lock-cpt"; +declare LOCK_CPU="${HOME}/.lock-cpu"; + #-----[ lock ]---------------------------------------------- function lock () Index: trunk/IPs/systemC/processor/Morpheo/Script/execute_n.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/execute_n.sh (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/execute_n.sh (revision 78) @@ -8,17 +8,19 @@ declare FILE_CPT; declare FILE_CPU; -declare ID="cpu-$HOSTNAME-$$" +declare ID="cpu-${HOSTNAME}-$$" #-----[ usage ]--------------------------------------------- function usage () { - echo "Usage : $0 file [ nb_process ]"; - echo " * file : list of command"; - echo " * nb_process : number of process (default (and maximum) is the number of processor)"; + echo "Usage : $0 file [ nb_process ]"; + echo "Arguments : "; + echo " * file : list of command"; + echo " * nb_process : number of process (default (and maximum) is the number of processor)"; echo ""; - echo "Note - This script, for each command, create a directory : Task_X (X is the number of command), and execute the command in this directory."; - echo " - Two file is generate : \"output\" is the output of the execution, and \"command\" is the command lunch."; - echo " - A command empty (no command on a line of file1) is a synchronisation with all process" - echo " - Don't forgot the final end of line (else the last command is not executed"; + echo "Note : "; + echo " * This script, for each command, create a directory : Task_X (X is the number of command), and execute the command in this directory."; + echo " * Two file is generate : \"output\" is the output of the execution, and \"command\" is the command lunch."; + echo " * A command empty (no command on a line of file) is a synchronisation with all process" + echo " * Don't forgot the final end of line (else the last command is not executed"; echo ""; exit; @@ -30,9 +32,9 @@ local FILE_CPUINFO=/proc/cpuinfo; if test ! -f $FILE_CPUINFO; then - echo "\"$FILE_CPUINFO\" don't exist." + echo "\"${FILE_CPUINFO}\" don't exist." usage; fi; - eval "$1=`grep -c \"processor\" $FILE_CPUINFO`"; + eval "$1=`grep -c \"processor\" ${FILE_CPUINFO}`"; } Index: trunk/IPs/systemC/processor/Morpheo/Script/first_run.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/first_run.sh (revision 78) +++ trunk/IPs/systemC/processor/Morpheo/Script/first_run.sh (revision 78) @@ -0,0 +1,26 @@ +#!/bin/sh + +#-----[ usage ]--------------------------------------------- +function usage () +{ + echo "Usage : ${0}"; + echo "Note :"; + echo " * Morpheo's environnement must be positionned."; + exit; +} + +#-----[ main ]---------------------------------------------- +function main () +{ + if test ${#} -ne 0 -o -z ${MORPHEO_HOME}; then + usage ${*}; + fi; + + # create directories + mkdir ${MORPHEO_HOME}; + mkdir ${MORPHEO_HOME}/lock; # lock directory + mkdir ${MORPHEO_HOME}/tmp; # temporary directory +} + +#-----[ Body ]---------------------------------------------- +main ${*} Index: trunk/IPs/systemC/processor/Morpheo/Script/lock.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/lock.sh (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/lock.sh (revision 78) @@ -4,6 +4,10 @@ function usage () { - echo "Usage : ${0} file"; - echo "lock file, you can see the lock at \"~/.$(basename file).lock\"" + echo "Usage : ${0} file"; + echo "Arguments : "; + echo ' * file : you can see the lock at "${MORPHEO_HOME}/lock/$(basename file).lock"'; + echo "Notes :"; + echo " * Morpheo's environnement must be positionned."; + exit; } @@ -18,9 +22,11 @@ function main () { - if test ${#} -ne 1 -o ! -f ${1}; then + LOCK_DIRECTORY="${MORPHEO_HOME}/lock"; + + if test ${#} -ne 1 -o -z ${MORPHEO_HOME} -o ! -d ${LOCK_DIRECTORY}; then usage ${*}; fi; - lock "${HOME}/.$(basename ${1}).lock" + lock "${LOCK_DIRECTORY}/$(basename ${1}).lock" } Index: trunk/IPs/systemC/processor/Morpheo/Script/log_trace.pl =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/log_trace.pl (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/log_trace.pl (revision 78) @@ -20,7 +20,8 @@ sub usage() { - print "usage : $0 rob_trace_file nm_file\n"; - print " * rob_trace_file : Trace file generate by simulation\n"; - print " * nm_file : List of symbol (generate by nm)\n"; + print "Usage : $0 rob_trace_file nm_file\n"; + print "Arguments : "; + print " * rob_trace_file : Trace file generate by simulation\n"; + print " * nm_file : List of symbol (generate by nm)\n"; exit(1); } Index: trunk/IPs/systemC/processor/Morpheo/Script/range.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/range.sh (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/range.sh (revision 78) @@ -4,5 +4,6 @@ function usage () { - echo "Usage : $0 min max [step [iter]]"; + echo "Usage : ${0} min max [step [iter]]"; + echo "Arguments : "; echo " * min : value minimal"; echo " * max : value maximal"; @@ -15,15 +16,15 @@ function range () { - declare a=$1; - declare b=$2; - declare step=$3; + declare a=${1}; + declare b=${2}; + declare step=${3}; - while test $a -lt $b; do - echo $a; - a=$(($a $step)); + while test ${a} -lt ${b}; do + echo ${a}; + a=$((${a} ${step})); done - if test $a -eq $b; then - echo $a; + if test ${a} -eq ${b}; then + echo ${a}; fi; } @@ -32,20 +33,20 @@ function range_max () { - declare a=$1; - declare b=$2; - declare step=$3; - declare iter=$4; + declare a=${1}; + declare b=${2}; + declare step=${3}; + declare iter=${4}; - while test $a -lt $b -a $iter -gt 1; do - a=$(($a $step)); - iter=$(($iter-1)); + while test ${a} -lt ${b} -a ${iter} -gt 1; do + a=$((${a} ${step})); + iter=$((${iter}-1)); done; - if test $a -eq $b; then - echo $a; + if test ${a} -eq ${b}; then + echo ${a}; fi; - if test $iter -eq 1; then - echo $a; + if test ${iter} -eq 1; then + echo ${a}; fi; } @@ -55,12 +56,12 @@ { # create operande - case $# in - 2) range $* "+1";; - 3) range $* ;; - 4) range_max $* ;; - *) usage $* + case ${#} in + 2) range ${*} "+1";; + 3) range ${*} ;; + 4) range_max ${*} ;; + *) usage ${*} esac } #-----[ Corps ]--------------------------------------------- -main $* +main ${*} Index: trunk/IPs/systemC/processor/Morpheo/Script/unlock.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/unlock.sh (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/unlock.sh (revision 78) @@ -4,6 +4,10 @@ function usage () { - echo "Usage : ${0} file"; - echo "unlock file, you can see the lock at \"~/.$(basename file).lock\"" + echo "Usage : ${0} file"; + echo "Arguments : "; + echo ' * file : you can see the lock at "${MORPHEO_HOME}/lock/$(basename file).lock"'; + echo "Notes :"; + echo " * Morpheo's environnement must be positionned."; + exit; } @@ -18,9 +22,11 @@ function main () { - if test ${#} -ne 1 -o ! -f ${1}; then + LOCK_DIRECTORY="${MORPHEO_HOME}/lock"; + + if test ${#} -ne 1 -o -z ${MORPHEO_HOME} -o ! -d ${LOCK_DIRECTORY}; then usage ${*}; fi; - unlock "${HOME}/.$(basename ${1}).lock" + unlock "${LOCK_DIRECTORY}/$(basename ${1}).lock" } Index: trunk/IPs/systemC/processor/Morpheo/Script/xilinx_extract_info.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/xilinx_extract_info.sh (revision 77) +++ trunk/IPs/systemC/processor/Morpheo/Script/xilinx_extract_info.sh (revision 78) @@ -2,5 +2,4 @@ for i in *.fpga.log; do - echo "===== $i"; grep "Number of Slice Registers" $i; Index: trunk/Makefile.tools =================================================================== --- trunk/Makefile.tools (revision 77) +++ trunk/Makefile.tools (revision 78) @@ -6,8 +6,7 @@ MKDIR = mkdir -p TEST = test -READ = read DATE = date +%Y%m%d-%H%M%S -CD = cd CP = cp +MV = mv CAT = cat LS = ls @@ -24,4 +23,9 @@ UPPERtoLOWER = $(TR) [:lower:] [:upper:] CXX = export LANG=C; g++-3.4 +CXX_FLAGS = -O3 \ + -g3 \ + -Wall \ + -Wunused + SED = sed TOUCH = touch @@ -40,6 +44,5 @@ VIEWPS = gv VIEWPDF = xpdf -VIEWPDF_FS = xpdf -fullscreen -#VIEWPDF_FS = acroread +VIEWPDF_FS = $(VIEWPDF) -fullscreen #---------------------------------------------------------- Index: trunk/Makefile.tools_path =================================================================== --- trunk/Makefile.tools_path (revision 77) +++ trunk/Makefile.tools_path (revision 78) @@ -2,4 +2,5 @@ # kane@HOME #-----[ path ]--------------------------------------------- +ENV = export PATH=$$PATH:/bin:/usr/bin SOCLIB = SYSTEMC_systemc = /home/data/Tools/systemc-2.2.0 @@ -16,4 +17,5 @@ # kane@LABS #-----[ path ]--------------------------------------------- +#ENV = export PATH=$$PATH:/bin:/usr/bin #SOCLIB = /users/outil/soc/soclib #SYSTEMC_systemc = /users/outil/systemc/systemc-2.1.v1 Index: trunk/Softwares/Makefile.Software =================================================================== --- trunk/Softwares/Makefile.Software (revision 78) +++ trunk/Softwares/Makefile.Software (revision 78) @@ -0,0 +1,115 @@ +include $(MORPHEO_TOPLEVEL)/Makefile.tools + +#-----[ Directory ]--------------------------------------------------------------- +DIRECTORY_OBJ = obj +DIRECTORY_BIN = bin + +EXE = soft + +#-----[ Files ]------------------------------------------------------------------- +OBJECTS = $(OBJECTS_SYS) $(OBJECTS_ASM) $(OBJECTS_C) + +#-----[ To the compilation ]------------------------------------------------------ +OPTIMIZE = -O3 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float +#Option : +# -fomit-frame-pointer : n'utilise pas le pointeur de frame +# -fdelayed-branch : utilise les delayed slot +# ON OFF +# -mror -mno-ror : utilisation de l'instruction l.ror +# -mcmov -mno-cmov : utilisation de l'instruction l.cmov +# -msext -mno-sext : utilisation des instructions l.extXX +# -mhard-mul -msoft-mul : utilisation du multiplieur materiel +# -mhard-div -msoft-div : utilisation du diviseur materiel +# -mhard-float -msoft-float : utilisation du flottant materiel +# -msibcall -mno-sibcall : Enable sibcall optimization +# -mlogue -mno-logue : Schedule pro/epi-logue. +# -maj -mno-aj : Use aligned jumps. + +# Tools +CC = $(OR1K_BIN)/or32-elf-gcc +AS = $(OR1K_BIN)/or32-elf-as +LD = $(OR1K_BIN)/or32-elf-ld +OBJDUMP = $(OR1K_BIN)/or32-elf-objdump +NM = $(OR1K_BIN)/or32-elf-nm + +# Tools's option +CC_OPT = $(INCLUDE) $(OPTIMIZE) -Wlong-long +# -DHAVE_LIBC +AS_OPT = +LD_OPT = -T$(DIRECTORY_LDSCRIPT)/or32.ld $(LIBRARY) +OBJDUMP_OPT = -D +NM_OPT = -n + +#-----[ Rules ]------------------------------------------------------------------- +.PRECIOUS : $(DIRECTORY_BIN)/%.x.txt $(DIRECTORY_BIN)/%.x $(DIRECTORY_OBJ)/%.o + +all : test_env $(DIRECTORY_BIN)/$(EXE).x.txt + +$(DIRECTORY_BIN)/%.x.txt : $(DIRECTORY_BIN)/%.x + @\ + $(ECHO) "List symbols : $*"; \ + $(NM) $(NM_OPT) $^ > $@.nm; \ + $(ECHO) "Display info : $*"; \ + $(OBJDUMP) $(OBJDUMP_OPT) $^ > $@; + +$(DIRECTORY_BIN)/%.x : $(OBJECTS) + @ \ + $(ECHO) "Linkage : $*"; \ + $(LD) -o $@ $^ $(LD_OPT); + +$(DIRECTORY_OBJ)/%.o : $(DIRECTORY_ASM)/%.s + @ \ + $(ECHO) "Compilation : $*"; \ + $(CC) $(CC_OPT) -o $@ -c $^ ; \ + $(CC) $(CC_OPT) -S -o $@.s -c $^ ; +# @$(AS) $(AS_OPT) $^ -o $@ + +$(DIRECTORY_OBJ)/%.o : $(DIRECTORY_SYS)/%.s + @ \ + $(ECHO) "Compilation : $*"; \ + $(CC) $(CC_OPT) -o $@ -c $^ ; \ + $(CC) $(CC_OPT) -S -o $@.s -c $^ ; +# @$(AS) $(AS_OPT) $^ -o $@ + +$(DIRECTORY_OBJ)/%.o : $(DIRECTORY_C)/%.c + @ \ + $(ECHO) "Compilation : $*"; \ + $(CC) $(CC_OPT) -o $@ -c $^ ; \ + $(CC) $(CC_OPT) -S -o $@.s -c $^ ; + +#-----[ Environement ]------------------------------------------------------------ +test_env : +# ifeq ($(origin TOOLS), undefined) +# $(error "variable TOOLS is undefined"); +# endif +# ifeq ($(origin SOFT), undefined) +# $(error "variable SOFT is undefined"); +# endif + @$(MKDIR) $(DIRECTORY_OBJ) $(DIRECTORY_BIN) + +#-----[ Maintenance ]------------------------------------------------------------- +clean : + @\ + $(ECHO) "Delete temporary files "`$(PWD)`; \ + $(RM) $(DIRECTORY_OBJ) $(DIRECTORY_BIN); \ + $(MAKE) clean_rec DIRECTORY_CLEAN=.; + +clean_rec : + @\ + $(ECHO) "Delete temporary files in directory $(DIRECTORY_CLEAN)"; \ + $(RM) -f $(DIRECTORY_CLEAN)/*~; \ + for files in `$(LS) $(DIRECTORY_CLEAN)`; do \ + if $(TEST) -d $(DIRECTORY_CLEAN)/$$files; \ + then \ + $(MAKE) clean_rec DIRECTORY_CLEAN=$(DIRECTORY_CLEAN)/$$files; \ + fi; \ + done; + +#-----[ Help ]-------------------------------------------------------------------- +help : + @\ + $(ECHO) "";\ + $(ECHO) "List of directive : ";\ + $(ECHO) " * make : Compile the software";\ + $(ECHO) " * make clean : Erase all files generates";\ + $(ECHO) ""; Index: trunk/Softwares/Min.or32/Makefile =================================================================== --- trunk/Softwares/Min.or32/Makefile (revision 77) +++ trunk/Softwares/Min.or32/Makefile (revision 78) @@ -1,96 +1,18 @@ # common definition -include Makefile.morpheo +DIRECTORY_SRC = ./src +DIRECTORY_C = $(DIRECTORY_SRC)/c +DIRECTORY_ASM = $(DIRECTORY_SRC)/asm +DIRECTORY_SYS = $(DIRECTORY_SRC)/sys +DIRECTORY_INCLUDE = $(DIRECTORY_C)/include +DIRECTORY_LDSCRIPT = $(DIRECTORY_SRC)/ldscript/ -#-----[ Directory ]--------------------------------------------------------------- -DIR_SRC = ./src -DIR_C = $(DIR_SRC)/c -DIR_ASM = $(DIR_SRC)/asm -DIR_SYS = $(DIR_SRC)/sys -DIR_INC = $(DIR_C)/include - -DIR_OBJ = obj -DIR_BIN = bin - -EXE = soft +INCLUDE = -I$(DIRECTORY_INCLUDE) +LIBRARY = #-----[ Files ]------------------------------------------------------------------- -OBJ_ASM = $(patsubst $(DIR_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_ASM)/*.s)) -OBJ_SYS = $(patsubst $(DIR_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SYS)/*.s)) -OBJ_C = $(patsubst $(DIR_C)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_C)/*.c)) +OBJECTS_ASM = $(patsubst $(DIRECTORY_ASM)/%.s,$(DIRECTORY_OBJ)/%.o,$(wildcard $(DIRECTORY_ASM)/*.s)) +OBJECTS_SYS = $(patsubst $(DIRECTORY_SYS)/%.s,$(DIRECTORY_OBJ)/%.o,$(wildcard $(DIRECTORY_SYS)/*.s)) +OBJECTS_C = $(patsubst $(DIRECTORY_C)/%.c,$(DIRECTORY_OBJ)/%.o,$(wildcard $(DIRECTORY_C)/*.c)) -OBJ = $(OBJ_SYS) $(OBJ_ASM) $(OBJ_C) +include ../Makefile.Software -#-----[ Rules ]------------------------------------------------------------------- -.PRECIOUS : $(DIR_BIN)/%.x $(DIR_OBJ)/%.o $(DIR_OBJ)/%.a - -all : test_env $(DIR_BIN)/$(EXE).x.txt - -$(DIR_BIN)/%.x.txt : $(DIR_BIN)/%.x - @\ - $(ECHO) "List symbols of $*"; \ - $(NM) $(NM_OPT) $^ > $@.nm; \ - $(ECHO) "Display information of $*"; \ - $(OBJDUMP) $(OBJDUMP_OPT) $^ > $@; - -$(DIR_BIN)/%.x : $(OBJ_SYS) $(OBJ) - @ \ - $(ECHO) "Linkage of $*"; \ - $(LD) -o $@ $^ $(LD_OPT); - -$(DIR_OBJ)/%.o : $(DIR_ASM)/%.s - @ \ - $(ECHO) "Compile of $*"; \ - $(CC) $(CC_OPT) -I$(DIR_INC) -o $@ -c $^ ; \ - $(CC) $(CC_OPT) -I$(DIR_INC) -S -o $@.s -c $^ ; -# @$(AS) $(AS_OPT) $^ -o $@ - -$(DIR_OBJ)/%.o : $(DIR_SYS)/%.s - @ \ - $(ECHO) "Compile of $*"; \ - $(CC) $(CC_OPT) -I$(DIR_INC) -o $@ -c $^ ; \ - $(CC) $(CC_OPT) -I$(DIR_INC) -S -o $@.s -c $^ ; -# @$(AS) $(AS_OPT) $^ -o $@ - -$(DIR_OBJ)/%.o : $(DIR_C)/%.c - @ \ - $(ECHO) "Compile of $*"; \ - $(CC) $(CC_OPT) -I$(DIR_INC) -o $@ -c $^ ; \ - $(CC) $(CC_OPT) -I$(DIR_INC) -S -o $@.s -c $^ ; - -#-----[ Environement ]------------------------------------------------------------ -test_env : -# ifeq ($(origin TOOLS), undefined) -# $(error "variable TOOLS is undefined"); -# endif -# ifeq ($(origin SOFT), undefined) -# $(error "variable SOFT is undefined"); -# endif - @$(MKDIR) $(DIR_OBJ) $(DIR_BIN) - -#-----[ Maintenance ]------------------------------------------------------------- -clean : - @\ - $(ECHO) "Delete temporary files "`$(PWD)`; \ - $(RM) $(DIR_OBJ) $(DIR_BIN); \ - $(MAKE) clean_rec DIR_CLEAN=.; - -#Clean recursive -clean_rec : - @\ - $(ECHO) "Delete temporary files in directory $(DIR_CLEAN)"; \ - $(RM) -f $(DIR_CLEAN)/*~; \ - for files in `$(LS) $(DIR_CLEAN)`; do \ - if $(TEST) -d $(DIR_CLEAN)/$$files; \ - then \ - $(MAKE) clean_rec DIR_CLEAN=$(DIR_CLEAN)/$$files; \ - fi; \ - done; - -#-----[ Help ]-------------------------------------------------------------------- -help : - @\ - $(ECHO) "";\ - $(ECHO) "List of directive : ";\ - $(ECHO) " * make : Compile the software";\ - $(ECHO) " * make clean : Erase all files generates";\ - $(ECHO) ""; Index: trunk/Softwares/Min.or32/Makefile.morpheo =================================================================== --- trunk/Softwares/Min.or32/Makefile.morpheo (revision 77) +++ (revision ) @@ -1,50 +1,0 @@ -#-----[ Usual commands ]---------------------------------------------------------- -RM = rm -fr -MKDIR = mkdir -p -ECHO = echo -CCACHE = -LS = ls -TEST = test -CAT = cat -READ = read -SED = sed -MAKE = make -s -CD = cd -PWD = pwd - -#-----[ Directory ]--------------------------------------------------------------- -DIR_LDSCRIPT = $(DIR_SRC)/ldscript/ - -DIR_INCLUDE = -DIR_LIBRARY = - -#-----[ To the compilation ]------------------------------------------------------ -OPTIMIZE = -O3 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float -#Option : -# -fomit-frame-pointer : n'utilise pas le pointeur de frame -# -fdelayed-branch : utilise les delayed slot -# ON OFF -# -mror -mno-ror : utilisation de l'instruction l.ror -# -mcmov -mno-cmov : utilisation de l'instruction l.cmov -# -msext -mno-sext : utilisation des instructions l.extXX -# -mhard-mul -msoft-mul : utilisation du multiplieur materiel -# -mhard-div -msoft-div : utilisation du diviseur materiel -# -mhard-float -msoft-float : utilisation du flottant materiel -# -msibcall -mno-sibcall : Enable sibcall optimization -# -mlogue -mno-logue : Schedule pro/epi-logue. -# -maj -mno-aj : Use aligned jumps. - -# Tools -CC = $(CCACHE) or32-elf-gcc -AS = or32-elf-as -LD = or32-elf-ld -OBJDUMP = or32-elf-objdump -NM = or32-elf-nm - -# Tools's option -CC_OPT = $(DIR_INCLUDE) $(OPTIMIZE5~) -Wlong-long -# -DHAVE_LIBC -AS_OPT = -LD_OPT = -T$(DIR_LDSCRIPT)/or32.ld $(DIR_LIBRARY) -OBJDUMP_OPT = -D -NM_OPT = -n Index: trunk/Softwares/Min.or32/src/sys/crt0.s =================================================================== --- trunk/Softwares/Min.or32/src/sys/crt0.s (revision 77) +++ trunk/Softwares/Min.or32/src/sys/crt0.s (revision 78) @@ -16,4 +16,5 @@ l.nop 0 ; */ + .file "crt0.s" /* @@ -511,3 +512,2 @@ l.rfe l.nop 0 -