Index: trunk/IPs/systemC/Environment/Cache/Makefile =================================================================== --- trunk/IPs/systemC/Environment/Cache/Makefile (revision 80) +++ trunk/IPs/systemC/Environment/Cache/Makefile (revision 80) @@ -0,0 +1,24 @@ +#-----[ Directory ]---------------------------------------- + +DIR_QUEUE = ../Queue + +#-----[ Variable ]----------------------------------------- + +OBJECTS_DEPS = $(patsubst $(DIR_QUEUE)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_QUEUE)/*.cpp)) + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) --directory=$(DIR_QUEUE) all; \ + $(MAKE) all_environment; + +clean : + @\ + $(MAKE) --directory=$(DIR_QUEUE) clean; \ + $(MAKE) environment_clean; + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: trunk/IPs/systemC/Environment/Cache/include/Cache.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache.h (revision 80) @@ -0,0 +1,43 @@ +#ifndef ENVIRONMENT_CACHE_H +#define ENVIRONMENT_CACHE_H + +#include "Cache_Parameters.h" +#include "Cache_MultiLevel.h" +#include "Types.h" + +namespace environment { +namespace cache { + + class Cache + { + private : std::string name ; + protected : Parameters * param ; + + protected : cache_multilevel::Cache_MultiLevel ** icache_dedicated; + protected : cache_multilevel::Cache_MultiLevel ** dcache_dedicated; + protected : cache_multilevel::Cache_MultiLevel * cache_shared ; + + public : Cache (std::string name, + Parameters * param); + public : ~Cache (void); + + public : void reset (void); + public : void transition (void); + private : uint32_t range_port (cache_t type_cache, + uint32_t num_entity); + public : uint32_t latence (cache_t type_cache, + uint32_t num_entity, + uint32_t num_port , + uint32_t address , + uint32_t trdid , + type_req_cache_t type , + direction_req_cache_t dir ); + + public : std::string information (uint32_t depth); + + public : friend std::ostream& operator<< (std::ostream& output, Cache & x); + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel.h (revision 80) @@ -0,0 +1,34 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_MULTILEVEL_H +#define ENVIRONMENT_CACHE_CACHE_MULTILEVEL_H + +#include "Cache_MultiLevel_Parameters.h" +#include "Cache_MultiLevel_Access.h" +#include "Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_multilevel { + + class Cache_MultiLevel + { + protected : std::string name; + public : Parameters * param; + protected : cache_onelevel::Cache_OneLevel ** hierarchy_cache; + + public : Cache_MultiLevel (std::string name, Parameters * param); + public : ~Cache_MultiLevel (void); + + public : void reset (void); + public : void transition (void); + public : Access access (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir); + public : uint32_t latence (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir); + public : uint32_t update_access (Access cur_access); + + public : std::string information (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output, Cache_MultiLevel & x); + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Access.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Access.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Access.h (revision 80) @@ -0,0 +1,46 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_MULTILEVEL_ACCESS_H +#define ENVIRONMENT_CACHE_CACHE_MULTILEVEL_ACCESS_H + +#include "Types.h" + +namespace environment { +namespace cache { +namespace cache_multilevel { + + class Access + { + public : uint32_t num_port ; + public : type_rsp_cache_t hit ; // result of access + public : uint32_t latence ; // Latence of access + public : uint32_t last_nb_level; // if access is not a hit : last level of cache before a error + + public : Access () + { + } + + public : Access (uint32_t num_port , + type_rsp_cache_t hit , + uint32_t latence , + uint32_t last_nb_level) + { + this->num_port = num_port ; + this->hit = hit ; + this->latence = latence ; + this->last_nb_level = last_nb_level; + } + + friend std::ostream& operator<< (std::ostream& output, const Access & x) + { + output << "[" << x.num_port << "] " + << x.hit << " " + << x.latence << " " + << x.last_nb_level; + return output; + } + };//Access + +}; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Parameters.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Parameters.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Parameters.h (revision 80) @@ -0,0 +1,84 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_MULTILEVEL_PARAMETERS_H +#define ENVIRONMENT_CACHE_CACHE_MULTILEVEL_PARAMETERS_H + +#include +#include + +#include "Cache_OneLevel_Parameters.h" + +namespace environment { +namespace cache { +namespace cache_multilevel { + + class Parameters + { + public : uint32_t nb_level ; + public : uint32_t nb_port ; + + public : cache_onelevel::Parameters ** param_cache; + + public : Parameters (uint32_t nb_level , + uint32_t nb_port , + uint32_t * nb_line , + uint32_t * size_line , + uint32_t * size_word , + uint32_t * associativity, + uint32_t * hit_latence , + uint32_t * miss_penality) + { + this->nb_level = nb_level; + this->nb_port = nb_port ; + + param_cache = new cache_onelevel::Parameters * [nb_level]; + for (uint32_t i=0; iprint(depth+1) << std::endl; + + return str.str(); + } + + + friend std::ostream& operator<< (std::ostream& output, Parameters &x) + { + output << x.print(0); + return output; + } + + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel.h (revision 80) @@ -0,0 +1,57 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_ONELEVEL_H +#define ENVIRONMENT_CACHE_CACHE_ONELEVEL_H + +#include "Cache_OneLevel_Access_Port.h" +#include "Cache_OneLevel_Address.h" +#include "Cache_OneLevel_Tag.h" +#include "Cache_OneLevel_Write_Buffer.h" +#include "Cache_OneLevel_Parameters.h" +#include "../../Queue/include/Sort_Queue_Dynamic.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + class Cache_OneLevel + { + protected : std::string name; + protected : Parameters * param; + private : Tag ** tag; + private : Access_Port * access_port; + private : Address size_address; + private : queue::Sort_Queue_Dynamic * write_buffer; + + protected : queue::Parameters * param_write_buffer; + + public : Cache_OneLevel (std::string name, + Parameters * param); + + public : ~Cache_OneLevel (void); + + + + public : void reset (void); + public : void transition (void); + private : void update_lru (uint32_t familly, uint32_t num_associativity); + private : uint32_t index_victim (uint32_t familly); + private : Address translate_address (uint32_t address); + public : type_rsp_cache_t access (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir); + private : type_rsp_cache_t access_cached (uint32_t num_port, uint32_t address, uint32_t trdid, direction_req_cache_t dir); + private : type_rsp_cache_t access_uncached (uint32_t num_port, uint32_t address, uint32_t trdid); + private : type_rsp_cache_t access_invalidate (uint32_t num_port, uint32_t address, uint32_t trdid); + private : type_rsp_cache_t access_flush (uint32_t num_port, uint32_t address, uint32_t trdid); + private : uint32_t hit_write_buffer (uint32_t trdid, Address address); + private : uint32_t hit_cache (uint32_t trdid, Address address); + private : uint32_t hit_access_port (uint32_t trdid, Address address); + public : uint32_t need_slot (void); + public : uint32_t latence (uint32_t num_port); + public : uint32_t update_latence (uint32_t num_port, uint32_t latence); + public : std::string information (uint32_t depth); + + public : friend std::ostream& operator<< (std::ostream& output, Cache_OneLevel & x); + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Access_Port.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Access_Port.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Access_Port.h (revision 80) @@ -0,0 +1,37 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_ONELEVEL_ACCESS_PORT_H +#define ENVIRONMENT_CACHE_CACHE_ONELEVEL_ACCESS_PORT_H + +#include +#include "Types.h" +#include "Cache_OneLevel_Address.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + class Access_Port + { + public : bool valid; + public : Address address; + public : uint32_t trdid; + public : type_rsp_cache_t hit; + public : uint32_t num_associativity; // on hit : update lru + public : uint32_t latence; // on miss : wait + + friend std::ostream& operator<< (std::ostream& output, const Access_Port &x) + { + output << x.valid << " " + << x.hit << " " + << x.address << " " + << x.trdid << " " + << x.num_associativity << " " + << x.latence; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Address.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Address.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Address.h (revision 80) @@ -0,0 +1,32 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_ONELEVEL_ADDRESS_H +#define ENVIRONMENT_CACHE_CACHE_ONELEVEL_ADDRESS_H + +#include +#include + +namespace environment { +namespace cache { +namespace cache_onelevel { + + class Address + { + public : uint32_t tag; + public : uint32_t familly; + public : uint32_t offset; + + friend std::ostream& operator<< (std::ostream& output, const Address &x) + { + output << std::hex + << std::setw(8) << std::setfill('0') << x.tag << " " + << std::setw(8) << std::setfill('0') << x.familly << " " + << std::setw(8) << std::setfill('0') << x.offset + << std::dec; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Parameters.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Parameters.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Parameters.h (revision 80) @@ -0,0 +1,105 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_ONELEVEL_PARAMETERS_H +#define ENVIRONMENT_CACHE_CACHE_ONELEVEL_PARAMETERS_H + +#include +#include +#include + +namespace environment { +namespace cache { +namespace cache_onelevel { + + class Parameters + { + public : uint32_t nb_port ; + public : uint32_t nb_line ; + public : uint32_t size_line ; + public : uint32_t size_word ; + public : uint32_t associativity; + public : uint32_t hit_latence ; + public : uint32_t miss_penality; + + public : Parameters (uint32_t nb_port , + uint32_t nb_line , + uint32_t size_line , + uint32_t size_word , + uint32_t associativity, + uint32_t hit_latence , + uint32_t miss_penality) + { + this->nb_port = nb_port ; + this->nb_line = nb_line ; + this->size_line = size_line ; + this->size_word = size_word ; + this->associativity = associativity; + this->hit_latence = hit_latence ; + this->miss_penality = miss_penality; + + if ((nb_line * size_line * associativity) == 0) + { + std::cerr << "{Cache_OneLevel} all parameter must be greater that 0" << std::endl; + exit(1); + } + if ((nb_line % associativity) != 0) + { + std::cerr << "{Cache_OneLevel} nb_line must be a mutiple of associativity" << std::endl; + exit(1); + } + + if ((double)nb_line != ::pow(2,::log2(nb_line))) + { + std::cerr << "{Cache_OneLevel} nb_line must be a mutiple of 2^n" << std::endl; + exit(1); + } + + if ((double)size_line != ::pow(2,::log2(size_line))) + { + std::cerr << "{Cache_OneLevel} size_line must be a mutiple of 2^n" << std::endl; + exit(1); + } + + if ((double)size_word != ::pow(2,::log2(size_word))) + { + std::cerr << "{Cache_OneLevel} size_word must be a mutiple of 2^n" << std::endl; + exit(1); + } + } + + public : std::string print (uint32_t depth) + { + std::string tab (depth,'\t'); + std::stringstream str; + + str << tab << "* Capacity : " << (nb_line * size_line * size_word) << " bytes" << std::endl + << tab << " * Nb line : " << nb_line << std::endl + << tab << " * Size line : " << size_line << std::endl + << tab << " * Size word (in byte) : " << size_word << std::endl + << tab << "* Timing : " << std::endl + << tab << " * Hit latence : " << hit_latence << std::endl + << tab << " * Miss penality : " << miss_penality << std::endl + << tab << "* Other : " << std::endl + << tab << " * Associativity : " << associativity << std::endl + << tab << " * Nb port : " << nb_port << std::endl; + + if (associativity == 1) + str << tab << " * Cache Direct Map"; + else + if (associativity == nb_line) + str << tab << " * Cache Full Associative"; + else + str << tab << " * Cache Semi Associative"; + return str.str(); + } + + + friend std::ostream& operator<< (std::ostream& output, Parameters &x) + { + output << x.print(0); + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Tag.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Tag.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Tag.h (revision 80) @@ -0,0 +1,32 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_ONELEVEL_TAG_H +#define ENVIRONMENT_CACHE_CACHE_ONELEVEL_TAG_H + +#include +#include + +namespace environment { +namespace cache { +namespace cache_onelevel { + + class Tag + { + public : bool valid ; // tag is valid ? + public : uint32_t address ; // address + public : uint32_t trdid ; // owner thread identification + public : uint32_t index_lru; // to select victim + + friend std::ostream& operator<< (std::ostream& output, const Tag &x) + { + output << x.valid << " " + << std::hex << std::setw(8) << std::setfill('0') << x.address << " " << std::dec + << x.trdid << " " + << x.index_lru; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Write_Buffer.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Write_Buffer.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel_Write_Buffer.h (revision 80) @@ -0,0 +1,37 @@ +#ifndef ENVIRONMENT_CACHE_CACHE_ONELEVEL_WRITE_BUFFER_H +#define ENVIRONMENT_CACHE_CACHE_ONELEVEL_WRITE_BUFFER_H + +#include +#include "Cache_OneLevel_Address.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + class Write_Buffer + { + public : Address address; + public : uint32_t trdid; + + public : Write_Buffer () + { + } + + public : Write_Buffer (Address address, uint32_t trdid) + { + this->address = address; + this->trdid = trdid; + } + friend std::ostream& operator<< (std::ostream& output, const Write_Buffer &x) + { + output << x.address << " " + << x.trdid; + + return output; + } + }; + +}; +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Cache_Parameters.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Cache_Parameters.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Cache_Parameters.h (revision 80) @@ -0,0 +1,138 @@ +#ifndef ENVIRONMENT_CACHE_PARAMETERS_H +#define ENVIRONMENT_CACHE_PARAMETERS_H + +#include +#include + +#include "Cache_MultiLevel_Parameters.h" + +namespace environment { +namespace cache { + + class Parameters + { + public : uint32_t nb_cache_dedicated; + public : uint32_t nb_iport; + + public : cache_multilevel::Parameters ** param_icache_dedicated; + public : cache_multilevel::Parameters ** param_dcache_dedicated; + public : cache_multilevel::Parameters * param_cache_shared; + + public : Parameters (uint32_t nb_cache_dedicated , + uint32_t * icache_dedicated_nb_level , + uint32_t * icache_dedicated_nb_port , + uint32_t ** icache_dedicated_nb_line , + uint32_t ** icache_dedicated_size_line , + uint32_t ** icache_dedicated_size_word , + uint32_t ** icache_dedicated_associativity, + uint32_t ** icache_dedicated_hit_latence , + uint32_t ** icache_dedicated_miss_penality, + uint32_t * dcache_dedicated_nb_level , + uint32_t * dcache_dedicated_nb_port , + uint32_t ** dcache_dedicated_nb_line , + uint32_t ** dcache_dedicated_size_line , + uint32_t ** dcache_dedicated_size_word , + uint32_t ** dcache_dedicated_associativity, + uint32_t ** dcache_dedicated_hit_latence , + uint32_t ** dcache_dedicated_miss_penality, + uint32_t cache_shared_nb_level , +// uint32_t cache_shared_nb_port , + uint32_t * cache_shared_nb_line , + uint32_t * cache_shared_size_line , + uint32_t * cache_shared_size_word , + uint32_t * cache_shared_associativity , + uint32_t * cache_shared_hit_latence , + uint32_t * cache_shared_miss_penality ) + { + this->nb_cache_dedicated = nb_cache_dedicated; + + uint32_t cache_shared_nb_port = 0; + uint32_t nb_iport = 0; + for (uint32_t i=0; iprint(depth+1) << std::endl; + + for (uint32_t i=0; iprint(depth+1) << std::endl; + + str << tab << " * CACHE SHARED" << std::endl; + str << param_cache_shared->print(depth+1) << std::endl; + + return str.str(); + } + + friend std::ostream& operator<< (std::ostream& output, Parameters &x) + { + output << x.print(0); + return output; + } + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/include/Types.h =================================================================== --- trunk/IPs/systemC/Environment/Cache/include/Types.h (revision 80) +++ trunk/IPs/systemC/Environment/Cache/include/Types.h (revision 80) @@ -0,0 +1,55 @@ +#ifndef ENVIRONMENT_CACHE_TYPES_H +#define ENVIRONMENT_CACHE_TYPES_H + +namespace environment { +namespace cache { + + // ===================================================== + // =====[ CACHE ]======================================= + // ===================================================== + + typedef enum + { + INSTRUCTION_CACHE , + DATA_CACHE + } cache_t; + + // ===================================================== + // =====[ DIRECTION ]=================================== + // ===================================================== + + typedef enum + { + READ , + WRITE , + NONE + } direction_req_cache_t; + + // ===================================================== + // =====[ REQUEST ]===================================== + // ===================================================== + + typedef enum + { + CACHED , // address can be in the cache + UNCACHED , // Always miss (not address in cache) + INVALIDATE , // The direction is not used + PREFETCH , // The direction is not used + FLUSH // The direction is not used + } type_req_cache_t; + + // ===================================================== + // =====[ RESPONS ]===================================== + // ===================================================== + + typedef enum + { + HIT_CACHE , + HIT_BYPASS , + HIT_WRITE_BUFFER , + MISS + } type_rsp_cache_t; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Cache/selftest/main.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/selftest/main.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/selftest/main.cpp (revision 80) @@ -0,0 +1,590 @@ +#include +#include "../include/Cache.h" + +using namespace std; +using namespace environment; +using namespace environment::cache; + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ + } while (0) + + + +int main (void) +{ + cout << "
Begin" << endl; + + { + cache_onelevel::Parameters * param = new cache_onelevel::Parameters + ( + 4, // nb_port + 32, // nb_line + 8, // size_line + 4,// size_word + 4, // associativity + 2, // hit_latence + 3 // miss_penality + ); + + cout << *param << endl; + + cache_onelevel::Cache_OneLevel * cache = new cache_onelevel::Cache_OneLevel ("my_cache",param); + cache->reset(); + + cout << *cache << endl; + + cache->transition(); + cache->transition(); + + cout << *cache << endl; + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), MISS); + TEST(cache->latence(0), 5); + cache->transition(); // miss cycle 1 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_WRITE_BUFFER); + TEST(cache->latence(0), 4); + cache->transition(); // miss cycle 2 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_WRITE_BUFFER); + TEST(cache->latence(0), 3); + cache->transition(); // miss cycle 3 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE); //word 0 + TEST(cache->latence(0), 2); + + TEST(cache->access(0, 0x104, 0, CACHED, WRITE), HIT_CACHE); //word 1 + TEST(cache->access(0, 0x108, 0, CACHED, WRITE), HIT_CACHE); //word 2 + TEST(cache->access(0, 0x10c, 0, CACHED, WRITE), HIT_CACHE); //word 3 + TEST(cache->access(0, 0x110, 0, CACHED, WRITE), HIT_CACHE); //word 4 + TEST(cache->access(0, 0x114, 0, CACHED, WRITE), HIT_CACHE); //word 5 + TEST(cache->access(0, 0x118, 0, CACHED, WRITE), HIT_CACHE); //word 6 + TEST(cache->access(0, 0x11c, 0, CACHED, WRITE), HIT_CACHE); //word 7 + TEST(cache->access(0, 0x120, 0, CACHED, WRITE), MISS ); + TEST(cache->access(1, 0x140, 0, CACHED, WRITE), MISS ); + TEST(cache->access(2, 0x160, 0, CACHED, WRITE), MISS ); + TEST(cache->access(3, 0x144, 0, CACHED, WRITE), HIT_BYPASS); + + TEST(cache->latence(0), 5); + TEST(cache->latence(1), 5); + TEST(cache->latence(2), 5); + TEST(cache->latence(3), 5); + + cache->transition(); // miss access + TEST(cache->access(0, 0x180, 0, CACHED, WRITE), MISS ); + TEST(cache->access(1, 0x1a0, 0, CACHED, WRITE), MISS ); + TEST(cache->access(2, 0x1c0, 0, CACHED, WRITE), MISS ); + TEST(cache->access(3, 0x1e0, 0, CACHED, WRITE), MISS ); + + cache->transition(); // miss cycle 1 + cout << *cache << endl; + + TEST(cache->access(0, 0x200, 0, CACHED, WRITE), MISS ); + TEST(cache->access(1, 0x300, 0, CACHED, WRITE), MISS ); + TEST(cache->access(2, 0x400, 0, CACHED, WRITE), MISS ); + + cache->transition(); // miss cycle 0 + cache->transition(); // miss cycle 1 + cache->transition(); // miss cycle 2 + cache->transition(); // miss cycle 3 + cout << *cache << endl; + + // line 0 : all way is use + TEST(cache->access(0, 0x118, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x204, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x100, 0,UNCACHED, WRITE), MISS ); + TEST(cache->access(3, 0x118, 0, CACHED, WRITE), HIT_BYPASS); + + TEST(cache->latence(0), 2); + TEST(cache->latence(1), 2); + TEST(cache->latence(2), 5); + TEST(cache->latence(3), 2); + + cache->transition(); + cout << *cache << endl; + + TEST(cache->access(0, 0x500, 0, CACHED, WRITE), MISS ); + + cache->transition(); // miss cycle 1 + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x200, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x300, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(3, 0x400, 0, CACHED, WRITE), HIT_CACHE ); + + cache->transition(); // miss cycle 2 + + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x200, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x300, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(3, 0x400, 0, CACHED, WRITE), HIT_CACHE ); + + cache->transition(); // miss cycle 3 + TEST(cache->access(0, 0x100, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(1, 0x200, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(2, 0x300, 0, CACHED, WRITE), HIT_CACHE ); + TEST(cache->access(3, 0x400, 0, CACHED, WRITE), MISS ); + + TEST(cache->latence(0), 2); + TEST(cache->latence(1), 2); + TEST(cache->latence(2), 2); + TEST(cache->latence(3), 5); + + cout << *cache << endl; + + delete cache; + delete param; + } + + { + uint32_t * nb_line = new uint32_t [3]; + uint32_t * size_line = new uint32_t [3]; + uint32_t * size_word = new uint32_t [3]; + uint32_t * associativity = new uint32_t [3]; + uint32_t * hit_latence = new uint32_t [3]; + uint32_t * miss_penality = new uint32_t [3]; + + nb_line [0] = 4 ; nb_line [1] = 4 ; nb_line [2] = 4 ; + size_line [0] = 8 ; size_line [1] = 8 ; size_line [2] = 8 ; + size_word [0] = 4 ; size_word [1] = 4 ; size_word [2] = 4 ; + associativity [0] = 1 ; associativity [1] = 2 ; associativity [2] = 4 ; + hit_latence [0] = 1 ; hit_latence [1] = 2 ; hit_latence [2] = 2 ; + miss_penality [0] = 3 ; miss_penality [1] = 5 ; miss_penality [2] = 7 ; + + cache_multilevel::Parameters * param = new cache_multilevel::Parameters + ( + 3, // nb_level + 4, // nb_port + nb_line , + size_line , + size_word , + associativity, + hit_latence , + miss_penality + ); + + cout << *param << endl; + + cache_multilevel::Cache_MultiLevel * cache = new cache_multilevel::Cache_MultiLevel ("my_cache",param); + + cout << *cache << endl; + cache->reset(); + cout << *cache << endl; + + cache_multilevel::Access access; + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , MISS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 2); + + cache->transition(); //19 + cache->transition(); //18 + cache->transition(); //17 + cache->transition(); //16 + cache->transition(); //15 + cache->transition(); //14 + cache->transition(); //13 + cache->transition(); //12 + cache->transition(); //11 + cache->transition(); //10 + cout << *cache << endl; + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 10); + TEST(access.last_nb_level, 0); + + cache->transition(); // 9 + cache->transition(); // 8 + cache->transition(); // 7 + cache->transition(); // 6 + cache->transition(); // 5 + cache->transition(); // 4 + cache->transition(); // 3 + cache->transition(); // 2 + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 2); + TEST(access.last_nb_level, 0); + + cache->transition(); // 1 + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + cout << *cache << endl; + + cache->transition(); + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (1, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , MISS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 2); + + access = cache->access (2, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 2); + TEST(access.hit , HIT_BYPASS); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (3, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 3); + TEST(access.hit , HIT_BYPASS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 0); + + cache->transition(); //19 + cache->transition(); //18 + cache->transition(); //17 + cache->transition(); //16 + cache->transition(); //15 + + +// access = cache->access (1, 0x300, 0, CACHED, WRITE); +// cache->update_access(access); + +// TEST(access.num_port , 1); +// TEST(access.hit , MISS); +// TEST(access.latence , 20); +// TEST(access.last_nb_level, 2); + + cache->transition(); //14 + cache->transition(); //13 + cache->transition(); //12 + cache->transition(); //11 + cache->transition(); //10 + cout << *cache << endl; + + access = cache->access (0, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 0); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (1, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 10); + TEST(access.last_nb_level, 0); + + access = cache->access (2, 0x100, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 2); + TEST(access.hit , HIT_BYPASS); + TEST(access.latence , 1); + TEST(access.last_nb_level, 0); + + access = cache->access (3, 0x200, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 3); + TEST(access.hit , HIT_WRITE_BUFFER); + TEST(access.latence , 10); + TEST(access.last_nb_level, 0); + + cache->transition(); //9 + + access = cache->access (1, 0x400, 0, CACHED, WRITE); + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , MISS); + TEST(access.latence , 20); + TEST(access.last_nb_level, 2); + + cache->transition(); //8 + cache->transition(); //7 + cache->transition(); //6 + cache->transition(); //5 + cache->transition(); //4 + cache->transition(); //3 + cache->transition(); //2 + cache->transition(); //1 + cache->transition(); //0 + + access = cache->access (1, 0x100, 0, CACHED, WRITE); + cout << access<< endl; + + cache->update_access(access); + + TEST(access.num_port , 1); + TEST(access.hit , HIT_CACHE); + TEST(access.latence , 6 ); + TEST(access.last_nb_level, 1); + + cout << *cache << endl; + delete cache; + delete param; + delete [] nb_line ; + delete [] size_line ; + delete [] size_word ; + delete [] associativity; + delete [] hit_latence ; + delete [] miss_penality; + } + + { + uint32_t * cache_shared_nb_line = new uint32_t [1]; + uint32_t * cache_shared_size_line = new uint32_t [1]; + uint32_t * cache_shared_size_word = new uint32_t [1]; + uint32_t * cache_shared_associativity = new uint32_t [1]; + uint32_t * cache_shared_hit_latence = new uint32_t [1]; + uint32_t * cache_shared_miss_penality = new uint32_t [1]; + + cache_shared_nb_line [0] = 8 ; + cache_shared_size_line [0] = 8 ; + cache_shared_size_word [0] = 4 ; + cache_shared_associativity [0] = 4 ; + cache_shared_hit_latence [0] = 2 ; + cache_shared_miss_penality [0] = 5 ; + + uint32_t * icache_nb_level = new uint32_t [2]; + uint32_t * icache_nb_port = new uint32_t [2]; + uint32_t ** icache_nb_line = new uint32_t * [2]; + uint32_t ** icache_size_line = new uint32_t * [2]; + uint32_t ** icache_size_word = new uint32_t * [2]; + uint32_t ** icache_associativity = new uint32_t * [2]; + uint32_t ** icache_hit_latence = new uint32_t * [2]; + uint32_t ** icache_miss_penality = new uint32_t * [2]; + + icache_nb_level [0] = 1; + icache_nb_port [0] = 2; + icache_nb_line [0] = new uint32_t [1]; + icache_size_line [0] = new uint32_t [1]; + icache_size_word [0] = new uint32_t [1]; + icache_associativity [0] = new uint32_t [1]; + icache_hit_latence [0] = new uint32_t [1]; + icache_miss_penality [0] = new uint32_t [1]; + + icache_nb_line [0][0] = 8; + icache_size_line [0][0] = 8; + icache_size_word [0][0] = 4; + icache_associativity [0][0] = 1; + icache_hit_latence [0][0] = 1; + icache_miss_penality [0][0] = 3; + + icache_nb_level [1] = 2; + icache_nb_port [1] = 2; + icache_nb_line [1] = new uint32_t [2]; + icache_size_line [1] = new uint32_t [2]; + icache_size_word [1] = new uint32_t [2]; + icache_associativity [1] = new uint32_t [2]; + icache_hit_latence [1] = new uint32_t [2]; + icache_miss_penality [1] = new uint32_t [2]; + + icache_nb_line [1][0] = 4; + icache_size_line [1][0] = 8; + icache_size_word [1][0] = 4; + icache_associativity [1][0] = 1; + icache_hit_latence [1][0] = 1; + icache_miss_penality [1][0] = 3; + + icache_nb_line [1][1] = 4; + icache_size_line [1][1] = 8; + icache_size_word [1][1] = 4; + icache_associativity [1][1] = 4; + icache_hit_latence [1][1] = 1; + icache_miss_penality [1][1] = 4; + + uint32_t * dcache_nb_level = new uint32_t [2]; + uint32_t * dcache_nb_port = new uint32_t [2]; + uint32_t ** dcache_nb_line = new uint32_t * [2]; + uint32_t ** dcache_size_line = new uint32_t * [2]; + uint32_t ** dcache_size_word = new uint32_t * [2]; + uint32_t ** dcache_associativity = new uint32_t * [2]; + uint32_t ** dcache_hit_latence = new uint32_t * [2]; + uint32_t ** dcache_miss_penality = new uint32_t * [2]; + + dcache_nb_level [0] = 1; + dcache_nb_port [0] = 2; + dcache_nb_line [0] = new uint32_t [1]; + dcache_size_line [0] = new uint32_t [1]; + dcache_size_word [0] = new uint32_t [1]; + dcache_associativity [0] = new uint32_t [1]; + dcache_hit_latence [0] = new uint32_t [1]; + dcache_miss_penality [0] = new uint32_t [1]; + + dcache_nb_line [0][0] = 8; + dcache_size_line [0][0] = 8; + dcache_size_word [0][0] = 4; + dcache_associativity [0][0] = 1; + dcache_hit_latence [0][0] = 1; + dcache_miss_penality [0][0] = 3; + + dcache_nb_level [1] = 2; + dcache_nb_port [1] = 2; + dcache_nb_line [1] = new uint32_t [2]; + dcache_size_line [1] = new uint32_t [2]; + dcache_size_word [1] = new uint32_t [2]; + dcache_associativity [1] = new uint32_t [2]; + dcache_hit_latence [1] = new uint32_t [2]; + dcache_miss_penality [1] = new uint32_t [2]; + + dcache_nb_line [1][0] = 4; + dcache_size_line [1][0] = 8; + dcache_size_word [1][0] = 4; + dcache_associativity [1][0] = 1; + dcache_hit_latence [1][0] = 1; + dcache_miss_penality [1][0] = 3; + + dcache_nb_line [1][1] = 4; + dcache_size_line [1][1] = 8; + dcache_size_word [1][1] = 4; + dcache_associativity [1][1] = 4; + dcache_hit_latence [1][1] = 1; + dcache_miss_penality [1][1] = 4; + + Parameters * param = new Parameters + (2,//nb_cache_dedicated + + icache_nb_level , + icache_nb_port , + icache_nb_line , + icache_size_line , + icache_size_word , + icache_associativity , + icache_hit_latence , + icache_miss_penality , + + dcache_nb_level , + dcache_nb_port , + dcache_nb_line , + dcache_size_line , + dcache_size_word , + dcache_associativity , + dcache_hit_latence , + dcache_miss_penality , + + 1, // nb_level + cache_shared_nb_line , + cache_shared_size_line , + cache_shared_size_word , + cache_shared_associativity, + cache_shared_hit_latence , + cache_shared_miss_penality + ); + + cout << *param << endl; + + cache::Cache * cache = new cache::Cache ("my_cache",param); + + cout << *cache << endl; + cache->reset(); + cout << *cache << endl; + + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 16); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 15); + cache->transition(); + + cout << *cache << endl; + + + delete cache; + delete param; + delete [] cache_shared_nb_line ; + delete [] cache_shared_size_line ; + delete [] cache_shared_size_word ; + delete [] cache_shared_associativity; + delete [] cache_shared_hit_latence ; + delete [] cache_shared_miss_penality; + delete [] icache_nb_level ; + delete [] icache_nb_port ; + delete [] icache_nb_line [0]; + delete [] icache_size_line [0]; + delete [] icache_size_word [0]; + delete [] icache_associativity [0]; + delete [] icache_hit_latence [0]; + delete [] icache_miss_penality [0]; + delete [] icache_nb_line [1]; + delete [] icache_size_line [1]; + delete [] icache_size_word [1]; + delete [] icache_associativity [1]; + delete [] icache_hit_latence [1]; + delete [] icache_miss_penality [1]; + delete [] icache_nb_line ; + delete [] icache_size_line ; + delete [] icache_size_word ; + delete [] icache_associativity ; + delete [] icache_hit_latence ; + delete [] icache_miss_penality ; + delete [] dcache_nb_level ; + delete [] dcache_nb_port ; + delete [] dcache_nb_line [0]; + delete [] dcache_size_line [0]; + delete [] dcache_size_word [0]; + delete [] dcache_associativity [0]; + delete [] dcache_hit_latence [0]; + delete [] dcache_miss_penality [0]; + delete [] dcache_nb_line [1]; + delete [] dcache_size_line [1]; + delete [] dcache_size_word [1]; + delete [] dcache_associativity [1]; + delete [] dcache_hit_latence [1]; + delete [] dcache_miss_penality [1]; + delete [] dcache_nb_line ; + delete [] dcache_size_line ; + delete [] dcache_size_word ; + delete [] dcache_associativity ; + delete [] dcache_hit_latence ; + delete [] dcache_miss_penality ; + } + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: trunk/IPs/systemC/Environment/Cache/src/Cache.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache.cpp (revision 80) @@ -0,0 +1,47 @@ +#include "../include/Cache.h" +#include + +namespace environment { +namespace cache { + + Cache::Cache (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + cache_shared = new cache_multilevel::Cache_MultiLevel (name+"_cache_shared",param->param_cache_shared); + + icache_dedicated = new cache_multilevel::Cache_MultiLevel * [param->nb_cache_dedicated]; + dcache_dedicated = new cache_multilevel::Cache_MultiLevel * [param->nb_cache_dedicated]; + + for (uint32_t i=0; inb_cache_dedicated; i++) + { + { + std::stringstream str; + str << name << "_icache_dedicated_" << i; + + icache_dedicated [i] = new cache_multilevel::Cache_MultiLevel(str.str(),param->param_icache_dedicated [i]); + } + { + std::stringstream str; + str << name << "_dcache_dedicated_" << i; + + dcache_dedicated [i] = new cache_multilevel::Cache_MultiLevel(str.str(),param->param_dcache_dedicated [i]); + } + } + } + + Cache::~Cache (void) + { + for (uint32_t i=0; inb_cache_dedicated; i++) + { + delete icache_dedicated [i]; + delete dcache_dedicated [i]; + } + delete [] icache_dedicated; + delete [] dcache_dedicated; + delete cache_shared ; + } +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel.cpp (revision 80) @@ -0,0 +1,34 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + Cache_MultiLevel::Cache_MultiLevel (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + hierarchy_cache = new cache_onelevel::Cache_OneLevel * [param->nb_level]; + + for (uint32_t i=0; inb_level; i++) + { + std::stringstream str; + + str << name << "_level_" << i; + + hierarchy_cache[i] = new cache_onelevel::Cache_OneLevel (str.str(), param->param_cache[i]); + } + } + + Cache_MultiLevel::~Cache_MultiLevel (void) + { + for (uint32_t i=0; inb_level; i++) + delete hierarchy_cache [i]; + delete [] hierarchy_cache; + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp (revision 80) @@ -0,0 +1,39 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + Access Cache_MultiLevel::access (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir) + { + uint32_t time = 0; + uint32_t last_nb_level = (param->nb_level==0)?0:(param->nb_level-1); + type_rsp_cache_t hit = MISS; + + // Scan all cache level + for (uint32_t i = 0; i < param->nb_level; i ++) + { + hit = hierarchy_cache[i]->access (num_port,address,trdid,type,dir); + time += hierarchy_cache[i]->latence(num_port); + + std::cout << "SETH : " + << " * i : " << i + << " * hit : " << hit + << " * time :" << time << std::endl; + + if ( (hit == HIT_CACHE) or + (hit == HIT_WRITE_BUFFER) or + (hit == HIT_BYPASS) ) + { + last_nb_level = i; + break; + } + } + + return Access (num_port,hit,time,last_nb_level); + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_information.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_information.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_information.cpp (revision 80) @@ -0,0 +1,20 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + std::string Cache_MultiLevel::information (uint32_t depth) + { + std::string tab(depth,'\t'); + std::stringstream output; + + output << tab << "<" << name << ">" << std::endl + << param->print(depth); + + return output.str(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_latence.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_latence.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_latence.cpp (revision 80) @@ -0,0 +1,17 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + // Return the time to have the data + // latence is call on the same port in a single cycle, only the last access is save + uint32_t Cache_MultiLevel::latence (uint32_t num_port, uint32_t address, uint32_t trdid, type_req_cache_t type, direction_req_cache_t dir) + { + return update_access (access (num_port, address, trdid, type, dir)); + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_print.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_print.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_print.cpp (revision 80) @@ -0,0 +1,20 @@ +#include "../include/Cache_MultiLevel.h" + +namespace environment { +namespace cache { +namespace cache_multilevel { + + std::ostream& operator<< (std::ostream& output, Cache_MultiLevel & x) + { + output << x.information(0) << std::endl; + + for (uint32_t i=0; inb_level; i++) + { + output << *(x.hierarchy_cache[i]) << std::endl; + } + + return output; + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_reset.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_reset.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_reset.cpp (revision 80) @@ -0,0 +1,15 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + void Cache_MultiLevel::reset (void) + { + for (uint32_t i=0; inb_level; i++) + hierarchy_cache[i]->reset(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_transition.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_transition.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_transition.cpp (revision 80) @@ -0,0 +1,15 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + void Cache_MultiLevel::transition (void) + { + for (uint32_t i=0; inb_level; i++) + hierarchy_cache[i]->transition(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp (revision 80) @@ -0,0 +1,29 @@ +#include "../include/Cache_MultiLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_multilevel { + + uint32_t Cache_MultiLevel::update_access (Access cur_access) + { + if (cur_access.last_nb_level > 0) + { + uint32_t latence = cur_access.latence; + + for (uint32_t it = 0; it <= cur_access.last_nb_level; it ++) + latence = hierarchy_cache [it]->update_latence (cur_access.num_port,latence); + +// if (latence != 0) +// { +// std::cout << " after all update, latence must be null." << std::endl; +// exit(1); +// } + } + + return cur_access.latence; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel.cpp (revision 80) @@ -0,0 +1,38 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + Cache_OneLevel::Cache_OneLevel (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + access_port = new Access_Port [param->nb_port]; + tag = new Tag * [param->nb_line/param->associativity]; + for (uint32_t it = 0; it < param->nb_line/param->associativity; it ++) + tag [it] = new Tag [param->associativity]; + + size_address.offset = (uint32_t) log2(param->size_line * param->size_word); + size_address.familly = (uint32_t) log2(param->nb_line/param->associativity); + size_address.tag = 32 - size_address.familly - size_address.offset; + + param_write_buffer = new queue::Parameters (2); + + write_buffer = new queue::Sort_Queue_Dynamic (name+"_write_buffer",param_write_buffer); + } + + Cache_OneLevel::~Cache_OneLevel (void) + { + delete write_buffer; + delete param_write_buffer; + for (uint32_t it = 0; it < param->nb_line/param->associativity; it ++) + delete [] tag [it]; + delete [] tag; + delete [] access_port; + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access.cpp (revision 80) @@ -0,0 +1,35 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + // Return hit (true) + // uncache is to stocke the address on the cache + type_rsp_cache_t Cache_OneLevel::access (uint32_t num_port, + uint32_t address, + uint32_t trdid, + type_req_cache_t type, + direction_req_cache_t dir) + { +// std::cout << "" << std::endl +// << " * num_port : " << num_port << std::endl +// << " * address : " << std::hex << address << std::dec << std::endl +// << " * trdid : " << trdid << std::endl +// << " * type : " << type << std::endl +// << " * direction : " << dir << std::endl; + + switch (type) + { + case UNCACHED : return access_uncached (num_port,address,trdid ); break; + case INVALIDATE : return access_invalidate (num_port,address,trdid ); break; + case FLUSH : return access_flush (num_port,address,trdid ); break; + case PREFETCH : // no difference with the simple read cached (have no add a prefetch cache) + case CACHED : return access_cached (num_port,address,trdid,dir); break; + default : std::cout << " unknow type : " << std::endl; exit(1); break; + } + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_cached.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_cached.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_cached.cpp (revision 80) @@ -0,0 +1,68 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_cached (uint32_t num_port, uint32_t address, uint32_t trdid, direction_req_cache_t dir) + { + Address address_translate = translate_address(address); + uint32_t num_associativity = hit_cache (trdid, address_translate); + uint32_t num_access_port = hit_access_port (trdid, address_translate); + uint32_t num_write_buffer = hit_write_buffer (trdid, address_translate); + + if (num_access_port == param->nb_port) + num_access_port = num_port; + + uint32_t latence ; + type_rsp_cache_t res = MISS; + + bool is_in_cache = (num_associativity != param->associativity); + bool is_in_access_port = (num_access_port != num_port); + bool is_in_write_buffer = false; + + if (is_in_access_port == true) + { + res = HIT_BYPASS; + latence = access_port[num_access_port].latence; //already compute + } + else + if (is_in_cache == true) + { + res = HIT_CACHE; + latence = 0; // Hit !!! + } + else + { + + // Search in the write buffer, and test if have a miss + if ( num_write_buffer == write_buffer->nb_slot_use()) + { + res = MISS; + latence = param->miss_penality; // miss -> access at down of cache, + respons at the up of cache + } + else + { + res = HIT_WRITE_BUFFER; + is_in_write_buffer = true; + latence = write_buffer->read(num_write_buffer)._delay; + } + } + + // access_port valid = there are a new request to update + // -> no previous request in the same cycle (hit in a access port) + // -> no previous request in the previous cycle (hit in the write buffer) + + access_port[num_port].valid = ((is_in_access_port || is_in_write_buffer) == false); + access_port[num_port].address = address_translate; + access_port[num_port].trdid = trdid; + access_port[num_port].hit = res; + access_port[num_port].num_associativity = num_associativity; + access_port[num_port].latence = latence; + + return res; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_flush.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_flush.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_flush.cpp (revision 80) @@ -0,0 +1,16 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_flush (uint32_t num_port, uint32_t address, uint32_t trdid) + { + std::cerr << "<" << name << ".{Cache_OneLevel}.access_flush> Not implemented" << std::endl; + exit (0); + return MISS; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_invalidate.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_invalidate.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_invalidate.cpp (revision 80) @@ -0,0 +1,16 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_invalidate (uint32_t num_port, uint32_t address, uint32_t trdid) + { + std::cerr << "<" << name << ".{Cache_OneLevel}.access_invalidate> Not implemented" << std::endl; + exit (0); + return MISS; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_uncached.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_uncached.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_access_uncached.cpp (revision 80) @@ -0,0 +1,19 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + type_rsp_cache_t Cache_OneLevel::access_uncached (uint32_t num_port, uint32_t address, uint32_t trdid) + { + access_port[num_port].valid = false; + access_port[num_port].trdid = trdid; + access_port[num_port].hit = MISS; + access_port[num_port].latence = param->miss_penality; + + return MISS; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_access_port.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_access_port.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_access_port.cpp (revision 80) @@ -0,0 +1,26 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + // return the number of param->associativity if hit + // return nb_accosiativity if miss + uint32_t Cache_OneLevel::hit_access_port (uint32_t trdid, Address address) + { + uint32_t it_num_port = 0; + + // scan all port - test if have a transaction + for (it_num_port = 0; it_num_port < param->nb_port; it_num_port ++) + if ( (access_port[it_num_port].valid == true ) && + (access_port[it_num_port].trdid == trdid ) && + (access_port[it_num_port].address.tag == address.tag ) && + (access_port[it_num_port].address.familly == address.familly)) + break; + + return it_num_port; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_cache.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_cache.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_cache.cpp (revision 80) @@ -0,0 +1,27 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + uint32_t Cache_OneLevel::hit_cache (uint32_t trdid, Address address) + { + uint32_t num_associativity; + for (num_associativity = 0; num_associativity < param->associativity; num_associativity ++) + // Hit if : + // * in the line + // * in a way associative + // -> there are the same tag + // the same trdid + // is valid + if ( (tag [address.familly][num_associativity].address == address.tag) && + (tag [address.familly][num_associativity].valid == true ) && + (tag [address.familly][num_associativity].trdid == trdid ) ) + break; + + return num_associativity; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_write_buffer.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_write_buffer.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_hit_write_buffer.cpp (revision 80) @@ -0,0 +1,28 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + // If a instruction is in the write_buffer, return the position + // else, return the number of elt in the write_buffer + uint32_t Cache_OneLevel::hit_write_buffer (uint32_t trdid, Address address) + { + uint32_t num_write_buffer = 0; + // Scan the write_buffer + for (num_write_buffer = 0; num_write_buffer < write_buffer->nb_slot_use(); num_write_buffer ++) + { + queue::slot_t val = write_buffer->read(num_write_buffer); + + if ( (val._data.trdid == trdid ) && + (val._data.address.tag == address.tag ) && + (val._data.address.familly == address.familly)) + break; + } + + return num_write_buffer; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_index_victim.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_index_victim.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_index_victim.cpp (revision 80) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + // return the index of the next victim + uint32_t Cache_OneLevel::index_victim (uint32_t familly) + { + uint32_t victim = 0; + while (tag [familly][victim].index_lru != (param->associativity-1)) + victim ++; + + return victim; + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_information.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_information.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_information.cpp (revision 80) @@ -0,0 +1,20 @@ +#include "../include/Cache_OneLevel.h" +#include + +namespace environment { +namespace cache { +namespace cache_onelevel { + + std::string Cache_OneLevel::information (uint32_t depth) + { + std::string tab(depth,'\t'); + std::stringstream output; + + output << tab << "<" << name << ">" << std::endl + << param->print(depth); + + return output.str(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_latence.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_latence.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_latence.cpp (revision 80) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + // Return the time to have the data + // uncache is to stocke the address on the cache + uint32_t Cache_OneLevel::latence (uint32_t num_port) + { + uint32_t res = param->hit_latence + access_port[num_port].latence; + + return res; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_need_slot.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_need_slot.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_need_slot.cpp (revision 80) @@ -0,0 +1,20 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + uint32_t Cache_OneLevel::need_slot (void) + { + uint32_t res = 0; + // scan all port - test if have a transaction + for (uint32_t x = 0; x < param->nb_port; x ++) + if (access_port[x].valid == true) + res ++; + + return res; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_print.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_print.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_print.cpp (revision 80) @@ -0,0 +1,28 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + std::ostream& operator<< (std::ostream& output, Cache_OneLevel & x) + { + output << x.information(0) << std::endl + << "\t* Size Address (hex) : " << x.size_address << std::endl; + + output << " * Tag" << std::endl; + for (uint32_t i = 0; i < x.param->nb_line / x.param->associativity; i ++) + { + output << " "; + for (uint32_t j = 0; j < x.param->associativity; j ++) + output << x.tag [i][j] << " | "; + output << std::endl; + } + + output << " * Write Buffer" << std::endl; + output << *x.write_buffer << std::endl; + + return output; + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_reset.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_reset.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_reset.cpp (revision 80) @@ -0,0 +1,26 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + void Cache_OneLevel::reset (void) + { + for (uint32_t x = 0; x < param->nb_port; x ++) + access_port[x].valid = false; + + for (uint32_t x = 0; x < param->nb_line/param->associativity; x ++) + for (uint32_t y = 0; y < param->associativity; y ++) + { + tag[x][y].valid = false; + tag[x][y].index_lru = y; + + // Optionnal init + tag[x][y].trdid = 0; + tag[x][y].address = 0; + } + write_buffer->reset(); + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp (revision 80) @@ -0,0 +1,55 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + void Cache_OneLevel::transition (void) + { + // scan all port - test if have a transaction + for (int32_t x = param->nb_port-1; x >= 0; x --) + { + if (access_port[x].valid == true) + { + access_port[x].valid = false; + + // Update LRU + // * hit : now + // * miss : after the return of next cache + + if (access_port[x].hit == HIT_CACHE) + {// Hit + update_lru(access_port[x].address.familly,access_port[x].num_associativity); + } + + if (access_port[x].hit == MISS) + {// Miss + // Write in write_buffer + write_buffer->push(access_port[x].latence,Write_Buffer(access_port[x].address,access_port[x].trdid)); + } + } + } + + write_buffer->transition(); + + // Test if a write_buffer have the result + while ((write_buffer->empty() == false) && (write_buffer->read(0)._delay == 0)) + { + // Save in the cache + Write_Buffer val = write_buffer->pop(); + + uint32_t num_tag = val.address.tag; + uint32_t num_familly = val.address.familly; + uint32_t num_associativity = index_victim(num_familly); + + tag [num_familly][num_associativity].valid = true; + tag [num_familly][num_associativity].address = num_tag; + tag [num_familly][num_associativity].trdid = val.trdid; + + update_lru(num_familly,num_associativity); + } + + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_translate_address.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_translate_address.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_translate_address.cpp (revision 80) @@ -0,0 +1,25 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + Address Cache_OneLevel::translate_address (uint32_t address) + { + Address address_translated; + uint32_t shift; + + address_translated.offset = (address & ((uint32_t)-1 >> (32-(size_address.offset )))); + address -= address_translated.offset; + shift = size_address.offset; + address_translated.familly = (address & ((uint32_t)-1 >> (32-(size_address.familly + shift))))>>shift; + address -= address_translated.familly; + shift += size_address.familly; + address_translated.tag = (address & ((uint32_t)-1 >> (32-(size_address.tag + shift))))>>shift; + + return address_translated; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_update_latence.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_update_latence.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_update_latence.cpp (revision 80) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + // Return the time to have the data + // uncache is to stocke the address on the cache + uint32_t Cache_OneLevel::update_latence (uint32_t num_port, uint32_t latence) + { + uint32_t new_latence = latence-param->hit_latence; + access_port[num_port].latence = new_latence; + return new_latence-param->miss_penality; + } + +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_update_lru.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_update_lru.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_update_lru.cpp (revision 80) @@ -0,0 +1,18 @@ +#include "../include/Cache_OneLevel.h" + +namespace environment { +namespace cache { +namespace cache_onelevel { + + void Cache_OneLevel::update_lru (uint32_t familly, uint32_t num_associativity) + { + uint32_t current_lru = tag [familly][num_associativity].index_lru; + + for (uint32_t k = 0; k < param->associativity; k ++) + if (tag [familly][k].index_lru < current_lru) + tag [familly][k].index_lru ++; + tag [familly][num_associativity].index_lru = 0; + } +}; +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_information.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_information.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_information.cpp (revision 80) @@ -0,0 +1,19 @@ +#include "../include/Cache.h" +#include + +namespace environment { +namespace cache { + + std::string Cache::information (uint32_t depth) + { + std::string tab(depth,'\t'); + std::stringstream output; + + output << tab << "<" << name << ">" << std::endl + << param->print(depth); + + return output.str(); + } + +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp (revision 80) @@ -0,0 +1,61 @@ +#include "../include/Cache.h" + +namespace environment { +namespace cache { + + // Return the time to have the data + // latence is call on the same port in a single cycle, only the last access is save + // { NOTE } : type_cache = 0 : icache, 1 : dcache + uint32_t Cache::latence (cache_t type_cache, + uint32_t num_entity, + uint32_t num_port , + uint32_t address , + uint32_t trdid , + type_req_cache_t type , + direction_req_cache_t dir ) + { + if (num_entity >= param->nb_cache_dedicated) + { + std::cerr << " {ERROR} num_entity must be >= nb_cache_dedicated" << std::endl; + exit (1); + } + + cache_multilevel::Cache_MultiLevel * cache; + if (type_cache == INSTRUCTION_CACHE) + cache = icache_dedicated [num_entity]; + else + cache = dcache_dedicated [num_entity]; + + if (num_port >= cache->param->nb_port) + { + std::cerr << " {ERROR} num_port can be >= nb_port" << std::endl; + exit (1); + } + + // Make a access with this level "dedicated" + std::cout << "cache dedicated : access" << std::endl; + cache_multilevel::Access access_dedicated = cache->access(num_port,address,trdid,type,dir); + + if (access_dedicated.hit == MISS) + { + std::cout << "cache shared : access" << std::endl; + // Make a access with this level "shared" + cache_multilevel::Access access_shared = cache_shared->access(range_port (type_cache,num_entity)+num_port,address,trdid,type,dir); + + cache_shared->update_access (access_shared); + + access_dedicated.last_nb_level = param->nb_cache_dedicated-1; // Update all cache + access_dedicated.latence += access_shared.latence; + } + + std::cout << "end access, update access" << std::endl; + + cache->update_access (access_dedicated); + + std::cout << "end access, update access" << std::endl; + + return access_dedicated.latence; + } + +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_print.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_print.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_print.cpp (revision 80) @@ -0,0 +1,21 @@ +#include "../include/Cache.h" + +namespace environment { +namespace cache { + + std::ostream& operator<< (std::ostream& output, Cache & x) + { + output << x.information(0) << std::endl; + + for (uint32_t i=0; inb_cache_dedicated; i++) + output << *(x.icache_dedicated[i]) << std::endl; + for (uint32_t i=0; inb_cache_dedicated; i++) + output << *(x.dcache_dedicated[i]) << std::endl; + + output << *(x.cache_shared) << std::endl; + + return output; + } + +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp (revision 80) @@ -0,0 +1,33 @@ +#include "../include/Cache.h" + +namespace environment { +namespace cache { + + uint32_t Cache::range_port (cache_t type_cache, + uint32_t num_entity) + { + uint32_t nb_port_dedicated = 0; + + if (type_cache == INSTRUCTION_CACHE) + { + for (uint32_t i = 1; i < num_entity; i++ ) + nb_port_dedicated += param->param_icache_dedicated [i]->nb_port; + } + else + { + std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; + nb_port_dedicated += param->nb_iport; + std::cout << "nb_port_dedicated : " << param->nb_iport<< std::endl; + + for (uint32_t i = 1; i < num_entity; i++) + nb_port_dedicated += param->param_dcache_dedicated [i]->nb_port; + } + + std::cout << "nb_port_dedicated : " << num_entity << std::endl; + std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; + + return nb_port_dedicated; + } + +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_reset.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_reset.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_reset.cpp (revision 80) @@ -0,0 +1,18 @@ +#include "../include/Cache.h" + +namespace environment { +namespace cache { + + void Cache::reset (void) + { + for (uint32_t i=0; inb_cache_dedicated; i++) + { + icache_dedicated[i]->reset(); + dcache_dedicated[i]->reset(); + } + + cache_shared->reset(); + } + +}; +}; Index: trunk/IPs/systemC/Environment/Cache/src/Cache_transition.cpp =================================================================== --- trunk/IPs/systemC/Environment/Cache/src/Cache_transition.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Cache/src/Cache_transition.cpp (revision 80) @@ -0,0 +1,18 @@ +#include "../include/Cache.h" + +namespace environment { +namespace cache { + + void Cache::transition (void) + { + for (uint32_t i=0; inb_cache_dedicated; i++) + { + icache_dedicated[i]->transition(); + dcache_dedicated[i]->transition(); + } + + cache_shared->transition(); + } + +}; +}; Index: trunk/IPs/systemC/Environment/Makefile.Environnement =================================================================== --- trunk/IPs/systemC/Environment/Makefile.Environnement (revision 80) +++ trunk/IPs/systemC/Environment/Makefile.Environnement (revision 80) @@ -0,0 +1,90 @@ +include $(MORPHEO_TOPLEVEL)/Makefile.tools + +#-----[ Directory ]---------------------------------------- +DIR_TST = selftest +DIR_INC = include +DIR_SRC = src +DIR_OBJ = obj +DIR_BIN = bin + +#-----[ Compilation ]-------------------------------------- +INCDIR = $(SYSTEMC_INCDIR_$(SIMULATOR)) \ + -I$(DIR_INC) + +LIBDIR = + +FLAGS = $(SYSTEMC_CFLAGS_$(SIMULATOR)) \ + $(CXX_FLAGS) + +CFLAGS = $(MORPHEO_FLAGS) $(FLAGS) $(INCDIR) +LFLAGS = $(MORPHEO_FLAGS) $(FLAGS) $(LIBDIR) + +#-----[ Variable ]----------------------------------------- + +ENTITY = `$(BASENAME) $$PWD` + +OBJECTS = $(patsubst $(DIR_SRC)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SRC)/*.cpp)) +OBJECTS_BIN = $(patsubst $(DIR_TST)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_TST)/*.cpp)) + +HEADERS = $(wildcard $(DIR_INC)/*.h) + +EXE = $(DIR_BIN)/soft.x + +#-----[ Rules ]-------------------------------------------- + +.PRECIOUS : $(DIR_OBJ)/%.o $(DIR_BIN)/%.x + +test_env : + @$(ECHO) "-------------------[ $(ENTITY) ]" + +$(DIR_OBJ)/%.o : $(DIR_SRC)/%.cpp $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(CXX) $(CFLAGS) -c -o $@ $<; + +$(DIR_OBJ)/%.o : $(DIR_TST)/%.cpp $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(CXX) $(CFLAGS) -c -o $@ $<; + +$(DIR_BIN)/%.x : $(OBJECTS_DEPS) $(OBJECTS) $(OBJECTS_BIN) + \ + $(ECHO) "Compilation : $*";\ + $(CXX) $(LFLAGS) -o $@ $^; + +$(DIR_OBJ) : + @\ + $(ECHO) "Create directory : $@";\ + $(MKDIR) $@ + +$(DIR_BIN) : + @\ + $(ECHO) "Create directory : $@";\ + $(MKDIR) $@ + + +exe : all_environment + @\ + $(VALGRIND) ./$(EXE) + +all_environment : test_env $(DIR_OBJ) $(DIR_BIN) + @\ + $(MAKE) $(EXE) + +environment_clean : + @\ + $(ECHO) "Delete temporary files in directory "$(PWD);\ + $(RM) *~ \ + $(DIR_OBJ) \ + $(DIR_BIN) \ + $(DIR_TST)/*~ \ + $(DIR_SRC)/*~ \ + $(DIR_INC)/*~; + +environment_help : + @\ + $(ECHO) " -----[ Environment ]------------------------------";\ + $(ECHO) "";\ + $(ECHO) " * test_env : test if environnment's variable is set";\ + $(ECHO) " * all_environment : generate object";\ + $(ECHO) ""; Index: trunk/IPs/systemC/Environment/Queue/Makefile =================================================================== --- trunk/IPs/systemC/Environment/Queue/Makefile (revision 80) +++ trunk/IPs/systemC/Environment/Queue/Makefile (revision 80) @@ -0,0 +1,12 @@ +#-----[ Rules ]-------------------------------------------- + +all : + @$(MAKE) all_environment + +clean : + @$(MAKE) environment_clean + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: trunk/IPs/systemC/Environment/Queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/Environment/Queue/include/Parameters.h (revision 80) +++ trunk/IPs/systemC/Environment/Queue/include/Parameters.h (revision 80) @@ -0,0 +1,22 @@ +#ifndef ENVIRONMENT_QUEUE_PARAMETERS_H +#define ENVIRONMENT_QUEUE_PARAMETERS_H + +#include +#include + +namespace environment { +namespace queue { + + class Parameters + { + public : uint32_t _size; + + public : Parameters (uint32_t size) + { + _size = size; + } + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Queue/include/Queue.h =================================================================== --- trunk/IPs/systemC/Environment/Queue/include/Queue.h (revision 80) +++ trunk/IPs/systemC/Environment/Queue/include/Queue.h (revision 80) @@ -0,0 +1,78 @@ +#ifndef ENVIRONMENT_QUEUE_QUEUE_H +#define ENVIRONMENT_QUEUE_QUEUE_H + +#include +#include +#include "Slot.h" + +namespace environment { +namespace queue { + + template + class Queue + { + protected : std::string _name; + protected : uint32_t _nb_slot; // number of slot + protected : uint32_t _size; // size of queue + protected : slot_t * _slot; + + public : Queue (std::string name, + uint32_t size) + { + _name = name; + _nb_slot = 0; + _size = size; + _slot = new slot_t [size]; + }; + + public : virtual ~Queue () + { + delete [] _slot; + }; + + // *****[ empty ]***** + // Test if the queue is empty + public : bool empty () + { + return (_nb_slot == 0); + } + + // *****[ full ]***** + // Test if the queue is full + public : bool full () + { + return (_nb_slot == _size); + } + + // *****[ nb_slot_free ]***** + // return the number of free slot + public : uint32_t nb_slot_free () + { + return (_size-_nb_slot); + } + + // *****[ nb_slot_use ]***** + // return the number of use slot + public : uint32_t nb_slot_use () + { + return (_nb_slot); + } + + // *****[ pop ]***** + // read the queue, and update the pointer + public : virtual T pop () {return T();}; + + // *****[ pop ]***** + // read the queue, and update the pointer + public : virtual T pop (uint32_t num) {return T();}; + + // *****[ push ]***** + // Push a new value (they must have a slot free) + public : virtual bool push (T val) {return false;}; + + }; // Queue + +}; +}; +#endif + Index: trunk/IPs/systemC/Environment/Queue/include/Slot.h =================================================================== --- trunk/IPs/systemC/Environment/Queue/include/Slot.h (revision 80) +++ trunk/IPs/systemC/Environment/Queue/include/Slot.h (revision 80) @@ -0,0 +1,36 @@ +#ifndef ENVIRONMENT_QUEUE_SLOT_H +#define ENVIRONMENT_QUEUE_SLOT_H + +#include +#include + +namespace environment { +namespace queue { + + template + class slot_t + { + public : uint32_t _delay; // delay of disponibilty of data + public : T _data; + + public : slot_t (void) + { + } + + public : slot_t (uint32_t delay, T data) + { + _delay = delay; + _data = data; + } + + public : friend std::ostream& operator<< (std::ostream& output, const slot_t & x) + { + output << x._delay << " " << x._data; + return output; + } + }; + +}; +}; +#endif + Index: trunk/IPs/systemC/Environment/Queue/include/Sort_Queue.h =================================================================== --- trunk/IPs/systemC/Environment/Queue/include/Sort_Queue.h (revision 80) +++ trunk/IPs/systemC/Environment/Queue/include/Sort_Queue.h (revision 80) @@ -0,0 +1,157 @@ +#ifndef ENVIRONMENT_QUEUE_SORT_QUEUE_H +#define ENVIRONMENT_QUEUE_SORT_QUEUE_H + +#include +#include +#include "Parameters.h" +#include "Queue.h" + +namespace environment { +namespace queue { + + /* + * Cicurlar queue, sort by delay + */ + + template + class Sort_Queue : public Queue + { + // *****[ variables ]***** + protected : uint32_t _ptr_read; // pointer of the next slot to read + protected : uint32_t _ptr_write; // pointer of the next slot to write + + // *****[ constructor ]***** + public : Sort_Queue (std::string name, + Parameters * param) : Queue (name,param->_size) + { + }; + + // *****[ destructor ]***** + public : ~Sort_Queue () + { + }; + + // *****[ reset ]***** + // Reset the queue in the empty state + public : void reset () + { + _ptr_read = 0; + _ptr_write = 0; + Queue ::_nb_slot = 0; + }; + + // *****[ transition ]***** + // Decrease the delay at all cycle + public : void transition () + { + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + uint32_t ptr = (_ptr_read + it)%Queue ::_size; + + if (Queue ::_slot[ptr]._delay != 0) + Queue ::_slot[ptr] ._delay --; + } + } + + // *****[ read ]***** + // return the n-eme slot. + // (first = 0) + public : slot_t read (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + return Queue ::_slot[(_ptr_read + num)%Queue ::_size]; + }; + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop () + { + return pop (0); + } + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + T val = Queue ::_slot [(_ptr_read+num)%Queue ::_size]._data; + + // Reorganize the queue + + for (uint32_t it = 0; it < num; it ++) + { + uint32_t ptr = (_ptr_read + num - it )%Queue ::_size; + uint32_t _ptr_next = (ptr-1)%Queue ::_size; + + Queue ::_slot [ptr] = Queue ::_slot [_ptr_next]; + } + + Queue ::_nb_slot --; + _ptr_read = (_ptr_read+1)%Queue ::_size; + + return val; + } + + // *****[ push ]***** + // Push a new value (they must have a slot free) + // Is sort by delay + public : bool push (uint32_t delay, T val) + { + // If full -> quit + if (Queue ::_nb_slot == Queue ::_size) + return false; + + uint32_t ptr = _ptr_write; + + // Scan the fill to find the good position (keep the sort) + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + uint32_t _ptr_scan = (ptr-1)%Queue ::_size; + + if (Queue ::_slot[_ptr_scan]._delay <= delay) + break; //find + + // reformor the queue + Queue ::_slot [ptr] = Queue ::_slot [_ptr_scan]; + ptr = _ptr_scan; + } + + Queue ::_slot [ptr] = slot_t (delay,val); + _ptr_write = (_ptr_write+1)%Queue ::_size; // update the pointer + Queue ::_nb_slot ++; + + return true; + } + + // *****[ print ]***** + public : friend std::ostream& operator<< (std::ostream& output, const Sort_Queue & x) + { + output << "<" << x._name << ">" << std::endl; + output << " * ptr_read : " << x._ptr_read << std::endl; + output << " * ptr_write : " << x._ptr_write << std::endl; + output << " * nb_slot : " << x._nb_slot << std::endl; + output << " * size : " << x._size << std::endl; + + for (uint32_t it = 0; it < x._nb_slot; it ++) + { + uint32_t ptr = (x._ptr_read+it)%x._size; + output << x._slot [ptr] << std::endl; + } + + return output; + }; + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Queue/include/Sort_Queue_Dynamic.h =================================================================== --- trunk/IPs/systemC/Environment/Queue/include/Sort_Queue_Dynamic.h (revision 80) +++ trunk/IPs/systemC/Environment/Queue/include/Sort_Queue_Dynamic.h (revision 80) @@ -0,0 +1,210 @@ +#ifndef ENVIRONMENT_QUEUE_SORT_QUEUE_DYNAMIC_H +#define ENVIRONMENT_QUEUE_SORT_QUEUE_DYNAMIC_H + +#include +#include +#include "Parameters.h" +#include "Queue.h" + +namespace environment { +namespace queue { + +#define PERCENT_USE_MAX 90 +#define PERCENT_USE_MIN 33 + + /* + * Queue, sort by delay with a dynamic size + */ + + template + class Sort_Queue_Dynamic : public Queue + { + // *****[ variables ]***** + private : uint32_t _factor ; + private : uint32_t _size_base; + + // *****[ constructor ]***** + public : Sort_Queue_Dynamic (std::string name, Parameters * param) : Queue (name, param->_size) + { + _size_base = param->_size; + _factor = 1; + }; + + // *****[ destructor ]***** + public : ~Sort_Queue_Dynamic () + { + }; + + // *****[ must_decrease ]***** + // Test if the queue must be decrease + private : bool must_decrease (void) + { + return ( (_factor > 1 ) and + (((100*Queue ::_nb_slot)/Queue ::_size) <= PERCENT_USE_MIN)); + } + + // *****[ must_increase ]***** + // Test if the queue must be increase + private : bool must_increase (void) + { + return (((100*Queue ::_nb_slot)/Queue ::_size) >= PERCENT_USE_MAX); + } + + // *****[ increase ]***** + // increase the queue + private : void increase (void) + { + _factor ++; + change_size (_factor*_size_base); + } + + // *****[ decrease ]***** + // decrease the queue + private : void decrease (void) + { + _factor --; + change_size (_factor*_size_base); + } + + // *****[ change_size ]***** + // decrease the queue + private : void change_size (uint32_t new_size) + { + slot_t * new_slot = new slot_t [new_size]; + + // copy data + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + new_slot [it] = Queue ::_slot [it]; + } + // Change information + + delete [] Queue ::_slot; + + Queue ::_slot = new_slot; + Queue ::_size = new_size; + } + + // *****[ reset ]***** + // Reset the queue in the empty state + public : void reset (void) + { + Queue ::_nb_slot = 0; + }; + + // *****[ transition ]***** + // Decrease the delay at all cycle + public : void transition () + { + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + if (Queue ::_slot[it]._delay != 0) + Queue ::_slot[it] ._delay --; + } + } + + // *****[ read ]***** + // return the n-eme slot. + // (first = 0) + public : slot_t read (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= _nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + return Queue ::_slot[num]; + }; + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop () + { + return pop (0); + } + + // *****[ pop ]***** + // read the queue, and update the pointer + public : T pop (uint32_t num) + { + if (num >= Queue ::_nb_slot) + { + std::cerr << " {ERROR} can't read because : num (" << num << ") >= _nb_slot (" << Queue ::_nb_slot << ")" << std::endl; + exit(1); + } + + // If full -> quit + if (must_decrease() == true) + decrease(); + + T val = Queue ::_slot [num]._data; + + // Reorganize the queue + + for (uint32_t it = num; it < Queue ::_nb_slot; it ++) + { + uint32_t ptr = (it); + uint32_t ptr_next = (it+1); + + Queue ::_slot [ptr] = Queue ::_slot [ptr_next]; + } + + Queue ::_nb_slot --; + + return val; + } + + // *****[ push ]***** + // Push a new value (they must have a slot free) + // Is sort by delay + public : bool push (uint32_t delay, T val) + { +// std::cout << val << std::endl; + + // Test if must increase the queue (never full) + if (must_increase() == true) + increase(); + + uint32_t ptr = Queue ::_nb_slot; + + // Scan the fill to find the good position (keep the sort) + for (uint32_t it = 0; it < Queue ::_nb_slot; it ++) + { + uint32_t ptr_scan = ptr-1; // ptr > 0 + + if (Queue ::_slot[ptr_scan]._delay <= delay) + break; //find + + // reformor the queue + Queue ::_slot [ptr] = Queue ::_slot [ptr_scan]; + ptr = ptr_scan; + } + + Queue ::_slot [ptr] = slot_t (delay,val); + Queue ::_nb_slot ++; + + return true; + } + // *****[ print ]***** + public : friend std::ostream& operator<< (std::ostream& output, const Sort_Queue_Dynamic & x) + { + output << "<" << x._name << ">" << std::endl; + output << " * nb_slot : " << x._nb_slot << std::endl; + output << " * size : " << x._size << std::endl; + output << " * factor : " << x._factor << std::endl; + + for (uint32_t it = 0; it < x._nb_slot; it ++) + { + output << x._slot [it] << std::endl; + } + + return output; + }; + + + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/Queue/selftest/main.cpp =================================================================== --- trunk/IPs/systemC/Environment/Queue/selftest/main.cpp (revision 80) +++ trunk/IPs/systemC/Environment/Queue/selftest/main.cpp (revision 80) @@ -0,0 +1,224 @@ +#include +#include "../include/Sort_Queue.h" +#include "../include/Sort_Queue_Dynamic.h" + +using namespace std; +using namespace environment; +using namespace environment::queue; + + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ + } while (0) + +class Entry +{ +public : uint32_t _trdid; // number of thread +public : uint32_t _pktid; // number of packet +public : uint64_t _data; + + Entry (void) + { + _trdid = 0; + _pktid = 0; + _data = 0; + }; + + Entry (uint32_t trdid , + uint32_t pktid , + uint64_t data ) + { + _trdid = trdid; + _pktid = pktid; + _data = data ; + }; + + friend std::ostream& operator<< (std::ostream& output, Entry x) + { + output << x._trdid << " " << x._pktid << " " << std::hex << x._data << std::dec; + return output; + } +}; + + +int main (void) +{ + cout << "
Begin" << endl; + + { + cout << "
* create and print a slot_t" << endl; + slot_t * my_slot = new slot_t (12, 0xdeadbeef); + cout << *my_slot << endl; + + delete my_slot; + } + + { + cout << "==================================" << endl; + cout << "=====[ Sort_Queue ]===============" << endl; + cout << "==================================" << endl; + cout << "
* create a queue, size = 5" << endl; + Parameters * param = new Parameters (5); + + Sort_Queue * my_Sort_Queue = new Sort_Queue ("my_queue",param); + + cout << " * must be empty ..." << endl; + TEST(my_Sort_Queue->empty(),true ); + TEST(my_Sort_Queue->full (),false); + + cout << " * insert 6 elements" << endl; + + TEST(my_Sort_Queue->push((uint32_t)5,Entry(1,1,0x33333333)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)6,Entry(2,2,0x55555555)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)3,Entry(3,3,0x22222222)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)5,Entry(4,4,0x44444444)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)1,Entry(5,5,0x11111111)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)4,Entry(6,6,0x00000BAD)),false); cout << *my_Sort_Queue << endl; + + cout << " * extract 6 elements" << endl; + TEST(my_Sort_Queue->pop()._data,0x11111111); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x22222222); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x33333333); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x44444444); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),false); + TEST(my_Sort_Queue->pop()._data,0x55555555); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->empty(),true ); + + cout << " * ajout de 8 elements (reset apres le deuxieme)" << endl; + + TEST(my_Sort_Queue->push((uint32_t)5,Entry(1,1,0x44444444)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)6,Entry(2,2,0x55555555)),true ); cout << *my_Sort_Queue << endl; + my_Sort_Queue->reset(); + TEST(my_Sort_Queue->push((uint32_t)3,Entry(3,3,0x22222222)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)5,Entry(4,4,0x33333333)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)5,Entry(1,1,0x44444444)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)7,Entry(2,2,0x55555555)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)1,Entry(5,5,0x11111111)),true ); cout << *my_Sort_Queue << endl; + TEST(my_Sort_Queue->push((uint32_t)4,Entry(6,6,0x00000BAD)),false); cout << *my_Sort_Queue << endl; + + cout << " * 3 transitions" << endl; + + my_Sort_Queue->transition(); cout << *my_Sort_Queue << endl; + my_Sort_Queue->transition(); cout << *my_Sort_Queue << endl; + my_Sort_Queue->transition(); cout << *my_Sort_Queue << endl; + + cout << " * extract 1 element" << endl; + + TEST(my_Sort_Queue->pop()._data,0x11111111); + + cout << *my_Sort_Queue << endl; + + for (uint32_t it = 0; it < my_Sort_Queue->nb_slot_use(); it ++) + { + slot_t val = my_Sort_Queue->read(it); + cout << val._delay << " " << val._data << endl; + } + + cout << " * Test pop(n)" << endl; + + TEST(my_Sort_Queue->pop(1)._data, 0x33333333); + TEST(my_Sort_Queue->pop(2)._data, 0x55555555); + TEST(my_Sort_Queue->pop(0)._data, 0x22222222); + TEST(my_Sort_Queue->pop(0)._data, 0x44444444); + + delete my_Sort_Queue; + delete param; + } + + { + cout << "==================================" << endl; + cout << "=====[ Sort_Queue_Dynamic ]=======" << endl; + cout << "==================================" << endl; + cout << "
* create a queue, size = 5" << endl; + Parameters * param = new Parameters (5); + + Sort_Queue_Dynamic * my_Sort_Queue_Dynamic = new Sort_Queue_Dynamic ("my_queue",param); + + cout << " * must be empty ..." << endl; + + TEST(my_Sort_Queue_Dynamic->empty(),true); + TEST(my_Sort_Queue_Dynamic->full (),false); + + TEST(my_Sort_Queue_Dynamic->push(5,Entry(1,1, 4)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 6)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(3,Entry(3,3, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(5,Entry(4,4, 5)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(1,Entry(5,5, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(4,Entry(6,6, 3)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(9,Entry(1,1,12)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 7)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(3,3, 8)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(4,4, 9)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(8,Entry(5,5,11)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(6,6,10)),true ); cout << *my_Sort_Queue_Dynamic << endl; + + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 3 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 4 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 5 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 6 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 7 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 8 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 9 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data,10 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data,11 ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data,12 ); cout << *my_Sort_Queue_Dynamic << endl; + + + TEST(my_Sort_Queue_Dynamic->push(5,Entry(1,1, 4)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 6)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(3,Entry(3,3, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(5,Entry(4,4, 5)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(1,Entry(5,5, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(4,Entry(6,6, 3)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(9,Entry(1,1,12)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(6,Entry(2,2, 7)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(3,3, 8)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(4,4, 9)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(8,Entry(5,5,11)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(7,Entry(6,6,10)),true ); cout << *my_Sort_Queue_Dynamic << endl; + + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(1,1, 1)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->push(0,Entry(2,2, 2)),true ); cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 1 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 2 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop()._data, 3 ) ; cout << *my_Sort_Queue_Dynamic << endl; + TEST(my_Sort_Queue_Dynamic->pop(2)._data, 6 ) ; cout << *my_Sort_Queue_Dynamic << endl; + + delete my_Sort_Queue_Dynamic; + delete param; + } + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: trunk/IPs/systemC/Environment/RamLock/Makefile =================================================================== --- trunk/IPs/systemC/Environment/RamLock/Makefile (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/Makefile (revision 80) @@ -0,0 +1,12 @@ +#-----[ Rules ]-------------------------------------------- + +all : + @$(MAKE) all_environment + +clean : + @$(MAKE) environment_clean + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: trunk/IPs/systemC/Environment/RamLock/include/Parameters.h =================================================================== --- trunk/IPs/systemC/Environment/RamLock/include/Parameters.h (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/include/Parameters.h (revision 80) @@ -0,0 +1,25 @@ +#ifndef Environment_Parameters_H +#define Environment_Parameters_H + +#include + +namespace environment { +namespace ramlock { + + class Parameters + { + public : uint32_t _size; + + public : Parameters (uint32_t size) + { + _size = size; + } + + public : ~Parameters (void) + {}; + + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/RamLock/include/RamLock.h =================================================================== --- trunk/IPs/systemC/Environment/RamLock/include/RamLock.h (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/include/RamLock.h (revision 80) @@ -0,0 +1,37 @@ +#ifndef Environment_RamLock_H +#define Environment_RamLock_H + +#include +#include + +#include "Parameters.h" + +namespace environment { +namespace ramlock { + +#define UNLOCK false +#define LOCK true + + class RamLock + { + // field + private : std::string _name; + private : Parameters * _param; + private : bool * _lock; + + // method + public : RamLock (std::string name, + Parameters * param); + public : ~RamLock (void); + +//public : bool test (uint32_t num_lock); + public : void reset (void); + public : bool read (uint32_t num_lock); + public : bool write (uint32_t num_lock); + + public : friend std::ostream& operator<< (std::ostream& output, environment::ramlock::RamLock & x); + }; + +}; +}; +#endif Index: trunk/IPs/systemC/Environment/RamLock/selftest/main.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/selftest/main.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/selftest/main.cpp (revision 80) @@ -0,0 +1,50 @@ +#include +#include "../include/RamLock.h" + +using namespace std; +using namespace environment; +using namespace environment::ramlock; + + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK"; \ + } \ + else \ + { \ + cout << "Test KO"; \ + exit (EXIT_FAILURE); \ + } \ + cout << endl; \ + } while (0) + + + +int main (void) +{ + cout << "
Begin" << endl; + + cout << " * Create a Ramlock with a size of 70" << endl; + + Parameters * param = new Parameters (70); + RamLock * my_ramlock = new RamLock("my_ramlock",param); + + my_ramlock->reset(); + + cout << *my_ramlock << endl; + + TEST (my_ramlock->read (10) , UNLOCK); cout << *my_ramlock << endl; + TEST (my_ramlock->read (10) , LOCK); cout << *my_ramlock << endl; + TEST (my_ramlock->write(10) , LOCK); cout << *my_ramlock << endl; + TEST (my_ramlock->write(10) , UNLOCK); cout << *my_ramlock << endl; + + delete param ; + delete my_ramlock ; + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: trunk/IPs/systemC/Environment/RamLock/src/RamLock.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/src/RamLock.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/src/RamLock.cpp (revision 80) @@ -0,0 +1,20 @@ +#include "../include/RamLock.h" + +namespace environment { +namespace ramlock { + + RamLock::RamLock (std::string name, + Parameters * param) + { + _name = name; + _param = param; + _lock = new bool [param->_size]; + } + + RamLock::~RamLock (void) + { + delete [] _lock; + } + +}; +}; Index: trunk/IPs/systemC/Environment/RamLock/src/RamLock_print.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/src/RamLock_print.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/src/RamLock_print.cpp (revision 80) @@ -0,0 +1,25 @@ +#include "../include/RamLock.h" + +namespace environment { +namespace ramlock { + + std::ostream& operator<< (std::ostream& output, environment::ramlock::RamLock & x) + { + output << "<" << x._name << ">" << std::endl; + output << " * size : " << x._param->_size << std::endl; + + for (uint32_t it = 0; it < x._param->_size; it ++) + { + if (it % 32 == 0) + output << std::endl; + + output << x._lock [it] << " "; + } + output << std::endl; + + return output; + + } + +}; +}; Index: trunk/IPs/systemC/Environment/RamLock/src/RamLock_read.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/src/RamLock_read.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/src/RamLock_read.cpp (revision 80) @@ -0,0 +1,15 @@ +#include "../include/RamLock.h" + +namespace environment { +namespace ramlock { + + // return the value of the lock and take this + bool RamLock::read (uint32_t num_lock) + { + bool val = _lock [num_lock]; + _lock [num_lock] = LOCK; + + return val; + } +}; +}; Index: trunk/IPs/systemC/Environment/RamLock/src/RamLock_reset.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/src/RamLock_reset.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/src/RamLock_reset.cpp (revision 80) @@ -0,0 +1,14 @@ +#include "../include/RamLock.h" + +namespace environment { +namespace ramlock { + + void RamLock::reset (void) + { + // Take all lock and set UNLOCK value + for (uint32_t it = 0; it < _param->_size; it ++) + _lock [it] = UNLOCK; + } + +}; +}; Index: trunk/IPs/systemC/Environment/RamLock/src/RamLock_test.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/src/RamLock_test.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/src/RamLock_test.cpp (revision 80) @@ -0,0 +1,11 @@ +#include "../include/RamLock.h" + +namespace environment { +namespace ramlock { + +// bool RamLock::test (uint32_t num_lock) +// { +// return num_lock < _param->_size; +// } +}; +}; Index: trunk/IPs/systemC/Environment/RamLock/src/RamLock_write.cpp =================================================================== --- trunk/IPs/systemC/Environment/RamLock/src/RamLock_write.cpp (revision 80) +++ trunk/IPs/systemC/Environment/RamLock/src/RamLock_write.cpp (revision 80) @@ -0,0 +1,15 @@ +#include "../include/RamLock.h" + +namespace environment { +namespace ramlock { + + // return the value of the lock and untake this + bool RamLock::write (uint32_t num_lock) + { + bool val = _lock [num_lock]; + _lock [num_lock] = UNLOCK; + + return val; + } +}; +};