Index: /trunk/Documents/MORPHEO-Install.txt =================================================================== --- /trunk/Documents/MORPHEO-Install.txt (revision 80) +++ /trunk/Documents/MORPHEO-Install.txt (revision 81) @@ -1,4 +1,10 @@ -------------------------------------------------- - install.txt + Table of contents +-------------------------------------------------- + + I - Install + +-------------------------------------------------- + I - Install -------------------------------------------------- Index: /trunk/IPs/systemC/Environment/Cache/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/Cache/Makefile (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/Makefile (revision 81) @@ -5,5 +5,5 @@ #-----[ Variable ]----------------------------------------- -OBJECTS_DEPS = $(patsubst $(DIR_QUEUE)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_QUEUE)/*.cpp)) +OBJECTS_DEPS = $(patsubst $(DIR_QUEUE)/$(DIR_SRC)/%.cpp,$(DIR_QUEUE)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_QUEUE)/$(DIR_SRC)/*.cpp)) #-----[ Rules ]-------------------------------------------- Index: /trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Access.h =================================================================== --- /trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Access.h (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/include/Cache_MultiLevel_Access.h (revision 81) @@ -17,4 +17,8 @@ public : Access () { + this->num_port = 0; + this->hit = MISS; + this->latence = 0; + this->last_nb_level = 0; } Index: /trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel.h =================================================================== --- /trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel.h (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/include/Cache_OneLevel.h (revision 81) @@ -8,4 +8,5 @@ #include "Cache_OneLevel_Parameters.h" #include "../../Queue/include/Sort_Queue_Dynamic.h" +#include "../../Common/include/Debug.h" namespace environment { Index: /trunk/IPs/systemC/Environment/Cache/include/Cache_Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/Cache/include/Cache_Parameters.h (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/include/Cache_Parameters.h (revision 81) @@ -14,4 +14,5 @@ public : uint32_t nb_cache_dedicated; public : uint32_t nb_iport; + public : uint32_t nb_dport; public : cache_multilevel::Parameters ** param_icache_dedicated; @@ -47,9 +48,18 @@ this->nb_cache_dedicated = nb_cache_dedicated; + if (nb_cache_dedicated == 0) + { + std::cerr << "[ ERROR ] nb_cache_dedicated > 0" << std::endl; + exit(0); + } + uint32_t cache_shared_nb_port = 0; - uint32_t nb_iport = 0; + nb_iport = 0; + nb_dport = 0; + for (uint32_t i=0; i -#include "../include/Cache.h" using namespace std; @@ -6,21 +6,24 @@ using namespace environment::cache; -#define TEST(x,y) \ - { \ - cout << "Line " << __LINE__ << " : "; \ - if (x==y) \ - { \ - cout << "Test OK" << endl; \ - } \ - else \ - { \ - cout << "Test KO" << endl; \ - exit (EXIT_FAILURE); \ - } \ +#define TEST(x,y) \ + { \ + if (x==y) \ + { \ + cout << "Line " << __LINE__ << " : " << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Line " << __LINE__ << " : " << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ } while (0) -int main (void) +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif { cout << "
Begin" << endl; @@ -38,15 +41,15 @@ ); - cout << *param << endl; +// cout << *param << endl; cache_onelevel::Cache_OneLevel * cache = new cache_onelevel::Cache_OneLevel ("my_cache",param); cache->reset(); - cout << *cache << endl; +// cout << *cache << endl; cache->transition(); cache->transition(); - cout << *cache << endl; +// cout << *cache << endl; TEST(cache->access(0, 0x100, 0, CACHED, WRITE), MISS); @@ -89,5 +92,5 @@ cache->transition(); // miss cycle 1 - cout << *cache << endl; +// cout << *cache << endl; TEST(cache->access(0, 0x200, 0, CACHED, WRITE), MISS ); @@ -99,5 +102,5 @@ cache->transition(); // miss cycle 2 cache->transition(); // miss cycle 3 - cout << *cache << endl; +// cout << *cache << endl; // line 0 : all way is use @@ -113,5 +116,5 @@ cache->transition(); - cout << *cache << endl; +// cout << *cache << endl; TEST(cache->access(0, 0x500, 0, CACHED, WRITE), MISS ); @@ -141,5 +144,5 @@ TEST(cache->latence(3), 5); - cout << *cache << endl; +// cout << *cache << endl; delete cache; @@ -174,11 +177,10 @@ ); - cout << *param << endl; +// cout << *param << endl; cache_multilevel::Cache_MultiLevel * cache = new cache_multilevel::Cache_MultiLevel ("my_cache",param); - cout << *cache << endl; cache->reset(); - cout << *cache << endl; +// cout << *cache << endl; cache_multilevel::Access access; @@ -202,5 +204,5 @@ cache->transition(); //11 cache->transition(); //10 - cout << *cache << endl; +// cout << *cache << endl; access = cache->access (0, 0x100, 0, CACHED, WRITE); @@ -238,5 +240,5 @@ TEST(access.latence , 1); TEST(access.last_nb_level, 0); - cout << *cache << endl; +// cout << *cache << endl; cache->transition(); @@ -303,5 +305,5 @@ cache->transition(); //11 cache->transition(); //10 - cout << *cache << endl; +// cout << *cache << endl; access = cache->access (0, 0x100, 0, CACHED, WRITE); @@ -358,5 +360,5 @@ access = cache->access (1, 0x100, 0, CACHED, WRITE); - cout << access<< endl; +// cout << access<< endl; cache->update_access(access); @@ -367,5 +369,5 @@ TEST(access.last_nb_level, 1); - cout << *cache << endl; +// cout << *cache << endl; delete cache; delete param; @@ -389,5 +391,5 @@ cache_shared_size_line [0] = 8 ; cache_shared_size_word [0] = 4 ; - cache_shared_associativity [0] = 4 ; + cache_shared_associativity [0] = 8 ; cache_shared_hit_latence [0] = 2 ; cache_shared_miss_penality [0] = 5 ; @@ -467,5 +469,5 @@ dcache_nb_level [1] = 2; - dcache_nb_port [1] = 2; + dcache_nb_port [1] = 8; // to test dcache_nb_line [1] = new uint32_t [2]; dcache_size_line [1] = new uint32_t [2]; @@ -519,21 +521,214 @@ ); - cout << *param << endl; +// cout << *param << endl; cache::Cache * cache = new cache::Cache ("my_cache",param); + cache->reset(); +// cout << *cache << endl; + + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 16); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 15); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 14); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 13); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 12); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 11); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 10); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 9); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 8); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 16); // miss thread != + TEST(cache->latence (DATA_CACHE, 0, 0, 0x100, 0, CACHED, WRITE), 6); // miss L1, hit L2 + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 7); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 15); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 6); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 14); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 13); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 12); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 11); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 10); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 9); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 8); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 7); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 6); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 5); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 4); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 3); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 2); + cache->transition(); + + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 5); // L1 is direct map, hit L2 + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); // write in L1 + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 16); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 16); + cache->transition(); + + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 15); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 15); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 14); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 14); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 16); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 16); + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 13); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 13); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 15); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 15); + + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 12); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 12); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 14); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 14); + + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 11); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 11); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 13); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 13); + + // in cache L2 : context 0,1,2,3 + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 10); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 10); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 12); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 12); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 9); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 9); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 11); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 11); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 8); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 8); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 10); // write in L2 + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 10); // write in L2 + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 7); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 7); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 9); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 9); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 6); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 6); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 8); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 8); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 7); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 7); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 6); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 6); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 5); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 4); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 4); + cout << *cache << endl; - cache->reset(); - cout << *cache << endl; - - TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 16); - cache->transition(); - TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 15); - cache->transition(); - - cout << *cache << endl; - + + cache->transition(); + // In L2 : context 1,2,4,5 : also context 0 and 3 miss L1 and L2, hit L3 + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 11); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 11); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 3); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 3); + + cache->transition(); + TEST(cache->latence (DATA_CACHE, 1, 0, 0x100, 0, CACHED, WRITE), 10); + TEST(cache->latence (DATA_CACHE, 1, 1, 0x100, 1, CACHED, WRITE), 1); + TEST(cache->latence (DATA_CACHE, 1, 2, 0x100, 2, CACHED, WRITE), 5); + TEST(cache->latence (DATA_CACHE, 1, 3, 0x100, 3, CACHED, WRITE), 10); + TEST(cache->latence (DATA_CACHE, 1, 4, 0x100, 4, CACHED, WRITE), 2); + TEST(cache->latence (DATA_CACHE, 1, 5, 0x100, 5, CACHED, WRITE), 2); + +// // cout << *cache << endl; delete cache; + delete param; delete [] cache_shared_nb_line ; Index: /trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp (revision 81) @@ -16,11 +16,9 @@ { hit = hierarchy_cache[i]->access (num_port,address,trdid,type,dir); - time += hierarchy_cache[i]->latence(num_port); + uint32_t latence = hierarchy_cache[i]->latence(num_port); + time += latence; - std::cout << "SETH : " - << " * i : " << i - << " * hit : " << hit - << " * time :" << time << std::endl; - + _cout(CACHE," * Level [%d] - type_hit %d, latence %d, Sum latence %d\n",i,hit,latence,time); + if ( (hit == HIT_CACHE) or (hit == HIT_WRITE_BUFFER) or Index: /trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp (revision 81) @@ -8,11 +8,14 @@ uint32_t Cache_MultiLevel::update_access (Access cur_access) { - if (cur_access.last_nb_level > 0) +// if (cur_access.last_nb_level > 0) { uint32_t latence = cur_access.latence; + + _cout(CACHE,"Cache_MultiLevel::update_access [%d] : latence : %d, last_nb_level : %d (nb_level : %d)\n",cur_access.num_port,latence,cur_access.last_nb_level,param->nb_level); - for (uint32_t it = 0; it <= cur_access.last_nb_level; it ++) - latence = hierarchy_cache [it]->update_latence (cur_access.num_port,latence); - + for (uint32_t it = 0; it < cur_access.last_nb_level; it ++) + { + latence = hierarchy_cache [it]->update_latence (cur_access.num_port,latence); + } // if (latence != 0) // { Index: /trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp (revision 81) @@ -34,11 +34,12 @@ // Test if a write_buffer have the result - while ((write_buffer->empty() == false) && (write_buffer->read(0)._delay == 0)) + while ((write_buffer->empty() == false) and + (write_buffer->read(0)._delay == 0)) { // Save in the cache - Write_Buffer val = write_buffer->pop(); + Write_Buffer val = write_buffer->pop(); - uint32_t num_tag = val.address.tag; - uint32_t num_familly = val.address.familly; + uint32_t num_tag = val.address.tag; + uint32_t num_familly = val.address.familly; uint32_t num_associativity = index_victim(num_familly); Index: /trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp (revision 81) @@ -22,8 +22,19 @@ cache_multilevel::Cache_MultiLevel * cache; + cache_multilevel::Parameters * param_cache_dedicated; + _cout(CACHE," * Access Cache_Dedicated_"); if (type_cache == INSTRUCTION_CACHE) - cache = icache_dedicated [num_entity]; + { + _cout(CACHE,"Instruction"); + cache = icache_dedicated [num_entity]; + param_cache_dedicated = param->param_icache_dedicated [num_entity]; + } else - cache = dcache_dedicated [num_entity]; + { + _cout(CACHE,"Data"); + cache = dcache_dedicated [num_entity]; + param_cache_dedicated = param->param_dcache_dedicated [num_entity]; + } + _cout(CACHE," [%d] - entity : %d, address : 0x%.x\n",num_port,num_entity,address); if (num_port >= cache->param->nb_port) @@ -34,10 +45,10 @@ // Make a access with this level "dedicated" - std::cout << "cache dedicated : access" << std::endl; cache_multilevel::Access access_dedicated = cache->access(num_port,address,trdid,type,dir); if (access_dedicated.hit == MISS) { - std::cout << "cache shared : access" << std::endl; + _cout(CACHE," * Access Cache_shared"); + // Make a access with this level "shared" cache_multilevel::Access access_shared = cache_shared->access(range_port (type_cache,num_entity)+num_port,address,trdid,type,dir); @@ -45,14 +56,11 @@ cache_shared->update_access (access_shared); - access_dedicated.last_nb_level = param->nb_cache_dedicated-1; // Update all cache + access_dedicated.last_nb_level = param_cache_dedicated->nb_level; // Update all cache access_dedicated.latence += access_shared.latence; } - std::cout << "end access, update access" << std::endl; - cache->update_access (access_dedicated); - std::cout << "end access, update access" << std::endl; - + _cout(CACHE,"Access latence : %d\n",access_dedicated.latence); return access_dedicated.latence; } Index: /trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp (revision 81) @@ -16,7 +16,7 @@ else { - std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; +// std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; nb_port_dedicated += param->nb_iport; - std::cout << "nb_port_dedicated : " << param->nb_iport<< std::endl; +// std::cout << "nb_port_dedicated : " << param->nb_iport<< std::endl; for (uint32_t i = 1; i < num_entity; i++) @@ -24,6 +24,6 @@ } - std::cout << "nb_port_dedicated : " << num_entity << std::endl; - std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; +// std::cout << "nb_port_dedicated : " << num_entity << std::endl; +// std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl; return nb_port_dedicated; Index: /trunk/IPs/systemC/Environment/Common/include/Debug.h =================================================================== --- /trunk/IPs/systemC/Environment/Common/include/Debug.h (revision 81) +++ /trunk/IPs/systemC/Environment/Common/include/Debug.h (revision 81) @@ -0,0 +1,29 @@ +#ifndef ENVIRONMENT_COMMON_DEBUG_H +#define ENVIRONMENT_COMMON_DEBUG_H + +#define DEBUG_ENVIRONMENT true +#define DEBUG_CACHE false +#define DEBUG_DATA false +#define DEBUG_ENDIANNESS false +#define DEBUG_QUEUE false +#define DEBUG_RAMLOCK false +#define DEBUG_SIM2OS false +#define DEBUG_TTY false + +#ifdef DEBUG +# define _cout(component, str...) \ + do \ + { \ + if ( DEBUG_ ## component == true ) \ + { \ + fprintf(stdout,str); \ + } \ + } while(0) +#else +# define _cout(component, str...) \ + do \ + { \ + } while(0) +#endif + +#endif Index: /trunk/IPs/systemC/Environment/Data/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/Data/Makefile (revision 81) +++ /trunk/IPs/systemC/Environment/Data/Makefile (revision 81) @@ -0,0 +1,26 @@ +#-----[ Directory ]---------------------------------------- + +# DIR_ENDIANNESS = ../Endianness + +#-----[ Variable ]----------------------------------------- + +# OBJECTS_DEPS = $(patsubst $(DIR_ENDIANNESS)/$(DIR_SRC)/%.cpp,$(DIR_ENDIANNESS)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_ENDIANNESS)/$(DIR_SRC)/*.cpp)) + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) all_environment + +# $(MAKE) --directory=$(DIR_ENDIANNESS) all; \ + +clean : + @\ + $(MAKE) environment_clean + +# $(MAKE) --directory=$(DIR_ENDIANNESS) clean; \ + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: /trunk/IPs/systemC/Environment/Data/include/Data.h =================================================================== --- /trunk/IPs/systemC/Environment/Data/include/Data.h (revision 81) +++ /trunk/IPs/systemC/Environment/Data/include/Data.h (revision 81) @@ -0,0 +1,31 @@ +#ifndef ENVIRONMENT_DATA_H +#define ENVIRONMENT_DATA_H + +#include "Data_Parameters.h" +#include "Entity.h" + +namespace environment { +namespace data { + + class Data + { + private : std::string name; + private : uint32_t nb_seg; + private : Segment ** segment; + private : Parameters * param; + + public : Data (std::string name, Parameters * param); + public : ~Data (void); + + public : bool init (std::string section, const char * filename, const char ** list_section); + public : void reset (void); + public : bool read (uint32_t address, uint32_t size, char * & data_dest); + public : bool write (uint32_t address, uint32_t size, char * & data_src); + public : Entity entity (uint32_t address, uint32_t size); + public : Entity entity (std::string name); + public : friend std::ostream& operator<< (std::ostream& output, const Data & x); + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Data/include/Data_Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/Data/include/Data_Parameters.h (revision 81) +++ /trunk/IPs/systemC/Environment/Data/include/Data_Parameters.h (revision 81) @@ -0,0 +1,31 @@ +#ifndef ENVIRONMENT_DATA_PARAMETERS_H +#define ENVIRONMENT_DATA_PARAMETERS_H + +#include +#include "../../../shared/soclib_segment_table.h" + +namespace environment { +namespace data { + + class Parameters + { + public : uint32_t max_seg ; + public : uint32_t globalIndex; + public : uint32_t localIndex ; + public : SOCLIB_SEGMENT_TABLE * segtab ; + + public : Parameters (uint32_t max_seg , + uint32_t globalIndex, + uint32_t localIndex , + SOCLIB_SEGMENT_TABLE * segtab ) + { + this->max_seg = max_seg ; + this->globalIndex = globalIndex; + this->localIndex = localIndex ; + this->segtab = segtab ; + } + }; //end Parameters + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Data/include/Entity.h =================================================================== --- /trunk/IPs/systemC/Environment/Data/include/Entity.h (revision 81) +++ /trunk/IPs/systemC/Environment/Data/include/Entity.h (revision 81) @@ -0,0 +1,22 @@ +#ifndef ENVIRONMENT_DATA_ENTITY_H +#define ENVIRONMENT_DATA_ENTITY_H + +#include "Segment.h" + +namespace environment { +namespace data { + + class Entity + { + public : bool present; + public : Segment * segment; + + + public : Entity (bool present); + public : Entity (bool present, Segment * segment); + public : friend std::ostream& operator<< (std::ostream& output, Entity & x); + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Data/include/Segment.h =================================================================== --- /trunk/IPs/systemC/Environment/Data/include/Segment.h (revision 81) +++ /trunk/IPs/systemC/Environment/Data/include/Segment.h (revision 81) @@ -0,0 +1,46 @@ +#ifndef ENVIRONMENT_DATA_SEGMENT_H +#define ENVIRONMENT_DATA_SEGMENT_H + +#include "../../../shared/soclib_segment_table.h" +#include "Type_target.h" + +#include + +extern "C" void loadexec(void **emem, int *esize, int *eoffset, const char *file, const char ** sections); + +namespace environment { +namespace data { + + class Segment + { + protected : std::string name; + + protected : uint32_t base; + protected : uint32_t index; + protected : uint32_t size; + protected : bool uncached; + protected : char * data; + protected : type_target_t type; + + public : Segment (void); + public : Segment (SEGMENT_TABLE_ENTRY * segment); + public : ~Segment (void); + + public : bool init (const char * filename, const char ** sections); + public : void define_target (type_target_t type, uint32_t index); + public : type_target_t getType (void); + public : uint32_t getIndex (void); + public : uint32_t getBase (void); + public : uint32_t getSize (void); + public : bool getUncached (void); + public : char * data_addr (void); + public : bool test (std::string name); + public : bool test (uint32_t address, uint32_t size); + public : void read (uint32_t address, uint32_t size, char * & data_dest); + public : void write (uint32_t address, uint32_t size, char * & data_src); + public : friend std::ostream& operator<< (std::ostream& output, Segment & x); + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Data/include/Type_target.h =================================================================== --- /trunk/IPs/systemC/Environment/Data/include/Type_target.h (revision 81) +++ /trunk/IPs/systemC/Environment/Data/include/Type_target.h (revision 81) @@ -0,0 +1,17 @@ +#ifndef ENVIRONMENT_DATA_TYPE_TARGET_H +#define ENVIRONMENT_DATA_TYPE_TARGET_H + +namespace environment { +namespace data { + + typedef enum + { + TYPE_TARGET_MEMORY , + TYPE_TARGET_TTY , + TYPE_TARGET_RAMLOCK , + TYPE_TARGET_SIM2OS + } type_target_t; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Data/selftest/data/soft.x.txt =================================================================== --- /trunk/IPs/systemC/Environment/Data/selftest/data/soft.x.txt (revision 81) +++ /trunk/IPs/systemC/Environment/Data/selftest/data/soft.x.txt (revision 81) @@ -0,0 +1,433 @@ + +bin/soft.x: file format elf32-or32 + +Disassembly of section .text: + +00000000 <_exception_reset-0x100>: + 0: 15 00 00 00 l.nop 0x0 + 4: 15 00 ff ff l.nop 0xffff + 8: 15 00 ff fe l.nop 0xfffe + c: 15 00 ff fd l.nop 0xfffd + 10: 15 00 ff fc l.nop 0xfffc + 14: 15 00 ff fb l.nop 0xfffb + 18: 15 00 ff fa l.nop 0xfffa + 1c: 15 00 ff f9 l.nop 0xfff9 + 20: 15 00 ff f8 l.nop 0xfff8 + 24: 15 00 ff f7 l.nop 0xfff7 + 28: 15 00 ff f6 l.nop 0xfff6 + 2c: 15 00 ff f5 l.nop 0xfff5 + 30: 15 00 ff f4 l.nop 0xfff4 + 34: 15 00 ff f3 l.nop 0xfff3 + 38: 15 00 ff f2 l.nop 0xfff2 + 3c: 15 00 ff f1 l.nop 0xfff1 + 40: 15 00 ff f0 l.nop 0xfff0 + 44: 15 00 ff ef l.nop 0xffef + 48: 15 00 ff ee l.nop 0xffee + 4c: 15 00 ff ed l.nop 0xffed + 50: 15 00 ff ec l.nop 0xffec + 54: 15 00 ff eb l.nop 0xffeb + 58: 15 00 ff ea l.nop 0xffea + 5c: 15 00 ff e9 l.nop 0xffe9 + 60: 15 00 ff e8 l.nop 0xffe8 + 64: 15 00 ff e7 l.nop 0xffe7 + 68: 15 00 ff e6 l.nop 0xffe6 + 6c: 15 00 ff e5 l.nop 0xffe5 + 70: 15 00 ff e4 l.nop 0xffe4 + 74: 15 00 ff e3 l.nop 0xffe3 + 78: 15 00 ff e2 l.nop 0xffe2 + 7c: 15 00 ff e1 l.nop 0xffe1 + 80: 15 00 ff e0 l.nop 0xffe0 + 84: 15 00 ff df l.nop 0xffdf + 88: 15 00 ff de l.nop 0xffde + 8c: 15 00 ff dd l.nop 0xffdd + 90: 15 00 ff dc l.nop 0xffdc + 94: 15 00 ff db l.nop 0xffdb + 98: 15 00 ff da l.nop 0xffda + 9c: 15 00 ff d9 l.nop 0xffd9 + a0: 15 00 ff d8 l.nop 0xffd8 + a4: 15 00 ff d7 l.nop 0xffd7 + a8: 15 00 ff d6 l.nop 0xffd6 + ac: 15 00 ff d5 l.nop 0xffd5 + b0: 15 00 ff d4 l.nop 0xffd4 + b4: 15 00 ff d3 l.nop 0xffd3 + b8: 15 00 ff d2 l.nop 0xffd2 + bc: 15 00 ff d1 l.nop 0xffd1 + c0: 15 00 ff d0 l.nop 0xffd0 + c4: 15 00 ff cf l.nop 0xffcf + c8: 15 00 ff ce l.nop 0xffce + cc: 15 00 ff cd l.nop 0xffcd + d0: 15 00 ff cc l.nop 0xffcc + d4: 15 00 ff cb l.nop 0xffcb + d8: 15 00 ff ca l.nop 0xffca + dc: 15 00 ff c9 l.nop 0xffc9 + e0: 15 00 ff c8 l.nop 0xffc8 + e4: 15 00 ff c7 l.nop 0xffc7 + e8: 15 00 ff c6 l.nop 0xffc6 + ec: 15 00 ff c5 l.nop 0xffc5 + f0: 15 00 ff c4 l.nop 0xffc4 + f4: 15 00 ff c3 l.nop 0xffc3 + f8: 15 00 ff c2 l.nop 0xffc2 + fc: 15 00 ff c1 l.nop 0xffc1 + +00000100 <_exception_reset>: + 100: 18 40 00 00 l.movhi r2,0x0 + 104: a8 42 20 00 l.ori r2,r2,0x2000 + 108: 44 00 10 00 l.jr r2 + 10c: 15 00 00 00 l.nop 0x0 + ... + 200: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 204: d4 01 18 04 l.sw 0x4(r1),r3 + 208: d4 01 20 08 l.sw 0x8(r1),r4 + 20c: b4 60 00 10 l.mfspr r3,r0,0x10 + 210: b4 80 00 20 l.mfspr r4,r0,0x20 + 214: 00 00 07 88 l.j 2034 + 218: 15 00 00 00 l.nop 0x0 + ... + 300: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 304: d4 01 18 04 l.sw 0x4(r1),r3 + 308: d4 01 20 08 l.sw 0x8(r1),r4 + 30c: b4 60 00 10 l.mfspr r3,r0,0x10 + 310: b4 80 00 20 l.mfspr r4,r0,0x20 + 314: 00 00 07 48 l.j 2034 + 318: 15 00 00 00 l.nop 0x0 + ... + 400: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 404: d4 01 18 04 l.sw 0x4(r1),r3 + 408: d4 01 20 08 l.sw 0x8(r1),r4 + 40c: b4 60 00 10 l.mfspr r3,r0,0x10 + 410: b4 80 00 20 l.mfspr r4,r0,0x20 + 414: 00 00 07 08 l.j 2034 + 418: 15 00 00 00 l.nop 0x0 + ... + 500: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 504: d4 01 18 04 l.sw 0x4(r1),r3 + 508: d4 01 20 08 l.sw 0x8(r1),r4 + 50c: b4 60 00 10 l.mfspr r3,r0,0x10 + 510: b4 80 00 20 l.mfspr r4,r0,0x20 + 514: 00 00 06 c8 l.j 2034 + 518: 15 00 00 00 l.nop 0x0 + ... + 600: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 604: d4 01 18 04 l.sw 0x4(r1),r3 + 608: d4 01 20 08 l.sw 0x8(r1),r4 + 60c: b4 60 00 10 l.mfspr r3,r0,0x10 + 610: b4 80 00 20 l.mfspr r4,r0,0x20 + 614: 00 00 06 88 l.j 2034 + 618: 15 00 00 00 l.nop 0x0 + ... + 700: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 704: d4 01 18 04 l.sw 0x4(r1),r3 + 708: d4 01 20 08 l.sw 0x8(r1),r4 + 70c: b4 60 00 10 l.mfspr r3,r0,0x10 + 710: b4 80 00 20 l.mfspr r4,r0,0x20 + 714: 00 00 06 48 l.j 2034 + 718: 15 00 00 00 l.nop 0x0 + ... + 800: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 804: d4 01 18 04 l.sw 0x4(r1),r3 + 808: d4 01 20 08 l.sw 0x8(r1),r4 + 80c: b4 60 00 10 l.mfspr r3,r0,0x10 + 810: b4 80 00 20 l.mfspr r4,r0,0x20 + 814: 00 00 06 08 l.j 2034 + 818: 15 00 00 00 l.nop 0x0 + ... + 900: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 904: d4 01 18 04 l.sw 0x4(r1),r3 + 908: d4 01 20 08 l.sw 0x8(r1),r4 + 90c: b4 60 00 10 l.mfspr r3,r0,0x10 + 910: b4 80 00 20 l.mfspr r4,r0,0x20 + 914: 00 00 05 c8 l.j 2034 + 918: 15 00 00 00 l.nop 0x0 + ... + a00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + a04: d4 01 18 04 l.sw 0x4(r1),r3 + a08: d4 01 20 08 l.sw 0x8(r1),r4 + a0c: b4 60 00 10 l.mfspr r3,r0,0x10 + a10: b4 80 00 20 l.mfspr r4,r0,0x20 + a14: 00 00 05 88 l.j 2034 + a18: 15 00 00 00 l.nop 0x0 + ... + b00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + b04: d4 01 18 04 l.sw 0x4(r1),r3 + b08: d4 01 20 08 l.sw 0x8(r1),r4 + b0c: b4 60 00 10 l.mfspr r3,r0,0x10 + b10: b4 80 00 20 l.mfspr r4,r0,0x20 + b14: 00 00 05 48 l.j 2034 + b18: 15 00 00 00 l.nop 0x0 + ... + c00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + c04: d4 01 18 04 l.sw 0x4(r1),r3 + c08: d4 01 20 08 l.sw 0x8(r1),r4 + c0c: b4 60 00 10 l.mfspr r3,r0,0x10 + c10: b4 80 00 20 l.mfspr r4,r0,0x20 + c14: 00 00 05 08 l.j 2034 + c18: 15 00 00 00 l.nop 0x0 + ... + d00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + d04: d4 01 18 04 l.sw 0x4(r1),r3 + d08: d4 01 20 08 l.sw 0x8(r1),r4 + d0c: b4 60 00 10 l.mfspr r3,r0,0x10 + d10: b4 80 00 20 l.mfspr r4,r0,0x20 + d14: 00 00 04 c8 l.j 2034 + d18: 15 00 00 00 l.nop 0x0 + ... + e00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + e04: d4 01 18 04 l.sw 0x4(r1),r3 + e08: d4 01 20 08 l.sw 0x8(r1),r4 + e0c: b4 60 00 10 l.mfspr r3,r0,0x10 + e10: b4 80 00 20 l.mfspr r4,r0,0x20 + e14: 00 00 04 88 l.j 2034 + e18: 15 00 00 00 l.nop 0x0 + ... + f00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + f04: d4 01 18 04 l.sw 0x4(r1),r3 + f08: d4 01 20 08 l.sw 0x8(r1),r4 + f0c: b4 60 00 10 l.mfspr r3,r0,0x10 + f10: b4 80 00 20 l.mfspr r4,r0,0x20 + f14: 00 00 04 48 l.j 2034 + f18: 15 00 00 00 l.nop 0x0 + ... + 1000: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1004: d4 01 18 04 l.sw 0x4(r1),r3 + 1008: d4 01 20 08 l.sw 0x8(r1),r4 + 100c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1010: b4 80 00 20 l.mfspr r4,r0,0x20 + 1014: 00 00 04 08 l.j 2034 + 1018: 15 00 00 00 l.nop 0x0 + ... + 1100: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1104: d4 01 18 04 l.sw 0x4(r1),r3 + 1108: d4 01 20 08 l.sw 0x8(r1),r4 + 110c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1110: b4 80 00 20 l.mfspr r4,r0,0x20 + 1114: 00 00 03 c8 l.j 2034 + 1118: 15 00 00 00 l.nop 0x0 + ... + 1200: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1204: d4 01 18 04 l.sw 0x4(r1),r3 + 1208: d4 01 20 08 l.sw 0x8(r1),r4 + 120c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1210: b4 80 00 20 l.mfspr r4,r0,0x20 + 1214: 00 00 03 88 l.j 2034 + 1218: 15 00 00 00 l.nop 0x0 + ... + 1300: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1304: d4 01 18 04 l.sw 0x4(r1),r3 + 1308: d4 01 20 08 l.sw 0x8(r1),r4 + 130c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1310: b4 80 00 20 l.mfspr r4,r0,0x20 + 1314: 00 00 03 48 l.j 2034 + 1318: 15 00 00 00 l.nop 0x0 + ... + 1400: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1404: d4 01 18 04 l.sw 0x4(r1),r3 + 1408: d4 01 20 08 l.sw 0x8(r1),r4 + 140c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1410: b4 80 00 20 l.mfspr r4,r0,0x20 + 1414: 00 00 03 08 l.j 2034 + 1418: 15 00 00 00 l.nop 0x0 + ... + 1500: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1504: d4 01 18 04 l.sw 0x4(r1),r3 + 1508: d4 01 20 08 l.sw 0x8(r1),r4 + 150c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1510: b4 80 00 20 l.mfspr r4,r0,0x20 + 1514: 00 00 02 c8 l.j 2034 + 1518: 15 00 00 00 l.nop 0x0 + ... + 1600: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1604: d4 01 18 04 l.sw 0x4(r1),r3 + 1608: d4 01 20 08 l.sw 0x8(r1),r4 + 160c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1610: b4 80 00 20 l.mfspr r4,r0,0x20 + 1614: 00 00 02 88 l.j 2034 + 1618: 15 00 00 00 l.nop 0x0 + ... + 1700: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1704: d4 01 18 04 l.sw 0x4(r1),r3 + 1708: d4 01 20 08 l.sw 0x8(r1),r4 + 170c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1710: b4 80 00 20 l.mfspr r4,r0,0x20 + 1714: 00 00 02 48 l.j 2034 + 1718: 15 00 00 00 l.nop 0x0 + ... + 1800: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1804: d4 01 18 04 l.sw 0x4(r1),r3 + 1808: d4 01 20 08 l.sw 0x8(r1),r4 + 180c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1810: b4 80 00 20 l.mfspr r4,r0,0x20 + 1814: 00 00 02 08 l.j 2034 + 1818: 15 00 00 00 l.nop 0x0 + ... + 1900: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1904: d4 01 18 04 l.sw 0x4(r1),r3 + 1908: d4 01 20 08 l.sw 0x8(r1),r4 + 190c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1910: b4 80 00 20 l.mfspr r4,r0,0x20 + 1914: 00 00 01 c8 l.j 2034 + 1918: 15 00 00 00 l.nop 0x0 + ... + 1a00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1a04: d4 01 18 04 l.sw 0x4(r1),r3 + 1a08: d4 01 20 08 l.sw 0x8(r1),r4 + 1a0c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1a10: b4 80 00 20 l.mfspr r4,r0,0x20 + 1a14: 00 00 01 88 l.j 2034 + 1a18: 15 00 00 00 l.nop 0x0 + ... + 1b00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1b04: d4 01 18 04 l.sw 0x4(r1),r3 + 1b08: d4 01 20 08 l.sw 0x8(r1),r4 + 1b0c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1b10: b4 80 00 20 l.mfspr r4,r0,0x20 + 1b14: 00 00 01 48 l.j 2034 + 1b18: 15 00 00 00 l.nop 0x0 + ... + 1c00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1c04: d4 01 18 04 l.sw 0x4(r1),r3 + 1c08: d4 01 20 08 l.sw 0x8(r1),r4 + 1c0c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1c10: b4 80 00 20 l.mfspr r4,r0,0x20 + 1c14: 00 00 01 08 l.j 2034 + 1c18: 15 00 00 00 l.nop 0x0 + ... + 1d00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1d04: d4 01 18 04 l.sw 0x4(r1),r3 + 1d08: d4 01 20 08 l.sw 0x8(r1),r4 + 1d0c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1d10: b4 80 00 20 l.mfspr r4,r0,0x20 + 1d14: 00 00 00 c8 l.j 2034 + 1d18: 15 00 00 00 l.nop 0x0 + ... + 1e00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1e04: d4 01 18 04 l.sw 0x4(r1),r3 + 1e08: d4 01 20 08 l.sw 0x8(r1),r4 + 1e0c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1e10: b4 80 00 20 l.mfspr r4,r0,0x20 + 1e14: 00 00 00 88 l.j 2034 + 1e18: 15 00 00 00 l.nop 0x0 + ... + 1f00: 9c 21 ff 80 l.addi r1,r1,0xffffff80 + 1f04: d4 01 18 04 l.sw 0x4(r1),r3 + 1f08: d4 01 20 08 l.sw 0x8(r1),r4 + 1f0c: b4 60 00 10 l.mfspr r3,r0,0x10 + 1f10: b4 80 00 20 l.mfspr r4,r0,0x20 + 1f14: 00 00 00 48 l.j 2034 + 1f18: 15 00 00 00 l.nop 0x0 + ... + +00002000 <_start>: + 2000: 18 20 51 ff l.movhi r1,0x51ff + 2004: a8 21 ff fc l.ori r1,r1,0xfffc + 2008: 9c 40 ff fd l.addi r2,r0,0xfffffffd + 200c: 04 00 00 4b l.jal 2138 <_get_cpu_id> + 2010: e0 21 10 03 l.and r1,r1,r2 + 2014: 18 80 00 50 l.movhi r4,0x50 + 2018: a8 84 00 00 l.ori r4,r4,0x0 + 201c: e0 8b 23 06 l.mul r4,r11,r4 + 2020: e0 21 20 02 l.sub r1,r1,r4 + 2024: e0 41 00 04 l.or r2,r1,r0 + 2028: e0 60 00 03 l.and r3,r0,r0 + 202c: 04 00 00 51 l.jal 2170 <_main> + 2030: e0 80 00 03 l.and r4,r0,r0 + +00002034 : + 2034: d4 01 10 00 l.sw 0x0(r1),r2 + 2038: d4 01 28 0c l.sw 0xc(r1),r5 + 203c: d4 01 30 10 l.sw 0x10(r1),r6 + 2040: d4 01 38 14 l.sw 0x14(r1),r7 + 2044: d4 01 40 18 l.sw 0x18(r1),r8 + 2048: d4 01 48 1c l.sw 0x1c(r1),r9 + 204c: d4 01 50 20 l.sw 0x20(r1),r10 + 2050: d4 01 58 24 l.sw 0x24(r1),r11 + 2054: d4 01 60 28 l.sw 0x28(r1),r12 + 2058: d4 01 68 2c l.sw 0x2c(r1),r13 + 205c: d4 01 70 30 l.sw 0x30(r1),r14 + 2060: d4 01 78 34 l.sw 0x34(r1),r15 + 2064: d4 01 80 38 l.sw 0x38(r1),r16 + 2068: d4 01 88 3c l.sw 0x3c(r1),r17 + 206c: d4 01 90 40 l.sw 0x40(r1),r18 + 2070: d4 01 98 44 l.sw 0x44(r1),r19 + 2074: d4 01 a0 48 l.sw 0x48(r1),r20 + 2078: d4 01 a8 4c l.sw 0x4c(r1),r21 + 207c: d4 01 b0 50 l.sw 0x50(r1),r22 + 2080: d4 01 b8 54 l.sw 0x54(r1),r23 + 2084: d4 01 c0 58 l.sw 0x58(r1),r24 + 2088: d4 01 c8 5c l.sw 0x5c(r1),r25 + 208c: d4 01 d0 60 l.sw 0x60(r1),r26 + 2090: d4 01 d8 64 l.sw 0x64(r1),r27 + 2094: d4 01 e0 68 l.sw 0x68(r1),r28 + 2098: d4 01 e8 6c l.sw 0x6c(r1),r29 + 209c: d4 01 f0 70 l.sw 0x70(r1),r30 + 20a0: d4 01 f8 74 l.sw 0x74(r1),r31 + 20a4: d4 01 00 78 l.sw 0x78(r1),r0 + 20a8: 07 ff f7 d6 l.jal 0 <_exception_reset-0x100> + 20ac: 15 00 00 00 l.nop 0x0 + 20b0: 84 41 00 00 l.lwz r2,0x0(r1) + 20b4: 84 61 00 04 l.lwz r3,0x4(r1) + 20b8: 84 81 00 08 l.lwz r4,0x8(r1) + 20bc: 84 a1 00 0c l.lwz r5,0xc(r1) + 20c0: 84 c1 00 10 l.lwz r6,0x10(r1) + 20c4: 84 e1 00 14 l.lwz r7,0x14(r1) + 20c8: 85 01 00 18 l.lwz r8,0x18(r1) + 20cc: 85 21 00 1c l.lwz r9,0x1c(r1) + 20d0: 85 41 00 20 l.lwz r10,0x20(r1) + 20d4: 85 61 00 24 l.lwz r11,0x24(r1) + 20d8: 85 81 00 28 l.lwz r12,0x28(r1) + 20dc: 85 a1 00 2c l.lwz r13,0x2c(r1) + 20e0: 85 c1 00 30 l.lwz r14,0x30(r1) + 20e4: 85 e1 00 34 l.lwz r15,0x34(r1) + 20e8: 86 01 00 38 l.lwz r16,0x38(r1) + 20ec: 86 21 00 3c l.lwz r17,0x3c(r1) + 20f0: 86 41 00 40 l.lwz r18,0x40(r1) + 20f4: 86 61 00 44 l.lwz r19,0x44(r1) + 20f8: 86 81 00 48 l.lwz r20,0x48(r1) + 20fc: 86 a1 00 4c l.lwz r21,0x4c(r1) + 2100: 86 c1 00 50 l.lwz r22,0x50(r1) + 2104: 86 e1 00 54 l.lwz r23,0x54(r1) + 2108: 87 01 00 58 l.lwz r24,0x58(r1) + 210c: 87 21 00 5c l.lwz r25,0x5c(r1) + 2110: 87 41 00 60 l.lwz r26,0x60(r1) + 2114: 87 61 00 64 l.lwz r27,0x64(r1) + 2118: 87 81 00 68 l.lwz r28,0x68(r1) + 211c: 87 a1 00 6c l.lwz r29,0x6c(r1) + 2120: 87 c1 00 70 l.lwz r30,0x70(r1) + 2124: 87 e1 00 74 l.lwz r31,0x74(r1) + 2128: 84 01 00 78 l.lwz r0,0x78(r1) + 212c: 9c 21 00 80 l.addi r1,r1,0x80 + 2130: 24 00 00 00 l.rfe + 2134: 15 00 00 00 l.nop 0x0 + +00002138 <_get_cpu_id>: + 2138: 44 00 48 00 l.jr r9 + 213c: b5 60 f8 00 l.mfspr r11,r0,0xf800 + +00002140 <_set_cpu_id>: + 2140: 44 00 48 00 l.jr r9 + 2144: c3 e0 18 00 l.mtspr r0,r3,0xf800 + +00002148 <_find_first_one>: + 2148: 44 00 48 00 l.jr r9 + 214c: e1 63 00 0f l.ff1 r11,r3 + +00002150 <_get_thread_id>: + 2150: 44 00 48 00 l.jr r9 + 2154: b5 60 f8 01 l.mfspr r11,r0,0xf801 + +00002158 <_set_thread_id>: + 2158: 44 00 48 00 l.jr r9 + 215c: c3 e0 18 01 l.mtspr r0,r3,0xf801 + +00002160 <_get_thread_priority>: + 2160: 44 00 48 00 l.jr r9 + 2164: b5 60 f8 02 l.mfspr r11,r0,0xf802 + +00002168 <_set_thread_priority>: + 2168: 44 00 48 00 l.jr r9 + 216c: c3 e0 18 02 l.mtspr r0,r3,0xf802 + +00002170 <_main>: + 2170: 00 00 00 00 l.j 2170 <_main> + 2174: 15 00 00 00 l.nop 0x0 + 2178: 44 00 48 00 l.jr r9 + 217c: 15 00 00 00 l.nop 0x0 Index: /trunk/IPs/systemC/Environment/Data/selftest/data/soft.x.txt.nm =================================================================== --- /trunk/IPs/systemC/Environment/Data/selftest/data/soft.x.txt.nm (revision 81) +++ /trunk/IPs/systemC/Environment/Data/selftest/data/soft.x.txt.nm (revision 81) @@ -0,0 +1,27 @@ + U _exception_handler +00000100 T _exception_reset +00002000 T _start +00002034 t default_exception_handler +00002138 T _get_cpu_id +00002140 T _set_cpu_id +00002148 T _find_first_one +00002150 T _get_thread_id +00002158 T _set_thread_id +00002160 T _get_thread_priority +00002168 T _set_thread_priority +00002170 T _main +00500000 A _stack_alloc +10000000 B ___bss_start +10000000 B __bss_start +10000000 B __end +10000000 B _ebss +10000000 D _edata +10000000 B _end +10000000 B _sbss +10000000 D _sdata +10000000 B ebss +10000000 D edata +10000000 B end +10000000 B sbss +10000000 D sdata +51fffffc A _stack Index: /trunk/IPs/systemC/Environment/Data/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/selftest/main.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/selftest/main.cpp (revision 81) @@ -0,0 +1,198 @@ +#include +#include "../include/Data.h" + +using namespace std; +using namespace environment; +using namespace environment::data; + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ + } while (0) + + + +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif +{ + cout << "
Begin" << endl; + + { + Segment * seg1 = new Segment (); + + TEST(seg1->getType (), TYPE_TARGET_MEMORY); + TEST(seg1->getIndex (), 0); + TEST(seg1->getBase (), 0); + TEST(seg1->getSize (), 0); + TEST(seg1->getUncached (), false); + + seg1->define_target(TYPE_TARGET_SIM2OS,4); + TEST(seg1->getType (), TYPE_TARGET_SIM2OS); + TEST(seg1->getIndex (), 4); + + cout << *seg1 << endl; + + SEGMENT_TABLE_ENTRY * entry = new SEGMENT_TABLE_ENTRY("entry", 0x100, 0x1024, 21, 7, true); + + Segment * seg2 = new Segment (entry); + + cout << *seg2 << endl; + + TEST(seg2->test(0x100, 0x0 ), true); + TEST(seg2->test(0x100, 0x1024), true); + TEST(seg2->test(0x100, 0x1025), false); + + char * str = new char [10]; + + str [0] = 'k'; + str [1] = 'a'; + str [2] = 'n'; + str [3] = 'e'; + str [4] = 'd'; + str [5] = 'e'; + str [6] = 'a'; + str [7] = 'd'; + + seg2->write(0x200,8,str); + + for (uint32_t i=0; i<10; i++) + str [i] = '.'; + + for (uint32_t i=0; i<10; i++) + cout << str [i]; + cout << endl; + + str [0] = 'i'; + str [1] = 's'; + str [2] = 'b'; + str [3] = 'a'; + str [4] = 'c'; + str [5] = 'k'; + + seg2->write(0x204,6,str); + + for (uint32_t i=0; i<10; i++) + str [i] = '.'; + + seg2->read(0x200,10,str); + + for (uint32_t i=0; i<10; i++) + cout << str [i]; + cout << endl; + + Entity * entity1 = new Entity (false); + Entity * entity2 = new Entity (true, seg2); + + cout << *entity1 << endl; + cout << *entity2 << endl; + + delete entity2; + delete entity1; + delete [] str; + delete seg2; + delete entry; + delete seg1; + } + + { + SOCLIB_SEGMENT_TABLE * segtable = new SOCLIB_SEGMENT_TABLE; + segtable->setMSBNumber (8); + segtable->setDefaultTarget(0,0); + + //shared data segment + + const int TEXT_BASE = 0x0; + const int DATA_CACHED_BASE = 0x10000000; + const int DATA_UNCACHED_BASE = 0x40000000; + + const int TEXT_SIZE = 0x4000; + const int DATA_CACHED_SIZE = 0x4000; + const int DATA_UNCACHED_SIZE = 0x4000; + + // Add a segment :name , address of base , size , global index , local index, uncache + segtable->addSegment("text" , TEXT_BASE , TEXT_SIZE , 0 ,0 , false); + segtable->addSegment("data" , DATA_CACHED_BASE , DATA_CACHED_SIZE , 0 ,0 , false); + segtable->addSegment("data_unc" , DATA_UNCACHED_BASE , DATA_UNCACHED_SIZE , 0 ,0 , true ); + + segtable->print(); + + Parameters * param = new Parameters (16,0,0,segtable); + + Data * data = new Data ("my_data", param); + + cout << *data << endl; + + const char * filename = "selftest/data/soft.x"; + const char * sections_text [] = {".text",NULL}; + const char * sections_data [] = {".data",".rodata",".bss",".sdata",".sbss", NULL}; + + data->init("text" , filename, sections_text); + data->init("data" , filename, sections_data); + + char * str = new char [8]; + + data->read(0x100,8,str); + + cout << hex; + for (uint32_t i=0; i<8; i++) + { + if (i==4) + cout << endl; + cout << std::setw(2) << std::setfill('0') << ((static_cast(str [i]))&0xff); + } + cout << dec << endl; + + str [0] = 0xde; + str [1] = 0xad; + str [2] = 0xbe; + str [3] = 0xef; + str [4] = 0xba; + str [5] = 0xbe; + str [6] = 0xbe; + str [7] = 0xef; + + data->write(0x104,8,str); + + data->read(0x100,8,str); + + cout << hex; + for (uint32_t i=0; i<8; i++) + { + if (i==4) + cout << endl; + cout << std::setw(2) << std::setfill('0') << ((static_cast(str [i]))&0xff); + } + cout << dec << endl; + + data->read(0x108,8,str); + + cout << hex; + for (uint32_t i=0; i<8; i++) + { + if (i==4) + cout << endl; + cout << std::setw(2) << std::setfill('0') << ((static_cast(str [i]))&0xff); + } + cout << dec << endl; + + delete [] str; + delete data; + delete param; + delete segtable; + } + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: /trunk/IPs/systemC/Environment/Data/src/Data.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Data.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Data.cpp (revision 81) @@ -0,0 +1,43 @@ +#include "../include/Data.h" + +namespace environment { +namespace data { + + Data::Data (std::string name, Parameters * param) + { + this->name = name; + this->param = param; + + std::list seglist = param->segtab->getSegmentList(param->globalIndex,param->localIndex); + nb_seg = seglist.size(); + + if (nb_seg >= param->max_seg) + { + std::cerr << "The number of seg can't be higher that " << param->max_seg << std::endl; + exit (1); + } + + segment = new Segment * [param->max_seg]; + + uint32_t i=0; + for (std::list::iterator iter = seglist.begin(); iter != seglist.end() ; ++iter) + { + SEGMENT_TABLE_ENTRY * entry = &(*iter); + + segment [i] = new Segment (entry); + + param->segtab->setAddrAlloc(entry->getBase(),(void *)(segment [i]->data_addr())); + + i ++; + } + } + + Data::~Data (void) + { + for (uint32_t i=0; itest (address,size) == true) + return Entity (true,segment[num_seg]); + + return Entity (false); + } + + Entity Data::entity (std::string name) + { + for (uint32_t num_seg = 0; num_seg < nb_seg; num_seg ++) + if (segment[num_seg]->test(name) == true) + return Entity (true,segment[num_seg]); + + return Entity (false); + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Data_init.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Data_init.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Data_init.cpp (revision 81) @@ -0,0 +1,16 @@ +#include "../include/Data.h" + +namespace environment { +namespace data { + + bool Data::init (std::string section, const char * filename, const char ** list_section) + { + for (uint32_t it = 0; it < nb_seg; it ++) + if (segment[it]->test(section) == true) + return segment[it]->init(filename,list_section); + + return false; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Data_print.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Data_print.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Data_print.cpp (revision 81) @@ -0,0 +1,19 @@ +#include "../include/Data.h" + +namespace environment { +namespace data { + + std::ostream& operator<< (std::ostream& output, const Data & x) + { + output << "<" << x.name << ">" << std::endl + << " * nb_seg : " << x.nb_seg << std::endl + << " * max_seg : " << x.param->max_seg << std::endl; + + for (uint32_t it = 0; it < x.nb_seg; it ++) + output << *x.segment[it] << std::endl; + return output; + }; + + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Data_read.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Data_read.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Data_read.cpp (revision 81) @@ -0,0 +1,25 @@ +#include "../include/Data.h" + +namespace environment { +namespace data { + + bool Data::read (uint32_t address, uint32_t size, char * & data_dest) + { + uint32_t num_seg = 0; + bool res = false; + + // Scan all segment + for (num_seg = 0; num_seg < nb_seg; num_seg ++) + if (segment[num_seg]->test (address,size) == true) + { + segment[num_seg]->read (address,size,data_dest); + res = true; + break; + } + + return res; + } + + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Data_reset.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Data_reset.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Data_reset.cpp (revision 81) @@ -0,0 +1,11 @@ +#include "../include/Data.h" + +namespace environment { +namespace data { + + void Data::reset (void) + { + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Data_write.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Data_write.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Data_write.cpp (revision 81) @@ -0,0 +1,22 @@ +#include "../include/Data.h" + +namespace environment { +namespace data { + + bool Data::write (uint32_t address, uint32_t size, char * & data_src) + { + uint32_t num_seg = 0; + bool res = false; + for (num_seg = 0; num_seg < nb_seg; num_seg ++) + if (segment[num_seg]->test (address,size) == true) + { + segment[num_seg]->write (address,size,data_src); + res = true; + break; + } + + return res; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Entity.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Entity.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Entity.cpp (revision 81) @@ -0,0 +1,19 @@ +#include "../include/Entity.h" + +namespace environment { +namespace data { + + Entity::Entity (bool present) + { + this->present = present; + } + + Entity::Entity (bool present , + Segment * segment ) + { + this->present = present; + this->segment = segment; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Entity_print.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Entity_print.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Entity_print.cpp (revision 81) @@ -0,0 +1,16 @@ +#include "../include/Entity.h" + +namespace environment { +namespace data { + + std::ostream& operator<< (std::ostream& output, Entity & x) + { + output << "present : " << x.present; + if (x.present == true) + output << std::endl << *x.segment; + + return output; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment.cpp (revision 81) @@ -0,0 +1,36 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + Segment::Segment (void) + { + name = ""; + base = 0; + size = 0; + uncached = false; + data = NULL; + type = TYPE_TARGET_MEMORY; + index = 0; + } + + Segment::Segment (SEGMENT_TABLE_ENTRY * segment) + { + name = segment->getName(); + + base = segment->getBase(); + size = segment->getSize(); + uncached = segment->getUncached(); + data = new char [size]; + type = TYPE_TARGET_MEMORY; + index = 0; + } + + Segment::~Segment(void) + { + if (size>0) + delete [] data; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_data_addr.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_data_addr.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_data_addr.cpp (revision 81) @@ -0,0 +1,13 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + // Return the data address + char * Segment::data_addr (void) + { + return data; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_define_target.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_define_target.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_define_target.cpp (revision 81) @@ -0,0 +1,13 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + void Segment::define_target (type_target_t type, uint32_t index) + { + this->type = type; + this->index = index; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_getBase.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_getBase.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_getBase.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + uint32_t Segment::getBase (void) + { + return base; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_getIndex.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_getIndex.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_getIndex.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + uint32_t Segment::getIndex (void) + { + return index; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_getSize.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_getSize.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_getSize.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + uint32_t Segment::getSize (void) + { + return size; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_getType.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_getType.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_getType.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + type_target_t Segment::getType (void) + { + return type; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_getUncached.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_getUncached.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_getUncached.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + bool Segment::getUncached (void) + { + return uncached; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_init.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_init.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_init.cpp (revision 81) @@ -0,0 +1,31 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + bool Segment::init (const char * filename,const char ** sections) + { + void * ptab; + int size = this->size; + int offset = 0; + + loadexec(&ptab,&size,&offset,filename,sections); + +// std::cout << " - size : " << size << std::endl; +// std::cout << " - offset : " << offset << std::endl; + + if (size > (int)this->size) + { + std::cerr << " : segment \"" << name << "\" is to small : size is " << this->size << " and requiert is " << size << std::endl; + return false; + } + + memcpy(data, ptab, size); + + free (ptab); + + return true; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_print.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_print.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_print.cpp (revision 81) @@ -0,0 +1,20 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + std::ostream& operator<< (std::ostream& output, Segment & x) + { + output << "Segment \"" << x.name << "\"" << std::endl + << std::hex + << " * base : " << std::setw(8) << std::setfill('0') << x.base << std::endl + << " * size : " << std::setw(8) << std::setfill('0') << x.size << std::endl + << std::dec + << " * uncached : " << x.uncached << std::endl + << " * type : " << x.type; + + return output; + }; + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_read.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_read.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_read.cpp (revision 81) @@ -0,0 +1,13 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + void Segment::read (uint32_t address, uint32_t size, char * & data_dest) + { + for (uint32_t it = 0; it < size ; it ++) + data_dest [it] = data[address-base+it]; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_test.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_test.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_test.cpp (revision 81) @@ -0,0 +1,20 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + bool Segment::test (std::string name) + { + return (this->name == name); + } + + bool Segment::test (uint32_t address, uint32_t size) + { + bool res = (((address ) >= (this->base )) and + ((address+size) <= (this->base+this->size))); + + return res; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/Segment_write.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/Segment_write.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/Segment_write.cpp (revision 81) @@ -0,0 +1,13 @@ +#include "../include/Segment.h" + +namespace environment { +namespace data { + + void Segment::write (uint32_t address, uint32_t size, char * & data_src) + { + for (uint32_t it = 0; it < size ; it ++) + data[address-base+it] = data_src [it]; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Data/src/loadexec.c =================================================================== --- /trunk/IPs/systemC/Environment/Data/src/loadexec.c (revision 81) +++ /trunk/IPs/systemC/Environment/Data/src/loadexec.c (revision 81) @@ -0,0 +1,154 @@ +/* + * File : loadexec.c + * Author : Frédéric Pétrot + * + * Load an executable into an array using the GNU BFD + * + * $Log: loadexec.c,v $ + * Revision 1.3 2006/06/08 14:32:41 nipo + * Use _loading_ memory address rather than _virtual_ memory address when + * loading objects. + * + * Patch from Alexandre Becoulet + * + * Revision 1.2 2006/02/21 10:37:40 buchmann + * Changes : + * - random optimizations + * - now uses conditional expressions instead of if statements + * - disables some useless assignments + * - now uses shift operators instead of arithmetic operators + * - fix documentations + * + * Revision 1.1.1.1 2005/01/27 13:42:45 wahid + * First project import + * Wahid + * + * Revision 1.1 2003/03/10 10:38:05 fred + * Adding the bfd loader for good. + * + */ + +#include +#include +#include +#include + +#ifndef TRUE +#define TRUE true +#endif + +#ifndef FALSE +#define FALSE false +#endif + +/* Loading the sections sections of file file into the array + * pointed to by emem. + * esize is the expected size, but it can be modified by the function if it too + * small for the sections + * All sizes and addresses are given in bytes + * eoffset is the address of the section with the lowest address among + * all required sections. + * Code should be self explanatory once you've read the 230 pages of + * the BFD documentation :) */ + +typedef struct raminfo { + void *mem; + unsigned int size; + unsigned int ladr; + unsigned int hadr; + const char *file; + const char **sections; +} raminfo; + +static void bindsection(bfd *exec, asection *sect, PTR x) +{ + int i; + raminfo *rinfo = x; + + for (i = 0; rinfo->sections[i]; i++) + if (!strcmp(sect->name, rinfo->sections[i])) + break; + if (!rinfo->sections[i]) + return; + + if ((sect->flags & SEC_LOAD) && !(sect->flags & SEC_IN_MEMORY)) { + bfd_get_section_contents(exec, sect, + rinfo->mem + (sect->lma - rinfo->ladr), + 0, bfd_section_size(exec, sect)); + sect->contents = rinfo->mem; + } +} + +static void sectionssize(bfd *exec, asection *sect, PTR x) +{ + int i; + raminfo *rinfo = x; + + for (i = 0; rinfo->sections[i]; i++) + if (!strcmp(sect->name, rinfo->sections[i])) + break; + if (!rinfo->sections[i]) + return; + + rinfo->size += bfd_section_size(exec, sect); + rinfo->ladr = sect->lma < rinfo->ladr ? sect->lma : rinfo->ladr; + rinfo->hadr = sect->lma + rinfo->size > rinfo->hadr ? + sect->lma + rinfo->size : rinfo->hadr; +} + +void loadexec(void **emem, int *esize, int *eoffset, const char *file, const char **sections) +{ + bfd *exec; + static int x; + int i; + raminfo ringo; + + if (!x) + bfd_init(); + + exec = bfd_openr(file, NULL); + + if (!exec) { + fprintf(stderr, "Cannot open File '%s'\n", file); + exit(1); + } + + if (bfd_check_format(exec, bfd_object) != TRUE && !(exec->flags & EXEC_P)) { + fprintf(stderr, "File %s is not an executable file\n", + file); //bfd_get_filename(exec)); + exit(1); + } + +#if 1 + printf("Loading sections "); + for (i = 0; sections[i]; i++) + printf("%s%s", sections[i], sections[i+1] ? ", " : " "); + printf("from \"%s\"\n",bfd_get_filename(exec)); + //printf("of executable '%s' for '%s' architecture in format '%s'\n", + // bfd_get_filename(exec), bfd_printable_name(exec), exec->xvec->name); +#endif + + /* Set input parameters to bindsection */ + ringo.file = file; + ringo.sections = sections; + ringo.size = 0; + ringo.ladr = ~0; + ringo.hadr = 0; + bfd_map_over_sections(exec, sectionssize, &ringo); + /* Get output parameters from sectionssize */ + if (ringo.size < ringo.hadr - ringo.ladr) + ringo.size = ringo.hadr - ringo.ladr; + *esize = ringo.size > *esize ? ringo.size : *esize; + *eoffset = ringo.ladr; + ringo.mem = malloc(*esize * sizeof(char)); + /* Start over again from the start of the memory */ + bfd_map_over_sections(exec, bindsection, &ringo); + /* Get output parameters from bindsection */ + + *emem = ringo.mem; + + if (bfd_close(exec) == FALSE) { + bfd_perror(exec->filename); + exit(1); + } +} Index: /trunk/IPs/systemC/Environment/Endianness/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/Makefile (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/Makefile (revision 81) @@ -0,0 +1,20 @@ +#-----[ Directory ]---------------------------------------- + +#-----[ Variable ]----------------------------------------- + +#OBJECTS_DEPS = + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) all_environment; + +clean : + @\ + $(MAKE) environment_clean; + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: /trunk/IPs/systemC/Environment/Endianness/include/Endianness.h =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/include/Endianness.h (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/include/Endianness.h (revision 81) @@ -0,0 +1,34 @@ +#ifndef ENVIRONMENT_ENDIANNESS_H +#define ENVIRONMENT_ENDIANNESS_H + +#include + +namespace environment { +namespace endianness { + +#define LittleEndian false +#define BigEndian true + + typedef union + { + uint32_t word; + + struct + { + uint8_t byte1; + uint8_t byte2; + uint8_t byte3; + uint8_t byte4; + } bytes; + } TestEndian ; + + bool hostEndianness (); + bool cpuEndianness (uint32_t cpu_id); + bool isSameEndianness (uint32_t cpu_id); + char * swapBytes (char * string_src , + uint32_t size_string, + uint32_t size_access); + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Endianness/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/selftest/main.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/selftest/main.cpp (revision 81) @@ -0,0 +1,65 @@ +#include +#include "../include/Endianness.h" + +using namespace std; +using namespace environment; +using namespace environment::endianness; + +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif +{ + cout << "
Begin" << endl; + + cout << "hostEndianness : " << hostEndianness() << endl; + cout << "cpuEndianness : " << cpuEndianness (0) << endl; + cout << "same ? : " << isSameEndianness (0) << endl; + + char * str = new char [16]; + + str [0] = 'a'; + for (uint32_t i=1; i<16; i++) + str [i] = str[i-1]+1; + + cout << "str : "; + for (uint32_t i=0; i<16; i++) + cout << str [i]; + cout << endl; + + str = swapBytes (str, 16, 4); + + cout << "str : "; + for (uint32_t i=0; i<16; i++) + cout << str [i]; + cout << endl; + + str = swapBytes (str, 16, 1); + + cout << "str : "; + for (uint32_t i=0; i<16; i++) + cout << str [i]; + cout << endl; + + str = swapBytes (str, 16, 8); + + cout << "str : "; + for (uint32_t i=0; i<16; i++) + cout << str [i]; + cout << endl; + + str = swapBytes (str, 16, 4); + + cout << "str : "; + for (uint32_t i=0; i<16; i++) + cout << str [i]; + cout << endl; + + delete [] str; + + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: /trunk/IPs/systemC/Environment/Endianness/src/Endianness_cpuEndianness.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/src/Endianness_cpuEndianness.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/src/Endianness_cpuEndianness.cpp (revision 81) @@ -0,0 +1,19 @@ +#include "../include/Endianness.h" + +namespace environment { +namespace endianness { + + bool cpuEndianness (uint32_t cpu_id) + { + // OpenRisc is big endian + return(BigEndian); + + /* + * Comment connaitre l'endianness ? + * static : table generee dans le top level + * dynamique : table generee par un l'equivalent de hostEndianness et ecrivant dans un segment precis de la ram + */ + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Endianness/src/Endianness_hostEndianness.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/src/Endianness_hostEndianness.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/src/Endianness_hostEndianness.cpp (revision 81) @@ -0,0 +1,16 @@ +#include "../include/Endianness.h" + +namespace environment { +namespace endianness { + + bool hostEndianness () + { + TestEndian test; + + test.word = 0x000000FF; + + return (test.bytes.byte1 == 0xFF)?LittleEndian:BigEndian; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Endianness/src/Endianness_isSameEndianness.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/src/Endianness_isSameEndianness.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/src/Endianness_isSameEndianness.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Endianness.h" + +namespace environment { +namespace endianness { + + bool isSameEndianness (uint32_t cpu_id) + { + return ((hostEndianness() xor cpuEndianness(cpu_id)) == false); + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Endianness/src/Endianness_swapBytes.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Endianness/src/Endianness_swapBytes.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Endianness/src/Endianness_swapBytes.cpp (revision 81) @@ -0,0 +1,77 @@ +#include "../include/Endianness.h" +#include + +namespace environment { +namespace endianness { + +/* + * swapBytes -> change the endiannes + * exemple for 16 and size_access = 4, [0123456789abcdef] -> [32107654ba98fedc] + */ + char * swapBytes (char * string_src , uint32_t size_string, uint32_t size_access) + { + char string_tmp [size_string]; + + if ( (size_access == 1) or + (size_access > size_string)) + return string_src; + +// if (size_string % size_access != 0) +// { +// std::cerr << " : Size of string must be a multiple of size_access." << std::endl; +// exit(1); +// } + + // size_access : + // 1 -> bytes + // 2 -> half + // 4 -> word + // 8 -> doubleword + + memcpy (string_tmp,string_src,size_string); + + // Loop to reorganize the string + for (uint32_t i = 0 ; i < size_string; i += size_access) + { + switch (size_access) + { + case 2 : + { + string_src[i+0] = string_tmp[i+1]; + string_src[i+1] = string_tmp[i+0]; + break; + } + case 4 : + { + string_src[i+0] = string_tmp[i+3]; + string_src[i+1] = string_tmp[i+2]; + string_src[i+2] = string_tmp[i+1]; + string_src[i+3] = string_tmp[i+0]; + break; + } + case 8 : + { + string_src[i+0] = string_tmp[i+7]; + string_src[i+1] = string_tmp[i+6]; + string_src[i+2] = string_tmp[i+5]; + string_src[i+3] = string_tmp[i+4]; + string_src[i+4] = string_tmp[i+3]; + string_src[i+5] = string_tmp[i+2]; + string_src[i+6] = string_tmp[i+1]; + string_src[i+7] = string_tmp[i+0]; + break; + } + default : + { + std::cerr << " : Illegal size of access (size_access = " << size_access << ")" << std::endl; + exit(1); + break; + } + }//end switch(size_access) + }//end i + + return string_src; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/Makefile (revision 81) +++ /trunk/IPs/systemC/Environment/Makefile (revision 81) @@ -0,0 +1,52 @@ +#-----[ Directory ]---------------------------------------- + +DIR_CACHE = Cache +DIR_DATA = Data +DIR_ENDIANNESS = Endianness +DIR_QUEUE = Queue +DIR_RAMLOCK = RamLock +DIR_SIM2OS = Sim2OS +DIR_TTY = TTY + +#-----[ Variable ]----------------------------------------- + +OBJECTS_DEPS = $(patsubst $(DIR_CACHE)/$(DIR_SRC)/%.cpp,$(DIR_CACHE)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_CACHE)/$(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_DATA)/$(DIR_SRC)/%.cpp,$(DIR_DATA)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_DATA)/$(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_DATA)/$(DIR_SRC)/%.c,$(DIR_DATA)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_DATA)/$(DIR_SRC)/*.c)) \ + $(patsubst $(DIR_ENDIANNESS)/$(DIR_SRC)/%.cpp,$(DIR_ENDIANNESS)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_ENDIANNESS)/$(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_QUEUE)/$(DIR_SRC)/%.cpp,$(DIR_QUEUE)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_QUEUE)/$(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_RAMLOCK)/$(DIR_SRC)/%.cpp,$(DIR_RAMLOCK)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_RAMLOCK)/$(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_SIM2OS)/$(DIR_SRC)/%.cpp,$(DIR_SIM2OS)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_SIM2OS)/$(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_TTY)/$(DIR_SRC)/%.cpp,$(DIR_TTY)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_TTY)/$(DIR_SRC)/*.cpp)) + + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) --directory=$(DIR_CACHE) all; \ + $(MAKE) --directory=$(DIR_DATA) all; \ + $(MAKE) --directory=$(DIR_ENDIANNESS) all; \ + $(MAKE) --directory=$(DIR_QUEUE) all; \ + $(MAKE) --directory=$(DIR_RAMLOCK) all; \ + $(MAKE) --directory=$(DIR_SIM2OS) all; \ + $(MAKE) --directory=$(DIR_TTY) all; \ + $(MAKE) all_environment; + +clean : + @\ + $(MAKE) --directory=$(DIR_CACHE) clean; \ + $(MAKE) --directory=$(DIR_DATA) clean; \ + $(MAKE) --directory=$(DIR_ENDIANNESS) clean; \ + $(MAKE) --directory=$(DIR_QUEUE) clean; \ + $(MAKE) --directory=$(DIR_RAMLOCK) clean; \ + $(MAKE) --directory=$(DIR_SIM2OS) clean; \ + $(MAKE) --directory=$(DIR_TTY) clean; \ + $(MAKE) environment_clean; \ + $(RM) tty_*; + + +help : + @$(MAKE) environment_help + +include Makefile.Environment Index: /trunk/IPs/systemC/Environment/Makefile.Environment =================================================================== --- /trunk/IPs/systemC/Environment/Makefile.Environment (revision 81) +++ /trunk/IPs/systemC/Environment/Makefile.Environment (revision 81) @@ -0,0 +1,108 @@ +include $(MORPHEO_TOPLEVEL)/Makefile.tools +include $(MORPHEO_IPS)/processor/Morpheo/Behavioural/Makefile.flags + +#-----[ Directory ]---------------------------------------- +DIR_TST = selftest +DIR_INC = include +DIR_SRC = src +DIR_OBJ = obj +DIR_BIN = bin + +#-----[ Compilation ]-------------------------------------- +INCDIR = $(SYSTEMC_INCDIR_$(SIMULATOR)) \ + -I$(DIR_INC) \ + -I../processor/Morpheo + +LIBDIR = $(SYSTEMC_LIBDIR_$(SIMULATOR)) + +LIBNAME = $(SYSTEMC_LIBNAME_$(SIMULATOR)) \ + -lbfd + +FLAGS = $(SYSTEMC_CFLAGS_$(SIMULATOR)) + +MORPHEO_CC_FLAGS = $(MORPHEO_FLAGS) $(CC_FLAGS) $(INCDIR) +MORPHEO_CXX_FLAGS = $(MORPHEO_FLAGS) $(CXX_FLAGS) $(FLAGS) $(INCDIR) +MORPHEO_L_FLAGS = $(MORPHEO_FLAGS) $(CXX_FLAGS) $(FLAGS) $(LIBDIR) + +#-----[ Variable ]----------------------------------------- + +ENTITY = `$(BASENAME) $$PWD` + +OBJECTS = $(patsubst $(DIR_SRC)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SRC)/*.cpp)) \ + $(patsubst $(DIR_SRC)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SRC)/*.c)) +OBJECTS_BIN = $(patsubst $(DIR_TST)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_TST)/*.cpp)) + +HEADERS = $(wildcard $(DIR_INC)/*.h) + +EXE = $(DIR_BIN)/soft.x + +EXEC_PREFIX = +#$(VALGRIND) + +#-----[ Rules ]-------------------------------------------- + +.PRECIOUS : $(DIR_OBJ)/%.o $(DIR_BIN)/%.x + +test_env : + @\ + $(ECHO) "-------------------| $(ENTITY)" + +$(DIR_OBJ)/%.o : $(DIR_SRC)/%.cpp $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(DISTCXX) $(MORPHEO_CXX_FLAGS) -c -o $@ $<; + +$(DIR_OBJ)/%.o : $(DIR_SRC)/%.c $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(DISTCC) $(MORPHEO_CC_FLAGS) -c -o $@ $<; + +$(DIR_OBJ)/%.o : $(DIR_TST)/%.cpp $(HEADERS) + @\ + $(ECHO) "Compilation : $*";\ + $(DISTCXX) $(MORPHEO_CXX_FLAGS) -c -o $@ $<; + +$(DIR_BIN)/%.x : $(OBJECTS_DEPS) $(OBJECTS) $(OBJECTS_BIN) + \ + $(ECHO) "Compilation : $*";\ + $(CXX) $(MORPHEO_L_FLAGS) -o $@ $^ $(LIBNAME); + +$(DIR_OBJ) : + @\ + $(ECHO) "Create directory : $@";\ + $(MKDIR) $@ + +$(DIR_BIN) : + @\ + $(ECHO) "Create directory : $@";\ + $(MKDIR) $@ + + +exe : all + @\ + export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; $(EXEC_PREFIX) ./$(EXE) $(SYSTEMC_EXEC_PARAMS_$(SIMULATOR)) + + +all_environment : test_env $(DIR_OBJ) $(DIR_BIN) + @\ + $(MAKE) $(EXE) + +environment_clean : + @\ + $(ECHO) "Delete temporary files in directory "$(PWD);\ + $(RM) *~ \ + $(DIR_OBJ) \ + $(DIR_BIN) \ + $(DIR_TST)/*~ \ + $(DIR_SRC)/*~ \ + $(DIR_INC)/*~ \ + *.dot \ + *.txt; + +environment_help : + @\ + $(ECHO) " -----[ Environment ]------------------------------";\ + $(ECHO) "";\ + $(ECHO) " * test_env : test if environnment's variable is set";\ + $(ECHO) " * all_environment : generate object";\ + $(ECHO) ""; Index: unk/IPs/systemC/Environment/Makefile.Environnement =================================================================== --- /trunk/IPs/systemC/Environment/Makefile.Environnement (revision 80) +++ (revision ) @@ -1,90 +1,0 @@ -include $(MORPHEO_TOPLEVEL)/Makefile.tools - -#-----[ Directory ]---------------------------------------- -DIR_TST = selftest -DIR_INC = include -DIR_SRC = src -DIR_OBJ = obj -DIR_BIN = bin - -#-----[ Compilation ]-------------------------------------- -INCDIR = $(SYSTEMC_INCDIR_$(SIMULATOR)) \ - -I$(DIR_INC) - -LIBDIR = - -FLAGS = $(SYSTEMC_CFLAGS_$(SIMULATOR)) \ - $(CXX_FLAGS) - -CFLAGS = $(MORPHEO_FLAGS) $(FLAGS) $(INCDIR) -LFLAGS = $(MORPHEO_FLAGS) $(FLAGS) $(LIBDIR) - -#-----[ Variable ]----------------------------------------- - -ENTITY = `$(BASENAME) $$PWD` - -OBJECTS = $(patsubst $(DIR_SRC)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SRC)/*.cpp)) -OBJECTS_BIN = $(patsubst $(DIR_TST)/%.cpp,$(DIR_OBJ)/%.o,$(wildcard $(DIR_TST)/*.cpp)) - -HEADERS = $(wildcard $(DIR_INC)/*.h) - -EXE = $(DIR_BIN)/soft.x - -#-----[ Rules ]-------------------------------------------- - -.PRECIOUS : $(DIR_OBJ)/%.o $(DIR_BIN)/%.x - -test_env : - @$(ECHO) "-------------------[ $(ENTITY) ]" - -$(DIR_OBJ)/%.o : $(DIR_SRC)/%.cpp $(HEADERS) - @\ - $(ECHO) "Compilation : $*";\ - $(CXX) $(CFLAGS) -c -o $@ $<; - -$(DIR_OBJ)/%.o : $(DIR_TST)/%.cpp $(HEADERS) - @\ - $(ECHO) "Compilation : $*";\ - $(CXX) $(CFLAGS) -c -o $@ $<; - -$(DIR_BIN)/%.x : $(OBJECTS_DEPS) $(OBJECTS) $(OBJECTS_BIN) - \ - $(ECHO) "Compilation : $*";\ - $(CXX) $(LFLAGS) -o $@ $^; - -$(DIR_OBJ) : - @\ - $(ECHO) "Create directory : $@";\ - $(MKDIR) $@ - -$(DIR_BIN) : - @\ - $(ECHO) "Create directory : $@";\ - $(MKDIR) $@ - - -exe : all_environment - @\ - $(VALGRIND) ./$(EXE) - -all_environment : test_env $(DIR_OBJ) $(DIR_BIN) - @\ - $(MAKE) $(EXE) - -environment_clean : - @\ - $(ECHO) "Delete temporary files in directory "$(PWD);\ - $(RM) *~ \ - $(DIR_OBJ) \ - $(DIR_BIN) \ - $(DIR_TST)/*~ \ - $(DIR_SRC)/*~ \ - $(DIR_INC)/*~; - -environment_help : - @\ - $(ECHO) " -----[ Environment ]------------------------------";\ - $(ECHO) "";\ - $(ECHO) " * test_env : test if environnment's variable is set";\ - $(ECHO) " * all_environment : generate object";\ - $(ECHO) ""; Index: /trunk/IPs/systemC/Environment/Queue/include/Queue.h =================================================================== --- /trunk/IPs/systemC/Environment/Queue/include/Queue.h (revision 80) +++ /trunk/IPs/systemC/Environment/Queue/include/Queue.h (revision 81) @@ -61,13 +61,13 @@ // *****[ pop ]***** // read the queue, and update the pointer - public : virtual T pop () {return T();}; + public : virtual T pop () = 0; // *****[ pop ]***** // read the queue, and update the pointer - public : virtual T pop (uint32_t num) {return T();}; + public : virtual T pop (uint32_t num) = 0; // *****[ push ]***** // Push a new value (they must have a slot free) - public : virtual bool push (T val) {return false;}; + public : virtual bool push (T val) = 0; }; // Queue Index: /trunk/IPs/systemC/Environment/Queue/include/Sort_Queue.h =================================================================== --- /trunk/IPs/systemC/Environment/Queue/include/Sort_Queue.h (revision 80) +++ /trunk/IPs/systemC/Environment/Queue/include/Sort_Queue.h (revision 81) @@ -25,4 +25,6 @@ Parameters * param) : Queue (name,param->_size) { + _ptr_read = 0; + _ptr_write = 0; }; @@ -104,4 +106,9 @@ // *****[ push ]***** + public : bool push (T val) + { + return push (0, val); + } + // Push a new value (they must have a slot free) // Is sort by delay Index: /trunk/IPs/systemC/Environment/Queue/include/Sort_Queue_Dynamic.h =================================================================== --- /trunk/IPs/systemC/Environment/Queue/include/Sort_Queue_Dynamic.h (revision 80) +++ /trunk/IPs/systemC/Environment/Queue/include/Sort_Queue_Dynamic.h (revision 81) @@ -143,9 +143,13 @@ // Reorganize the queue - for (uint32_t it = num; it < Queue ::_nb_slot; it ++) + for (uint32_t it = num; it+1 < Queue ::_nb_slot; it ++) { uint32_t ptr = (it); uint32_t ptr_next = (it+1); +// std::cout << "ptr : " << ptr << std::endl +// << "ptr_next : " << ptr_next << std::endl +// << "nb_slot : " << Queue ::_nb_slot << std::endl; + Queue ::_slot [ptr] = Queue ::_slot [ptr_next]; } @@ -157,4 +161,9 @@ // *****[ push ]***** + public : bool push (T val) + { + return push (0, val); + } + // Push a new value (they must have a slot free) // Is sort by delay Index: /trunk/IPs/systemC/Environment/Queue/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Queue/selftest/main.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/Queue/selftest/main.cpp (revision 81) @@ -1,5 +1,5 @@ -#include #include "../include/Sort_Queue.h" #include "../include/Sort_Queue_Dynamic.h" +#include using namespace std; @@ -52,5 +52,9 @@ -int main (void) +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif { cout << "
Begin" << endl; Index: unk/IPs/systemC/Environment/RamLock/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/RamLock/include/Parameters.h (revision 80) +++ (revision ) @@ -1,25 +1,0 @@ -#ifndef Environment_Parameters_H -#define Environment_Parameters_H - -#include - -namespace environment { -namespace ramlock { - - class Parameters - { - public : uint32_t _size; - - public : Parameters (uint32_t size) - { - _size = size; - } - - public : ~Parameters (void) - {}; - - }; - -}; -}; -#endif Index: /trunk/IPs/systemC/Environment/RamLock/include/RamLock.h =================================================================== --- /trunk/IPs/systemC/Environment/RamLock/include/RamLock.h (revision 80) +++ /trunk/IPs/systemC/Environment/RamLock/include/RamLock.h (revision 81) @@ -5,5 +5,5 @@ #include -#include "Parameters.h" +#include "RamLock_Parameters.h" namespace environment { Index: /trunk/IPs/systemC/Environment/RamLock/include/RamLock_Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/RamLock/include/RamLock_Parameters.h (revision 81) +++ /trunk/IPs/systemC/Environment/RamLock/include/RamLock_Parameters.h (revision 81) @@ -0,0 +1,25 @@ +#ifndef Environment_Parameters_H +#define Environment_Parameters_H + +#include + +namespace environment { +namespace ramlock { + + class Parameters + { + public : uint32_t _size; + + public : Parameters (uint32_t size) + { + _size = size; + } + + public : ~Parameters (void) + {}; + + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/RamLock/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/RamLock/selftest/main.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/RamLock/selftest/main.cpp (revision 81) @@ -1,4 +1,4 @@ +#include "../include/RamLock.h" #include -#include "../include/RamLock.h" using namespace std; @@ -24,5 +24,9 @@ -int main (void) +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif { cout << "
Begin" << endl; Index: /trunk/IPs/systemC/Environment/RamLock/src/RamLock_test.cpp =================================================================== --- /trunk/IPs/systemC/Environment/RamLock/src/RamLock_test.cpp (revision 80) +++ /trunk/IPs/systemC/Environment/RamLock/src/RamLock_test.cpp (revision 81) @@ -8,4 +8,5 @@ // return num_lock < _param->_size; // } + }; }; Index: /trunk/IPs/systemC/Environment/Sim2OS/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/Makefile (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/Makefile (revision 81) @@ -0,0 +1,24 @@ +#-----[ Directory ]---------------------------------------- + +DIR_ENDIANNESS = ../Endianness + +#-----[ Variable ]----------------------------------------- + +OBJECTS_DEPS = $(patsubst $(DIR_ENDIANNESS)/$(DIR_SRC)/%.cpp,$(DIR_ENDIANNESS)/$(DIR_OBJ)/%.o,$(wildcard $(DIR_ENDIANNESS)/$(DIR_SRC)/*.cpp)) + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) --directory=$(DIR_ENDIANNESS) all; \ + $(MAKE) all_environment + +clean : + @\ + $(MAKE) --directory=$(DIR_ENDIANNESS) clean; \ + $(MAKE) environment_clean + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: /trunk/IPs/systemC/Environment/Sim2OS/include/Service.h =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/include/Service.h (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/include/Service.h (revision 81) @@ -0,0 +1,17 @@ +#ifndef ENVIRONMENT_SIM2OS_SERVICE_H +#define ENVIRONMENT_SIM2OS_SERVICE_H + +typedef enum + { + SERVICE_OPEN , + SERVICE_CLOSE , + SERVICE_READ , + SERVICE_WRITE , + SERVICE_TIME , + SERVICE_CLOCK , + SERVICE_LSEEK , + SERVICE_UNDEFINED , + SERVICE_UNIMPLEMENTED + } service_t; + +#endif Index: /trunk/IPs/systemC/Environment/Sim2OS/include/Service_conversion.h =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/include/Service_conversion.h (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/include/Service_conversion.h (revision 81) @@ -0,0 +1,14 @@ +#ifndef ENVIRONMENT_SIM2OS_SERVICE_CONVERSION_H +#define ENVIRONMENT_SIM2OS_SERVICE_CONVERSION_H + +#include "Service.h" + +namespace environment { +namespace sim2os { + + int service2int (service_t num_service); + service_t int2service (int val); + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Sim2OS/include/Sim2OS.h =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/include/Sim2OS.h (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/include/Sim2OS.h (revision 81) @@ -0,0 +1,55 @@ +#ifndef ENVIRONMENT_SIM2OS_H +#define ENVIRONMENT_SIM2OS_H + +#include +#include +#include +#include +#include +#include +#include + +#include "Sim2OS_Parameters.h" +#include "Service_conversion.h" +#include "../../Endianness/include/Endianness.h" +namespace environment { +namespace sim2os { + + class Sim2OS + { + private : std::string name; + private : Parameters * param; + private : service_t num_service; // number of service + private : std::map arguments; + private : uint32_t nb_cycle; + public : void * result; + public : int error; // It's errno + + public : Sim2OS (std::string name, + Parameters * param); + public : ~Sim2OS (void); + + public : void reset (void); + + private : bool have_all_arguments (uint32_t); + private : void * convert_address (void *); + + private : void * service_open (void); + private : void * service_close (void); + private : void * service_read (void); + private : void * service_write (void); + private : void * service_time (void); + private : void * service_clock (void); + private : void * service_lseek (void); + + public : void * execute (void); + public : void * execute (service_t); + public : void * execute (service_t, void *, ...); + public : void parameter (uint32_t, void *); + public : void transition (void); + public : friend std::ostream& operator<< (std::ostream&, Sim2OS&); + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Sim2OS/include/Sim2OS_Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/include/Sim2OS_Parameters.h (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/include/Sim2OS_Parameters.h (revision 81) @@ -0,0 +1,21 @@ +#ifndef ENVIRONMENT_SIM2OS_PARAMETERS_H +#define ENVIRONMENT_SIM2OS_PARAMETERS_H + +#include "../../../shared/soclib_segment_table.h" + +namespace environment { +namespace sim2os { + + class Parameters + { + public : SOCLIB_SEGMENT_TABLE * segment_table; + + public : Parameters (SOCLIB_SEGMENT_TABLE * segment_table) + { + this->segment_table = segment_table; + } + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/Sim2OS/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/selftest/main.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/selftest/main.cpp (revision 81) @@ -0,0 +1,92 @@ +#include +#include "../include/Sim2OS.h" + +using namespace std; +using namespace environment; +using namespace environment::sim2os; + +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif +{ + cout << "
Begin" << endl; + + SOCLIB_SEGMENT_TABLE * segtable = new SOCLIB_SEGMENT_TABLE; + segtable->setMSBNumber (8); + segtable->setDefaultTarget(0,0); + + //shared data segment + + const int TEXT_BASE = 0x1000; + const int DATA_CACHED_BASE = 0x2000; + const int DATA_UNCACHED_BASE = 0x3000; + const int STACK_BASE = 0x4000; + const int TTY_BASE = 0x5000; + const int SIM2OS_BASE = 0x6000; + const int RAMLOCK_BASE = 0x7000; + + const int TEXT_SIZE = 0x100; + const int DATA_CACHED_SIZE = 0x100; + const int DATA_UNCACHED_SIZE = 0x100; + const int STACK_SIZE = 0x100; + const int TTY_SIZE = 0x100; + const int SIM2OS_SIZE = 0x100; + const int RAMLOCK_SIZE = 0x100; + + // Add a segment :name , address of base , size , global index , local index, uncache + segtable->addSegment("text" , TEXT_BASE , TEXT_SIZE , 0 ,0 , false); + segtable->addSegment("data" , DATA_CACHED_BASE , DATA_CACHED_SIZE , 0 ,0 , false); + segtable->addSegment("data_unc" , DATA_UNCACHED_BASE , DATA_UNCACHED_SIZE , 0 ,0 , true ); + segtable->addSegment("stack" , STACK_BASE , STACK_SIZE , 0 ,0 , false); + segtable->addSegment("tty" , TTY_BASE , TTY_SIZE , 0 ,0 , true ); + segtable->addSegment("sim2os" , SIM2OS_BASE , SIM2OS_SIZE , 0 ,0 , true ); + segtable->addSegment("ramlock" , RAMLOCK_BASE , RAMLOCK_SIZE , 0 ,0 , true ); + + segtable->print(); + + Parameters * param = new Parameters (segtable); + + Sim2OS * my_sim2os = new Sim2OS ("my_sim2os",param); + + cout << *my_sim2os << endl; + + my_sim2os->transition(); + my_sim2os->transition(); + my_sim2os->transition(); + my_sim2os->transition(); + my_sim2os->transition(); + my_sim2os->transition(); + my_sim2os->transition(); + my_sim2os->transition(); // cycle 8 + + my_sim2os->parameter(1,(void*) 21071981); + my_sim2os->parameter(2,(void*)0xdeadbeef); + my_sim2os->parameter(0,(void*)5); // SERVICE_CLOCK + + cout << *my_sim2os << endl; + my_sim2os->execute(); + cout << *my_sim2os << endl; + +// char * pathname = "toto.txt"; +// int flags = O_CREAT; +// mode_t mode = 0777; + +// my_sim2os->parameter(1,(void*)pathname); +// my_sim2os->parameter(2,(void*)flags ); +// my_sim2os->parameter(3,(void*)mode ); +// my_sim2os->parameter(0,(void*)0 ); + +// cout << *my_sim2os << endl; +// my_sim2os->execute(); +// cout << *my_sim2os << endl; + + delete my_sim2os; + delete param; + delete segtable; + + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Service_conversion.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Service_conversion.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Service_conversion.cpp (revision 81) @@ -0,0 +1,28 @@ +#include "../include/Service_conversion.h" + +namespace environment { +namespace sim2os { + + int service2int (service_t num_service) + { + return static_cast(num_service); + } + + service_t int2service (int val) + { + switch (val) + { + case SERVICE_OPEN : return SERVICE_OPEN ; + case SERVICE_CLOSE : return SERVICE_CLOSE; + case SERVICE_READ : return SERVICE_READ ; + case SERVICE_WRITE : return SERVICE_WRITE; + case SERVICE_TIME : return SERVICE_TIME ; + case SERVICE_CLOCK : return SERVICE_CLOCK; + case SERVICE_LSEEK : return SERVICE_LSEEK; + case SERVICE_UNIMPLEMENTED : return SERVICE_UNIMPLEMENTED; + default : return SERVICE_UNDEFINED; + }//end switch + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS.cpp (revision 81) @@ -0,0 +1,22 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + Sim2OS::Sim2OS (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + this->num_service = SERVICE_UNDEFINED; + this->result = (void *)-1; + this->error = 1; + this->nb_cycle = 0; + } + + Sim2OS::~Sim2OS (void) + { + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_convert_address.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_convert_address.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_convert_address.cpp (revision 81) @@ -0,0 +1,23 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + /* + * convert a address in the simulator on a address in OS + */ + void * Sim2OS::convert_address (void * address) + { + void * result = param->segment_table->getAddrAlloc((uint32_t)address); + + if (result == NULL) + { + std::cerr << "<" << name << "> address don't match : " << std::hex << (uint32_t)(address) << std::dec << std::endl; + exit(0); + } + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_execute.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_execute.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_execute.cpp (revision 81) @@ -0,0 +1,72 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::execute (service_t num) + { + num_service = num; + + return execute(); + } + + /* + * execute the service with all + * the list of arg must be finish by "NULL" + * also the list can't have a NULL as param + */ + void * Sim2OS::execute (service_t num, void * arg, ...) + { + num_service = num; + + va_list ap; + va_start (ap,arg); + uint32_t it = 1; + while (arg != NULL) + { + arguments[it] = arg; + it ++; + arg = va_arg(ap,void *); + } + + va_end(ap); + return execute(); + } + + /* + * execute the service without argument + */ + void * Sim2OS::execute () + { + result = NULL; + + switch (num_service) + { + case SERVICE_OPEN : {result = service_open (); break;} + case SERVICE_CLOSE : {result = service_close (); break;} + case SERVICE_READ : {result = service_read (); break;} + case SERVICE_WRITE : {result = service_write (); break;} + case SERVICE_TIME : {result = service_time (); break;} + case SERVICE_CLOCK : {result = service_clock (); break;} + case SERVICE_LSEEK : {result = service_lseek (); break;} + case SERVICE_UNIMPLEMENTED : + { + std::cerr << "<" << name << "> service Unimplemented : " << num_service << std::endl; + break; + } + + case SERVICE_UNDEFINED : + default : + { + std::cerr << "<" << name << "> service Undefine : " << num_service << std::endl; + break; + } + }//end switch + + // Erase all elt; + num_service = SERVICE_UNDEFINED; + arguments.erase(arguments.begin(),arguments.end()); + return result; + }; +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_have_all_arguments.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_have_all_arguments.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_have_all_arguments.cpp (revision 81) @@ -0,0 +1,30 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + /* + * Test if all arguments is here + * (don't test the coherencies of this) + */ + bool Sim2OS::have_all_arguments (uint32_t nb_val) + { + // while ((nb_val > 0) && + // (arguments.find(nb_val) != arguments.end())) + // nb_val --; + + uint32_t val = nb_val; + while (nb_val > 0) + if (arguments.find(nb_val) != arguments.end()) + nb_val --; + else + { + std::cerr << "argument[" << nb_val << "] on " << val << ", is not find." << std::endl; + break; + } + + return (nb_val == 0); + }; + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_parameter.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_parameter.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_parameter.cpp (revision 81) @@ -0,0 +1,21 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + /* + * Add a new parameter + * if num_reg == 0, it's the number of service + * else it's a arguments + */ + void Sim2OS ::parameter (uint32_t num_reg, + void * val) + { + if (num_reg == 0) + num_service = int2service((int)(val)); + else + arguments[num_reg] = val; + }; + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_print.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_print.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_print.cpp (revision 81) @@ -0,0 +1,19 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + std::ostream& operator<< (std::ostream& output, Sim2OS &x) + { + output << "<" << x.name << ">" << std::endl; + output << " * num_service : " << x.num_service << std::endl; + + for (std::map::iterator it = x.arguments.begin(); + it != x.arguments.end(); + it ++) + output << "[" << it->first << "] : " << it->second << std::endl; + return output; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_reset.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_reset.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_reset.cpp (revision 81) @@ -0,0 +1,11 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void Sim2OS::reset (void) + { + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_clock.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_clock.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_clock.cpp (revision 81) @@ -0,0 +1,25 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_clock (void) + { + if (have_all_arguments(0) == false) + { + std::cerr << "<" << name << "> Usage : clock_t clock();" << std::endl; + return NULL; + } + + void * result = (void *) nb_cycle; + error = 0; + + std::cout << "\n\t***** service : clock *****" << std::endl; + std::cout << "\tresult : " << (unsigned int) result << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_close.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_close.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_close.cpp (revision 81) @@ -0,0 +1,27 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_close (void) + { + if (have_all_arguments(1) == false) + { + std::cerr << "<" << name << "> Usage : int close(int fd);" << std::endl; + return NULL; + } + + int fd = (int) arguments[1]; + void * result = (void *) close(fd); + error = errno; + + std::cout << "\n\t***** service : close *****" << std::endl; + std::cout << "\tfd : " << (unsigned int) fd << std::endl; + std::cout << "\tresult : " << (unsigned int) result << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_lseek.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_lseek.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_lseek.cpp (revision 81) @@ -0,0 +1,33 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_lseek (void) + { + if (have_all_arguments(3) == false) + { + std::cerr << "<" << name << "> Usage : off_t lseek(int fildes, off_t offset, int whence);" << std::endl; + return NULL; + } + + int flides = (int) arguments[1]; + off_t offset = (off_t) arguments[2]; + int whence = (int) arguments[3]; + void * result = (void *) lseek(flides,offset,whence); + error = errno; + + // No swap -> because no access memory + + std::cout << "\n\t***** service : lseek *****" << std::endl; + std::cout << "\tflides : " << (unsigned int) flides << std::endl; + std::cout << "\toffset : " << (unsigned int) offset << std::endl; + std::cout << "\twhence : " << (unsigned int) whence << std::endl; + std::cout << "\tresult : " << (unsigned int) result << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_open.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_open.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_open.cpp (revision 81) @@ -0,0 +1,35 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_open (void) + { + if (have_all_arguments(3) == false) + { + std::cerr << "<" << name << "> Usage : int open(const char *pathname, int flags, mode_t mode);" << std::endl; + return NULL; + } + + const char *pathname = (const char *) convert_address(arguments[1]); + int flags = (int) arguments[2]; + mode_t mode = (mode_t) arguments[3]; + void * result = (void *) open(pathname,flags,mode); + error = errno; + + std::cout << "\n\t***** service : open *****" << std::endl; + std::cout << "\tpathname : " << pathname << std::endl; + std::cout << "\tflags /8 : " << std::oct << (unsigned int) flags << std::endl; + std::cout << "\tflags /10 : " << std::dec << (unsigned int) flags << std::endl; + std::cout << "\tflags /16 : " << std::hex << (unsigned int) flags << std::endl; + std::cout << "\tmode /8 : " << std::oct << (unsigned int) mode << std::endl; + std::cout << "\tmode /10 : " << std::dec << (unsigned int) mode << std::endl; + std::cout << "\tmode /16 : " << std::hex << (unsigned int) mode << std::endl; + std::cout << "\tresult : " << std::dec << (unsigned int) result << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_read.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_read.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_read.cpp (revision 81) @@ -0,0 +1,33 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_read (void) + { + if (have_all_arguments(3) == false) + { + std::cerr << "<" << name << "> Usage : ssize_t read(int fd, void *buf, size_t count);" << std::endl; + return NULL; + } + + int fd = (int) arguments[1]; + void * buf = (void *) convert_address(arguments[2]); + ssize_t count = (ssize_t) arguments[3]; + void * result = (void *) read(fd,buf,count); + + std::cout << "\n\t***** service : read *****" << std::endl; + std::cout << "\tfd : " << (unsigned int) fd << std::endl; + std::cout << "\tbuf : " << std::hex << (unsigned int) buf << std::endl; + //std::cout << "\tbuf : " << std::dec << (char *) buf << std::endl; + std::cout << "\tcount : " << std::dec << (unsigned int) count << std::endl; + std::cout << "\tresult : " << (unsigned int) result << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + error = errno; + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_time.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_time.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_time.cpp (revision 81) @@ -0,0 +1,30 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_time (void) + { + if (have_all_arguments(1) == false) + { + std::cerr << "<" << name << "> Usage : time_t time(time_t * t);" << std::endl; + return NULL; + } + + time_t *t = (time_t *) convert_address(arguments[1]); + void * result = (void *) time(t); + error = errno; + + std::cout << "\n\t***** service : time *****" << std::endl; + std::cout << "\tt : " << std::hex << (unsigned int) t << std::endl; + std::cout << "\tresult : " << std::dec << (unsigned int) result << " - " << ctime((time_t *) t) << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + // Must swap, because it's a pointer + t = (time_t *)endianness::swapBytes((char *)t,sizeof(time_t),sizeof(time_t)); + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_write.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_write.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_service_write.cpp (revision 81) @@ -0,0 +1,34 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void * Sim2OS::service_write (void) + { + if (have_all_arguments(3) == false) + { + std::cerr << "<" << name << "> Usage : ssize_t write(int fd, void *buf, size_t count);" << std::endl; + return NULL; + } + + int fd = (int) arguments[1]; + const void *buf = (const void *) convert_address(arguments[2]); + ssize_t count = (ssize_t) arguments[3]; + void * result = (void *) write(fd,buf,count); + error = errno; + + // No swap -> because it's a char + + std::cout << "\n\t***** service : write *****" << std::endl; + std::cout << "\tfd : " << (unsigned int) fd << std::endl; + std::cout << "\tbuf : " << std::hex << (unsigned int) buf << std::endl; + //std::cout << "\tbuf : " << std::dec << (char *) buf << std::endl; + std::cout << "\tcount : " << std::dec << (unsigned int) count << std::endl; + std::cout << "\tresult : " << (unsigned int) result << std::endl; + std::cout << "\terrno : " << (unsigned int) error << std::endl; + + return result; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_transition.cpp =================================================================== --- /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_transition.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/Sim2OS/src/Sim2OS_transition.cpp (revision 81) @@ -0,0 +1,12 @@ +#include "../include/Sim2OS.h" + +namespace environment { +namespace sim2os { + + void Sim2OS::transition (void) + { + nb_cycle ++; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/TTY/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/TTY/Makefile (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/Makefile (revision 81) @@ -0,0 +1,21 @@ +#-----[ Directory ]---------------------------------------- + +#-----[ Variable ]----------------------------------------- + +#OBJECTS_DEPS = + +#-----[ Rules ]-------------------------------------------- + +all : + @\ + $(MAKE) all_environment; + +clean : + @\ + $(MAKE) environment_clean;\ + $(RM) tty_*; + +help : + @$(MAKE) environment_help + +include ../Makefile.Environment Index: /trunk/IPs/systemC/Environment/TTY/include/TTY.h =================================================================== --- /trunk/IPs/systemC/Environment/TTY/include/TTY.h (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/include/TTY.h (revision 81) @@ -0,0 +1,30 @@ +#ifndef ENVIRONMENT_TTY_H +#define ENVIRONMENT_TTY_H + +#include "TTY_Parameters.h" +#include "xTTY.h" +// #include +// #include +#include + +namespace environment { +namespace tty { + + class TTY + { + private : std::string name; + private : Parameters * param; + private : xTTY * xtty; + + public : TTY (std::string name, + Parameters * param); + public : ~TTY (void); + + public : void reset (void); + public : bool write (uint32_t num_tty, char data); + public : friend std::ostream& operator<< (std::ostream& output, TTY & x); + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/TTY/include/TTY_Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/TTY/include/TTY_Parameters.h (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/include/TTY_Parameters.h (revision 81) @@ -0,0 +1,27 @@ +#ifndef ENVIRONMENT_TTY_PARAMETERS_H +#define ENVIRONMENT_TTY_PARAMETERS_H + +#include + +namespace environment { +namespace tty { + + class Parameters + { + public : uint32_t nb_tty; + public : std::string * name_tty; + public : bool with_xtty; + + public : Parameters (uint32_t nb_tty, + std::string * name_tty, + bool with_xtty) + { + this->nb_tty = nb_tty; + this->name_tty = name_tty; + this->with_xtty = with_xtty; + } + }; + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/TTY/include/xTTY.h =================================================================== --- /trunk/IPs/systemC/Environment/TTY/include/xTTY.h (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/include/xTTY.h (revision 81) @@ -0,0 +1,21 @@ +#ifndef ENVIRONMENT_XTTY_H +#define ENVIRONMENT_XTTY_H + +#include + +namespace environment { +namespace tty { + + typedef struct canal {int CanalPipe[2];} canal ; + + class xTTY + { + public : FILE * log_file; + public : pid_t pid; + public : int pipe_output; + }; + + +}; +}; +#endif Index: /trunk/IPs/systemC/Environment/TTY/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/TTY/selftest/main.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/selftest/main.cpp (revision 81) @@ -0,0 +1,59 @@ +#include "../include/TTY.h" +#include + +using namespace std; +using namespace environment; +using namespace environment::tty; + +#ifdef SYSTEMC +int sc_main (int argc, char * argv[]) +#else +int main (int argc, char * argv[]) +#endif +{ + cout << "
Begin" << endl; + + uint32_t nb_tty = 4; + string * name_tty = new string [nb_tty]; + + name_tty [0] = "tty_0"; + name_tty [1] = "tty_1"; + name_tty [2] = "tty_2"; + name_tty [3] = "tty_3"; + + Parameters * param = new Parameters (nb_tty, + name_tty, + true); + + TTY * tty = new TTY ("my_tty", param); + tty->reset(); + + cout << *tty << endl; + + char * message_0 = "Ici Londre : Adeline aime la saucisse de Frankort.\nJe repete : Adeline aime la saucisse de Frankort" ; + char * message_1 = "Ici Londre : Maurice a garer le camion de bernard dans la cour.\nJe repete Maurice a garer le camion de bernard dans la cour"; + char * message_2 = "Ici Londre : Londre est la ville qui diffuse des messages a la con.\nJe repete : Londre est la ville qui diffuse des messages a la con"; + char * message_3 = "Ici Londre : Non, le debarquement n'aura pas lieu le 6 juin 1944 en Normandie, et je ne me repete pas"; + + char * message [nb_tty]; + message[0] = message_0; + message[1] = message_1; + message[2] = message_2; + message[3] = message_3; + + for (uint32_t j = 0; j < nb_tty ; j ++) + { + for (uint32_t i = 0; i < strlen(message[j]); i++) + tty->write(j,message[j][i]); + } + + cout << "
Press to stop the test" << endl; + getchar(); + + delete tty; + delete param; + delete [] name_tty; + cout << "
End" << endl; + + return EXIT_SUCCESS; +} Index: /trunk/IPs/systemC/Environment/TTY/src/TTY.cpp =================================================================== --- /trunk/IPs/systemC/Environment/TTY/src/TTY.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/src/TTY.cpp (revision 81) @@ -0,0 +1,74 @@ +#include "../include/TTY.h" + +namespace environment { +namespace tty { + + TTY::TTY (std::string name, + Parameters * param) + { + this->name = name; + this->param = param; + + xtty = new xTTY [param->nb_tty]; + + + for (uint32_t i=0; inb_tty; i++) + { + // ***** Create a log_file ***** + xtty [i].log_file = fopen(param->name_tty[i].c_str(),"w"); + + if (xtty [i].log_file == NULL) + { + // Error + std::cerr << " Can't open the file : \"" << param->name_tty[i] << "\"" << std::endl; + exit(1); + } + + if (param->with_xtty == true) + { + // ***** TTY and pipe init ***** + canal canal_output; + + if (pipe (canal_output.CanalPipe) != 0) + { + std::cerr << " Error in pipe creation" << std::endl; + exit(1); + } + + if ((xtty[i].pid = fork()) == 0) + { + // Childen -> transform in a xtty + close(0); // s + dup (canal_output.CanalPipe [0]); + close(1); + execlp("xtty","xtty", param->name_tty [i].c_str() ,NULL); // devient un tty + + std::cerr << " Error in the creation of tty" << std::endl + << "Test if environment's variable $PATH is set with ${MORPHEO_IPS}/Environment/TTY/xtty" << std::endl; + exit (1); + } + else + { + // father + xtty[i].pipe_output = canal_output.CanalPipe [1]; + } + } + }//end for + } + + TTY::~TTY (void) + { + // Kill all tty + for (unsigned int i=0; inb_tty; i++) + { + if (param->with_xtty == true) + if (xtty[i].pid) + kill(xtty[i].pid,SIGTERM); + fclose(xtty[i].log_file); + } + + delete [] xtty; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/TTY/src/TTY_print.cpp =================================================================== --- /trunk/IPs/systemC/Environment/TTY/src/TTY_print.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/src/TTY_print.cpp (revision 81) @@ -0,0 +1,18 @@ +#include "../include/TTY.h" + +namespace environment { +namespace tty { + + std::ostream& operator<< (std::ostream& output, TTY & x) + { + output << "<" << x.name << ">" << std::endl + << " * nb_tty : " << x.param->nb_tty << std::endl; + + for (uint32_t i=0; inb_tty; i++) + output << " * tty ["<< i << "] : " << x.param->name_tty[i] << std::endl; + + return output; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/TTY/src/TTY_reset.cpp =================================================================== --- /trunk/IPs/systemC/Environment/TTY/src/TTY_reset.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/src/TTY_reset.cpp (revision 81) @@ -0,0 +1,11 @@ +#include "../include/TTY.h" + +namespace environment { +namespace tty { + + void TTY::reset (void) + { + } + +}; +}; Index: /trunk/IPs/systemC/Environment/TTY/src/TTY_write.cpp =================================================================== --- /trunk/IPs/systemC/Environment/TTY/src/TTY_write.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/src/TTY_write.cpp (revision 81) @@ -0,0 +1,20 @@ +#include "../include/TTY.h" + +namespace environment { +namespace tty { + + bool TTY::write (uint32_t num_tty, char data) + { + if (num_tty >= param->nb_tty) + return false; + + if (param->with_xtty == true) + ::write (xtty[num_tty].pipe_output, &data, 1); + + fputc (data, xtty[num_tty].log_file); + + return true; + } + +}; +}; Index: /trunk/IPs/systemC/Environment/TTY/xtty/xtty.cc =================================================================== --- /trunk/IPs/systemC/Environment/TTY/xtty/xtty.cc (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/xtty/xtty.cc (revision 81) @@ -0,0 +1,468 @@ +/* + * $Log: xtty.cc,v $ + * Revision 1.2 2005/09/26 10:45:31 wahid + * X11 application name changed + * + * Revision 1.1.1.1 2005/01/27 13:42:45 wahid + * First project import + * Wahid + * + * Revision 1.1 2002/03/19 15:03:22 boris + * Vcitty model addition + * + * Revision 1.1.1.1 2002/02/28 12:58:33 disydent + * Creation of Disydent CVS Tree + * + * Revision 1.1.1.1 2001/11/19 16:55:32 pwet + * Changing the CVS tree structure of disydent + * + * Revision 1.1.1.1 2001/07/24 13:31:45 pwet + * cvs tree of part of disydent + * + * Revision 1.1.1.1 2001/07/19 14:32:25 pwet + * New cvs tree + * + * Revision 1.3 2000/11/14 14:04:02 pwet + * Added an argument to main in tty.c and an argument in the call to xtty in + * pitty.c in order for the tty name to reflect the name of the file used + * to in the netlist. + * + * Revision 1.2 1998/09/16 16:11:32 pwet + * passage a cvs + * + * Revision 1.1 1998/09/01 09:49:14 pwet + * Initial revision + * + * Revision 1.1 1998/07/16 18:03:59 pwet + * Initial revision + * + * Authors: Frédéric Pétrot and Denis Hommais + */ + +//#ident "$Id$" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xtty.h" + +#include +#include + + +#ifdef __STDC__ +static void ttySetGraphics(Colormap cmap, char *fname, xtty *tty) +#else +static void ttySetGraphics(cmap, fname, tty) +Colormap cmap; +char *fname; +xtty *tty; +#endif +{ +XColor def, fit; +register int i; +static char *colorName[2] = {"Black", "Green"}; +int colors[2]; +XGCValues vGC; +Font font; +XFontStruct *qfst; + + + XFreeColormap(tty->display, cmap); + + if ((qfst = XLoadQueryFont(tty->display, fname)) == NULL) { + fprintf(stderr, "Font %s not available from X11 database.\n", fname); + exit(-1); + } + tty->font_height = qfst->ascent + qfst->descent; + tty->font_width = qfst->max_bounds.rbearing - qfst->min_bounds.lbearing; + font = qfst->fid; + /* XFreeFontInfo(&fname, qfst, 1); */ + + for (i = 0; i < 2; i++) { + if (!XAllocNamedColor(tty->display, cmap, + colorName[i], &def, &fit)) { + colorName[i]=strdup("white"); + XAllocNamedColor(tty->display, cmap, colorName[i], &def, &fit); + } + colors[i] = def.pixel; + } + + vGC.fill_style = FillSolid; + vGC.foreground = colors[1]; + vGC.background = colors[0]; + vGC.plane_mask = AllPlanes; + vGC.font = font; + tty->gc = XCreateGC(tty->display, + RootWindow(tty->display, + DefaultScreen(tty->display)), + (GCForeground | GCBackground | GCFillStyle | + GCPlaneMask | GCFont), &vGC); + +} + +#define OFFSET 3 + +#ifdef __STDC__ +void RefreshXtty(xtty *tty) +#else +void RefreshXtty(tty) +xtty *tty; +#endif +{ +int y; + + for (y = 0; y < TTYHEIGHT; y++) + XDrawImageString(tty->display, + tty->window, + tty->gc, + 0, + y * tty->font_height - OFFSET, + &tty->video[y][0], + TTYWIDTH); + +} + +#ifdef __STDC__ +static void UpdateXtty(xtty *tty, int refresh) +#else +static void UpdateXtty(tty, refresh) +xtty *tty; +int refresh; +#endif +{ +int x, y; + + if (tty->xcurse == 0) { + x = TTYWIDTH - 1; + y = tty->ycurse - 1; + } else { + x = tty->xcurse - 1; + y = tty->ycurse; + } + if (refresh) + RefreshXtty(tty); + else + XDrawImageString(tty->display, + tty->window, + tty->gc, + x * tty->font_width, + y * tty->font_height - OFFSET, + &tty->video[y][x], 1); +} + +#undef OFFSET + +#ifdef __STDC__ +static int ManageXtty(xtty *tty, char c) +#else +static int ManageXtty(tty, c) +xtty *tty; +char c; +#endif +{ +int yy; +int i; + + switch (c) { + case 0x08: + if (tty->xcurse > 0) { + tty->video[tty->ycurse][--tty->xcurse] = ' '; + return 1; + } else + XBell(tty->display, 10); + break; + + case 0x09: + for (i=0; i<8; i++) { + tty->video[tty->ycurse][tty->xcurse] = ' '; + tty->xcurse++; + if (tty->xcurse >= TTYWIDTH) { + tty->xcurse = 0; + tty->ycurse++; + } + if (tty->ycurse >= TTYHEIGHT) { + for (yy = 1; yy < TTYHEIGHT; yy++) + memcpy(tty->video[yy - 1], tty->video[yy], TTYWIDTH); + memset(tty->video[yy - 1], ' ', TTYWIDTH); + tty->ycurse = yy - 1; + return 1; + } + } + break; + + case 0x0A: + case 0x0D: + tty->xcurse = 0; + tty->ycurse++; + break; + + default: + tty->video[tty->ycurse][tty->xcurse] = c; + tty->xcurse++; + } + if (tty->xcurse >= TTYWIDTH) { + tty->xcurse = 0; + tty->ycurse++; + } + if (tty->ycurse >= TTYHEIGHT) { + for (yy = 1; yy < TTYHEIGHT; yy++) + memcpy(tty->video[yy - 1], tty->video[yy], TTYWIDTH); + memset(tty->video[yy - 1], ' ', TTYWIDTH); + tty->ycurse = yy - 1; + return 1; + } + return 0; +} + +#ifdef __STDC__ +static void EventXtty(xtty *tty, XEvent *event) +#else +static void EventXtty(tty, event) +xtty *tty; +XEvent *event; +#endif +{ +KeySym key; +char c; + + switch (event->type) { + case Expose: + RefreshXtty(tty); + break; + + case KeyPress: + XLookupString(&event->xkey, &c, 1, &key, NULL); + + if ((key & 0x100) != 0 + && key != XK_BackSpace + && key != XK_BackSpace + && key != XK_Tab + && key != XK_Linefeed + && key != XK_Return + && key != XK_Escape + && key != XK_Delete) + + break ; + + if (tty->wptr == tty->rptr && (tty->keybuf[tty->wptr] & 0x100) == 0x100) + XBell(tty->display, 10); + + else { + write( 1, &c, 1) ; + // UpdateXtty(tty, ManageXtty(tty, c)); + tty->keybuf[tty->wptr++] = 0 << 8 | c; //1 << 8 | c; + tty->wptr %= 16; + + } + break; + + default : + return; + } +} + +#ifdef __STDC__ +static Display *connect(Colormap *cmap) +#else +static Display *connect(cmap) +Colormap *cmap; +#endif +{ +Display *display; + + if ((display = XOpenDisplay(NULL)) == NULL) { + fputs("tty: cannot open X11 display\n", stderr); + exit(1); + } + *cmap = DefaultColormap(display, DefaultScreen(display)); + return display; +} + +#ifdef __STDC__ +static void DestroyXtty(xtty *tty) +#else +static void DestroyXtty(tty) +xtty *tty; +#endif +{ + XDestroyWindow(tty->display, tty->window); + XCloseDisplay(tty->display); +} + +int main(int argc, char *argv[]) +{ +timeval timeout ; +xtty *tty; +char *title; +XSizeHints shint; +//XWMHints wmhint; +XEvent event; +Colormap Cmap; +char c; +int rs; + +//fd_set rfds, wfds; +fd_set rfds; +int xfd; + + if (argc == 2) + title = argv[1]; + else + title = "SoCLib TTY"; + + tty = (xtty *)malloc(sizeof(xtty)); + memset(tty->video, ' ', TTYHEIGHT * TTYWIDTH); + + tty->xcurse = 0; + tty->ycurse = 1; + memset(tty->keybuf, 0, MAXCHAR * sizeof(short)); + tty->rptr = 0; + tty->wptr = 0; + + tty->display = connect(&Cmap); + ttySetGraphics(Cmap, FONT, tty); + + shint.x = 100; + shint.y = 0; + shint.min_width = shint.max_width = shint.width = TTYWIDTH * tty->font_width; + shint.min_height = shint.max_height = shint.height + = (TTYHEIGHT - 1) * tty->font_height; + + shint.flags = PSize | PMinSize | PMaxSize; + + tty->window = XCreateSimpleWindow( + tty->display, + DefaultRootWindow(tty->display), + shint.x, shint.y, shint.width, shint.height, 5, + WhitePixelOfScreen(DefaultScreenOfDisplay(tty->display)), + BlackPixelOfScreen(DefaultScreenOfDisplay(tty->display))); + + XSetStandardProperties(tty->display, tty->window, + title, "Pouet", + None, NULL, 0, &shint); + + /* + if (XpmCreatePixmapFromData(tty->display, tty->window, afraid_xpm, + &pixmap, &mask, NULL)) + */ + XSelectInput(tty->display, tty->window,// ExposureMask); + + KeyPressMask | ExposureMask); + + XMapRaised(tty->display, tty->window); + + /* + for (i=0; i<15; i++) + memcpy(tty->video[i+4], pouet[i], 65); + */ + + xfd=ConnectionNumber(tty->display); + FD_ZERO(&rfds); + FD_SET(xfd, &rfds); + FD_SET(0, &rfds); + + signal(SIGINT, SIG_IGN); + + + + + + XFlush(tty->display); + + while (1) { + + XFlush(tty->display); + + FD_ZERO(&rfds); + FD_SET(xfd, &rfds); + FD_SET(0, &rfds); + + timeout.tv_sec = 2 ; + timeout.tv_usec = 0 ; + rs = select (xfd+1, &rfds, NULL, NULL, &timeout); + + if (rs !=0){ + + if ( FD_ISSET(0, &rfds) == 1) { + read(0, &c, 1); + UpdateXtty(tty, ManageXtty(tty, c)); + RefreshXtty(tty); + } + + + if ( FD_ISSET(xfd, &rfds) == 1) { + XNextEvent(tty->display, &event); + EventXtty (tty, &event) ; + RefreshXtty(tty); + } + + } + + } + + +//getchar(); + + + + + + + + + + + + +/* + + + while (1) { + FD_SET(xfd, &rfds); + FD_SET(0, &rfds); + XFlush(tty->display); + rs=select(xfd+1, &rfds, NULL, NULL, NULL); + if (FD_ISSET(0, &rfds)) { + memset(tty->video, ' ', TTYHEIGHT * TTYWIDTH); + RefreshXtty(tty); + read(0, &c, 1); + UpdateXtty(tty, ManageXtty(tty, c)); + break; + } else { + while (XCheckWindowEvent(tty->display, tty->window, + ExposureMask, &event)) + RefreshXtty(tty); + } + } + + + + + while (1) { + FD_SET(xfd, &rfds); + FD_SET(0, &rfds); + XFlush(tty->display); + rs=select(xfd+1, &rfds, NULL, NULL, NULL); + if (FD_ISSET(0, &rfds)) { + read(0, &c, 1); + UpdateXtty(tty, ManageXtty(tty, c)); + } else { + while (XCheckWindowEvent(tty->display, tty->window, + ExposureMask, &event)) + RefreshXtty(tty); + } + } + + +*/ + + + exit(0); +} + Index: /trunk/IPs/systemC/Environment/TTY/xtty/xtty.h =================================================================== --- /trunk/IPs/systemC/Environment/TTY/xtty/xtty.h (revision 81) +++ /trunk/IPs/systemC/Environment/TTY/xtty/xtty.h (revision 81) @@ -0,0 +1,64 @@ +/* + * $Log: xtty.h,v $ + * Revision 1.1.1.1 2005/01/27 13:42:45 wahid + * First project import + * Wahid + * + * Revision 1.1 2002/03/19 15:03:22 boris + * Vcitty model addition + * + * Revision 1.1.1.1 2002/02/28 12:58:33 disydent + * Creation of Disydent CVS Tree + * + * Revision 1.1.1.1 2001/11/19 16:55:32 pwet + * Changing the CVS tree structure of disydent + * + * Revision 1.1.1.1 2001/07/24 13:31:45 pwet + * cvs tree of part of disydent + * + * Revision 1.1.1.1 2001/07/19 14:32:25 pwet + * New cvs tree + * + * Revision 1.2 1998/09/16 16:11:32 pwet + * passage a cvs + * + * Revision 1.1 1998/09/01 09:49:14 pwet + * Initial revision + * + * Revision 1.1 1998/07/16 18:04:12 pwet + * Initial revision + * + * Authors: Frédéric Pétrot and Denis Hommais + */ +#include +#include +#include + +#if 0 +#define FONT "-misc-fixed-bold-r-normal--15-140-75-75-c-90-iso8859-1" +#define TTYWIDTH 80 +#define TTYHEIGHT 40 +#define MAXCHAR 16 +#else +#define FONT "fixed" +#define TTYWIDTH 80 +#define TTYHEIGHT 24 +#define MAXCHAR 16 +#endif + +typedef struct { + Display *display; + Window window; + GC gc; + int font_height; + int font_width; + short xcurse; + short ycurse; + char video[TTYHEIGHT][TTYWIDTH]; /* video character memory */ + short rptr; + short wptr; + FILE *file; /* redirection file if required */ + short keybuf[MAXCHAR]; +} xtty; + + Index: /trunk/IPs/systemC/Environment/include/Cache_Access.h =================================================================== --- /trunk/IPs/systemC/Environment/include/Cache_Access.h (revision 81) +++ /trunk/IPs/systemC/Environment/include/Cache_Access.h (revision 81) @@ -0,0 +1,27 @@ +#ifndef ENVIRONMENT_CACHE_ACCESS_H +#define ENVIRONMENT_CACHE_ACCESS_H + +#include "Types.h" + +namespace environment { + + class Cache_Access + { + public : cache::type_req_cache_t type ; + public : cache::direction_req_cache_t direction ; + public : uint32_t nb_bytes ; + + public : Cache_Access (cache::type_req_cache_t type , + cache::direction_req_cache_t direction , + uint32_t nb_bytes ) + { + this->type = type ; + this->direction = direction; + this->nb_bytes = nb_bytes ; + }; + }; + + Cache_Access ireq_type2cache_type (Ticache_type_t ireq_type, bool uncached); + Cache_Access dreq_type2cache_type (Tdcache_type_t dreq_type, bool uncached); +}; +#endif Index: /trunk/IPs/systemC/Environment/include/Environment.h =================================================================== --- /trunk/IPs/systemC/Environment/include/Environment.h (revision 81) +++ /trunk/IPs/systemC/Environment/include/Environment.h (revision 81) @@ -0,0 +1,154 @@ +#ifndef ENVIRONMENT_H +#define ENVIRONMENT_H + +#include "../Cache/include/Cache.h" +#include "../Data/include/Data.h" +#include "../Endianness/include/Endianness.h" +#include "../Queue/include/Sort_Queue.h" +#include "../RamLock/include/RamLock.h" +#include "../Sim2OS/include/Sim2OS.h" +#include "../TTY/include/TTY.h" +#include "../../processor/Morpheo/Common/include/Max.h" + +#include "Types.h" +#include "Environment_Parameters.h" +#include "Respons.h" +#include "Cache_Access.h" + +#include + +namespace environment { + + typedef Respons irsp_t; + typedef Respons drsp_t; + + class Environment : public sc_module + { + // ===== [ Ports ]======================================================= + public : sc_in_clk * CLOCK ; + public : sc_in * NRESET ; + + public : sc_in *** ICACHE_REQ_VAL ; + public : sc_out *** ICACHE_REQ_ACK ; + public : sc_in *** ICACHE_REQ_CONTEXT_ID ; + public : sc_in *** ICACHE_REQ_PACKET_ID ; + public : sc_in *** ICACHE_REQ_ADDRESS ; + public : sc_in *** ICACHE_REQ_TYPE ; + + public : sc_out *** ICACHE_RSP_VAL ; + public : sc_in *** ICACHE_RSP_ACK ; + public : sc_out *** ICACHE_RSP_CONTEXT_ID ; + public : sc_out *** ICACHE_RSP_PACKET_ID ; + public : sc_out **** ICACHE_RSP_INSTRUCTION;//[nb_instruction] + public : sc_out *** ICACHE_RSP_ERROR ; + + public : sc_in *** DCACHE_REQ_VAL ; + public : sc_out *** DCACHE_REQ_ACK ; + public : sc_in *** DCACHE_REQ_CONTEXT_ID ; + public : sc_in *** DCACHE_REQ_PACKET_ID ; + public : sc_in *** DCACHE_REQ_ADDRESS ; + public : sc_in *** DCACHE_REQ_TYPE ; + public : sc_in *** DCACHE_REQ_WDATA ; + + public : sc_out *** DCACHE_RSP_VAL ; + public : sc_in *** DCACHE_RSP_ACK ; + public : sc_out *** DCACHE_RSP_CONTEXT_ID ; + public : sc_out *** DCACHE_RSP_PACKET_ID ; + public : sc_out *** DCACHE_RSP_RDATA ; + public : sc_out *** DCACHE_RSP_ERROR ; + + // ===== [ Internal ]==================================================== + public : Tcontrol_t ** icache_req_ack ; + public : Tcontrol_t ** icache_rsp_val ; + public : Tcontrol_t ** dcache_req_ack ; + public : Tcontrol_t ** dcache_rsp_val ; + + // ===== [ Variables ]=================================================== + private : const sc_module_name name; + private : Parameters * param; + + private: char ** read_iram; + private: char ** read_dram; + private: char * write_dram; + + // ===== [ Components ]================================================== + private : cache ::Cache * component_cache; + private : tty ::TTY ** component_tty; + private : ramlock::RamLock ** component_ramlock; + private : sim2os ::Sim2OS * component_sim2os; + private : data ::Data * component_data; + private : queue ::Sort_Queue ** component_buffer_irsp; + private : queue ::Sort_Queue ** component_buffer_drsp; + + // ===== [ Methods ]===================================================== + + SC_HAS_PROCESS (Environment); + + public : Environment (sc_module_name name, Parameters * param); + public : ~Environment (void); + + public : bool init (std::string section, const char * filename, const char ** list_section); + public : void reset (void); + + public : void transition (void); + public : void genMoore (void); + + public : friend std::ostream& operator<< (std::ostream& output, Environment &x); + + + private : + template + void itoa (T src, char *& dest, uint32_t size) + { + _cout(ENVIRONMENT," : size : %d, ",size); + _cout(ENVIRONMENT,"src : %.8x ",static_cast(src)); + _cout(ENVIRONMENT,"dest : "); + + for (uint32_t i=0; i>= 8; // shift byte + + _cout(ENVIRONMENT,"%.2x",0xff&static_cast(dest [j])); + + } + _cout(ENVIRONMENT,".\n"); + } + + private : + template + void atoi (char * src, T& dest, uint32_t size) + { + dest = 0; + + _cout(ENVIRONMENT," : size : %d, ",size); + _cout(ENVIRONMENT,"src : "); + + for (uint32_t i=0; i(src [j]) & 0xFF); + + _cout(ENVIRONMENT,"%.2x",0xff&static_cast(src [j])); + } + _cout(ENVIRONMENT," dest : %.8x\n",static_cast(dest)); + } + }; + + +// private: bool * context_stop; // to determine which context have send the signal stop (a same thread can send many signal) +// private: uint3 nb_context_stop; // stop the simulation when all context have send the stop signal + +// //--------------------------------------------------------------------------------------------- +// //-----[ stop ]-------------------------------------------------------------------------------- +// //--------------------------------------------------------------------------------------------- +// public : bool stop () +// { +// return (nb_context_stop >= nb_context); +// } + +}; + +#endif Index: /trunk/IPs/systemC/Environment/include/Environment_Parameters.h =================================================================== --- /trunk/IPs/systemC/Environment/include/Environment_Parameters.h (revision 81) +++ /trunk/IPs/systemC/Environment/include/Environment_Parameters.h (revision 81) @@ -0,0 +1,237 @@ +#ifndef ENVIRONMENT_PARAMETERS_H +#define ENVIRONMENT_PARAMETERS_H + +#include "../Cache/include/Cache_Parameters.h" +#include "../Data/include/Data_Parameters.h" +#include "../Queue/include/Parameters.h" +#include "../TTY/include/TTY_Parameters.h" +#include "../RamLock/include/RamLock_Parameters.h" +#include "../Sim2OS/include/Sim2OS_Parameters.h" + +namespace environment { + + class Parameters + { + public : uint32_t nb_iport; + public : uint32_t nb_dport; + public : uint32_t nb_entity; + public : uint32_t * icache_dedicated_nb_port; + public : uint32_t * dcache_dedicated_nb_port; + + public : uint32_t * iaccess_nb_context ; + public : uint32_t * iaccess_nb_packet ; + public : uint32_t * iaccess_size_address ; + public : uint32_t * iaccess_nb_instruction; + public : uint32_t * iaccess_size_instruction; + + public : uint32_t * daccess_nb_context ; + public : uint32_t * daccess_nb_packet ; + public : uint32_t * daccess_size_address ; + public : uint32_t * daccess_size_data ; + + // Parameters cache + public : cache::Parameters * param_cache; + // Parameters tty + public : uint32_t nb_component_tty; + public : uint32_t * tty_address; + public : tty::Parameters ** param_tty; + // Parameters ramlock + public : uint32_t nb_component_ramlock; + public : uint32_t * ramlock_address; + public : ramlock::Parameters ** param_ramlock; + // Parameters sim2OS + public : uint32_t sim2os_address; + public : uint32_t sim2os_size; + public : sim2os::Parameters * param_sim2os; + // Parameters data + public : data::Parameters * param_data; + + // Parameters buffer_respons + public : queue::Parameters ** param_buffer_irsp; + public : queue::Parameters ** param_buffer_drsp; + + public : Parameters (// General + uint32_t nb_cache_dedicated, + + uint32_t * iaccess_nb_context, + uint32_t * iaccess_nb_instruction, + uint32_t * iaccess_nb_packet, + uint32_t * iaccess_size_address, + uint32_t * iaccess_size_instruction, + + uint32_t * daccess_nb_context, + uint32_t * daccess_nb_packet, + uint32_t * daccess_size_address, + uint32_t * daccess_size_data, + + // buffer + uint32_t * buffer_irsp_size, + uint32_t * buffer_drsp_size, + + // Cache + uint32_t * icache_dedicated_nb_level , + uint32_t * icache_dedicated_nb_port , + uint32_t ** icache_dedicated_nb_line , + uint32_t ** icache_dedicated_size_line , + uint32_t ** icache_dedicated_size_word , + uint32_t ** icache_dedicated_associativity, + uint32_t ** icache_dedicated_hit_latence , + uint32_t ** icache_dedicated_miss_penality, + uint32_t * dcache_dedicated_nb_level , + uint32_t * dcache_dedicated_nb_port , + uint32_t ** dcache_dedicated_nb_line , + uint32_t ** dcache_dedicated_size_line , + uint32_t ** dcache_dedicated_size_word , + uint32_t ** dcache_dedicated_associativity, + uint32_t ** dcache_dedicated_hit_latence , + uint32_t ** dcache_dedicated_miss_penality, + uint32_t cache_shared_nb_level , +// uint32_t cache_shared_nb_port , + uint32_t * cache_shared_nb_line , + uint32_t * cache_shared_size_line , + uint32_t * cache_shared_size_word , + uint32_t * cache_shared_associativity , + uint32_t * cache_shared_hit_latence , + uint32_t * cache_shared_miss_penality , + + // TTY + uint32_t nb_component_tty, + uint32_t * tty_address, + uint32_t * nb_tty, + std::string ** name_tty, + bool with_xtty, + + // RAMLOCK + uint32_t nb_component_ramlock, + uint32_t * ramlock_address, + uint32_t * nb_lock, + + // SIM2OS + uint32_t sim2os_address, + uint32_t sim2os_size, + SOCLIB_SEGMENT_TABLE * segment_table + ) + { + this->nb_entity = nb_cache_dedicated; + + this->icache_dedicated_nb_port = icache_dedicated_nb_port; + this->dcache_dedicated_nb_port = dcache_dedicated_nb_port; + + this->iaccess_nb_context = iaccess_nb_context ; + this->iaccess_nb_instruction = iaccess_nb_instruction ; + this->iaccess_nb_packet = iaccess_nb_packet ; + this->iaccess_size_address = iaccess_size_address ; + this->iaccess_size_instruction = iaccess_size_instruction; + this->daccess_nb_context = daccess_nb_context ; + this->daccess_nb_packet = daccess_nb_packet ; + this->daccess_size_address = daccess_size_address ; + this->daccess_size_data = daccess_size_data ; + + param_cache = new cache::Parameters + (nb_cache_dedicated , + icache_dedicated_nb_level , + icache_dedicated_nb_port , + icache_dedicated_nb_line , + icache_dedicated_size_line , + icache_dedicated_size_word , + icache_dedicated_associativity, + icache_dedicated_hit_latence , + icache_dedicated_miss_penality, + dcache_dedicated_nb_level , + dcache_dedicated_nb_port , + dcache_dedicated_nb_line , + dcache_dedicated_size_line , + dcache_dedicated_size_word , + dcache_dedicated_associativity, + dcache_dedicated_hit_latence , + dcache_dedicated_miss_penality, + cache_shared_nb_level , +// cache_shared_nb_port , + cache_shared_nb_line , + cache_shared_size_line , + cache_shared_size_word , + cache_shared_associativity , + cache_shared_hit_latence , + cache_shared_miss_penality + ); + + nb_iport = 0; + nb_dport = 0; + for (uint32_t i=0; inb_component_tty = nb_component_tty; + this->tty_address = tty_address; + + param_tty = new tty::Parameters * [nb_component_tty]; + for (uint32_t i=0; iaddSegment("tty",tty_address[i],tty_size,0,0,true); + + param_tty [i] = new tty::Parameters (nb_tty [i], + name_tty [i], + with_xtty ); + } + + this->nb_component_ramlock = nb_component_ramlock; + this->ramlock_address = ramlock_address; + + param_ramlock = new ramlock::Parameters * [nb_component_ramlock]; + for (uint32_t i=0; iaddSegment("ramlock",ramlock_address[i],ramlock_size,0,0,true); + + param_ramlock [i] = new ramlock::Parameters (nb_lock [i]); + } + + this->sim2os_address = sim2os_address ; + this->sim2os_size = sim2os_size ; + + segment_table->addSegment("sim2os",sim2os_address,sim2os_size,0,0,true); + param_sim2os = new sim2os::Parameters (segment_table); + + param_data = new data::Parameters (16,0,0, segment_table); + + param_buffer_irsp = new queue::Parameters * [nb_entity]; + for (uint32_t i=0; i + class Respons + { + public : T1 trdid ; // number of thread + public : T2 pktid ; // number of packet + public : uint32_t nb_word; + public : uint32_t size_word; + public : char ** data ; + public : T3 error ; + +// public : Respons () +// { +// trdid = 0; +// pktid = 0; +// nb_word = 0; +// size_word = 0; +// data = NULL; +// error = 0; +// }; + + public : Respons (T1 trdid , + T2 pktid , + uint32_t nb_word , + uint32_t size_word, + char ** data , + T3 error + ) + { + this->trdid = trdid; + this->pktid = pktid; + this->nb_word = nb_word; + this->size_word = size_word; + this->data = new char * [nb_word]; + this->error = error; + + for (uint32_t i=0;i < nb_word; i++) + { + this->data[i] = new char [size_word]; + memcpy(this->data[i],data[i],size_word); + } + }; + + public : ~Respons (void) + { + for (uint32_t i=0; i 0 ; j --) + output << std::setw(2) << std::setfill('0') << (0xff & (static_cast(x.data [i][j-1]))); + output << " - "; + } + output << std::dec; + + return output; + } + }; + +}; +#endif Index: /trunk/IPs/systemC/Environment/include/Types.h =================================================================== --- /trunk/IPs/systemC/Environment/include/Types.h (revision 81) +++ /trunk/IPs/systemC/Environment/include/Types.h (revision 81) @@ -0,0 +1,27 @@ +#ifndef ENVIRONMENT_TYPES_H +#define ENVIRONMENT_TYPES_H + +#include "../../processor/Morpheo/Behavioural/include/Types.h" +#include "../../processor/Morpheo/Behavioural/include/Constants.h" +#include "../Cache/include/Types.h" + +namespace environment +{ + + typedef morpheo::behavioural::Tcontrol_t Tcontrol_t ; + + typedef morpheo::behavioural::Tcontext_t Ticache_context_t ; + typedef morpheo::behavioural::Tpacket_t Ticache_packet_t ; + typedef morpheo::behavioural::Ticache_address_t Ticache_address_t ; + typedef morpheo::behavioural::Ticache_type_t Ticache_type_t ; + typedef morpheo::behavioural::Ticache_instruction_t Ticache_instruction_t; + typedef morpheo::behavioural::Ticache_error_t Ticache_error_t ; + + typedef morpheo::behavioural::Tcontext_t Tdcache_context_t ; + typedef morpheo::behavioural::Tpacket_t Tdcache_packet_t ; + typedef morpheo::behavioural::Tdcache_address_t Tdcache_address_t ; + typedef morpheo::behavioural::Tdcache_type_t Tdcache_type_t ; + typedef morpheo::behavioural::Tdcache_data_t Tdcache_data_t ; + typedef morpheo::behavioural::Tdcache_error_t Tdcache_error_t ; +}; +#endif Index: /trunk/IPs/systemC/Environment/selftest/main.cpp =================================================================== --- /trunk/IPs/systemC/Environment/selftest/main.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/selftest/main.cpp (revision 81) @@ -0,0 +1,1265 @@ +#include +#include "../include/Environment.h" + +using namespace std; +using namespace environment; + +#define _TEST_IMEMORY_ true +#define _TEST_DMEMORY_ true +#define _TEST_TTY_ true +#define _TEST_RAMLOCK_ true +#define _TEST_SIM2OS_ true + +#define TEST(x,y) \ + { \ + cout << "Line " << __LINE__ << " : "; \ + if (x==y) \ + { \ + cout << "Test OK" << endl; \ + } \ + else \ + { \ + cout << "Test KO" << endl; \ + exit (EXIT_FAILURE); \ + } \ + } while (0) + +int sc_main (int argc, char * argv[]) +{ + cout << "
Begin" << endl; + + { + uint32_t nb_entity = 2; + + uint32_t * iaccess_nb_context = new uint32_t [nb_entity]; + uint32_t * iaccess_nb_instruction= new uint32_t [nb_entity]; + uint32_t * iaccess_nb_packet = new uint32_t [nb_entity]; + uint32_t * iaccess_size_address = new uint32_t [nb_entity]; + uint32_t * iaccess_size_data = new uint32_t [nb_entity]; + + uint32_t * daccess_nb_context = new uint32_t [nb_entity]; + uint32_t * daccess_nb_packet = new uint32_t [nb_entity]; + uint32_t * daccess_size_address = new uint32_t [nb_entity]; + uint32_t * daccess_size_data = new uint32_t [nb_entity]; + + uint32_t * buffer_irsp_size = new uint32_t [nb_entity]; + uint32_t * buffer_drsp_size = new uint32_t [nb_entity]; + + for (uint32_t i=0; isetMSBNumber (8); + segtable->setDefaultTarget(0,0); + + //shared data segment + const int TEXT_BASE = 0x00000000; + const int DATA_CACHED_BASE = 0x10000000; + const int DATA_UNCACHED_BASE = 0x40000000; + + const int TEXT_SIZE = 0x4000; + const int DATA_CACHED_SIZE = 0x4000; + const int DATA_UNCACHED_SIZE = 0x4000; + + // Add a segment ,name ,address of base ,size ,global index,local index,uncache + segtable->addSegment("text" ,TEXT_BASE ,TEXT_SIZE ,0 ,0 ,false); + segtable->addSegment("data" ,DATA_CACHED_BASE ,DATA_CACHED_SIZE ,0 ,0 ,false); + segtable->addSegment("data_unc",DATA_UNCACHED_BASE,DATA_UNCACHED_SIZE,0 ,0 ,true ); + + + Parameters * param = new Parameters + (nb_entity, + + iaccess_nb_context, + iaccess_nb_instruction, + iaccess_nb_packet, + iaccess_size_address, + iaccess_size_data, + + daccess_nb_context, + daccess_nb_packet, + daccess_size_address, + daccess_size_data, + + buffer_irsp_size, + buffer_drsp_size, + + icache_nb_level , + icache_nb_port , + icache_nb_line , + icache_size_line , + icache_size_word , + icache_associativity, + icache_hit_latence , + icache_miss_penality, + dcache_nb_level , + dcache_nb_port , + dcache_nb_line , + dcache_size_line , + dcache_size_word , + dcache_associativity, + dcache_hit_latence , + dcache_miss_penality, + 1 , +// cache_shared_nb_port , + cache_shared_nb_line , + cache_shared_size_line , + cache_shared_size_word , + cache_shared_associativity , + cache_shared_hit_latence , + cache_shared_miss_penality , + + nb_component_tty, + tty_address, + nb_tty, + name_tty, + false, + + nb_component_ramlock, + ramlock_address, + nb_lock, + + sim2os_address, + sim2os_size, + segtable + ); + + segtable->print(); + + Environment * env = new Environment ("environment",param); + + const char * filename = "Data/selftest/data/soft.x"; + const char * sections_text [] = {".text",NULL}; + const char * sections_data [] = {".data",".rodata",".bss",".sdata",".sbss", NULL}; + + env->init("text" , filename, sections_text); + env->init("data" , filename, sections_data); + +// cout << "
Press to stop the test" << endl; +// getchar(); + + //============================================================================== + //===== [ DECLARATION ]========================================================= + //============================================================================== + + sc_clock * CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * NRESET = new sc_signal ("NRESET"); + + sc_signal *** ICACHE_REQ_VAL = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_REQ_ACK = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_REQ_CONTEXT_ID = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_REQ_PACKET_ID = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_REQ_ADDRESS = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_REQ_TYPE = new sc_signal ** [nb_entity]; + + sc_signal *** ICACHE_RSP_VAL = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_RSP_ACK = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_RSP_CONTEXT_ID = new sc_signal ** [nb_entity]; + sc_signal *** ICACHE_RSP_PACKET_ID = new sc_signal ** [nb_entity]; + sc_signal **** ICACHE_RSP_INSTRUCTION= new sc_signal *** [nb_entity];//[nb_instruction] + sc_signal *** ICACHE_RSP_ERROR = new sc_signal ** [nb_entity]; + + sc_signal *** DCACHE_REQ_VAL = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_REQ_ACK = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_REQ_CONTEXT_ID = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_REQ_PACKET_ID = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_REQ_ADDRESS = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_REQ_TYPE = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_REQ_WDATA = new sc_signal ** [nb_entity]; + + sc_signal *** DCACHE_RSP_VAL = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_RSP_ACK = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_RSP_CONTEXT_ID = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_RSP_PACKET_ID = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_RSP_RDATA = new sc_signal ** [nb_entity]; + sc_signal *** DCACHE_RSP_ERROR = new sc_signal ** [nb_entity]; + + for (uint32_t i=0; i * [icache_nb_port[i]]; + ICACHE_REQ_ACK [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_REQ_CONTEXT_ID [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_REQ_PACKET_ID [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_REQ_ADDRESS [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_REQ_TYPE [i] = new sc_signal * [icache_nb_port[i]]; + + ICACHE_RSP_VAL [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_RSP_ACK [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_RSP_CONTEXT_ID [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_RSP_PACKET_ID [i] = new sc_signal * [icache_nb_port[i]]; + ICACHE_RSP_INSTRUCTION[i] = new sc_signal ** [icache_nb_port[i]];//[nb_instruction] + ICACHE_RSP_ERROR [i] = new sc_signal * [icache_nb_port[i]]; + + for (uint32_t j=0; j (""); + ICACHE_REQ_ACK [i][j] = new sc_signal (""); + ICACHE_REQ_CONTEXT_ID [i][j] = new sc_signal (""); + ICACHE_REQ_PACKET_ID [i][j] = new sc_signal (""); + ICACHE_REQ_ADDRESS [i][j] = new sc_signal (""); + ICACHE_REQ_TYPE [i][j] = new sc_signal (""); + + ICACHE_RSP_VAL [i][j] = new sc_signal (""); + ICACHE_RSP_ACK [i][j] = new sc_signal (""); + ICACHE_RSP_CONTEXT_ID [i][j] = new sc_signal (""); + ICACHE_RSP_PACKET_ID [i][j] = new sc_signal (""); + ICACHE_RSP_ERROR [i][j] = new sc_signal (""); + + ICACHE_RSP_INSTRUCTION [i][j] = new sc_signal * [iaccess_nb_instruction[i]]; + + for (uint32_t k=0; k (""); + + } + + DCACHE_REQ_VAL [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_REQ_ACK [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_REQ_CONTEXT_ID [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_REQ_PACKET_ID [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_REQ_ADDRESS [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_REQ_TYPE [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_REQ_WDATA [i] = new sc_signal * [dcache_nb_port[i]]; + + DCACHE_RSP_VAL [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_RSP_ACK [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_RSP_CONTEXT_ID [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_RSP_PACKET_ID [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_RSP_RDATA [i] = new sc_signal * [dcache_nb_port[i]]; + DCACHE_RSP_ERROR [i] = new sc_signal * [dcache_nb_port[i]]; + + for (uint32_t j=0; j (""); + DCACHE_REQ_ACK [i][j] = new sc_signal (""); + DCACHE_REQ_CONTEXT_ID [i][j] = new sc_signal (""); + DCACHE_REQ_PACKET_ID [i][j] = new sc_signal (""); + DCACHE_REQ_ADDRESS [i][j] = new sc_signal (""); + DCACHE_REQ_TYPE [i][j] = new sc_signal (""); + DCACHE_REQ_WDATA [i][j] = new sc_signal (""); + + DCACHE_RSP_VAL [i][j] = new sc_signal (""); + DCACHE_RSP_ACK [i][j] = new sc_signal (""); + DCACHE_RSP_CONTEXT_ID [i][j] = new sc_signal (""); + DCACHE_RSP_PACKET_ID [i][j] = new sc_signal (""); + DCACHE_RSP_RDATA [i][j] = new sc_signal (""); + DCACHE_RSP_ERROR [i][j] = new sc_signal (""); + } + } + + //============================================================================== + //===== [ INSTANCE ]============================================================ + //============================================================================== + + // instance + (*(env->CLOCK )) (*(CLOCK )); + (*(env->NRESET)) (*(NRESET)); + + for (uint32_t i=0; iICACHE_REQ_VAL [i][j])) (*(ICACHE_REQ_VAL [i][j])); + (*(env->ICACHE_REQ_ACK [i][j])) (*(ICACHE_REQ_ACK [i][j])); + (*(env->ICACHE_REQ_CONTEXT_ID [i][j])) (*(ICACHE_REQ_CONTEXT_ID [i][j])); + (*(env->ICACHE_REQ_PACKET_ID [i][j])) (*(ICACHE_REQ_PACKET_ID [i][j])); + (*(env->ICACHE_REQ_ADDRESS [i][j])) (*(ICACHE_REQ_ADDRESS [i][j])); + (*(env->ICACHE_REQ_TYPE [i][j])) (*(ICACHE_REQ_TYPE [i][j])); + + (*(env->ICACHE_RSP_VAL [i][j])) (*(ICACHE_RSP_VAL [i][j])); + (*(env->ICACHE_RSP_ACK [i][j])) (*(ICACHE_RSP_ACK [i][j])); + (*(env->ICACHE_RSP_CONTEXT_ID [i][j])) (*(ICACHE_RSP_CONTEXT_ID [i][j])); + (*(env->ICACHE_RSP_PACKET_ID [i][j])) (*(ICACHE_RSP_PACKET_ID [i][j])); + (*(env->ICACHE_RSP_ERROR [i][j])) (*(ICACHE_RSP_ERROR [i][j])); + + for (uint32_t k=0; kICACHE_RSP_INSTRUCTION [i][j][k])) (*(ICACHE_RSP_INSTRUCTION [i][j][k])); + + } + + for (uint32_t j=0; jDCACHE_REQ_VAL [i][j])) (*(DCACHE_REQ_VAL [i][j])); + (*(env->DCACHE_REQ_ACK [i][j])) (*(DCACHE_REQ_ACK [i][j])); + (*(env->DCACHE_REQ_CONTEXT_ID [i][j])) (*(DCACHE_REQ_CONTEXT_ID [i][j])); + (*(env->DCACHE_REQ_PACKET_ID [i][j])) (*(DCACHE_REQ_PACKET_ID [i][j])); + (*(env->DCACHE_REQ_ADDRESS [i][j])) (*(DCACHE_REQ_ADDRESS [i][j])); + (*(env->DCACHE_REQ_TYPE [i][j])) (*(DCACHE_REQ_TYPE [i][j])); + (*(env->DCACHE_REQ_WDATA [i][j])) (*(DCACHE_REQ_WDATA [i][j])); + + (*(env->DCACHE_RSP_VAL [i][j])) (*(DCACHE_RSP_VAL [i][j])); + (*(env->DCACHE_RSP_ACK [i][j])) (*(DCACHE_RSP_ACK [i][j])); + (*(env->DCACHE_RSP_CONTEXT_ID [i][j])) (*(DCACHE_RSP_CONTEXT_ID [i][j])); + (*(env->DCACHE_RSP_PACKET_ID [i][j])) (*(DCACHE_RSP_PACKET_ID [i][j])); + (*(env->DCACHE_RSP_RDATA [i][j])) (*(DCACHE_RSP_RDATA [i][j])); + (*(env->DCACHE_RSP_ERROR [i][j])) (*(DCACHE_RSP_ERROR [i][j])); + } + } + + //============================================================================== + //===== [ INIT ]================================================================ + //============================================================================== + + const uint32_t seed = 0; +// const uint32_t seed = static_cast(time(NULL)); + srand(seed); + + sc_start(0); + // reset + NRESET->write(0); + sc_start(5); + NRESET->write(1); + sc_start(1); + +// cout << *env << endl; + + //============================================================================== + //===== [ ICACHE ]============================================================== + //============================================================================== + + if (_TEST_IMEMORY_) + { + cout << "Test : ICACHE" << endl; + // Test no respons + + for (uint32_t i = 0; i < param->nb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + { + TEST(ICACHE_RSP_VAL [i][j]->read(), 0); + ICACHE_RSP_ACK [i][j]->write(0); + } + + for (uint32_t i = 0; i < param->nb_entity; i++) + for (uint32_t j=0; jdcache_dedicated_nb_port [i]; j++) + { + TEST(DCACHE_RSP_VAL [i][j]->read(), 0); + DCACHE_RSP_ACK [i][j]->write(0); + } + + const int32_t percent_transaction_icache_req = 75; + const int32_t percent_transaction_icache_rsp = 75; + + uint32_t packet_req = 0; + uint32_t packet_rsp = 0; + + Ticache_address_t addr_max = 0xf0; + + do + { + Ticache_packet_t packet_req_next = packet_req; + + Ticache_address_t addr = (packet_req_next << 2); + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + { + ICACHE_REQ_VAL [i][j]->write((addr < addr_max) and ((rand()%100)write(0); + ICACHE_REQ_ADDRESS [i][j]->write(addr); + ICACHE_REQ_PACKET_ID [i][j]->write(addr>>2); + ICACHE_REQ_TYPE [i][j]->write(ICACHE_TYPE_LOAD); + + packet_req_next++; + addr += (param->iaccess_nb_instruction[i]<<2); + } + + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + { + ICACHE_RSP_ACK [i][j]->write((rand()%100)nb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + { + cout << "ICACHE_REQ_VALACK (" << ICACHE_REQ_VAL [i][j]->read() << "," << ICACHE_REQ_ACK [i][j]->read() << ")" << endl; + if (ICACHE_REQ_VAL [i][j]->read() and + ICACHE_REQ_ACK [i][j]->read()) + { + cout << "packet_req : " << packet_req << endl; + packet_req ++; + } + } + + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + { + cout << "ICACHE_RSP_VALACK (" << ICACHE_RSP_VAL [i][j]->read() << "," << ICACHE_RSP_ACK [i][j]->read() << ")" << endl; + if (ICACHE_RSP_VAL [i][j]->read() and + ICACHE_RSP_ACK [i][j]->read()) + { + cout << "packet_rsp : " << packet_rsp << endl; + packet_rsp ++; + + TEST(ICACHE_RSP_ERROR [i][j]->read(),ICACHE_ERROR_NONE); + TEST(ICACHE_RSP_CONTEXT_ID[i][j]->read(),0); + + Ticache_packet_t packet = ICACHE_RSP_PACKET_ID [i][j]->read(); + + for (unsigned int k=0; kiaccess_nb_instruction[i]; k++) + { + Ticache_instruction_t inst = ICACHE_RSP_INSTRUCTION[i][j][k]->read(); + cout << "instruction [" << k << "] : " << std::hex << inst << std::dec << endl; + + TEST((inst>>16) , 0x1500); // copdop nop + TEST((inst&0xffff) , ((0xffff ^ (packet+k))+1)); // packet in CA2 + } + + } + } + + } while (((packet_req<<2)< addr_max) or + ((packet_rsp<<2)< addr_max)); + + for (uint32_t i=0; inb_entity; i++) + { + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + ICACHE_REQ_VAL [i][j]->write(0); + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + ICACHE_RSP_ACK [i][j]->write(1); + } + + sc_start(50); + + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + ICACHE_RSP_ACK [i][j]->write(0); + + cout << "Test : icache - bus error" << endl; + + // 1) in not valid segment + ICACHE_REQ_VAL [0][0]->write(1); + ICACHE_REQ_CONTEXT_ID [0][0]->write(0); + ICACHE_REQ_ADDRESS [0][0]->write(0xe0000000); + ICACHE_REQ_PACKET_ID [0][0]->write(21); + ICACHE_REQ_TYPE [0][0]->write(ICACHE_TYPE_LOAD); + ICACHE_RSP_ACK [0][0]->write(1); + do + { + sc_start(1); + } while (ICACHE_REQ_ACK [0][0]->read() == 0); + ICACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(ICACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(ICACHE_RSP_VAL [0][0]->read(), 1); + TEST(ICACHE_RSP_CONTEXT_ID [0][0] ->read(), 0); + TEST(ICACHE_RSP_PACKET_ID [0][0] ->read(), 21); + TEST(ICACHE_RSP_INSTRUCTION [0][0][0]->read(), 0xe0000000); + TEST(ICACHE_RSP_ERROR [0][0] ->read(), ICACHE_ERROR_BUS_ERROR); + sc_start (1); + TEST(ICACHE_RSP_VAL [0][0]->read(), 0); + + sc_start (10); + + // 2) in valid segment but not memory + ICACHE_REQ_VAL [0][0]->write(1); + ICACHE_REQ_CONTEXT_ID [0][0]->write(0); + ICACHE_REQ_ADDRESS [0][0]->write(0xa0000000); + ICACHE_REQ_PACKET_ID [0][0]->write(21); + ICACHE_REQ_TYPE [0][0]->write(ICACHE_TYPE_LOAD); + ICACHE_RSP_ACK [0][0]->write(1); + do + { + sc_start(1); + } while (ICACHE_REQ_ACK [0][0]->read() == 0); + ICACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(ICACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(ICACHE_RSP_VAL [0][0]->read(), 1); + TEST(ICACHE_RSP_CONTEXT_ID [0][0] ->read(), 0); + TEST(ICACHE_RSP_PACKET_ID [0][0] ->read(), 21); + TEST(ICACHE_RSP_INSTRUCTION [0][0][0]->read(), 0xa0000000); + TEST(ICACHE_RSP_ERROR [0][0] ->read(), ICACHE_ERROR_BUS_ERROR); + sc_start (1); + TEST(ICACHE_RSP_VAL [0][0]->read(), 0); + ICACHE_RSP_ACK [0][0]->write(0); + } + + //============================================================================== + //===== [ TTY ]================================================================= + //============================================================================== + if (_TEST_TTY_) + { + cout << "Test : TTY" << endl; + + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + { + DCACHE_REQ_VAL [i][j]->write(1); + DCACHE_REQ_CONTEXT_ID [i][j]->write(0); + DCACHE_REQ_PACKET_ID [i][j]->write(0); + DCACHE_REQ_ADDRESS [i][j]->write(tty_address[0]+(2<<2)); + DCACHE_REQ_TYPE [i][j]->write(DCACHE_TYPE_STORE_32); + DCACHE_REQ_WDATA [i][j]->write(0xdeadbeef); + } + + sc_start(1); + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j++) + DCACHE_REQ_VAL [i][j]->write(0); + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_STORE_8); + DCACHE_REQ_ADDRESS [0][0]->write(tty_address[0]); + + char msg1 [] = "kane is back\n"; + + for (uint32_t i=0; iwrite(msg1[i]); + sc_start(1); + } while (not DCACHE_REQ_ACK [0][0]->read()); + + + DCACHE_REQ_ADDRESS [0][0]->write(tty_address[0]+(2<<4)); + char msg2 [] = "La Technologie au service de la paix\nEt au nom de kane !!!!!!!!!"; + + for (uint32_t i=0; iwrite(msg2[i]); + sc_start(1); + } while (not DCACHE_REQ_ACK [0][0]->read()); + + DCACHE_REQ_VAL [0][0]->write(0); + + cout << "Test : TTY - bus error" << endl; + + // 1) bad access : load + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_ADDRESS [0][0]->write(0xa0000000); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_32); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xa0000000); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_BUS_ERROR); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + // 2) bad register + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_ADDRESS [0][0]->write(0xa000000c); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_STORE_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xa000000c); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_BUS_ERROR); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + + // 3) bad tty number + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_ADDRESS [0][0]->write(0xa0000040); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_STORE_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xa0000040); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_BUS_ERROR); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + } + + //============================================================================== + //===== [ RAMLOCK ]============================================================= + //============================================================================== + if (_TEST_RAMLOCK_) + { + cout << "Test : RAMLOCK" << endl; + + // Test if lock : no + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000003); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0x00000000); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + // Test if lock : yes + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000003); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0x00000001); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + // Test if lock : no + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000004); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0x00000000); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + // Test if lock : yes + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000004); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0x00000001); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000003); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_STORE_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + + sc_start (1); + + // Test if lock : no + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000003); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0x00000000); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + // Test if lock : yes + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000003); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_8); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0x00000001); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + + sc_start (5); + // Bus Error + + // 1) size access + // Test if lock : yes + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xb0000003); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_16); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + sc_start (9); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 1); + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xb0000003); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_BUS_ERROR); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + } + + //============================================================================== + //===== [ MEMORY ]============================================================== + //============================================================================== + if (_TEST_DMEMORY_) + { + cout << "Test : MEMORY" << endl; + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0x10000100); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_STORE_32); + DCACHE_REQ_WDATA [0][0]->write(0xdeadbeef); + DCACHE_RSP_ACK [0][0]->write(0); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0x10000100); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_32); + DCACHE_REQ_WDATA [0][0]->write(0x77777777); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + while (DCACHE_RSP_VAL [0][0]->read() == 0) + sc_start (1); + + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xdeadbeef); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0x10000100); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_16); + DCACHE_REQ_WDATA [0][0]->write(0x77777777); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + while (DCACHE_RSP_VAL [0][0]->read() == 0) + sc_start (1); + + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xdeaddead); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0x10000102); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_16); + DCACHE_REQ_WDATA [0][0]->write(0x77777777); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + while (DCACHE_RSP_VAL [0][0]->read() == 0) + sc_start (1); + + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 0xbeefbeef); + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + } + + //============================================================================== + //===== [ SIM2OS ]============================================================== + //============================================================================== + if (_TEST_SIM2OS_) + { + cout << "Test : SIM2OS" << endl; + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xc0000000); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_STORE_32); + DCACHE_REQ_WDATA [0][0]->write(SERVICE_CLOCK); + DCACHE_RSP_ACK [0][0]->write(0); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + + + DCACHE_REQ_VAL [0][0]->write(1); + DCACHE_REQ_CONTEXT_ID [0][0]->write(0); + DCACHE_REQ_PACKET_ID [0][0]->write(21); + DCACHE_REQ_ADDRESS [0][0]->write(0xc0000004); + DCACHE_REQ_TYPE [0][0]->write(DCACHE_TYPE_LOAD_32); + DCACHE_REQ_WDATA [0][0]->write(0x77777777); + DCACHE_RSP_ACK [0][0]->write(1); + // Wait ack + do + { + sc_start(1); + } while (DCACHE_REQ_ACK [0][0]->read() == 0); + DCACHE_REQ_VAL [0][0]->write(0); + + while (DCACHE_RSP_VAL [0][0]->read() == 0) + sc_start (1); + + TEST(DCACHE_RSP_CONTEXT_ID [0][0]->read(), 0); + TEST(DCACHE_RSP_PACKET_ID [0][0]->read(), 21); + TEST(DCACHE_RSP_RDATA [0][0]->read(), 354); // if all test is activate + TEST(DCACHE_RSP_ERROR [0][0]->read(), DCACHE_ERROR_NONE); + sc_start (1); + TEST(DCACHE_RSP_VAL [0][0]->read(), 0); + DCACHE_RSP_ACK [0][0]->write(0); + + + } + + //============================================================================== + //===== [ END TEST ]============================================================ + //============================================================================== + + cout << "
Press to stop the test" << endl; + getchar(); + + delete CLOCK ; + delete NRESET; + + for (uint32_t i=0; i End" << endl; + + return EXIT_SUCCESS; +} Index: /trunk/IPs/systemC/Environment/src/Cache_Access_dreq_type2cache_type.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Cache_Access_dreq_type2cache_type.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Cache_Access_dreq_type2cache_type.cpp (revision 81) @@ -0,0 +1,32 @@ +#include "../include/Cache_Access.h" + +namespace environment { + + Cache_Access dreq_type2cache_type (morpheo::behavioural::Tdcache_type_t dreq_type, bool uncached) + { + cache::type_req_cache_t type ; + cache::direction_req_cache_t direction; + uint32_t nb_bytes = 0; + switch (dreq_type) + { + case DCACHE_TYPE_LOAD_8 : direction=cache::READ ; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 1; break; + case DCACHE_TYPE_LOAD_16 : direction=cache::READ ; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 2; break; + case DCACHE_TYPE_LOAD_32 : direction=cache::READ ; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 4; break; + case DCACHE_TYPE_LOAD_64 : direction=cache::READ ; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 8; break; + case DCACHE_TYPE_INVALIDATE : direction=cache::NONE ; type=cache::INVALIDATE ; nb_bytes = 1; break; + case DCACHE_TYPE_FLUSH : direction=cache::NONE ; type=cache::FLUSH ; nb_bytes = 1; break; + case DCACHE_TYPE_PREFETCH : direction=cache::NONE ; type=cache::INVALIDATE ; nb_bytes = 1; break; +// case DCACHE_TYPE_STORE_8_ACK: direction=cache::WRITE; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 1; break; + case DCACHE_TYPE_STORE_8 : direction=cache::WRITE; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 1; break; + case DCACHE_TYPE_STORE_16 : direction=cache::WRITE; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 2; break; + case DCACHE_TYPE_STORE_32 : direction=cache::WRITE; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 4; break; + case DCACHE_TYPE_STORE_64 : direction=cache::WRITE; type=((uncached==true)?cache::UNCACHED:cache::CACHED); nb_bytes = 8; break; + case DCACHE_TYPE_LOCK : + case DCACHE_TYPE_SYNCHRONIZATION : + default : {std::cerr << " Unkown type (" << dreq_type << ")" << std::endl; exit(1);} + } + + return Cache_Access (type,direction,nb_bytes); + }; + +}; Index: /trunk/IPs/systemC/Environment/src/Cache_Access_ireq_type2cache_type.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Cache_Access_ireq_type2cache_type.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Cache_Access_ireq_type2cache_type.cpp (revision 81) @@ -0,0 +1,22 @@ +#include "../include/Cache_Access.h" + +namespace environment { + + Cache_Access ireq_type2cache_type (morpheo::behavioural::Ticache_type_t ireq_type, bool uncached) + { + cache::type_req_cache_t type ; + cache::direction_req_cache_t direction; + + switch (ireq_type) + { + case ICACHE_TYPE_LOAD : {direction=cache::READ ; type=cache::CACHED ; break;} + case ICACHE_TYPE_INVALIDATE : {direction=cache::NONE ; type=cache::INVALIDATE; break;} + case ICACHE_TYPE_PREFETCH : {direction=cache::NONE ; type=cache::PREFETCH ; break;} + case ICACHE_TYPE_LOCK : + default : {std::cerr << " Unkown type (" << ireq_type << ")" << std::endl; exit(1);} + } + + return Cache_Access (type,direction, 4); // instruction = 32 bits = 4 bytes + } + +}; Index: /trunk/IPs/systemC/Environment/src/Environment.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Environment.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Environment.cpp (revision 81) @@ -0,0 +1,363 @@ +#include "../include/Environment.h" + +namespace environment { + + Environment::Environment (sc_module_name name, Parameters * param) : + name (name) + { + this->param = param; + + component_cache = new cache::Cache ("cache", param->param_cache); + + component_tty = new tty::TTY * [param->nb_component_tty]; + for (uint32_t i=0; inb_component_tty; i++) + component_tty [i] = new tty::TTY ("tty_"+i ,param->param_tty [i]); + + component_ramlock = new ramlock::RamLock * [param->nb_component_ramlock]; + for (uint32_t i=0; inb_component_ramlock; i++) + component_ramlock [i] = new ramlock::RamLock ("ramlock_"+i,param->param_ramlock [i]); + + component_sim2os = new sim2os::Sim2OS ("sim2os" ,param->param_sim2os ); + component_data = new data::Data ("data" ,param->param_data ); + + component_buffer_irsp = new queue::Sort_Queue * [param->nb_entity]; + component_buffer_drsp = new queue::Sort_Queue * [param->nb_entity]; + + for (uint32_t i=0; inb_component_tty; i++) + { + uint32_t tty_size = param->param_tty[i]->nb_tty * 16; + + data::Entity entity = component_data->entity(param->tty_address[i], tty_size); + if (entity.present == false) + { + std::cerr << " The tty [" << i << "] have not a segment in the segment table" << std::endl; + exit (1); + } + entity.segment->define_target(data::TYPE_TARGET_TTY,i); + } + + for (uint32_t i=0; inb_component_ramlock; i++) + { + uint32_t ramlock_size = param->param_ramlock[i]->_size; + data::Entity entity = component_data->entity(param->ramlock_address[i], ramlock_size); + if (entity.present == false) + { + std::cerr << " The ramlock [" << i << "] have not a segment in the segment table" << std::endl; + exit (1); + } + entity.segment->define_target(data::TYPE_TARGET_RAMLOCK,i); + } + + { + data::Entity entity = component_data->entity(param->sim2os_address, param->sim2os_size); + if (entity.present == false) + { + std::cerr << " The sim2os have not a segment in the segment table" << std::endl; + exit (1); + } + entity.segment->define_target(data::TYPE_TARGET_SIM2OS,0); + } + + + + + for (uint32_t i=0; inb_entity; i++) + { + component_buffer_irsp [i] = new queue::Sort_Queue ("buffer_irsp_"+i,param->param_buffer_irsp [i]); + component_buffer_drsp [i] = new queue::Sort_Queue ("buffer_drsp_"+i,param->param_buffer_drsp [i]); + } + + uint32_t max_nb_instruction = morpheo::max(param->iaccess_nb_instruction ,param->nb_entity); + uint32_t max_instruction_size = morpheo::max(param->iaccess_size_instruction,param->nb_entity); + uint32_t max_data_size = morpheo::max(param->daccess_size_data ,param->nb_entity); + + read_iram = new char * [max_nb_instruction]; + for (uint32_t i=0; i ("NRESET"); + + ICACHE_REQ_VAL = new sc_in ** [param->nb_entity]; + ICACHE_REQ_ACK = new sc_out ** [param->nb_entity]; + ICACHE_REQ_CONTEXT_ID = new sc_in ** [param->nb_entity]; + ICACHE_REQ_PACKET_ID = new sc_in ** [param->nb_entity]; + ICACHE_REQ_ADDRESS = new sc_in ** [param->nb_entity]; + ICACHE_REQ_TYPE = new sc_in ** [param->nb_entity]; + + ICACHE_RSP_VAL = new sc_out ** [param->nb_entity]; + ICACHE_RSP_ACK = new sc_in ** [param->nb_entity]; + ICACHE_RSP_CONTEXT_ID = new sc_out ** [param->nb_entity]; + ICACHE_RSP_PACKET_ID = new sc_out ** [param->nb_entity]; + + ICACHE_RSP_INSTRUCTION= new sc_out *** [param->nb_entity];//[nb_instruction] + ICACHE_RSP_ERROR = new sc_out ** [param->nb_entity]; + + DCACHE_REQ_VAL = new sc_in ** [param->nb_entity]; + DCACHE_REQ_ACK = new sc_out ** [param->nb_entity]; + DCACHE_REQ_CONTEXT_ID = new sc_in ** [param->nb_entity]; + DCACHE_REQ_PACKET_ID = new sc_in ** [param->nb_entity]; + DCACHE_REQ_ADDRESS = new sc_in ** [param->nb_entity]; + DCACHE_REQ_TYPE = new sc_in ** [param->nb_entity]; + DCACHE_REQ_WDATA = new sc_in ** [param->nb_entity]; + + DCACHE_RSP_VAL = new sc_out ** [param->nb_entity]; + DCACHE_RSP_ACK = new sc_in ** [param->nb_entity]; + DCACHE_RSP_CONTEXT_ID = new sc_out ** [param->nb_entity]; + DCACHE_RSP_PACKET_ID = new sc_out ** [param->nb_entity]; + DCACHE_RSP_RDATA = new sc_out ** [param->nb_entity]; + DCACHE_RSP_ERROR = new sc_out ** [param->nb_entity]; + + for (uint32_t i=0; inb_entity; i++) + { + ICACHE_REQ_VAL [i] = new sc_in * [param->icache_dedicated_nb_port[i]]; + ICACHE_REQ_ACK [i] = new sc_out * [param->icache_dedicated_nb_port[i]]; + ICACHE_REQ_CONTEXT_ID [i] = new sc_in * [param->icache_dedicated_nb_port[i]]; + ICACHE_REQ_PACKET_ID [i] = new sc_in * [param->icache_dedicated_nb_port[i]]; + ICACHE_REQ_ADDRESS [i] = new sc_in * [param->icache_dedicated_nb_port[i]]; + ICACHE_REQ_TYPE [i] = new sc_in * [param->icache_dedicated_nb_port[i]]; + + ICACHE_RSP_VAL [i] = new sc_out * [param->icache_dedicated_nb_port[i]]; + ICACHE_RSP_ACK [i] = new sc_in * [param->icache_dedicated_nb_port[i]]; + ICACHE_RSP_CONTEXT_ID [i] = new sc_out * [param->icache_dedicated_nb_port[i]]; + ICACHE_RSP_PACKET_ID [i] = new sc_out * [param->icache_dedicated_nb_port[i]]; + ICACHE_RSP_INSTRUCTION[i] = new sc_out ** [param->icache_dedicated_nb_port[i]];//[nb_instruction] + ICACHE_RSP_ERROR [i] = new sc_out * [param->icache_dedicated_nb_port[i]]; + + for (uint32_t j=0; jicache_dedicated_nb_port[i]; j++) + { + ICACHE_REQ_VAL [i][j] = new sc_in (""); + ICACHE_REQ_ACK [i][j] = new sc_out (""); + ICACHE_REQ_CONTEXT_ID [i][j] = new sc_in (""); + ICACHE_REQ_PACKET_ID [i][j] = new sc_in (""); + ICACHE_REQ_ADDRESS [i][j] = new sc_in (""); + ICACHE_REQ_TYPE [i][j] = new sc_in (""); + + ICACHE_RSP_VAL [i][j] = new sc_out (""); + ICACHE_RSP_ACK [i][j] = new sc_in (""); + ICACHE_RSP_CONTEXT_ID [i][j] = new sc_out (""); + ICACHE_RSP_PACKET_ID [i][j] = new sc_out (""); + ICACHE_RSP_ERROR [i][j] = new sc_out (""); + + ICACHE_RSP_INSTRUCTION [i][j] = new sc_out * [param->iaccess_nb_instruction[i]]; + + for (uint32_t k=0; kiaccess_nb_instruction[i]; k++) + ICACHE_RSP_INSTRUCTION [i][j][k] = new sc_out (""); + } + + DCACHE_REQ_VAL [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + DCACHE_REQ_ACK [i] = new sc_out * [param->dcache_dedicated_nb_port[i]]; + DCACHE_REQ_CONTEXT_ID [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + DCACHE_REQ_PACKET_ID [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + DCACHE_REQ_ADDRESS [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + DCACHE_REQ_TYPE [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + DCACHE_REQ_WDATA [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + + DCACHE_RSP_VAL [i] = new sc_out * [param->dcache_dedicated_nb_port[i]]; + DCACHE_RSP_ACK [i] = new sc_in * [param->dcache_dedicated_nb_port[i]]; + DCACHE_RSP_CONTEXT_ID [i] = new sc_out * [param->dcache_dedicated_nb_port[i]]; + DCACHE_RSP_PACKET_ID [i] = new sc_out * [param->dcache_dedicated_nb_port[i]]; + DCACHE_RSP_RDATA [i] = new sc_out * [param->dcache_dedicated_nb_port[i]]; + DCACHE_RSP_ERROR [i] = new sc_out * [param->dcache_dedicated_nb_port[i]]; + + for (uint32_t j=0; jdcache_dedicated_nb_port[i]; j++) + { + DCACHE_REQ_VAL [i][j] = new sc_in (""); + DCACHE_REQ_ACK [i][j] = new sc_out (""); + DCACHE_REQ_CONTEXT_ID [i][j] = new sc_in (""); + DCACHE_REQ_PACKET_ID [i][j] = new sc_in (""); + DCACHE_REQ_ADDRESS [i][j] = new sc_in (""); + DCACHE_REQ_TYPE [i][j] = new sc_in (""); + DCACHE_REQ_WDATA [i][j] = new sc_in (""); + + DCACHE_RSP_VAL [i][j] = new sc_out (""); + DCACHE_RSP_ACK [i][j] = new sc_in (""); + DCACHE_RSP_CONTEXT_ID [i][j] = new sc_out (""); + DCACHE_RSP_PACKET_ID [i][j] = new sc_out (""); + DCACHE_RSP_RDATA [i][j] = new sc_out (""); + DCACHE_RSP_ERROR [i][j] = new sc_out (""); + } + } + + icache_req_ack = new Tcontrol_t * [param->nb_entity]; + icache_rsp_val = new Tcontrol_t * [param->nb_entity]; + dcache_req_ack = new Tcontrol_t * [param->nb_entity]; + dcache_rsp_val = new Tcontrol_t * [param->nb_entity]; + + for (uint32_t i=0; inb_entity; i++) + { + icache_req_ack [i] = new Tcontrol_t [param->icache_dedicated_nb_port[i]]; + icache_rsp_val [i] = new Tcontrol_t [param->icache_dedicated_nb_port[i]]; + dcache_req_ack [i] = new Tcontrol_t [param->dcache_dedicated_nb_port[i]]; + dcache_rsp_val [i] = new Tcontrol_t [param->dcache_dedicated_nb_port[i]]; + } + // *****[ Definition of method ]***** + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(CLOCK)).pos(); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(CLOCK)).neg(); + } + + Environment::~Environment (void) + { + for (uint32_t i=0; inb_entity; i++) + { + delete [] icache_req_ack [i]; + delete [] icache_rsp_val [i]; + delete [] dcache_req_ack [i]; + delete [] dcache_rsp_val [i]; + } + + delete [] icache_req_ack; + delete [] icache_rsp_val; + delete [] dcache_req_ack; + delete [] dcache_rsp_val; + + delete CLOCK ; + delete NRESET; + + for (uint32_t i=0; inb_entity; i++) + { + for (uint32_t j=0; jicache_dedicated_nb_port[i]; j++) + { + delete ICACHE_REQ_VAL [i][j]; + delete ICACHE_REQ_ACK [i][j]; + delete ICACHE_REQ_CONTEXT_ID [i][j]; + delete ICACHE_REQ_PACKET_ID [i][j]; + delete ICACHE_REQ_ADDRESS [i][j]; + delete ICACHE_REQ_TYPE [i][j]; + delete ICACHE_RSP_VAL [i][j]; + delete ICACHE_RSP_ACK [i][j]; + delete ICACHE_RSP_CONTEXT_ID [i][j]; + delete ICACHE_RSP_PACKET_ID [i][j]; + delete ICACHE_RSP_ERROR [i][j]; + + for (uint32_t k=0; kiaccess_nb_instruction[i]; k++) + delete ICACHE_RSP_INSTRUCTION [i][j][k]; + + delete [] ICACHE_RSP_INSTRUCTION [i][j]; + } + delete [] ICACHE_REQ_VAL [i]; + delete [] ICACHE_REQ_ACK [i]; + delete [] ICACHE_REQ_CONTEXT_ID [i]; + delete [] ICACHE_REQ_PACKET_ID [i]; + delete [] ICACHE_REQ_ADDRESS [i]; + delete [] ICACHE_REQ_TYPE [i]; + delete [] ICACHE_RSP_VAL [i]; + delete [] ICACHE_RSP_ACK [i]; + delete [] ICACHE_RSP_CONTEXT_ID [i]; + delete [] ICACHE_RSP_PACKET_ID [i]; + delete [] ICACHE_RSP_ERROR [i]; + delete [] ICACHE_RSP_INSTRUCTION [i]; + } + + delete [] ICACHE_REQ_VAL ; + delete [] ICACHE_REQ_ACK ; + delete [] ICACHE_REQ_CONTEXT_ID ; + delete [] ICACHE_REQ_PACKET_ID ; + delete [] ICACHE_REQ_ADDRESS ; + delete [] ICACHE_REQ_TYPE ; + delete [] ICACHE_RSP_VAL ; + delete [] ICACHE_RSP_ACK ; + delete [] ICACHE_RSP_CONTEXT_ID ; + delete [] ICACHE_RSP_PACKET_ID ; + delete [] ICACHE_RSP_INSTRUCTION; + delete [] ICACHE_RSP_ERROR ; + + for (uint32_t i=0; inb_entity; i++) + { + for (uint32_t j=0; jicache_dedicated_nb_port[i]; j++) + { + delete DCACHE_REQ_VAL [i][j]; + delete DCACHE_REQ_ACK [i][j]; + delete DCACHE_REQ_CONTEXT_ID [i][j]; + delete DCACHE_REQ_PACKET_ID [i][j]; + delete DCACHE_REQ_ADDRESS [i][j]; + delete DCACHE_REQ_TYPE [i][j]; + delete DCACHE_REQ_WDATA [i][j]; + delete DCACHE_RSP_VAL [i][j]; + delete DCACHE_RSP_ACK [i][j]; + delete DCACHE_RSP_CONTEXT_ID [i][j]; + delete DCACHE_RSP_PACKET_ID [i][j]; + delete DCACHE_RSP_RDATA [i][j]; + delete DCACHE_RSP_ERROR [i][j]; + } + + delete [] DCACHE_REQ_VAL [i]; + delete [] DCACHE_REQ_ACK [i]; + delete [] DCACHE_REQ_CONTEXT_ID [i]; + delete [] DCACHE_REQ_PACKET_ID [i]; + delete [] DCACHE_REQ_ADDRESS [i]; + delete [] DCACHE_REQ_TYPE [i]; + delete [] DCACHE_REQ_WDATA [i]; + delete [] DCACHE_RSP_VAL [i]; + delete [] DCACHE_RSP_ACK [i]; + delete [] DCACHE_RSP_CONTEXT_ID [i]; + delete [] DCACHE_RSP_PACKET_ID [i]; + delete [] DCACHE_RSP_RDATA [i]; + delete [] DCACHE_RSP_ERROR [i]; + } + + delete [] DCACHE_REQ_VAL ; + delete [] DCACHE_REQ_ACK ; + delete [] DCACHE_REQ_CONTEXT_ID ; + delete [] DCACHE_REQ_PACKET_ID ; + delete [] DCACHE_REQ_ADDRESS ; + delete [] DCACHE_REQ_TYPE ; + delete [] DCACHE_REQ_WDATA ; + delete [] DCACHE_RSP_VAL ; + delete [] DCACHE_RSP_ACK ; + delete [] DCACHE_RSP_CONTEXT_ID ; + delete [] DCACHE_RSP_PACKET_ID ; + delete [] DCACHE_RSP_RDATA ; + delete [] DCACHE_RSP_ERROR ; + + delete [] write_dram; + delete [] read_dram [0]; + delete [] read_dram; + + uint32_t max_nb_instruction = morpheo::max(param->iaccess_nb_instruction,param->nb_entity); + for (uint32_t i=0; inb_entity; i++) + { + while (not component_buffer_irsp [i]->empty()) + { + delete component_buffer_irsp [i]->read(0)._data; + component_buffer_irsp [i]->pop(); + } + while (not component_buffer_drsp [i]->empty()) + { + delete component_buffer_drsp [i]->read(0)._data; + component_buffer_drsp [i]->pop(); + } + + delete component_buffer_irsp [i]; + delete component_buffer_drsp [i]; + } + delete [] component_buffer_irsp; + delete [] component_buffer_drsp; + + delete component_data; + delete component_sim2os; + for (uint32_t i=0; inb_component_ramlock; i++) + delete component_ramlock [i]; + delete [] component_ramlock; + for (uint32_t i=0; inb_component_tty; i++) + delete component_tty [i]; + delete [] component_tty; + delete component_cache; + + } + +}; Index: /trunk/IPs/systemC/Environment/src/Environment_genMoore.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Environment_genMoore.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Environment_genMoore.cpp (revision 81) @@ -0,0 +1,119 @@ +#include "../include/Environment.h" + +namespace environment { + + void Environment::genMoore (void) + { + //Scan all entity and for each entity scan all port + for (uint32_t i = 0; i < param->nb_entity; i++) + { + //============================================================================= + //===== [ ICACHE ]============================================================= + //============================================================================= + + //----------------------------------------------------------------------------- + //----- [ Request ]------------------------------------------------------------ + //----------------------------------------------------------------------------- + { + uint32_t nb_slot_free = component_buffer_irsp [i]->nb_slot_free (); + for (uint32_t j=0; jicache_dedicated_nb_port [i]; j ++) + { + icache_req_ack [i][j] = (j < nb_slot_free); + ICACHE_REQ_ACK [i][j]->write (icache_req_ack [i][j]); + } + } + + //----------------------------------------------------------------------------- + //----- [ Respons ]------------------------------------------------------------ + //----------------------------------------------------------------------------- + { + for (uint32_t j = 0; j < param->icache_dedicated_nb_port [i]; j ++) + { + // Test the number of element in the respons's buffer + if (j >= component_buffer_irsp [i]->nb_slot_use()) + { + icache_rsp_val [i][j] = 0; // No respons + } + else + { + queue::slot_t slot = component_buffer_irsp [i]->read(j); + + bool val = (slot._delay == 0); + + icache_rsp_val [i][j] = (val); // respons if have a result + + if (val) + { + ICACHE_RSP_CONTEXT_ID [i][j]->write(slot._data->trdid); // TODO : test if exist + ICACHE_RSP_PACKET_ID [i][j]->write(slot._data->pktid); // TODO : test if exist + ICACHE_RSP_ERROR [i][j]->write(slot._data->error); + + for (uint32_t k = 0; k < param->iaccess_nb_instruction[i]; k ++) + { + Ticache_instruction_t data = 0; + + atoi (slot._data->data[k], data, param->iaccess_size_instruction[i]/8); + + ICACHE_RSP_INSTRUCTION [i][j][k]->write(data); + } + } + } + + ICACHE_RSP_VAL [i][j]->write (icache_rsp_val [i][j]); + } + } + + //============================================================================= + //===== [ DCACHE ]============================================================= + //============================================================================= + + //----------------------------------------------------------------------------- + //----- [ Request ]------------------------------------------------------------ + //----------------------------------------------------------------------------- + { + uint32_t nb_slot_free = component_buffer_drsp [i]->nb_slot_free (); + for (uint32_t j = 0; j < param->dcache_dedicated_nb_port [i]; j ++) + { + dcache_req_ack [i][j] = (j < nb_slot_free); + DCACHE_REQ_ACK [i][j]->write (dcache_req_ack [i][j]); + } + } + + //----------------------------------------------------------------------------- + //----- [ Respons ]------------------------------------------------------------ + //----------------------------------------------------------------------------- + { + for (uint32_t j = 0; j < param->dcache_dedicated_nb_port [i]; j ++) + { + // Test the number of element in the respons's buffer + if (j >= component_buffer_drsp [i]->nb_slot_use()) + { + dcache_rsp_val [i][j] = 0; // No respons + } + else + { + queue::slot_t slot = component_buffer_drsp [i]->read(j); + + bool val = (slot._delay == 0); // respons if have a result + + dcache_rsp_val [i][j] = (val); // respons if have a result + + if (val) + { + DCACHE_RSP_CONTEXT_ID [i][j]->write(slot._data->trdid); // TODO : test if exist + DCACHE_RSP_PACKET_ID [i][j]->write(slot._data->pktid); // TODO : test if exist + DCACHE_RSP_ERROR [i][j]->write(slot._data->error); + + Tdcache_data_t data = 0; + atoi (slot._data->data[0], data, param->daccess_size_data[i]/8); + + DCACHE_RSP_RDATA [i][j]->write(data); + } + } + DCACHE_RSP_VAL [i][j]->write (dcache_rsp_val [i][j]); + } + } + } + } + +}; Index: /trunk/IPs/systemC/Environment/src/Environment_init.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Environment_init.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Environment_init.cpp (revision 81) @@ -0,0 +1,10 @@ +#include "../include/Environment.h" + +namespace environment { + + bool Environment::init (std::string section, const char * filename, const char ** list_section) + { + return component_data->init(section, filename, list_section); + } + +}; Index: /trunk/IPs/systemC/Environment/src/Environment_print.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Environment_print.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Environment_print.cpp (revision 81) @@ -0,0 +1,56 @@ +#include "../include/Environment.h" + +namespace environment { + + std::ostream& operator<< (std::ostream& output, Environment &x) + { + output << "<" << x.name << ">" << std::endl + << " * nb_iport : " << x.param->nb_iport << std::endl + << " * nb_dport : " << x.param->nb_dport << std::endl + ; + + for (uint32_t i=0; inb_entity; i++) + output << " * iaccess_nb_context ["<iaccess_nb_context [i] << std::endl + << " * iaccess_nb_instruction ["<iaccess_nb_instruction [i] << std::endl + << " * iaccess_nb_packet ["<iaccess_nb_packet [i] << std::endl + << " * iaccess_size_address ["<iaccess_size_address [i] << std::endl + << " * iaccess_size_instruction ["<iaccess_size_instruction [i] << std::endl + ; + + for (uint32_t i=0; inb_entity; i++) + output << " * daccess_nb_context ["<daccess_nb_context [i] << std::endl + << " * daccess_nb_packet ["<daccess_nb_packet [i] << std::endl + << " * daccess_size_address ["<daccess_size_address [i] << std::endl + << " * daccess_size_data ["<daccess_size_data [i] << std::endl + ; + + output << " -----[ component_data ]-----------------------------------" << std::endl; + output << *x.component_data << std::endl; + + output << " -----[ component_cache ]----------------------------------" << std::endl; + output << *x.component_cache; + + output << " -----[ component_buffer_irsp ]----------------------------" << std::endl; + for (uint32_t i = 0; i < x.param->nb_entity; i++) + output << *x.component_buffer_irsp [i]; + + output << " -----[ component_buffer_drsp ]----------------------------" << std::endl; + for (uint32_t i = 0; i < x.param->nb_entity; i++) + output << *x.component_buffer_drsp [i]; + + output << " -----[ component_ramlock ]--------------------------------" << std::endl; + output << " * nb_component_ramlock : " << x.param->nb_component_ramlock << std::endl; + for (uint32_t it = 0; it < x.param->nb_component_ramlock; it++) + output << *x.component_ramlock [it]; + + output << " -----[ component_tty ]------------------------------------" << std::endl; + output << " * nb_component_tty : " << x.param->nb_component_tty << std::endl; + for (uint32_t it = 0; it < x.param->nb_component_tty ; it++) + output << *x.component_tty [it]; + + output << *x.component_sim2os; + + return output; + + } +}; Index: /trunk/IPs/systemC/Environment/src/Environment_reset.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Environment_reset.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Environment_reset.cpp (revision 81) @@ -0,0 +1,21 @@ +#include "../include/Environment.h" + +namespace environment { + + void Environment::reset(void) + { + component_cache -> reset(); + for (uint32_t i = 0; i < param->nb_component_tty ; i++) + component_tty [i] ->reset(); + for (uint32_t i = 0; i < param->nb_component_ramlock; i++) + component_ramlock [i] ->reset(); + component_sim2os -> reset(); + component_data -> reset(); + for (uint32_t i = 0; i < param->nb_entity; i++) + { + component_buffer_irsp [i] ->reset(); + component_buffer_drsp [i] ->reset(); + } + } + +}; Index: /trunk/IPs/systemC/Environment/src/Environment_transition.cpp =================================================================== --- /trunk/IPs/systemC/Environment/src/Environment_transition.cpp (revision 81) +++ /trunk/IPs/systemC/Environment/src/Environment_transition.cpp (revision 81) @@ -0,0 +1,804 @@ +#include "../include/Environment.h" + +namespace environment { + + void Environment::transition (void) + { + if (NRESET->read() == 0) + { + reset (); + } + else + { + //============================================================================= + //===== [ ICACHE - RESPONS ]=================================================== + //============================================================================= + for (uint32_t i = 0; i < param->nb_entity; i++) + for (int32_t j=param->icache_dedicated_nb_port [i]-1; j>=0; j--) + if (icache_rsp_val [i][j] and ICACHE_RSP_ACK [i][j]->read()) + { + delete component_buffer_irsp [i]->read(j)._data; + component_buffer_irsp [i]->pop(j); + } + //============================================================================= + //===== [ DCACHE - RESPONS ]=================================================== + //============================================================================= + for (uint32_t i = 0; i < param->nb_entity; i++) + for (int32_t j=param->dcache_dedicated_nb_port [i]-1; j>=0; j--) + if (dcache_rsp_val [i][j] and DCACHE_RSP_ACK [i][j]->read()) + { + delete component_buffer_drsp [i]->read(j)._data; + component_buffer_drsp [i]->pop(j); + } + + //============================================================================= + //===== [ ICACHE - RESPONS ]=================================================== + //============================================================================= + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; j icache_dedicated_nb_port [i]; j++) + if (ICACHE_REQ_VAL [i][j]->read() and icache_req_ack [i][j]) + { + _cout(ENVIRONMENT, "ICACHE_REQ [%d] : Transaction accepted\n",i); + + Ticache_context_t context = ICACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence + Ticache_packet_t packet = ICACHE_REQ_PACKET_ID [i][j]->read();// TODO : test presence + Ticache_address_t address = ICACHE_REQ_ADDRESS [i][j]->read(); + Ticache_type_t type = ICACHE_REQ_TYPE [i][j]->read(); + uint32_t size = param->iaccess_size_address [i]/8; + + _cout(ENVIRONMENT," * information\n"); + _cout(ENVIRONMENT," * context : %d\n" ,static_cast(context)); + _cout(ENVIRONMENT," * packet : %d\n" ,static_cast(packet )); + _cout(ENVIRONMENT," * address : %.x\n",static_cast(address)); + _cout(ENVIRONMENT," * type : %d\n" ,static_cast(type )); + _cout(ENVIRONMENT," * size : %d\n" ,static_cast(size )); + + // search the entity + data::Entity entity = component_data->entity(static_cast(address),size); + + bool uncached ; + bool bus_error; + bool must_read = (type == ICACHE_TYPE_LOAD); + bool must_ack = (type == ICACHE_TYPE_LOAD); + bool must_ack_on_error = (type == ICACHE_TYPE_LOAD); + + // Test the type of the address : if != MEMORY -> error + if ((entity.present == true) and + (entity.segment->getType() == data::TYPE_TARGET_MEMORY)) + { + _cout(ENVIRONMENT, " * OK !\n"); + bus_error = false; + uncached = entity.segment->getUncached(); + + if (must_read == true) // Test if must read the ram + { + _cout(ENVIRONMENT, " * must read\n"); + // Read all instruction + for (unsigned int k=0; kiaccess_nb_instruction[i]; k++) + { + uint32_t addr = address+k*(size); + _cout(ENVIRONMENT, " * addr : %.8x\n",addr); + + bus_error |= !component_data->read(addr,size,read_iram[k]); + + // Swap if endienness is different + if (endianness::isSameEndianness(context) == false) + read_iram[k] = endianness::swapBytes(read_iram[k],size,size); + } + } + } + else + { + _cout(ENVIRONMENT, " * KO !\n"); + _cout(ENVIRONMENT, " * present : %d\n",entity.present); + if (entity.present) + _cout(ENVIRONMENT, " * type : %d must be data::TYPE_TARGET_MEMORY (%d)\n",entity.segment->getType(), data::TYPE_TARGET_MEMORY); + + // entity is not present, or is present but is not a memory : have a bus error + bus_error = true; + uncached = true; + } + + Cache_Access cache_type = ireq_type2cache_type (type,uncached); + uint32_t latence = component_cache->latence(cache::INSTRUCTION_CACHE, + i, + j, + address, + context, + cache_type.type, + cache_type.direction); + + _cout(ENVIRONMENT, " * latence : %d\n",latence); + + // If is a respons -> compute the latence and push in the write_buffer + if (must_ack or (must_ack_on_error and bus_error)) + { + _cout(ENVIRONMENT, " * must ack\n"); + + if (bus_error == true) + { + std::cout << "Icache : have a bus error" << std::endl + << " * entity : " << i << std::endl + << " * port : " << j << std::endl + << std::hex + << " * req_addr : " << address << std::endl + << std::dec + << " * req_trdid : " << context << std::endl + << " * req_pktid : " << packet << std::endl; + + // Write in instruction [0] the bad address (only 32bit ....) + itoa(address,read_iram[0],param->iaccess_size_instruction[i]/8); + } + + // Simplification : the size of a line is a multiple of size_iword (no test) + _cout(ENVIRONMENT, " * push in buffer_irsp[%d]\n",i); + + irsp_t * rsp = new irsp_t(context, + packet, + param->iaccess_nb_instruction[i], + size, + read_iram, + (bus_error==true)?ICACHE_ERROR_BUS_ERROR:ICACHE_ERROR_NONE); + component_buffer_irsp [i]->push(latence,rsp); + } + + _cout(ENVIRONMENT, " * End request\n"); + } + + //============================================================================= + //===== [ DCACHE - REQUEST ]=================================================== + //============================================================================= + for (uint32_t i=0; inb_entity; i++) + for (uint32_t j=0; j dcache_dedicated_nb_port [i]; j++) + if (DCACHE_REQ_VAL [i][j]->read() and dcache_req_ack [i][j]) + { + _cout(ENVIRONMENT, "DCACHE_REQ [%d] : Transaction accepted\n",i); + + Tdcache_context_t context = DCACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence + Tdcache_packet_t packet = DCACHE_REQ_PACKET_ID [i][j]->read();// TODO : test presence + Tdcache_address_t address = DCACHE_REQ_ADDRESS [i][j]->read(); + Tdcache_data_t wdata = DCACHE_REQ_WDATA [i][j]->read(); + Tdcache_type_t type = DCACHE_REQ_TYPE [i][j]->read(); + uint32_t size = param->daccess_size_data [i]/8; + +// _cout(ENVIRONMENT," * information\n"); +// _cout(ENVIRONMENT," * context : %d\n" ,static_cast(context)); +// _cout(ENVIRONMENT," * packet : %d\n" ,static_cast(packet )); +// _cout(ENVIRONMENT," * address : %.x\n",static_cast(address)); +// _cout(ENVIRONMENT," * type : %d\n" ,static_cast(type )); +// _cout(ENVIRONMENT," * size : %d\n" ,static_cast(size )); + + // search the entity + data::Entity entity = component_data->entity(static_cast(address),size); + + std::cout << entity << std::endl; + + bool uncached = false; + bool bus_error = false; + + uint32_t nb_bytes = size; + bool must_read ; + bool must_write; + bool must_ack ; + bool must_ack_on_error; + + switch (type) + { + case DCACHE_TYPE_LOAD_8 :{nb_bytes=1; must_read=true ; must_write=false; must_ack=true ; must_ack_on_error=true ; break;} + case DCACHE_TYPE_LOAD_16 :{nb_bytes=2; must_read=true ; must_write=false; must_ack=true ; must_ack_on_error=true ; break;} + case DCACHE_TYPE_LOAD_32 :{nb_bytes=4; must_read=true ; must_write=false; must_ack=true ; must_ack_on_error=true ; break;} + case DCACHE_TYPE_LOAD_64 :{nb_bytes=8; must_read=true ; must_write=false; must_ack=true ; must_ack_on_error=true ; break;} + case DCACHE_TYPE_LOCK :{ must_read=false; must_write=false; must_ack=false; must_ack_on_error=false; break;} + case DCACHE_TYPE_INVALIDATE :{ must_read=false; must_write=false; must_ack=false; must_ack_on_error=false; break;} + case DCACHE_TYPE_PREFETCH :{ must_read=false; must_write=false; must_ack=false; must_ack_on_error=false; break;} + case DCACHE_TYPE_FLUSH :{ must_read=false; must_write=false; must_ack=false; must_ack_on_error=false; break;} + case DCACHE_TYPE_SYNCHRONIZATION :{ must_read=false; must_write=false; must_ack=true ; must_ack_on_error=false; break;} + case DCACHE_TYPE_STORE_8 :{nb_bytes=1; must_read=false; must_write=true ; must_ack=false; must_ack_on_error=true ; break;} + case DCACHE_TYPE_STORE_16 :{nb_bytes=2; must_read=false; must_write=true ; must_ack=false; must_ack_on_error=true ; break;} + case DCACHE_TYPE_STORE_32 :{nb_bytes=4; must_read=false; must_write=true ; must_ack=false; must_ack_on_error=true ; break;} + case DCACHE_TYPE_STORE_64 :{nb_bytes=8; must_read=false; must_write=true ; must_ack=false; must_ack_on_error=true ; break;} + default :{ must_read=false; must_write=false; must_ack=false; must_ack_on_error=false; break;} + } + + // Test the type of the address + if (entity.present == true) + { + switch (entity.segment->getType()) + { + //************************************************************** + //*****[ TTY ]************************************************** + //************************************************************** + case data::TYPE_TARGET_TTY : + { + // Can't read a tty, must write + if (must_write == false) + { + bus_error = true; + break; + } + + uint32_t num_tty = (address - entity.segment->getBase())>>4; + uint32_t num_print = ((address>>2) & 0x3); + _cout(ENVIRONMENT," * TYPE_TARGET_TTY : num_tty : %d, num_print : %d\n",num_tty, num_print); + + switch (num_print) + { + case 0 : // Write TTY + { + uint32_t num_component_tty = entity.segment->getIndex(); + char char_write = static_cast(wdata&0xff); + bus_error |= !component_tty [num_component_tty]->write(num_tty,char_write); + break; + } + case 1 : // STOP + { + printf("\n\t***** [ stop ] Time : %.10d - Address : %.8x - Wdata[31:0] : %.2x%.2x%.2x%.2x *****\n" + ,static_cast(sc_simulation_time()) + ,static_cast(address ) + ,static_cast((wdata>>24)&0xff) + ,static_cast((wdata>>16)&0xff) + ,static_cast((wdata>> 8)&0xff) + ,static_cast((wdata>> 0)&0xff) + ); + +// if (context_stop [context] == false) +// { +// context_stop [context] = true; +// nb_context_stop ++; + +// if (nb_context_stop >= nb_context) +// sc_stop(); +// } + + break; + } + case 2 : // PRINT + { + printf("\n\t----- [ print ] Time : %.10d - Address : %.8x - Wdata[31:0] : %.2x%.2x%.2x%.2x -----\n" + ,static_cast(sc_simulation_time()) + ,static_cast(address ) + ,static_cast((wdata>>24)&0xff) + ,static_cast((wdata>>16)&0xff) + ,static_cast((wdata>> 8)&0xff) + ,static_cast((wdata>> 0)&0xff) + ); + + break; + } + default : + { + printf("[address : %.8x] tty %d, reg %d don't exist\n",static_cast(address),num_tty,num_print); + bus_error = true; + } + } + break; + } + + //************************************************************** + //*****[ MEMORY ]*********************************************** + //************************************************************** + case data::TYPE_TARGET_MEMORY : + { + _cout(ENVIRONMENT,"MEMORY\n"); + _cout(ENVIRONMENT,"access : %x\n",address); + + if (must_read == true) + { + // Read + _cout(ENVIRONMENT," * Read (%d bytes)\n",size); + bus_error |= !component_data->read(address,size,read_dram[0]); // always read a complete word + + _cout(ENVIRONMENT," * Rdata : "); + for (uint32_t i=0; i(read_dram[0][i])); + _cout(ENVIRONMENT,".\n"); + + // Multiple copy + for (unsigned int it_size_data = nb_bytes; it_size_data < size; it_size_data+=nb_bytes) + memcpy(&(read_dram[0][it_size_data]),&(read_dram[0][0]),nb_bytes); + + // Permutation if problem of endianness + if (endianness::isSameEndianness(context) == false) + read_dram[0] = endianness::swapBytes(read_dram[0] , size, nb_bytes); + } + + if (must_write == true) + { + // Write + _cout(ENVIRONMENT," * Write (%d bytes)\n",size); + _cout(ENVIRONMENT," * Wdata : %x\n",wdata); + itoa(wdata,write_dram,nb_bytes); + +// for (unsigned int it_nb_bytes = 0; it_nb_bytes < size; it_nb_bytes ++) +// write_dram [it_nb_bytes] = wdata.range(8*(it_nb_bytes+1)-1,8*it_nb_bytes); + } + + break; + } + //************************************************************** + //*****[ RAMLOCK ]********************************************** + //************************************************************** + case data::TYPE_TARGET_RAMLOCK : + { + // Access is on a byte, else error + if (nb_bytes != 1) + { + bus_error = true; + break; + } + + uint32_t num_ramlock = (address - entity.segment->getBase()); // Char access + uint32_t num_component_ramlock = entity.segment->getIndex(); + + // No test : because out of range + +// bus_error |= !component_ramlock [num_component_ramlock]->test(num_ramlock); + +// if (bus_error == true) +// break; + + memset (read_dram[0],0,size); + + if (must_read == true) + read_dram [0][0] = static_cast(component_ramlock [num_component_ramlock]->read (num_ramlock)); + if (must_write == true) + read_dram [0][0] = static_cast(component_ramlock [num_component_ramlock]->write(num_ramlock)); + + break; + } + + //************************************************************** + //*****[ SIM2OS ]*********************************************** + //************************************************************** + case data::TYPE_TARGET_SIM2OS : + { + // Mapping : + // [0] number of service - Wonly - A write in this register lunch the execution of service + // [1] result - Ronly - Content the result of the service + // [2] error - Ronly - Content the code of errno + // [3+] argument - Wonly - it's all argument to execute the service + + uint32_t num_reg = (address - entity.segment->getBase())>>2; + + switch (num_reg) + { + case 0 : // ---> number of service + { + if (must_write == false) + { + std::cerr << " SIM2OS[0] is not accessible in Read" << std::endl; + bus_error = true; + } + else + { + _cout(ENVIRONMENT," service : %x\n",wdata); + component_sim2os->execute(sim2os::int2service(static_cast(wdata))); + } + break; + } + case 1 : // ---> result + { + if (must_read == false) + { + std::cerr << " SIM2OS[1] is not accessible in Write" << std::endl; + bus_error = true; + } + else + { + // Decomposition en groupe octect + Tdcache_data_t result = (Tdcache_data_t)(component_sim2os->result); + _cout(ENVIRONMENT," result : %x\n",result); + + itoa(result,read_dram[0],size); + } + break; + } + case 2 : // ---> error + { + if (must_read == false) + { + std::cerr << " SIM2OS[2] is not accessible in Write" << std::endl; + bus_error = true; + } + else + { + // Decomposition en groupe octect + Tdcache_data_t error = (Tdcache_data_t)component_sim2os->error; + _cout(ENVIRONMENT," error : %x\n",error); + + itoa(error,read_dram[0],size); + } + + break; + } + default : //---> argument + { + if (must_write == false) + { + std::cerr << " SIM2OS[" << num_reg << "] is not accessible in Read" << std::endl; + bus_error = true; + } + else + { + _cout(ENVIRONMENT," argument[%d] : %x\n",num_reg-1,wdata); + component_sim2os->parameter(num_reg-2,(void *)wdata); + } + break; + } + } + + break; + } + + default : + { + std::cerr << " Dcache_req : Unknow type" << std::endl; + exit(1); + break; + } + } + uncached |= entity.segment->getUncached(); + } + else + { + // entity is not present, or is present but is not a memory : have a bus error + bus_error = true; + uncached = true; + } + + if ((must_write == true) and (bus_error == false)) + { + // Permutation if problem of endianness + if (endianness::isSameEndianness(context) == false) + write_dram = endianness::swapBytes(write_dram, size, nb_bytes); + + bus_error |= !component_data->write(address, nb_bytes, write_dram); // take the good access + } + + // Acces at the cache !!! + // Cache WRITE ALLOCATE (becauce compute latence always; ) + Cache_Access cache_type = dreq_type2cache_type (type,uncached); + uint32_t latence = component_cache->latence(cache::DATA_CACHE, + i, + j, + address, + context, + cache_type.type, + cache_type.direction); + + // If is a respons -> compute the latence and push in the write_buffer + if (must_ack or (must_ack_on_error and bus_error)) + { + if (bus_error == true) + { + std::cout << "Dcache : have a bus error" << std::endl + << " * entity : " << i << std::endl + << " * port : " << j << std::endl + << std::hex + << " * req_addr : 0x" << address << std::endl + << std::dec + << " * req_trdid : " << context << std::endl + << " * req_pktid : " << packet << std::endl; + + // Write in data [0] the bad address (32bit or 64bits ) + itoa(address,read_dram[0],param->daccess_size_data[i]/8); + } + + // Simplification : the size of a line is a multiple of size_iword (no test) + drsp_t * rsp = new drsp_t(context, + packet, + 1, + size, + read_dram, + (bus_error==true)?DCACHE_ERROR_BUS_ERROR:DCACHE_ERROR_NONE); + component_buffer_drsp [i]->push(latence,rsp); + } + + } + //============================================================================= + //===== [ OTHERS ]============================================================= + //============================================================================= + + // Transition for each component + component_cache -> transition(); + for (uint32_t i=0; inb_entity; i++) + { + component_buffer_irsp [i]->transition(); + component_buffer_drsp [i]->transition(); + } + component_sim2os->transition(); + } + } + +// // ****************** +// // ***** DCACHE ***** +// // ****************** + +// for (uint32_t j = 0; j < nb_dport [i]; j ++) +// { +// // Test if transaction +// // cout << "[" << i << "]" +// // << "[" << j << "] " +// // << "dreq_val : " << DCACHE [i][j].REQ_VAL.read() << " " +// // << "dreq_ack : " << dreq_ack [i][j] << endl; + +// if ( (DCACHE [i][j].REQ_VAL.read() && dreq_ack [i][j]) == false) +// continue; + +// entity_t entity = component_data->entity((uint32_t)DCACHE [i][j].REQ_ADDR.read(), SIZE_DDATA/8); + +// bool uncached = DCACHE [i][j].REQ_UNC.read(); +// bool bus_error = false; + +// uint32_t addr = (uint32_t) DCACHE [i][j].REQ_ADDR.read(); +// sc_uint wdata = DCACHE[i][j].REQ_WDATA .read(); +// sc_uint<3> type = DCACHE[i][j].REQ_TYPE .read(); +// uint32_t nb_bytes = access_nb_bytes(DCACHE[i][j].REQ_ACCESS.read()); +// // A lot of flag +// bool must_read = ((type == DTYPE_READ )); +// bool must_write = ((type == DTYPE_WRITE ) || +// (type == DTYPE_WRITE_ACK ) ); +// bool must_ack = ((type == DTYPE_READ ) || +// (type == DTYPE_WRITE_ACK ) ); + +// // Test the type of the address +// if (entity.present == true) +// { +// switch (entity.segment->getType()) +// { +// // ACCESS AT A RAM +// case data::TYPE_TARGET_MEMORY : +// { +// if (must_read == true) +// { +// // Read +// bus_error |= !component_data->read(addr , +// SIZE_DDATA/8 , // always read a complete word +// read_dram ); + +// for (unsigned int it_size_data = nb_bytes; it_size_data < SIZE_DDATA/8; it_size_data+=nb_bytes) +// memcpy(&(read_dram[it_size_data]),&(read_dram[0]),nb_bytes); + +// // Permutation if problem of endianness +// if (isSameEndianness((uint32_t)DCACHE[i][j].REQ_TRDID.read()) == false) +// read_dram = swapBytes(read_dram , SIZE_DDATA/8, nb_bytes); +// } + +// if (must_write == true) +// { +// // Write +// for (unsigned int it_nb_bytes = 0; it_nb_bytes < SIZE_DDATA / 8; it_nb_bytes ++) +// write_dram [it_nb_bytes] = wdata.range(8*(it_nb_bytes+1)-1,8*it_nb_bytes); +// } +// break; +// } +// //ACCESS AT THE TTY +// case TYPE_TTY : +// { +// if (must_write == false) +// { +// bus_error = true; +// break; +// } +// uint32_t num_tty = (addr - entity.segment->getBase())>>4; +// uint32_t num_print = ((addr>>2) & 0x3); + +// switch (num_print) +// { +// case 0 : // Write TTY +// { +// uint32_t num_component_tty = entity.segment->getIndex(); +// char char_write = (char)wdata.range( 7, 0); +// bus_error |= !component_tty [num_component_tty]->write(num_tty,char_write); +// break; +// } +// case 1 : // STOP +// { +// printf("\n\t***** [ stop ] Time : %.10d - Address : %.8x - Wdata[31:0] : %.2x%.2x%.2x%.2x *****\n" +// ,(unsigned int)sc_simulation_time() +// ,(unsigned int)addr +// ,(unsigned int)wdata.range(31,24) +// ,(unsigned int)wdata.range(23,16) +// ,(unsigned int)wdata.range(15, 8) +// ,(unsigned int)wdata.range( 7, 0) +// ); + +// uint32_t trdid = (uint32_t) DCACHE[i][j].REQ_TRDID.read(); + +// if (context_stop [trdid] == false) +// { +// context_stop [trdid] = true; +// nb_context_stop ++; + +// if (nb_context_stop >= nb_context) +// sc_stop(); +// } + +// break; +// } +// case 2 : // PRINT +// { +// printf("\n\t----- [ print ] Time : %.10d - Address : %.8x - Wdata[31:0] : %.2x%.2x%.2x%.2x -----\n" +// ,(unsigned int)sc_simulation_time() +// ,(unsigned int)addr +// ,(unsigned int)wdata.range(31,24) +// ,(unsigned int)wdata.range(23,16) +// ,(unsigned int)wdata.range(15, 8) +// ,(unsigned int)wdata.range( 7, 0) +// ); + +// break; +// } +// default : +// { +// printf("<%s> : [address : %.8x] tty %d, reg %d don't exist\n",NAME,(unsigned int)addr,num_tty,num_print); +// exit(1); +// } +// } + +// break; +// } +// case TYPE_RAMLOCK : +// { +// // Access is on a byte, else error +// if (nb_bytes != 1) +// { +// bus_error = true; +// break; +// } +// uint32_t num_ramlock = (addr - entity.segment->getBase()); // Char access +// uint32_t num_component_ramlock = entity.segment->getIndex(); +// bus_error |= !component_ramlock [num_component_ramlock]->test(num_ramlock); + +// if (bus_error == true) +// break; + +// memset (read_dram,0,SIZE_DDATA/8); + +// if (must_read == true) +// read_dram [0] = (char)component_ramlock [num_component_ramlock]->read (num_ramlock); +// if (must_write == true) +// read_dram [0] = (char)component_ramlock [num_component_ramlock]->write(num_ramlock); + +// /* +// printf("Access ramlock ( %d )\n" ,(uint32_t)sc_simulation_time()); +// printf(" * addr : %.8x\n" ,(uint32_t)addr); +// printf(" * trdid : %d\n" ,(uint32_t)DCACHE[i][j].REQ_TRDID.read()); +// printf(" * r/w : %d/%d\n",must_read,must_write); +// printf(" * val : %d\n" ,(uint32_t)read_dram[0]); +// */ +// break; +// } +// case TYPE_SIM2OS : +// { +// // Mapping : +// // [0] number of service - Wonly - A write in this register lunch the execution of service +// // [1] result - Ronly - Content the result of the service +// // [2] error - Ronly - Content the code of errno +// // [3+] argument - Wonly - it's all argument to execute the service + +// uint32_t num_reg = (addr - entity.segment->getBase())>>2; + +// switch (num_reg) +// { +// case 0 : // ---> number of service +// { +// if (must_write == false) +// { +// cerr << "<" << NAME << "> {ERROR} : SIM2OS[0] is not accessible in Read" << endl; +// bus_error = true; +// } +// else +// { +// printf(" service : %.8x\n",(uint32_t)wdata); +// component_sim2os->execute(int2service((uint32_t)wdata)); +// } +// break; +// } +// case 1 : // ---> result +// { +// if (must_read == false) +// { +// cerr << "<" << NAME << "> {ERROR} : SIM2OS[1] is not accessible in Write" << endl; +// bus_error = true; +// } +// else +// { +// // Decomposition en groupe octect +// uint32_t result = (uint32_t) component_sim2os->result; +// printf(" result : %.8x (%d)\n",result,result); + +// read_dram = itoa(result,read_dram,SIZE_DDATA/8); +// } +// break; +// } +// case 2 : // ---> error +// { +// if (must_read == false) +// { +// cerr << "<" << NAME << "> {ERROR} : SIM2OS[2] is not accessible in Write" << endl; +// bus_error = true; +// } +// else +// { +// // Decomposition en groupe octect +// uint32_t error = (uint32_t) component_sim2os->error; +// printf(" error : %.8x\n",error); +// read_dram = itoa(error ,read_dram,SIZE_DDATA/8); +// } +// break; +// } +// default : // ---> argument +// { +// if (must_write == false) +// { +// cerr << "<" << NAME << "> {ERROR} : SIM2OS[" << num_reg << "] is not accessible in Write" << endl; +// bus_error = true; +// } +// else +// { +// uint32_t data = (uint32_t)wdata; +// printf(" argument[%d] : %.8x\n",num_reg-1,data); +// component_sim2os->parameter(num_reg-2,(void *)data); +// } +// break; +// } +// }//end switch num_reg + +// break; +// } +// default : +// { +// // Have a bus error +// bus_error = true; +// break; +// } +// }// switch +// uncached |= entity.segment->getUncached(); +// } +// else +// uncached = true; // If segment don't exist : it's the system bus that determine if the segment exist + + +// if ((must_write == true) && (bus_error == false)) +// { +// // Permutation if problem of endianness +// if (isSameEndianness((uint32_t)DCACHE[i][j].REQ_TRDID.read()) == false) +// write_dram = swapBytes(write_dram, SIZE_DDATA/8, nb_bytes); + +// bus_error |= !component_data->write(addr , +// nb_bytes, // take the good access +// write_dram ); +// } + + +// // Acces at the cache !!! +// Cache_Access cache_type = dreq_type2cache_type (type, uncached); + +// uint32_t latence = component_cache->latence(DATA_CACHE , +// i , +// j , +// (uint32_t)DCACHE [i][j].REQ_ADDR .read() , +// (uint32_t)DCACHE [i][j].REQ_TRDID.read() , +// cache_type.type , +// cache_type.direction ); + +// // If is a respons -> compute the latence and push in the write_buffer +// if ( must_ack == true) +// { +// if (bus_error == true) +// cout << "Dcache : have a bus error" << endl; +// component_buffer_drsp [i]->push(latence, +// Entry((uint32_t)DCACHE [i][j].REQ_TRDID.read() , +// (uint32_t)DCACHE [i][j].REQ_PKTID.read() , +// 1 , +// SIZE_DDATA/8 , +// &read_dram , +// (bus_error==true)?ERR_BUS:ERR_NO ) +// ); +// } +// }// dnb_port +// }//i + + +}; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/Memory.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/Memory.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/Memory.h (revision 81) @@ -79,5 +79,8 @@ morpheo::behavioural::Tdcache_data_t rdata; - if (type == DCACHE_TYPE_LOAD) + if ((type == DCACHE_TYPE_LOAD_8 ) or + (type == DCACHE_TYPE_LOAD_16) or + (type == DCACHE_TYPE_LOAD_32) or + (type == DCACHE_TYPE_LOAD_64) ) rdata = read (context, address, type); else @@ -265,5 +268,4 @@ switch(i->_type) { - case DCACHE_TYPE_LOAD : std::cout << "DCACHE_TYPE_LOAD "; break; case DCACHE_TYPE_LOCK : std::cout << "DCACHE_TYPE_LOCK "; break; case DCACHE_TYPE_INVALIDATE : std::cout << "DCACHE_TYPE_INVALIDATE "; break; @@ -271,4 +273,8 @@ case DCACHE_TYPE_FLUSH : std::cout << "DCACHE_TYPE_FLUSH "; break; case DCACHE_TYPE_SYNCHRONIZATION : std::cout << "DCACHE_TYPE_SYNCHRONIZATION"; break; + case DCACHE_TYPE_LOAD_8 : std::cout << "DCACHE_TYPE_LOAD_8 "; break; + case DCACHE_TYPE_LOAD_16 : std::cout << "DCACHE_TYPE_LOAD_16 "; break; + case DCACHE_TYPE_LOAD_32 : std::cout << "DCACHE_TYPE_LOAD_32 "; break; + case DCACHE_TYPE_LOAD_64 : std::cout << "DCACHE_TYPE_LOAD_64 "; break; case DCACHE_TYPE_STORE_8 : std::cout << "DCACHE_TYPE_STORE_8 "; break; case DCACHE_TYPE_STORE_16 : std::cout << "DCACHE_TYPE_STORE_16 "; break; @@ -302,7 +308,15 @@ memory -> access (2, 0x1b, DCACHE_TYPE_STORE_8 , 0x19811221); - TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_TYPE_LOAD, 0), 0xdeadbeef); - TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x14, DCACHE_TYPE_LOAD, 0), 0x12345678); - TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x18, DCACHE_TYPE_LOAD, 0), 0x21071981); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_TYPE_LOAD_32, 0), 0xdeadbeef); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x14, DCACHE_TYPE_LOAD_32, 0), 0x12345678); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x18, DCACHE_TYPE_LOAD_32, 0), 0x21071981); + + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_TYPE_LOAD_32, 0), 0xdeadbeef); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_TYPE_LOAD_16, 0), 0xbeef); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x12, DCACHE_TYPE_LOAD_16, 0), 0xdead); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x10, DCACHE_TYPE_LOAD_8 , 0), 0xef); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x11, DCACHE_TYPE_LOAD_8 , 0), 0xbe); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x12, DCACHE_TYPE_LOAD_8 , 0), 0xad); + TEST(morpheo::behavioural::Tdcache_data_t, memory -> access (2, 0x13, DCACHE_TYPE_LOAD_8 , 0), 0xde); TEST(morpheo::behavioural::Tdcache_data_t, memory -> read_lsq (2, 0x10, OPERATION_MEMORY_LOAD_8_Z ), 0x000000ef); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp (revision 81) @@ -642,5 +642,8 @@ if ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_SYNCHRONIZATION) or - (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD)) + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_8 ) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_16) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_32) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_64)) { LABEL(" * have_dcache_rsp"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp (revision 81) @@ -681,5 +681,8 @@ // test type : send or not a respons ! if ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_SYNCHRONIZATION) or - (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_8 ) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_16) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_32) or + (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_64) or ((error != DCACHE_ERROR_NONE) and ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_8 ) or (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_16) or Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 81) @@ -79,4 +79,6 @@ reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); +#error "INSTRUCTION_ENABLE : ERROR implémentation, remplacer PC_PREVIOUS par PC_NEXT_NEXT" + for (uint32_t i=0; i<_param->_nb_instruction; i++) reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = PORT_READ(in_PREDICT_INSTRUCTION_ENABLE [i]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile (revision 81) @@ -0,0 +1,24 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ./ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ Library ]------------------------------------------ +LIBRARY = $(DIR_LIB)/libPrediction_unit_Glue.a + + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_component + +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Component Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.defs =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.defs (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.defs (revision 81) @@ -0,0 +1,11 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT_MORPHEO = ../../../../../.. +DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.deps =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.deps (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.deps (revision 81) @@ -0,0 +1,38 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# +# DIR_MORPHEO must be defined + +Prediction_unit_Glue = yes + +ifndef Behavioural +include $(DIR_MORPHEO)/Behavioural/Makefile.deps +endif + +#-----[ Directory ]---------------------------------------- + +Prediction_unit_Glue_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue + +#-----[ Library ]------------------------------------------ + +Prediction_unit_Glue_LIBRARY = -lPrediction_unit_Glue \ + $(Behavioural_LIBRARY) + +Prediction_unit_Glue_DIR_LIBRARY = -L$(Prediction_unit_Glue_DIR)/lib \ + $(Behavioural_DIR_LIBRARY) + +#-----[ Rules ]-------------------------------------------- + +Prediction_unit_Glue_library : + @\ + $(MAKE) Behavioural_library; \ + $(MAKE) --directory=$(Prediction_unit_Glue_DIR) --makefile=Makefile; + +Prediction_unit_Glue_library_clean : + @\ + $(MAKE) Behavioural_library_clean; \ + $(MAKE) --directory=$(Prediction_unit_Glue_DIR) --makefile=Makefile clean; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/Makefile =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/Makefile (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/Makefile (revision 81) @@ -0,0 +1,30 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +LIBRARY = $(Prediction_unit_Glue_LIBRARY) + +DIR_LIBRARY = $(Prediction_unit_Glue_DIR_LIBRARY) + +#-----[ include ]------------------------------------------ + +all : + @$(MAKE) all_selftest + +library : Prediction_unit_Glue_library + +library_clean : Prediction_unit_Glue_library_clean + +include $(DIR_COMPONENT)/Makefile.deps +include $(DIR_MORPHEO)/Behavioural/Makefile.flags +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest +include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/config_mono_context.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/config_mono_context.cfg (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/config_mono_context.cfg (revision 81) @@ -0,0 +1,8 @@ +Prediction_unit_Glue +1 1 +1 # nb_context +30 30 +32 # size_address +1 4 *4 # nb_instruction [0] [nb_context] +1 4 *4 # size_depth [0] [nb_context] +1 1 *4 # nb_inst_predict +4 4 *4 # nb_inst_decod +4 4 *4 # nb_inst_update Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/config_multi_context.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/config_multi_context.cfg (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/config_multi_context.cfg (revision 81) @@ -0,0 +1,14 @@ +Prediction_unit_Glue +4 4 +1 # nb_context +30 30 +32 # size_address +1 1 *4 # nb_instruction [0] [nb_context] +2 2 *4 # nb_instruction [1] [nb_context] +8 8 *4 # nb_instruction [2] [nb_context] +4 4 *4 # nb_instruction [3] [nb_context] +2 2 *4 # size_depth [0] [nb_context] +1 1 *4 # size_depth [1] [nb_context] +8 8 *4 # size_depth [2] [nb_context] +4 4 *4 # size_depth [3] [nb_context] +1 4 *4 # nb_inst_predict +4 4 *4 # nb_inst_decod +4 4 *4 # nb_inst_update Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/include/test.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/include/test.h (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/include/test.h (revision 81) @@ -0,0 +1,31 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test "RegisterFile" + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include +#include + +#include "Common/include/Time.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +using namespace std; +using namespace morpheo; +using namespace morpheo::behavioural; +using namespace morpheo::behavioural::core; +using namespace morpheo::behavioural::core::multi_front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end; +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit; + +using namespace morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue; + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters * param); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/main.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/main.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/main.cpp (revision 81) @@ -0,0 +1,87 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/include/test.h" + +#define NB_PARAMS 5 + +void usage (int argc, char * argv[]) +{ + err (_(" %s name_instance list_params.\n"),argv[0]); + err (_("list_params is :\n")); + err (_(" * nb_context (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * nb_instruction [nb_context] (uint32_t)\n")); + err (_(" * size_depth [nb_context] (uint32_t)\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_decod (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + + exit (1); +} + +#ifndef SYSTEMC +int main (int argc, char * argv[]) +#else +int sc_main (int argc, char * argv[]) +#endif +{ + if (argc < static_cast(2+NB_PARAMS)) + usage (argc, argv); + + uint32_t x = 1; + + string name = argv[x++]; + + uint32_t _nb_context = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+2*_nb_context)) + usage (argc, argv); + + uint32_t * _nb_instruction = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _nb_instruction [i] = fromString(argv[x++]); + uint32_t * _size_depth = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _size_depth [i] = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_inst_update = fromString(argv[x++]); + + int _return = EXIT_SUCCESS; + try + { + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters + (_nb_context , + _size_address , + _nb_instruction , + _size_depth , + _nb_inst_predict, + _nb_inst_decod , + _nb_inst_update ); + + msg(_("%s"),param->print(1).c_str()); + + test (name,param); + } + catch (morpheo::ErrorMorpheo & error) + { + msg (_("<%s> :\n%s"),name.c_str(), error.what ()); + _return = EXIT_FAILURE; + } + catch (...) + { + err (_("<%s> : This test must generate a error.\n"),name.c_str()); + _return = EXIT_FAILURE; + } + + delete [] _nb_instruction; + delete [] _size_depth ; + + return (_return); +} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/test.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/test.cpp (revision 81) @@ -0,0 +1,460 @@ +/* + * $Id$ + * + * [ Description ] + * + * Test + */ + +#define NB_ITERATION 16 +#define CYCLE_MAX (1024*NB_ITERATION) + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/include/test.h" +#include "Common/include/Test.h" +#include "Behavioural/include/Allocation.h" + +void test (string name, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters * _param) +{ + msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); + +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); +#endif + + Tusage_t _usage = USE_ALL; + +// _usage = usage_unset(_usage,USE_SYSTEMC ); +// _usage = usage_unset(_usage,USE_VHDL ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); +// _usage = usage_unset(_usage,USE_POSITION ); +// _usage = usage_unset(_usage,USE_STATISTICS ); +// _usage = usage_unset(_usage,USE_INFORMATION ); + + Prediction_unit_Glue * _Prediction_unit_Glue = new Prediction_unit_Glue + (name.c_str(), +#ifdef STATISTICS + _parameters_statistics, +#endif + _param, + _usage); + +#ifdef SYSTEMC + if (usage_is_set(_usage,USE_SYSTEMC)) + { + /********************************************************************* + * Déclarations des signaux + *********************************************************************/ + string rename; + + sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); + sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_PREDICT_PC_PREVIOUS ," in_PREDICT_PC_PREVIOUS ",Taddress_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_PREDICT_PC_CURRENT ," in_PREDICT_PC_CURRENT ",Taddress_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ," in_PREDICT_PC_CURRENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT ,"out_PREDICT_PC_NEXT ",Taddress_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,"out_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context); + ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,"out_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]); + ALLOC1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,"out_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID ,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_PREDICT_BTB_VAL ,"out_PREDICT_BTB_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ACK ," in_PREDICT_BTB_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_BTB_CONTEXT_ID ,"out_PREDICT_BTB_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_BTB_ADDRESS ,"out_PREDICT_BTB_ADDRESS ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_HIT ," in_PREDICT_BTB_HIT ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_SRC ," in_PREDICT_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_DEST ," in_PREDICT_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_CONDITION ," in_PREDICT_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL( in_PREDICT_BTB_LAST_TAKE ," in_PREDICT_BTB_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_IS_ACCURATE ," in_PREDICT_BTB_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIR_VAL ,"out_PREDICT_DIR_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_DIR_ACK ," in_PREDICT_DIR_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIR_ADDRESS_SRC ,"out_PREDICT_DIR_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIR_STATIC ,"out_PREDICT_DIR_STATIC ",Tcontrol_t ,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL(out_PREDICT_DIR_LAST_TAKE ,"out_PREDICT_DIR_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL( in_PREDICT_DIR_HISTORY ," in_PREDICT_DIR_HISTORY ",Thistory_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_DIR_DIRECTION ," in_PREDICT_DIR_DIRECTION ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_RAS_VAL ,"out_PREDICT_RAS_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_RAS_ACK ," in_PREDICT_RAS_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_RAS_CONTEXT_ID ,"out_PREDICT_RAS_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_RAS_HIT ," in_PREDICT_RAS_HIT ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_RAS_PUSH ,"out_PREDICT_RAS_PUSH ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_RAS_ADDRESS_PUSH ,"out_PREDICT_RAS_ADDRESS_PUSH ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_RAS_ADDRESS_POP ," in_PREDICT_RAS_ADDRESS_POP ",Taddress_t ,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL( in_PREDICT_RAS_INDEX ," in_PREDICT_RAS_INDEX ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_VAL ,"out_PREDICT_UPT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_UPT_ACK ," in_PREDICT_UPT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_CONTEXT_ID ,"out_PREDICT_UPT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_BTB_ADDRESS_SRC ,"out_PREDICT_UPT_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_BTB_ADDRESS_DEST ,"out_PREDICT_UPT_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_BTB_CONDITION ,"out_PREDICT_UPT_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_BTB_LAST_TAKE ,"out_PREDICT_UPT_BTB_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_BTB_IS_ACCURATE ,"out_PREDICT_UPT_BTB_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL(out_PREDICT_UPT_DIR_HISTORY ,"out_PREDICT_UPT_DIR_HISTORY ",Thistory_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_UPT_RAS_ADDRESS ,"out_PREDICT_UPT_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL(out_PREDICT_UPT_RAS_INDEX ,"out_PREDICT_UPT_RAS_INDEX ",Tptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_DEPTH_UPT_NB_BRANCH ," in_DEPTH_UPT_NB_BRANCH ",Tdepth_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL( in_DEPTH_UPT_TAIL ," in_DEPTH_UPT_TAIL ",Tdepth_t ,_param->_nb_context); + + /******************************************************** + * Instanciation + ********************************************************/ + + msg(_("<%s> : Instanciation of _Prediction_unit_Glue.\n"),name.c_str()); + + (*(_Prediction_unit_Glue->in_CLOCK)) (*(in_CLOCK)); + (*(_Prediction_unit_Glue->in_NRESET)) (*(in_NRESET)); + + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_VAL ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_ACK ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_PC_PREVIOUS ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_PC_CURRENT ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_PC_NEXT ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context); + INSTANCE2_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]); + for (uint32_t i=0; i<_param->_nb_context; i++) + { + if (_param->_have_port_inst_ifetch_ptr [i]) + INSTANCE_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_INST_IFETCH_PTR [i]); + if (_param->_have_port_depth [i]) + INSTANCE_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]); + } + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_BRANCH_STATE ,_param->_nb_context); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_BTB_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_BTB_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_BTB_ADDRESS ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_HIT ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_CONDITION ,_param->_nb_inst_predict); +//INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_LAST_TAKE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_BTB_IS_ACCURATE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_DIR_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_DIR_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_DIR_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_DIR_STATIC ,_param->_nb_inst_predict); +//INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_DIR_LAST_TAKE ,_param->_nb_inst_predict); +//INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_DIR_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_DIR_DIRECTION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_RAS_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_RAS_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_RAS_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_RAS_HIT ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_RAS_PUSH ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_RAS_ADDRESS_PUSH ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_RAS_ADDRESS_POP ,_param->_nb_inst_predict); +//INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_RAS_INDEX ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_PREDICT_UPT_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_BTB_CONDITION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_BTB_LAST_TAKE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_BTB_IS_ACCURATE ,_param->_nb_inst_predict); +//INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_DIR_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_RAS_ADDRESS ,_param->_nb_inst_predict); +//INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_PREDICT_UPT_RAS_INDEX ,_param->_nb_inst_predict); + for (uint32_t i=0; i<_param->_nb_context; i++) + { + if (_param->_have_port_depth [i]) + { + INSTANCE_SC_SIGNAL(_Prediction_unit_Glue, in_DEPTH_UPT_NB_BRANCH [i]); + INSTANCE_SC_SIGNAL(_Prediction_unit_Glue, in_DEPTH_UPT_TAIL [i]); + } + } + + msg(_("<%s> : Start Simulation ............\n"),name.c_str()); + + Time * _time = new Time(); + + /******************************************************** + * Simulation - Begin + ********************************************************/ + + // Initialisation + + const uint32_t seed = 0; +//const uint32_t seed = static_cast(time(NULL)); + + srand(seed); + + int32_t percent_transaction_predict = 75; + + SC_START(0); + LABEL("Initialisation"); + + LABEL("Reset"); + + for (uint32_t i=0; i<_param->_nb_context; i++) + in_PREDICT_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + in_PREDICT_BTB_ACK [i]->write(0); + in_PREDICT_DIR_ACK [i]->write(0); + in_PREDICT_RAS_ACK [i]->write(0); + in_PREDICT_UPT_ACK [i]->write(0); + + in_PREDICT_BTB_IS_ACCURATE [i]->write(1); + } + + in_NRESET->write(0); + SC_START(5); + in_NRESET->write(1); + + LABEL("Loop of Test"); + + + for (uint32_t iteration=0; iteration_nb_context; + LABEL("context : %d",context); + + for (uint32_t i=0; i<_param->_nb_instruction [context]; i++) + { + Taddress_t addr = (1<<(_param->_nb_instruction[context]+4))+i; + + in_PREDICT_PC_PREVIOUS [context]->write(0); + in_PREDICT_PC_CURRENT [context]->write(addr); + in_PREDICT_PC_CURRENT_IS_DS_TAKE [context]->write(0); + + bool find = false; + + do + { + for (uint32_t j=0; j<_param->_nb_inst_predict; j++) + in_PREDICT_BTB_ACK [j]->write(0); + + in_PREDICT_VAL [context]->write((rand()%100)_nb_inst_predict; port++) + { + if (_param->_have_port_context_id) + LABEL(" * BTB context : 0x%x",out_PREDICT_BTB_CONTEXT_ID [port]->read()); + LABEL(" * BTB address : 0x%x",out_PREDICT_BTB_ADDRESS [port]->read()); + if ((out_PREDICT_BTB_CONTEXT_ID [port]->read() == context) and + (out_PREDICT_BTB_ADDRESS [port]->read() == addr )) + { + in_PREDICT_BTB_ACK [port]->write((rand()%100)write(0); + break; + } + } + + SC_START(0); + + if (in_PREDICT_VAL[context]->read() and out_PREDICT_ACK[context]->read()) + { + LABEL ("PREDICT [%d] - Transaction accepted",context); + find = true; + + TEST(Taddress_t ,out_PREDICT_PC_NEXT [context]->read(),addr-i+_param->_nb_instruction[context]); + TEST(Tcontrol_t ,out_PREDICT_PC_NEXT_IS_DS_TAKE [context]->read(),0); + TEST(Tinst_ifetch_ptr_t,out_PREDICT_INST_IFETCH_PTR [context]->read(),0); + TEST(Tbranch_state_t ,out_PREDICT_BRANCH_STATE [context]->read(),BRANCH_STATE_NONE); + TEST(Tprediction_ptr_t ,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [context]->read(),0); + + for (uint32_t j=0; jread(),0); + for (uint32_t j=i; j<_param->_nb_instruction[context]; j++) + TEST(Tcontrol_t ,out_PREDICT_INSTRUCTION_ENABLE [context][j]->read(),1); + + TEST(Tcontrol_t ,out_PREDICT_BTB_VAL [port]->read(),1); + TEST(Tcontext_t ,out_PREDICT_BTB_CONTEXT_ID [port]->read(),context); + TEST(Taddress_t ,out_PREDICT_BTB_ADDRESS [port]->read(),addr); + } + + SC_START(1); + + } while(not find); + + + for (uint32_t i=0; i<_param->_nb_context; i++) + in_PREDICT_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + in_PREDICT_BTB_ACK [i]->write(0); + in_PREDICT_DIR_ACK [i]->write(0); + in_PREDICT_RAS_ACK [i]->write(0); + in_PREDICT_UPT_ACK [i]->write(0); + } + } + } + + { + LABEL("Test no sequential - L.J"); + uint32_t context = rand()%_param->_nb_context; + + LABEL("context : %d",context); + + for (uint32_t i=0; i<_param->_nb_instruction [context]; i++) + { + Taddress_t addr = (1<<(_param->_nb_instruction[context]+4)); + Taddress_t addr_src = addr+i; + Taddress_t addr_dest = 0xdeadbeef; + + in_PREDICT_PC_PREVIOUS [context]->write(0); + in_PREDICT_PC_CURRENT [context]->write(addr); + in_PREDICT_PC_CURRENT_IS_DS_TAKE [context]->write(0); + + bool find = false; + + do + { + for (uint32_t j=0; j<_param->_nb_inst_predict; j++) + in_PREDICT_BTB_ACK [j]->write(0); + + in_PREDICT_VAL [context]->write((rand()%100)_nb_inst_predict; port++) + { + if (_param->_have_port_context_id) + LABEL(" * BTB context : 0x%x",out_PREDICT_BTB_CONTEXT_ID [port]->read()); + LABEL(" * BTB address : 0x%x",out_PREDICT_BTB_ADDRESS [port]->read()); + if ((out_PREDICT_BTB_CONTEXT_ID [port]->read() == context) and + (out_PREDICT_BTB_ADDRESS [port]->read() == addr )) + { + in_PREDICT_BTB_ACK [port]->write((rand()%100)write(1); + + in_PREDICT_BTB_ADDRESS_SRC [port]->write(addr_src ); + in_PREDICT_BTB_ADDRESS_DEST [port]->write(addr_dest); + in_PREDICT_BTB_CONDITION [port]->write(BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK); //l.j + //in_PREDICT_BTB_LAST_TAKE + + break; + } + } + + SC_START(0); + + if (in_PREDICT_VAL[context]->read() and out_PREDICT_ACK[context]->read()) + { + LABEL ("PREDICT [%d] - Transaction accepted",context); + find = true; + + TEST(Taddress_t ,out_PREDICT_PC_NEXT [context]->read(),addr_dest); +// TEST(Tcontrol_t ,out_PREDICT_PC_NEXT_IS_DS_TAKE [context]->read(),0); + TEST(Tinst_ifetch_ptr_t,out_PREDICT_INST_IFETCH_PTR [context]->read(),i); + TEST(Tbranch_state_t ,out_PREDICT_BRANCH_STATE [context]->read(),BRANCH_STATE_NSPEC_TAKE); +// TEST(Tprediction_ptr_t ,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [context]->read(),0); + +// for (uint32_t j=0; jread(),0); +// for (uint32_t j=i; j<_param->_nb_instruction[context]; j++) +// TEST(Tcontrol_t ,out_PREDICT_INSTRUCTION_ENABLE [context][j]->read(),1); + + TEST(Tcontrol_t ,out_PREDICT_BTB_VAL [port]->read(),1); + TEST(Tcontext_t ,out_PREDICT_BTB_CONTEXT_ID [port]->read(),context); + TEST(Taddress_t ,out_PREDICT_BTB_ADDRESS [port]->read(),addr); + } + + SC_START(1); + + } while(not find); + + for (uint32_t i=0; i<_param->_nb_context; i++) + in_PREDICT_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + in_PREDICT_BTB_ACK [i]->write(0); + in_PREDICT_DIR_ACK [i]->write(0); + in_PREDICT_RAS_ACK [i]->write(0); + in_PREDICT_UPT_ACK [i]->write(0); + } + } + } + + + SC_START(1); + } + + /******************************************************** + * Simulation - End + ********************************************************/ + + TEST_OK ("End of Simulation"); + delete _time; + + msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); + + delete in_CLOCK; + delete in_NRESET; + + DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_context); + DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_context); + DELETE1_SC_SIGNAL( in_PREDICT_PC_PREVIOUS ,_param->_nb_context); + DELETE1_SC_SIGNAL( in_PREDICT_PC_CURRENT ,_param->_nb_context); + DELETE1_SC_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context); + DELETE1_SC_SIGNAL(out_PREDICT_PC_NEXT ,_param->_nb_context); + DELETE1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context); + DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]); + DELETE1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context); + DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_context); + DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context); + DELETE1_SC_SIGNAL(out_PREDICT_BTB_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_BTB_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_BTB_CONTEXT_ID ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_BTB_ADDRESS ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_BTB_HIT ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_BTB_CONDITION ,_param->_nb_inst_predict); +//DELETE1_SC_SIGNAL( in_PREDICT_BTB_LAST_TAKE ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_BTB_IS_ACCURATE ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_DIR_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_DIR_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_DIR_ADDRESS_SRC ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_DIR_STATIC ,_param->_nb_inst_predict); +//DELETE1_SC_SIGNAL(out_PREDICT_DIR_LAST_TAKE ,_param->_nb_inst_predict); +//DELETE1_SC_SIGNAL( in_PREDICT_DIR_HISTORY ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_DIR_DIRECTION ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_RAS_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_RAS_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_RAS_CONTEXT_ID ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_RAS_HIT ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_RAS_PUSH ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_RAS_ADDRESS_PUSH ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_RAS_ADDRESS_POP ,_param->_nb_inst_predict); +//DELETE1_SC_SIGNAL( in_PREDICT_RAS_INDEX ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_UPT_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_CONTEXT_ID ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_BTB_CONDITION ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_BTB_LAST_TAKE ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_BTB_IS_ACCURATE ,_param->_nb_inst_predict); +//DELETE1_SC_SIGNAL(out_PREDICT_UPT_DIR_HISTORY ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_UPT_RAS_ADDRESS ,_param->_nb_inst_predict); +//DELETE1_SC_SIGNAL(out_PREDICT_UPT_RAS_INDEX ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_DEPTH_UPT_NB_BRANCH ,_param->_nb_context); + DELETE1_SC_SIGNAL( in_DEPTH_UPT_TAIL ,_param->_nb_context); + } +#endif + + delete _Prediction_unit_Glue; +#ifdef STATISTICS + delete _parameters_statistics; +#endif +} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/Makefile =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/Makefile (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/Makefile (revision 81) @@ -0,0 +1,19 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +#-----[ Directory ]---------------------------------------- +DIR_COMPONENT = ../ +include $(DIR_COMPONENT)/Makefile.defs + +#-----[ include ]------------------------------------------ + +all : + $(MAKE) all_documentation + +include $(DIR_MORPHEO)/Behavioural/Makefile.Common +include $(DIR_MORPHEO)/Behavioural/Makefile.Documentation Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/Prediction_unit_Glue.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/Prediction_unit_Glue.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/Prediction_unit_Glue.tex (revision 81) @@ -0,0 +1,38 @@ +\documentclass[10pt,a4paper,twocolumn]{article} + +\def\dirdoc{tex} +\def\dirschema{eps} + +% Package de variables d'environnement : Titre, command etc ... +\usepackage{../../../../../../../Behavioural/doc/sty/doc-style} +\usepackage{sty/header} + + +%------------------------------------------------------------------------------ +% Début document +%------------------------------------------------------------------------------ + +\pagestyle{empty} + +\begin{document} + +% Créez une page de titre +\maketitle +\thispagestyle{empty} + +%Table des matières et des figures +%\tableofcontents +%\newpage +%\listoffigures + +%------------------------------------------------------------------------------ +% Ajout du corps du documents +%------------------------------------------------------------------------------ + +\input{tex/root} + +%------------------------------------------------------------------------------ +% Fin d'ajout du corps du document +%------------------------------------------------------------------------------ + +\end{document} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/sty/header.sty =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/sty/header.sty (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/sty/header.sty (revision 81) @@ -0,0 +1,12 @@ +\def\review{YYYY/MM/DD} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Prediction_unit_Glue} + +\author{} + +\affiliation{} + +\email{} + +\date{\review} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/01_introduction.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/01_introduction.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/01_introduction.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Introduction} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/02_features.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/02_features.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/02_features.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Features} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/03_description.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/03_description.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/03_description.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Functional Description} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/04_pinout.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/04_pinout.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/04_pinout.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Pin out} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/05_parameters.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/05_parameters.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/05_parameters.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Parameters} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/06_performance.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/06_performance.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/06_performance.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Performance} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/07_details.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/07_details.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/07_details.tex (revision 81) @@ -0,0 +1,1 @@ +\Section{Details} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/08_history.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/08_history.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/08_history.tex (revision 81) @@ -0,0 +1,10 @@ +\Section{Revision History} + +\begin{tabular}{|c|c|c|} +\hline +Revision Date & By & Modifications\\ +\hline +\hline +yyyy/mm/dd & xxx & Initial document \\ +\hline +\end{tabular} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/root.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/root.tex (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/doc/tex/root.tex (revision 81) @@ -0,0 +1,8 @@ +\input{\dirdoc/01_introduction} +\input{\dirdoc/02_features} +\input{\dirdoc/03_description} +\input{\dirdoc/04_pinout} +\input{\dirdoc/05_parameters} +\input{\dirdoc/06_performance} +\input{\dirdoc/07_details} +\input{\dirdoc/08_history} Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h (revision 81) @@ -0,0 +1,69 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_prediction_unit_glue_Parameters_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_prediction_unit_glue_Parameters_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Common/include/Debug.h" +#include "Behavioural/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + + class Parameters : public morpheo::behavioural::Parameters + { + //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_context ; + public : uint32_t _size_address ; + public : uint32_t * _nb_instruction ; + public : uint32_t * _size_depth ; + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_decod ; + public : uint32_t _nb_inst_update ; +//public : uint32_t _nb_inst_branch_complete ; + + public : uint32_t _size_context_id ; + public : uint32_t * _size_inst_ifetch_ptr ; + + public : bool _have_port_context_id ; + public : bool * _have_port_depth ; + public : bool * _have_port_inst_ifetch_ptr; + + //-----[ methods ]----------------------------------------------------------- + public : Parameters (uint32_t nb_context , + uint32_t size_address , + uint32_t * nb_instruction , + uint32_t * size_depth , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update ); +// public : Parameters (Parameters & param) ; + public : ~Parameters () ; + + public : Parameters_test msg_error (void); + + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters & x); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h (revision 81) @@ -0,0 +1,263 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_prediction_unit_glue_Prediction_unit_Glue_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_prediction_unit_glue_Prediction_unit_Glue_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#ifdef SYSTEMC +#include "systemc.h" +#endif + +#include +#include "Common/include/ToString.h" +#include "Common/include/Debug.h" + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h" +#ifdef STATISTICS +#include "Behavioural/include/Stat.h" +#endif +#include "Behavioural/include/Component.h" +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +#include "Behavioural/include/Usage.h" + +namespace morpheo { +namespace behavioural { + +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + + class Prediction_unit_Glue +#if SYSTEMC + : public sc_module +#endif + { + // -----[ fields ]---------------------------------------------------- + // Parameters + protected : const std::string _name; + protected : const Parameters * _param; + private : const Tusage_t _usage; + +#ifdef STATISTICS + public : Stat * _stat; +#endif + + public : Component * _component; + private : Interfaces * _interfaces; + +#ifdef SYSTEMC + // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_CLOCK * in_CLOCK ; + public : SC_IN (Tcontrol_t) * in_NRESET ; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_PREDICT_VAL ; //[nb_context] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_ACK ; //[nb_context] + public : SC_IN (Taddress_t ) ** in_PREDICT_PC_PREVIOUS ; //[nb_context] + public : SC_IN (Taddress_t ) ** in_PREDICT_PC_CURRENT ; //[nb_context] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_PC_CURRENT_IS_DS_TAKE ; //[nb_context] + public : SC_OUT(Taddress_t ) ** out_PREDICT_PC_NEXT ; //[nb_context] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_PC_NEXT_IS_DS_TAKE ; //[nb_context] + public : SC_OUT(Tcontrol_t ) *** out_PREDICT_INSTRUCTION_ENABLE ; //[nb_context][nb_instruction] + public : SC_OUT(Tinst_ifetch_ptr_t ) ** out_PREDICT_INST_IFETCH_PTR ; //[nb_context] + public : SC_OUT(Tbranch_state_t ) ** out_PREDICT_BRANCH_STATE ; //[nb_context] + public : SC_OUT(Tprediction_ptr_t ) ** out_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; //[nb_context] + + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_BTB_VAL ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_ACK ; //[nb_inst_predict] + public : SC_OUT(Tcontext_t ) ** out_PREDICT_BTB_CONTEXT_ID ; //[nb_inst_predict] + public : SC_OUT(Taddress_t ) ** out_PREDICT_BTB_ADDRESS ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_HIT ; //[nb_inst_predict] + public : SC_IN (Taddress_t ) ** in_PREDICT_BTB_ADDRESS_SRC ; //[nb_inst_predict] + public : SC_IN (Taddress_t ) ** in_PREDICT_BTB_ADDRESS_DEST ; //[nb_inst_predict] + public : SC_IN (Tbranch_condition_t) ** in_PREDICT_BTB_CONDITION ; //[nb_inst_predict] +//public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_LAST_TAKE ; //[nb_inst_predict] DIR.LAST_TAKE + public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_IS_ACCURATE ; //[nb_inst_predict] + + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_DIR_VAL ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_DIR_ACK ; //[nb_inst_predict] + public : SC_OUT(Taddress_t ) ** out_PREDICT_DIR_ADDRESS_SRC ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_DIR_STATIC ; //[nb_inst_predict] +//public : SC_OUT(Tcontrol_t ) ** out_PREDICT_DIR_LAST_TAKE ; //[nb_inst_predict] BTB.LAST_TAKE +//public : SC_IN (Thistory_t ) ** in_PREDICT_DIR_HISTORY ; //[nb_inst_predict] UPT.DIR_HISTORY + public : SC_IN (Tcontrol_t ) ** in_PREDICT_DIR_DIRECTION ; //[nb_inst_predict] + + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_RAS_VAL ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_RAS_ACK ; //[nb_inst_predict] + public : SC_OUT(Tcontext_t ) ** out_PREDICT_RAS_CONTEXT_ID ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_RAS_HIT ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_RAS_PUSH ; //[nb_inst_predict] + public : SC_OUT(Taddress_t ) ** out_PREDICT_RAS_ADDRESS_PUSH ; //[nb_inst_predict] + public : SC_IN (Taddress_t ) ** in_PREDICT_RAS_ADDRESS_POP ; //[nb_inst_predict] +//public : SC_IN (Tptr_t ) ** in_PREDICT_RAS_INDEX ; //[nb_inst_predict] UPT.RAS_INDEX + + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_UPT_VAL ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_UPT_ACK ; //[nb_inst_predict] + public : SC_OUT(Tcontext_t ) ** out_PREDICT_UPT_CONTEXT_ID ; //[nb_inst_predict] + public : SC_OUT(Taddress_t ) ** out_PREDICT_UPT_BTB_ADDRESS_SRC ; //[nb_inst_predict]* BTB.ADDRESS_SRC + public : SC_OUT(Taddress_t ) ** out_PREDICT_UPT_BTB_ADDRESS_DEST ; //[nb_inst_predict] + public : SC_OUT(Tbranch_condition_t) ** out_PREDICT_UPT_BTB_CONDITION ; //[nb_inst_predict]* BTB.CONDITION + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_UPT_BTB_LAST_TAKE ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_UPT_BTB_IS_ACCURATE ; //[nb_inst_predict] +//public : SC_OUT(Thistory_t ) ** out_PREDICT_UPT_DIR_HISTORY ; //[nb_inst_predict] DIR.HISTORY + public : SC_OUT(Taddress_t ) ** out_PREDICT_UPT_RAS_ADDRESS ; //[nb_inst_predict]* RAS.ADDRESS_POP +//public : SC_OUT(Tptr_t ) ** out_PREDICT_UPT_RAS_INDEX ; //[nb_inst_predict] RAS.INDEX + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_DECOD_BTB_VAL ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_BTB_ACK ; //[nb_inst_decod] + public : SC_OUT(Tcontext_t ) ** out_DECOD_BTB_CONTEXT_ID ; //[nb_inst_decod] + public : SC_OUT(Taddress_t ) ** out_DECOD_BTB_ADDRESS_SRC ; //[nb_inst_decod] + public : SC_OUT(Taddress_t ) ** out_DECOD_BTB_ADDRESS_DEST ; //[nb_inst_decod] + public : SC_OUT(Tbranch_condition_t) ** out_DECOD_BTB_CONDITION ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_BTB_LAST_TAKE ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_BTB_MISS_PREDICTION ; //[nb_inst_decod] + + public : SC_OUT(Tcontrol_t) ** out_DECOD_RAS_VAL ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t) ** in_DECOD_RAS_ACK ; //[nb_inst_decod] + public : SC_OUT(Tcontext_t) ** out_DECOD_RAS_CONTEXT_ID ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t) ** in_DECOD_RAS_HIT ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t) ** out_DECOD_RAS_PUSH ; //[nb_inst_decod] + public : SC_OUT(Taddress_t) ** out_DECOD_RAS_ADDRESS_PUSH ; //[nb_inst_decod] + public : SC_IN (Taddress_t) ** in_DECOD_RAS_ADDRESS_POP ; //[nb_inst_decod] + public : SC_IN (Tptr_t ) ** in_DECOD_RAS_INDEX ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t) ** out_DECOD_RAS_MISS_PREDICTION ; //[nb_inst_decod] + + public : SC_OUT(Tcontrol_t ) ** out_DECOD_UPT_VAL ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_UPT_ACK ; //[nb_inst_decod] + public : SC_OUT(Tcontext_t ) ** out_DECOD_UPT_CONTEXT_ID ; //[nb_inst_decod] + public : SC_OUT(Taddress_t ) ** out_DECOD_UPT_BTB_ADDRESS_SRC ; //[nb_inst_decod] + public : SC_OUT(Taddress_t ) ** out_DECOD_UPT_BTB_ADDRESS_DEST ; //[nb_inst_decod] + public : SC_OUT(Tbranch_condition_t) ** out_DECOD_UPT_BTB_CONDITION ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_UPT_BTB_LAST_TAKE ; //[nb_inst_decod] + public : SC_OUT(Taddress_t ) ** out_DECOD_UPT_RAS_ADDRESS ; //[nb_inst_decod] + public : SC_OUT(Tptr_t ) ** out_DECOD_UPT_RAS_INDEX ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_UPT_MISS_PREDICTION ; //[nb_inst_decod] + public : SC_OUT(Tprediction_ptr_t ) ** out_DECOD_UPT_UPDATE_PREDICTION_ID ; //[nb_inst_decod] + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_BTB_VAL ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_BTB_ACK ; //[nb_inst_update] + public : SC_OUT(Tcontext_t ) ** out_UPDATE_BTB_CONTEXT_ID ; //[nb_inst_update] + public : SC_OUT(Taddress_t ) ** out_UPDATE_BTB_ADDRESS_SRC ; //[nb_inst_update] + public : SC_OUT(Taddress_t ) ** out_UPDATE_BTB_ADDRESS_DEST ; //[nb_inst_update] + public : SC_OUT(Tbranch_condition_t) ** out_UPDATE_BTB_CONDITION ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_BTB_LAST_TAKE ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_BTB_MISS_PREDICTION ; //[nb_inst_update] + + public : SC_OUT(Tcontrol_t) ** out_UPDATE_DIR_VAL ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_DIR_ACK ; //[nb_inst_update] + public : SC_OUT(Taddress_t) ** out_UPDATE_DIR_ADDRESS ; //[nb_inst_update] + public : SC_OUT(Thistory_t) ** out_UPDATE_DIR_HISTORY ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_DIR_DIRECTION ; //[nb_inst_update] + + public : SC_OUT(Tcontrol_t) ** out_UPDATE_RAS_VAL ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_RAS_ACK ; //[nb_inst_update] + public : SC_OUT(Tcontext_t) ** out_UPDATE_RAS_CONTEXT_ID ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_RAS_PUSH ; //[nb_inst_update] + public : SC_OUT(Taddress_t) ** out_UPDATE_RAS_ADDRESS ; //[nb_inst_update] + public : SC_OUT(Tptr_t ) ** out_UPDATE_RAS_INDEX ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_RAS_MISS_PREDICTION ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_RAS_PREDICTION_IFETCH ; //[nb_inst_update] + + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_VAL ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_UPT_ACK ; //[nb_inst_update] + public : SC_IN (Tcontext_t ) ** in_UPDATE_UPT_CONTEXT_ID ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_MISS_PREDICTION ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_DIRECTION_GOOD ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_BTB_VAL ; //[nb_inst_update] + public : SC_IN (Taddress_t ) ** in_UPDATE_UPT_BTB_ADDRESS_SRC ; //[nb_inst_update] + public : SC_IN (Taddress_t ) ** in_UPDATE_UPT_BTB_ADDRESS_DEST ; //[nb_inst_update] + public : SC_IN (Tbranch_condition_t) ** in_UPDATE_UPT_BTB_CONDITION ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_DIR_VAL ; //[nb_inst_update] + public : SC_IN (Thistory_t ) ** in_UPDATE_UPT_DIR_HISTORY ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_RAS_VAL ; //[nb_inst_update] + public : SC_IN (Taddress_t ) ** in_UPDATE_UPT_RAS_ADDRESS ; //[nb_inst_update] + public : SC_IN (Tptr_t ) ** in_UPDATE_UPT_RAS_INDEX ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_UPT_RAS_PREDICTION_IFETCH ; //[nb_inst_update] + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tdepth_t ) ** in_DEPTH_UPT_NB_BRANCH ; //[nb_context] + public : SC_IN (Tdepth_t ) ** in_DEPTH_UPT_TAIL ; //[nb_context] + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t reg_PREDICT_PRIORITY; + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#endif + + // -----[ Methods ]--------------------------------------------------- + +#ifdef SYSTEMC + SC_HAS_PROCESS (Prediction_unit_Glue); +#endif + public : Prediction_unit_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + std::string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + Parameters * param, + morpheo::behavioural::Tusage_t usage + ); + public : ~Prediction_unit_Glue (void); + + private : void allocation ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ); + private : void deallocation (void); + +#ifdef SYSTEMC + public : void transition (void); +//public : void genMoore (void); + public : void genMealy_predict (void); +// public : void genMealy_decod (void); +// public : void genMealy_update (void); +#endif + +#if VHDL + public : void vhdl (void); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif + +#ifdef STATISTICS + public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); + public : void statistics_deallocation (void); +#endif +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + private : void end_cycle (void); +#endif + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Types.h (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Types.h (revision 81) @@ -0,0 +1,31 @@ +#ifndef morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_prediction_unit_glue_Types_h +#define morpheo_behavioural_core_multi_front_end_front_end_prediction_unit_prediction_unit_glue_Types_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters.cpp (revision 81) @@ -0,0 +1,84 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::Parameters" + Parameters::Parameters (uint32_t nb_context , + uint32_t size_address , + uint32_t * nb_instruction , + uint32_t * size_depth , + uint32_t nb_inst_predict, + uint32_t nb_inst_decod , + uint32_t nb_inst_update ) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + _nb_context = nb_context ; + _size_address = size_address ; + _nb_instruction = nb_instruction ; + _size_depth = size_depth ; + _nb_inst_predict = nb_inst_predict ; + _nb_inst_decod = nb_inst_decod ; + _nb_inst_update = nb_inst_update ; + + _size_context_id = log2(_nb_context); + _size_inst_ifetch_ptr = new uint32_t [_nb_context]; + + _have_port_context_id = (_size_context_id>0); + _have_port_depth = new bool [_nb_context]; + _have_port_inst_ifetch_ptr = new bool [_nb_context]; + + for (uint32_t i=0; i<_nb_context; i++) + { + _size_inst_ifetch_ptr [i] = log2(_nb_instruction [i]); + _have_port_depth [i] = (_size_depth [i] > 0); + _have_port_inst_ifetch_ptr [i] = (_size_inst_ifetch_ptr [i] > 0); + } + + test(); + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +// #undef FUNCTION +// #define FUNCTION "Prediction_unit_Glue::Parameters (copy)" +// Parameters::Parameters (Parameters & param) +// { +// log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); +// test(); +// log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); +// }; + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::~Parameters" + Parameters::~Parameters () + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + delete [] _size_inst_ifetch_ptr ; + delete [] _have_port_depth ; + delete [] _have_port_inst_ifetch_ptr; + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters_msg_error.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters_msg_error.cpp (revision 81) @@ -0,0 +1,44 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Types.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h" +#include + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::msg_error" + Parameters_test Parameters::msg_error(void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + Parameters_test test ("Prediction_unit_Glue"); + + if (_nb_inst_predict > _nb_context) + test.error("nb_inst_predict must be <= nb_context\n"); + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + + return test; + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters_print.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Parameters_print.cpp (revision 81) @@ -0,0 +1,72 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Parameters.h" +#include "Behavioural/include/XML.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::print" + std::string Parameters::print (uint32_t depth) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + XML xml ("prediction_unit_glue"); + + xml.balise_open("prediction_unit_glue"); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict"); xml.attribut("value",toString(_nb_inst_predict)); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_context; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction [i])); xml.singleton_end(); + xml. singleton_begin("size_depth "); xml.attribut("value",toString(_size_depth [i])); xml.singleton_end(); + xml. balise_close(); + } + xml.balise_close(); + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + + return xml.get_body(depth); + }; + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::operator<<" + std::ostream& operator<< (std::ostream& output_stream , + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters & x) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + output_stream << x.print(0); + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + + return output_stream; + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue.cpp (revision 81) @@ -0,0 +1,899 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::Prediction_unit_Glue" + Prediction_unit_Glue::Prediction_unit_Glue + ( +#ifdef SYSTEMC + sc_module_name name, +#else + string name, +#endif +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics, +#endif + morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::prediction_unit_glue::Parameters * param, + morpheo::behavioural::Tusage_t usage + ): + _name (name) + ,_param (param) + ,_usage (usage) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + usage_environment(_usage); + + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Allocation"); + + allocation ( +#ifdef STATISTICS + param_statistics +#endif + ); + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + { + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Allocation of statistics"); + + statistics_allocation(param_statistics); + } +#endif + +#ifdef VHDL + if (usage_is_set(_usage,USE_VHDL)) + { + // generate the vhdl + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Generate the vhdl"); + + vhdl(); + } +#endif + +#ifdef SYSTEMC + if (usage_is_set(_usage,USE_SYSTEMC)) + { + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Method - transition"); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Method - genMealy_predict"); + + SC_METHOD (genMealy_predict); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_context; i++) + { + sensitive << (*( in_PREDICT_VAL [i])) + << (*( in_PREDICT_PC_PREVIOUS [i])) + << (*( in_PREDICT_PC_CURRENT [i])) + << (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + sensitive << (*( in_PREDICT_BTB_ACK [i])) + << (*( in_PREDICT_BTB_HIT [i])) + << (*( in_PREDICT_BTB_ADDRESS_SRC [i])) + << (*( in_PREDICT_BTB_ADDRESS_DEST [i])) + << (*( in_PREDICT_BTB_CONDITION [i])) +// << (*( in_PREDICT_BTB_LAST_TAKE [i])) + << (*( in_PREDICT_BTB_IS_ACCURATE [i])) + << (*( in_PREDICT_DIR_ACK [i])) +// << (*( in_PREDICT_DIR_HISTORY [i])) + << (*( in_PREDICT_DIR_DIRECTION [i])) + << (*( in_PREDICT_RAS_ACK [i])) + << (*( in_PREDICT_RAS_HIT [i])) + << (*( in_PREDICT_RAS_ADDRESS_POP [i])) +// << (*( in_PREDICT_RAS_INDEX [i])) + << (*( in_PREDICT_UPT_ACK [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t x=0; x<_param->_nb_context; x++) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_ACK [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_ACK [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_ACK [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_PC_NEXT [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_PC_NEXT_IS_DS_TAKE [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + if (_param->_have_port_inst_ifetch_ptr [x]) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_INST_IFETCH_PTR [x])) (*( in_PREDICT_UPT_ACK [i])); + } + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_BRANCH_STATE [x]))(*( in_PREDICT_VAL [i])); + (*(out_PREDICT_BRANCH_STATE [x]))(*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_BRANCH_STATE [x]))(*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_BRANCH_STATE [x]))(*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_BRANCH_STATE [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + if (_param->_have_port_depth [x]) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x])) (*( in_PREDICT_UPT_ACK [i])); + } + } + + for (uint32_t y=0; y<_param->_nb_instruction[x]; y++) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_INSTRUCTION_ENABLE [x][y])) (*( in_PREDICT_UPT_ACK [i])); + } + } + } + + for (uint32_t x=0; x<_param->_nb_inst_predict; x++) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_BTB_VAL [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + if (_param->_have_port_context_id) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_BTB_CONTEXT_ID [x])) (*( in_PREDICT_UPT_ACK [i])); + } + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_BTB_ADDRESS [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_DIR_VAL [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_DIR_ADDRESS_SRC [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_DIR_STATIC [x])) (*( in_PREDICT_UPT_ACK [i])); + } + +// for (uint32_t i=0; i<_param->_nb_context; i++) +// { +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_VAL [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_PC_PREVIOUS [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_PC_CURRENT [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); +// } +// for (uint32_t i=0; i<_param->_nb_inst_predict; i++) +// { +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_ACK [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_HIT [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// // (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_DIR_ACK [i])); +// // (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_DIR_HISTORY [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_DIR_DIRECTION [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_RAS_ACK [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_RAS_HIT [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// // (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_RAS_INDEX [i])); +// (*(out_PREDICT_DIR_LAST_TAKE [x])) (*( in_PREDICT_UPT_ACK [i])); +// } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_RAS_VAL [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + if (_param->_have_port_context_id) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_RAS_CONTEXT_ID [x])) (*( in_PREDICT_UPT_ACK [i])); + } + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_RAS_PUSH [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_RAS_ADDRESS_PUSH [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_VAL [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + if (_param->_have_port_context_id) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_CONTEXT_ID [x])) (*( in_PREDICT_UPT_ACK [i])); + } + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_SRC [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_BTB_ADDRESS_DEST [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_BTB_CONDITION [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_BTB_LAST_TAKE [x])) (*( in_PREDICT_UPT_ACK [i])); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_BTB_IS_ACCURATE [x])) (*( in_PREDICT_UPT_ACK [i])); + } + +// for (uint32_t i=0; i<_param->_nb_context; i++) +// { +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_VAL [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_PC_PREVIOUS [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_PC_CURRENT [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); +// } +// for (uint32_t i=0; i<_param->_nb_inst_predict; i++) +// { +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_ACK [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_HIT [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// // (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_DIR_ACK [i])); +// // (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_DIR_HISTORY [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_DIR_DIRECTION [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_RAS_ACK [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_RAS_HIT [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// // (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_RAS_INDEX [i])); +// (*(out_PREDICT_UPT_DIR_HISTORY [x])) (*( in_PREDICT_UPT_ACK [i])); +// } + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_VAL [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_PC_PREVIOUS [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_PC_CURRENT [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); + } + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_ACK [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_HIT [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_DIR_ACK [i])); +// (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_DIR_HISTORY [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_DIR_DIRECTION [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_RAS_ACK [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_RAS_HIT [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_RAS_INDEX [i])); + (*(out_PREDICT_UPT_RAS_ADDRESS [x])) (*( in_PREDICT_UPT_ACK [i])); + } + +// for (uint32_t i=0; i<_param->_nb_context; i++) +// { +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_VAL [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_PC_PREVIOUS [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_PC_CURRENT [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_PC_CURRENT_IS_DS_TAKE [i])); +// } +// for (uint32_t i=0; i<_param->_nb_inst_predict; i++) +// { +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_ACK [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_HIT [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_ADDRESS_SRC [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_ADDRESS_DEST [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_CONDITION [i])); +// // (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_LAST_TAKE [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_BTB_IS_ACCURATE [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_DIR_ACK [i])); +// // (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_DIR_HISTORY [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_DIR_DIRECTION [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_RAS_ACK [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_RAS_HIT [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_RAS_ADDRESS_POP [i])); +// // (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_RAS_INDEX [i])); +// (*(out_PREDICT_UPT_RAS_INDEX [x])) (*( in_PREDICT_UPT_ACK [i])); +// } + } +# endif + +#endif + } + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::~Prediction_unit_Glue" + Prediction_unit_Glue::~Prediction_unit_Glue (void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + { + statistics_deallocation(); + } +#endif + + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Deallocation"); + deallocation (); + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_allocation.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_allocation.cpp (revision 81) @@ -0,0 +1,162 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::allocation" + void Prediction_unit_Glue::allocation + ( +#ifdef STATISTICS + morpheo::behavioural::Parameters_Statistics * param_statistics +#else + void +#endif + ) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + _component = new Component (_usage); + + Entity * entity = _component->set_entity (_name + ,"Prediction_unit_Glue" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + { + ALLOC1_INTERFACE("predict",IN,SOUTH,"Interface with ifetch unit",_param->_nb_context); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_PC_PREVIOUS ,"pc_previous" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_PC_CURRENT ,"pc_current" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_PC_CURRENT_IS_DS_TAKE ,"pc_current_is_ds_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_PC_NEXT ,"pc_next" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_PC_NEXT_IS_DS_TAKE ,"pc_next_is_ds_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr [alloc_signal_it1]); + ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); + ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth [alloc_signal_it1]); + } + { + ALLOC2_INTERFACE("predict",IN,SOUTH,"Interface with ifetch unit",_param->_nb_context,_param->_nb_instruction[alloc_interface_it1]); + _ALLOC2_SIGNAL_OUT(out_PREDICT_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]); + } + + { + ALLOC1_INTERFACE("predict_btb",OUT,NORTH,"Interface with ifetch unit",_param->_nb_inst_predict); + + ALLOC1_VALACK_OUT(out_PREDICT_BTB_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PREDICT_BTB_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PREDICT_BTB_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT(out_PREDICT_BTB_ADDRESS ,"address" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_HIT ,"hit" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_SRC ,"address_src" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_DEST,"address_dest",Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); +// ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_IS_ACCURATE ,"is_accurate" ,Tcontrol_t ,1); + } + + { + ALLOC1_INTERFACE("predict_dir",OUT,NORTH,"Interface with ifetch unit",_param->_nb_inst_predict); + + ALLOC1_VALACK_OUT(out_PREDICT_DIR_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PREDICT_DIR_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIR_ADDRESS_SRC,"address_src",Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIR_STATIC ,"static" ,Tcontrol_t ,1); +// ALLOC1_SIGNAL_OUT(out_PREDICT_DIR_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); +// ALLOC1_SIGNAL_IN ( in_PREDICT_DIR_HISTORY ,"history" ,Thistory_t ,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_PREDICT_DIR_DIRECTION ,"direction" ,Tcontrol_t ,1); + } + + { + ALLOC1_INTERFACE("predict_ras",OUT,NORTH,"Interface with ifetch unit",_param->_nb_inst_predict); + + ALLOC1_VALACK_OUT(out_PREDICT_RAS_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PREDICT_RAS_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PREDICT_RAS_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_HIT ,"hit" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_RAS_PUSH ,"push" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_RAS_ADDRESS_PUSH,"address_push",Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_ADDRESS_POP ,"address_pop" ,Taddress_t ,_param->_size_address); +// ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_INDEX ,"index" ,Tptr_t ,_param->_size_ras_index); + } + + { + ALLOC1_INTERFACE("predict_upt",OUT,NORTH,"Interface with ifetch unit",_param->_nb_inst_predict); + + ALLOC1_VALACK_OUT(out_PREDICT_UPT_VAL ,VAL); + ALLOC1_VALACK_IN ( in_PREDICT_UPT_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_BTB_ADDRESS_DEST,"btb_address_dest",Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_BTB_LAST_TAKE ,"btb_last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_BTB_IS_ACCURATE ,"btb_is_accurate" ,Tcontrol_t ,1); +// ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_DIR_HISTORY ,"dir_history" ,Thistory_t ,_param->_size_history); + ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); +// ALLOC1_SIGNAL_OUT(out_PREDICT_UPT_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_size_ras_index); + } + } + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("depth",IN,NORTH,"Interface with depth",_param->_nb_context); + + ALLOC1_SIGNAL_IN (in_DEPTH_UPT_NB_BRANCH,"upt_nb_branch",Tdepth_t,_param->_size_depth[alloc_signal_it1]); + ALLOC1_SIGNAL_IN (in_DEPTH_UPT_TAIL ,"upt_tail" ,Tdepth_t,_param->_size_depth[alloc_signal_it1]); + } + + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + if (usage_is_set(_usage,USE_POSITION)) + _component->generate_file(); +#endif + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_deallocation.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_deallocation.cpp (revision 81) @@ -0,0 +1,98 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" +#include "Behavioural/include/Allocation.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::deallocation" + void Prediction_unit_Glue::deallocation (void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + if (usage_is_set(_usage,USE_SYSTEMC)) + { + delete in_CLOCK ; + delete in_NRESET; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + DELETE1_SIGNAL( in_PREDICT_VAL ,_param->_nb_context ,1); + DELETE1_SIGNAL(out_PREDICT_ACK ,_param->_nb_context ,1); + DELETE1_SIGNAL( in_PREDICT_PC_PREVIOUS ,_param->_nb_context ,_param->_size_address); + DELETE1_SIGNAL( in_PREDICT_PC_CURRENT ,_param->_nb_context ,_param->_size_address); + DELETE1_SIGNAL( in_PREDICT_PC_CURRENT_IS_DS_TAKE ,_param->_nb_context ,1); + DELETE1_SIGNAL(out_PREDICT_PC_NEXT ,_param->_nb_context ,_param->_size_address); + DELETE1_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context ,1); + DELETE1_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context ,_param->_size_inst_ifetch_ptr [alloc_signal_it1]); + DELETE1_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_context ,_param->_size_branch_state); + DELETE1_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context ,_param->_size_depth [alloc_signal_it1]); + DELETE2_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context ,_param->_nb_instruction[alloc_signal_it1],1); + DELETE1_SIGNAL(out_PREDICT_BTB_VAL ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL( in_PREDICT_BTB_ACK ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_BTB_CONTEXT_ID ,_param->_nb_inst_predict,_param->_size_context_id); + DELETE1_SIGNAL(out_PREDICT_BTB_ADDRESS ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL( in_PREDICT_BTB_HIT ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL( in_PREDICT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL( in_PREDICT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL( in_PREDICT_BTB_CONDITION ,_param->_nb_inst_predict,_param->_size_branch_condition); +// DELETE1_SIGNAL( in_PREDICT_BTB_LAST_TAKE ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL( in_PREDICT_BTB_IS_ACCURATE ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_DIR_VAL ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL( in_PREDICT_DIR_ACK ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_DIR_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL(out_PREDICT_DIR_STATIC ,_param->_nb_inst_predict,1); +// DELETE1_SIGNAL(out_PREDICT_DIR_LAST_TAKE ,_param->_nb_inst_predict,1); +// DELETE1_SIGNAL( in_PREDICT_DIR_HISTORY ,_param->_nb_inst_predict,_param->_size_history); + DELETE1_SIGNAL( in_PREDICT_DIR_DIRECTION ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_RAS_VAL ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL( in_PREDICT_RAS_ACK ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_RAS_CONTEXT_ID ,_param->_nb_inst_predict,_param->_size_context_id); + DELETE1_SIGNAL( in_PREDICT_RAS_HIT ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_RAS_PUSH ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_RAS_ADDRESS_PUSH ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL( in_PREDICT_RAS_ADDRESS_POP ,_param->_nb_inst_predict,_param->_size_address); +// DELETE1_SIGNAL( in_PREDICT_RAS_INDEX ,_param->_nb_inst_predict,_param->_size_ras_index); + DELETE1_SIGNAL(out_PREDICT_UPT_VAL ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL( in_PREDICT_UPT_ACK ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_UPT_CONTEXT_ID ,_param->_nb_inst_predict,_param->_size_context_id); + DELETE1_SIGNAL(out_PREDICT_UPT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL(out_PREDICT_UPT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL(out_PREDICT_UPT_BTB_CONDITION ,_param->_nb_inst_predict,_param->_size_branch_condition); + DELETE1_SIGNAL(out_PREDICT_UPT_BTB_LAST_TAKE ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_UPT_BTB_IS_ACCURATE ,_param->_nb_inst_predict,1); +// DELETE1_SIGNAL(out_PREDICT_UPT_DIR_HISTORY ,_param->_nb_inst_predict,_param->_size_history); + DELETE1_SIGNAL(out_PREDICT_UPT_RAS_ADDRESS ,_param->_nb_inst_predict,_param->_size_address); +// DELETE1_SIGNAL(out_PREDICT_UPT_RAS_INDEX ,_param->_nb_inst_predict,_param->_size_ras_index); + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + DELETE1_SIGNAL( in_DEPTH_UPT_NB_BRANCH,_param->_nb_context,_param->_size_depth[alloc_signal_it1]); + DELETE1_SIGNAL( in_DEPTH_UPT_TAIL ,_param->_nb_context,_param->_size_depth[alloc_signal_it1]); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_end_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_end_cycle.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_end_cycle.cpp (revision 81) @@ -0,0 +1,49 @@ +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::end_cycle" +void Prediction_unit_Glue::end_cycle () + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + _stat->end_cycle(); +#endif + +#ifdef VHDL_TESTBENCH + // Evaluation before read the ouput signal +// sc_start(0); + if (usage_is_set(_usage,USE_VHDL_TESTBENCH)) + _interfaces->testbench(); +#endif + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (revision 81) @@ -0,0 +1,306 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::genMealy_predict" + void Prediction_unit_Glue::genMealy_predict (void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + Tcontrol_t ack [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + ack [i] = 0; + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"PREDICT [%d]",i); + + Tcontrol_t btb_val; + Tcontrol_t dir_val; + Tcontrol_t ras_val; + Tcontrol_t upt_val; + + Tcontext_t context = (reg_PREDICT_PRIORITY+i)%_param->_nb_context; + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * context : %d",context); + + ack [context] = 1; + + if (PORT_READ(in_PREDICT_VAL[context]) == 0) + { + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * not valid ..."); + + btb_val = false; + dir_val = false; + ras_val = false; + upt_val = false; + } + else + { + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * valid ..."); + + Taddress_t pc_previous = PORT_READ(in_PREDICT_PC_PREVIOUS [context]); + Taddress_t pc_current = PORT_READ(in_PREDICT_PC_CURRENT [context]); + Tcontrol_t pc_current_is_ds_take = PORT_READ(in_PREDICT_PC_CURRENT_IS_DS_TAKE [context]); + + Taddress_t pc_next ; + Tcontrol_t pc_next_is_ds_take ; + Tbranch_state_t branch_state ; + Tprediction_ptr_t branch_update_prediction_id ; + Tinst_ifetch_ptr_t inst_ifetch_ptr ; + + // STEP (1) - Compute the address source + Taddress_t address = (pc_current_is_ds_take)?pc_previous:pc_current; + Taddress_t address_lsb = pc_current%_param->_nb_instruction [context]; //if pc_current_is_ds_take, then pc_current%_param->_nb_instruction [context] == 0 + Taddress_t address_msb; + + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * address : 0x%x",address); + + // STEP (2) - Test if branch (access at branch_target_buffer) + btb_val = true; + ack [context] &= PORT_READ(in_PREDICT_BTB_ACK [i]); + + if (_param->_have_port_context_id) + PORT_WRITE(out_PREDICT_BTB_CONTEXT_ID [i],context); + PORT_WRITE(out_PREDICT_BTB_ADDRESS [i],address); + + // special case : + // if pc_current_is_ds, then pc_previous have branch, also hit must be set. + // else : a another branch have eject this branch : can't accurate + Tcontrol_t hit = PORT_READ(in_PREDICT_BTB_HIT[i]); + Tcontrol_t is_accurate = PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]) and not (pc_current_is_ds_take and not hit); + + // STEP (3) : Test if have branch in the packet + if (hit == 1) + { + // STEP (3a) : branch - test condition + + bool use_dir = false; + bool use_ras = false; + bool use_upt = false; + + Tbranch_condition_t cond = PORT_READ(in_PREDICT_BTB_CONDITION [i]); + Taddress_t address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); + Taddress_t address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); + Tcontrol_t push; + Tcontrol_t direction; + + switch (cond) + { + case BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK : // l.j + { + // use none unit (dir, upt and ras) + direction = true; + pc_next = address_dest; + branch_state = BRANCH_STATE_NSPEC_TAKE; + break; + } + case BRANCH_CONDITION_NONE_WITH_WRITE_STACK : // l.jal + { + use_upt = true; + use_ras = true; + push = true; + direction = true; + pc_next = address_dest; + branch_state = BRANCH_STATE_NSPEC_TAKE; + break; + } + case BRANCH_CONDITION_FLAG_UNSET : // l.bnf + case BRANCH_CONDITION_FLAG_SET : // l.bf + { + use_upt = true; + use_dir = true; + // Test direction + direction = PORT_READ(in_PREDICT_DIR_DIRECTION [i]); // Direction is not the "flag predict" ... also flag_unset and flag_set is the same + if (direction = 1) + { + branch_state = BRANCH_STATE_SPEC_TAKE; + pc_next = address_dest; + } + else + { + branch_state = BRANCH_STATE_SPEC_NTAKE; + pc_next = address_src+8; // +4 = delay slot + } + break; + } + case BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK : // l.jr (rb!=9) + { + use_upt = true; + use_ras = true; + push = true; + direction = true; + pc_next = address_dest; + branch_state = BRANCH_STATE_SPEC_TAKE; + break; + } + case BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK : // l.jalr + { + use_upt = true; + use_ras = true; + push = true; + direction = true; + pc_next = address_dest; + branch_state = BRANCH_STATE_NSPEC_TAKE; + break; + } + case BRANCH_CONDITION_READ_STACK : // l.jr (rb==9) + { + use_upt = true; + use_ras = true; + push = false; + direction = true; + pc_next = PORT_READ(in_PREDICT_RAS_ADDRESS_POP [i]); + branch_state = BRANCH_STATE_SPEC_TAKE; + break; + } + default : + { + ERRORMORPHEO(FUNCTION,"Unknow Condition"); + break; + } + } + + if (use_dir) + { + ack[context] &= PORT_READ(in_PREDICT_DIR_ACK [i]); + PORT_WRITE(out_PREDICT_DIR_ADDRESS_SRC [i], address_src); + PORT_WRITE(out_PREDICT_DIR_STATIC [i], address_dest_have_port_context_id) + PORT_WRITE(out_PREDICT_RAS_CONTEXT_ID [i], context); + PORT_WRITE(out_PREDICT_RAS_PUSH [i], push); + PORT_WRITE(out_PREDICT_RAS_ADDRESS_PUSH [i], address_src+8); + + is_accurate &= PORT_READ(in_PREDICT_RAS_HIT [i]); // if miss - prediction is not accurate + } + + if (use_upt) + { + ack[context] &= PORT_READ(in_PREDICT_UPT_ACK [i]); + + PORT_WRITE(out_PREDICT_UPT_CONTEXT_ID [i],context); + PORT_WRITE(out_PREDICT_UPT_BTB_ADDRESS_SRC [i],address_src); + PORT_WRITE(out_PREDICT_UPT_BTB_ADDRESS_DEST [i],address_dest); + PORT_WRITE(out_PREDICT_UPT_BTB_CONDITION [i],cond); + PORT_WRITE(out_PREDICT_UPT_BTB_LAST_TAKE [i],direction); + PORT_WRITE(out_PREDICT_UPT_BTB_IS_ACCURATE [i],is_accurate); +// PORT_WRITE(out_PREDICT_UPT_DIR_HISTORY [i],PORT_READ(in_PREDICT_DIR_HISTORY [i])); + PORT_WRITE(out_PREDICT_UPT_RAS_ADDRESS [i],PORT_READ(in_PREDICT_RAS_ADDRESS_POP [i])); +// PORT_WRITE(out_PREDICT_UPT_RAS_INDEX [i],PORT_READ(in_PREDICT_RAS_INDEX [i])); + } + + // ack = 1 if : + // * btb_ack + // * use_dir and dir_ack + // * use_ras and ras_ack + // * use_upt and upt_ack +// ack [context] = (PORT_READ(in_PREDICT_BTB_ACK [i]) and +// (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i])) and +// (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i])) and +// (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i]))); + + dir_val = (PORT_READ(in_PREDICT_BTB_ACK [i]) and + (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i])) and + (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i]))); + + ras_val = (PORT_READ(in_PREDICT_BTB_ACK [i]) and + (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i])) and + (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i]))); + + upt_val = (PORT_READ(in_PREDICT_BTB_ACK [i]) and + (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i])) and + (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i]))); + +// pc_next - is previously computed +// branch_state - is previously computed + + Taddress_t address_src_lsb = address_src%_param->_nb_instruction [context]; + + if (address_src_lsb == (_param->_nb_instruction [context]-1)) + { + // branch is in the last slot of the packet + address_msb = _param->_nb_instruction [context]; // == (address_src_lsb+1) + pc_next_is_ds_take = 1; + } + else + { + // branch is in the last slot of the packet + address_msb = (address_src_lsb+2); // +1 == delayed slot + pc_next_is_ds_take = 0; + } + + inst_ifetch_ptr = address_src_lsb; + branch_update_prediction_id = (PORT_READ(in_DEPTH_UPT_TAIL[context])+PORT_READ(in_DEPTH_UPT_NB_BRANCH [context]))%_param->_size_depth[context]; + } + else + { + // STEP (3b) : Sequential order : compute next paquet + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * BTB miss : sequential order"); + + pc_next = address-address_lsb+_param->_nb_instruction [context]; // sequencial + pc_next_is_ds_take = 0; // no branch, also no delay slot + inst_ifetch_ptr = 0; + branch_state = BRANCH_STATE_NONE; + branch_update_prediction_id = 0; + + address_msb = _param->_nb_instruction [context]; + } + + PORT_WRITE(out_PREDICT_PC_NEXT [context] , pc_next ); + PORT_WRITE(out_PREDICT_PC_NEXT_IS_DS_TAKE [context] , pc_next_is_ds_take ); + for (uint32_t j=0; j_nb_instruction [context]; j++) + PORT_WRITE(out_PREDICT_INSTRUCTION_ENABLE [context][j], 0); // After last address (branch) : not valid + if (_param->_have_port_inst_ifetch_ptr[context]) + PORT_WRITE(out_PREDICT_INST_IFETCH_PTR [context] , inst_ifetch_ptr ); + PORT_WRITE(out_PREDICT_BRANCH_STATE [context] , branch_state ); + if (_param->_have_port_depth[context]) + PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [context] , branch_update_prediction_id); + } + + // Write output + PORT_WRITE(out_PREDICT_BTB_VAL [i], btb_val); + PORT_WRITE(out_PREDICT_DIR_VAL [i], dir_val); + PORT_WRITE(out_PREDICT_RAS_VAL [i], ras_val); + PORT_WRITE(out_PREDICT_UPT_VAL [i], upt_val); + } + + for (uint32_t i=0; i<_param->_nb_context; i++) + PORT_WRITE(out_PREDICT_ACK[i],ack[i]); + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_statistics_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_statistics_allocation.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_statistics_allocation.cpp (revision 81) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::statistics_allocation" + void Prediction_unit_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + _stat = new Stat (static_cast(_name), + "Prediction_unit_Glue", + param_statistics); + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_statistics_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_statistics_deallocation.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_statistics_deallocation.cpp (revision 81) @@ -0,0 +1,41 @@ +#ifdef STATISTICS +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::statistics_deallocation" + void Prediction_unit_Glue::statistics_deallocation (void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + log_printf(INFO,Prediction_unit_Glue,FUNCTION,"Generate Statistics file"); + + delete _stat; + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_transition.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_transition.cpp (revision 81) @@ -0,0 +1,50 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::transition" + void Prediction_unit_Glue::transition (void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + if (PORT_READ(in_NRESET) == 0) + { + reg_PREDICT_PRIORITY = 0; + } + else + { + // Round robin priority + reg_PREDICT_PRIORITY = (reg_PREDICT_PRIORITY+_param->_nb_inst_predict)%_param->_nb_context; + } +#if defined(STATISTICS) or defined(VHDL_TESTBENCH) + end_cycle (); +#endif + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl.cpp (revision 81) @@ -0,0 +1,50 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" +#include "Behavioural/include/Vhdl.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::vhdl" + void Prediction_unit_Glue::vhdl (void) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + + Vhdl * vhdl = new Vhdl (_name); + + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); + + vhdl_declaration (vhdl); + vhdl_body (vhdl); + + vhdl->generate_file(); + + delete vhdl; + + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl_body.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl_body.cpp (revision 81) @@ -0,0 +1,37 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::vhdl_body" + void Prediction_unit_Glue::vhdl_body (Vhdl * & vhdl) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + vhdl->set_body (""); + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl_declaration.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_vhdl_declaration.cpp (revision 81) @@ -0,0 +1,36 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace prediction_unit_glue { + + +#undef FUNCTION +#define FUNCTION "Prediction_unit_Glue::vhdl_declaration" + void Prediction_unit_Glue::vhdl_declaration (Vhdl * & vhdl) + { + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Prediction_unit_Glue,FUNCTION,"End"); + }; + +}; // end namespace prediction_unit_glue +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg (revision 81) @@ -1,5 +1,5 @@ Return_Address_Stack 1 1 +1 # nb_context -2 2 *2 # size_queue [0] +2 4 *2 # size_queue [0] 32 32 *2 # size_address 1 1 +1 # nb_inst_predict Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp (revision 81) @@ -11,6 +11,6 @@ #include "Behavioural/include/Allocation.h" -#define NB_ITERATION 1024 -#define CYCLE_MAX (128*NB_ITERATION) +#define NB_ITERATION 16 +#define CYCLE_MAX (1024*NB_ITERATION) #define LABEL(str...) \ @@ -21,23 +21,21 @@ } while(0) -#define SC_START(cycle_offset) \ - do \ - { \ - /*cout << "SC_START (begin)" << endl;*/ \ - \ - uint32_t cycle_current = static_cast(sc_simulation_time()); \ - if (cycle_offset != 0) \ - { \ - cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ - } \ - \ - if (cycle_current > CYCLE_MAX) \ - { \ - TEST_KO("Maximal cycles Reached"); \ - } \ - \ - sc_start(cycle_offset); \ - \ - /*cout << "SC_START (end )" << endl;*/ \ +#define SC_START(cycle_offset) \ + do \ + { \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]"; \ + cout << " (" << __LINE__ << ")" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ } while(0) @@ -90,4 +88,5 @@ ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update ); ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t,_param->_nb_inst_update ); + ALLOC1_SC_SIGNAL( in_UPDATE_PREDICTION_IFETCH," in_UPDATE_PREDICTION_IFETCH",Tcontrol_t,_param->_nb_inst_update ); /******************************************************** @@ -127,4 +126,5 @@ INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_ADDRESS ,_param->_nb_inst_update ); INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update ); + INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_PREDICTION_IFETCH,_param->_nb_inst_update ); msg(_("<%s> : Start Simulation ............\n"),name.c_str()); @@ -157,5 +157,276 @@ LABEL("Iteration %d",iteration); - SC_START(1); + if (1) + { + uint32_t port = rand()%_param->_nb_inst_predict; + + LABEL("PREDICT - PUSH"); + + in_PREDICT_VAL [port]->write(1); + in_PREDICT_PUSH [port]->write(1); + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_size_queue[i]; j++) + { + in_PREDICT_CONTEXT_ID [port]->write(i); + in_PREDICT_ADDRESS_PUSH [port]->write(0xdeadbeef+j); + + SC_START(0); + + TEST(Tcontrol_t, out_PREDICT_ACK [port]->read(), 1); + TEST(Tptr_t , out_PREDICT_INDEX[port]->read(),(j+1)%_param->_size_queue[i]); + + SC_START(1); + + } + in_PREDICT_VAL [port]->write(0); + + SC_START(1); + + in_PREDICT_VAL [port]->write(1); + in_PREDICT_PUSH [port]->write(1); + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_size_queue[i]; j++) + { + in_PREDICT_CONTEXT_ID [port]->write(i); + in_PREDICT_ADDRESS_PUSH [port]->write(0x21071981+j); + + SC_START(0); + + TEST(Tcontrol_t, out_PREDICT_ACK [port]->read(), 1); + TEST(Tptr_t , out_PREDICT_INDEX [port]->read(),(j+1)%_param->_size_queue[i]); + TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port]->read(),0xdeadbeef+j); + + SC_START(1); + } + in_PREDICT_VAL [port]->write(0); + + LABEL("PREDICT - POP"); + + in_PREDICT_VAL [port]->write(1); + in_PREDICT_PUSH [port]->write(0); + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j< _param->_size_queue[i]; j++) + { + in_PREDICT_CONTEXT_ID [port]->write(i); + in_PREDICT_ADDRESS_PUSH [port]->write(0xbabedead); + + SC_START(0); + + TEST(Tcontrol_t, out_PREDICT_ACK [port]->read(), 1); + TEST(Tcontrol_t, out_PREDICT_HIT [port]->read(), 1); + uint32_t k=(_param->_size_queue[i]-j)%_param->_size_queue[i]; + TEST(Tptr_t , out_PREDICT_INDEX [port]->read(), k); + TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port]->read(),(0x21071981+((k==0)?(_param->_size_queue[i]-1):(k-1)))); + + SC_START(1); + } + in_PREDICT_VAL [port]->write(0); + } + + // Now, the stack is empty + + if (1) + { + uint32_t port1 = rand()%_param->_nb_inst_decod; + uint32_t port2 = rand()%_param->_nb_inst_predict; + + LABEL("DECOD - without predict"); + + LABEL("DECOD - PUSH"); + + in_DECOD_VAL [port1]->write(1); + in_DECOD_PUSH [port1]->write(1); + in_DECOD_MISS_PREDICTION [port1]->write(0); + + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_size_queue[i]; j++) + { + in_DECOD_CONTEXT_ID [port1]->write(i); + in_DECOD_ADDRESS_PUSH [port1]->write(0xbeefcaca+j); + + SC_START(0); + + TEST(Tcontrol_t, out_DECOD_ACK [port1]->read(), 1); + TEST(Tptr_t , out_DECOD_INDEX[port1]->read(),(j+1)%_param->_size_queue[i]); + + SC_START(1); + + } + in_DECOD_VAL [port1]->write(0); + + SC_START(1); + + in_DECOD_VAL [port1]->write(1); + in_DECOD_PUSH [port1]->write(1); + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_size_queue[i]; j++) + { + in_DECOD_CONTEXT_ID [port1]->write(i); + in_DECOD_ADDRESS_PUSH [port1]->write(0x21071981+j); + + SC_START(0); + + TEST(Tcontrol_t, out_DECOD_ACK [port1]->read(), 1); + TEST(Tptr_t , out_DECOD_INDEX [port1]->read(),(j+1)%_param->_size_queue[i]); + TEST(Taddress_t, out_DECOD_ADDRESS_POP[port1]->read(),0xbeefcaca+j); + + SC_START(1); + } + in_DECOD_VAL [port1]->write(0); + + LABEL("DECOD - POP"); + + in_DECOD_VAL [port1]->write(1); + in_DECOD_PUSH [port1]->write(0); + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j< _param->_size_queue[i]; j++) + { + in_DECOD_CONTEXT_ID [port1]->write(i); + in_DECOD_ADDRESS_PUSH [port1]->write(0xbabedead); + + SC_START(0); + + TEST(Tcontrol_t, out_DECOD_ACK [port1]->read(), 1); + TEST(Tcontrol_t, out_DECOD_HIT [port1]->read(), 1); + uint32_t k=(_param->_size_queue[i]-j)%_param->_size_queue[i]; + TEST(Tptr_t , out_DECOD_INDEX [port1]->read(), k); + TEST(Taddress_t, out_DECOD_ADDRESS_POP[port1]->read(),(0x21071981+((k==0)?(_param->_size_queue[i]-1):(k-1)))); + + SC_START(1); + } + in_DECOD_VAL [port1]->write(0); + + LABEL("DECOD - with predict"); + + LABEL("DECOD - PUSH (size_queue/2)"); + + in_DECOD_VAL [port1]->write(1); + in_DECOD_PUSH [port1]->write(1); + in_DECOD_MISS_PREDICTION [port1]->write(1); + + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_size_queue[i]/2;j++) + { + in_DECOD_CONTEXT_ID [port1]->write(i); + in_DECOD_ADDRESS_PUSH [port1]->write(0x01234567+j); + + SC_START(0); + + TEST(Tcontrol_t, out_DECOD_ACK [port1]->read(), 1); + TEST(Tptr_t , out_DECOD_INDEX[port1]->read(),(j+1)%_param->_size_queue[i]); + + SC_START(1); + + } + in_DECOD_VAL [port1]->write(0); + + LABEL("PREDICT - PUSH (size_queue/2)"); + + in_PREDICT_VAL [port2]->write(1); + in_PREDICT_PUSH [port2]->write(1); + + for (uint32_t i=0; i<_param->_nb_context; i++) + for (uint32_t j=0; j<_param->_size_queue[i]/2;j++) + { + in_PREDICT_CONTEXT_ID [port2]->write(i); + in_PREDICT_ADDRESS_PUSH [port2]->write((0x89abcdef+j)+(_param->_size_queue[i]/2)); + + SC_START(0); + + TEST(Tcontrol_t, out_PREDICT_ACK [port2]->read(), 1); + TEST(Tptr_t , out_PREDICT_INDEX[port2]->read(),(j+1+(_param->_size_queue[i]/2))%_param->_size_queue[i]); + + SC_START(1); + } + + in_PREDICT_VAL [port2]->write(0); + + LABEL("PREDICT - POP (size_queue/2)"); + + in_PREDICT_VAL [port2]->write(1); + in_PREDICT_PUSH [port2]->write(0); + for (uint32_t i=0; i<_param->_nb_context; i++) + { + for (uint32_t j=0; j< _param->_size_queue[i]/2; j++) + { + in_PREDICT_CONTEXT_ID [port2]->write(i); + in_PREDICT_ADDRESS_PUSH [port2]->write(0xbabedead); + + SC_START(0); + + TEST(Tcontrol_t, out_PREDICT_ACK [port2]->read(), 1); + TEST(Tcontrol_t, out_PREDICT_HIT [port2]->read(), 1); + uint32_t k= (_param->_size_queue[i]-j)%_param->_size_queue[i]; + TEST(Tptr_t , out_PREDICT_INDEX [port2]->read(), k); + + Taddress_t res = (0x89abcdef+((k==0)?(_param->_size_queue[i]-1):(k-1))); + LABEL("k : %d",k); + LABEL("res : %x",res); + LABEL("@_pop : %x",out_PREDICT_ADDRESS_POP[port2]->read()); + + TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port2]->read(),res); + + SC_START(1); + } + + for (uint32_t j=0; j< _param->_size_queue[i]/2; j++) + { + in_PREDICT_CONTEXT_ID [port2]->write(i); + in_PREDICT_ADDRESS_PUSH [port2]->write(0xbabedead); + + SC_START(0); + + TEST(Tcontrol_t, out_PREDICT_ACK [port2]->read(), 1); + TEST(Tcontrol_t, out_PREDICT_HIT [port2]->read(), 1); + uint32_t k=(_param->_size_queue[i]/2-j)%_param->_size_queue[i]; + TEST(Tptr_t , out_PREDICT_INDEX [port2]->read(), k); + + Taddress_t res = (0x01234567+((k==0)?(_param->_size_queue[i]/2-1):(k-1))); + + LABEL("k : %d",k); + LABEL("res : %x",res); + LABEL("@_pop : %x",out_PREDICT_ADDRESS_POP[port2]->read()); + + TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port2]->read(),res); + + SC_START(1); + } + } + + in_PREDICT_VAL [port2]->write(0); + + in_DECOD_VAL [port1]->write(1); + in_DECOD_PUSH [port1]->write(0); + in_DECOD_MISS_PREDICTION [port1]->write(0); + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + for (uint32_t j=0; j< _param->_size_queue[i]/2; j++) + { + in_DECOD_CONTEXT_ID [port1]->write(i); + in_DECOD_ADDRESS_PUSH [port1]->write(0xbabedead); + + SC_START(0); + + TEST(Tcontrol_t, out_DECOD_ACK [port1]->read(), 1); + TEST(Tcontrol_t, out_DECOD_HIT [port1]->read(), 1); + uint32_t k=(_param->_size_queue[i]/2-j)%_param->_size_queue[i]; + TEST(Tptr_t , out_DECOD_INDEX [port1]->read(), k); + + Taddress_t res = (0x01234567+((k==0)?(_param->_size_queue[i]/2-1):(k-1))); + + LABEL("k : %d",k); + LABEL("res : %x",res); + LABEL("@_pop : %x",out_DECOD_ADDRESS_POP[port1]->read()); + + TEST(Taddress_t, out_DECOD_ADDRESS_POP[port1]->read(),res); + + SC_START(1); + } + } + + in_DECOD_VAL [port1]->write(0); + + } } @@ -195,4 +466,6 @@ delete [] in_UPDATE_INDEX ; delete [] in_UPDATE_ADDRESS ; + delete [] in_UPDATE_MISS_PREDICTION; + delete [] in_UPDATE_PREDICTION_IFETCH; #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h (revision 81) @@ -84,11 +84,12 @@ // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; //[nb_inst_update] - public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; //[nb_inst_update] - public : SC_IN (Tcontext_t) ** in_UPDATE_CONTEXT_ID ; //[nb_inst_update] - public : SC_IN (Tcontrol_t) ** in_UPDATE_PUSH ; //[nb_inst_update] 1 = push, else pop - public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ; //[nb_inst_update] - public : SC_IN (Tptr_t ) ** in_UPDATE_INDEX ; //[nb_inst_update] - public : SC_IN (Tcontrol_t) ** in_UPDATE_MISS_PREDICTION; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; //[nb_inst_update] + public : SC_IN (Tcontext_t) ** in_UPDATE_CONTEXT_ID ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_PUSH ; //[nb_inst_update] 1 = push, else pop + public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ; //[nb_inst_update] + public : SC_IN (Tptr_t ) ** in_UPDATE_INDEX ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_MISS_PREDICTION ; //[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_PREDICTION_IFETCH; //[nb_inst_update] // prediction only ifetch // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -98,8 +99,8 @@ private : Tptr_t * reg_TOP ; //[nb_context] private : Tptr_t * reg_BOTTOM ; //[nb_context] - private : Tcontrol_t * reg_EMPTY ; //[nb_context] + private : Tptr_t * reg_NB_ELT ; //[nb_context] private : Tptr_t * reg_PREDICT_TOP ; //[nb_context] private : Tptr_t * reg_PREDICT_BOTTOM; //[nb_context] - private : Tcontrol_t * reg_PREDICT_EMPTY ; //[nb_context] + private : Tptr_t * reg_PREDICT_NB_ELT; //[nb_context] // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -143,5 +144,5 @@ public : void transition (void); public : void genMealy_predict (void); -// public : void genMealy_decod (void); + public : void genMealy_decod (void); // public : void genMealy_update (void); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp (revision 81) @@ -94,4 +94,34 @@ # endif + log_printf(INFO,Return_Address_Stack,FUNCTION,"Method - genMealy_decod"); + + SC_METHOD (genMealy_decod); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal registers + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + if (_param->_have_port_context_id) + sensitive << (*( in_DECOD_CONTEXT_ID [i])); + sensitive << (*( in_DECOD_PUSH [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + if (_param->_have_port_context_id) + (*(out_DECOD_HIT [i])) (*( in_DECOD_CONTEXT_ID [i])); + (*(out_DECOD_HIT [i])) (*( in_DECOD_PUSH [i])); + + if (_param->_have_port_context_id) + (*(out_DECOD_ADDRESS_POP [i])) (*( in_DECOD_CONTEXT_ID [i])); + (*(out_DECOD_ADDRESS_POP [i])) (*( in_DECOD_PUSH [i])); + + if (_param->_have_port_context_id) + (*(out_DECOD_INDEX [i])) (*( in_DECOD_CONTEXT_ID [i])); + (*(out_DECOD_INDEX [i])) (*( in_DECOD_PUSH [i])); + } +# endif + log_printf(INFO,Return_Address_Stack,FUNCTION,"Method - genMealy_predict"); @@ -122,5 +152,5 @@ (*(out_PREDICT_INDEX [i])) (*( in_PREDICT_PUSH [i])); } -# endif +# endif #endif } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp (revision 81) @@ -96,4 +96,5 @@ ALLOC1_SIGNAL_IN ( in_UPDATE_INDEX ,"index" ,Tptr_t ,_param->_size_index); ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_PREDICTION_IFETCH,"prediction_ifetch",Tcontrol_t,1); } @@ -106,9 +107,9 @@ reg_TOP = new Tptr_t [_param->_nb_context]; reg_BOTTOM = new Tptr_t [_param->_nb_context]; - reg_EMPTY = new Tcontrol_t [_param->_nb_context]; + reg_NB_ELT = new Tptr_t [_param->_nb_context]; reg_PREDICT_TOP = new Tptr_t [_param->_nb_context]; reg_PREDICT_BOTTOM = new Tptr_t [_param->_nb_context]; - reg_PREDICT_EMPTY = new Tcontrol_t [_param->_nb_context]; + reg_PREDICT_NB_ELT = new Tptr_t [_param->_nb_context]; internal_PREDICT_ACK = new Tcontrol_t [_param->_nb_inst_predict]; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp (revision 81) @@ -1,3 +1,3 @@ -*/* +/* * $Id$ * @@ -54,4 +54,6 @@ delete [] in_UPDATE_INDEX ; delete [] in_UPDATE_ADDRESS ; + delete [] in_UPDATE_MISS_PREDICTION; + delete [] in_UPDATE_PREDICTION_IFETCH; } @@ -61,8 +63,8 @@ delete [] reg_TOP; delete [] reg_BOTTOM; - delete [] reg_EMPTY; + delete [] reg_NB_ELT; delete [] reg_PREDICT_TOP; delete [] reg_PREDICT_BOTTOM; - delete [] reg_PREDICT_EMPTY; + delete [] reg_PREDICT_NB_ELT; delete [] internal_PREDICT_ACK; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp (revision 81) @@ -48,5 +48,6 @@ // if push : value is hit // if pop : val and not miss - internal_DECOD_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss)); + // when the predictor : if hit = 0, wait (is not accurate) + internal_DECOD_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss and (reg_NB_ELT[context]>0))); PORT_WRITE(out_DECOD_HIT [i], internal_DECOD_HIT [i]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp (revision 81) @@ -48,5 +48,5 @@ // if push : value is hit // if pop : val and not miss - internal_PREDICT_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss)); + internal_PREDICT_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss and (reg_PREDICT_NB_ELT[context]>0))); PORT_WRITE(out_PREDICT_HIT [i], internal_PREDICT_HIT [i]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 81) @@ -24,5 +24,5 @@ log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin"); - if (PORT_READ(in_NRESET)) + if (PORT_READ(in_NRESET)==0) { for (uint32_t i=0; i<_param->_nb_context; i++) @@ -30,10 +30,16 @@ reg_TOP [i] = 0; reg_BOTTOM [i] = 0; + reg_NB_ELT [i] = 0; reg_PREDICT_TOP [i] = 0; reg_PREDICT_BOTTOM [i] = 0; + reg_PREDICT_NB_ELT [i] = 0; for (uint32_t j=0; j<_param->_size_queue [i]; j++) - reg_stack[i][j]._val = false; + { + reg_stack[i][j]._val = false; + reg_stack[i][j]._predict = false; + reg_stack[i][j]._miss = false; + } } } @@ -46,29 +52,45 @@ if (PORT_READ(in_PREDICT_VAL [i]) and internal_PREDICT_ACK [i]) { - Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; - Tcontrol_t push = PORT_READ(in_PREDICT_PUSH [i]); - Tptr_t top_old = reg_PREDICT_TOP [i]; - Tptr_t top_new; - + log_printf(TRACE,Return_Address_Stack,FUNCTION,"PREDICT[%d] : Transaction",i); + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; + Tcontrol_t push = PORT_READ(in_PREDICT_PUSH [i]); + Tptr_t top_old = reg_PREDICT_TOP [context]; + Tptr_t top_new = top_old; + Tptr_t bottom_old = reg_PREDICT_BOTTOM [context]; + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * context : %d",context); + + // Hit : push or (val and not miss and not empty) + // Miss : ifetch is stall, no update if (internal_PREDICT_HIT [i]) { + log_printf(TRACE,Return_Address_Stack,FUNCTION," * before"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",reg_PREDICT_TOP [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",reg_PREDICT_BOTTOM [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",reg_PREDICT_NB_ELT [context]); + if (push) { - // push + // push : increase the top (circular) top_new = (top_old+1)%_param->_size_queue[context]; reg_stack [context][top_new]._val = true; // New addr - reg_stack [context][top_new]._predict = true; // Is speculative (erase a old addr) + reg_stack [context][top_new]._predict = true; // Is speculative (erase a old addr (or not)) //reg_stack [context][top_new]._miss = ; reg_stack [context][top_new]._address = PORT_READ(in_PREDICT_ADDRESS_PUSH [i]); // the stack is full, erase the most old stack - if (top_new == reg_PREDICT_BOTTOM [i]) - reg_PREDICT_BOTTOM [i] = (reg_PREDICT_BOTTOM [i]+1)%_param->_size_queue[context]; + + // Test if full + if (reg_PREDICT_NB_ELT[context]==_param->_size_queue[context]) + reg_PREDICT_BOTTOM [context] = (bottom_old+1)%_param->_size_queue[context]; + // A new data is write : the stack is not empty + if (reg_PREDICT_NB_ELT[context]< _param->_size_queue[context]) + reg_PREDICT_NB_ELT[context]++; } else { // pop - top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); +// top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); //reg_stack [context][top_new]._val = ; @@ -78,71 +100,104 @@ // the stack is empty - if (top_old == reg_PREDICT_BOTTOM [i]) - reg_PREDICT_BOTTOM [i] = top_new; - + if (reg_PREDICT_NB_ELT[context]>0) + { + top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); + reg_PREDICT_NB_ELT[context] --; + } } - reg_PREDICT_TOP [i] = top_new; + reg_PREDICT_TOP [context] = top_new; + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * after"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",reg_PREDICT_TOP [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",reg_PREDICT_BOTTOM [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",reg_PREDICT_NB_ELT [context]); } } -// // =================================================================== -// // =====[ DECOD ]===================================================== -// // =================================================================== -// for (uint32_t i=0; i<_param->_nb_inst_decod; i++) -// if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i]) -// { -// Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; -// Tcontrol_t push = PORT_READ(in_DECOD_PUSH [i]); -// Tptr_t top_old = reg_TOP [i]; -// Tptr_t top_new; - -// Tcontrol_t hit = PORT_READ(in_DECOD_HIT [i]); -// Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); - -// if (push) -// { -// // push -// top_new = (top_old+1)%_param->_size_queue[context]; - -// reg_stack [context][top_new]._val = true; -// reg_stack [context][top_new]._predict = false; -// reg_stack [context][top_new]._miss = false; -// reg_stack [context][top_new]._address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]); - -// // the stack is full, erase the most old stack -// if (top_old == reg_BOTTOM [i]) -// reg_BOTTOM [i] = top_new; -// } -// else -// { -// // pop + // =================================================================== + // =====[ DECOD ]===================================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i]) + { + log_printf(TRACE,Return_Address_Stack,FUNCTION,"DECOD[%d] : Transaction",i); + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; + Tcontrol_t push = PORT_READ(in_DECOD_PUSH [i]); + Tptr_t top_old = reg_TOP [context]; + Tptr_t top_new = top_old; + Tptr_t bottom_old = reg_BOTTOM [context]; + //Tcontrol_t hit = internal_DECOD_HIT [i]; + Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * context : %d",context); + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * before"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_top : %d",reg_TOP [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_bottom : %d",reg_BOTTOM [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_nb_elt : %d",reg_NB_ELT [context]); + + if (push) + { + // push : increase the top (circular) + top_new = (top_old+1)%_param->_size_queue[context]; + + reg_stack [context][top_new]._val = true; // New address + reg_stack [context][top_new]._predict = false; // No speculative + reg_stack [context][top_new]._miss = false; + reg_stack [context][top_new]._address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]); + + // Test if full : if true, then icrease the bottom (erase the most old stack) + if (reg_NB_ELT[context]==_param->_size_queue[context]) + reg_BOTTOM [context] = (bottom_old+1)%_param->_size_queue[context]; + // A new data is write : the stack is not empty + if (reg_NB_ELT[context]< _param->_size_queue[context]) + reg_NB_ELT[context]++; + } + else + { + // pop // top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); -// //reg_stack [context][top_new]._val = ; -// //reg_stack [context][top_new]._predict = ; -// //reg_stack [context][top_new]._miss = ; -// //reg_stack [context][top_new]._address = ; -// } - -// reg_TOP [i] = top_new; - -// // have previous miss of ifetch ? -// // 2 miss : -// // 1) miss predict : is very limited (local at context), can be update very quickly -// // 2) miss decod : result is in commit stage ... -// if (miss) -// { -// reg_PREDICT_BOTTOM [i] = reg_BOTTOM [i]; -// reg_PREDICT_TOP [i] = reg_TOP [i]; - -// for (uint32_t j=0; j<_param->_size_queue [i]; j++) -// if (reg_stack [context][top_new]._predict) -// { -// reg_stack [context][top_new]._predict = false; -// reg_stack [context][top_new]._miss = true; -// } -// } -// } + //reg_stack [context][top_new]._val = ; + //reg_stack [context][top_new]._predict = ; + //reg_stack [context][top_new]._miss = ; + //reg_stack [context][top_new]._address = ; + + // the stack is empty + if (reg_NB_ELT[context]>0) + { + top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); + reg_NB_ELT[context] --; + } + } + + reg_TOP [context] = top_new; + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * after"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_top : %d",reg_TOP [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_bottom : %d",reg_BOTTOM [context]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_nb_elt : %d",reg_NB_ELT [context]); + + // have previous miss of ifetch ? + // 2 miss : + // 1) miss predict : is very limited (local at context), can be update very quickly + // 2) miss decod : result is in commit stage ... + if (miss) + { + reg_PREDICT_BOTTOM [context] = reg_BOTTOM [context]; + reg_PREDICT_TOP [context] = reg_TOP [context]; + reg_PREDICT_NB_ELT [context] = reg_NB_ELT [context]; + + // Scan full assoc !!! + for (uint32_t j=0; j<_param->_size_queue [i]; j++) + // Test if this slot is tagged with "predict" : if true, tagged as miss + if (reg_stack [context][j]._predict) + { + reg_stack [context][j]._predict = false; + reg_stack [context][j]._miss = true; + } + } + } // =================================================================== @@ -152,32 +207,39 @@ if (PORT_READ(in_UPDATE_VAL [i]) and internal_UPDATE_ACK [i]) { - Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; - Tcontrol_t push = PORT_READ(in_UPDATE_PUSH [i]); - Tptr_t index = PORT_READ(in_UPDATE_INDEX [i]); + ERRORMORPHEO(FUNCTION,"Fonction à implémenter !!!!!!!!!!!!"); - if (PORT_READ(in_UPDATE_MISS_PREDICTION [i])) - { - if (push) - { - // push - top_new = (top_old+1)%_param->_size_queue[context]; + +// Tcontrol_t miss = PORT_READ(in_UPDATE_MISS_PREDICTION [i]); +// // +// if (miss) +// { +// Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; +// Tcontrol_t ifetch = PORT_READ(in_UPDATE_PREDICTION_IFETCH [i]); +// Tcontrol_t push = PORT_READ(in_UPDATE_PUSH [i]); +// Tptr_t index = PORT_READ(in_UPDATE_INDEX [i]); +// Taddress_t address = PORT_READ(in_UPDATE_ADDRESS [i]); + +// if (push) +// { +// // // push +// // top_new = (top_old+1)%_param->_size_queue[context]; - reg_stack [context][index]._val = true; - reg_stack [context][index]._predict = false; - reg_stack [context][index]._miss = false; - reg_stack [context][index]._address = PORT_READ(in_UPDATE_ADDRESS [i]); - - } - else - { - //reg_stack [context][top_new]._val = ; - //reg_stack [context][top_new]._predict = ; - //reg_stack [context][top_new]._miss = ; - //reg_stack [context][top_new]._address = ; - } - - // Mouais bof ....... - reg_PREDICT_TOP [i] = index; - } +// // reg_stack [context][index]._val = true; +// // reg_stack [context][index]._predict = false; +// // reg_stack [context][index]._miss = false; +// // reg_stack [context][index]._address = PORT_READ(in_UPDATE_ADDRESS [i]); + +// } +// else +// { +// // //reg_stack [context][top_new]._val = ; +// // //reg_stack [context][top_new]._predict = ; +// // //reg_stack [context][top_new]._miss = ; +// // //reg_stack [context][top_new]._address = ; +// } + +// // // // Mouais bof ....... +// // // reg_PREDICT_TOP [context] = index; +// } } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp (revision 81) @@ -7,38 +7,10 @@ */ +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h" #include "Common/include/Test.h" #include "Behavioural/include/Allocation.h" - -#define NB_ITERATION 1 -#define CYCLE_MAX (128*NB_ITERATION) - -#define LABEL(str...) \ - { \ - msg (_("{%d} "),static_cast(sc_simulation_time())); \ - msg (str); \ - msg (_("\n")); \ - } while(0) - -#define SC_START(cycle_offset) \ - do \ - { \ - /*cout << "SC_START (begin)" << endl;*/ \ - \ - uint32_t cycle_current = static_cast(sc_simulation_time()); \ - if (cycle_offset != 0) \ - { \ - cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ - } \ - \ - if (cycle_current > CYCLE_MAX) \ - { \ - TEST_KO("Maximal cycles Reached"); \ - } \ - \ - sc_start(cycle_offset); \ - \ - /*cout << "SC_START (end )" << endl;*/ \ - } while(0) void test (string name, Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_mono_context.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_mono_context.cfg (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_mono_context.cfg (revision 81) @@ -0,0 +1,10 @@ +Update_Prediction_Table +1 1 +1 # nb_context +1 4 *4 # size_queue [0] [nb_context] +32 32 *2 # size_address +4 4 *4 # nb_inst_predict +4 4 *4 # nb_inst_decod +4 4 *4 # nb_inst_branch_complete +4 4 *4 # nb_inst_update +0 0 +1 # size_history +3 3 *2 # size_ras_index [0] [nb_context] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_multi_context.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_multi_context.cfg (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_multi_context.cfg (revision 81) @@ -0,0 +1,16 @@ +Update_Prediction_Table +4 4 +1 # nb_context +4 4 *4 # size_queue [0] [nb_context] +1 1 *4 # size_queue [1] [nb_context] +8 8 *4 # size_queue [2] [nb_context] +2 2 *4 # size_queue [3] [nb_context] +32 32 *2 # size_address +4 4 *4 # nb_inst_predict +4 4 *4 # nb_inst_decod +4 4 *4 # nb_inst_branch_complete +4 4 *4 # nb_inst_update +0 0 +1 # size_history +3 3 *2 # size_ras_index [0] [nb_context] +1 1 *2 # size_ras_index [1] [nb_context] +2 2 *2 # size_ras_index [2] [nb_context] +8 8 *2 # size_ras_index [3] [nb_context] Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/configuration.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/configuration.cfg (revision 80) +++ (revision ) @@ -1,1 +1,0 @@ -Update_Prediction_Table Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp (revision 81) @@ -8,5 +8,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" -#define NB_PARAMS 0 +#define NB_PARAMS 7 void usage (int argc, char * argv[]) @@ -14,5 +14,13 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * ()\n")); + err (_(" * nb_context (uint32_t)\n")); + err (_(" * size_queue [nb_context] (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_decod (uint32_t)\n")); + err (_(" * nb_inst_branch_complete (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + err (_(" * size_history (uint32_t)\n")); + err (_(" * size_ras_index [nb_context] (uint32_t)\n")); exit (1); @@ -25,5 +33,5 @@ #endif { - if (argc != static_cast(2+NB_PARAMS)) + if (argc <= static_cast(2+NB_PARAMS)) usage (argc, argv); @@ -31,6 +39,22 @@ string name = argv[x++]; -//const uint32_t size_data = atoi(argv[x++]); -//const uint32_t nb_port = atoi(argv[x++]); + + uint32_t _nb_context = fromString(argv[x++]); + + if (argc != static_cast(2+NB_PARAMS+2*_nb_context)) + usage (argc, argv); + + uint32_t * _size_queue = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _size_queue [i] = fromString(argv[x++]); + uint32_t _size_address = fromString(argv[x++]); + uint32_t _nb_inst_predict = fromString(argv[x++]); + uint32_t _nb_inst_decod = fromString(argv[x++]); + uint32_t _nb_inst_branch_complete = fromString(argv[x++]); + uint32_t _nb_inst_update = fromString(argv[x++]); + uint32_t _size_history = fromString(argv[x++]); + uint32_t * _size_ras_index = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _size_ras_index [i] = fromString(argv[x++]); int _return = EXIT_SUCCESS; @@ -38,7 +62,13 @@ { morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters - (//size_data, - //nb_port - ); + (_nb_context , + _size_queue , + _size_address , + _nb_inst_predict , + _nb_inst_decod , + _nb_inst_branch_complete, + _nb_inst_update , + _size_history , + _size_ras_index ); msg(_("%s"),param->print(1).c_str()); @@ -57,4 +87,8 @@ } + + delete [] _size_ras_index; + delete [] _size_queue; + return (_return); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 81) @@ -7,38 +7,10 @@ */ +#define NB_ITERATION 8 +#define CYCLE_MAX (128*NB_ITERATION) + #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" #include "Common/include/Test.h" #include "Behavioural/include/Allocation.h" - -#define NB_ITERATION 1 -#define CYCLE_MAX (128*NB_ITERATION) - -#define LABEL(str...) \ - { \ - msg (_("{%d} "),static_cast(sc_simulation_time())); \ - msg (str); \ - msg (_("\n")); \ - } while(0) - -#define SC_START(cycle_offset) \ - do \ - { \ - /*cout << "SC_START (begin)" << endl;*/ \ - \ - uint32_t cycle_current = static_cast(sc_simulation_time()); \ - if (cycle_offset != 0) \ - { \ - cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ - } \ - \ - if (cycle_current > CYCLE_MAX) \ - { \ - TEST_KO("Maximal cycles Reached"); \ - } \ - \ - sc_start(cycle_offset); \ - \ - /*cout << "SC_START (end )" << endl;*/ \ - } while(0) void test (string name, @@ -51,9 +23,21 @@ #endif - Update_Prediction_Table * _Update_Prediction_Table = new Update_Prediction_Table (name.c_str(), + Tusage_t _usage = USE_ALL; + +// _usage = usage_unset(_usage,USE_SYSTEMC ); +// _usage = usage_unset(_usage,USE_VHDL ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); +// _usage = usage_unset(_usage,USE_POSITION ); +// _usage = usage_unset(_usage,USE_STATISTICS ); +// _usage = usage_unset(_usage,USE_INFORMATION ); + + Update_Prediction_Table * _Update_Prediction_Table = new Update_Prediction_Table + (name.c_str(), #ifdef STATISTICS - _parameters_statistics, + _parameters_statistics, #endif - _param); + _param, + _usage); #ifdef SYSTEMC @@ -65,4 +49,56 @@ sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_SRC ," in_PREDICT_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_DEST ," in_PREDICT_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_CONDITION ," in_PREDICT_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_LAST_TAKE ," in_PREDICT_BTB_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_BTB_IS_ACCURATE ," in_PREDICT_BTB_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_DIR_HISTORY ," in_PREDICT_DIR_HISTORY ",Thistory_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_RAS_ADDRESS ," in_PREDICT_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_RAS_INDEX ," in_PREDICT_RAS_INDEX ",Tptr_t ,_param->_nb_inst_predict); +//ALLOC1_SC_SIGNAL(out_PREDICT_UPDATE_PREDICTION_ID ,"out_PREDICT_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_BTB_ADDRESS_SRC ," in_DECOD_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_BTB_ADDRESS_DEST ," in_DECOD_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_BTB_CONDITION ," in_DECOD_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_BTB_LAST_TAKE ," in_DECOD_BTB_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_RAS_ADDRESS ," in_DECOD_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_RAS_INDEX ," in_DECOD_RAS_INDEX ",Tptr_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_DECOD_UPDATE_PREDICTION_ID ," in_DECOD_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_inst_decod); +//ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod); + ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS ," in_BRANCH_COMPLETE_ADDRESS ",Taddress_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_FLAG ," in_BRANCH_COMPLETE_FLAG ",Tcontrol_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,"out_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); + ALLOC1_SC_SIGNAL(out_UPDATE_VAL ,"out_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ACK ," in_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_CONTEXT_ID ,"out_UPDATE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_MISS_PREDICTION ,"out_UPDATE_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_DIRECTION_GOOD ,"out_UPDATE_DIRECTION_GOOD ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_BTB_VAL ,"out_UPDATE_BTB_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_BTB_ADDRESS_SRC ,"out_UPDATE_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_BTB_ADDRESS_DEST ,"out_UPDATE_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_BTB_CONDITION ,"out_UPDATE_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_DIR_VAL ,"out_UPDATE_DIR_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_DIR_HISTORY ,"out_UPDATE_DIR_HISTORY ",Thistory_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_RAS_VAL ,"out_UPDATE_RAS_VAL ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_RAS_ADDRESS ,"out_UPDATE_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_RAS_INDEX ,"out_UPDATE_RAS_INDEX ",Tptr_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_RAS_PREDICTION_IFETCH ,"out_UPDATE_RAS_PREDICTION_IFETCH ",Tcontrol_t ,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_DEPTH_NB_BRANCH ,"out_DEPTH_NB_BRANCH ",Tdepth_t ,_param->_nb_context); + ALLOC1_SC_SIGNAL(out_DEPTH_TAIL ,"out_DEPTH_TAIL ",Tdepth_t ,_param->_nb_context); /******************************************************** @@ -75,4 +111,67 @@ (*(_Update_Prediction_Table->in_NRESET)) (*(in_NRESET)); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_PREDICT_ACK ,_param->_nb_inst_predict); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_CONDITION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_LAST_TAKE ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_IS_ACCURATE ,_param->_nb_inst_predict); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_DIR_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_RAS_ADDRESS ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_RAS_INDEX ,_param->_nb_inst_predict); +//if (_param->_have_port_depth) +//INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_PREDICT_UPDATE_PREDICTION_ID ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_VAL ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_ACK ,_param->_nb_inst_decod); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_ADDRESS_SRC ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_ADDRESS_DEST ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_CONDITION ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_LAST_TAKE ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_RAS_ADDRESS ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_RAS_INDEX ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_UPDATE_PREDICTION_ID ,_param->_nb_inst_decod); +//if (_param->_have_port_depth) +//INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_DEPTH ,_param->_nb_inst_decod); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_FLAG ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_UPDATE_ACK ,_param->_nb_inst_update); + if (_param->_have_port_context_id) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_CONTEXT_ID ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_MISS_PREDICTION ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_DIRECTION_GOOD ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_ADDRESS_SRC ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_ADDRESS_DEST ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_CONDITION ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_DIR_VAL ,_param->_nb_inst_update); + if (_param->_have_port_history) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_DIR_HISTORY ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_ADDRESS ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_INDEX ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_PREDICTION_IFETCH ,_param->_nb_inst_update); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_NB_BRANCH ,_param->_nb_context); + if (_param->_have_port_depth) + INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_TAIL ,_param->_nb_context); msg(_("<%s> : Start Simulation ............\n"),name.c_str()); @@ -90,4 +189,9 @@ srand(seed); + + const int32_t percent_transaction_predict = 75; + const int32_t percent_transaction_decod = 75; + const int32_t percent_transaction_branch_complete = 75; + const int32_t percent_transaction_update = 75; SC_START(0); @@ -104,6 +208,429 @@ { LABEL("Iteration %d",iteration); - + + { + uint32_t context = rand() % _param->_nb_context; + +// LABEL("KANE : %d",context); + + LABEL("PREDICT - fill the queue"); + + { + uint32_t port = rand() % _param->_nb_inst_predict; + + for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + + bool find = false; + do + { + in_PREDICT_VAL [port]->write((rand()%100)write(context); + in_PREDICT_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); + in_PREDICT_BTB_ADDRESS_DEST [port]->write(0x21071981+i); + in_PREDICT_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); + in_PREDICT_BTB_LAST_TAKE [port]->write(1); + in_PREDICT_BTB_IS_ACCURATE [port]->write((rand()%100)write(i); + in_PREDICT_RAS_ADDRESS [port]->write(0xdeaddead+i); + in_PREDICT_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i); + } + SC_START(0); + + LABEL("PREDICT [%d] %d - %d (accurate : %d).",port,in_PREDICT_VAL [port]->read(),out_PREDICT_ACK [port]->read(), in_PREDICT_BTB_IS_ACCURATE [port]->read()); + + if (in_PREDICT_VAL [port]->read() and out_PREDICT_ACK [port]->read()) + { + LABEL("PREDICT [%d] - Transaction accepted",port); + find = true; + } + + SC_START(1); + + } while (not find); + in_PREDICT_VAL [port]->write(0); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i+1); + } + } + } + + LABEL("DECOD - hit ifetch"); + + { + uint32_t port = rand() % _param->_nb_inst_decod; + + for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + + bool find = false; + do + { + in_DECOD_VAL [port]->write((rand()%100)write(context); + in_DECOD_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); + in_DECOD_BTB_ADDRESS_DEST [port]->write(0x21071981+i); + in_DECOD_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); + in_DECOD_BTB_LAST_TAKE [port]->write(1); + in_DECOD_RAS_ADDRESS [port]->write(0xdeaddead+i); + in_DECOD_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); + in_DECOD_MISS_PREDICTION [port]->write(false); + in_DECOD_UPDATE_PREDICTION_ID [port]->write(i); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + + SC_START(0); + + LABEL("DECOD [%d] %d - %d.",port,in_DECOD_VAL [port]->read(),out_DECOD_ACK [port]->read()); + + if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read()) + { + LABEL("DECOD [%d] - Transaction accepted",port); + find = true; + } + + SC_START(1); + + } while (not find); + in_DECOD_VAL [port]->write(0); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + } + } + + LABEL("BRANCH_COMPLETE - hit ifetch"); + + { + uint32_t port = rand() % _param->_nb_inst_branch_complete; + + for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + bool find = false; + do + { + in_BRANCH_COMPLETE_VAL [port]->write((rand()%100)write(context); + in_BRANCH_COMPLETE_DEPTH [port]->write(i); + in_BRANCH_COMPLETE_ADDRESS [port]->write(0xcacacaca+i); + in_BRANCH_COMPLETE_FLAG [port]->write(1); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + + SC_START(0); + + LABEL("BRANCH_COMPLETE [%d] %d - %d.",port,in_BRANCH_COMPLETE_VAL [port]->read(),out_BRANCH_COMPLETE_ACK [port]->read()); + + if (in_BRANCH_COMPLETE_VAL [port]->read() and out_BRANCH_COMPLETE_ACK [port]->read()) + { + LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port); + find = true; + + TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),0); + TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),1); + TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),0xdeadbeef+i); + TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),0x21071981+i); + } + + SC_START(1); + + } while (not find); + in_BRANCH_COMPLETE_VAL [port]->write(0); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + } + } + + LABEL("UPDATE - hit ifetch"); + + { + uint32_t port = 0; //rand() % _param->_nb_inst_update; + + for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + bool find = false; + do + { + in_UPDATE_ACK [port]->write((rand()%100)read() and in_UPDATE_ACK [port]->read()) + { + LABEL("UPDATE [%d] - Transaction accepted",port); + + find = true; + + TEST(Tcontext_t ,out_UPDATE_CONTEXT_ID [port]->read(), context); + TEST(Tcontrol_t ,out_UPDATE_MISS_PREDICTION [port]->read(), 0); + TEST(Tcontrol_t ,out_UPDATE_DIRECTION_GOOD [port]->read(), 1); + TEST(Tcontrol_t ,out_UPDATE_BTB_VAL [port]->read(), 1); + TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_SRC [port]->read(), 0xdeadbeef+i); + TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_DEST [port]->read(), 0x21071981+i); + TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION [port]->read(), BRANCH_CONDITION_FLAG_SET); + TEST(Tcontrol_t ,out_UPDATE_DIR_VAL [port]->read(), 1); + if (_param->_have_port_history) + TEST(Thistory_t ,out_UPDATE_DIR_HISTORY [port]->read(), i); + TEST(Tcontrol_t ,out_UPDATE_RAS_VAL [port]->read(), 0); + TEST(Taddress_t ,out_UPDATE_RAS_ADDRESS [port]->read(), 0xdeaddead+i); + TEST(Tptr_t ,out_UPDATE_RAS_INDEX [port]->read(), (0x12345678+i)%_param->_size_ras_index[context]); + TEST(Tcontrol_t ,out_UPDATE_RAS_PREDICTION_IFETCH [port]->read(), 1); + } + + SC_START(1); + + } while (not find); + in_UPDATE_ACK [port]->write(0); + } + + LABEL("Wait a moment"); + SC_START(2*_param->_size_queue[context]); + + // wait the garbage collector + if (_param->_have_port_depth) + while ((out_DEPTH_TAIL [context]->read() != 0) and + (out_DEPTH_NB_BRANCH[context]->read() != 0)) + { + LABEL("DEPTH [%d] nb_branch : %d - tail : %d",context,out_DEPTH_NB_BRANCH[context]->read(), out_DEPTH_TAIL [context]->read()); + SC_START(1); + } + } + } + + { + uint32_t context = rand() % _param->_nb_context; + +// LABEL("KANE : %d",context); + + LABEL("PREDICT - fill the queue"); + + { + uint32_t port = rand() % _param->_nb_inst_predict; + + for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + + bool find = false; + do + { + in_PREDICT_VAL [port]->write((rand()%100)write(context); + in_PREDICT_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); + in_PREDICT_BTB_ADDRESS_DEST [port]->write(0x21071981+i); + in_PREDICT_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); + in_PREDICT_BTB_LAST_TAKE [port]->write(1); + in_PREDICT_BTB_IS_ACCURATE [port]->write((rand()%100)write(i); + in_PREDICT_RAS_ADDRESS [port]->write(0xdeaddead+i); + in_PREDICT_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i); + } + SC_START(0); + + LABEL("PREDICT [%d] %d - %d (accurate : %d).",port,in_PREDICT_VAL [port]->read(),out_PREDICT_ACK [port]->read(), in_PREDICT_BTB_IS_ACCURATE [port]->read()); + + if (in_PREDICT_VAL [port]->read() and out_PREDICT_ACK [port]->read()) + { + LABEL("PREDICT [%d] - Transaction accepted",port); + find = true; + } + + SC_START(1); + + } while (not find); + in_PREDICT_VAL [port]->write(0); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i+1); + } + } + } + + LABEL("DECOD - hit ifetch"); + + { + uint32_t port = rand() % _param->_nb_inst_decod; + + for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + + bool find = false; + do + { + in_DECOD_VAL [port]->write((rand()%100)write(context); + in_DECOD_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); + in_DECOD_BTB_ADDRESS_DEST [port]->write(0x21071981+i); + in_DECOD_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); + in_DECOD_BTB_LAST_TAKE [port]->write(1); + in_DECOD_RAS_ADDRESS [port]->write(0xdeaddead+i); + in_DECOD_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); + in_DECOD_MISS_PREDICTION [port]->write(false); + in_DECOD_UPDATE_PREDICTION_ID [port]->write(i); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + + SC_START(0); + + LABEL("DECOD [%d] %d - %d.",port,in_DECOD_VAL [port]->read(),out_DECOD_ACK [port]->read()); + + if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read()) + { + LABEL("DECOD [%d] - Transaction accepted",port); + find = true; + } + + SC_START(1); + + } while (not find); + in_DECOD_VAL [port]->write(0); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + } + } + + LABEL("BRANCH_COMPLETE - hit ifetch"); + + { + uint32_t port = rand() % _param->_nb_inst_branch_complete; + + { + uint32_t i=0; + bool find = false; + do + { + in_BRANCH_COMPLETE_VAL [port]->write((rand()%100)write(context); + in_BRANCH_COMPLETE_DEPTH [port]->write(i); + in_BRANCH_COMPLETE_ADDRESS [port]->write(0xcacacaca+i); + in_BRANCH_COMPLETE_FLAG [port]->write(0); + + if (_param->_have_port_depth) + { + TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); + TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); + } + + SC_START(0); + + LABEL("BRANCH_COMPLETE [%d] %d - %d.",port,in_BRANCH_COMPLETE_VAL [port]->read(),out_BRANCH_COMPLETE_ACK [port]->read()); + + if (in_BRANCH_COMPLETE_VAL [port]->read() and out_BRANCH_COMPLETE_ACK [port]->read()) + { + LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port); + find = true; + + TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),1); + TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),0); + TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),0xdeadbeef+i); + TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),0x21071981+i); + } + + SC_START(1); + + } while (not find); + in_BRANCH_COMPLETE_VAL [port]->write(0); + } + } + + LABEL("UPDATE - miss ifetch"); + + { + uint32_t port = 0; //rand() % _param->_nb_inst_update; + +// for (uint32_t i=0; i<_param->_size_queue[context]; i++) + { + uint32_t i=0; + + bool find = false; + do + { + in_UPDATE_ACK [port]->write((rand()%100)read() and in_UPDATE_ACK [port]->read()) + { + LABEL("UPDATE [%d] - Transaction accepted",port); + + find = true; + + TEST(Tcontext_t ,out_UPDATE_CONTEXT_ID [port]->read(), context); + TEST(Tcontrol_t ,out_UPDATE_MISS_PREDICTION [port]->read(), 1); + TEST(Tcontrol_t ,out_UPDATE_DIRECTION_GOOD [port]->read(), 0); + TEST(Tcontrol_t ,out_UPDATE_BTB_VAL [port]->read(), 1); + TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_SRC [port]->read(), 0xdeadbeef+i); + TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_DEST [port]->read(), 0x21071981+i); + TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION [port]->read(), BRANCH_CONDITION_FLAG_SET); + TEST(Tcontrol_t ,out_UPDATE_DIR_VAL [port]->read(), 1); + if (_param->_have_port_history) + TEST(Thistory_t ,out_UPDATE_DIR_HISTORY [port]->read(), i); + TEST(Tcontrol_t ,out_UPDATE_RAS_VAL [port]->read(), 0); + TEST(Taddress_t ,out_UPDATE_RAS_ADDRESS [port]->read(), 0xdeaddead+i); + TEST(Tptr_t ,out_UPDATE_RAS_INDEX [port]->read(), (0x12345678+i)%_param->_size_ras_index[context]); + TEST(Tcontrol_t ,out_UPDATE_RAS_PREDICTION_IFETCH [port]->read(), 1); + } + + SC_START(1); + + } while (not find); + in_UPDATE_ACK [port]->write(0); + } + + LABEL("Wait a moment"); + SC_START(_param->_size_queue[context]); + + // wait the garbage collector + if (_param->_have_port_depth) + while ((out_DEPTH_TAIL [context]->read() != 0) and + (out_DEPTH_NB_BRANCH[context]->read() != 0)) + { + LABEL("DEPTH [%d] nb_branch : %d - tail : %d",context,out_DEPTH_NB_BRANCH[context]->read(), out_DEPTH_TAIL [context]->read()); + SC_START(1); + } + } + } + + LABEL ("Yo1"); SC_START(1); + LABEL ("Yo2"); + } @@ -119,4 +646,66 @@ delete in_CLOCK; delete in_NRESET; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_CONTEXT_ID ; + delete [] in_PREDICT_BTB_ADDRESS_SRC ; + delete [] in_PREDICT_BTB_ADDRESS_DEST ; + delete [] in_PREDICT_BTB_CONDITION ; + delete [] in_PREDICT_BTB_LAST_TAKE ; + delete [] in_PREDICT_BTB_IS_ACCURATE ; + delete [] in_PREDICT_DIR_HISTORY ; + delete [] in_PREDICT_RAS_ADDRESS ; + delete [] in_PREDICT_RAS_INDEX ; +//delete [] out_PREDICT_UPDATE_PREDICTION_ID; + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + delete [] in_DECOD_CONTEXT_ID ; + delete [] in_DECOD_BTB_ADDRESS_SRC ; + delete [] in_DECOD_BTB_ADDRESS_DEST ; + delete [] in_DECOD_BTB_CONDITION ; + delete [] in_DECOD_BTB_LAST_TAKE ; + delete [] in_DECOD_RAS_ADDRESS ; + delete [] in_DECOD_RAS_INDEX ; + delete [] in_DECOD_MISS_PREDICTION ; + delete [] in_DECOD_UPDATE_PREDICTION_ID ; +//delete [] out_DECOD_DEPTH ; + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_BRANCH_COMPLETE_VAL ; + delete [] out_BRANCH_COMPLETE_ACK ; + delete [] in_BRANCH_COMPLETE_CONTEXT_ID ; + delete [] in_BRANCH_COMPLETE_DEPTH ; + delete [] in_BRANCH_COMPLETE_ADDRESS ; + delete [] in_BRANCH_COMPLETE_FLAG ; + delete [] out_BRANCH_COMPLETE_MISS_PREDICTION; + delete [] out_BRANCH_COMPLETE_TAKE ; + delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; + delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] out_UPDATE_VAL ; + delete [] in_UPDATE_ACK ; + delete [] out_UPDATE_CONTEXT_ID ; + delete [] out_UPDATE_MISS_PREDICTION ; + delete [] out_UPDATE_DIRECTION_GOOD ; + delete [] out_UPDATE_BTB_VAL ; + delete [] out_UPDATE_BTB_ADDRESS_SRC ; + delete [] out_UPDATE_BTB_ADDRESS_DEST ; + delete [] out_UPDATE_BTB_CONDITION ; + delete [] out_UPDATE_DIR_VAL ; + delete [] out_UPDATE_DIR_HISTORY ; + delete [] out_UPDATE_RAS_VAL ; + delete [] out_UPDATE_RAS_ADDRESS ; + delete [] out_UPDATE_RAS_INDEX ; + delete [] out_UPDATE_RAS_PREDICTION_IFETCH; + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] out_DEPTH_NB_BRANCH; + delete [] out_DEPTH_TAIL; + #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h (revision 81) @@ -24,8 +24,33 @@ { //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_context ; + public : uint32_t * _size_queue ; // [nb_context] + public : uint32_t _size_address ; + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_decod ; + public : uint32_t _nb_inst_branch_complete; + public : uint32_t _nb_inst_update ; + public : uint32_t _size_history ; + public : uint32_t * _size_ras_index ; // [nb_context] + public : uint32_t _size_context_id ; + public : uint32_t _size_depth ; + public : uint32_t _max_size_ras_index ; + + public : bool _have_port_context_id ; + public : bool _have_port_depth ; + public : bool _have_port_history ; + //-----[ methods ]----------------------------------------------------------- - public : Parameters (); -// public : Parameters (Parameters & param) ; + public : Parameters (uint32_t nb_context , + uint32_t * size_queue , + uint32_t size_address , + uint32_t nb_inst_predict , + uint32_t nb_inst_decod , + uint32_t nb_inst_branch_complete, + uint32_t nb_inst_update , + uint32_t size_history , + uint32_t * size_ras_index ); +//public : Parameters (Parameters & param) ; public : ~Parameters () ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 81) @@ -19,4 +19,27 @@ namespace update_prediction_table { + typedef enum + { + UPDATE_PREDICTION_STATE_EMPTY , // Slot is empty + UPDATE_PREDICTION_STATE_WAIT_DECOD , // Fetch have access at the predictor + UPDATE_PREDICTION_STATE_WAITEND , // Have make a prediction, wait branch_complete + UPDATE_PREDICTION_STATE_OK , // branch is complete and can update predictor + UPDATE_PREDICTION_STATE_KO , // have a event - must update predictor unit + UPDATE_PREDICTION_STATE_END // branch is updated + } state_t; + + class entry_t + { + public : state_t _state; + public : Tcontrol_t _ifetch_prediction; + public : Tbranch_condition_t _condition; + public : Taddress_t _address_src; + public : Taddress_t _address_dest; + public : Tcontrol_t _last_take; + public : Tcontrol_t _good_take; + public : Thistory_t _history; + public : Taddress_t _address_ras; + public : Tptr_t _index_ras; + }; }; // end namespace update_prediction_table @@ -25,6 +48,22 @@ }; // end namespace multi_front_end }; // end namespace core +}; // end namespace behavioural + -}; // end namespace behavioural + template<> inline std::string toString(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::state_t& x) + { + switch (x) + { + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_EMPTY : return "empty" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAIT_DECOD : return "wait_decod"; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAITEND : return "waitend" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_OK : return "ok" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_KO : return "ko" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_END : return "end" ; break; + default : return "" ; break; + } + }; + + }; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 81) @@ -62,9 +62,87 @@ public : SC_IN (Tcontrol_t) * in_NRESET ; + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_PREDICT_VAL ; //[nb_inst_predict] + public : SC_OUT(Tcontrol_t ) ** out_PREDICT_ACK ; //[nb_inst_predict] + public : SC_IN (Tcontext_t ) ** in_PREDICT_CONTEXT_ID ; //[nb_inst_predict] + public : SC_IN (Taddress_t ) ** in_PREDICT_BTB_ADDRESS_SRC ; //[nb_inst_predict] + public : SC_IN (Taddress_t ) ** in_PREDICT_BTB_ADDRESS_DEST ; //[nb_inst_predict] + public : SC_IN (Tbranch_condition_t) ** in_PREDICT_BTB_CONDITION ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_LAST_TAKE ; //[nb_inst_predict] + public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_IS_ACCURATE ; //[nb_inst_predict] + public : SC_IN (Thistory_t ) ** in_PREDICT_DIR_HISTORY ; //[nb_inst_predict] + public : SC_IN (Taddress_t ) ** in_PREDICT_RAS_ADDRESS ; //[nb_inst_predict] + public : SC_IN (Tptr_t ) ** in_PREDICT_RAS_INDEX ; //[nb_inst_predict] +//public : SC_OUT(Tprediction_ptr_t ) ** out_PREDICT_UPDATE_PREDICTION_ID; //[nb_inst_predict] + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_DECOD_VAL ; //[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_ACK ; //[nb_inst_decod] + public : SC_IN (Tcontext_t ) ** in_DECOD_CONTEXT_ID ; //[nb_inst_decod] + public : SC_IN (Taddress_t ) ** in_DECOD_BTB_ADDRESS_SRC ; //[nb_inst_decod] + public : SC_IN (Taddress_t ) ** in_DECOD_BTB_ADDRESS_DEST ; //[nb_inst_decod] + public : SC_IN (Tbranch_condition_t) ** in_DECOD_BTB_CONDITION ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_BTB_LAST_TAKE ; //[nb_inst_decod] +//public : SC_IN (Tcontrol_t ) ** in_DECOD_BTB_IS_ACCURATE ; //[nb_inst_decod] +//public : SC_IN (Thistory_t ) ** in_DECOD_DIR_HISTORY ; //[nb_inst_decod] // if ifetch prediction is miss -> miss btb -> make a static state + public : SC_IN (Taddress_t ) ** in_DECOD_RAS_ADDRESS ; //[nb_inst_decod] + public : SC_IN (Tptr_t ) ** in_DECOD_RAS_INDEX ; //[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_MISS_PREDICTION ; //[nb_inst_decod] // ifetch is a miss pred + public : SC_IN (Tprediction_ptr_t ) ** in_DECOD_UPDATE_PREDICTION_ID ; //[nb_inst_decod] +//public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ; //[nb_inst_decod] + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_VAL ; //[nb_inst_branch_complete] + public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_ACK ; //[nb_inst_branch_complete] + public : SC_IN (Tcontext_t ) ** in_BRANCH_COMPLETE_CONTEXT_ID ; //[nb_inst_branch_complete] + public : SC_IN (Tdepth_t ) ** in_BRANCH_COMPLETE_DEPTH ; //[nb_inst_branch_complete] + public : SC_IN (Taddress_t ) ** in_BRANCH_COMPLETE_ADDRESS ; //[nb_inst_branch_complete] + public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_FLAG ; //[nb_inst_branch_complete] + public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete] + public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] + public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_SRC ; //[nb_inst_branch_complete] + public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_VAL ; //[nb_inst_update] + public : SC_IN (Tcontrol_t ) ** in_UPDATE_ACK ; //[nb_inst_update] + public : SC_OUT(Tcontext_t ) ** out_UPDATE_CONTEXT_ID ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_MISS_PREDICTION ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_DIRECTION_GOOD ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_BTB_VAL ; //[nb_inst_update] + public : SC_OUT(Taddress_t ) ** out_UPDATE_BTB_ADDRESS_SRC ; //[nb_inst_update] + public : SC_OUT(Taddress_t ) ** out_UPDATE_BTB_ADDRESS_DEST ; //[nb_inst_update] + public : SC_OUT(Tbranch_condition_t) ** out_UPDATE_BTB_CONDITION ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_DIR_VAL ; //[nb_inst_update] + public : SC_OUT(Thistory_t ) ** out_UPDATE_DIR_HISTORY ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_RAS_VAL ; //[nb_inst_update] + public : SC_OUT(Taddress_t ) ** out_UPDATE_RAS_ADDRESS ; //[nb_inst_update] + public : SC_OUT(Tptr_t ) ** out_UPDATE_RAS_INDEX ; //[nb_inst_update] + public : SC_OUT(Tcontrol_t ) ** out_UPDATE_RAS_PREDICTION_IFETCH; //[nb_inst_update] + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_OUT(Tdepth_t ) ** out_DEPTH_NB_BRANCH; //[nb_context] + public : SC_OUT(Tdepth_t ) ** out_DEPTH_TAIL; //[nb_context] + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t * reg_TOP ; //[nb_context] + private : uint32_t * reg_BOTTOM ; //[nb_context] + private : uint32_t * reg_NB_ELT ; //[nb_context] + private : uint32_t * reg_NB_ELT_NEED_UPDATE ; //[nb_context] + private : entry_t ** reg_UPDATE_PREDICTION_TABLE; //[nb_context][size_queue] + private : uint32_t reg_UPDATE_PRIORITY ; // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t * internal_PREDICT_ACK ; //[nb_inst_predict] + private : Tcontrol_t * internal_DECOD_ACK ; //[nb_inst_decod] + private : Tcontrol_t * internal_BRANCH_COMPLETE_ACK ; //[nb_inst_branch_complete] + private : Tcontrol_t * internal_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete] + private : Tcontrol_t * internal_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] + private : Taddress_t * internal_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] + private : Tcontrol_t * internal_UPDATE_VAL ; //[nb_inst_update] + private : Tcontext_t * internal_UPDATE_CONTEXT_ID ; //[nb_inst_update] + private : Tdepth_t * internal_UPDATE_DEPTH ; //[nb_inst_update] #endif @@ -85,5 +163,5 @@ #endif Parameters * param, - morpheo::behavioural::Tusage_t usage=USE_ALL + morpheo::behavioural::Tusage_t usage ); public : ~Update_Prediction_Table (void); @@ -100,5 +178,9 @@ #ifdef SYSTEMC public : void transition (void); -//public : void genMoore (void); + public : void genMoore (void); + public : void genMealy_predict (void); + public : void genMealy_decod (void); + public : void genMealy_branch_complete (void); +//public : void genMealy_update (void); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp (revision 81) @@ -7,4 +7,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" +#include "Common/include/Max.h" namespace morpheo { @@ -19,7 +20,34 @@ #undef FUNCTION #define FUNCTION "Update_Prediction_Table::Parameters" - Parameters::Parameters () + Parameters::Parameters (uint32_t nb_context , + uint32_t * size_queue , + uint32_t size_address , + uint32_t nb_inst_predict , + uint32_t nb_inst_decod , + uint32_t nb_inst_branch_complete, + uint32_t nb_inst_update , + uint32_t size_history , + uint32_t * size_ras_index ) { log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + _nb_context = nb_context ; + _size_queue = size_queue ; + _size_address = size_address ; + _nb_inst_predict = nb_inst_predict ; + _nb_inst_decod = nb_inst_decod ; + _nb_inst_branch_complete = nb_inst_branch_complete; + _nb_inst_update = nb_inst_update ; + _size_history = size_history ; + _size_ras_index = size_ras_index ; + + _size_context_id = log2(nb_context); + _size_depth = log2(max(size_queue,nb_context)); + _max_size_ras_index = max(_size_ras_index,nb_context); + + _have_port_context_id = _size_context_id> 0; + _have_port_depth = _size_depth > 0; + _have_port_history = _size_history > 0; + test(); log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp (revision 81) @@ -27,4 +27,7 @@ Parameters_test test ("Update_Prediction_Table"); + if (morpheo::behavioural::test(_size_depth) == false) + test.error("type \"Tdepth_t\" is too small."); + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp (revision 81) @@ -27,5 +27,21 @@ xml.balise_open("update_prediction_table"); -// xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end(); + xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); + xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); + xml.singleton_begin("nb_inst_predict "); xml.attribut("value",toString(_nb_inst_predict )); xml.singleton_end(); + xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); + xml.singleton_begin("nb_inst_branch_complete"); xml.attribut("value",toString(_nb_inst_branch_complete)); xml.singleton_end(); + xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); + xml.singleton_begin("size_history "); xml.attribut("value",toString(_size_history )); xml.singleton_end(); + for (uint32_t i=0;i<_nb_context; i++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(i)); + xml. balise_open_end(); + xml. singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue [i])); xml.singleton_end(); + xml. singleton_begin("size_ras_index "); xml.attribut("value",toString(_size_ras_index [i])); xml.singleton_end(); + xml. balise_close(); + } xml.balise_close(); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp (revision 81) @@ -38,4 +38,6 @@ log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + usage_environment(_usage); + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Allocation"); @@ -68,4 +70,11 @@ if (_usage & USE_SYSTEMC) { + + for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) + { + internal_BRANCH_COMPLETE_ACK [i] = 1; + PORT_WRITE(out_BRANCH_COMPLETE_ACK [i], internal_BRANCH_COMPLETE_ACK [i]); + } + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - transition"); @@ -76,4 +85,103 @@ # ifdef SYSTEMCASS_SPECIFIC // List dependency information +# endif + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMoore"); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_predict"); + + SC_METHOD (genMealy_predict); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + if (_param->_have_port_context_id) + sensitive << (*(in_PREDICT_CONTEXT_ID [i])); + sensitive << (*(in_PREDICT_BTB_IS_ACCURATE [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + (*(out_PREDICT_ACK [i])) (*(in_PREDICT_BTB_IS_ACCURATE [i])); + if (_param->_have_port_context_id) + (*(out_PREDICT_ACK [i])) (*(in_PREDICT_CONTEXT_ID [i])); + } +# endif + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_decod"); + + SC_METHOD (genMealy_decod); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + if (_param->_have_port_context_id) + sensitive << (*(in_DECOD_CONTEXT_ID [i])); + sensitive << (*(in_DECOD_MISS_PREDICTION [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + (*(out_DECOD_ACK [i])) (*(in_DECOD_MISS_PREDICTION [i])); + if (_param->_have_port_context_id) + (*(out_DECOD_ACK [i])) (*(in_DECOD_CONTEXT_ID [i])); + } +# endif + + log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_branch_complete"); + + SC_METHOD (genMealy_branch_complete); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // use internal register + for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) + { + if (_param->_have_port_context_id) + sensitive << (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); + if (_param->_have_port_depth) + sensitive << (*(in_BRANCH_COMPLETE_DEPTH [i])); + sensitive << (*(in_BRANCH_COMPLETE_FLAG [i])) + << (*(in_BRANCH_COMPLETE_ADDRESS [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information + for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) + { + if (_param->_have_port_context_id) + (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); + if (_param->_have_port_depth) + (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); + (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_FLAG [i])); + (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); + + if (_param->_have_port_context_id) + (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); + if (_param->_have_port_depth) + (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); + (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_FLAG [i])); + + if (_param->_have_port_context_id) + (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); + if (_param->_have_port_depth) + (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); + + if (_param->_have_port_context_id) + (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); + if (_param->_have_port_depth) + (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); + (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); + } # endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 81) @@ -55,4 +55,111 @@ in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN,SOUTH, "predict", _param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_DEST ,"btb_address_dest" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_LAST_TAKE ,"btb_last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_IS_ACCURATE ,"btb_is_accurate" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_PREDICT_DIR_HISTORY ,"dir_history" ,Thistory_t ,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_max_size_ras_index); +// ALLOC1_SIGNAL_OUT(out_PREDICT_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); + } + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict", IN,SOUTH, "predict", _param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_DECOD_VAL ,VAL); + ALLOC1_VALACK_OUT(out_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_DEST ,"btb_address_dest" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_IN ( in_DECOD_BTB_LAST_TAKE ,"btb_last_take" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_DECOD_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_DECOD_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_max_size_ras_index); + ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION ,"miss_prediction" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_DECOD_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); +// ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); + } + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("branch_complete", IN,SOUTH, "branch_complete", _param->_nb_inst_branch_complete); + + + ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_CONTEXT_ID ,"context_id" ,Tcontext_t,_param->_size_context_id); + ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); + ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS ,"address" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_FLAG ,"flag" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_address); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update",OUT,SOUTH, "update", _param->_nb_inst_update); + + ALLOC1_VALACK_OUT(out_UPDATE_VAL ,VAL); + ALLOC1_VALACK_IN ( in_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT(out_UPDATE_MISS_PREDICTION ,"miss_prediction" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_DIRECTION_GOOD ,"direction_good" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_VAL ,"btb_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_DEST ,"btb_address_dest" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); + ALLOC1_SIGNAL_OUT(out_UPDATE_DIR_VAL ,"dir_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_DIR_HISTORY ,"dir_history" ,Thistory_t ,_param->_size_history); + ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_VAL ,"ras_val" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_max_size_ras_index); + ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_PREDICTION_IFETCH,"ras_prediction_ifetch",Tcontrol_t ,1); + } + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("depth",OUT,SOUTH, "depth", _param->_nb_context); + + ALLOC1_SIGNAL_OUT(out_DEPTH_NB_BRANCH,"NB_BRANCH",Tdepth_t,_param->_size_depth); + ALLOC1_SIGNAL_OUT(out_DEPTH_TAIL,"TAIL",Tdepth_t,_param->_size_depth); + } + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + internal_PREDICT_ACK = new Tcontrol_t [_param->_nb_inst_predict]; + internal_DECOD_ACK = new Tcontrol_t [_param->_nb_inst_decod]; + internal_BRANCH_COMPLETE_ACK = new Tcontrol_t [_param->_nb_inst_branch_complete]; + internal_BRANCH_COMPLETE_MISS_PREDICTION = new Tcontrol_t [_param->_nb_inst_branch_complete]; + internal_BRANCH_COMPLETE_TAKE = new Tcontrol_t [_param->_nb_inst_branch_complete]; + internal_BRANCH_COMPLETE_ADDRESS_DEST = new Taddress_t [_param->_nb_inst_branch_complete]; + internal_UPDATE_VAL = new Tcontrol_t [_param->_nb_inst_update]; + internal_UPDATE_CONTEXT_ID = new Tcontext_t [_param->_nb_inst_update]; + internal_UPDATE_DEPTH = new Tdepth_t [_param->_nb_inst_update]; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + reg_TOP = new uint32_t [_param->_nb_context]; + reg_BOTTOM = new uint32_t [_param->_nb_context]; + reg_NB_ELT = new uint32_t [_param->_nb_context]; + reg_NB_ELT_NEED_UPDATE = new uint32_t [_param->_nb_context]; + reg_UPDATE_PREDICTION_TABLE = new entry_t * [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + { +#ifndef NO_INIT + reg_TOP [i] = 0; +#endif + reg_UPDATE_PREDICTION_TABLE [i] = new entry_t [_param->_size_queue[i]]; + } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 81) @@ -27,5 +27,100 @@ delete in_CLOCK ; delete in_NRESET; + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + if (_param->_have_port_context_id) + delete [] in_PREDICT_CONTEXT_ID ; + delete [] in_PREDICT_BTB_ADDRESS_SRC ; + delete [] in_PREDICT_BTB_ADDRESS_DEST ; + delete [] in_PREDICT_BTB_CONDITION ; + delete [] in_PREDICT_BTB_LAST_TAKE ; + delete [] in_PREDICT_BTB_IS_ACCURATE ; + if (_param->_have_port_history) + delete [] in_PREDICT_DIR_HISTORY ; + delete [] in_PREDICT_RAS_ADDRESS ; + delete [] in_PREDICT_RAS_INDEX ; +// if (_param->_have_port_depth) +// delete [] out_PREDICT_UPDATE_PREDICTION_ID; + + // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_DECOD_VAL ; + delete [] out_DECOD_ACK ; + if (_param->_have_port_context_id) + delete [] in_DECOD_CONTEXT_ID ; + delete [] in_DECOD_BTB_ADDRESS_SRC ; + delete [] in_DECOD_BTB_ADDRESS_DEST ; + delete [] in_DECOD_BTB_CONDITION ; + delete [] in_DECOD_BTB_LAST_TAKE ; + delete [] in_DECOD_RAS_ADDRESS ; + delete [] in_DECOD_RAS_INDEX ; + delete [] in_DECOD_MISS_PREDICTION ; + if (_param->_have_port_depth) + delete [] in_DECOD_UPDATE_PREDICTION_ID ; +// if (_param->_have_port_depth) +// delete [] out_DECOD_DEPTH ; + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] in_BRANCH_COMPLETE_VAL ; + delete [] out_BRANCH_COMPLETE_ACK ; + if (_param->_have_port_context_id) + delete [] in_BRANCH_COMPLETE_CONTEXT_ID ; + if (_param->_have_port_depth) + delete [] in_BRANCH_COMPLETE_DEPTH ; + delete [] in_BRANCH_COMPLETE_ADDRESS ; + delete [] in_BRANCH_COMPLETE_FLAG ; + delete [] out_BRANCH_COMPLETE_MISS_PREDICTION; + delete [] out_BRANCH_COMPLETE_TAKE ; + delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; + delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] out_UPDATE_VAL ; + delete [] in_UPDATE_ACK ; + if (_param->_have_port_context_id) + delete [] out_UPDATE_CONTEXT_ID ; + delete [] out_UPDATE_MISS_PREDICTION ; + delete [] out_UPDATE_DIRECTION_GOOD ; + delete [] out_UPDATE_BTB_VAL ; + delete [] out_UPDATE_BTB_ADDRESS_SRC ; + delete [] out_UPDATE_BTB_ADDRESS_DEST ; + delete [] out_UPDATE_BTB_CONDITION ; + delete [] out_UPDATE_DIR_VAL ; + if (_param->_have_port_history) + delete [] out_UPDATE_DIR_HISTORY ; + delete [] out_UPDATE_RAS_VAL ; + delete [] out_UPDATE_RAS_ADDRESS ; + delete [] out_UPDATE_RAS_INDEX ; + delete [] out_UPDATE_RAS_PREDICTION_IFETCH; + + // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + if (_param->_have_port_depth) + { + delete [] out_DEPTH_NB_BRANCH; + delete [] out_DEPTH_TAIL; + } } + + // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] internal_PREDICT_ACK ; + delete [] internal_DECOD_ACK ; + delete [] internal_BRANCH_COMPLETE_ACK ; + delete [] internal_BRANCH_COMPLETE_MISS_PREDICTION ; + delete [] internal_BRANCH_COMPLETE_TAKE ; + delete [] internal_BRANCH_COMPLETE_ADDRESS_DEST ; + delete [] internal_UPDATE_VAL ; + delete [] internal_UPDATE_CONTEXT_ID ; + delete [] internal_UPDATE_DEPTH ; + + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete [] reg_TOP; + delete [] reg_BOTTOM; + delete [] reg_NB_ELT; + delete [] reg_NB_ELT_NEED_UPDATE; + for (uint32_t i=0; i<_param->_nb_context; i++) + delete [] reg_UPDATE_PREDICTION_TABLE [i]; + delete [] reg_UPDATE_PREDICTION_TABLE; + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp (revision 81) @@ -0,0 +1,105 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::genMealy_branch_complete" + void Update_Prediction_Table::genMealy_branch_complete (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; + Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; + Tcontrol_t miss = false; + Tcontrol_t take = reg_UPDATE_PREDICTION_TABLE [context][depth]._last_take ; + Taddress_t addr_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; + Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition ; + + switch (condition) + { + case BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK : // l.j + case BRANCH_CONDITION_NONE_WITH_WRITE_STACK : // l.jal + { + //miss : always hit + //addr_dest : know in decod stage + break; + } + case BRANCH_CONDITION_FLAG_UNSET : // l.bnf + { + Tcontrol_t take_good = PORT_READ(in_BRANCH_COMPLETE_FLAG [i]) == 0; + miss = (take != take_good); + take = take_good; + //addr_dest : know in decod stage + break; + } + case BRANCH_CONDITION_FLAG_SET : // l.bf + { +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_CONDITION_FLAG_SET"); + + Tcontrol_t take_good = PORT_READ(in_BRANCH_COMPLETE_FLAG [i]) == 1; + miss = (take != take_good); + take = take_good; + +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * flag : %d",PORT_READ(in_BRANCH_COMPLETE_FLAG [i])); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * take_good : %d",take_good); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); + + //addr_dest : know in decod stage + break; + } + case BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK : // l.jr (rb!=r9) + case BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK : // l.jalr + case BRANCH_CONDITION_READ_STACK : // l.jr (rb==r9) + { + Taddress_t addr_good = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]); + miss = ((take == 1) and + (addr_dest = addr_good)); + take = 1; + addr_dest = addr_good; + break; + } + } + +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * take : %d",take); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * address : %x",addr_dest); + + internal_BRANCH_COMPLETE_MISS_PREDICTION [i] = miss ; + internal_BRANCH_COMPLETE_TAKE [i] = take ; + internal_BRANCH_COMPLETE_ADDRESS_DEST [i] = addr_dest; + + PORT_WRITE(out_BRANCH_COMPLETE_MISS_PREDICTION [i], internal_BRANCH_COMPLETE_MISS_PREDICTION [i]); + PORT_WRITE(out_BRANCH_COMPLETE_TAKE [i], internal_BRANCH_COMPLETE_TAKE [i]); + PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS_SRC [i], reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src); + PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS_DEST [i], internal_BRANCH_COMPLETE_ADDRESS_DEST [i]); + } + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp (revision 81) @@ -0,0 +1,56 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::genMealy_decod" + void Update_Prediction_Table::genMealy_decod (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); + + if (miss) + { + // miss : need a empty slot. + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; + uint32_t top = reg_TOP[context]; + internal_DECOD_ACK [i] = (reg_UPDATE_PREDICTION_TABLE [context][top]._state == UPDATE_PREDICTION_STATE_EMPTY); + } + else + { + internal_DECOD_ACK [i] = true; + } + + PORT_WRITE(out_DECOD_ACK [i], internal_DECOD_ACK [i]); + } + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp (revision 81) @@ -0,0 +1,61 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::genMealy_predict" + void Update_Prediction_Table::genMealy_predict (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; + uint32_t top = reg_TOP[context]; + +// log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT [%d] (genMealy)",i); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state : %s",toString(reg_UPDATE_PREDICTION_TABLE [context][top]._state).c_str()); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * is accurate : %d",PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i])); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * need update : %d",reg_NB_ELT_NEED_UPDATE [context]); + + // Not Full, accurate and no previous miss + // Optimisation to restart faster : + // don't counter nb_elt_ko, but just nb_elt that need a update (change branch structure) + internal_PREDICT_ACK [i] = ((reg_UPDATE_PREDICTION_TABLE [context][top]._state == UPDATE_PREDICTION_STATE_EMPTY) and + PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]) and + (reg_NB_ELT_NEED_UPDATE [context] == 0)); + +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ACK : %d",internal_PREDICT_ACK [i]); + + PORT_WRITE(out_PREDICT_ACK [i], internal_PREDICT_ACK [i]); + } + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp (revision 81) @@ -0,0 +1,112 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace update_prediction_table { + + +#undef FUNCTION +#define FUNCTION "Update_Prediction_Table::genMoore" + void Update_Prediction_Table::genMoore (void) + { + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + + // =================================================================== + // =====[ DEPTH ]===================================================== + // =================================================================== + + if (_param->_have_port_depth) + for (uint32_t i=0; i<_param->_nb_context; i++) + { + PORT_WRITE(out_DEPTH_NB_BRANCH [i], reg_NB_ELT [i]); + PORT_WRITE(out_DEPTH_TAIL [i], reg_BOTTOM [i]); + } + + // =================================================================== + // =====[ UPDATE ]==================================================== + // =================================================================== + + Tdepth_t tab_depth [_param->_nb_context]; + for (uint32_t i=0; i<_param->_nb_context; i++) + tab_depth [i] = reg_BOTTOM [i]; + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + uint32_t context = (reg_UPDATE_PRIORITY+i)%_param->_nb_context; + Tdepth_t depth = tab_depth[context]; + state_t state = reg_UPDATE_PREDICTION_TABLE [context][depth]._state; + + Tcontrol_t val = ((state == UPDATE_PREDICTION_STATE_OK) or + (state == UPDATE_PREDICTION_STATE_KO)); + +// log_printf(TRACE,Update_Prediction_Table,FUNCTION,"UPDATE [%d] (genMoore)",i); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state : %s",toString(state).c_str()); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * val : %d",val); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * addr_src : %x",reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src ); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * addr_dest : %x",reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest); + + if (val) + { + Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; + + Tcontrol_t ifetch = reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction; + Tcontrol_t btb_val = true; + Tcontrol_t dir_val = (ifetch and // not ifetch == static prediction + ((cond == BRANCH_CONDITION_FLAG_UNSET) or + (cond == BRANCH_CONDITION_FLAG_SET))); + Tcontrol_t ras_val = ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_STACK)); + + if (_param->_have_port_context_id) + PORT_WRITE(out_UPDATE_CONTEXT_ID [i],context); + PORT_WRITE(out_UPDATE_MISS_PREDICTION [i],(state == UPDATE_PREDICTION_STATE_KO)); + PORT_WRITE(out_UPDATE_DIRECTION_GOOD [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take ); + PORT_WRITE(out_UPDATE_BTB_VAL [i],btb_val); + PORT_WRITE(out_UPDATE_BTB_ADDRESS_SRC [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src ); + PORT_WRITE(out_UPDATE_BTB_ADDRESS_DEST [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest); + PORT_WRITE(out_UPDATE_BTB_CONDITION [i],cond); + PORT_WRITE(out_UPDATE_DIR_VAL [i],dir_val); + if (_param->_have_port_history) + PORT_WRITE(out_UPDATE_DIR_HISTORY [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._history ); + PORT_WRITE(out_UPDATE_RAS_VAL [i],ras_val); + PORT_WRITE(out_UPDATE_RAS_ADDRESS [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._address_ras ); + PORT_WRITE(out_UPDATE_RAS_INDEX [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._index_ras ); + PORT_WRITE(out_UPDATE_RAS_PREDICTION_IFETCH [i],ifetch); + + internal_UPDATE_CONTEXT_ID [i] = context; + internal_UPDATE_DEPTH [i] = depth; + + tab_depth[context] = (depth+1)%_param->_size_queue[context]; + } + + internal_UPDATE_VAL [i] = val; + PORT_WRITE(out_UPDATE_VAL [i], internal_UPDATE_VAL [i]); + } + + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); + }; + +}; // end namespace update_prediction_table +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 81) @@ -24,4 +24,249 @@ log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + if (PORT_READ(in_NRESET) == 0) + { + for (uint32_t i=0; i<_param->_nb_context; i++) + { + reg_TOP [i] = 0; + reg_BOTTOM [i] = 0; + reg_NB_ELT [i] = 0; + reg_NB_ELT_NEED_UPDATE [i] = 0; + for (uint32_t j=0; j<_param->_size_queue[i]; j++) + reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY; + } + reg_UPDATE_PRIORITY = 0; + } + else + { + // =================================================================== + // =====[ PREDICT ]=================================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; + uint32_t top = reg_TOP [context]; + + log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT[%d] - Accepted",i); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt : %d",reg_NB_ELT[context]); + + reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_WAIT_DECOD; + reg_UPDATE_PREDICTION_TABLE [context][top]._ifetch_prediction = true; + reg_UPDATE_PREDICTION_TABLE [context][top]._condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_PREDICT_BTB_LAST_TAKE [i]); + //reg_UPDATE_PREDICTION_TABLE [context][top]._good_take + reg_UPDATE_PREDICTION_TABLE [context][top]._history = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0; + reg_UPDATE_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_PREDICT_RAS_ADDRESS [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); + + reg_TOP [context] = (top+1)%_param->_size_queue [context]; + reg_NB_ELT [context] ++; + } + + // =================================================================== + // =====[ DECOD ]===================================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; + Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); + + log_printf(TRACE,Update_Prediction_Table,FUNCTION,"DECOD[%d] - Accepted",i); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt : %d",reg_NB_ELT[context]); + + // Test if miss ifetch + // miss ifetch = decod a branch and the predict unit have not predict this branch ... gloup :P + if (miss) + { + Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; + Tdepth_t top = reg_TOP [context]; + + reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_WAITEND; + reg_UPDATE_PREDICTION_TABLE [context][top]._ifetch_prediction = false; // static prediction + reg_UPDATE_PREDICTION_TABLE [context][top]._condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); + //reg_UPDATE_PREDICTION_TABLE [context][top]._good_take + //reg_UPDATE_PREDICTION_TABLE [context][top]._history + reg_UPDATE_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_DECOD_RAS_ADDRESS [i]); + reg_UPDATE_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_DECOD_RAS_INDEX [i]); + + // Invalid all previous "ifetch" prediction + // (ifetch prediction = prediction make in fetch stage and not again comming in decod stage) + uint32_t nb_elt_miss = ((top> depth)?top:(top+_param->_size_queue[context]))-depth; + uint32_t nb_elt_need_update = 0; + for (uint32_t j=0; j_size_queue[context]; + + // Ifetch have make a prediction and it's a miss + // When ifetch predict : + // * btb is not change -> needn't update + // * direction is not change -> needn't update + // * ras have change -> need update + + Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition; + if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_STACK)) + { + nb_elt_need_update ++; + reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO; + } + else + { + reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END; + } + } + + reg_TOP [context] = (depth+1)%_param->_size_queue [context]; + reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update; + reg_NB_ELT [context] ++; + } + else + { + // Normal case : branch is previous predicated, change state of branch + Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; + + reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_WAITEND; + } + } + + // =================================================================== + // =====[ BRANCH_COMPLETE ]=========================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) + if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) + { + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; + Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; + + log_printf(TRACE,Update_Prediction_Table,FUNCTION,"BRANCH_COMPLETE[%d] - Accepted",i); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt : %d",reg_NB_ELT[context]); + + if (internal_BRANCH_COMPLETE_MISS_PREDICTION [i]) + { + // Miss case + reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; + + // Another prediction (prediction with depth higer) + Tdepth_t top = reg_TOP [context]; + uint32_t nb_elt_miss = ((top> depth)?top:(top+_param->_size_queue[context]))-depth; + uint32_t nb_elt_need_update = 1; + for (uint32_t j=1; j_size_queue[context]; + + // Ifetch have make a prediction and it's a miss + // When ifetch predict : + // * btb is not change -> needn't update + // * direction is not change -> needn't update + // * ras have change -> need update + + Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition; + if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or + (cond == BRANCH_CONDITION_READ_STACK)) + { + nb_elt_need_update ++; + reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO; + } + else + { + reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END; + } + } + reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update; + + // Update pointer : + reg_TOP [context] = depth; + reg_NB_ELT [context] -= nb_elt_miss; + } + else + { + // Hit case +#ifdef DEBUG_TEST + if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAITEND) + ERRORMORPHEO(FUNCTION,"Branche complete : invalid state"); +#endif + reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; + } + + // In all case : update good_take and address_destination + reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = internal_BRANCH_COMPLETE_TAKE [i]; + reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; + } + + // =================================================================== + // =====[ UPDATE ]==================================================== + // =================================================================== + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + if (internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) + { + Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; + Tdepth_t depth = internal_UPDATE_DEPTH [i]; + + log_printf(TRACE,Update_Prediction_Table,FUNCTION,"UPDATE[%d] - Accepted",i); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); + + if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) + reg_NB_ELT_NEED_UPDATE [context] --; + + reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END; + } + + // Round robin + reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context; + + // =================================================================== + // =====[ GARBAGE COLLECTOR ]========================================= + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_context; i++) + { + uint32_t bottom = reg_BOTTOM [i]; + + // Test if the tail of queue is finish (ok or ko and update) + if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END) + { + log_printf(TRACE,Update_Prediction_Table,FUNCTION,"GARBAGE_COLLECTOR"); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom : %d",bottom); + + reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; + reg_BOTTOM [i] = (bottom+1)%_param->_size_queue [i]; + if (reg_NB_ELT [i]>0) + reg_NB_ELT [i] --; + } + } + } + +// #if (DEBUG >= DEBUG_TRACE) + log_printf(TRACE,Update_Prediction_Table,FUNCTION,"Dump Update_Prediction_Table"); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPDATE_PRIORITY : %d",reg_UPDATE_PRIORITY); + for (uint32_t i=0; i<_param->_nb_context; i++) + { + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_TOP : %d",reg_TOP [i]); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_BOTTOM : %d",reg_BOTTOM [i]); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_NB_ELT : %d",reg_NB_ELT [i]); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_NB_ELT_NEED_UPDATE : %d",reg_NB_ELT_NEED_UPDATE [i]); + for (uint32_t j=0; j<_param->_size_queue[i]; j++) + log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %s %x",j,toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str(),reg_UPDATE_PREDICTION_TABLE [i][j]._address_src); + } +// #endif + + #if defined(STATISTICS) or defined(VHDL_TESTBENCH) end_cycle (); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Parameters.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Parameters.h (revision 81) @@ -32,8 +32,8 @@ public : ~Parameters () ; - public : std::string msg_error (void); - public : std::string print (uint32_t depth); - public : friend std::ostream& operator<< (std::ostream& output_stream, - morpheo::behavioural::generic::counter::Parameters & x); + public : Parameters_test msg_error (void); + public : std::string print (uint32_t depth); + public : friend std::ostream& operator<< (std::ostream& output_stream, + morpheo::behavioural::generic::counter::Parameters & x); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters_msg_error.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters_msg_error.cpp (revision 81) @@ -16,23 +16,17 @@ - std::string Parameters::msg_error(void) + Parameters_test Parameters::msg_error(void) { log_printf(FUNC,Counter,"msg_error","Begin"); - std::string msg = ""; + Parameters_test test ("Counter"); if (_size_data < 1) - { - msg += " - size_data must be > 0\n"; - msg += " * size_data : " + toString(_size_data) + "\n"; - } + test.error("size_data must be > 0\n"); if (_nb_port < 1) - { - msg += " - nb_port must be > 0\n"; - msg += " * nb_port : " + toString(_nb_port) + "\n"; - } + test.error("nb_port must be > 0\n"); - return msg; + return test; log_printf(FUNC,Counter,"msg_error","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp (revision 81) @@ -52,10 +52,10 @@ sc_signal READ_VAL [_param->_nb_port_read]; sc_signal READ_ACK [_param->_nb_port_read]; - sc_signal READ_ADDRESS [_param->_nb_port_read]; + sc_signal READ_ADDRESS [_param->_nb_port_read]; sc_signal READ_DATA [_param->_nb_port_read]; sc_signal WRITE_VAL [_param->_nb_port_write]; sc_signal WRITE_ACK [_param->_nb_port_write]; - sc_signal WRITE_ADDRESS [_param->_nb_port_write]; + sc_signal WRITE_ADDRESS [_param->_nb_port_write]; sc_signal WRITE_DATA [_param->_nb_port_write]; @@ -127,9 +127,9 @@ cout << "<" << name << "> 1) Write the RegisterFile (no read)" << endl; - Taddress_t nb_val = 0; - Taddress_t nb_ack = 0; + registerfile::Taddress_t nb_val = 0; + registerfile::Taddress_t nb_ack = 0; Tdata_t tab_data [_param->_nb_word]; - Taddress_t tab_address [nb_request ]; + registerfile::Taddress_t tab_address [nb_request ]; for (uint32_t i=0; i<_param->_nb_word; i++) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common (revision 81) @@ -21,20 +21,12 @@ LIBDIR = $(DIR_LIBRARY) \ $(SYSTEMC_LIBDIR_$(SIMULATOR)) -# $(SOCLIB_LIBDIR) \ # $(OR1K_LIBDIR) -LIBS = $(LIBRARY) -lm $(SYSTEMC_LIBNAME_$(SIMULATOR)) -ldl +LIBS = $(LIBRARY) -lm $(SYSTEMC_LIBNAME_$(SIMULATOR)) -# $(SOCLIB_LIBNAME) $(OR1K_LIBNAME) -lbfd +# $(OR1K_LIBNAME) -lbfd FLAGS_COMMON = $(SYSTEMC_CFLAGS_$(SIMULATOR)) \ $(CXX_FLAGS) - -# -Wno-deprecated \ -# -Wno-non-template-friend \ -# -Wno-pmf-conversions \ -# -Wfatal-errors \ -# -pedantic \ -# -Werror \ CFLAGS = $(MORPHEO_FLAGS) $(FLAGS_COMMON) $(INCDIR) @@ -53,5 +45,5 @@ test_env : - @$(ECHO) "-------------------[ $(ENTITY) ]" + @$(ECHO) "-------------------| $(ENTITY)" ifeq ($(origin MORPHEO_TOPLEVEL), undefined) $(error "variable MORPHEO_TOPLEVEL is undefined"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 81) @@ -20,4 +20,6 @@ OBJECTS = $(OBJECTS_COMMON) +EXEC_PREFIX = +#$(VALGRIND) EXEC_PARAMS = $(SYSTEMC_EXEC_PARAMS_$(SIMULATOR)) EXEC_LOG = $(patsubst $(DIR_CFG_GEN)/%.cfg,$(DIR_LOG)/%.exec.log,$(wildcard $(DIR_CFG_GEN)/*.cfg)) \ @@ -115,5 +117,5 @@ @\ $(ECHO) "Execute : $*";\ - export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ + export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; $(EXEC_PREFIX) ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ declare -i count=`$(GREP) -ch "Test OK" $@`; \ declare timing=`$(GREP) -h "Timing" $@`; \ @@ -126,5 +128,5 @@ @\ $(ECHO) "Execute : $*";\ - export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ + export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; $(EXEC_PREFIX) ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ declare -i count=`$(GREP) -ch "Test OK" $@`; \ if $(TEST) $$count -ne 0; \ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags (revision 81) @@ -18,20 +18,25 @@ -DSTATISTICS \ -DDEBUG=DEBUG_TRACE -# -# + # -DVHDL \ # -DVHDL_TESTBENCH \ # -DVHDL_TESTBENCH_ASSERT \ -# -DCONFIGURATION \ # -DPOSITION \ +# -DNO_TRANSLATE \ # Flags : -# DEBUG={level} - Print Debug Message -# SYSTEMC - To generate a systemc's model -# VHDL - To generate a vhdl's models -# VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model -# VHDL_TESTBENCH_ASSERT (need SYSTEMC) - In the simulation, generate in testbench's file an serie of assert -# STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file -# POSITION - To generate a position's files (it's input of viewer) -# CONFIGURATION - To generate a configuration's file (it's input of viewer and generator) -# NO_TRANSLATE - No translate message +# DEBUG={level} - Print Debug Message +# SYSTEMC - To generate a systemc's model +# VHDL - To generate a vhdl's models +# VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model +# VHDL_TESTBENCH_ASSERT (need SYSTEMC) - In the simulation, generate in testbench's file an serie of assert +# POSITION - To generate a position's files (it's input of viewer) +# STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file +# INFORMATION (need STATISTICS) - Instance Information : +# * Static : at the instance creation +# * register number +# * worst way +# * Dynamique : at the runtime +# * consomation +# NO_TRANSLATE - No translate message +# NO_INIT - No init a lot of register Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/test.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/test.cpp (revision 81) @@ -7,38 +7,10 @@ */ +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + #include "Behavioural/@DIRECTORY/SelfTest/include/test.h" #include "Common/include/Test.h" #include "Behavioural/include/Allocation.h" - -#define NB_ITERATION 1 -#define CYCLE_MAX (128*NB_ITERATION) - -#define LABEL(str...) \ - { \ - msg (_("{%d} "),static_cast(sc_simulation_time())); \ - msg (str); \ - msg (_("\n")); \ - } while(0) - -#define SC_START(cycle_offset) \ - do \ - { \ - /*cout << "SC_START (begin)" << endl;*/ \ - \ - uint32_t cycle_current = static_cast(sc_simulation_time()); \ - if (cycle_offset != 0) \ - { \ - cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ - } \ - \ - if (cycle_current > CYCLE_MAX) \ - { \ - TEST_KO("Maximal cycles Reached"); \ - } \ - \ - sc_start(cycle_offset); \ - \ - /*cout << "SC_START (end )" << endl;*/ \ - } while(0) void test (string name, @@ -51,11 +23,25 @@ #endif - @COMPONENT * _@COMPONENT = new @COMPONENT (name.c_str(), + Tusage_t _usage = USE_ALL; + +// _usage = usage_unset(_usage,USE_SYSTEMC ); +// _usage = usage_unset(_usage,USE_VHDL ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); +// _usage = usage_unset(_usage,USE_POSITION ); +// _usage = usage_unset(_usage,USE_STATISTICS ); +// _usage = usage_unset(_usage,USE_INFORMATION ); + + @COMPONENT * _@COMPONENT = new @COMPONENT + (name.c_str(), #ifdef STATISTICS - _parameters_statistics, + _parameters_statistics, #endif - _param); + _param, + _usage); #ifdef SYSTEMC + if (usage_is_set(_usage,USE_SYSTEMC)) + { /********************************************************************* * Déclarations des signaux @@ -119,4 +105,5 @@ delete in_CLOCK; delete in_NRESET; + } #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h (revision 81) @@ -80,5 +80,5 @@ #endif Parameters * param, - morpheo::behavioural::Tusage_t usage=USE_ALL + morpheo::behavioural::Tusage_t usage ); public : ~@COMPONENT (void); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp (revision 81) @@ -33,4 +33,6 @@ log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); + usage_environment(_usage); + log_printf(INFO,@COMPONENT,FUNCTION,"Allocation"); @@ -42,5 +44,5 @@ #ifdef STATISTICS - if (_usage & USE_STATISTICS) + if (usage_is_set(_usage,USE_STATISTICS)) { log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); @@ -51,5 +53,5 @@ #ifdef VHDL - if (_usage & USE_VHDL) + if (usage_is_set(_usage,USE_VHDL)) { // generate the vhdl @@ -61,5 +63,5 @@ #ifdef SYSTEMC - if (_usage & USE_SYSTEMC) + if (usage_is_set(_usage,USE_SYSTEMC)) { log_printf(INFO,@COMPONENT,FUNCTION,"Method - transition"); @@ -85,5 +87,5 @@ #ifdef STATISTICS - if (_usage & USE_STATISTICS) + if (usage_is_set(_usage,USE_STATISTICS)) { statistics_deallocation(); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp (revision 81) @@ -53,5 +53,6 @@ #ifdef POSITION - _component->generate_file(); + if (usage_is_set(_usage,USE_POSITION)) + _component->generate_file(); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_deallocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_deallocation.cpp (revision 81) @@ -7,4 +7,5 @@ #include "Behavioural/@DIRECTORY/include/@COMPONENT.h" +#include "Behavioural/include/Allocation.h" namespace morpheo { @@ -18,5 +19,5 @@ log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - if (_usage & USE_SYSTEMC) + if (usage_is_set(_usage,USE_SYSTEMC)) { delete in_CLOCK ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_end_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_end_cycle.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_end_cycle.cpp (revision 81) @@ -20,5 +20,6 @@ #ifdef STATISTICS - _stat->end_cycle(); + if (usage_is_set(_usage,USE_STATISTICS)) + _stat->end_cycle(); #endif @@ -26,5 +27,6 @@ // Evaluation before read the ouput signal // sc_start(0); - _interfaces->testbench(); + if (usage_is_set(_usage,USE_VHDL_TESTBENCH)) + _interfaces->testbench(); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/test.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/test.cpp (revision 81) @@ -7,38 +7,10 @@ */ +#define NB_ITERATION 1 +#define CYCLE_MAX (128*NB_ITERATION) + #include "Behavioural/@DIRECTORY/SelfTest/include/test.h" #include "Common/include/Test.h" #include "Behavioural/include/Allocation.h" - -#define NB_ITERATION 1 -#define CYCLE_MAX (128*NB_ITERATION) - -#define LABEL(str...) \ - { \ - msg (_("{%d} "),static_cast(sc_simulation_time())); \ - msg (str); \ - msg (_("\n")); \ - } while(0) - -#define SC_START(cycle_offset) \ - do \ - { \ - /*cout << "SC_START (begin)" << endl;*/ \ - \ - uint32_t cycle_current = static_cast(sc_simulation_time()); \ - if (cycle_offset != 0) \ - { \ - cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ - } \ - \ - if (cycle_current > CYCLE_MAX) \ - { \ - TEST_KO("Maximal cycles Reached"); \ - } \ - \ - sc_start(cycle_offset); \ - \ - /*cout << "SC_START (end )" << endl;*/ \ - } while(0) void test (string name, @@ -51,11 +23,25 @@ #endif - @COMPONENT * _@COMPONENT = new @COMPONENT (name.c_str(), + Tusage_t _usage = USE_ALL; + +// _usage = usage_unset(_usage,USE_SYSTEMC ); +// _usage = usage_unset(_usage,USE_VHDL ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); +// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); +// _usage = usage_unset(_usage,USE_POSITION ); +// _usage = usage_unset(_usage,USE_STATISTICS ); +// _usage = usage_unset(_usage,USE_INFORMATION ); + + @COMPONENT * _@COMPONENT = new @COMPONENT + (name.c_str(), #ifdef STATISTICS - _parameters_statistics, + _parameters_statistics, #endif - _param); + _param, + _usage); #ifdef SYSTEMC + if (usage_is_set(_usage,USE_SYSTEMC)) + { /********************************************************************* * Déclarations des signaux @@ -119,4 +105,5 @@ delete in_CLOCK; delete in_NRESET; + } #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h (revision 81) @@ -80,5 +80,5 @@ #endif Parameters * param, - morpheo::behavioural::Tusage_t usage=USE_ALL + morpheo::behavioural::Tusage_t usage ); public : ~@COMPONENT (void); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp (revision 81) @@ -33,4 +33,6 @@ log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); + usage_environment(_usage); + log_printf(INFO,@COMPONENT,FUNCTION,"Allocation"); @@ -42,5 +44,5 @@ #ifdef STATISTICS - if (_usage & USE_STATISTICS) + if (usage_is_set(_usage,USE_STATISTICS)) { log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); @@ -51,5 +53,5 @@ #ifdef VHDL - if (_usage & USE_VHDL) + if (usage_is_set(_usage,USE_VHDL)) { // generate the vhdl @@ -61,5 +63,5 @@ #ifdef SYSTEMC - if (_usage & USE_SYSTEMC) + if (usage_is_set(_usage,USE_SYSTEMC)) { log_printf(INFO,@COMPONENT,FUNCTION,"Method - transition"); @@ -85,5 +87,5 @@ #ifdef STATISTICS - if (_usage & USE_STATISTICS) + if (usage_is_set(_usage,USE_STATISTICS)) { statistics_deallocation(); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp (revision 81) @@ -61,5 +61,6 @@ #ifdef POSITION - _component->generate_file(); + if (usage_is_set(_usage,USE_POSITION)) + _component->generate_file(); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_deallocation.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_deallocation.cpp (revision 81) @@ -7,4 +7,5 @@ #include "Behavioural/@DIRECTORY/include/@COMPONENT.h" +#include "Behavioural/include/Allocation.h" namespace morpheo { @@ -18,5 +19,5 @@ log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); - if (_usage & USE_SYSTEMC) + if (usage_is_set(_usage,USE_SYSTEMC)) { delete in_CLOCK ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_end_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_end_cycle.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_end_cycle.cpp (revision 81) @@ -20,5 +20,6 @@ #ifdef STATISTICS - _stat->end_cycle(); + if (usage_is_set(_usage,USE_STATISTICS)) + _stat->end_cycle(); #endif @@ -26,5 +27,6 @@ // Evaluation before read the ouput signal // sc_start(0); - _interfaces->testbench(); + if (usage_is_set(_usage,USE_VHDL_TESTBENCH)) + _interfaces->testbench(); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 81) @@ -1,6 +1,9 @@ -#ifndef Allocation_H -#define Allocation_H +#ifndef morpheo_behavioural_Allocation_h +#define morpheo_behavioural_Allocation_h + +#include "Common/include/Debug.h" // Help to allocate interface +#define INTERFACE_PRINT(name) log_printf(TRACE,true,"allocation","Interface's creation : %s (%s, %d)",name,__FILE__,__LINE__); // ---------------------------------------------------------------------- @@ -15,7 +18,9 @@ #ifdef POSITION #define ALLOC_INTERFACE( name, direction, localisation, str) \ + INTERFACE_PRINT(name); \ Interface_fifo * interface = _interfaces->set_interface( name, direction, localisation, str); #else #define ALLOC_INTERFACE( name, direction, localisation, str) \ + INTERFACE_PRINT(name); \ Interface_fifo * interface = _interfaces->set_interface( name); #endif @@ -48,4 +53,10 @@ } +#define DELETE_SIGNAL( sig, size) \ + if (size > 0) \ + { \ + delete sig; \ + } + #define ALLOC_SC_SIGNAL( sig, name, type) \ sc_signal * sig = new sc_signal (name); @@ -54,10 +65,14 @@ (*(component->sig)) (*(sig)); +#define DELETE_SC_SIGNAL( sig) \ + delete sig; + // ---------------------------------------------------------------------- // -----[ ITERATION 1 ]-------------------------------------------------- // ---------------------------------------------------------------------- -#define __ALLOC1_INTERFACE(name, it1) \ - const std::string interface_name = name; \ +#define __ALLOC1_INTERFACE(name, it1) \ + INTERFACE_PRINT(name); \ + const std::string interface_name = name; \ const uint32_t iterator_1 = it1; @@ -86,4 +101,5 @@ #ifdef POSITION #define ALLOC1_INTERFACE( name, direction, localisation, str, it1) \ + INTERFACE_PRINT(name); \ const uint32_t iterator_1 = it1; \ Interface_fifo * interface [iterator_1]; \ @@ -97,4 +113,5 @@ #else #define ALLOC1_INTERFACE( name, direction, localisation, str, it1) \ + INTERFACE_PRINT(name); \ const uint32_t iterator_1 = it1; \ Interface_fifo * interface [iterator_1]; \ @@ -141,22 +158,38 @@ } #define ALLOC1_SIGNAL_IN( sig, name, type, size) \ - if (size > 0) \ - { \ - sig = new SC_IN (type) * [iterator_1]; \ - for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_in (name, size); \ - } \ - } + { \ + sig = new SC_IN (type) * [iterator_1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ + { \ + sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_in (name, size); \ + } \ + } \ + } #define ALLOC1_SIGNAL_OUT(sig, name, type, size) \ - if (size > 0) \ - { \ - sig = new SC_OUT(type) * [iterator_1]; \ - for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_out (name, size); \ - } \ - } + { \ + sig = new SC_OUT(type) * [iterator_1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ + { \ + sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_out (name, size); \ + } \ + } \ + } + +#define DELETE1_SIGNAL(sig, it1, size) \ + { \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ + { \ + delete sig[alloc_signal_it1]; \ + } \ + } \ + delete [] sig; \ + } #define ALLOC1_SC_SIGNAL( sig, name, type, it1) \ @@ -178,4 +211,13 @@ } +#define DELETE1_SC_SIGNAL(sig, it1) \ + { \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ - { \ - sig = new SC_IN (type) ** [it1]; \ - for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_in (name, size); \ - } \ - } \ - } + { \ + sig = new SC_IN (type) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ + { \ + sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_in (name, size); \ + } \ + } \ + } \ + } #define _ALLOC2_SIGNAL_OUT( sig, name, type, size, it1, it2) \ - if (size > 0) \ - { \ - sig = new SC_OUT (type) ** [it1]; \ - for (uint32_t alloc_signal_it1=0; alloc_signal_it1set_signal_out (name, size); \ - } \ - } \ - } + { \ + sig = new SC_OUT (type) ** [it1]; \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ + { \ + sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_out (name, size); \ + } \ + } \ + } \ + } #define ALLOC2_VAL_ACK_IN( sig, name, type ) _ALLOC2_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2) @@ -309,4 +357,20 @@ #define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2) +#define DELETE2_SIGNAL(sig, it1,it2, size) \ + { \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 0) \ + { \ + delete sig[alloc_signal_it1][alloc_signal_it2]; \ + } \ + } \ + delete [] sig[alloc_signal_it1]; \ + } \ + delete [] sig; \ + } + #define ALLOC2_SC_SIGNAL( sig, name, type, it1, it2) \ sc_signal *** sig = new sc_signal ** [it1]; \ @@ -331,3 +395,17 @@ (*(component->sig[alloc_signal_it1][alloc_signal_it2])) (*(sig[alloc_signal_it1][alloc_signal_it2])); \ } + +#define DELETE2_SC_SIGNAL(sig,it1,it2) \ + { \ + for (uint32_t alloc_signal_it1=0; alloc_signal_it1 #include "Behavioural/include/XML.h" -#include "Behavioural/include/Environnement.h" +#include "Behavioural/include/Environment.h" #include "Common/include/ErrorMorpheo.h" #include "Common/include/ToString.h" @@ -21,24 +22,24 @@ class Configuration_Parameters { - // -----[ fields ]---------------------------------------------------- + // -----[ fields ]---------------------------------------------------- // Constant - public : const std::string _name ; - public : const uint32_t _value ; - public : const uint32_t _min ; - public : const uint32_t _max ; - public : const std::string _step ; - public : const uint32_t _default; - public : const uint32_t _level ; - public : const std::string _comment; + public : const std::string _name ; + public : const uint32_t _value ; + public : const uint32_t _min ; + public : const uint32_t _max ; + public : const std::string _step ; + public : const uint32_t _default; + public : const uint32_t _level ; + public : const std::string _comment; - // -----[ methods ]--------------------------------------------------- - public : Configuration_Parameters (std::string name , - uint32_t value , - uint32_t min , - uint32_t max , - std::string step , - uint32_t value_default, - uint32_t level , - std::string comment); + // -----[ methods ]--------------------------------------------------- + public : Configuration_Parameters (std::string name , + uint32_t value , + uint32_t min , + uint32_t max , + std::string step , + uint32_t value_default, + uint32_t level , + std::string comment); public : ~Configuration_Parameters (); @@ -53,2 +54,3 @@ #endif +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 81) @@ -24,26 +24,25 @@ //-------------------------------------------------------[ Memory ]----- -# define OPERATION_MEMORY_LOAD 0x0 // 000_0000 -# define OPERATION_MEMORY_LOAD_8_Z 0x0 // 000_0000 -# define OPERATION_MEMORY_LOAD_16_Z 0x20 // 010_0000 -# define OPERATION_MEMORY_LOAD_32_Z 0x40 // 100_0000 -# define OPERATION_MEMORY_LOAD_64_Z 0x60 // 110_0000 -# define OPERATION_MEMORY_LOAD_8_S 0x10 // 001_0000 -# define OPERATION_MEMORY_LOAD_16_S 0x30 // 011_0000 -# define OPERATION_MEMORY_LOAD_32_S 0x50 // 101_0000 -# define OPERATION_MEMORY_LOAD_64_S 0x70 // 111_0000 - -# define OPERATION_MEMORY_STORE_8 0x8 // 000_1000 -# define OPERATION_MEMORY_STORE_16 0x9 // 000_1001 -# define OPERATION_MEMORY_STORE_32 0xa // 000_1010 -# define OPERATION_MEMORY_STORE_64 0xb // 000_1011 -# define OPERATION_MEMORY_STORE_HEAD_OK 0xc // 000_1100 -# define OPERATION_MEMORY_STORE_HEAD_KO 0xd // 000_1101 - -# define OPERATION_MEMORY_LOCK 0x1 // 000_0001 -# define OPERATION_MEMORY_INVALIDATE 0x2 // 000_0010 -# define OPERATION_MEMORY_PREFETCH 0x3 // 000_0011 -# define OPERATION_MEMORY_FLUSH 0x6 // 000_0110 -# define OPERATION_MEMORY_SYNCHRONIZATION 0x7 // 000_0111 +# define OPERATION_MEMORY_LOAD_8_Z 0x08 // 0_1000 +# define OPERATION_MEMORY_LOAD_16_Z 0x09 // 0_1001 +# define OPERATION_MEMORY_LOAD_32_Z 0x0a // 0_1010 +# define OPERATION_MEMORY_LOAD_64_Z 0x0b // 0_1011 +# define OPERATION_MEMORY_LOAD_8_S 0x18 // 1_1000 +# define OPERATION_MEMORY_LOAD_16_S 0x19 // 1_1001 +# define OPERATION_MEMORY_LOAD_32_S 0x1a // 1_1010 +# define OPERATION_MEMORY_LOAD_64_S 0x1b // 1_1011 + +# define OPERATION_MEMORY_STORE_8 0x0c // 0_1100 +# define OPERATION_MEMORY_STORE_16 0x0d // 0_1101 +# define OPERATION_MEMORY_STORE_32 0x0e // 0_1110 +# define OPERATION_MEMORY_STORE_64 0x0f // 0_1111 +# define OPERATION_MEMORY_STORE_HEAD_OK 0x1c // 1_1100 +# define OPERATION_MEMORY_STORE_HEAD_KO 0x1d // 1_1101 + +# define OPERATION_MEMORY_LOCK 0x01 // 0_0001 +# define OPERATION_MEMORY_INVALIDATE 0x02 // 0_0010 +# define OPERATION_MEMORY_PREFETCH 0x03 // 0_0011 +# define OPERATION_MEMORY_FLUSH 0x06 // 0_0110 +# define OPERATION_MEMORY_SYNCHRONIZATION 0x07 // 0_0111 #define is_operation_memory_load(x) \ @@ -322,5 +321,5 @@ # define SIZE_DCACHE_TYPE 4 -# define DCACHE_TYPE_LOAD 0x0 // 0000 +//#define DCACHE_TYPE_ 0x0 // 0000 # define DCACHE_TYPE_LOCK 0x1 // 0001 # define DCACHE_TYPE_INVALIDATE 0x2 // 0010 @@ -330,12 +329,12 @@ # define DCACHE_TYPE_FLUSH 0x6 // 0110 # define DCACHE_TYPE_SYNCHRONIZATION 0x7 // 0111 -# define DCACHE_TYPE_STORE_8 0x8 // 1000 -# define DCACHE_TYPE_STORE_16 0x9 // 1001 -# define DCACHE_TYPE_STORE_32 0xa // 1010 -# define DCACHE_TYPE_STORE_64 0xb // 1011 -//#define DCACHE_TYPE_ 0xc // 1100 -//#define DCACHE_TYPE_ 0xd // 1101 -//#define DCACHE_TYPE_ 0xe // 1110 -//#define DCACHE_TYPE_ 0xf // 1111 +# define DCACHE_TYPE_LOAD_8 0x8 // 1000 +# define DCACHE_TYPE_LOAD_16 0x9 // 1001 +# define DCACHE_TYPE_LOAD_32 0xa // 1010 +# define DCACHE_TYPE_LOAD_64 0xb // 1011 +# define DCACHE_TYPE_STORE_8 0xc // 1100 +# define DCACHE_TYPE_STORE_16 0xd // 1101 +# define DCACHE_TYPE_STORE_32 0xe // 1110 +# define DCACHE_TYPE_STORE_64 0xf // 1111 // just take the 4 less significative bits. Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h (revision 81) @@ -59,4 +59,5 @@ # define DEBUG_Branch_History_Table false # define DEBUG_Pattern_History_Table false +# define DEBUG_Prediction_unit_Glue true # define DEBUG_Return_Address_Stack true # define DEBUG_Update_Prediction_Table true Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environment.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environment.h (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environment.h (revision 81) @@ -0,0 +1,35 @@ +#ifndef morpheo_behavioural_Environment_h +#define morpheo_behavioural_Environment_h + +#if (defined(STATISTICS) and not defined(SYSTEMC)) +# error "To have the statistics, you must set flags SYSTEMC" +#endif + +#if (defined(INFORMATION) and not defined(STATISTICS)) +# error "To have the information, you must set flags STATISTICS" +#endif + +#if (defined(VHDL_TESTBENCH) and not defined(SYSTEMC)) +# error "To have the vhdl's test bench, you must set flags SYSTEMC" +#endif + +#if (defined(VHDL_TESTBENCH) and not defined(VHDL)) +# error "To have the vhdl's test bench, you must set flags VHDL" +#endif + +#if (defined(VHDL_TESTBENCH_ASSERT) and not defined(VHDL_TESTBENCH)) +# error "To have an assert in vhdl's test bench, you must set flags VHDL_TESTBENCH" +#endif + +#if (defined(VHDL_TESTBENCH) and defined(SYSTEMC)) +# define SYSTEMC_VHDL_COMPATIBILITY +#endif + +#if (defined(DEBUG)) +# define DEBUG_TEST +#endif + +// Environment variable +#define MORPHEO_HOME "MORPHEO_HOME" + +#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h (revision 80) +++ (revision ) @@ -1,25 +1,0 @@ -#if (defined(STATISTICS) and not defined(SYSTEMC)) -# error "To have the statistics, you must set flags SYSTEMC" -#endif - -#if (defined(VHDL_TESTBENCH) and not defined(SYSTEMC)) -# error "To have the vhdl's test bench, you must set flags SYSTEMC" -#endif - -#if (defined(VHDL_TESTBENCH) and not defined(VHDL)) -# error "To have the vhdl's test bench, you must set flags VHDL" -#endif - -#if (defined(VHDL_TESTBENCH_ASSERT) and not defined(VHDL_TESTBENCH)) -# error "To have an assert in vhdl's test bench, you must set flags VHDL_TESTBENCH" -#endif - -#if (defined(VHDL_TESTBENCH) and defined(SYSTEMC)) -# define SYSTEMC_VHDL_COMPATIBILITY -#endif - -#if (defined(DEBUG)) -# define DEBUG_TEST -#endif - -#define MORPHEO_HOME "MORPHEO_HOME" Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h (revision 81) @@ -12,5 +12,5 @@ #include #include -#include "Behavioural/include/Environnement.h" +#include "Behavioural/include/Environment.h" #include "Behavioural/include/Constants.h" #include "Behavioural/include/Test.h" @@ -22,4 +22,9 @@ namespace morpheo { namespace behavioural { + + template bool test (uint32_t size) + { + return (size <= (8*sizeof(T))); + }; class Parameters_test @@ -75,15 +80,15 @@ // -----[ methods ]--------------------------------------------------- - public : Parameters (void); - public : virtual ~Parameters (); + public : Parameters (void); + public : virtual ~Parameters (); // methods to print and test parameters - public : virtual std::string print (uint32_t depth) = 0; - public : virtual Parameters_test msg_error (void) = 0; + public : virtual std::string print (uint32_t depth) = 0; + public : virtual Parameters_test msg_error (void) = 0; // methods to generate configuration file // methods to test - public : void test (void); + public : void test (void); }; }; // end namespace behavioural Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 81) @@ -20,4 +20,5 @@ #endif +#include "Behavioural/include/Parameters.h" #include "Behavioural/include/Direction.h" #include "Behavioural/include/XML.h" @@ -147,4 +148,7 @@ if (_type_info != UNKNOW) throw (ErrorMorpheo ("Signal \""+_name+"\" : already allocate.")); + + if (test(_size) == false) + throw (ErrorMorpheo ("Signal \""+_name+"\" : size is too small to the associate type.")); _is_allocate = true; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 81) @@ -16,52 +16,54 @@ // ***** general - typedef uint32_t Tinstruction_t; - typedef bool Tcontrol_t; - typedef uint8_t Toperation_t; -//typedef uint32_t Tdestination1_t; -//typedef uint32_t Tdestination2_t; -//typedef uint32_t Texec_flag_t; -//typedef bool Texec_excep_t; - - typedef uint8_t Texception_t; - typedef uint8_t Tcontext_t; - typedef uint8_t Tpacket_t; - typedef uint8_t Ttype_t; - typedef uint8_t Tevent_state_t; - typedef uint8_t Tevent_type_t; - typedef uint8_t Tcounter_t; // universal counter - typedef uint8_t Tptr_t; // universal pointer - - // ***** Register - typedef uint32_t Tgeneral_address_t; - typedef uint32_t Tgeneral_data_t; - typedef uint32_t Tspecial_address_t; - typedef uint32_t Tspecial_data_t; + typedef uint32_t Tinstruction_t; + typedef bool Tcontrol_t; + typedef uint8_t Texception_t; + typedef uint8_t Tcontext_t; + typedef uint8_t Tpacket_t; + typedef uint8_t Toperation_t; + typedef uint8_t Ttype_t; + typedef uint8_t Tcounter_t; // universal counter + typedef uint8_t Tptr_t; // universal pointer + +//typedef uint32_t Tdestination1_t; +//typedef uint32_t Tdestination2_t; +//typedef uint32_t Texec_flag_t; +//typedef bool Texec_excep_t; + + // ***** Event + typedef uint8_t Tevent_state_t; + typedef uint8_t Tevent_type_t; + + // ***** Register + typedef uint32_t Tgeneral_address_t; + typedef uint32_t Tgeneral_data_t; + typedef uint32_t Tspecial_address_t; + typedef uint32_t Tspecial_data_t; + + // ~~~~~ prediction_unit + typedef uint8_t Thistory_t; + typedef Tptr_t Tprediction_ptr_t; + typedef uint8_t Tbranch_state_t; + typedef uint8_t Tbranch_condition_t; + typedef Tprediction_ptr_t Tdepth_t; + typedef Tgeneral_data_t Taddress_t; // ***** component dependant // ~~~~~ load store queue - typedef uint8_t Taccess_t; - typedef uint8_t Tlsq_ptr_t; - typedef uint32_t Tdcache_address_t; - typedef uint32_t Tdcache_data_t; - typedef bool Tdcache_error_t; - typedef uint8_t Tdcache_type_t; - - // ~~~~~ prediction_unit - typedef uint8_t Thistory_t; - typedef uint8_t Tprediction_ptr_t; - typedef uint8_t Tbranch_state_t; - typedef uint8_t Tbranch_condition_t; - typedef uint8_t Tdepth_t; - typedef Tgeneral_data_t Taddress_t; - - - // ~~~~~ ifetch - typedef uint8_t Tinst_ifetch_ptr_t; - typedef uint8_t Tifetch_queue_ptr_t; - typedef uint32_t Ticache_address_t; - typedef uint32_t Ticache_instruction_t; - typedef bool Ticache_error_t; - typedef uint8_t Ticache_type_t; + typedef uint8_t Taccess_t; + typedef Tptr_t Tlsq_ptr_t; + typedef Tgeneral_address_t Tdcache_address_t; + typedef Tgeneral_data_t Tdcache_data_t; + typedef bool Tdcache_error_t; + typedef uint8_t Tdcache_type_t; + + + // ~~~~~ ifetch + typedef Tptr_t Tinst_ifetch_ptr_t; + typedef Tptr_t Tifetch_queue_ptr_t; + typedef Tgeneral_address_t Ticache_address_t; + typedef Tgeneral_data_t Ticache_instruction_t; + typedef bool Ticache_error_t; + typedef uint8_t Ticache_type_t; typedef enum Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Usage.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Usage.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Usage.h (revision 81) @@ -1,4 +1,6 @@ #ifndef morpheo_behavioural_Usage_h #define morpheo_behavioural_Usage_h + +#include namespace morpheo { @@ -7,10 +9,23 @@ typedef uint8_t Tusage_t; -#define USE_SYSTEMC 0x01 -#define USE_VHDL 0x02 -#define USE_VHDL_TESTBENCH 0x04 -#define USE_STATISTICS 0x08 -#define USE_POSITION 0x10 -#define USE_ALL 0x1F +# define USE_SYSTEMC 0x01 +# define USE_VHDL 0x02 +# define USE_VHDL_TESTBENCH 0x04 +# define USE_VHDL_TESTBENCH_ASSERT 0x08 +# define USE_POSITION 0x10 +# define USE_STATISTICS 0x20 +# define USE_INFORMATION 0x40 +//#define USE_ 0x80 + +# define USE_NONE 0x00 +//#define USE_ALL 0xff +# define USE_ALL usage_all() + + + Tusage_t usage_set (Tusage_t usage, Tusage_t flag); + Tusage_t usage_unset (Tusage_t usage, Tusage_t flag); + bool usage_is_set (Tusage_t usage, Tusage_t flag); + void usage_environment (Tusage_t usage); + Tusage_t usage_all (void); }; // end namespace behavioural Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 81) @@ -0,0 +1,16 @@ +#ifndef morpheo_behavioural_Version_h +#define morpheo_behavioural_Version_h + +#include "Common/include/ToString.h" + +// Identification : MORPHEO_MAJOR_VERSION.MORPHEO_MINOR_VERSION.MORPHEO_REVISION +// Revision : svn variable + +#define MORPHEO_MAJOR_VERSION 0 +#define MORPHEO_MINOR_VERSION 2 +#define MORPHEO_REVISION 0 +//$Revision$ + +#define MORPHEO_VERSION morpheo::toString(MORPHEO_MAJOR_VERSION)+"."+morpheo::toString(MORPHEO_MINOR_VERSION)+"."+morpheo::toString(MORPHEO_REVISION) + +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h (revision 81) @@ -14,5 +14,5 @@ #include #include -#include "Behavioural/include/Environnement.h" +#include "Behavioural/include/Environment.h" #include "Behavioural/include/Direction.h" #include "Common/include/ToString.h" Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp (revision 81) @@ -8,4 +8,5 @@ #include "Behavioural/include/Component.h" +#include "Behavioural/include/Version.h" namespace morpheo { @@ -21,5 +22,7 @@ XML xml (_entity->get_name()); - xml.balise_open ("description"); + xml.balise_open_begin ("description"); + xml. attribut("morpheo_version",MORPHEO_VERSION); + xml.balise_open_end(); xml. insert_XML (_entity->toXML()); xml. balise_open ("architecture"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp (revision 81) @@ -1,4 +1,5 @@ #ifdef STATISTICS #include "Behavioural/include/Stat.h" +#include "Behavioural/include/Version.h" namespace morpheo { @@ -18,4 +19,5 @@ xml->attribut("nb_cycle_simulation",toString(_cycle_sum)); xml->attribut("nb_cycle_statistics",toString(_cycle_sum-_nb_cycle_before_begin)); + xml->attribut("morpheo_version",MORPHEO_VERSION); xml->balise_open_end(); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Usage.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Usage.cpp (revision 81) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Usage.cpp (revision 81) @@ -0,0 +1,107 @@ +#include "Behavioural/include/Usage.h" +#include "Common/include/Debug.h" +#include "Common/include/ErrorMorpheo.h" + +namespace morpheo { +namespace behavioural { + + Tusage_t usage_set (Tusage_t usage, Tusage_t flag) + { + return ( usage | flag); + } + + Tusage_t usage_unset (Tusage_t usage, Tusage_t flag) + { + return ~(~usage | flag); + } + + bool usage_is_set (Tusage_t usage, Tusage_t flag) + { + return ((usage & flag) != 0); + } + + void usage_environment (Tusage_t usage) + { +#ifndef SYSTEMC + if (usage_is_set(usage,USE_SYSTEMC)) + throw ErrorMorpheo(_("Component use the flag \"USE_SYSTEMC\", but the macro's compiler \"SYSTEMC\" is unset.")); +#endif +#ifndef VHDL + if (usage_is_set(usage,USE_VHDL)) + throw ErrorMorpheo(_("Component use the flag \"USE_VHDL\", but the macro's compiler \"VHDL\" is unset.")); +#endif +#ifndef VHDL_TESTBENCH + if (usage_is_set(usage,USE_VHDL_TESTBENCH)) + throw ErrorMorpheo(_("Component use the flag \"USE_VHDL_TESTBENCH\", but the macro's compiler \"VHDL_TESTBENCH\" is unset.")); +#endif +#ifndef VHDL_TESTBENCH_ASSERT + if (usage_is_set(usage,USE_VHDL_TESTBENCH_ASSERT)) + throw ErrorMorpheo(_("Component use the flag \"USE_VHDL_TESTBENCH_ASSERT\", but the macro's compiler \"VHDL_TESTBENCH_ASSERT\" is unset.")); +#endif +#ifndef POSITION + if (usage_is_set(usage,USE_POSITION)) + throw ErrorMorpheo(_("Component use the flag \"USE_POSITION\", but the macro's compiler \"POSITION\" is unset.")); +#endif +#ifndef STATISTICS + if (usage_is_set(usage,USE_STATISTICS)) + throw ErrorMorpheo(_("Component use the flag \"USE_STATISTICS\", but the macro's compiler \"STATISTICS\" is unset.")); +#endif +#ifndef INFORMATION + if (usage_is_set(usage,USE_INFORMATION)) + throw ErrorMorpheo(_("Component use the flag \"USE_INFORMATION\", but the macro's compiler \"INFORMATION\" is unset.")); +#endif + +#ifndef DEBUG +#endif + + if (usage_is_set(usage,USE_STATISTICS) and not usage_is_set(usage,USE_SYSTEMC)) + throw ErrorMorpheo(_("Usage flags conflit : to use the statistics, you must set flag USE_SYSTEMC")); + + if (usage_is_set(usage,USE_INFORMATION) and not usage_is_set(usage,USE_STATISTICS)) + throw ErrorMorpheo(_("Usage flags conflit : to use the information, you must set flag USE_STATISTICS")); + + if (usage_is_set(usage,USE_VHDL_TESTBENCH) and not usage_is_set(usage,USE_SYSTEMC)) + throw ErrorMorpheo(_("Usage flags conflit : to use the vhdl's test bench, you must set flag USE_SYSTEMC")); + + if (usage_is_set(usage,USE_VHDL_TESTBENCH) and not usage_is_set(usage,USE_VHDL)) + throw ErrorMorpheo(_("Usage flags conflit : to use the vhdl's test bench, you must set flag USE_VHDL")); + + if (usage_is_set(usage,USE_VHDL_TESTBENCH_ASSERT) and not usage_is_set(usage,USE_VHDL_TESTBENCH)) + throw ErrorMorpheo(_("Usage flags conflit : to use an assert in vhdl's test bench, you must set flag USE_VHDL_TESTBENCH")); + } + + Tusage_t usage_all (void) + { + Tusage_t usage = USE_NONE; + +#ifdef SYSTEMC + usage = usage_set(usage,USE_SYSTEMC); +#endif +#ifdef VHDL + usage = usage_set(usage,USE_VHDL); +#endif +#ifdef VHDL_TESTBENCH + usage = usage_set(usage,USE_VHDL_TESTBENCH); +#endif +#ifdef VHDL_TESTBENCH_ASSERT + usage = usage_set(usage,USE_VHDL_TESTBENCH_ASSERT); +#endif +#ifdef POSITION + usage = usage_set(usage,USE_POSITION); +#endif +#ifdef STATISTICS + usage = usage_set(usage,USE_STATISTICS); +#endif +#ifdef INFORMATION + usage = usage_set(usage,USE_INFORMATION); +#endif + +#ifdef DEBUG +#endif + + return usage; + } + + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp (revision 81) @@ -9,4 +9,5 @@ #include "Behavioural/include/Vhdl.h" +#include "Behavioural/include/Version.h" #include #include @@ -29,7 +30,8 @@ text << tab << "-------------------------------------------------------------------------------" << std::endl - << tab << "-- file : " << filename << std::endl - << tab << "-- date : " << ctime (¤t_time ) - << tab << "-- comment : it's a autogenerated file : don't modify" << std::endl + << tab << "-- file : " << filename << std::endl + << tab << "-- date : " << ctime (¤t_time ) + << tab << "-- morpheo version : " << MORPHEO_VERSION << std::endl + << tab << "-- comment : it's a autogenerated file : don't modify" << std::endl << tab << "-------------------------------------------------------------------------------" << std::endl; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp (revision 81) @@ -28,5 +28,5 @@ str += "\n"; Index: /trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h (revision 81) @@ -69,4 +69,15 @@ { \ } while(0) + #endif // DEBUG + +#define breakpoint(str...) \ + do \ + { \ + msg(_("Breakpoint : file %s, line %d. Enter Any key to continue\n"),__FILE__,__LINE__); \ + msg(str); \ + msg(_("\n")); \ + getchar(); \ + } while(0) + #endif // !DEBUG_H Index: /trunk/IPs/systemC/processor/Morpheo/Common/include/Message.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/include/Message.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Common/include/Message.h (revision 81) @@ -15,5 +15,5 @@ namespace morpheo { -#ifdef NO_TRANSLATION +#ifdef NO_TRANSLATE # define _(String) (String) #else Index: /trunk/IPs/systemC/processor/Morpheo/Common/include/Test.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/include/Test.h (revision 80) +++ /trunk/IPs/systemC/processor/Morpheo/Common/include/Test.h (revision 81) @@ -87,4 +87,39 @@ +#define LABEL(str...) \ + { \ + msg (_("{%d} "),static_cast(sc_simulation_time())); \ + msg (str); \ + msg (_("\n")); \ + } while(0) + + +#ifndef CYCLE_MAX +# error "CYCLE_MAX must be defined"; +#endif + +#define SC_START(cycle_offset) \ + do \ + { \ + /*cout << "SC_START (begin)" << endl;*/ \ + \ + uint32_t cycle_current = static_cast(sc_simulation_time()); \ + if (cycle_offset != 0) \ + { \ + cout << "##########[ cycle "<< cycle_current+cycle_offset << " ] (" << __LINE__ << ")" << endl; \ + } \ + \ + if (cycle_current > CYCLE_MAX) \ + { \ + TEST_KO("Maximal cycles Reached"); \ + } \ + \ + sc_start(cycle_offset); \ + \ + /*cout << "SC_START (end )" << endl;*/ \ + } while(0) + + + }; #endif Index: /trunk/IPs/systemC/shared/soclib_segment_table.h =================================================================== --- /trunk/IPs/systemC/shared/soclib_segment_table.h (revision 80) +++ /trunk/IPs/systemC/shared/soclib_segment_table.h (revision 81) @@ -72,6 +72,6 @@ #include - -using namespace std; +#include +// using namespace std; ////////////////////////////////////////////// @@ -174,5 +174,5 @@ ////////////////////////////////////////////////////////// -using namespace std; +// using namespace std; struct SOCLIB_SEGMENT_TABLE { @@ -206,6 +206,6 @@ if ((number<0)||(number>16)) { - cerr << "ERROR in the Segment Table :" << endl ; - cerr << "MSB number must be in the [0..16] range !" << endl ; + std::cerr << "ERROR in the Segment Table :" << std::endl ; + std::cerr << "MSB number must be in the [0..16] range !" << std::endl ; //sc_stop(); } @@ -218,6 +218,6 @@ if ((number<0)||(number>16)) { - cerr << "ERROR in the Segment Table :" << endl ; - cerr << "LSB number must be in the [0..16] range !" << endl ; + std::cerr << "ERROR in the Segment Table :" << std::endl ; + std::cerr << "LSB number must be in the [0..16] range !" << std::endl ; //sc_stop(); } @@ -304,5 +304,5 @@ void print() { - cout << "\n SEGMENT_TABLE\n\n" ; + std::cout << "\n SEGMENT_TABLE\n\n" ; std::list::iterator iter; for (iter = segList.begin() ; iter != segList.end() ; ++iter) @@ -310,34 +310,34 @@ (*iter).print(); } - cout << "\n" ; + std::cout << "\n" ; } void printMSBRoutingTable() { - cout << "\n MSB ROUTING_TABLE\n\n" ; - int size = 1 << MSBNumber+LSBNumber; - unsigned int *tab = new unsigned int[size]; - initRoutingTable(tab); - for(int index = 0 ; index < size ; index++) { - if (tab[index]!=0xFFFFFFFF){ - printf("TAB[%x] = %d\n", index, tab[index]); - } - } - cout << "\n" ; - }; - -void printLSBRoutingTable(int glt) - { - printf( "\n LSB_ROUTING_TABLE OF GLOBAL TARGET :%d \n\n", glt ); - int size = 1 << MSBNumber+LSBNumber; - unsigned int *tab = new unsigned int[size]; - initLocalRoutingTable(tab,glt); - for(int index = 0 ; index < size ; index++) { - if (tab[index]!=0xFFFFFFFF){ - printf("TAB[%d] = %d\n", index, tab[index]); - } - } - cout << "\n" ; - }; + std::cout << "\n MSB ROUTING_TABLE\n\n" ; + int size = 1 << MSBNumber+LSBNumber; + unsigned int *tab = new unsigned int[size]; + initRoutingTable(tab); + for(int index = 0 ; index < size ; index++) { + if (tab[index]!=0xFFFFFFFF){ + printf("TAB[%x] = %d\n", index, tab[index]); + } + } + std::cout << "\n" ; + }; + + void printLSBRoutingTable(int glt) + { + printf( "\n LSB_ROUTING_TABLE OF GLOBAL TARGET :%d \n\n", glt ); + int size = 1 << MSBNumber+LSBNumber; + unsigned int *tab = new unsigned int[size]; + initLocalRoutingTable(tab,glt); + for(int index = 0 ; index < size ; index++) { + if (tab[index]!=0xFFFFFFFF){ + printf("TAB[%d] = %d\n", index, tab[index]); + } + } + std::cout << "\n" ; + }; @@ -345,20 +345,20 @@ void initRoutingTable(unsigned int* tab) { if (MSBNumberCalled==false) { - cerr << "ERROR in initMSBRoutingTable:" << endl ; - cerr << "MSB number has not been defined !" << endl ; + std::cerr << "ERROR in initMSBRoutingTable:" << std::endl ; + std::cerr << "MSB number has not been defined !" << std::endl ; //sc_stop(); } if (LSBNumberCalled==false) { - cout << "WARNING in initMSBRoutingTable:" << endl ; - cout << "LSB number has not been defined !" << endl ; - cout << "it is set to 0" << endl ; - LSBNumberCalled=true; - LSBNumber=0; + std::cout << "WARNING in initMSBRoutingTable:" << std::endl ; + std::cout << "LSB number has not been defined !" << std::endl ; + std::cout << "it is set to 0" << std::endl ; + LSBNumberCalled=true; + LSBNumber=0; } if (defaultTargetCalled==false) { - cerr << "ERROR in initMSBRoutingTable:" << endl ; - cerr << "Default Target has not been defined!" << endl ; + std::cerr << "ERROR in initMSBRoutingTable:" << std::endl ; + std::cerr << "Default Target has not been defined!" << std::endl ; //sc_stop(); } @@ -386,8 +386,8 @@ if(tab[page] != 0xFFFFFFFF) { // printf("\n page n° %x can not be added to cluster %x because it is already allocated to %x\n",page,globalTarget,tab[page]); - cerr << "Error in initMSBRoutingTable:" << endl ; - cerr << "Segment " << name << " allocated to VCI target " << globalTarget << endl; - cerr << "overlap another segment... or is in the same page" << endl; - cerr << "as another segment allocated to another VCI target" << endl; + std::cerr << "Error in initMSBRoutingTable:" << std::endl ; + std::cerr << "Segment " << name << " allocated to VCI target " << globalTarget << std::endl; + std::cerr << "overlap another segment... or is in the same page" << std::endl; + std::cerr << "as another segment allocated to another VCI target" << std::endl; //sc_stop(); } else { @@ -422,12 +422,12 @@ void initGlobalRoutingTable(unsigned int* tab) { if (MSBNumberCalled==false) { - cerr << "ERROR in initMSBRoutingTable:" << endl ; - cerr << "MSB number has not been defined !" << endl ; + std::cerr << "ERROR in initMSBRoutingTable:" << std::endl ; + std::cerr << "MSB number has not been defined !" << std::endl ; //sc_stop(); } if (defaultTargetCalled==false) { - cerr << "ERROR in initMSBRoutingTable:" << endl ; - cerr << "Default Target has not been defined!" << endl ; + std::cerr << "ERROR in initMSBRoutingTable:" << std::endl ; + std::cerr << "Default Target has not been defined!" << std::endl ; //sc_stop(); } @@ -455,8 +455,8 @@ if(tab[page] != 0xFFFFFFFF) { // printf("\n page n° %x can not be added to cluster %x because it is already allocated to %x\n",page,globalTarget,tab[page]); - cerr << "Error in initGlobalRoutingTable:" << endl ; - cerr << "Segment " << name << " allocated to VCI target " << globalTarget << endl; - cerr << "overlap another segment... or is in the same page" << endl; - cerr << "as another segment allocated to another VCI target" << endl; + std::cerr << "Error in initGlobalRoutingTable:" << std::endl ; + std::cerr << "Segment " << name << " allocated to VCI target " << globalTarget << std::endl; + std::cerr << "overlap another segment... or is in the same page" << std::endl; + std::cerr << "as another segment allocated to another VCI target" << std::endl; //sc_stop(); } else { @@ -493,12 +493,12 @@ void initLocalRoutingTable(unsigned int* tab, unsigned int cluster) { if (MSBNumberCalled==false) { - cerr << "ERROR in initLocalRoutingTable:" << endl ; - cerr << "MSB number has not been defined !" << endl ; + std::cerr << "ERROR in initLocalRoutingTable:" << std::endl ; + std::cerr << "MSB number has not been defined !" << std::endl ; //sc_stop(); } if (defaultTargetCalled==false) { - cerr << "ERROR in initLocalRoutingTable:" << endl ; - cerr << "Default Target has not been defined!" << endl ; + std::cerr << "ERROR in initLocalRoutingTable:" << std::endl ; + std::cerr << "Default Target has not been defined!" << std::endl ; //sc_stop(); } @@ -526,8 +526,8 @@ if(tab[page] != 0xFF) { // printf("\n page n° %x ne peut etre adressée à target n°%x car elle est allouée à %x \n",page,localTarget,tab[page]); - cerr << "Error in initLocalRoutingTable:" << endl ; - cerr << "Segment " << name << " allocated to VCI target " << localTarget << endl; - cerr << "overlap another segment... or is in the same page" << endl; - cerr << "as another segment allocated to another VCI target" << endl; + std::cerr << "Error in initLocalRoutingTable:" << std::endl ; + std::cerr << "Segment " << name << " allocated to VCI target " << localTarget << std::endl; + std::cerr << "overlap another segment... or is in the same page" << std::endl; + std::cerr << "as another segment allocated to another VCI target" << std::endl; //sc_stop(); } else { @@ -599,6 +599,6 @@ if ((MSBNumberCalled==false)||(LSBNumberCalled==false)) { - cerr << "ERROR in initUncachedTable:" << endl ; - cerr << "MSB or LSB number has not been defined !" << endl ; + std::cerr << "ERROR in initUncachedTable:" << std::endl ; + std::cerr << "MSB or LSB number has not been defined !" << std::endl ; //sc_stop(); } Index: /trunk/Makefile.tools =================================================================== --- /trunk/Makefile.tools (revision 80) +++ /trunk/Makefile.tools (revision 81) @@ -22,10 +22,15 @@ TR = tr UPPERtoLOWER = $(TR) [:lower:] [:upper:] -CXX = export LANG=C; g++-3.4 -CXX_FLAGS = -O3 \ +DIST_CC = distcc +CC_FLAGS_COMMON = -O3 \ -g3 \ -Wall \ -Wunused - +DISTCXX = export LANG=C; $(DIST_CC) g++-3.4 +CXX = export LANG=C; g++-3.4 +CXX_FLAGS = $(CC_FLAGS_COMMON) +DISTCC = export LANG=C; $(DIST_CC) gcc-3.4 +CC = export LANG=C; gcc-3.4 +CC_FLAGS = $(CC_FLAGS_COMMON) SED = sed TOUCH = touch @@ -52,10 +57,4 @@ include $(MORPHEO_TOPLEVEL)/Makefile.tools_path -#-----[ soclib ]------------------------------------------- -SOCLIB_INCDIR = -I$(SOCLIB)/include -SOCLIB_LIBDIR = -L$(SOCLIB)/lib -SOCLIB_LIBNAME = -lsoclib -SOCLIB_BIN = $(SOCLIB)/tools/bin-linux/ - #-----[ systemc ]------------------------------------------ SYSTEMC_INCDIR_systemc = -I$(SYSTEMC_systemc)/include @@ -72,5 +71,5 @@ SYSTEMC_LIBDIR_systemcass_deps = $(SYSTEMC_LIBDIR_systemcass) -SYSTEMC_LIBNAME_systemcass = -lsystemc_g++ +SYSTEMC_LIBNAME_systemcass = -lsystemc_g++ -ldl SYSTEMC_LIBNAME_systemcass_deps = $(SYSTEMC_LIBNAME_systemcass) Index: /trunk/Makefile.tools_path =================================================================== --- /trunk/Makefile.tools_path (revision 80) +++ /trunk/Makefile.tools_path (revision 81) @@ -3,5 +3,4 @@ #-----[ path ]--------------------------------------------- ENV = export PATH=$$PATH:/bin:/usr/bin -SOCLIB = SYSTEMC_systemc = /home/data/Tools/systemc-2.2.0 SYSTEMC_systemcass = /home/data/Tools/systemcass @@ -18,5 +17,4 @@ #-----[ path ]--------------------------------------------- #ENV = export PATH=$$PATH:/bin:/usr/bin -#SOCLIB = /users/outil/soc/soclib #SYSTEMC_systemc = /users/outil/systemc/systemc-2.1.v1 #SYSTEMC_systemcass = /users/outil/systemc/systemcass/systemcass/latest/i686-Linux.SLA4x Index: unk/README =================================================================== --- /trunk/README (revision 80) +++ (revision ) @@ -1,33 +1,0 @@ --------------------------------------------------- - Table of contents --------------------------------------------------- - -I - Directory -II - Install -III - Use a example - --------------------------------------------------- - I - Directory --------------------------------------------------- - -Documents : different document to explain the specific point in environnement -IPs : my librairy of component -Platforms : different plateforms to instance my Ips -Softwares : different Software to map on a plateforms -Tools : developement tools (compiler, simulator ...) - --------------------------------------------------- - II - Install --------------------------------------------------- - --------------------------------------------------- - III - Use a example --------------------------------------------------- - -1) Take variable : execute bash script "source environment.sh" -2) Go in software : "cd $SOC/Softwares/Debug/" -3) Compil application : "make" -4) Go in plateforms : "cd $SOC/Platforms/Debug/" -5) Compil plateforms : "make" -6) Run simulator : "bin/system.x 10000 $SOFT/Softwares/Debug/bin/soft.x" - Index: /trunk/Softwares/Makefile.Software =================================================================== --- /trunk/Softwares/Makefile.Software (revision 80) +++ /trunk/Softwares/Makefile.Software (revision 81) @@ -27,17 +27,17 @@ # Tools -CC = $(OR1K_BIN)/or32-elf-gcc -AS = $(OR1K_BIN)/or32-elf-as -LD = $(OR1K_BIN)/or32-elf-ld -OBJDUMP = $(OR1K_BIN)/or32-elf-objdump -NM = $(OR1K_BIN)/or32-elf-nm +OR32_CC = $(OR1K_BIN)/or32-elf-gcc +OR32_AS = $(OR1K_BIN)/or32-elf-as +OR32_LD = $(OR1K_BIN)/or32-elf-ld +OR32_OBJDUMP = $(OR1K_BIN)/or32-elf-objdump +OR32_NM = $(OR1K_BIN)/or32-elf-nm # Tools's option -CC_OPT = $(INCLUDE) $(OPTIMIZE) -Wlong-long +OR32_CC_OPT = $(INCLUDE) $(OPTIMIZE) -Wlong-long # -DHAVE_LIBC -AS_OPT = -LD_OPT = -T$(DIRECTORY_LDSCRIPT)/or32.ld $(LIBRARY) -OBJDUMP_OPT = -D -NM_OPT = -n +OR32_AS_OPT = +OR32_LD_OPT = -T$(DIRECTORY_LDSCRIPT)/or32.ld $(LIBRARY) +OR32_OBJDUMP_OPT = -D +OR32_NM_OPT = -n #-----[ Rules ]------------------------------------------------------------------- @@ -49,32 +49,32 @@ @\ $(ECHO) "List symbols : $*"; \ - $(NM) $(NM_OPT) $^ > $@.nm; \ + $(OR32_NM) $(OR32_NM_OPT) $^ > $@.nm; \ $(ECHO) "Display info : $*"; \ - $(OBJDUMP) $(OBJDUMP_OPT) $^ > $@; + $(OR32_OBJDUMP) $(OR32_OBJDUMP_OPT) $^ > $@; $(DIRECTORY_BIN)/%.x : $(OBJECTS) @ \ $(ECHO) "Linkage : $*"; \ - $(LD) -o $@ $^ $(LD_OPT); + $(OR32_LD) -o $@ $^ $(OR32_LD_OPT); $(DIRECTORY_OBJ)/%.o : $(DIRECTORY_ASM)/%.s @ \ $(ECHO) "Compilation : $*"; \ - $(CC) $(CC_OPT) -o $@ -c $^ ; \ - $(CC) $(CC_OPT) -S -o $@.s -c $^ ; -# @$(AS) $(AS_OPT) $^ -o $@ + $(OR32_CC) $(OR32_CC_OPT) -o $@ -c $^ ; \ + $(OR32_CC) $(OR32_CC_OPT) -S -o $@.s -c $^ ; +# @$(OR32_AS) $(OR32_AS_OPT) $^ -o $@ $(DIRECTORY_OBJ)/%.o : $(DIRECTORY_SYS)/%.s @ \ $(ECHO) "Compilation : $*"; \ - $(CC) $(CC_OPT) -o $@ -c $^ ; \ - $(CC) $(CC_OPT) -S -o $@.s -c $^ ; -# @$(AS) $(AS_OPT) $^ -o $@ + $(OR32_CC) $(OR32_CC_OPT) -o $@ -c $^ ; \ + $(OR32_CC) $(OR32_CC_OPT) -S -o $@.s -c $^ ; +# @$(OR32_AS) $(OR32_AS_OPT) $^ -o $@ $(DIRECTORY_OBJ)/%.o : $(DIRECTORY_C)/%.c @ \ $(ECHO) "Compilation : $*"; \ - $(CC) $(CC_OPT) -o $@ -c $^ ; \ - $(CC) $(CC_OPT) -S -o $@.s -c $^ ; + $(OR32_CC) $(OR32_CC_OPT) -o $@ -c $^ ; \ + $(OR32_CC) $(OR32_CC_OPT) -S -o $@.s -c $^ ; #-----[ Environement ]------------------------------------------------------------ Index: /trunk/Softwares/Min.or32/src/sys/crt0.s =================================================================== --- /trunk/Softwares/Min.or32/src/sys/crt0.s (revision 80) +++ /trunk/Softwares/Min.or32/src/sys/crt0.s (revision 81) @@ -31,5 +31,72 @@ l.jal _quit l.ori r3,r3,0xdead - + + /* + l.nop -0 + l.nop -1 + l.nop -2 + l.nop -3 + l.nop -4 + l.nop -5 + l.nop -6 + l.nop -7 + l.nop -8 + l.nop -9 + l.nop -10 + l.nop -11 + l.nop -12 + l.nop -13 + l.nop -14 + l.nop -15 + l.nop -16 + l.nop -17 + l.nop -18 + l.nop -19 + l.nop -20 + l.nop -21 + l.nop -22 + l.nop -23 + l.nop -24 + l.nop -25 + l.nop -26 + l.nop -27 + l.nop -28 + l.nop -29 + l.nop -30 + l.nop -31 + l.nop -32 + l.nop -33 + l.nop -34 + l.nop -35 + l.nop -36 + l.nop -37 + l.nop -38 + l.nop -39 + l.nop -40 + l.nop -41 + l.nop -42 + l.nop -43 + l.nop -44 + l.nop -45 + l.nop -46 + l.nop -47 + l.nop -48 + l.nop -49 + l.nop -50 + l.nop -51 + l.nop -52 + l.nop -53 + l.nop -54 + l.nop -55 + l.nop -56 + l.nop -57 + l.nop -58 + l.nop -59 + l.nop -60 + l.nop -61 + l.nop -62 + l.nop -63 + */ + /* ---[ 0x100: RESET exception ]----------------------------------------- */ .org 0x100 Index: /trunk/Softwares/README =================================================================== --- /trunk/Softwares/README (revision 81) +++ /trunk/Softwares/README (revision 81) @@ -0,0 +1,25 @@ +-------------------------------------------------- + Table of contents +-------------------------------------------------- + + 1 - Directory + 2 - How to create a new Software + 3 - Use a example + +-------------------------------------------------- + 1 - Directory +-------------------------------------------------- +This directory contents all SOFT for your application + * src_c : content all C sources + * src_asm : content all Assembler source + * src_evt : content all Assembler source to manage event (Interrupt, exception ..) + * ldscript : content ldscript source + * Makefile : directive to compile all tools + +-------------------------------------------------- + 2 - How to create a new Software +-------------------------------------------------- + +-------------------------------------------------- + 3 - Use a example +-------------------------------------------------- Index: unk/Softwares/README_SOFT =================================================================== --- /trunk/Softwares/README_SOFT (revision 80) +++ (revision ) @@ -1,25 +1,0 @@ --------------------------------------------------- - Table of contents --------------------------------------------------- - -I - Directory -II - How to create a new Software -III - Use a example - --------------------------------------------------- - I - Directory --------------------------------------------------- -This directory contents all SOFT for your application - * src_c : content all C sources - * src_asm : content all Assembler source - * src_evt : content all Assembler source to manage event (Interrupt, exception ..) - * ldscript : content ldscript source - * Makefile : directive to compile all tools - --------------------------------------------------- - II - How to create a new Software --------------------------------------------------- - --------------------------------------------------- - III - Use a example --------------------------------------------------- Index: /trunk/Tools/INSTALL =================================================================== --- /trunk/Tools/INSTALL (revision 81) +++ /trunk/Tools/INSTALL (revision 81) @@ -0,0 +1,86 @@ +-------------------------------------------------- + Table of contents +-------------------------------------------------- + + 1 - Files + 2 - Install SystemCass + 3 - Install gcc / binutils + 4 - Install newlib + +-------------------------------------------------- + 1 - Files +-------------------------------------------------- + +-------------------------------------------------- + 2 - Install SystemCass +-------------------------------------------------- + +-------------------------------------------------- + 3 - Install gcc / binutils +-------------------------------------------------- +BINUTILS +~~~~~~~~ + +first unpack the archieve + + tar xzvf or1k_binutils-source.tar.gz + +create the build directory + + cd or1k + mkdir or32-elf-binutils + cd or32-elf-binutils + +run configure + + ../binutils-2.16.1/configure --target=or32-elf --prefix=/opt/or32-elf + +and start the build process + + make + +finaly issueing + + make install + +will install the binutils to '/opt/or32-elf'. after adding it to +execute search path + + export PATH=/opt/or32-elf/bin:$PATH + +binutils (assembler, linker, ...) are ready to be used + + + + +GCC +~~~ + +first unpack the archieve + + tar xzvf or1k_gcc-source.tar.gz + +create the build directory + + cd or1k + mkdir or32-elf-gcc + cd or32-elf-gcc + +run configure + + ../gcc-3.4.4/configure --target=or32-elf --prefix=/opt/or32-elf --with-gnu-as --with-gnu-ld --disable-threads --enable-languages=c + +and start the build process + + make + +finaly issueing + + make install + +will install the gcc to '/opt/or32-elf'. + +-------------------------------------------------- + 4 - Install newlib +-------------------------------------------------- + Index: /trunk/environment.sh =================================================================== --- /trunk/environment.sh (revision 80) +++ /trunk/environment.sh (revision 81) @@ -43,4 +43,5 @@ echo " - MORPHEO_HOME is set to ${MORPHEO_HOME} " + # PATH : No multiple add echo ${PATH} |grep -q ${MORPHEO_SCRIPT}; @@ -51,4 +52,14 @@ fi; +MORPHEO_XTTY=${MORPHEO_IPS}/Environment/TTY/xtty + +echo ${PATH} |grep -q ${MORPHEO_XTTY}; + +if test $? -eq 1; then + export PATH=${PATH}:${MORPHEO_XTTY} + echo " - PATH add ${MORPHEO_XTTY} " +fi; + + # test if "first run" if test ! -d ${MORPHEO_HOME}; then