Changeset 81 for trunk/IPs/systemC/Environment/Cache/src

Timestamp:

Apr 15, 2008, 8:40:01 PM (17 years ago)

Author:

rosiere

Message:

• Finish Environment (and test)
• Continue predictor_unit
• Add external tools
• svn keyword "Id" set

Location:

trunk/IPs/systemC/Environment/Cache/src

Files:

• Cache.cpp (modified) (1 prop)
• Cache_MultiLevel.cpp (modified) (1 prop)
• Cache_MultiLevel_access.cpp (modified) (1 diff, 1 prop)
• Cache_MultiLevel_information.cpp (modified) (1 prop)
• Cache_MultiLevel_latence.cpp (modified) (1 prop)
• Cache_MultiLevel_print.cpp (modified) (1 prop)
• Cache_MultiLevel_reset.cpp (modified) (1 prop)
• Cache_MultiLevel_transition.cpp (modified) (1 prop)
• Cache_MultiLevel_update_access.cpp (modified) (1 diff, 1 prop)
• Cache_OneLevel.cpp (modified) (1 prop)
• Cache_OneLevel_access.cpp (modified) (1 prop)
• Cache_OneLevel_access_cached.cpp (modified) (1 prop)
• Cache_OneLevel_access_flush.cpp (modified) (1 prop)
• Cache_OneLevel_access_invalidate.cpp (modified) (1 prop)
• Cache_OneLevel_access_uncached.cpp (modified) (1 prop)
• Cache_OneLevel_hit_access_port.cpp (modified) (1 prop)
• Cache_OneLevel_hit_cache.cpp (modified) (1 prop)
• Cache_OneLevel_hit_write_buffer.cpp (modified) (1 prop)
• Cache_OneLevel_index_victim.cpp (modified) (1 prop)
• Cache_OneLevel_information.cpp (modified) (1 prop)
• Cache_OneLevel_latence.cpp (modified) (1 prop)
• Cache_OneLevel_need_slot.cpp (modified) (1 prop)
• Cache_OneLevel_print.cpp (modified) (1 prop)
• Cache_OneLevel_reset.cpp (modified) (1 prop)
• Cache_OneLevel_transition.cpp (modified) (1 diff, 1 prop)
• Cache_OneLevel_translate_address.cpp (modified) (1 prop)
• Cache_OneLevel_update_latence.cpp (modified) (1 prop)
• Cache_OneLevel_update_lru.cpp (modified) (1 prop)
• Cache_information.cpp (modified) (1 prop)
• Cache_latence.cpp (modified) (3 diffs, 1 prop)
• Cache_print.cpp (modified) (1 prop)
• Cache_range_port.cpp (modified) (2 diffs, 1 prop)
• Cache_reset.cpp (modified) (1 prop)
• Cache_transition.cpp (modified) (1 prop)

trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_access.cpp

@@ -16 +16 @@
       {
         hit   = hierarchy_cache[i]->access (num_port,address,trdid,type,dir);
-        time += hierarchy_cache[i]->latence(num_port);
+        uint32_t latence = hierarchy_cache[i]->latence(num_port);
+        time += latence;
 
-        std::cout << "SETH : "
-                  << " * i    : " << i
-                  << " * hit  : " << hit
-                  << " * time  :" << time << std::endl;
-        
+        _cout(CACHE,"    * Level [%d] - type_hit %d, latence %d, Sum latence %d\n",i,hit,latence,time);
+
         if ( (hit == HIT_CACHE)        or
              (hit == HIT_WRITE_BUFFER) or

trunk/IPs/systemC/Environment/Cache/src/Cache_MultiLevel_update_access.cpp

@@ -8 +8 @@
   uint32_t Cache_MultiLevel::update_access (Access cur_access)
   {
-    if (cur_access.last_nb_level > 0)
+//     if (cur_access.last_nb_level > 0)
       {
         uint32_t latence = cur_access.latence;
+
+        _cout(CACHE,"Cache_MultiLevel::update_access [%d] : latence : %d, last_nb_level : %d (nb_level : %d)\n",cur_access.num_port,latence,cur_access.last_nb_level,param->nb_level);
         
-        for (uint32_t it = 0; it <= cur_access.last_nb_level; it ++)
-          latence = hierarchy_cache [it]->update_latence (cur_access.num_port,latence);
-        
+        for (uint32_t it = 0; it < cur_access.last_nb_level; it ++)
+          {
+            latence = hierarchy_cache [it]->update_latence (cur_access.num_port,latence);
+          }
 //      if (latence != 0)
 //        {

trunk/IPs/systemC/Environment/Cache/src/Cache_OneLevel_transition.cpp

@@ -34 +34 @@
 
     // Test if a write_buffer have the result
-    while ((write_buffer->empty() == false) && (write_buffer->read(0)._delay == 0))
+    while ((write_buffer->empty() == false) and 
+           (write_buffer->read(0)._delay == 0))
       {
         // Save in the cache
-        Write_Buffer val     = write_buffer->pop();
+        Write_Buffer val = write_buffer->pop();
         
-        uint32_t num_tag     = val.address.tag;
-        uint32_t num_familly = val.address.familly;
+        uint32_t num_tag           = val.address.tag;
+        uint32_t num_familly       = val.address.familly;
         uint32_t num_associativity = index_victim(num_familly);
         

trunk/IPs/systemC/Environment/Cache/src/Cache_latence.cpp

@@ -22 +22 @@
 
     cache_multilevel::Cache_MultiLevel * cache;
+    cache_multilevel::Parameters * param_cache_dedicated;
+    _cout(CACHE," * Access Cache_Dedicated_");
     if (type_cache == INSTRUCTION_CACHE)
-      cache = icache_dedicated [num_entity];
+      {
+        _cout(CACHE,"Instruction");
+        cache                 = icache_dedicated [num_entity];
+        param_cache_dedicated = param->param_icache_dedicated [num_entity];
+      }
     else
-      cache = dcache_dedicated [num_entity];
+      {
+        _cout(CACHE,"Data");
+        cache                 = dcache_dedicated [num_entity];
+        param_cache_dedicated = param->param_dcache_dedicated [num_entity];
+      }
+    _cout(CACHE," [%d] - entity : %d, address : 0x%.x\n",num_port,num_entity,address);
 
     if (num_port >= cache->param->nb_port)
@@ -34 +45 @@
 
     // Make a access with this level "dedicated"
-    std::cout << "cache dedicated : access" << std::endl;
     cache_multilevel::Access access_dedicated = cache->access(num_port,address,trdid,type,dir);
 
     if (access_dedicated.hit == MISS)
       {
-        std::cout << "cache shared    : access" << std::endl;
+        _cout(CACHE," * Access Cache_shared");
+
         // Make a access with this level "shared"
         cache_multilevel::Access access_shared  = cache_shared->access(range_port (type_cache,num_entity)+num_port,address,trdid,type,dir);
@@ -45 +56 @@
         cache_shared->update_access (access_shared);
         
-        access_dedicated.last_nb_level = param->nb_cache_dedicated-1; // Update all cache
+        access_dedicated.last_nb_level = param_cache_dedicated->nb_level; // Update all cache
         access_dedicated.latence += access_shared.latence;
       }
 
-    std::cout << "end access, update access" << std::endl;
-
     cache->update_access (access_dedicated);
 
-    std::cout << "end access, update access" << std::endl;
-
+    _cout(CACHE,"Access latence : %d\n",access_dedicated.latence);
     return access_dedicated.latence;
   }

trunk/IPs/systemC/Environment/Cache/src/Cache_range_port.cpp

@@ -16 +16 @@
     else
       {
-        std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl;
+//      std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl;
         nb_port_dedicated += param->nb_iport;
-        std::cout << "nb_port_dedicated : " << param->nb_iport<< std::endl;
+//      std::cout << "nb_port_dedicated : " << param->nb_iport<< std::endl;
     
         for (uint32_t i = 1; i < num_entity; i++)
@@ -24 +24 @@
       }
 
-    std::cout << "nb_port_dedicated : " << num_entity << std::endl;
-    std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl;
+//     std::cout << "nb_port_dedicated : " << num_entity << std::endl;
+//     std::cout << "nb_port_dedicated : " << nb_port_dedicated<< std::endl;
         
     return nb_port_dedicated;