Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile	(revision 83)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libContext_State.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.defs	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.defs	(revision 83)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.deps	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.deps	(revision 83)
@@ -0,0 +1,38 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Context_State			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Context_State_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Context_State
+
+#-----[ Library ]------------------------------------------
+
+Context_State_LIBRARY		= 	-lContext_State	\
+					$(Behavioural_LIBRARY)	
+
+Context_State_DIR_LIBRARY		=	-L$(Context_State_DIR)/lib	\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Context_State_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) --directory=$(Context_State_DIR) --makefile=Makefile;
+
+Context_State_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) --directory=$(Context_State_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/Makefile	(revision 83)
@@ -0,0 +1,30 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Context_State_LIBRARY)
+
+DIR_LIBRARY			= $(Context_State_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Context_State_library
+
+library_clean			: Context_State_library_clean
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg	(revision 83)
@@ -0,0 +1,11 @@
+Context_State
+1	1	+1	# nb_context
+1	1	+1	# nb_decod_unit
+1	1	+1	# nb_ooo_engine
+1	1	+1	# nb_inst_branch_complete
+0	0	+1	# size_depth                    [0] [nb_context]
+30	30	+1	# size_address			
+1	1	+1	# size_inst_decod               [0] [nb_decod_unit]
+1	1	+1	# size_inst_commit              [0] [nb_ooo_engine]
+0	0	+1	# link_context_to_decod_unit    [0] [nb_context]
+0	0	+1	# link_decod_unit_to_ooo_engine [0] [nb_decod_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg	(revision 83)
@@ -0,0 +1,11 @@
+Context_State
+1	1	+1	# nb_context
+1	1	*4	# nb_decod_unit
+1	1	*4	# nb_ooo_engine
+1	4	*4	# nb_inst_branch_complete
+0	2	+1	# size_depth                    [0] [nb_context]
+30	30	+1	# size_address			
+1	4	*4	# size_inst_decod               [0] [nb_decod_unit]
+1	4	*4	# size_inst_commit              [0] [nb_ooo_engine]
+0	0	+1	# link_context_to_decod_unit    [0] [nb_context]
+0	0	+1	# link_decod_unit_to_ooo_engine [0] [nb_decod_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg	(revision 83)
@@ -0,0 +1,32 @@
+Context_State
+8	8	+1	# nb_context
+4	4	*4	# nb_decod_unit
+2	2	*4	# nb_ooo_engine
+2	2	*4	# nb_inst_branch_complete
+4	4	+1	# size_depth                    [0] [nb_context]
+2	2	+1	# size_depth                    [1] [nb_context]
+1	1	+1	# size_depth                    [2] [nb_context]
+0	0	+1	# size_depth                    [3] [nb_context]
+4	4	+1	# size_depth                    [4] [nb_context]
+2	2	+1	# size_depth                    [5] [nb_context]
+1	1	+1	# size_depth                    [6] [nb_context]
+0	0	+1	# size_depth                    [7] [nb_context]
+30	30	+1	# size_address			
+4	4	*4	# size_inst_decod               [0] [nb_decod_unit]
+1	1	*4	# size_inst_decod               [1] [nb_decod_unit]
+2	2	*4	# size_inst_decod               [2] [nb_decod_unit]
+4	4	*4	# size_inst_decod               [3] [nb_decod_unit]
+8	8	*4	# size_inst_commit              [0] [nb_ooo_engine]
+2	2	*4	# size_inst_commit              [1] [nb_ooo_engine]
+0	0	+1	# link_context_to_decod_unit    [0] [nb_context]
+1	1	+1	# link_context_to_decod_unit    [1] [nb_context]
+2	2	+1	# link_context_to_decod_unit    [2] [nb_context]
+3	3	+1	# link_context_to_decod_unit    [3] [nb_context]
+0	0	+1	# link_context_to_decod_unit    [4] [nb_context]
+1	1	+1	# link_context_to_decod_unit    [5] [nb_context]
+2	2	+1	# link_context_to_decod_unit    [6] [nb_context]
+3	3	+1	# link_context_to_decod_unit    [7] [nb_context]
+0	0	+1	# link_decod_unit_to_ooo_engine [0] [nb_decod_unit]
+1	1	+1	# link_decod_unit_to_ooo_engine [1] [nb_decod_unit]
+0	0	+1	# link_decod_unit_to_ooo_engine [2] [nb_decod_unit]
+1	1	+1	# link_decod_unit_to_ooo_engine [3] [nb_decod_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h	(revision 83)
@@ -0,0 +1,34 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  8
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+#include <string>
+#include <iostream>
+#include <sys/time.h>
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_front_end;
+using namespace morpheo::behavioural::core::multi_front_end::front_end;
+
+using namespace morpheo::behavioural::core::multi_front_end::front_end::context_state;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp	(revision 83)
@@ -0,0 +1,118 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h"
+
+#define NB_PARAMS 5
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_context                                    (uint32_t)\n"));
+  err (_(" * nb_decod_unit                                 (uint32_t)\n"));
+  err (_(" * nb_ooo_engine                                 (uint32_t)\n"));
+  err (_(" * nb_inst_branch_complete                       (uint32_t)\n"));
+  err (_(" * size_depth                    [nb_context]	   (uint32_t)\n"));
+  err (_(" * size_address                                  (uint32_t)\n"));
+  err (_(" * size_inst_decod               [nb_decod_unit] (uint32_t)\n"));
+  err (_(" * size_inst_commit              [nb_ooo_engine] (uint32_t)\n"));
+  err (_(" * link_context_to_decod_unit    [nb_context]	   (uint32_t)\n"));
+  err (_(" * link_decod_unit_to_ooo_engine [nb_decod_unit] (uint32_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+//const uint32_t size_data = atoi(argv[x++]);
+//const uint32_t nb_port   = atoi(argv[x++]);
+
+  uint32_t   _nb_context              = fromString<uint32_t>(argv[x++]);
+  uint32_t   _nb_decod_unit           = fromString<uint32_t>(argv[x++]);
+  uint32_t   _nb_ooo_engine           = fromString<uint32_t>(argv[x++]);
+  uint32_t   _nb_inst_branch_complete = fromString<uint32_t>(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_context+2*_nb_decod_unit+1*_nb_ooo_engine))
+    usage (argc, argv);
+
+  uint32_t * _size_depth                    = new uint32_t [_nb_context];
+  for (uint32_t i=0; i<_nb_context; i++)
+    _size_depth [i] = fromString<uint32_t>(argv[x++]);
+
+  uint32_t   _size_address  = fromString<uint32_t>(argv[x++]);
+
+  uint32_t * _size_inst_decod               = new uint32_t [_nb_decod_unit];
+  for (uint32_t i=0; i<_nb_decod_unit; i++)
+    _size_inst_decod [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t * _size_inst_commit              = new uint32_t [_nb_ooo_engine];
+  for (uint32_t i=0; i<_nb_ooo_engine; i++)
+    _size_inst_commit [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t * _link_context_to_decod_unit    = new uint32_t [_nb_context];
+  for (uint32_t i=0; i<_nb_context; i++)
+    _link_context_to_decod_unit [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t * _link_decod_unit_to_ooo_engine = new uint32_t [_nb_decod_unit];
+  for (uint32_t i=0; i<_nb_decod_unit; i++)
+    _link_decod_unit_to_ooo_engine [i] = fromString<uint32_t>(argv[x++]);
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters
+	(_nb_context                   ,
+	 _nb_decod_unit                ,
+	 _nb_ooo_engine                ,
+	 _nb_inst_branch_complete      ,
+	 _size_depth                   ,
+	 _size_address                 ,
+	 _size_inst_decod              ,
+	 _size_inst_commit             ,
+	 _link_context_to_decod_unit   ,
+	 _link_decod_unit_to_ooo_engine
+	 );
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  delete [] _size_depth;                   
+  delete [] _size_inst_decod;              
+  delete [] _size_inst_commit;             
+  delete [] _link_context_to_decod_unit;   
+  delete [] _link_decod_unit_to_ooo_engine;
+
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("Context_State : no error");
+      else
+	TEST_KO("Context_State : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s\n"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp	(revision 83)
@@ -0,0 +1,1263 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Context_State * _Context_State = new Context_State 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL                ," in_DECOD_EVENT_VAL                ",Tcontrol_t   ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL(out_DECOD_EVENT_ACK                ,"out_DECOD_EVENT_ACK                ",Tcontrol_t   ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID         ," in_DECOD_EVENT_CONTEXT_ID         ",Tcontext_t   ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_DEPTH              ," in_DECOD_EVENT_DEPTH              ",Tdepth_t     ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_TYPE               ," in_DECOD_EVENT_TYPE               ",Tevent_type_t,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT      ," in_DECOD_EVENT_IS_DELAY_SLOT      ",Tcontrol_t   ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS            ," in_DECOD_EVENT_ADDRESS            ",Taddress_t   ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR       ," in_DECOD_EVENT_ADDRESS_EPCR       ",Taddress_t   ,_param->_nb_decod_unit);
+						      				           
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_VAL               ," in_COMMIT_EVENT_VAL               ",Tcontrol_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL(out_COMMIT_EVENT_ACK               ,"out_COMMIT_EVENT_ACK               ",Tcontrol_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID        ," in_COMMIT_EVENT_CONTEXT_ID        ",Tcontext_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_DEPTH             ," in_COMMIT_EVENT_DEPTH             ",Tdepth_t     ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_TYPE              ," in_COMMIT_EVENT_TYPE              ",Tevent_type_t,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT     ," in_COMMIT_EVENT_IS_DELAY_SLOT     ",Tcontrol_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS           ," in_COMMIT_EVENT_ADDRESS           ",Taddress_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR      ," in_COMMIT_EVENT_ADDRESS_EPCR      ",Taddress_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ",Tcontrol_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR      ," in_COMMIT_EVENT_ADDRESS_EEAR      ",Taddress_t   ,_param->_nb_ooo_engine);
+
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ," in_BRANCH_COMPLETE_VAL            ",Tcontrol_t   ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK            ,"out_BRANCH_COMPLETE_ACK            ",Tcontrol_t   ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID     ," in_BRANCH_COMPLETE_CONTEXT_ID     ",Tcontext_t   ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH          ," in_BRANCH_COMPLETE_DEPTH          ",Tdepth_t     ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t   ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE           ," in_BRANCH_COMPLETE_TAKE           ",Tcontrol_t   ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC    ," in_BRANCH_COMPLETE_ADDRESS_SRC    ",Taddress_t   ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST   ," in_BRANCH_COMPLETE_ADDRESS_DEST   ",Taddress_t   ,_param->_nb_inst_branch_complete);
+
+						      				           
+  ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL              ," in_NB_INST_DECOD_ALL              ",Tcounter_t   ,_param->_nb_decod_unit);
+  ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL             ," in_NB_INST_COMMIT_ALL             ",Tcounter_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM             ," in_NB_INST_COMMIT_MEM             ",Tcounter_t   ,_param->_nb_ooo_engine);
+						      				           
+  ALLOC1_SC_SIGNAL(out_EVENT_VAL                      ,"out_EVENT_VAL                      ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_EVENT_ACK                      ," in_EVENT_ACK                      ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS                  ,"out_EVENT_ADDRESS                  ",Taddress_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT             ,"out_EVENT_ADDRESS_NEXT             ",Taddress_t   ,_param->_nb_context   ); 
+  ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL         ,"out_EVENT_ADDRESS_NEXT_VAL         ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE               ,"out_EVENT_IS_DS_TAKE               ",Tcontrol_t   ,_param->_nb_context   );
+						      				           
+  ALLOC1_SC_SIGNAL(out_SPR_VAL                        ,"out_SPR_VAL                        ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_SPR_ACK                        ," in_SPR_ACK                        ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EPCR                       ,"out_SPR_EPCR                       ",Taddress_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EEAR                       ,"out_SPR_EEAR                       ",Taddress_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EEAR_WEN                   ,"out_SPR_EEAR_WEN                   ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_SR_DSX                     ,"out_SPR_SR_DSX                     ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_SR_TO_ESR                  ,"out_SPR_SR_TO_ESR                  ",Tcontrol_t   ,_param->_nb_context   );
+						      				           
+  ALLOC1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE           ,"out_CONTEXT_DECOD_ENABLE           ",Tcontrol_t   ,_param->_nb_context   );
+						      				           
+  ALLOC1_SC_SIGNAL( in_DEPTH_TAIL                     ," in_DEPTH_TAIL                     ",Tdepth_t     ,_param->_nb_context   );
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Context_State.\n"),name.c_str());
+
+  (*(_Context_State->in_CLOCK))        (*(in_CLOCK));
+  (*(_Context_State->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL                ,_param->_nb_decod_unit);
+  INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK                ,_param->_nb_decod_unit);
+  if (_param->_have_port_context_id)				        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_CONTEXT_ID         ,_param->_nb_decod_unit);
+  if (_param->_have_port_max_depth)				        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_DEPTH              ,_param->_nb_decod_unit);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_TYPE               ,_param->_nb_decod_unit);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_IS_DELAY_SLOT      ,_param->_nb_decod_unit);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS            ,_param->_nb_decod_unit);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS_EPCR       ,_param->_nb_decod_unit);
+								        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_VAL               ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State,out_COMMIT_EVENT_ACK               ,_param->_nb_ooo_engine);
+  if (_param->_have_port_context_id)				        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_CONTEXT_ID        ,_param->_nb_ooo_engine);
+  if (_param->_have_port_max_depth)				        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_DEPTH             ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_TYPE              ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT     ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS           ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR      ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR      ,_param->_nb_ooo_engine);
+
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
+  if (_param->_have_port_context_id)				        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete);
+  if (_param->_have_port_max_depth)				        
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE           ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC    ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST   ,_param->_nb_inst_branch_complete);
+
+  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL              ,_param->_nb_decod_unit);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL             ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM             ,_param->_nb_ooo_engine);
+								        
+  INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_VAL                      ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State, in_EVENT_ACK                      ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS                  ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT             ,_param->_nb_context   ); 
+  INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT_VAL         ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_IS_DS_TAKE               ,_param->_nb_context   );
+								        
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_VAL                        ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_ACK                        ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EPCR                       ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EEAR                       ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EEAR_WEN                   ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_SR_DSX                     ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_SR_TO_ESR                  ,_param->_nb_context   );
+								        
+  INSTANCE1_SC_SIGNAL(_Context_State,out_CONTEXT_DECOD_ENABLE           ,_param->_nb_context   );
+
+  for (uint32_t i=0; i<_param->_nb_context; i++)
+    if (_param->_have_port_depth [i])
+      INSTANCE_SC_SIGNAL(_Context_State, in_DEPTH_TAIL [i]);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  const  int32_t percent_transaction_decod_event     = 75;
+  const  int32_t percent_transaction_commit_event    = 75;
+  const  int32_t percent_transaction_branch_complete = 75;
+  const  int32_t percent_transaction_event           = 75;
+  const  int32_t percent_transaction_spr             = 75;
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1); 
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+      for (uint32_t i=0; i<_param->_nb_decod_unit; i++)
+	in_DECOD_EVENT_VAL [i]->write(0);
+      for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
+	in_COMMIT_EVENT_VAL [i]->write(0);
+      for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+	in_BRANCH_COMPLETE_VAL [i]->write(0);
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  in_EVENT_ACK [i]->write(0);
+	  in_SPR_ACK   [i]->write(0);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[i]->read(), 1);
+	}
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	if (_param->_have_port_depth [i])
+	  in_DEPTH_TAIL [i]->write(i%_param->_size_depth[i]);
+      
+      uint32_t context    = rand()%_param->_nb_context;
+      uint32_t decod_unit = _param->_link_context_to_decod_unit    [context];
+      uint32_t ooo_engine = _param->_link_decod_unit_to_ooo_engine [decod_unit];
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("msync (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_decod_unit;
+	  
+	  in_DECOD_EVENT_CONTEXT_ID    [port]->write(context);
+	  in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0);
+	  in_DECOD_EVENT_ADDRESS       [port]->write(0x100);
+	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbeef);
+	  if (_param->_have_port_depth [context])
+	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_MSYNC);
+	  
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_DECOD_EVENT_VAL [port]->read() and
+		       out_DECOD_EVENT_ACK [port]->read()));
+	  in_DECOD_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("msync (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("msync (send decod)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  SC_START(1);
+	  
+	  LABEL("msync (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  SC_START(1);
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	}
+      
+      if (1)
+	{
+	  SC_START(3);
+
+	  LABEL("psync (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_decod_unit;
+	  
+	  in_DECOD_EVENT_CONTEXT_ID    [port]->write(context);
+	  in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0);
+	  in_DECOD_EVENT_ADDRESS       [port]->write(0x200);
+	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbebe);
+	  if (_param->_have_port_depth [context])
+	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_PSYNC);
+	  
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event);
+	  
+	      SC_START(1);
+	    }
+	  while (not ( in_DECOD_EVENT_VAL [port]->read() and
+		       out_DECOD_EVENT_ACK [port]->read()));
+	  in_DECOD_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("psync (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0x201);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0xdeadbebe); 
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+
+	  LABEL("csync (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_decod_unit;
+	  
+	  in_DECOD_EVENT_CONTEXT_ID    [port]->write(context);
+	  in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0);
+	  in_DECOD_EVENT_ADDRESS       [port]->write(0x200);
+	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbebe);
+	  if (_param->_have_port_depth [context])
+	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_CSYNC);
+	  
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event);
+	  
+	      SC_START(1);
+	    }
+	  while (not ( in_DECOD_EVENT_VAL [port]->read() and
+		       out_DECOD_EVENT_ACK [port]->read()));
+	  in_DECOD_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("csync (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0x201);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0xdeadbebe); 
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+	  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+	  in_EVENT_ACK [context]->write(0);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("spr (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_decod_unit;
+	  
+	  in_DECOD_EVENT_CONTEXT_ID    [port]->write(context);
+	  in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0);
+	  in_DECOD_EVENT_ADDRESS       [port]->write(0x100);
+	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbeef);
+	  if (_param->_have_port_depth [context])
+	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_SPR_ACCESS);
+	  
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_DECOD_EVENT_VAL [port]->read() and
+		       out_DECOD_EVENT_ACK [port]->read()));
+	  in_DECOD_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("spr (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("spr (send decod)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  SC_START(1);
+	  
+	  LABEL("spr (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  SC_START(1);
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("miss (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_inst_branch_complete;
+	  
+	  in_BRANCH_COMPLETE_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_BRANCH_COMPLETE_DEPTH            [port]->write((context+1)%_param->_size_depth[context]);
+	  in_BRANCH_COMPLETE_ADDRESS_SRC      [port]->write(0x400);
+	  in_BRANCH_COMPLETE_ADDRESS_DEST     [port]->write(0x500);
+	  in_BRANCH_COMPLETE_MISS_PREDICTION  [port]->write(1);
+	  in_BRANCH_COMPLETE_TAKE             [port]->write(0);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and
+		       out_BRANCH_COMPLETE_ACK [port]->read()));
+	  in_BRANCH_COMPLETE_VAL [port]->write(0);
+	  
+	  LABEL("miss (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("miss (wait event)");
+
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0x401);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0x500);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("miss (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_inst_branch_complete;
+	  
+	  in_BRANCH_COMPLETE_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_BRANCH_COMPLETE_DEPTH            [port]->write((context+1)%_param->_size_depth[context]);
+	  in_BRANCH_COMPLETE_ADDRESS_SRC      [port]->write(0x600);
+	  in_BRANCH_COMPLETE_ADDRESS_DEST     [port]->write(0x700);
+	  in_BRANCH_COMPLETE_MISS_PREDICTION  [port]->write(1);
+	  in_BRANCH_COMPLETE_TAKE             [port]->write(1);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and
+		       out_BRANCH_COMPLETE_ACK [port]->read()));
+	  in_BRANCH_COMPLETE_VAL [port]->write(0);
+	  
+	  LABEL("miss (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("miss (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0x601);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0x700);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("exception (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  
+	  in_DECOD_EVENT_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_DECOD_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  in_DECOD_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
+	  in_DECOD_EVENT_IS_DELAY_SLOT    [port]->write(0);
+	  in_DECOD_EVENT_ADDRESS          [port]->write(0x800);
+	  in_DECOD_EVENT_ADDRESS_EPCR     [port]->write(0x900);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_DECOD_EVENT_VAL [port]->read() and
+		       out_DECOD_EVENT_ACK [port]->read()));
+	  in_DECOD_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("exception (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("exception (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0x800);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0x900);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	  LABEL("exception (wait spr)");
+
+	  find = false;
+	  do
+	    {
+	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0x900);
+		//TEST(Taddress_t,out_SPR_EEAR      [context]->read(),);
+		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_ACK [context]->write(0);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("exception (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  
+	  in_DECOD_EVENT_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_DECOD_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  in_DECOD_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
+	  in_DECOD_EVENT_IS_DELAY_SLOT    [port]->write(1);
+	  in_DECOD_EVENT_ADDRESS          [port]->write(0x800);
+	  in_DECOD_EVENT_ADDRESS_EPCR     [port]->write(0x900);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_DECOD_EVENT_VAL [port]->read() and
+		       out_DECOD_EVENT_ACK [port]->read()));
+	  in_DECOD_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("exception (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("exception (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0x800);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0x900);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	  LABEL("exception (wait spr)");
+
+	  find = false;
+	  do
+	    {
+	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0x900);
+		//TEST(Taddress_t,out_SPR_EEAR      [context]->read(),);
+		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_ACK [context]->write(0);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("exception (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(0);
+	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xa00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xb00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xc00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(0);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
+		       out_COMMIT_EVENT_ACK [port]->read()));
+	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("exception (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("exception (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0xa00);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0xb00);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	  LABEL("exception (wait spr)");
+
+	  find = false;
+	  do
+	    {
+	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xb00);
+		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xc00);
+		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_ACK [context]->write(0);
+	}
+      
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("exception (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(1);
+	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xd00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xe00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xf00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(0);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
+		       out_COMMIT_EVENT_ACK [port]->read()));
+	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("exception (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("exception (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0xd00);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0xe00);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	  LABEL("exception (wait spr)");
+
+	  find = false;
+	  do
+	    {
+	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xe00);
+		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xf00);
+		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_ACK [context]->write(0);
+	}
+
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("exception (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(0);
+	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xa00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xb00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xc00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(1);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
+		       out_COMMIT_EVENT_ACK [port]->read()));
+	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("exception (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("exception (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0xa00);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0xb00);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	  LABEL("exception (wait spr)");
+
+	  find = false;
+	  do
+	    {
+	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xb00);
+		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xc00);
+		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_ACK [context]->write(0);
+	}
+      
+      if (1)
+	{
+	  SC_START(3);
+	  
+	  LABEL("exception (begin)");
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
+	  if (_param->_have_port_depth [context])
+	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(1);
+	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xd00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xe00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xf00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(1);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
+		       out_COMMIT_EVENT_ACK [port]->read()));
+	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  
+	  LABEL("exception (wait end)");
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
+	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  
+	  SC_START(1);
+	  
+	  LABEL("exception (wait event)");
+
+	  bool find = false;
+	  do
+	    {
+	      in_EVENT_ACK [context]->write(rand()%percent_transaction_event);
+	  
+	      SC_START(0);
+	  
+	      if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_EVENT_ADDRESS          [context]->read(),0xd00);
+		  TEST(Taddress_t,out_EVENT_ADDRESS_NEXT     [context]->read(),0xe00);
+		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
+		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_EVENT_ACK [context]->write(0);
+
+	  LABEL("exception (wait spr)");
+
+	  find = false;
+	  do
+	    {
+	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xe00);
+		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xf00);
+		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_ACK [context]->write(0);
+	}
+
+
+      SC_START(1);
+    }
+
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL                ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK                ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID         ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_DEPTH              ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_TYPE               ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT      ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS            ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR       ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_VAL               ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL(out_COMMIT_EVENT_ACK               ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID        ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_DEPTH             ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_TYPE              ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT     ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS           ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR      ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR      ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE           ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC    ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST   ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL              ,_param->_nb_decod_unit);
+  DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL             ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM             ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL(out_EVENT_VAL                      ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_EVENT_ACK                      ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_EVENT_ADDRESS                  ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT             ,_param->_nb_context   ); 
+  DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL         ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_EVENT_IS_DS_TAKE               ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_VAL                        ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_SPR_ACK                        ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EPCR                       ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EEAR                       ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EEAR_WEN                   ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_SR_DSX                     ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_SR_TO_ESR                  ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE           ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_DEPTH_TAIL                     ,_param->_nb_context   );
+    }
+#endif
+
+  delete _Context_State;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/Context_State.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/Context_State.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/Context_State.tex	(revision 83)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/Makefile	(revision 83)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/sty/header.sty	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/sty/header.sty	(revision 83)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Context_State}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/01_introduction.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/01_introduction.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/02_features.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/02_features.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/03_description.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/03_description.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/04_pinout.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/04_pinout.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/05_parameters.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/05_parameters.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/06_performance.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/06_performance.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/07_details.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/07_details.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/08_history.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/08_history.tex	(revision 83)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/root.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/doc/tex/root.tex	(revision 83)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h	(revision 83)
@@ -0,0 +1,203 @@
+#ifndef morpheo_behavioural_core_multi_front_end_front_end_context_state_Context_State_h
+#define morpheo_behavioural_core_multi_front_end_front_end_context_state_Context_State_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+  class Context_State 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "decod_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_EVENT_VAL                    ;//[nb_decod_unit]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_EVENT_ACK                    ;//[nb_decod_unit]
+  public    : SC_IN (Tcontext_t         )  **  in_DECOD_EVENT_CONTEXT_ID             ;//[nb_decod_unit]
+  public    : SC_IN (Tdepth_t           )  **  in_DECOD_EVENT_DEPTH                  ;//[nb_decod_unit]
+  public    : SC_IN (Tevent_type_t      )  **  in_DECOD_EVENT_TYPE                   ;//[nb_decod_unit]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_EVENT_IS_DELAY_SLOT          ;//[nb_decod_unit]
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_EVENT_ADDRESS                ;//[nb_decod_unit]
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_EVENT_ADDRESS_EPCR           ;//[nb_decod_unit]
+
+    // ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_EVENT_VAL                   ;//[nb_ooo_engine]
+  public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_EVENT_ACK                   ;//[nb_ooo_engine]
+  public    : SC_IN (Tcontext_t         )  **  in_COMMIT_EVENT_CONTEXT_ID            ;//[nb_ooo_engine]
+  public    : SC_IN (Tdepth_t           )  **  in_COMMIT_EVENT_DEPTH                 ;//[nb_ooo_engine]
+  public    : SC_IN (Tevent_type_t      )  **  in_COMMIT_EVENT_TYPE                  ;//[nb_ooo_engine]
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_EVENT_IS_DELAY_SLOT         ;//[nb_ooo_engine]
+  public    : SC_IN (Taddress_t         )  **  in_COMMIT_EVENT_ADDRESS               ;//[nb_ooo_engine]
+  public    : SC_IN (Taddress_t         )  **  in_COMMIT_EVENT_ADDRESS_EPCR          ;//[nb_ooo_engine]
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_EVENT_ADDRESS_EEAR_VAL      ;//[nb_ooo_engine]
+  public    : SC_IN (Taddress_t         )  **  in_COMMIT_EVENT_ADDRESS_EEAR          ;//[nb_ooo_engine]
+
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_COMPLETE_VAL                ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_COMPLETE_ACK                ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontext_t         )  **  in_BRANCH_COMPLETE_CONTEXT_ID         ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tdepth_t           )  **  in_BRANCH_COMPLETE_DEPTH              ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_COMPLETE_MISS_PREDICTION    ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_COMPLETE_TAKE               ;//[nb_inst_branch_complete]
+  public    : SC_IN (Taddress_t         )  **  in_BRANCH_COMPLETE_ADDRESS_SRC        ;//[nb_inst_branch_complete]
+  public    : SC_IN (Taddress_t         )  **  in_BRANCH_COMPLETE_ADDRESS_DEST       ;//[nb_inst_branch_complete]
+
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcounter_t         )  **  in_NB_INST_DECOD_ALL                  ;//[nb_decod_unit]
+  public    : SC_IN (Tcounter_t         )  **  in_NB_INST_COMMIT_ALL                 ;//[nb_ooo_engine]
+  public    : SC_IN (Tcounter_t         )  **  in_NB_INST_COMMIT_MEM                 ;//[nb_ooo_engine]
+
+    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_EVENT_VAL                          ;//[nb_context]
+  public    : SC_IN (Tcontrol_t         )  **  in_EVENT_ACK                          ;//[nb_context]
+  public    : SC_OUT(Taddress_t         )  ** out_EVENT_ADDRESS                      ;//[nb_context]
+  public    : SC_OUT(Taddress_t         )  ** out_EVENT_ADDRESS_NEXT                 ;//[nb_context] 
+  public    : SC_OUT(Tcontrol_t         )  ** out_EVENT_ADDRESS_NEXT_VAL             ;//[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_EVENT_IS_DS_TAKE                   ;//[nb_context]
+
+    // ~~~~~[ Interface "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_VAL                            ;//[nb_context]
+  public    : SC_IN (Tcontrol_t         )  **  in_SPR_ACK                            ;//[nb_context]
+  public    : SC_OUT(Taddress_t         )  ** out_SPR_EPCR                           ;//[nb_context]
+  public    : SC_OUT(Taddress_t         )  ** out_SPR_EEAR                           ;//[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_EEAR_WEN                       ;//[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_SR_DSX                         ;//[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_SR_TO_ESR                      ;//[nb_context]
+
+    // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_CONTEXT_DECOD_ENABLE               ;//[nb_context]
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tdepth_t           )  **  in_DEPTH_TAIL                         ;//[nb_context]
+                                                                                     
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : context_state_t               * reg_STATE                              ;//[nb_context]
+  private   : Taddress_t                    * reg_EVENT_ADDRESS                      ;//[nb_context]
+  private   : Taddress_t                    * reg_EVENT_ADDRESS_EPCR                 ;//[nb_context] 
+  private   : Tcontrol_t                    * reg_EVENT_ADDRESS_EPCR_VAL             ;//[nb_context]
+  private   : Taddress_t                    * reg_EVENT_ADDRESS_EEAR                 ;//[nb_context] 
+  private   : Tcontrol_t                    * reg_EVENT_ADDRESS_EEAR_VAL             ;//[nb_context]
+  private   : Tcontrol_t                    * reg_EVENT_IS_DELAY_SLOT                ;//[nb_context]
+  private   : Tcontrol_t                    * reg_EVENT_IS_DS_TAKE                   ;//[nb_context]
+  private   : Tdepth_t                      * reg_EVENT_DEPTH                        ;//[nb_context]
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  private   : Tcontrol_t                    * internal_DECOD_EVENT_ACK               ;//[nb_decod_unit]
+  private   : Tcontrol_t                    * internal_COMMIT_EVENT_ACK              ;//[nb_ooo_engine]
+  private   : Tcontrol_t                    * internal_BRANCH_COMPLETE_ACK           ;//[nb_inst_branch_complete]
+  private   : Tcontrol_t                    * internal_EVENT_VAL                     ;//[nb_context]
+  private   : Tcontrol_t                    * internal_SPR_VAL                       ;//[nb_context]
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Context_State);
+#endif
+  public  :          Context_State              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Context_State             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  public  : void        transition                (void);
+  public  : void        genMoore                  (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h	(revision 83)
@@ -0,0 +1,73 @@
+#ifndef morpheo_behavioural_core_multi_front_end_front_end_context_state_Parameters_h
+#define morpheo_behavioural_core_multi_front_end_front_end_context_state_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+
+  public : uint32_t   _nb_context                   ;
+  public : uint32_t   _nb_decod_unit                ;
+  public : uint32_t   _nb_ooo_engine                ;
+  public : uint32_t   _nb_inst_branch_complete      ;
+  public : uint32_t * _size_depth                   ; //[nb_context]
+  public : uint32_t   _size_address                 ;
+  public : uint32_t * _size_inst_decod              ; //[nb_decod_unit]
+  public : uint32_t * _size_inst_commit             ; //[nb_ooo_engine]
+  public : uint32_t * _link_context_to_decod_unit   ; //[nb_context]
+  public : uint32_t * _link_decod_unit_to_ooo_engine; //[nb_decod_unit]
+
+  public : uint32_t   _size_context_id;
+  public : uint32_t   _size_max_depth ;
+
+  public : bool       _have_port_context_id;
+  public : bool     * _have_port_depth     ;
+  public : bool       _have_port_max_depth ;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t   nb_context,
+			uint32_t   nb_decod_unit,
+			uint32_t   nb_ooo_engine,
+			uint32_t   nb_inst_branch_complete,
+			uint32_t * size_depth,                
+			uint32_t   size_address,
+			uint32_t * size_inst_decod,           
+			uint32_t * size_inst_commit,          
+			uint32_t * link_context_to_decod_unit,
+			uint32_t * link_decod_unit_to_ooo_engine);
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					      morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters & x);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h	(revision 83)
@@ -0,0 +1,82 @@
+#ifndef morpheo_behavioural_core_multi_front_end_front_end_context_state_Types_h
+#define morpheo_behavioural_core_multi_front_end_front_end_context_state_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+//   NOTES :
+//   - MSYNC : memory model is weakly order. MSYNC can be sequentialize memory access
+//   - PSYNC : Finalize all instruction, to enter in a critic zone
+//   - CSYNC : to flush all structure in the CPU, to change a thread
+
+  typedef enum
+    {
+      CONTEXT_STATE_OK              , // none event
+      CONTEXT_STATE_KO_EXCEP        , // wait end of event (exception)
+      CONTEXT_STATE_KO_EXCEP_ADDR   , // update address manager
+      CONTEXT_STATE_KO_EXCEP_SPR    , // update spr (epc, esr, sr[DSX])
+      CONTEXT_STATE_KO_MISS         , // wait end of event (miss (branch, load))
+      CONTEXT_STATE_KO_MISS_ADDR    , // update address manager
+      CONTEXT_STATE_KO_MSYNC        , // wait completion of all memory operation
+      CONTEXT_STATE_KO_MSYNC_ISSUE  , // issue msync operation
+      CONTEXT_STATE_KO_MSYNC_EXEC   , // wait completion of     msync  operation
+      CONTEXT_STATE_KO_PSYNC        , // wait completion of all        operation and after flush pipeline
+      CONTEXT_STATE_KO_PSYNC_FLUSH  , // wait completion of all 
+      CONTEXT_STATE_KO_PSYNC_ADDR   , // wait completion of all 
+      CONTEXT_STATE_KO_CSYNC        , // wait completion of all        operation and after flush pipeline and flush ALL units (MMU, cache ...)
+      CONTEXT_STATE_KO_CSYNC_FLUSH  ,
+      CONTEXT_STATE_KO_CSYNC_ADDR   ,
+      CONTEXT_STATE_KO_SPR          , // wait completion of all        operation
+      CONTEXT_STATE_KO_SPR_ISSUE    , // issue spr's access
+      CONTEXT_STATE_KO_SPR_EXEC       // wait completion of all        operation (spr access)
+    } context_state_t;
+
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+}; // end namespace behavioural
+
+  template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::context_state::context_state_t>(const morpheo::behavioural::core::multi_front_end::front_end::context_state::context_state_t& x)
+  {
+    switch (x)
+      {
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_OK              : return "context_state_ok"             ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP        : return "context_state_ko_excep"       ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_ADDR   : return "context_state_ko_excep_addr"  ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_SPR    : return "context_state_ko_excep_spr"   ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS         : return "context_state_ko_miss"        ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_ADDR    : return "context_state_ko_miss_addr"   ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC        : return "context_state_ko_msync"       ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC_ISSUE  : return "context_state_ko_msync_issue" ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC_EXEC   : return "context_state_ko_msync_exec"  ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC        : return "context_state_ko_psync"       ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC_FLUSH  : return "context_state_ko_psync_flush" ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC_ADDR   : return "context_state_ko_psync_addr"  ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC        : return "context_state_ko_csync"       ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC_FLUSH  : return "context_state_ko_csync_flush" ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC_ADDR   : return "context_state_ko_csync_addr"  ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR          : return "context_state_ko_spr"         ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR_ISSUE    : return "context_state_ko_spr_issue"   ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR_EXEC     : return "context_state_ko_spr_exec"    ; break;
+      default    : return ""      ; break;
+      }
+  };
+
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State.cpp	(revision 83)
@@ -0,0 +1,140 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::Context_State"
+  Context_State::Context_State 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    usage_environment(_usage);
+
+    log_printf(INFO,Context_State,FUNCTION,_("Allocation"));
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Context_State,FUNCTION,_("Allocation of statistics"));
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Context_State,FUNCTION,_("Generate the vhdl"));
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	// Constant
+	for (uint32_t i=0; i<_param->_nb_decod_unit; i++)
+	  {
+	    internal_DECOD_EVENT_ACK [i] = 1;
+	    PORT_WRITE(out_DECOD_EVENT_ACK [i], internal_DECOD_EVENT_ACK [i]);
+	  }
+
+	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
+	  {
+	    internal_COMMIT_EVENT_ACK [i] = 1;
+	    PORT_WRITE(out_COMMIT_EVENT_ACK [i], internal_COMMIT_EVENT_ACK [i]);
+	  }
+
+	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+	  {
+	    internal_BRANCH_COMPLETE_ACK [i] = 1;
+	    PORT_WRITE(out_BRANCH_COMPLETE_ACK [i], internal_BRANCH_COMPLETE_ACK [i]);
+	  }
+
+	log_printf(INFO,Context_State,FUNCTION,_("Method - transition"));
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Context_State,FUNCTION,_("Method - genMoore"));
+
+	SC_METHOD (genMoore);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // use internal register
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_end(Context_State,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Context_State::~Context_State"
+  Context_State::~Context_State (void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Context_State,FUNCTION,_("Deallocation"));
+    deallocation ();
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp	(revision 83)
@@ -0,0 +1,192 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::allocation"
+  void Context_State::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(Context_State,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Context_State"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "decod_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("decod_event",IN ,SOUTH, _("Decod Interface"), _param->_nb_decod_unit);
+
+      ALLOC1_VALACK_IN ( in_DECOD_EVENT_VAL                    ,VAL);
+      ALLOC1_VALACK_OUT(out_DECOD_EVENT_ACK                    ,ACK);
+      ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_CONTEXT_ID             ,"context_id"             ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_DEPTH                  ,"depth"                  ,Tdepth_t           ,_param->_size_max_depth);
+      ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_TYPE                   ,"type"                   ,Tevent_type_t      ,_param->_size_event_type);
+      ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_IS_DELAY_SLOT          ,"is_delay_slot"          ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_ADDRESS                ,"address"                ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_ADDRESS_EPCR           ,"address_epcr"           ,Taddress_t         ,_param->_size_address);
+    }
+
+    // ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("commit_event",IN ,EAST, _("Interface with the Re Order Buffer"), _param->_nb_ooo_engine);
+
+      ALLOC1_VALACK_IN ( in_COMMIT_EVENT_VAL                   ,VAL);
+      ALLOC1_VALACK_OUT(out_COMMIT_EVENT_ACK                   ,ACK);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_CONTEXT_ID            ,"context_id"      ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_DEPTH                 ,"depth"           ,Tdepth_t           ,_param->_size_max_depth);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_TYPE                  ,"type"            ,Tevent_type_t      ,_param->_size_event_type);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_IS_DELAY_SLOT         ,"is_delay_slot"   ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS               ,"address"         ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS_EPCR          ,"address_epcr"    ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL      ,"address_eear_val",Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS_EEAR          ,"address_eear"    ,Taddress_t         ,_param->_size_address);
+    }
+
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("branch_complete",IN ,NORTH, _("Interface with the prediction_unit."), _param->_nb_inst_branch_complete);
+
+      ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_VAL                ,VAL);
+      ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_ACK                ,ACK);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_CONTEXT_ID         ,"context_id"     ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH              ,"depth"          ,Tdepth_t           ,_param->_size_max_depth);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION    ,"miss_prediction",Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_TAKE               ,"take"           ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_SRC        ,"address_src"    ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_DEST       ,"address_dest"   ,Taddress_t         ,_param->_size_address);
+    }
+
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("nb_inst",IN ,EAST, _("Interface to count in fligt present instruction."), _param->_nb_decod_unit);
+
+      ALLOC1_SIGNAL_IN ( in_NB_INST_DECOD_ALL                  ,"decod_all" ,Tcounter_t         ,_param->_size_inst_decod  [alloc_signal_it1]);
+//    ALLOC1_SIGNAL_IN ( in_NB_INST_COMMIT_ALL                 ,"commit_all",Tcounter_t         ,_param->_size_inst_commit [alloc_signal_it1]);
+//    ALLOC1_SIGNAL_IN ( in_NB_INST_COMMIT_MEM                 ,"commit_mem",Tcounter_t         ,_param->_size_inst_commit [alloc_signal_it1]);
+    }
+    {
+      ALLOC1_INTERFACE("nb_inst",IN ,EAST, _("Interface to count in fligt present instruction."), _param->_nb_ooo_engine);
+
+//    ALLOC1_SIGNAL_IN ( in_NB_INST_DECOD_ALL                  ,"decod_all" ,Tcounter_t         ,_param->_size_inst_decod  [alloc_signal_it1]);
+      ALLOC1_SIGNAL_IN ( in_NB_INST_COMMIT_ALL                 ,"commit_all",Tcounter_t         ,_param->_size_inst_commit [alloc_signal_it1]);
+      ALLOC1_SIGNAL_IN ( in_NB_INST_COMMIT_MEM                 ,"commit_mem",Tcounter_t         ,_param->_size_inst_commit [alloc_signal_it1]);
+    }
+
+    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("event",OUT,WEST, _("An event occure : change PC address."), _param->_nb_context);
+      
+      ALLOC1_VALACK_OUT(out_EVENT_VAL                          ,VAL);
+      ALLOC1_VALACK_IN ( in_EVENT_ACK                          ,ACK);
+      ALLOC1_SIGNAL_OUT(out_EVENT_ADDRESS                      ,"address"         ,Taddress_t        ,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_EVENT_ADDRESS_NEXT                 ,"address_next"    ,Taddress_t        ,_param->_size_address); 
+      ALLOC1_SIGNAL_OUT(out_EVENT_ADDRESS_NEXT_VAL             ,"address_next_val",Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_EVENT_IS_DS_TAKE                   ,"is_ds_take"      ,Tcontrol_t        ,1);
+    }
+
+    // ~~~~~[ Interface "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("spr",OUT,WEST, _("An exception occure : write \"exception PC\"."), _param->_nb_context);
+
+      ALLOC1_VALACK_OUT(out_SPR_VAL                            ,VAL);
+      ALLOC1_VALACK_IN ( in_SPR_ACK                            ,ACK);
+      ALLOC1_SIGNAL_OUT(out_SPR_EPCR                           ,"epcr"     ,Taddress_t, _param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_SPR_EEAR                           ,"eear"     ,Taddress_t, _param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_SPR_EEAR_WEN                       ,"eear_wen" ,Tcontrol_t,1);
+      ALLOC1_SIGNAL_OUT(out_SPR_SR_DSX                         ,"sr_dsx"   ,Tcontrol_t,1);
+      ALLOC1_SIGNAL_OUT(out_SPR_SR_TO_ESR                      ,"sr_to_esr",Tcontrol_t,1);
+    }
+
+    // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("context",OUT,SOUTH, _("To decod."), _param->_nb_context);
+      
+      ALLOC1_SIGNAL_OUT(out_CONTEXT_DECOD_ENABLE               ,"decod_enable",Tcontrol_t,1);
+    }
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("depth",IN ,NORTH, _("From prediction_unit."), _param->_nb_context);
+      
+      ALLOC1_SIGNAL_IN ( in_DEPTH_TAIL                         ,"tail",Tdepth_t,_param->_size_depth [alloc_signal_it1]);
+    }
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    
+    reg_STATE                  = new context_state_t [_param->_nb_context];
+    reg_EVENT_ADDRESS          = new Taddress_t      [_param->_nb_context];
+    reg_EVENT_ADDRESS_EPCR     = new Taddress_t      [_param->_nb_context]; 
+    reg_EVENT_ADDRESS_EPCR_VAL = new Tcontrol_t      [_param->_nb_context];
+    reg_EVENT_ADDRESS_EEAR     = new Taddress_t      [_param->_nb_context]; 
+    reg_EVENT_ADDRESS_EEAR_VAL = new Tcontrol_t      [_param->_nb_context];
+    reg_EVENT_IS_DELAY_SLOT    = new Tcontrol_t      [_param->_nb_context];
+    reg_EVENT_IS_DS_TAKE       = new Tcontrol_t      [_param->_nb_context];
+    reg_EVENT_DEPTH            = new Tdepth_t        [_param->_nb_context];
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    internal_DECOD_EVENT_ACK     = new Tcontrol_t [_param->_nb_decod_unit];
+    internal_COMMIT_EVENT_ACK    = new Tcontrol_t [_param->_nb_ooo_engine];
+    internal_BRANCH_COMPLETE_ACK = new Tcontrol_t [_param->_nb_inst_branch_complete];
+    internal_EVENT_VAL           = new Tcontrol_t [_param->_nb_context];
+    internal_SPR_VAL             = new Tcontrol_t [_param->_nb_context];
+    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
+#endif
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp	(revision 83)
@@ -0,0 +1,116 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::deallocation"
+  void Context_State::deallocation (void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+        DELETE1_SIGNAL( in_DECOD_EVENT_VAL                    ,_param->_nb_decod_unit,1);
+        DELETE1_SIGNAL(out_DECOD_EVENT_ACK                    ,_param->_nb_decod_unit,1);
+        DELETE1_SIGNAL( in_DECOD_EVENT_CONTEXT_ID             ,_param->_nb_decod_unit,_param->_size_context_id);
+        DELETE1_SIGNAL( in_DECOD_EVENT_DEPTH                  ,_param->_nb_decod_unit,_param->_size_max_depth);
+        DELETE1_SIGNAL( in_DECOD_EVENT_TYPE                   ,_param->_nb_decod_unit,_param->_size_event_type);
+        DELETE1_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT          ,_param->_nb_decod_unit,1);
+        DELETE1_SIGNAL( in_DECOD_EVENT_ADDRESS                ,_param->_nb_decod_unit,_param->_size_address);
+        DELETE1_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR           ,_param->_nb_decod_unit,_param->_size_address);
+        
+	DELETE1_SIGNAL( in_COMMIT_EVENT_VAL                   ,_param->_nb_ooo_engine,1);
+        DELETE1_SIGNAL(out_COMMIT_EVENT_ACK                   ,_param->_nb_ooo_engine,1);
+        DELETE1_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID            ,_param->_nb_ooo_engine,_param->_size_context_id);
+        DELETE1_SIGNAL( in_COMMIT_EVENT_DEPTH                 ,_param->_nb_ooo_engine,_param->_size_max_depth);
+        DELETE1_SIGNAL( in_COMMIT_EVENT_TYPE                  ,_param->_nb_ooo_engine,_param->_size_event_type);
+        DELETE1_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT         ,_param->_nb_ooo_engine,1);
+        DELETE1_SIGNAL( in_COMMIT_EVENT_ADDRESS               ,_param->_nb_ooo_engine,_param->_size_address);
+        DELETE1_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR          ,_param->_nb_ooo_engine,_param->_size_address);
+	DELETE1_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL      ,_param->_nb_ooo_engine,_param->_size_address);
+	DELETE1_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR          ,_param->_nb_ooo_engine,1);
+
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_VAL                ,_param->_nb_inst_branch_complete,1);
+	DELETE1_SIGNAL(out_BRANCH_COMPLETE_ACK                ,_param->_nb_inst_branch_complete,1);
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID         ,_param->_nb_inst_branch_complete,_param->_size_context_id);
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_DEPTH              ,_param->_nb_inst_branch_complete,_param->_size_max_depth);
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION    ,_param->_nb_inst_branch_complete,1);
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_TAKE               ,_param->_nb_inst_branch_complete,1);
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC        ,_param->_nb_inst_branch_complete,_param->_size_address);
+	DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST       ,_param->_nb_inst_branch_complete,_param->_size_address);
+        
+	DELETE1_SIGNAL( in_NB_INST_DECOD_ALL                  ,_param->_nb_decod_unit,_param->_size_inst_decod  [alloc_signal_it1]);
+//      DELETE1_SIGNAL( in_NB_INST_COMMIT_ALL                 ,_param->_nb_decod_unit,_param->_size_inst_commit [alloc_signal_it1]);
+//      DELETE1_SIGNAL( in_NB_INST_COMMIT_MEM                 ,_param->_nb_decod_unit,_param->_size_inst_commit [alloc_signal_it1]);
+//      DELETE1_SIGNAL( in_NB_INST_DECOD_ALL                  ,_param->_nb_ooo_engine,_param->_size_inst_decod  [alloc_signal_it1]);
+        DELETE1_SIGNAL( in_NB_INST_COMMIT_ALL                 ,_param->_nb_ooo_engine,_param->_size_inst_commit [alloc_signal_it1]);
+        DELETE1_SIGNAL( in_NB_INST_COMMIT_MEM                 ,_param->_nb_ooo_engine,_param->_size_inst_commit [alloc_signal_it1]);
+        
+	DELETE1_SIGNAL(out_EVENT_VAL                          ,_param->_nb_context,1);
+        DELETE1_SIGNAL( in_EVENT_ACK                          ,_param->_nb_context,1);
+        DELETE1_SIGNAL(out_EVENT_ADDRESS                      ,_param->_nb_context,_param->_size_address);
+        DELETE1_SIGNAL(out_EVENT_ADDRESS_NEXT                 ,_param->_nb_context,_param->_size_address);
+        DELETE1_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL             ,_param->_nb_context,1);
+        DELETE1_SIGNAL(out_EVENT_IS_DS_TAKE                   ,_param->_nb_context,1);
+        
+	DELETE1_SIGNAL(out_SPR_VAL                            ,_param->_nb_context,1);
+        DELETE1_SIGNAL( in_SPR_ACK                            ,_param->_nb_context,1);
+        DELETE1_SIGNAL(out_SPR_EPCR                           ,_param->_nb_context,_param->_size_address);
+        DELETE1_SIGNAL(out_SPR_EEAR                           ,_param->_nb_context,_param->_size_address);
+        DELETE1_SIGNAL(out_SPR_EEAR_WEN                       ,_param->_nb_context,1);
+	DELETE1_SIGNAL(out_SPR_SR_DSX                         ,_param->_nb_context,1);
+	DELETE1_SIGNAL(out_SPR_SR_TO_ESR                      ,_param->_nb_context,1);
+        
+	DELETE1_SIGNAL(out_CONTEXT_DECOD_ENABLE               ,_param->_nb_context,1);
+
+	DELETE1_SIGNAL( in_DEPTH_TAIL                         ,_param->_nb_context,_param->_size_depth [alloc_signal_it1]);
+      }
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    delete [] reg_STATE                 ;
+    delete [] reg_EVENT_ADDRESS         ;
+    delete [] reg_EVENT_ADDRESS_EPCR    ; 
+    delete [] reg_EVENT_ADDRESS_EPCR_VAL;
+    delete [] reg_EVENT_ADDRESS_EEAR    ; 
+    delete [] reg_EVENT_ADDRESS_EEAR_VAL;
+    delete [] reg_EVENT_IS_DELAY_SLOT   ;
+    delete [] reg_EVENT_IS_DS_TAKE      ;
+    delete [] reg_EVENT_DEPTH           ;
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    delete [] internal_DECOD_EVENT_ACK  ;
+    delete [] internal_COMMIT_EVENT_ACK ;
+    delete [] internal_EVENT_VAL        ;
+    delete [] internal_SPR_VAL          ;
+    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    delete _component;
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_end_cycle.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_end_cycle.cpp	(revision 83)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::end_cycle"
+void Context_State::end_cycle ()
+  {
+    log_begin(Context_State,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp	(revision 83)
@@ -0,0 +1,87 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::genMoore"
+  void Context_State::genMoore (void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    // -------------------------------------------------------------------
+    // -----[ EVENT ]-----------------------------------------------------
+    // -------------------------------------------------------------------
+    for (uint32_t i=0; i<_param->_nb_context; i++)
+      {
+	context_state_t state = reg_STATE [i];
+
+	internal_EVENT_VAL [i] = ((state == CONTEXT_STATE_KO_EXCEP_ADDR) or
+				  (state == CONTEXT_STATE_KO_MISS_ADDR ) or
+				  (state == CONTEXT_STATE_KO_PSYNC_ADDR) or 
+				  (state == CONTEXT_STATE_KO_CSYNC_ADDR));
+
+	// excep : address exception
+	// miss  : address delay_slot, and address dest
+	// psync : address next
+	// csync : address next
+	PORT_WRITE(out_EVENT_VAL              [i], internal_EVENT_VAL     [i]);
+	PORT_WRITE(out_EVENT_ADDRESS          [i], reg_EVENT_ADDRESS      [i]);
+	PORT_WRITE(out_EVENT_ADDRESS_NEXT     [i], reg_EVENT_ADDRESS_EPCR [i]); 
+	PORT_WRITE(out_EVENT_ADDRESS_NEXT_VAL [i], (state == CONTEXT_STATE_KO_MISS_ADDR) and (reg_EVENT_ADDRESS_EPCR_VAL [i]));
+	PORT_WRITE(out_EVENT_IS_DS_TAKE       [i], (state == CONTEXT_STATE_KO_MISS_ADDR) and (reg_EVENT_IS_DS_TAKE       [i]));
+      }
+
+    // -------------------------------------------------------------------
+    // -----[ SPR ]-------------------------------------------------------
+    // -------------------------------------------------------------------
+    for (uint32_t i=0; i<_param->_nb_context; i++)
+      {
+	context_state_t state = reg_STATE [i];
+
+	internal_SPR_VAL [i] = (state == CONTEXT_STATE_KO_EXCEP_SPR  );
+
+	PORT_WRITE(out_SPR_VAL       [i], internal_SPR_VAL           [i]);
+	PORT_WRITE(out_SPR_EPCR      [i], reg_EVENT_ADDRESS_EPCR     [i]);
+	PORT_WRITE(out_SPR_EEAR      [i], reg_EVENT_ADDRESS_EEAR     [i]);
+	PORT_WRITE(out_SPR_EEAR_WEN  [i], reg_EVENT_ADDRESS_EEAR_VAL [i]);
+	PORT_WRITE(out_SPR_SR_DSX    [i], reg_EVENT_IS_DELAY_SLOT    [i]);
+	PORT_WRITE(out_SPR_SR_TO_ESR [i], 1);
+      }
+
+    // -------------------------------------------------------------------
+    // -----[ CONTEXT ]---------------------------------------------------
+    // -------------------------------------------------------------------
+    for (uint32_t i=0; i<_param->_nb_context; i++)
+      {
+	context_state_t state = reg_STATE [i];
+
+	PORT_WRITE(out_CONTEXT_DECOD_ENABLE [i], ((state==CONTEXT_STATE_OK            ) or
+						  (state==CONTEXT_STATE_KO_MSYNC_ISSUE) or
+						  (state==CONTEXT_STATE_KO_SPR_ISSUE  )));
+      }
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_statistics_allocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_statistics_allocation.cpp	(revision 83)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::statistics_allocation"
+  void Context_State::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Context_State",
+		      param_statistics);
+    
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_statistics_deallocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_statistics_deallocation.cpp	(revision 83)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::statistics_deallocation"
+  void Context_State::statistics_deallocation (void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    log_printf(INFO,Context_State,FUNCTION,_("Generate Statistics file"));
+    
+    delete _stat;
+    
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 83)
@@ -0,0 +1,460 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::transition"
+  void Context_State::transition (void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    if (PORT_READ(in_NRESET) == 0)
+      {
+	for (uint32_t i=0; i<_param->_nb_context; i++)
+	  reg_STATE [i] = CONTEXT_STATE_OK;
+      }
+    else
+      {
+	// -------------------------------------------------------------------
+	// -----[ DECOD_EVENT ]-----------------------------------------------
+	// -------------------------------------------------------------------
+
+	for (uint32_t i=0; i<_param->_nb_decod_unit; i++)
+	  if (PORT_READ(in_DECOD_EVENT_VAL [i]) and internal_DECOD_EVENT_ACK [i])
+	    {
+	      Tcontext_t context    = (_param->_have_port_context_id     )?PORT_READ(in_DECOD_EVENT_CONTEXT_ID [i]):0;
+	      Tdepth_t   depth      = (_param->_have_port_max_depth      )?PORT_READ(in_DECOD_EVENT_DEPTH      [i]):0;
+	      Tdepth_t   depth_cur  = reg_EVENT_DEPTH [context];
+	      Tdepth_t   depth_base = (_param->_have_port_depth [context])?PORT_READ(in_DEPTH_TAIL       [context]):0;
+	      Tdepth_t   depth_max  = _param->_size_depth [context];
+	      
+	      Tdepth_t   depth0     = (depth_cur>=depth_base)?(depth_cur-depth_base):((depth_cur+depth_max-depth_base));
+	      Tdepth_t   depth1     = (depth    >=depth_base)?(depth    -depth_base):((depth    +depth_max-depth_base));
+
+	      context_state_t state = reg_STATE [context];
+	      Tevent_type_t   type  = PORT_READ(in_DECOD_EVENT_TYPE [i]);
+	      
+	      // miss > excep > spr/sync
+	      uint8_t    priority0  = (state == CONTEXT_STATE_KO_MISS)?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0);
+	      uint8_t    priority1  = (state == EVENT_TYPE_EXCEPTION)?1:0;
+
+	      // is_valid = can modify local information
+	      //  if context_state_ok : yes
+	      //  if context_state_ko : test the depth, and the priority of envent
+
+	      bool       is_valid   = ((state == CONTEXT_STATE_OK) or
+				       (depth1< depth0) or
+				       ((depth1==depth0) and (priority1>priority0)));
+
+	      if (is_valid)
+		{
+		  // decod : 
+		  // type : csync, psync, msync, spr_access (l.mac, l.maci, l.macrc, l.msb, l.mfspr, l.mtspr), exception (l.sys)
+		  context_state_t state_next    = state;
+		  Taddress_t      address       = PORT_READ(in_DECOD_EVENT_ADDRESS       [i]);
+		  Tcontrol_t      is_delay_slot = PORT_READ(in_DECOD_EVENT_IS_DELAY_SLOT [i]);
+
+		  switch (type)
+		    {
+		    case EVENT_TYPE_EXCEPTION          : 
+		      {
+			state_next = CONTEXT_STATE_KO_EXCEP; 
+			break;
+		      }
+		    case EVENT_TYPE_SPR_ACCESS         : 
+		      {
+			state_next = CONTEXT_STATE_KO_SPR  ; 
+			address++; // take next address
+			if (is_delay_slot)
+			  throw ERRORMORPHEO(FUNCTION,"SPR access in delay slot, not supported.\n");
+			break;
+		      }
+		    case EVENT_TYPE_MSYNC              : 
+		      {
+			state_next = CONTEXT_STATE_KO_MSYNC;
+			address++;  // take next address
+			if (is_delay_slot)
+			  throw ERRORMORPHEO(FUNCTION,"SPR access in delay slot, not supported.\n");
+			break;
+		      }
+		    case EVENT_TYPE_PSYNC              :
+		      {
+			state_next = CONTEXT_STATE_KO_PSYNC;
+			address++;  // take next address
+			if (is_delay_slot)
+			  throw ERRORMORPHEO(FUNCTION,"SPR access in delay slot, not supported.\n");
+			break;
+		      }
+		    case EVENT_TYPE_CSYNC              :
+		      {
+			state_next = CONTEXT_STATE_KO_CSYNC;
+			address++;  // take next address
+			if (is_delay_slot)
+			  throw ERRORMORPHEO(FUNCTION,"SPR access in delay slot, not supported.\n");
+			break;
+		      }		      
+		    case EVENT_TYPE_NONE               :
+		    case EVENT_TYPE_MISS_SPECULATION   :
+		    case EVENT_TYPE_BRANCH_NO_ACCURATE :
+		    default :
+		      {
+			throw ERRORMORPHEO(FUNCTION,toString(_("DECOD_EVENT [%d] : invalid event_type : %s.\n"),i,toString(type).c_str()));
+		      }
+		    }
+
+		  reg_STATE                  [context] = state_next;
+		  reg_EVENT_ADDRESS          [context] = address;
+		  reg_EVENT_ADDRESS_EPCR     [context] = PORT_READ(in_DECOD_EVENT_ADDRESS_EPCR  [i]); 
+		  reg_EVENT_ADDRESS_EPCR_VAL [context] = 1;
+		//reg_EVENT_ADDRESS_EEAR     [context]
+		  reg_EVENT_ADDRESS_EEAR_VAL [context] = 0;
+		  reg_EVENT_IS_DELAY_SLOT    [context] = is_delay_slot;
+		//reg_EVENT_IS_DS_TAKE       [context] = 0;
+		  reg_EVENT_DEPTH            [context] = depth;
+		}
+	    }
+
+	// -------------------------------------------------------------------
+	// -----[ COMMIT_EVENT ]----------------------------------------------
+	// -------------------------------------------------------------------
+
+	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
+	  if (PORT_READ(in_COMMIT_EVENT_VAL [i]) and internal_COMMIT_EVENT_ACK [i])
+	    {
+	      Tcontext_t context    = (_param->_have_port_context_id     )?PORT_READ(in_COMMIT_EVENT_CONTEXT_ID [i]):0;
+	      Tdepth_t   depth      = (_param->_have_port_max_depth      )?PORT_READ(in_COMMIT_EVENT_DEPTH      [i]):0;
+	      Tdepth_t   depth_cur  = reg_EVENT_DEPTH [context];
+	      Tdepth_t   depth_base = (_param->_have_port_depth [context])?PORT_READ(in_DEPTH_TAIL        [context]):0;
+	      Tdepth_t   depth_max  = _param->_size_depth [context];
+	      
+	      Tdepth_t   depth0     = (depth_cur>=depth_base)?(depth_cur-depth_base):((depth_cur+depth_max-depth_base));
+	      Tdepth_t   depth1     = (depth    >=depth_base)?(depth    -depth_base):((depth    +depth_max-depth_base));
+
+	      context_state_t state = reg_STATE [context];
+	      Tevent_type_t   type  = PORT_READ(in_COMMIT_EVENT_TYPE [i]);
+	      
+	      // miss > excep > spr/sync
+	      uint8_t    priority0  = (state == CONTEXT_STATE_KO_MISS)?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0);
+	      uint8_t    priority1  = 1;
+
+	      // is_valid = can modify local information
+	      //  if context_state_ok : yes
+	      //  if context_state_ko : test the depth, and the priority of envent
+
+	      bool       is_valid   = ((state == CONTEXT_STATE_OK) or
+				       (depth1< depth0) or
+				       ((depth1==depth0) and (priority1>priority0)));
+
+	      if (is_valid)
+		{
+		  // commit
+		  // type : exception
+		  context_state_t state_next = state;
+		  switch (type)
+		    {
+		    case EVENT_TYPE_EXCEPTION          : {state_next = CONTEXT_STATE_KO_EXCEP; break;}
+		    case EVENT_TYPE_SPR_ACCESS         :
+		    case EVENT_TYPE_MSYNC              :
+		    case EVENT_TYPE_PSYNC              :
+		    case EVENT_TYPE_CSYNC              :
+		    case EVENT_TYPE_NONE               :
+		    case EVENT_TYPE_MISS_SPECULATION   :
+		    case EVENT_TYPE_BRANCH_NO_ACCURATE :
+		    default :
+		      {
+			throw ERRORMORPHEO(FUNCTION,toString(_("COMMIT_EVENT [%d] : invalid event_type : %s.\n"),i,toString(type).c_str()));
+		      }
+		    }
+		  reg_STATE                  [context] = state_next;
+		  reg_EVENT_ADDRESS          [context] = PORT_READ(in_COMMIT_EVENT_ADDRESS          [i]);
+		  reg_EVENT_ADDRESS_EPCR     [context] = PORT_READ(in_COMMIT_EVENT_ADDRESS_EPCR     [i]); 
+		  reg_EVENT_ADDRESS_EPCR_VAL [context] = 1;
+		  reg_EVENT_ADDRESS_EEAR     [context] = PORT_READ(in_COMMIT_EVENT_ADDRESS_EEAR     [i]); 
+		  reg_EVENT_ADDRESS_EEAR_VAL [context] = PORT_READ(in_COMMIT_EVENT_ADDRESS_EEAR_VAL [i]);
+		  reg_EVENT_IS_DELAY_SLOT    [context] = PORT_READ(in_COMMIT_EVENT_IS_DELAY_SLOT    [i]);
+		//reg_EVENT_IS_DS_TAKE       [context] = 0;
+		  reg_EVENT_DEPTH            [context] = depth;
+		}
+	    }
+
+	// -------------------------------------------------------------------
+	// -----[ BRANCH_COMPLETE ]-------------------------------------------
+	// -------------------------------------------------------------------
+
+	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+	  if (PORT_READ(in_BRANCH_COMPLETE_VAL [i]) and internal_BRANCH_COMPLETE_ACK [i])
+	    {
+	      if (PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]))
+		{
+		  Tcontext_t context    = (_param->_have_port_context_id     )?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
+		  Tdepth_t   depth      = (_param->_have_port_max_depth      )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
+		  Tdepth_t   depth_cur  = reg_EVENT_DEPTH [context];
+		  Tdepth_t   depth_base = (_param->_have_port_depth [context])?PORT_READ(in_DEPTH_TAIL        [context]):0;
+		  Tdepth_t   depth_max  = _param->_size_depth [context];
+		  
+		  Tdepth_t   depth0     = (depth_cur>=depth_base)?(depth_cur-depth_base):((depth_cur+depth_max-depth_base));
+		  Tdepth_t   depth1     = (depth    >=depth_base)?(depth    -depth_base):((depth    +depth_max-depth_base));
+		  
+		  context_state_t state = reg_STATE [context];
+		  
+		  // miss > excep > spr/sync
+		  uint8_t    priority0  = (state == CONTEXT_STATE_KO_MISS)?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0);
+		  uint8_t    priority1  = 2;
+		  
+		  // is_valid = can modify local information
+		  //  if context_state_ok : yes
+		  //  if context_state_ko : test the depth, and the priority of envent
+		  
+		  bool       is_valid   = ((state == CONTEXT_STATE_OK) or
+					   (depth1< depth0) or
+					   ((depth1==depth0) and (priority1>priority0)));
+		  
+		  if (is_valid)
+		    {
+		      // commit
+		      Tcontrol_t take = PORT_READ(in_BRANCH_COMPLETE_TAKE [i]);
+		      reg_STATE                  [context] = CONTEXT_STATE_KO_MISS;
+		      reg_EVENT_ADDRESS          [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_SRC  [i])+1; //DELAY_SLOT
+		      reg_EVENT_ADDRESS_EPCR     [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_DEST [i]); 
+		      reg_EVENT_ADDRESS_EPCR_VAL [context] = take; // if not take : in sequence
+		    //reg_EVENT_ADDRESS_EEAR     [context]; 
+		    //reg_EVENT_ADDRESS_EEAR_VAL [context];
+		      reg_EVENT_IS_DELAY_SLOT    [context] = take;
+		      reg_EVENT_IS_DS_TAKE       [context] = take;
+		      reg_EVENT_DEPTH            [context] = depth;
+		    }
+		}
+	    }
+
+	// -------------------------------------------------------------------
+	// -----[ EVENT ]-----------------------------------------------------
+	// -------------------------------------------------------------------
+	for (uint32_t i=0; i<_param->_nb_context; i++)
+	  if (internal_EVENT_VAL [i] and PORT_READ(in_EVENT_ACK [i]))
+	    {
+	      // Write pc
+	      context_state_t state = reg_STATE [i];
+
+	      switch (state)
+		{
+		case CONTEXT_STATE_KO_EXCEP_ADDR :
+		  {
+		    reg_STATE [i] = CONTEXT_STATE_KO_EXCEP_SPR;
+		    break;
+		  }
+		case CONTEXT_STATE_KO_MISS_ADDR  :
+		case CONTEXT_STATE_KO_PSYNC_ADDR :
+		case CONTEXT_STATE_KO_CSYNC_ADDR :
+		  {
+		    reg_STATE [i] = CONTEXT_STATE_OK;
+		    break;
+		  }
+		default :
+		  {
+#ifdef DEBUG_TEST
+		    throw ERRORMORPHEO(FUNCTION,toString(_("SPR[%d], Invalid state : %s.\n"),i,toString(state).c_str()));
+#endif
+		    break;
+		  }
+		}
+	    }
+
+	// -------------------------------------------------------------------
+	// -----[ SPR ]-------------------------------------------------------
+	// -------------------------------------------------------------------
+	for (uint32_t i=0; i<_param->_nb_context; i++)
+	  if (internal_SPR_VAL [i] and PORT_READ(in_SPR_ACK [i]))
+	    {
+	      // Write spr
+#ifdef DEBUG_TEST
+	      context_state_t state = reg_STATE [i];
+	    
+	      if (state != CONTEXT_STATE_KO_EXCEP_SPR)
+		throw ERRORMORPHEO(FUNCTION,toString(_("SPR[%d], Invalid state : %s.\n"),i,toString(state).c_str()));
+#endif
+	      
+	      reg_STATE [i] = CONTEXT_STATE_OK;
+	    }
+
+	// -------------------------------------------------------------------
+	// -----[ next state ]------------------------------------------------
+	// -------------------------------------------------------------------
+	for (uint32_t i=0; i<_param->_nb_context; i++)
+	  {
+	    uint32_t x = _param->_link_context_to_decod_unit    [i];
+	    uint32_t y = _param->_link_decod_unit_to_ooo_engine [x];
+
+	    Tcounter_t inst_all = PORT_READ(in_NB_INST_COMMIT_ALL [y]) + PORT_READ(in_NB_INST_DECOD_ALL [x]);
+	    Tcounter_t inst_mem = PORT_READ(in_NB_INST_COMMIT_MEM [y]) + PORT_READ(in_NB_INST_DECOD_ALL [x]);
+
+	    context_state_t state = reg_STATE [i];
+
+	    switch (state)
+	      {
+	      case CONTEXT_STATE_OK              :
+		{
+		  // nothing, wait an event
+		  break;
+		}
+	      case CONTEXT_STATE_KO_EXCEP        :
+		{
+		  // Wait end of all instruction
+		  if (inst_all == 0)
+		    state = CONTEXT_STATE_KO_EXCEP_ADDR;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_MISS         :
+		{
+		  // Wait end of all instruction
+		  if (inst_all == 0)
+		    state = CONTEXT_STATE_KO_MISS_ADDR;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_EXCEP_ADDR   :
+		{
+		  // nothing, wait the update of internal register (pc)
+		  break;
+		}
+	      case CONTEXT_STATE_KO_EXCEP_SPR    :
+		{
+		  // nothing, wait the update of internal register (epcr, eear, sr, esr)
+		  break;
+		}
+	      case CONTEXT_STATE_KO_MISS_ADDR    :
+		{
+		  // nothing, wait the update of internal register (pc)
+		  break;
+		}
+	      case CONTEXT_STATE_KO_PSYNC        :
+		{
+		  // Wait end of all instruction
+		  if (inst_all == 0)
+// 		    state = CONTEXT_STATE_KO_PSYNC_FLUSH;
+		    state = CONTEXT_STATE_KO_PSYNC_ADDR ;
+		  break;
+		}
+// 	      case CONTEXT_STATE_KO_PSYNC_FLUSH  :
+// 		{
+// 		  // nothing, wait end of flush (ifetch)
+// 		  break;
+// 		}
+	      case CONTEXT_STATE_KO_PSYNC_ADDR   :
+		{
+		  // nothing, wait the pc write
+		  break;
+		}
+	      case CONTEXT_STATE_KO_CSYNC        :
+		{
+		  // Wait end of all instruction
+		  if (inst_all == 0)
+		    state = CONTEXT_STATE_KO_CSYNC_ADDR ;
+// 		    state = CONTEXT_STATE_KO_CSYNC_FLUSH;
+		  break;
+		}
+// 	      case CONTEXT_STATE_KO_CSYNC_FLUSH  :
+// 		{
+// 		  // nothing, wait end of flush (all internal structure)
+// 		  break;
+// 		}
+	      case CONTEXT_STATE_KO_CSYNC_ADDR   :
+		{
+		  // nothing, wait the pc write
+		  break;
+		}
+	      case CONTEXT_STATE_KO_MSYNC        :
+		{
+		  // Wait end of memory instruction
+		  if (inst_mem == 0)
+		    state = CONTEXT_STATE_KO_MSYNC_ISSUE;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_MSYNC_ISSUE  :
+		{
+		  // Wait the msync issue
+		  if (inst_mem != 0)
+		    state = CONTEXT_STATE_KO_MSYNC_EXEC;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_MSYNC_EXEC   :
+		{
+		  // Wait the end of msync
+		  if (inst_mem == 0)
+		    state = CONTEXT_STATE_OK;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_SPR          :
+		{
+		  // Wait end of all instruction
+		  if (inst_all == 0)
+		    state = CONTEXT_STATE_KO_SPR_ISSUE;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_SPR_ISSUE    :
+		{
+		  // Wait the spr_access issue
+		  if (inst_all != 0)
+		    state = CONTEXT_STATE_KO_SPR_EXEC;
+		  break;
+		}
+	      case CONTEXT_STATE_KO_SPR_EXEC     :
+		{
+		  // Wait the spr_access execution
+		  if (inst_all == 0)
+		    state = CONTEXT_STATE_OK;
+		  break;
+		}
+
+	      default :
+		{
+		  throw ERRORMORPHEO(FUNCTION,toString(_("Context[%d], Unknow state : %s.\n"),i,toString(state).c_str()));
+		}
+	      }
+	    reg_STATE [i] = state;
+	  }
+      }
+
+#if DEBUG >= DEBUG_TRACE
+    for (uint32_t i=0; i<_param->_nb_context; i++)
+      {
+	log_printf(TRACE,Context_State,FUNCTION,"Context State [%d]",i);
+	log_printf(TRACE,Context_State,FUNCTION," * reg_STATE                  : %s"  ,toString(reg_STATE [i]).c_str());
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_ADDRESS          : 0x%x",reg_EVENT_ADDRESS          [i]);
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_ADDRESS_EPCR     : 0x%x",reg_EVENT_ADDRESS_EPCR     [i]); 
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_ADDRESS_EPCR_VAL : %d"  ,reg_EVENT_ADDRESS_EPCR_VAL [i]);
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_ADDRESS_EEAR     : 0x%x",reg_EVENT_ADDRESS_EEAR     [i]); 
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_ADDRESS_EEAR_VAL : %d"  ,reg_EVENT_ADDRESS_EEAR_VAL [i]);
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_IS_DELAY_SLOT    : %d"  ,reg_EVENT_IS_DELAY_SLOT    [i]);
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_IS_DS_TAKE       : %d"  ,reg_EVENT_IS_DS_TAKE       [i]);
+	log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_DEPTH            : %d"  ,reg_EVENT_DEPTH            [i]);
+      }
+#endif
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl.cpp	(revision 83)
@@ -0,0 +1,48 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::vhdl"
+  void Context_State::vhdl (void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl_body.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl_body.cpp	(revision 83)
@@ -0,0 +1,35 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::vhdl_body"
+  void Context_State::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(Context_State,FUNCTION);
+    vhdl->set_body ("");
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl_declaration.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_vhdl_declaration.cpp	(revision 83)
@@ -0,0 +1,34 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::vhdl_declaration"
+  void Context_State::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(Context_State,FUNCTION);
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters.cpp	(revision 83)
@@ -0,0 +1,82 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::Parameters"
+  Parameters::Parameters (uint32_t   nb_context,
+			  uint32_t   nb_decod_unit,
+			  uint32_t   nb_ooo_engine,
+			  uint32_t   nb_inst_branch_complete,
+			  uint32_t * size_depth,                
+			  uint32_t   size_address,
+			  uint32_t * size_inst_decod,           
+			  uint32_t * size_inst_commit,          
+			  uint32_t * link_context_to_decod_unit,
+			  uint32_t * link_decod_unit_to_ooo_engine)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    _nb_context                    = nb_context                   ;
+    _nb_decod_unit                 = nb_decod_unit                ;
+    _nb_ooo_engine                 = nb_ooo_engine                ;
+    _nb_inst_branch_complete       = nb_inst_branch_complete      ;
+    _size_depth                    = size_depth                   ;
+    _size_address                  = size_address                 ;
+    _size_inst_decod               = size_inst_decod              ;
+    _size_inst_commit              = size_inst_commit             ;
+    _link_context_to_decod_unit    = link_context_to_decod_unit   ;
+    _link_decod_unit_to_ooo_engine = link_decod_unit_to_ooo_engine;
+    
+    _size_context_id               = log2(_nb_context);
+    _size_max_depth                = max<uint32_t>(_size_depth,_nb_context);
+
+    _have_port_context_id          = (_size_context_id>0);
+    _have_port_max_depth           = (_size_max_depth >0);
+    _have_port_depth               = new bool [_nb_context];
+    for (uint32_t i=0; i<_nb_context; i++)
+      _have_port_depth [i] = (_size_depth [i] >0);
+    
+    test();
+    log_end(Context_State,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Context_State::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Context_State,FUNCTION);
+//     test();
+//     log_end(Context_State,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::~Parameters"
+  Parameters::~Parameters () 
+  {
+    log_begin(Context_State,FUNCTION);
+    delete [] _have_port_depth;
+    log_end(Context_State,FUNCTION);
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters_msg_error.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters_msg_error.cpp	(revision 83)
@@ -0,0 +1,70 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    Parameters_test test ("Context_State");
+
+    bool _is_link_decod_unit_from_context [_nb_decod_unit];
+    for (uint32_t i=0; i<_nb_decod_unit; i++)
+      _is_link_decod_unit_from_context [i] = false;
+    for (uint32_t i=0; i<_nb_context; i++)
+      {
+	if (_link_context_to_decod_unit [i] < _nb_decod_unit)
+	  _is_link_decod_unit_from_context [_link_context_to_decod_unit[i]] = true;
+	else
+	  test.error(toString(_("The context [%d] is linked with invalid decod_unit."),i));
+      }
+
+    for (uint32_t i=0; i<_nb_decod_unit; i++)
+      if (_is_link_decod_unit_from_context [i] == false)
+	test.error(toString(_("The decod_unit [%d] have none context as source."),i));
+
+    bool _is_link_ooo_engine_from_decod_unit [_nb_ooo_engine];
+    for (uint32_t i=0; i<_nb_ooo_engine; i++)
+      _is_link_ooo_engine_from_decod_unit [i] = false;
+
+    for (uint32_t i=0; i<_nb_decod_unit; i++)
+      {
+	if (_link_decod_unit_to_ooo_engine [i] < _nb_ooo_engine)
+	  _is_link_ooo_engine_from_decod_unit [_link_decod_unit_to_ooo_engine[i]] = true;
+	else
+	  test.error(toString(_("The decod_unit [%d] is linked with invalid ooo_engine."),i));
+      }
+
+    for (uint32_t i=0; i<_nb_ooo_engine; i++)
+      if (_is_link_ooo_engine_from_decod_unit [i] == false)
+	test.error(toString(_("The ooo_engine [%d] have none decod_unit as source."),i));
+
+    log_end(Context_State,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters_print.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters_print.cpp	(revision 83)
@@ -0,0 +1,93 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace context_state {
+
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    XML xml ("context_state");
+
+    xml.balise_open("context_state");
+    xml.singleton_begin("nb_context                   "); xml.attribut("value",toString(_nb_context                   )); xml.singleton_end();
+    xml.singleton_begin("nb_decod_unit                "); xml.attribut("value",toString(_nb_decod_unit                )); xml.singleton_end();
+    xml.singleton_begin("nb_ooo_engine                "); xml.attribut("value",toString(_nb_ooo_engine                )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_branch_complete      "); xml.attribut("value",toString(_nb_inst_branch_complete      )); xml.singleton_end();
+    xml.singleton_begin("size_address                 "); xml.attribut("value",toString(_size_address                 )); xml.singleton_end();
+
+    for (uint32_t i=0;i<_nb_context; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","context");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.  singleton_begin("size_depth                   "); xml.attribut("value",toString(_size_depth                    [i])); xml.singleton_end();
+        xml.  singleton_begin("link_context_to_decod_unit   "); xml.attribut("value",toString(_link_context_to_decod_unit    [i])); xml.singleton_end();
+        xml. balise_close();
+      }
+
+    for (uint32_t i=0;i<_nb_decod_unit; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","decod_unit");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.  singleton_begin("size_inst_decod              "); xml.attribut("value",toString(_size_inst_decod              [i])); xml.singleton_end();
+        xml.  singleton_begin("link_decod_unit_to_ooo_engine"); xml.attribut("value",toString(_link_decod_unit_to_ooo_engine[i])); xml.singleton_end();
+        xml. balise_close();
+      }
+
+    for (uint32_t i=0;i<_nb_ooo_engine; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","ooo_engine");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.  singleton_begin("size_inst_commit             "); xml.attribut("value",toString(_size_inst_commit             [i])); xml.singleton_end();
+        xml. balise_close();
+      }
+    
+    xml.balise_close();
+
+    log_end(Context_State,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Context_State::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters & x)
+  {
+    log_begin(Context_State,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Context_State,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace context_state
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile	(revision 83)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libDecod_unit.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.defs	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.defs	(revision 83)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.deps	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.deps	(revision 83)
@@ -0,0 +1,52 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Decod_unit			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Decod
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.deps
+endif
+ifndef Decod_queue
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Decod_unit_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit
+
+#-----[ Library ]------------------------------------------
+
+Decod_unit_LIBRARY		= 	-lDecod_unit			\
+					$(Decod_LIBRARY)		\
+					$(Decod_queue_LIBRARY)		\
+					$(Behavioural_LIBRARY)
+
+Decod_unit_DIR_LIBRARY		=	-L$(Decod_unit_DIR)/lib		\
+					$(Decod_DIR_LIBRARY)		\
+					$(Decod_queue_DIR_LIBRARY)	\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Decod_unit_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) Decod_library;			\
+				$(MAKE) Decod_queue_library;		\
+				$(MAKE) --directory=$(Decod_unit_DIR) --makefile=Makefile;
+
+Decod_unit_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) Decod_library_clean;		\
+				$(MAKE) Decod_queue_library_clean;	\
+				$(MAKE) --directory=$(Decod_unit_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/Makefile	(revision 83)
@@ -0,0 +1,30 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Decod_unit_LIBRARY)
+
+DIR_LIBRARY			= $(Decod_unit_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Decod_unit_library
+
+library_clean			: Decod_unit_library_clean
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_min.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_min.cfg	(revision 83)
@@ -0,0 +1,11 @@
+Decod_unit
+1	1	+1	# nb_context                   
+1	1	+1	# nb_inst_fetch                [0][nb_context]
+1	1	+1	# nb_inst_decod                
+1	1	+1	# size_queue                   
+32	32	+1	# size_general_data            
+1	1	+1	# nb_branch_speculated         [0][nb_context]
+1	1	+1	# size_branch_update_prediction
+1	1	+1	# nb_context_select            
+1	1	+1	# select_priority              
+1	1	+1	# select_load_balancing        
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg	(revision 83)
@@ -0,0 +1,11 @@
+Decod_unit
+1	1	+1	# nb_context                   
+1	4	*4	# nb_inst_fetch                [0][nb_context]
+1	4	*4	# nb_inst_decod                
+4	16	*4	# size_queue                   
+32	32	+1	# size_general_data            
+1	1	*4	# nb_branch_speculated         [0][nb_context]
+0	1	+1	# size_branch_update_prediction
+1	1	+1	# nb_context_select            
+1	1	+1	# select_priority              
+1	1	+1	# select_load_balancing        
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg	(revision 83)
@@ -0,0 +1,17 @@
+Decod_unit
+4	4	+1	# nb_context                   
+4	4	*4	# nb_inst_fetch                [0][nb_context]
+2	2	*4	# nb_inst_fetch                [1][nb_context]
+1	1	*4	# nb_inst_fetch                [2][nb_context]
+8	8	*4	# nb_inst_fetch                [3][nb_context]
+4	8 	*2	# nb_inst_decod                
+16	16	*4	# size_queue                   
+32	32	+1	# size_general_data            
+1	1	*4	# nb_branch_speculated         [0][nb_context]
+2	2	*4	# nb_branch_speculated         [1][nb_context]
+1	1	*4	# nb_branch_speculated         [2][nb_context]
+4	4	*4	# nb_branch_speculated         [3][nb_context]
+2	2	+1	# size_branch_update_prediction
+1	4	*4	# nb_context_select            
+1	1	+1	# select_priority              
+1	1	+1	# select_load_balancing        
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h	(revision 83)
@@ -0,0 +1,30 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include <string>
+#include <iostream>
+#include <sys/time.h>
+
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_front_end;
+using namespace morpheo::behavioural::core::multi_front_end::front_end;
+
+using namespace morpheo::behavioural::core::multi_front_end::front_end::decod_unit;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp	(revision 83)
@@ -0,0 +1,111 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
+
+#define NB_PARAMS 8
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_context                                 (uint32_t         )\n"));
+  err (_(" * nb_inst_fetch                 [nb_context] (uint32_t         )\n"));
+  err (_(" * nb_inst_decod                              (uint32_t         )\n"));
+  err (_(" * size_queue                                 (uint32_t         )\n"));
+  err (_(" * size_general_data                          (uint32_t         )\n"));
+  err (_(" * nb_branch_speculated          [nb_context] (uint32_t         )\n"));
+  err (_(" * size_branch_update_prediction              (uint32_t         )\n"));
+  err (_(" * nb_context_select                          (uint32_t         )\n"));
+  err (_(" * select_priority                            (Tpriority_t      )\n"));
+  err (_(" * select_load_balancing                      (Tload_balancing_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t            _nb_context                   = fromString<uint32_t         >(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_context))
+    usage (argc, argv);
+
+  uint32_t          * _nb_inst_fetch                = new uint32_t [_nb_context];
+  for (uint32_t i=0; i<_nb_context; i++)
+    _nb_inst_fetch        [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t            _nb_inst_decod                = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_queue                   = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_general_data            = fromString<uint32_t         >(argv[x++]);
+  uint32_t          * _nb_branch_speculated         = new uint32_t [_nb_context];
+  for (uint32_t i=0; i<_nb_context; i++)
+    _nb_branch_speculated [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t            _size_branch_update_prediction= fromString<uint32_t         >(argv[x++]);
+  uint32_t            _nb_context_select            = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t         _select_priority              = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t   _select_load_balancing        = fromString<Tload_balancing_t>(argv[x++]);
+
+  bool             ** _instruction_implemeted = new bool * [_nb_context];
+  for (uint32_t i=0; i<_nb_context; i++)
+    {
+      _instruction_implemeted [i] = new bool [NB_INSTRUCTION];
+      
+      for (uint32_t j=0; j<NB_INSTRUCTION; j++)
+	_instruction_implemeted [i][j] = true;
+    }
+
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters
+	(_nb_context                   ,
+	 _nb_inst_fetch                ,
+	 _nb_inst_decod                ,
+	 _size_queue                   ,
+	 _size_general_data            ,
+	 _nb_branch_speculated         ,
+	 _size_branch_update_prediction,
+	 _nb_context_select            ,
+	 _select_priority              ,
+	 _select_load_balancing        ,
+	 _instruction_implemeted       ,
+	 NULL);
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+  catch (...)
+    {
+      err (_("<%s> : This test must generate a error.\n"),name.c_str());
+      _return = EXIT_FAILURE;
+    }
+  
+  delete [] _nb_inst_fetch       ;
+  delete [] _nb_branch_speculated;
+  for (uint32_t i=0; i<_nb_context; i++)
+    delete [] _instruction_implemeted [i];
+  delete [] _instruction_implemeted;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp	(revision 83)
@@ -0,0 +1,311 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (128*NB_ITERATION)
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
+#include "Common/include/Test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Decod_unit * _Decod_unit = new Decod_unit 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_IFETCH_VAL                         ," in_IFETCH_VAL                         ",Tcontrol_t         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL(out_IFETCH_ACK                         ,"out_IFETCH_ACK                         ",Tcontrol_t         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION                 ," in_IFETCH_INSTRUCTION                 ",Tinstruction_t     ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+
+  ALLOC1_SC_SIGNAL(in_IFETCH_CONTEXT_ID                   ,"in_IFETCH_CONTEXT_ID                   ",Tcontext_t         ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS                      ,"in_IFETCH_ADDRESS                      ",Tgeneral_address_t ,_param->_nb_context);
+//ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT                 ,"in_IFETCH_ADDRESS_NEXT                 ",Tgeneral_address_t ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR              ,"in_IFETCH_INST_IFETCH_PTR              ",Tinst_ifetch_ptr_t ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_STATE                 ,"in_IFETCH_BRANCH_STATE                 ",Tbranch_state_t    ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID  ,"in_IFETCH_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t  ,_param->_nb_context);
+
+  ALLOC1_SC_SIGNAL(out_DECOD_VAL                          ,"out_DECOD_VAL                          ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL( in_DECOD_ACK                          ," in_DECOD_ACK                          ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID                   ,"out_DECOD_CONTEXT_ID                   ",Tcontext_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_DEPTH                        ,"out_DECOD_DEPTH                        ",Tdepth_t           ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_TYPE                         ,"out_DECOD_TYPE                         ",Ttype_t            ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_OPERATION                    ,"out_DECOD_OPERATION                    ",Toperation_t       ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT                ,"out_DECOD_IS_DELAY_SLOT                ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS                      ,"out_DECOD_ADDRESS                      ",Tgeneral_data_t    ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT                 ,"out_DECOD_HAS_IMMEDIAT                 ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT                     ,"out_DECOD_IMMEDIAT                     ",Tgeneral_data_t    ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_READ_RA                      ,"out_DECOD_READ_RA                      ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA                   ,"out_DECOD_NUM_REG_RA                   ",Tgeneral_address_t ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_READ_RB                      ,"out_DECOD_READ_RB                      ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB                   ,"out_DECOD_NUM_REG_RB                   ",Tgeneral_address_t ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_READ_RC                      ,"out_DECOD_READ_RC                      ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC                   ,"out_DECOD_NUM_REG_RC                   ",Tspecial_address_t ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD                     ,"out_DECOD_WRITE_RD                     ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD                   ,"out_DECOD_NUM_REG_RD                   ",Tgeneral_address_t ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE                     ,"out_DECOD_WRITE_RE                     ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE                   ,"out_DECOD_NUM_REG_RE                   ",Tspecial_address_t ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE                ,"out_DECOD_EXCEPTION_USE                ",Texception_t       ,_param->_nb_inst_decod);
+
+  ALLOC1_SC_SIGNAL(out_PREDICT_VAL                        ,"out_PREDICT_VAL                        ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL( in_PREDICT_ACK                        ," in_PREDICT_ACK                        ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID                 ,"out_PREDICT_CONTEXT_ID                 ",Tcontext_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR      ,"out_PREDICT_MATCH_INST_IFETCH_PTR      ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE               ,"out_PREDICT_BRANCH_STATE               ",Tbranch_state_t    ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t  ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION           ,"out_PREDICT_BRANCH_CONDITION           ",Tbranch_condition_t,_param->_nb_inst_decod);
+//ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE         ,"out_PREDICT_BRANCH_STACK_WRITE         ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION           ,"out_PREDICT_BRANCH_DIRECTION           ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC                ,"out_PREDICT_ADDRESS_SRC                ",Tgeneral_data_t    ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST               ,"out_PREDICT_ADDRESS_DEST               ",Tgeneral_data_t    ,_param->_nb_inst_decod);
+//ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ," in_PREDICT_CAN_CONTINUE               ",Tcontrol_t         ,_param->_nb_inst_decod);
+
+  ALLOC1_SC_SIGNAL( in_DEPTH_TAIL                         ," in_DEPTH_TAIL                         ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL( in_DEPTH_NB_BRANCH                    ," in_DEPTH_NB_BRANCH                    ",Tdepth_t           ,_param->_nb_context);
+
+  ALLOC1_SC_SIGNAL(out_NB_INST_DECOD_ALL                  ,"out_NB_INST_DECOD_ALL                  ",Tcounter_t         ,_param->_nb_context);
+
+  ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE               ," in_CONTEXT_DECOD_ENABLE               ",Tcontrol_t         ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH                      ," in_CONTEXT_DEPTH                      ",Tdepth_t           ,_param->_nb_context);
+
+  ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_VAL                  ,"out_CONTEXT_EVENT_VAL                  ",Tcontrol_t         );
+  ALLOC_SC_SIGNAL(  in_CONTEXT_EVENT_ACK                  ," in_CONTEXT_EVENT_ACK                  ",Tcontrol_t         );
+  ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID           ,"out_CONTEXT_EVENT_CONTEXT_ID           ",Tcontext_t         );
+  ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_TYPE                 ,"out_CONTEXT_EVENT_TYPE                 ",Tevent_type_t      );
+  ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT        ,"out_CONTEXT_EVENT_IS_DELAY_SLOT        ",Tcontrol_t         );
+  ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS              ,"out_CONTEXT_EVENT_ADDRESS              ",Tgeneral_data_t    );
+  ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR         ,"out_CONTEXT_EVENT_ADDRESS_EPCR         ",Tgeneral_data_t    );
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Decod_unit.\n"),name.c_str());
+
+  (*(_Decod_unit->in_CLOCK))        (*(in_CLOCK));
+  (*(_Decod_unit->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_VAL                         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Decod_unit,out_IFETCH_ACK                         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_INSTRUCTION                 ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_CONTEXT_ID                   ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS                      ,_param->_nb_context);
+//INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS_NEXT                 ,_param->_nb_context);
+  if (_param->_have_port_inst_ifetch_ptr)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_INST_IFETCH_PTR              ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_STATE                 ,_param->_nb_context);
+  if (_param->_have_port_branch_update_prediction_id)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_UPDATE_PREDICTION_ID  ,_param->_nb_context);
+
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_VAL                          ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_DECOD_ACK                          ,_param->_nb_inst_decod);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_CONTEXT_ID                   ,_param->_nb_inst_decod);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_DEPTH                        ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_TYPE                         ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_OPERATION                    ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IS_DELAY_SLOT                ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_ADDRESS                      ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_HAS_IMMEDIAT                 ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IMMEDIAT                     ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RA                      ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RA                   ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RB                      ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RB                   ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RC                      ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RC                   ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RD                     ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RD                   ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RE                     ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RE                   ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_EXCEPTION_USE                ,_param->_nb_inst_decod);
+
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_VAL                        ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_ACK                        ,_param->_nb_inst_decod);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_CONTEXT_ID                 ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_MATCH_INST_IFETCH_PTR      ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STATE               ,_param->_nb_inst_decod);
+  if (_param->_have_port_branch_update_prediction_id)
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_CONDITION           ,_param->_nb_inst_decod);
+//INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STACK_WRITE         ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_DIRECTION           ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_SRC                ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_DEST               ,_param->_nb_inst_decod);
+//INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
+
+  if (_param->_have_port_depth)
+    {
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_TAIL                         ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_NB_BRANCH                    ,_param->_nb_context);
+    }
+
+  INSTANCE1_SC_SIGNAL(_Decod_unit,out_NB_INST_DECOD_ALL                  ,_param->_nb_context);
+
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DECOD_ENABLE               ,_param->_nb_context);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DEPTH                      ,_param->_nb_context);
+
+  INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_VAL                  );
+  INSTANCE_SC_SIGNAL( _Decod_unit, in_CONTEXT_EVENT_ACK                  );
+  if (_param->_have_port_context_id)
+  INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_CONTEXT_ID           );
+  INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_TYPE                 );
+  INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_IS_DELAY_SLOT        );
+  INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS              );
+  INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS_EPCR         );
+
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_IFETCH_VAL                         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  DELETE2_SC_SIGNAL(out_IFETCH_ACK                         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  DELETE2_SC_SIGNAL( in_IFETCH_INSTRUCTION                 ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+  DELETE1_SC_SIGNAL(in_IFETCH_CONTEXT_ID                   ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS                      ,_param->_nb_context);
+//DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT                 ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR              ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_STATE                 ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID  ,_param->_nb_context);
+
+  DELETE1_SC_SIGNAL(out_DECOD_VAL                          ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL( in_DECOD_ACK                          ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_CONTEXT_ID                   ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_DEPTH                        ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_TYPE                         ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_OPERATION                    ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT                ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_ADDRESS                      ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT                 ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_IMMEDIAT                     ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_READ_RA                      ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RA                   ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_READ_RB                      ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RB                   ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_READ_RC                      ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RC                   ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_WRITE_RD                     ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RD                   ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_WRITE_RE                     ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RE                   ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_DECOD_EXCEPTION_USE                ,_param->_nb_inst_decod);
+
+  DELETE1_SC_SIGNAL(out_PREDICT_VAL                        ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL( in_PREDICT_ACK                        ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_CONTEXT_ID                 ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR      ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE               ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION           ,_param->_nb_inst_decod);
+//DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE         ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION           ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC                ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST               ,_param->_nb_inst_decod);
+//DELETE1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
+
+  DELETE1_SC_SIGNAL( in_DEPTH_TAIL                         ,_param->_nb_context);
+  DELETE1_SC_SIGNAL( in_DEPTH_NB_BRANCH                    ,_param->_nb_context);
+
+  DELETE1_SC_SIGNAL(out_NB_INST_DECOD_ALL                  ,_param->_nb_context);
+
+  DELETE1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE               ,_param->_nb_context);
+  DELETE1_SC_SIGNAL( in_CONTEXT_DEPTH                      ,_param->_nb_context);
+
+  DELETE_SC_SIGNAL( out_CONTEXT_EVENT_VAL                  );
+  DELETE_SC_SIGNAL(  in_CONTEXT_EVENT_ACK                  );
+  DELETE_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID           );
+  DELETE_SC_SIGNAL( out_CONTEXT_EVENT_TYPE                 );
+  DELETE_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT        );
+  DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS              );
+  DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR         );
+
+    }
+#endif
+
+  delete _Decod_unit;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/Decod_unit.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/Decod_unit.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/Decod_unit.tex	(revision 83)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/Makefile	(revision 83)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/sty/header.sty	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/sty/header.sty	(revision 83)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Decod_unit}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/01_introduction.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/01_introduction.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/02_features.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/02_features.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/03_description.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/03_description.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/04_pinout.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/04_pinout.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/05_parameters.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/05_parameters.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/06_performance.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/06_performance.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/07_details.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/07_details.tex	(revision 83)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/08_history.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/08_history.tex	(revision 83)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/root.tex	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/doc/tex/root.tex	(revision 83)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h	(revision 83)
@@ -0,0 +1,201 @@
+#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_Decod_unit_h
+#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_Decod_unit_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h"
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h"
+#include "Behavioural/include/Types.h"
+
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+  class Decod_unit 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "ifetch_unit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         ) ***  in_IFETCH_VAL                         ;//[nb_context][nb_inst_fetch]
+  public    : SC_OUT(Tcontrol_t         ) *** out_IFETCH_ACK                         ;//[nb_context][nb_inst_fetch]
+  public    : SC_IN (Tinstruction_t     ) ***  in_IFETCH_INSTRUCTION                 ;//[nb_context][nb_inst_fetch]
+  public    : SC_IN (Tcontext_t         )  **  in_IFETCH_CONTEXT_ID                  ;//[nb_context]
+  public    : SC_IN (Tgeneral_address_t )  **  in_IFETCH_ADDRESS                     ;//[nb_context]
+//public    : SC_IN (Tgeneral_address_t )  **  in_IFETCH_ADDRESS_NEXT                ;//[nb_context]
+  public    : SC_IN (Tinst_ifetch_ptr_t )  **  in_IFETCH_INST_IFETCH_PTR             ;//[nb_context]
+  public    : SC_IN (Tbranch_state_t    )  **  in_IFETCH_BRANCH_STATE                ;//[nb_context]
+  public    : SC_IN (Tprediction_ptr_t  )  **  in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context]
+										     
+    // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	     
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_VAL                          ;//[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_ACK                          ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontext_t         )  ** out_DECOD_CONTEXT_ID                   ;//[nb_inst_decod]
+  public    : SC_OUT(Tdepth_t           )  ** out_DECOD_DEPTH                        ;//[nb_inst_decod]
+  public    : SC_OUT(Ttype_t            )  ** out_DECOD_TYPE                         ;//[nb_inst_decod]
+  public    : SC_OUT(Toperation_t       )  ** out_DECOD_OPERATION                    ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_IS_DELAY_SLOT                ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_data_t    )  ** out_DECOD_ADDRESS                      ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_HAS_IMMEDIAT                 ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_data_t    )  ** out_DECOD_IMMEDIAT                     ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_READ_RA                      ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_address_t )  ** out_DECOD_NUM_REG_RA                   ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_READ_RB                      ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_address_t )  ** out_DECOD_NUM_REG_RB                   ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_READ_RC                      ;//[nb_inst_decod]
+  public    : SC_OUT(Tspecial_address_t )  ** out_DECOD_NUM_REG_RC                   ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_WRITE_RD                     ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_address_t )  ** out_DECOD_NUM_REG_RD                   ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_WRITE_RE                     ;//[nb_inst_decod]
+  public    : SC_OUT(Tspecial_address_t )  ** out_DECOD_NUM_REG_RE                   ;//[nb_inst_decod]
+  public    : SC_OUT(Texception_t       )  ** out_DECOD_EXCEPTION_USE                ;//[nb_inst_decod]
+
+    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_VAL                        ;//[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_ACK                        ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontext_t         )  ** out_PREDICT_CONTEXT_ID                 ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_MATCH_INST_IFETCH_PTR      ;//[nb_inst_decod]
+  public    : SC_OUT(Tbranch_state_t    )  ** out_PREDICT_BRANCH_STATE               ;//[nb_inst_decod]
+  public    : SC_OUT(Tprediction_ptr_t  )  ** out_PREDICT_BRANCH_UPDATE_PREDICTION_ID;//[nb_inst_decod]
+  public    : SC_OUT(Tbranch_condition_t)  ** out_PREDICT_BRANCH_CONDITION           ;//[nb_inst_decod]
+//public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_BRANCH_STACK_WRITE         ;//[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_BRANCH_DIRECTION           ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_data_t    )  ** out_PREDICT_ADDRESS_SRC                ;//[nb_inst_decod]
+  public    : SC_OUT(Tgeneral_data_t    )  ** out_PREDICT_ADDRESS_DEST               ;//[nb_inst_decod]
+//public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_CAN_CONTINUE               ;//[nb_inst_decod]
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tdepth_t           )  **  in_DEPTH_TAIL              ;//[nb_context]
+  public    : SC_IN (Tdepth_t           )  **  in_DEPTH_NB_BRANCH         ;//[nb_context]
+
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcounter_t         )  ** out_NB_INST_DECOD_ALL       ;//[nb_context]
+
+    // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         )  **  in_CONTEXT_DECOD_ENABLE               ;//[nb_context]
+  public    : SC_IN (Tdepth_t           )  **  in_CONTEXT_DEPTH                      ;//[nb_context]
+										     
+    // ~~~~~[ Interface : "context_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	     
+  public    : SC_OUT(Tcontrol_t         )   * out_CONTEXT_EVENT_VAL                  ;
+  public    : SC_IN (Tcontrol_t         )   *  in_CONTEXT_EVENT_ACK                  ;
+  public    : SC_OUT(Tcontext_t         )   * out_CONTEXT_EVENT_CONTEXT_ID           ;
+  public    : SC_OUT(Tevent_type_t      )   * out_CONTEXT_EVENT_TYPE                 ;
+  public    : SC_OUT(Tcontrol_t         )   * out_CONTEXT_EVENT_IS_DELAY_SLOT        ;
+  public    : SC_OUT(Tgeneral_data_t    )   * out_CONTEXT_EVENT_ADDRESS              ;
+  public    : SC_OUT(Tgeneral_data_t    )   * out_CONTEXT_EVENT_ADDRESS_EPCR         ;
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  public : morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod      ::Decod       * _component_decod;
+  public : morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue * _component_decod_queue;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Decod_unit);
+#endif
+  public  :          Decod_unit              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Decod_unit             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  public  : void        transition                (void);
+# endif					       
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h	(revision 83)
@@ -0,0 +1,87 @@
+#ifndef morpheo_behavioural_core_multi_front_end_front_end_decod_unit_Parameters_h
+#define morpheo_behavioural_core_multi_front_end_front_end_decod_unit_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Parameters.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h"
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t            _nb_context                   ;
+  public : uint32_t          * _nb_inst_fetch                ; //[nb_context]
+  public : uint32_t            _nb_inst_decod                ;
+  public : uint32_t            _size_queue                   ;
+  public : uint32_t            _size_general_data            ;
+  public : uint32_t          * _nb_branch_speculated         ; //[nb_context]
+  public : uint32_t            _size_branch_update_prediction;
+  public : uint32_t            _nb_context_select            ;
+  public : Tpriority_t         _select_priority              ;
+  public : Tload_balancing_t   _select_load_balancing        ;
+  public : bool             ** _instruction_implemeted       ; //[nb_context][nb_instruction]
+  public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t);
+
+  public : uint32_t            _size_nb_inst_decod                   ;
+  public : uint32_t            _max_nb_inst_fetch                    ;
+
+  public : uint32_t            _size_context_id                      ;
+  public : uint32_t            _size_depth                           ;
+  public : uint32_t            _size_inst_ifetch_ptr                 ;
+
+  public : bool                _have_port_context_id                 ;
+  public : bool                _have_port_depth                      ;
+  public : bool                _have_port_branch_update_prediction_id;
+  public : bool                _have_port_inst_ifetch_ptr            ;
+
+  public : morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod      ::Parameters * _param_decod;
+  public : morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Parameters * _param_decod_queue;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t            nb_context                   ,
+			uint32_t          * nb_inst_fetch                ,
+			uint32_t            nb_inst_decod                ,
+			uint32_t            size_queue                   ,
+			uint32_t            size_general_data            ,
+			uint32_t          * nb_branch_speculated         ,
+			uint32_t            size_branch_update_prediction,
+			uint32_t            nb_context_select            ,
+			Tpriority_t         select_priority              ,
+			Tload_balancing_t   select_load_balancing        ,
+			bool             ** instruction_implemeted       ,
+			morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t));
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters & x);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit.cpp	(revision 83)
@@ -0,0 +1,111 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::Decod_unit"
+  Decod_unit::Decod_unit 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    usage_environment(_usage);
+
+    log_printf(INFO,Decod_unit,FUNCTION,_("Allocation"));
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Decod_unit,FUNCTION,_("Allocation of statistics"));
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Decod_unit,FUNCTION,_("Generate the vhdl"));
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	log_printf(INFO,Decod_unit,FUNCTION,_("Method - transition"));
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_end(Decod_unit,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::~Decod_unit"
+  Decod_unit::~Decod_unit (void)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Decod_unit,FUNCTION,_("Deallocation"));
+    deallocation ();
+
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp	(revision 83)
@@ -0,0 +1,538 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::allocation"
+  void Decod_unit::allocation 
+  (
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+   void
+#endif
+   )
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Decod_unit"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+    
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 "Generalist interface"
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "ifetch" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("ifetch", IN, WEST, "Instruction's bundle", _param->_nb_context, _param->_nb_inst_fetch[alloc_interface_it1]);
+
+      
+      _ALLOC2_VALACK_IN ( in_IFETCH_VAL        ,VAL, _param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+      _ALLOC2_VALACK_OUT(out_IFETCH_ACK        ,ACK, _param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+      _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
+    }
+    {
+      ALLOC1_INTERFACE("ifetch", IN, WEST, "Instruction's bundle", _param->_nb_context);
+      
+      ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID                 ,"context_id"                 ,Tcontext_t         ,_param->_size_context_id              );
+      ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS                    ,"address"                    ,Tgeneral_address_t ,_param->_size_general_data            );
+//    ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT               ,"address_next"               ,Tgeneral_address_t ,_param->_size_general_data            );
+      ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr         );
+      ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t    ,_param->_size_branch_state            );
+      ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t  ,_param->_size_branch_update_prediction);
+    }
+
+    // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	     
+    {
+      ALLOC1_INTERFACE("decod", OUT, EAST, "Instructiont decoded", _param->_nb_inst_decod);
+
+      ALLOC1_VALACK_OUT(out_DECOD_VAL          ,VAL);
+      ALLOC1_VALACK_IN ( in_DECOD_ACK          ,ACK);
+      ALLOC1_SIGNAL_OUT(out_DECOD_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id            );
+      ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH        ,"depth"        ,Tdepth_t          ,_param->_size_depth                 );
+      ALLOC1_SIGNAL_OUT(out_DECOD_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type                  );
+      ALLOC1_SIGNAL_OUT(out_DECOD_OPERATION    ,"operation"    ,Toperation_t      ,_param->_size_operation             );
+      ALLOC1_SIGNAL_OUT(out_DECOD_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS      ,"address"      ,Tgeneral_data_t   ,_param->_size_general_data          );
+      ALLOC1_SIGNAL_OUT(out_DECOD_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_IMMEDIAT     ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          );
+      ALLOC1_SIGNAL_OUT(out_DECOD_READ_RA      ,"read_ra"      ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RA   ,"num_reg_ra"   ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_DECOD_READ_RB      ,"read_rb"      ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RB   ,"num_reg_rb"   ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_DECOD_READ_RC      ,"read_rc"      ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RC   ,"num_reg_rc"   ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RD     ,"write_rd"     ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RD   ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RE     ,"write_re"     ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RE   ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION_USE,"exception_use",Texception_t      ,_param->_size_exception_use         );
+    }
+
+    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("predict",OUT,NORTH,"Decod a branch -> inform the branch predictor.",_param->_nb_inst_decod);
+
+      ALLOC1_VALACK_OUT(out_PREDICT_VAL                        ,VAL);
+      ALLOC1_VALACK_IN ( in_PREDICT_ACK                        ,ACK);
+      ALLOC1_SIGNAL_OUT(out_PREDICT_CONTEXT_ID                 ,"context_id"                 ,Tcontext_t         ,_param->_size_context_id              );
+      ALLOC1_SIGNAL_OUT(out_PREDICT_MATCH_INST_IFETCH_PTR      ,"match_inst_ifetch_ptr"      ,Tcontrol_t         ,1                                     );
+      ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t    ,_param->_size_branch_state            );
+      ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t  ,_param->_size_branch_update_prediction);
+      ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_CONDITION           ,"branch_condition"           ,Tbranch_condition_t,_param->_size_branch_condition        );
+//    ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STACK_WRITE         ,"branch_stack_write"         ,Tcontrol_t         ,1                                     );
+      ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_DIRECTION           ,"branch_direction"           ,Tcontrol_t         ,1                                     );
+      ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC                ,"address_src"                ,Tgeneral_data_t    ,_param->_size_general_data            );
+      ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST               ,"address_dest"               ,Tgeneral_data_t    ,_param->_size_general_data            );
+//    ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE               ,"can_continue"               ,Tcontrol_t         ,1                                     );
+    }
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~            
+    {
+      ALLOC1_INTERFACE("depth",IN ,NORTH,"Depth", _param->_nb_context);
+
+      ALLOC1_SIGNAL_IN ( in_DEPTH_TAIL     ,"tail"     ,Tdepth_t           ,_param->_size_depth  );
+      if (_param->_have_port_depth)
+      ALLOC1_SIGNAL_IN ( in_DEPTH_NB_BRANCH,"nb_branch",Tdepth_t           ,_param->_size_depth+1);
+    }
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~            
+    {
+      ALLOC1_INTERFACE("nb_inst",OUT,NORTH,"Instruction's number", _param->_nb_context);
+
+      ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL  ,"decod_all"   ,Tcontext_t         ,_param->_size_nb_inst_decod+1);
+    }
+    
+    // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("context", IN, NORTH, "context's information", _param->_nb_context);
+
+      ALLOC1_SIGNAL_IN (in_CONTEXT_DECOD_ENABLE,"decod_enable",Tcontrol_t,1);
+      ALLOC1_SIGNAL_IN (in_CONTEXT_DEPTH       ,"depth"       ,Tdepth_t  ,_param->_size_depth);
+    }
+
+    // ~~~~~[ Interface : "context_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	     
+    {
+      ALLOC_INTERFACE("context_event", OUT, NORTH, "context's evenement");
+
+      ALLOC_VALACK_OUT(out_CONTEXT_EVENT_VAL          ,VAL);
+      ALLOC_VALACK_IN ( in_CONTEXT_EVENT_ACK          ,ACK);
+      ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id  );
+      ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_TYPE         ,"type"         ,Tevent_type_t  ,_param->_size_event_type  );
+      ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t     ,1                         );
+      ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS      ,"address"      ,Tgeneral_data_t,_param->_size_general_data);
+      ALLOC_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS_EPCR ,"address_epcr" ,Tgeneral_data_t,_param->_size_general_data);
+    }
+    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    std::string src,dest;
+    
+    {
+      src = _name+"_decod";
+      log_printf(INFO,Prediction_unit,FUNCTION,_("Create   : %s"),src.c_str());
+      
+      _component_decod = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Decod
+        (src.c_str()
+#ifdef STATISTICS
+         ,param_statistics
+#endif
+         ,_param->_param_decod
+         ,_usage);
+      
+      _component->set_component (_component_decod->_component
+#ifdef POSITION
+                                 , 50, 50, 10, 10
+#endif
+                                 );
+    }
+    
+    {
+      src = _name+"_decod_queue";
+      log_printf(INFO,Prediction_unit,FUNCTION,_("Create   : %s"),src.c_str());
+      
+      _component_decod_queue = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue
+        (src.c_str()
+#ifdef STATISTICS
+         ,param_statistics
+#endif
+         ,_param->_param_decod_queue
+         ,_usage);
+      
+      _component->set_component (_component_decod_queue->_component
+#ifdef POSITION
+                                 , 50, 50, 10, 10
+#endif
+                                 );
+    }
+    
+    // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ===================================================================
+    // =====[ decod ]=====================================================
+    // ===================================================================
+    {
+      src = _name+"_decod";
+      log_printf(INFO,Prediction_unit,FUNCTION,_("Instance : %s"),src.c_str());
+           
+      {
+        dest = _name;
+#ifdef POSITION
+        _component->interface_map (src ,"",
+                                   dest,"");
+#endif
+        PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+        PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  dest = _name;
+	
+	  for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++)
+	    {
+#ifdef POSITION
+	      _component->interface_map (src ,"ifetch_"+toString(i)+"_"+toString(j),
+					 dest,"ifetch_"+toString(i)+"_"+toString(j));
+#endif
+	      
+	      PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_VAL"        ,
+		                  dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_VAL"        );
+	      PORT_MAP(_component,src ,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_ACK"        ,
+		                  dest,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_ACK"        );
+	      PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION",
+		                  dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION");
+	    }
+	  
+#ifdef POSITION
+	  _component->interface_map (src ,"ifetch_"+toString(i),
+				     dest,"ifetch_"+toString(i));
+#endif
+	  
+	      
+	  if (_param->_have_port_context_id)
+          PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_CONTEXT_ID"                 ,
+	  	              dest, "in_IFETCH_"+toString(i)+"_CONTEXT_ID"                 );
+          PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS"                    ,
+	  	              dest, "in_IFETCH_"+toString(i)+"_ADDRESS"                    );
+//        PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT"               ,
+// 	  	              dest, "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT"               );
+	  if (_param->_have_port_inst_ifetch_ptr)
+          PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR"            ,
+	  	              dest, "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR"            );
+          PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_STATE"               ,
+	  	              dest, "in_IFETCH_"+toString(i)+"_BRANCH_STATE"               );
+          if (_param->_have_port_branch_update_prediction_id)
+	  PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID",
+	    	              dest, "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID");
+	}
+	
+      for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+	{
+	  dest = _name+"_decod_queue";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"decod_"   +toString(i),
+				     dest,"decod_in_"+toString(i));
+#endif
+
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_VAL"          ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_VAL"          );
+	  COMPONENT_MAP(_component,src , "in_DECOD_"   +toString(i)+"_ACK"          ,
+			           dest,"out_DECOD_IN_"+toString(i)+"_ACK"          );
+	  if (_param->_have_port_context_id)
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_CONTEXT_ID"   ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_CONTEXT_ID"   );
+	  if (_param->_have_port_depth)
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_DEPTH"        ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_DEPTH"        );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_TYPE"         ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_TYPE"         );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_OPERATION"    ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_OPERATION"    );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_IS_DELAY_SLOT",
+			           dest, "in_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT");
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_ADDRESS"      ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_ADDRESS"      );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_HAS_IMMEDIAT" ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT" );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_IMMEDIAT"     ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_IMMEDIAT"     );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_READ_RA"      ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_READ_RA"      );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_NUM_REG_RA"   ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RA"   );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_READ_RB"      ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_READ_RB"      );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_NUM_REG_RB"   ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RB"   );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_READ_RC"      ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_READ_RC"      );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_NUM_REG_RC"   ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RC"   );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_WRITE_RD"     ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_WRITE_RD"     );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_NUM_REG_RD"   ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RD"   );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_WRITE_RE"     ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_WRITE_RE"     );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_NUM_REG_RE"   ,
+			           dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RE"   );
+	  COMPONENT_MAP(_component,src ,"out_DECOD_"   +toString(i)+"_EXCEPTION_USE",
+			           dest, "in_DECOD_IN_"+toString(i)+"_EXCEPTION_USE");
+	}
+
+      for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"predict"+toString(i),
+				     dest,"predict"+toString(i));
+#endif
+
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VAL"                        ,
+		              dest,"out_PREDICT_"+toString(i)+"_VAL"                        );
+          PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_ACK"                        ,
+		              dest, "in_PREDICT_"+toString(i)+"_ACK"                        );
+	  if (_param->_have_port_context_id)
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_CONTEXT_ID"                 ,
+		              dest,"out_PREDICT_"+toString(i)+"_CONTEXT_ID"                 );
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR"      ,
+		              dest,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR"      );
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_STATE"               ,
+		              dest,"out_PREDICT_"+toString(i)+"_BRANCH_STATE"               );
+          if (_param->_have_port_branch_update_prediction_id)
+	  PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID",
+		              dest,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID");
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION"           ,
+		              dest,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION"           );
+//        PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_STACK_WRITE"         ,
+// 		              dest,"out_PREDICT_"+toString(i)+"_BRANCH_STACK_WRITE"         );
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION"           ,
+		              dest,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION"           );
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC"                ,
+		              dest,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC"                );
+          PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST"               ,
+		              dest,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST"               );
+//        PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_CAN_CONTINUE"               ,
+// 		              dest, "in_PREDICT_"+toString(i)+"_CAN_CONTINUE"               );
+	}
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"context"+toString(i),
+				     dest,"context"+toString(i));
+#endif
+	  
+          PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DECOD_ENABLE",
+		              dest, "in_CONTEXT_"+toString(i)+"_DECOD_ENABLE");
+          if (_param->_have_port_depth)
+	  PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DEPTH"       ,
+		              dest, "in_CONTEXT_"+toString(i)+"_DEPTH"       );
+	}
+
+      {
+	dest = _name;
+	
+#ifdef POSITION
+	_component->interface_map (src ,"context_event",
+				   dest,"context_event");
+#endif
+
+	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_VAL"          ,
+		            dest,"out_CONTEXT_EVENT_VAL"          );
+	PORT_MAP(_component,src , "in_CONTEXT_EVENT_ACK"          ,
+		            dest, "in_CONTEXT_EVENT_ACK"          );
+	if (_param->_have_port_context_id)
+	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_CONTEXT_ID"   ,
+		            dest,"out_CONTEXT_EVENT_CONTEXT_ID"   );
+	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_TYPE"         ,
+		            dest,"out_CONTEXT_EVENT_TYPE"         );
+	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_IS_DELAY_SLOT",
+		            dest,"out_CONTEXT_EVENT_IS_DELAY_SLOT");
+	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_ADDRESS"      ,
+		            dest,"out_CONTEXT_EVENT_ADDRESS"      );
+	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_ADDRESS_EPCR" ,
+		            dest,"out_CONTEXT_EVENT_ADDRESS_EPCR" );
+
+      }
+    }
+
+    // ===================================================================
+    // =====[ decod_queue ]===============================================
+    // ===================================================================
+    {
+      src = _name+"_decod_queue";
+      log_printf(INFO,Prediction_unit,FUNCTION,_("Instance : %s"),src.c_str());
+           
+      {
+        dest = _name;
+#ifdef POSITION
+        _component->interface_map (src ,"",
+                                   dest,"");
+#endif
+        PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+        PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // in_DECOD_IN_VAL            - component decod
+      //out_DECOD_IN_ACK            - component decod
+      // in_DECOD_IN_CONTEXT_ID     - component decod
+      // in_DECOD_IN_DEPTH          - component decod
+      // in_DECOD_IN_TYPE           - component decod
+      // in_DECOD_IN_OPERATION      - component decod
+      // in_DECOD_IN_IS_DELAY_SLOT  - component decod
+      // in_DECOD_IN_ADDRESS        - component decod
+      // in_DECOD_IN_HAS_IMMEDIAT   - component decod
+      // in_DECOD_IN_IMMEDIAT       - component decod
+      // in_DECOD_IN_READ_RA        - component decod
+      // in_DECOD_IN_NUM_REG_RA     - component decod
+      // in_DECOD_IN_READ_RB        - component decod
+      // in_DECOD_IN_NUM_REG_RB     - component decod
+      // in_DECOD_IN_READ_RC        - component decod
+      // in_DECOD_IN_NUM_REG_RC     - component decod
+      // in_DECOD_IN_WRITE_RD       - component decod
+      // in_DECOD_IN_NUM_REG_RD     - component decod
+      // in_DECOD_IN_WRITE_RE       - component decod
+      // in_DECOD_IN_NUM_REG_RE     - component decod
+      // in_DECOD_IN_EXCEPTION_USE  - component decod
+
+      for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"decod_out_"+toString(i),
+				     dest,"decod"     +toString(i));
+#endif
+
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_VAL"          ,
+		              dest,"out_DECOD_"    +toString(i)+"_VAL"          );
+	  PORT_MAP(_component,src , "in_DECOD_OUT_"+toString(i)+"_ACK"          ,
+		              dest, "in_DECOD_"    +toString(i)+"_ACK"          );
+	  if (_param->_have_port_context_id)
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_CONTEXT_ID"   ,
+		              dest,"out_DECOD_"    +toString(i)+"_CONTEXT_ID"   );
+	  if (_param->_have_port_depth)
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_DEPTH"        ,
+		              dest,"out_DECOD_"    +toString(i)+"_DEPTH"        );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_TYPE"         ,
+		              dest,"out_DECOD_"    +toString(i)+"_TYPE"         );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_OPERATION"    ,
+		              dest,"out_DECOD_"    +toString(i)+"_OPERATION"    );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT",
+		              dest,"out_DECOD_"    +toString(i)+"_IS_DELAY_SLOT");
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_ADDRESS"      ,
+		              dest,"out_DECOD_"    +toString(i)+"_ADDRESS"      );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT" ,
+		              dest,"out_DECOD_"    +toString(i)+"_HAS_IMMEDIAT" );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IMMEDIAT"     ,
+		              dest,"out_DECOD_"    +toString(i)+"_IMMEDIAT"     );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RA"      ,
+		              dest,"out_DECOD_"    +toString(i)+"_READ_RA"      );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RA"   ,
+		              dest,"out_DECOD_"    +toString(i)+"_NUM_REG_RA"   );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RB"      ,
+		              dest,"out_DECOD_"    +toString(i)+"_READ_RB"      );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RB"   ,
+		              dest,"out_DECOD_"    +toString(i)+"_NUM_REG_RB"   );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RC"      ,
+		              dest,"out_DECOD_"    +toString(i)+"_READ_RC"      );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RC"   ,
+		              dest,"out_DECOD_"    +toString(i)+"_NUM_REG_RC"   );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_WRITE_RD"     ,
+		              dest,"out_DECOD_"    +toString(i)+"_WRITE_RD"     );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RD"   ,
+		              dest,"out_DECOD_"    +toString(i)+"_NUM_REG_RD"   );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_WRITE_RE"     ,
+		              dest,"out_DECOD_"    +toString(i)+"_WRITE_RE"     );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RE"   ,
+		              dest,"out_DECOD_"    +toString(i)+"_NUM_REG_RE"   );
+	  PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE",
+		              dest,"out_DECOD_"    +toString(i)+"_EXCEPTION_USE");
+	}
+
+      if (_param->_have_port_depth)
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"depth"+toString(i),
+				     dest,"depth"+toString(i));
+#endif
+
+	  PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_TAIL"     ,
+		              dest, "in_DEPTH_"+toString(i)+"_TAIL"     );
+	  PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_NB_BRANCH",
+		              dest, "in_DEPTH_"+toString(i)+"_NB_BRANCH");
+	}
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"nb_inst"+toString(i),
+				     dest,"nb_inst"+toString(i));
+#endif
+
+	  PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+      "_ALL",
+		              dest,"out_NB_INST_"+toString(i)+"_DECOD_ALL");
+	}
+    }
+    // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
+     if (DEBUG_Decod_unit == true)
+       _component->test_map();
+
+#ifdef POSITION
+     if (usage_is_set(_usage,USE_POSITION))
+       _component->generate_file();
+#endif
+
+     log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp	(revision 83)
@@ -0,0 +1,108 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::deallocation"
+  void Decod_unit::deallocation (void)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+	DELETE2_SIGNAL( in_IFETCH_VAL                         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1],1);
+        DELETE2_SIGNAL(out_IFETCH_ACK                         ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1],1);
+        DELETE2_SIGNAL( in_IFETCH_INSTRUCTION                 ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1],_param->_size_instruction);
+        
+        DELETE1_SIGNAL(in_IFETCH_CONTEXT_ID                   ,_param->_nb_context,_param->_size_context_id              );
+        DELETE1_SIGNAL(in_IFETCH_ADDRESS                      ,_param->_nb_context,_param->_size_general_data            );
+//      DELETE1_SIGNAL(in_IFETCH_ADDRESS_NEXT                 ,_param->_nb_context,_param->_size_general_data            );
+        DELETE1_SIGNAL(in_IFETCH_INST_IFETCH_PTR              ,_param->_nb_context,_param->_size_inst_ifetch_ptr         );
+        DELETE1_SIGNAL(in_IFETCH_BRANCH_STATE                 ,_param->_nb_context,_param->_size_branch_state            );
+        DELETE1_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID  ,_param->_nb_context,_param->_size_branch_update_prediction);
+        
+        DELETE1_SIGNAL(out_DECOD_VAL                          ,_param->_nb_inst_decod,1);
+        DELETE1_SIGNAL( in_DECOD_ACK                          ,_param->_nb_inst_decod,1);
+        DELETE1_SIGNAL(out_DECOD_CONTEXT_ID                   ,_param->_nb_inst_decod,_param->_size_context_id            );
+        DELETE1_SIGNAL(out_DECOD_DEPTH                        ,_param->_nb_inst_decod,_param->_size_depth                 );
+        DELETE1_SIGNAL(out_DECOD_TYPE                         ,_param->_nb_inst_decod,_param->_size_type                  );
+        DELETE1_SIGNAL(out_DECOD_OPERATION                    ,_param->_nb_inst_decod,_param->_size_operation             );
+        DELETE1_SIGNAL(out_DECOD_IS_DELAY_SLOT                ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_ADDRESS                      ,_param->_nb_inst_decod,_param->_size_general_data          );
+        DELETE1_SIGNAL(out_DECOD_HAS_IMMEDIAT                 ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_IMMEDIAT                     ,_param->_nb_inst_decod,_param->_size_general_data          );
+        DELETE1_SIGNAL(out_DECOD_READ_RA                      ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_NUM_REG_RA                   ,_param->_nb_inst_decod,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_DECOD_READ_RB                      ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_NUM_REG_RB                   ,_param->_nb_inst_decod,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_DECOD_READ_RC                      ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_NUM_REG_RC                   ,_param->_nb_inst_decod,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_DECOD_WRITE_RD                     ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_NUM_REG_RD                   ,_param->_nb_inst_decod,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_DECOD_WRITE_RE                     ,_param->_nb_inst_decod,1                                   );
+        DELETE1_SIGNAL(out_DECOD_NUM_REG_RE                   ,_param->_nb_inst_decod,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_DECOD_EXCEPTION_USE                ,_param->_nb_inst_decod,_param->_size_exception_use         );
+        
+        DELETE1_SIGNAL(out_PREDICT_VAL                        ,_param->_nb_inst_decod,1);
+        DELETE1_SIGNAL( in_PREDICT_ACK                        ,_param->_nb_inst_decod,1);
+        DELETE1_SIGNAL(out_PREDICT_CONTEXT_ID                 ,_param->_nb_inst_decod,_param->_size_context_id              );
+        DELETE1_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR      ,_param->_nb_inst_decod,1                                     );
+        DELETE1_SIGNAL(out_PREDICT_BRANCH_STATE               ,_param->_nb_inst_decod,_param->_size_branch_state            );
+        DELETE1_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod,_param->_size_branch_update_prediction);
+        DELETE1_SIGNAL(out_PREDICT_BRANCH_CONDITION           ,_param->_nb_inst_decod,_param->_size_branch_condition        );
+//      DELETE1_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE         ,_param->_nb_inst_decod,1                                     );
+        DELETE1_SIGNAL(out_PREDICT_BRANCH_DIRECTION           ,_param->_nb_inst_decod,1                                     );
+        DELETE1_SIGNAL(out_PREDICT_ADDRESS_SRC                ,_param->_nb_inst_decod,_param->_size_general_data            );
+        DELETE1_SIGNAL(out_PREDICT_ADDRESS_DEST               ,_param->_nb_inst_decod,_param->_size_general_data            );
+//      DELETE1_SIGNAL( in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod,1                                     );
+        
+        DELETE1_SIGNAL( in_DEPTH_TAIL                         ,_param->_nb_context,_param->_size_depth  );
+        if (_param->_have_port_depth)	                    
+        DELETE1_SIGNAL( in_DEPTH_NB_BRANCH                    ,_param->_nb_context,_param->_size_depth+1);
+        
+        DELETE1_SIGNAL(out_NB_INST_DECOD_ALL                  ,_param->_nb_context,_param->_size_nb_inst_decod+1);
+        
+        DELETE1_SIGNAL(in_CONTEXT_DECOD_ENABLE                ,_param->_nb_context,1);
+        DELETE1_SIGNAL(in_CONTEXT_DEPTH                       ,_param->_nb_context,_param->_size_depth);
+        
+        DELETE_SIGNAL(out_CONTEXT_EVENT_VAL                   ,1);
+        DELETE_SIGNAL( in_CONTEXT_EVENT_ACK                   ,1);
+        DELETE_SIGNAL(out_CONTEXT_EVENT_CONTEXT_ID            ,_param->_size_context_id  );
+        DELETE_SIGNAL(out_CONTEXT_EVENT_TYPE                  ,_param->_size_event_type  );
+        DELETE_SIGNAL(out_CONTEXT_EVENT_IS_DELAY_SLOT         ,1                         );
+        DELETE_SIGNAL(out_CONTEXT_EVENT_ADDRESS               ,_param->_size_general_data);
+        DELETE_SIGNAL(out_CONTEXT_EVENT_ADDRESS_EPCR          ,_param->_size_general_data);
+      }
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    delete _component;
+    delete _component_decod;
+    delete _component_decod_queue;
+
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_end_cycle.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_end_cycle.cpp	(revision 83)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::end_cycle"
+void Decod_unit::end_cycle ()
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_statistics_allocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_statistics_allocation.cpp	(revision 83)
@@ -0,0 +1,42 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::statistics_allocation"
+  void Decod_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Decod_unit",
+		      param_statistics);
+
+    _stat->add_stat(_component_decod      ->_stat);
+    _stat->add_stat(_component_decod_queue->_stat);
+    
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_statistics_deallocation.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_statistics_deallocation.cpp	(revision 83)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::statistics_deallocation"
+  void Decod_unit::statistics_deallocation (void)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    log_printf(INFO,Decod_unit,FUNCTION,_("Generate Statistics file"));
+    
+    delete _stat;
+    
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_transition.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_transition.cpp	(revision 83)
@@ -0,0 +1,41 @@
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::transition"
+  void Decod_unit::transition (void)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+# endif
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_vhdl.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_vhdl.cpp	(revision 83)
@@ -0,0 +1,45 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::vhdl"
+  void Decod_unit::vhdl (void)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters.cpp	(revision 83)
@@ -0,0 +1,114 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::Parameters"
+  Parameters::Parameters (uint32_t            nb_context                   ,
+			  uint32_t          * nb_inst_fetch                ,
+			  uint32_t            nb_inst_decod                ,
+			  uint32_t            size_queue                   ,
+			  uint32_t            size_general_data            ,
+			  uint32_t          * nb_branch_speculated         ,
+			  uint32_t            size_branch_update_prediction,
+			  uint32_t            nb_context_select            ,
+			  Tpriority_t         select_priority              ,
+			  Tload_balancing_t   select_load_balancing        ,
+			  bool             ** instruction_implemeted       ,
+			  morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t))
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    _nb_context                    = nb_context                   ;
+    _nb_inst_fetch                 = nb_inst_fetch                ;
+    _nb_inst_decod                 = nb_inst_decod                ;
+    _size_queue                    = size_queue                   ;
+    _size_general_data             = size_general_data            ;
+    _nb_branch_speculated          = nb_branch_speculated         ;
+    _size_branch_update_prediction = size_branch_update_prediction;
+    _nb_context_select             = nb_context_select            ;
+    _select_priority               = select_priority              ;
+    _select_load_balancing         = select_load_balancing        ;
+    _instruction_implemeted        = instruction_implemeted       ;
+    _get_custom_information        = get_custom_information       ;
+
+    _max_nb_inst_fetch                     = max<uint32_t>(_nb_inst_fetch,_nb_context);
+
+    _size_context_id                       = log2(nb_context          );
+    _size_depth                            = log2(max<uint32_t>(_nb_branch_speculated,_nb_context));
+    _size_inst_ifetch_ptr                  = log2(_max_nb_inst_fetch  );
+
+    _have_port_context_id                  = (_size_context_id > 0);
+    _have_port_depth                       = (_size_depth      > 0);
+    _have_port_branch_update_prediction_id = (_size_branch_update_prediction > 0);
+    _have_port_inst_ifetch_ptr             = (_size_inst_ifetch_ptr > 0);
+    
+    test();
+
+    _param_decod = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters
+      (_nb_context                   ,
+       _nb_inst_fetch                ,
+       _nb_inst_decod                ,
+       max<uint32_t>(_nb_branch_speculated,_nb_context),
+       _size_branch_update_prediction,
+       _nb_context_select            ,
+       _size_general_data            ,
+       _select_priority              ,
+       _select_load_balancing        ,
+       _instruction_implemeted       ,
+       _get_custom_information);
+
+    _param_decod_queue = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Parameters
+      (_nb_context          ,
+       _nb_inst_decod       ,
+       _size_queue          ,
+       _size_general_data   ,
+       _nb_branch_speculated);
+
+    _size_nb_inst_decod = _param_decod_queue->_size_nb_inst;
+    
+    log_end(Decod_unit,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Decod_unit::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Decod_unit,FUNCTION);
+//     test();
+//     log_end(Decod_unit,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::~Parameters"
+  Parameters::~Parameters () 
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    delete _param_decod;
+    delete _param_decod_queue;
+
+    log_end(Decod_unit,FUNCTION);
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_msg_error.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_msg_error.cpp	(revision 83)
@@ -0,0 +1,39 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    Parameters_test test ("Decod_unit");
+
+    log_end(Decod_unit,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_print.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_print.cpp	(revision 83)
@@ -0,0 +1,75 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_front_end {
+namespace front_end {
+namespace decod_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    XML xml ("decod_unit");
+
+    xml.balise_open("decod_unit");
+    xml.singleton_begin("nb_context                   "); xml.attribut("value",toString(_nb_context                   )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_decod                "); xml.attribut("value",toString(_nb_inst_decod                )); xml.singleton_end();
+    xml.singleton_begin("size_queue                   "); xml.attribut("value",toString(_size_queue                   )); xml.singleton_end();
+    xml.singleton_begin("size_general_data            "); xml.attribut("value",toString(_size_general_data            )); xml.singleton_end();
+    xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end();
+    xml.singleton_begin("nb_context_select            "); xml.attribut("value",toString(_nb_context_select            )); xml.singleton_end();
+    xml.singleton_begin("select_priority              "); xml.attribut("value",toString(_select_priority              )); xml.singleton_end();
+    xml.singleton_begin("select_load_balancing        "); xml.attribut("value",toString(_select_load_balancing        )); xml.singleton_end();
+
+    for (uint32_t i=0;i<_nb_context; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","context");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.  singleton_begin("nb_inst_fetch                "); xml.attribut("value",toString(_nb_inst_fetch                [i])); xml.singleton_end();
+	xml.  singleton_begin("nb_branch_speculated         "); xml.attribut("value",toString(_nb_branch_speculated         [i])); xml.singleton_end();
+
+        xml. balise_close();
+      }
+    xml.balise_close();
+
+    log_end(Decod_unit,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Decod_unit::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters & x)
+  {
+    log_begin(Decod_unit,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Decod_unit,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace decod_unit
+}; // end namespace front_end
+}; // end namespace multi_front_end
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
