Changeset 87 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src
- Timestamp:
- May 15, 2008, 9:23:42 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp
r83 r87 7 7 8 8 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h" 9 #include "Behavioural/Custom/include/Custom_example.h" 9 10 10 11 #define NB_PARAMS 8 … … 85 86 _select_load_balancing , 86 87 _instruction_implemeted , 87 NULL); 88 &(morpheo::behavioural::custom::example_get_custom_information) 89 ); 88 90 89 91 msg(_("%s"),param->print(1).c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp
r83 r87 8 8 9 9 #define NB_ITERATION 1 10 #define CYCLE_MAX (1 28*NB_ITERATION)10 #define CYCLE_MAX (10240*NB_ITERATION) 11 11 12 12 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h" 13 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/Decod_request.h" 13 14 #include "Common/include/Test.h" 14 15 #include "Behavioural/include/Allocation.h" … … 20 21 21 22 #ifdef STATISTICS 22 morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5, 50);23 morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX); 23 24 #endif 24 25 … … 210 211 //const uint32_t seed = static_cast<uint32_t>(time(NULL)); 211 212 213 const int32_t percent_transaction_ifetch = 100; 214 const int32_t percent_transaction_decod = 100; 215 const int32_t percent_transaction_predict = 100; 216 const int32_t percent_transaction_event = 100; 217 212 218 srand(seed); 213 219 … … 226 232 LABEL("Iteration %d",iteration); 227 233 228 SC_START(1); 234 Decod_request request [_param->_nb_context]; 235 list<entry_t> respons [_param->_nb_context]; 236 237 uint32_t nb_request = 0; 238 239 uint32_t delay_slot_previous [_param->_nb_context]; 240 uint32_t delay_slot_current [_param->_nb_context]; 241 uint32_t delay_slot_next [_param->_nb_context]; 242 243 for (uint32_t i=0; i<_param->_nb_context; i++) 244 { 245 nb_request += request[i].size(); 246 delay_slot_current [i] = false; 247 delay_slot_next [i] = false; 248 249 in_DEPTH_TAIL [i]->write(0); 250 in_DEPTH_NB_BRANCH [i]->write(0); 251 in_CONTEXT_DEPTH [i]->write(0); 252 } 253 254 while (nb_request > 0) 255 { 256 for (uint32_t i=0; i<_param->_nb_context; i++) 257 { 258 delay_slot_previous [i] = false; 259 260 in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod); 261 262 for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) 263 in_IFETCH_VAL [i][j]->write(0); 264 265 if ((rand()%100)<percent_transaction_ifetch) 266 { 267 list<entry_t>::iterator it = request[i].begin(); 268 269 if (it!=request [i].end()) 270 { 271 uint32_t lsb = it->_address%_param->_nb_inst_fetch[i]; 272 273 in_IFETCH_ADDRESS [i]->write(it->_address-lsb); 274 in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE); 275 if (_param->_have_port_inst_ifetch_ptr) 276 in_IFETCH_INST_IFETCH_PTR [i]->write(0); 277 278 // Alignement 279 for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++) 280 { 281 in_IFETCH_VAL [i][j]->write(1); 282 in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction); 283 // in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next); 284 if (it->_type == TYPE_BRANCH) 285 in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state); 286 in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id); 287 288 if ((it->_is_delay_slot) or 289 ((++it)==request [i].end())) 290 break; 291 } 292 } 293 } 294 } 295 296 { 297 bool previous_ack = true; 298 299 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 300 { 301 bool ack = previous_ack and ((rand()%100)<percent_transaction_decod); 302 in_DECOD_ACK [i]->write(ack); 303 304 previous_ack = ack; 305 306 in_PREDICT_ACK [i]->write((rand()%100)<percent_transaction_predict); 307 // in_PREDICT_CAN_CONTINUE [i]->write(0); 308 } 309 } 310 311 in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event); 312 313 SC_START(0); 314 315 uint32_t find_event = false; 316 for (uint32_t i=0; i<_param->_nb_context; i++) 317 for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) 318 if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read()) 319 { 320 LABEL("IFETCH [%d][%d] : transaction",i,j); 321 322 entry_t entry = request [i].front(); 323 LABEL(" * address 0x%x",entry._address); 324 325 respons [i].push_back(entry); 326 request [i].pop_front(); 327 328 if (entry._type == TYPE_BRANCH) 329 { 330 delay_slot_next [i] = true; 331 332 // find good decod 333 uint32_t x; 334 335 for (x=0; x<=_param->_nb_inst_decod; x++) 336 { 337 if (x==_param->_nb_inst_decod) 338 TEST_KO("No find predict transaction"); 339 340 Tcontext_t ctxt = (_param->_have_port_context_id)?out_PREDICT_CONTEXT_ID[x]->read():0; 341 342 if ((ctxt == i) and 343 (out_PREDICT_VAL [x]->read() and in_PREDICT_ACK [x]->read())) 344 break; 345 } 346 347 LABEL("PREDICT [%d] : transaction",x ); 348 349 350 TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [x]->read(),((entry._address)%_param->_nb_inst_fetch[i]) == 0); 351 TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [x]->read(), entry._branch_state ); 352 if (_param->_have_port_branch_update_prediction_id) 353 TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x]->read(), entry._branch_update_prediction_id); 354 TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [x]->read(), entry._branch_condition ); 355 // TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [x]->read(), entry._branch_stack_write ); 356 TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [x]->read(), entry._branch_direction ); 357 TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [x]->read(), entry._address ); 358 TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [x]->read(), entry._branch_address_dest ); 359 } 360 361 // TEST(bool, find_event, false); // can continue decod after event 362 if (entry._context_event_type != EVENT_TYPE_NONE) 363 { 364 find_event = true; 365 366 LABEL("CONTEXT_EVENT : transaction"); 367 368 if (_param->_have_port_context_id) 369 TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), i); 370 TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), entry._context_event_type); 371 TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), entry._is_delay_slot); 372 TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), entry._address ); 373 TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), entry._address_next ); 374 } 375 376 TEST(bool, delay_slot_previous [i], false); // can't continue 377 delay_slot_previous [i] = delay_slot_current [i]; 378 delay_slot_current [i] = delay_slot_next [i]; 379 delay_slot_next [i] = false; 380 } 381 382 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 383 if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read()) 384 { 385 Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0; 386 387 LABEL("DECOD [%d] : transaction",i ); 388 389 TEST(bool ,respons [context].empty(), false); 390 391 LABEL(" * context : %d",context); 392 LABEL(" * instruction : 0x%x",respons [context].front()._instruction); 393 394 if (_param->_have_port_depth) 395 TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), respons [context].front()._depth ); 396 TEST(Ttype_t , out_DECOD_TYPE [i]->read(), respons [context].front()._type ); 397 TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), respons [context].front()._operation ); 398 TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), respons [context].front()._is_delay_slot); 399 TEST(Tgeneral_data_t , out_DECOD_ADDRESS [i]->read(), respons [context].front()._address ); 400 TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), respons [context].front()._has_immediat ); 401 if (respons [context].front()._has_immediat) 402 TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), respons [context].front()._immediat ); 403 TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), respons [context].front()._read_ra ); 404 if (respons [context].front()._read_ra) 405 TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), respons [context].front()._num_reg_ra ); 406 TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), respons [context].front()._read_rb ); 407 if (respons [context].front()._read_rb) 408 TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), respons [context].front()._num_reg_rb ); 409 TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), respons [context].front()._read_rc ); 410 if (respons [context].front()._read_rc) 411 TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), respons [context].front()._num_reg_rc ); 412 TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), respons [context].front()._write_rd ); 413 if (respons [context].front()._write_rd) 414 TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), respons [context].front()._num_reg_rd ); 415 TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), respons [context].front()._write_re ); 416 if (respons [context].front()._write_re) 417 TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), respons [context].front()._num_reg_re ); 418 TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), respons [context].front()._exception_use); 419 420 respons [context].pop_front(); 421 nb_request --; 422 } 423 424 TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event); 425 426 SC_START(1); 427 } 428 429 for (uint32_t i=0; i<_param->_nb_context; i++) 430 { 431 TEST(Tcounter_t,out_NB_INST_DECOD_ALL [i]->read(), respons[i].size()); 432 433 } 229 434 } 230 435 … … 301 506 DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS ); 302 507 DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR ); 303 304 508 } 305 509 #endif
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