Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg	(revision 87)
@@ -1,5 +1,5 @@
 Decod_unit
 1	1	+1	# nb_context                   
-1	4	*4	# nb_inst_fetch                [0][nb_context]
+4	8	*2 	# nb_inst_fetch                [0][nb_context]
 1	4	*4	# nb_inst_decod                
 4	16	*4	# size_queue                   
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg	(revision 87)
@@ -5,5 +5,5 @@
 1	1	*4	# nb_inst_fetch                [2][nb_context]
 8	8	*4	# nb_inst_fetch                [3][nb_context]
-4	8 	*2	# nb_inst_decod                
+1	8 	*4	# nb_inst_decod                
 16	16	*4	# size_queue                   
 32	32	+1	# size_general_data            
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp	(revision 87)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
+#include "Behavioural/Custom/include/Custom_example.h"
 
 #define NB_PARAMS 8
@@ -85,5 +86,6 @@
 	 _select_load_balancing        ,
 	 _instruction_implemeted       ,
-	 NULL);
+	 &(morpheo::behavioural::custom::example_get_custom_information)
+	 );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp	(revision 87)
@@ -8,7 +8,8 @@
 
 #define NB_ITERATION  1
-#define CYCLE_MAX     (128*NB_ITERATION)
+#define CYCLE_MAX     (10240*NB_ITERATION)
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
+#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/Decod_request.h"
 #include "Common/include/Test.h"
 #include "Behavioural/include/Allocation.h"
@@ -20,5 +21,5 @@
 
 #ifdef STATISTICS
-  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
 #endif
 
@@ -210,4 +211,9 @@
 //const uint32_t seed = static_cast<uint32_t>(time(NULL));
 
+  const  int32_t percent_transaction_ifetch  = 100;
+  const  int32_t percent_transaction_decod   = 100;
+  const  int32_t percent_transaction_predict = 100;
+  const  int32_t percent_transaction_event   = 100;
+
   srand(seed);
 
@@ -226,5 +232,204 @@
       LABEL("Iteration %d",iteration);
 
-      SC_START(1);
+      Decod_request request [_param->_nb_context];
+      list<entry_t> respons [_param->_nb_context];
+
+      uint32_t nb_request  = 0;
+
+      uint32_t delay_slot_previous [_param->_nb_context];
+      uint32_t delay_slot_current  [_param->_nb_context];
+      uint32_t delay_slot_next     [_param->_nb_context];
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  nb_request += request[i].size();
+	  delay_slot_current  [i] = false;
+	  delay_slot_next     [i] = false;
+
+	  in_DEPTH_TAIL      [i]->write(0);
+	  in_DEPTH_NB_BRANCH [i]->write(0);
+	  in_CONTEXT_DEPTH   [i]->write(0);
+	}
+
+      while (nb_request > 0)
+	{
+	  for (uint32_t i=0; i<_param->_nb_context; i++)
+	    {
+	      delay_slot_previous  [i] = false;
+	      
+	      in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod);
+
+	      for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
+		in_IFETCH_VAL [i][j]->write(0);
+		  
+	      if ((rand()%100)<percent_transaction_ifetch)
+		{
+		  list<entry_t>::iterator it = request[i].begin();
+		  
+		  if (it!=request [i].end())
+		    {
+		      uint32_t lsb = it->_address%_param->_nb_inst_fetch[i];
+		      
+		      in_IFETCH_ADDRESS         [i]->write(it->_address-lsb);
+		      in_IFETCH_BRANCH_STATE    [i]->write(BRANCH_STATE_NONE);
+		      if (_param->_have_port_inst_ifetch_ptr)
+		      in_IFETCH_INST_IFETCH_PTR [i]->write(0);
+
+		      // Alignement
+		      for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++)
+			{
+			  in_IFETCH_VAL                         [i][j]->write(1);
+			  in_IFETCH_INSTRUCTION                 [i][j]->write(it->_instruction);
+// 			  in_IFETCH_ADDRESS_NEXT                [i]->write(it->_address_next);
+			  if (it->_type == TYPE_BRANCH)
+			  in_IFETCH_BRANCH_STATE                [i]->write(it->_branch_state);
+			  in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id);
+			  
+			  if ((it->_is_delay_slot) or
+			      ((++it)==request [i].end()))
+			    break;
+			}
+		    }
+		}
+	    }
+	  
+	  {
+	    bool previous_ack = true;
+	      
+	    for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+	      {
+		bool ack = previous_ack and ((rand()%100)<percent_transaction_decod);
+		in_DECOD_ACK [i]->write(ack);
+		
+		previous_ack = ack;
+
+		in_PREDICT_ACK          [i]->write((rand()%100)<percent_transaction_predict);
+// 		in_PREDICT_CAN_CONTINUE [i]->write(0);
+	      }
+	  }
+
+	  in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event);
+
+	  SC_START(0);
+
+	  uint32_t find_event = false;
+	  for (uint32_t i=0; i<_param->_nb_context; i++)
+	    for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
+	      if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read())
+		{
+		  LABEL("IFETCH      [%d][%d] : transaction",i,j);
+		 
+		  entry_t entry = request [i].front();
+		  LABEL("  * address 0x%x",entry._address);
+		  
+		  respons [i].push_back(entry);
+		  request [i].pop_front();
+ 
+		  if (entry._type == TYPE_BRANCH)
+		    {
+		      delay_slot_next     [i] = true;
+		      
+		      // find good decod
+		      uint32_t x;
+
+		      for (x=0; x<=_param->_nb_inst_decod; x++)
+			{
+			  if (x==_param->_nb_inst_decod)
+			    TEST_KO("No find predict transaction");
+
+			  Tcontext_t ctxt = (_param->_have_port_context_id)?out_PREDICT_CONTEXT_ID[x]->read():0;
+
+			  if ((ctxt == i) and
+			      (out_PREDICT_VAL [x]->read() and in_PREDICT_ACK [x]->read()))
+			    break;
+			}
+
+		      LABEL("PREDICT     [%d]    : transaction",x  );
+		      
+		      
+		      TEST(Tcontrol_t         , out_PREDICT_MATCH_INST_IFETCH_PTR       [x]->read(),((entry._address)%_param->_nb_inst_fetch[i]) == 0);
+		      TEST(Tbranch_state_t    , out_PREDICT_BRANCH_STATE                [x]->read(), entry._branch_state               );
+		      if (_param->_have_port_branch_update_prediction_id)
+		      TEST(Tprediction_ptr_t  , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x]->read(), entry._branch_update_prediction_id);
+		      TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION            [x]->read(), entry._branch_condition           );
+// 		      TEST(Tcontrol_t         , out_PREDICT_BRANCH_STACK_WRITE          [x]->read(), entry._branch_stack_write         );
+		      TEST(Tcontrol_t         , out_PREDICT_BRANCH_DIRECTION            [x]->read(), entry._branch_direction           );
+		      TEST(Tgeneral_data_t    , out_PREDICT_ADDRESS_SRC                 [x]->read(), entry._address                    );
+		      TEST(Tgeneral_data_t    , out_PREDICT_ADDRESS_DEST                [x]->read(), entry._branch_address_dest        );
+		    }
+		  
+// 		  TEST(bool, find_event, false); // can continue decod after event
+		  if (entry._context_event_type != EVENT_TYPE_NONE)
+		    {
+		      find_event = true;
+		      
+		      LABEL("CONTEXT_EVENT      : transaction");
+		      
+		      if (_param->_have_port_context_id)
+			TEST(Tcontext_t     ,out_CONTEXT_EVENT_CONTEXT_ID   ->read(), i);
+		      TEST(Tevent_type_t  ,out_CONTEXT_EVENT_TYPE         ->read(), entry._context_event_type);
+		      TEST(Tcontrol_t     ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), entry._is_delay_slot);
+		      TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS      ->read(), entry._address      );
+		      TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), entry._address_next );
+		    }
+		  
+		  TEST(bool, delay_slot_previous [i], false); // can't continue
+		  delay_slot_previous [i] = delay_slot_current  [i];
+		  delay_slot_current  [i] = delay_slot_next     [i];
+		  delay_slot_next     [i] = false;
+		}
+
+	  for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+	    if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read())
+	      {
+		Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0;
+
+		LABEL("DECOD       [%d]    : transaction",i  );
+
+		TEST(bool              ,respons [context].empty(), false);
+
+		LABEL(" * context         : %d",context);
+		LABEL(" * instruction     : 0x%x",respons [context].front()._instruction);
+
+		if (_param->_have_port_depth)
+		TEST(Tdepth_t          ,  out_DECOD_DEPTH         [i]->read(), respons [context].front()._depth        );
+		TEST(Ttype_t           ,  out_DECOD_TYPE          [i]->read(), respons [context].front()._type         );
+		TEST(Toperation_t      ,  out_DECOD_OPERATION     [i]->read(), respons [context].front()._operation    );
+		TEST(Tcontrol_t        ,  out_DECOD_IS_DELAY_SLOT [i]->read(), respons [context].front()._is_delay_slot);
+		TEST(Tgeneral_data_t   ,  out_DECOD_ADDRESS       [i]->read(), respons [context].front()._address      );
+		TEST(Tcontrol_t        ,  out_DECOD_HAS_IMMEDIAT  [i]->read(), respons [context].front()._has_immediat );
+		if (respons [context].front()._has_immediat)
+		TEST(Tgeneral_data_t   ,  out_DECOD_IMMEDIAT      [i]->read(), respons [context].front()._immediat     );
+		TEST(Tcontrol_t        ,  out_DECOD_READ_RA       [i]->read(), respons [context].front()._read_ra      );
+		if (respons [context].front()._read_ra)
+		TEST(Tgeneral_address_t,  out_DECOD_NUM_REG_RA    [i]->read(), respons [context].front()._num_reg_ra   );
+		TEST(Tcontrol_t        ,  out_DECOD_READ_RB       [i]->read(), respons [context].front()._read_rb      );
+		if (respons [context].front()._read_rb)
+		TEST(Tgeneral_address_t,  out_DECOD_NUM_REG_RB    [i]->read(), respons [context].front()._num_reg_rb   );
+		TEST(Tcontrol_t        ,  out_DECOD_READ_RC       [i]->read(), respons [context].front()._read_rc      );
+		if (respons [context].front()._read_rc)
+		TEST(Tspecial_address_t,  out_DECOD_NUM_REG_RC    [i]->read(), respons [context].front()._num_reg_rc   );
+		TEST(Tcontrol_t        ,  out_DECOD_WRITE_RD      [i]->read(), respons [context].front()._write_rd     );
+		if (respons [context].front()._write_rd)
+		TEST(Tgeneral_address_t,  out_DECOD_NUM_REG_RD    [i]->read(), respons [context].front()._num_reg_rd   );
+		TEST(Tcontrol_t        ,  out_DECOD_WRITE_RE      [i]->read(), respons [context].front()._write_re     );
+		if (respons [context].front()._write_re)
+		TEST(Tspecial_address_t,  out_DECOD_NUM_REG_RE    [i]->read(), respons [context].front()._num_reg_re   );
+		TEST(Texception_t      ,  out_DECOD_EXCEPTION_USE [i]->read(), respons [context].front()._exception_use);
+
+		respons [context].pop_front();
+		nb_request --;
+	      }
+
+	  TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event);
+
+	  SC_START(1);
+	}
+
+      for (uint32_t i=0; i<_param->_nb_context; i++)
+	{
+	  TEST(Tcounter_t,out_NB_INST_DECOD_ALL [i]->read(), respons[i].size());
+	  
+	}
     }
 
@@ -301,5 +506,4 @@
   DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS              );
   DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR         );
-
     }
 #endif
