Index: trunk/IPs/systemC/Environment/include/Cache_Access.h
===================================================================
--- trunk/IPs/systemC/Environment/include/Cache_Access.h	(revision 81)
+++ trunk/IPs/systemC/Environment/include/Cache_Access.h	(revision 88)
@@ -22,6 +22,6 @@
   };
 
-  Cache_Access ireq_type2cache_type (Ticache_type_t ireq_type, bool uncached);
-  Cache_Access dreq_type2cache_type (Tdcache_type_t dreq_type, bool uncached);
+  Cache_Access ireq_type2cache_type (morpheo::Ticache_type_t ireq_type, bool uncached);
+  Cache_Access dreq_type2cache_type (morpheo::Tdcache_type_t dreq_type, bool uncached);
 };
 #endif
Index: trunk/IPs/systemC/Environment/include/Environment.h
===================================================================
--- trunk/IPs/systemC/Environment/include/Environment.h	(revision 81)
+++ trunk/IPs/systemC/Environment/include/Environment.h	(revision 88)
@@ -20,6 +20,6 @@
 namespace environment {
 
-  typedef Respons<Ticache_context_t, Ticache_packet_t,Ticache_error_t> irsp_t;
-  typedef Respons<Tdcache_context_t, Tdcache_packet_t,Tdcache_error_t> drsp_t;
+  typedef Respons<morpheo::Ticache_context_t, morpheo::Ticache_packet_t,morpheo::Ticache_error_t> irsp_t;
+  typedef Respons<morpheo::Tdcache_context_t, morpheo::Tdcache_packet_t,morpheo::Tdcache_error_t> drsp_t;
 
   class Environment : public sc_module
@@ -29,38 +29,38 @@
   public : sc_in<bool>                      * NRESET                ;
 
-  public : sc_in <Tcontrol_t           >  *** ICACHE_REQ_VAL        ;
-  public : sc_out<Tcontrol_t           >  *** ICACHE_REQ_ACK        ;
-  public : sc_in <Ticache_context_t    >  *** ICACHE_REQ_CONTEXT_ID ;
-  public : sc_in <Ticache_packet_t     >  *** ICACHE_REQ_PACKET_ID  ;
-  public : sc_in <Ticache_address_t    >  *** ICACHE_REQ_ADDRESS    ;
-  public : sc_in <Ticache_type_t       >  *** ICACHE_REQ_TYPE       ;
+  public : sc_in <morpheo::Tcontrol_t           >  *** ICACHE_REQ_VAL        ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_out<morpheo::Tcontrol_t           >  *** ICACHE_REQ_ACK        ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_in <morpheo::Ticache_context_t    >  *** ICACHE_REQ_CONTEXT_ID ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_in <morpheo::Ticache_packet_t     >  *** ICACHE_REQ_PACKET_ID  ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_in <morpheo::Ticache_address_t    >  *** ICACHE_REQ_ADDRESS    ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_in <morpheo::Ticache_type_t       >  *** ICACHE_REQ_TYPE       ;//[nb_entity][icache_dedicated_nb_port]
 
-  public : sc_out<Tcontrol_t           >  *** ICACHE_RSP_VAL        ;
-  public : sc_in <Tcontrol_t           >  *** ICACHE_RSP_ACK        ;
-  public : sc_out<Ticache_context_t    >  *** ICACHE_RSP_CONTEXT_ID ;
-  public : sc_out<Ticache_packet_t     >  *** ICACHE_RSP_PACKET_ID  ;
-  public : sc_out<Ticache_instruction_t> **** ICACHE_RSP_INSTRUCTION;//[nb_instruction]
-  public : sc_out<Ticache_error_t      >  *** ICACHE_RSP_ERROR      ;
+  public : sc_out<morpheo::Tcontrol_t           >  *** ICACHE_RSP_VAL        ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_in <morpheo::Tcontrol_t           >  *** ICACHE_RSP_ACK        ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_out<morpheo::Ticache_context_t    >  *** ICACHE_RSP_CONTEXT_ID ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_out<morpheo::Ticache_packet_t     >  *** ICACHE_RSP_PACKET_ID  ;//[nb_entity][icache_dedicated_nb_port]
+  public : sc_out<morpheo::Ticache_instruction_t> **** ICACHE_RSP_INSTRUCTION;//[nb_entity][icache_dedicated_nb_port][iaccess_nb_instruction]
+  public : sc_out<morpheo::Ticache_error_t      >  *** ICACHE_RSP_ERROR      ;//[nb_entity][icache_dedicated_nb_port]
 
-  public : sc_in <Tcontrol_t           >  *** DCACHE_REQ_VAL        ;
-  public : sc_out<Tcontrol_t           >  *** DCACHE_REQ_ACK        ;
-  public : sc_in <Tdcache_context_t    >  *** DCACHE_REQ_CONTEXT_ID ;
-  public : sc_in <Tdcache_packet_t     >  *** DCACHE_REQ_PACKET_ID  ;
-  public : sc_in <Tdcache_address_t    >  *** DCACHE_REQ_ADDRESS    ;
-  public : sc_in <Tdcache_type_t       >  *** DCACHE_REQ_TYPE       ;
-  public : sc_in <Tdcache_data_t       >  *** DCACHE_REQ_WDATA      ;
+  public : sc_in <morpheo::Tcontrol_t           >  *** DCACHE_REQ_VAL        ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_out<morpheo::Tcontrol_t           >  *** DCACHE_REQ_ACK        ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_in <morpheo::Tdcache_context_t    >  *** DCACHE_REQ_CONTEXT_ID ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_in <morpheo::Tdcache_packet_t     >  *** DCACHE_REQ_PACKET_ID  ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_in <morpheo::Tdcache_address_t    >  *** DCACHE_REQ_ADDRESS    ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_in <morpheo::Tdcache_type_t       >  *** DCACHE_REQ_TYPE       ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_in <morpheo::Tdcache_data_t       >  *** DCACHE_REQ_WDATA      ;//[nb_entity][dcache_dedicated_nb_port]
 
-  public : sc_out<Tcontrol_t           >  *** DCACHE_RSP_VAL        ;
-  public : sc_in <Tcontrol_t           >  *** DCACHE_RSP_ACK        ;
-  public : sc_out<Tdcache_context_t    >  *** DCACHE_RSP_CONTEXT_ID ;
-  public : sc_out<Tdcache_packet_t     >  *** DCACHE_RSP_PACKET_ID  ;
-  public : sc_out<Tdcache_data_t       >  *** DCACHE_RSP_RDATA      ;
-  public : sc_out<Tdcache_error_t      >  *** DCACHE_RSP_ERROR      ;
+  public : sc_out<morpheo::Tcontrol_t           >  *** DCACHE_RSP_VAL        ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_in <morpheo::Tcontrol_t           >  *** DCACHE_RSP_ACK        ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_out<morpheo::Tdcache_context_t    >  *** DCACHE_RSP_CONTEXT_ID ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_out<morpheo::Tdcache_packet_t     >  *** DCACHE_RSP_PACKET_ID  ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_out<morpheo::Tdcache_data_t       >  *** DCACHE_RSP_RDATA      ;//[nb_entity][dcache_dedicated_nb_port]
+  public : sc_out<morpheo::Tdcache_error_t      >  *** DCACHE_RSP_ERROR      ;//[nb_entity][dcache_dedicated_nb_port]
 
     // ===== [ Internal ]====================================================
-  public : Tcontrol_t                      ** icache_req_ack        ;
-  public : Tcontrol_t                      ** icache_rsp_val        ;
-  public : Tcontrol_t                      ** dcache_req_ack        ;
-  public : Tcontrol_t                      ** dcache_rsp_val        ;
+  public : morpheo::Tcontrol_t                      ** icache_req_ack        ;
+  public : morpheo::Tcontrol_t                      ** icache_rsp_val        ;
+  public : morpheo::Tcontrol_t                      ** dcache_req_ack        ;
+  public : morpheo::Tcontrol_t                      ** dcache_rsp_val        ;
 
     // ===== [ Variables ]===================================================
@@ -68,7 +68,11 @@
   private  : Parameters         * param;
 
-  private: char **                read_iram;
-  private: char **                read_dram;
-  private: char *                 write_dram;
+  private  : char              ** read_iram;
+  private  : char              ** read_dram;
+  private  : char               * write_dram;
+
+  private  : bool               * context_stop;    // to determine which context have send the signal stop (a same thread can send many signal)
+  private  : uint32_t             nb_context_stop; // stop the simulation when all context have send the stop signal 
+
 
     // ===== [ Components ]==================================================
@@ -88,9 +92,11 @@
   public   : ~Environment (void);
 
-  public   : bool   init       (std::string section, const char * filename, const char ** list_section);
-  public   : void   reset      (void);
+  public   : bool   init           (std::string section, const char * filename, const char ** list_section);
+  public   : void   reset          (void);
+  public   : void   stop           (uint32_t num_context);
+  public   : bool   simulation_end (void);
 
-  public   : void   transition (void);
-  public   : void   genMoore   (void);
+  public   : void   transition     (void);
+  public   : void   genMoore       (void);
 
   public   : friend std::ostream& operator<< (std::ostream& output, Environment &x);
@@ -137,17 +143,4 @@
     }
   };
-
-
-//   private: bool * context_stop;    // to determine which context have send the signal stop (a same thread can send many signal)
-//   private: uint3  nb_context_stop; // stop the simulation when all context have send the stop signal 
-
-//     //---------------------------------------------------------------------------------------------
-//     //-----[ stop ]--------------------------------------------------------------------------------
-//     //---------------------------------------------------------------------------------------------
-//   public : bool stop ()
-//     {
-//       return (nb_context_stop >= nb_context);
-//     }
-
 };
 
Index: trunk/IPs/systemC/Environment/include/Environment_Parameters.h
===================================================================
--- trunk/IPs/systemC/Environment/include/Environment_Parameters.h	(revision 81)
+++ trunk/IPs/systemC/Environment/include/Environment_Parameters.h	(revision 88)
@@ -8,4 +8,5 @@
 #include "../RamLock/include/RamLock_Parameters.h"
 #include "../Sim2OS/include/Sim2OS_Parameters.h"
+#include "../../processor/Morpheo/Common/include/ToString.h"
 
 namespace environment {
@@ -13,41 +14,41 @@
   class Parameters
   {
-  public : uint32_t    nb_iport;
-  public : uint32_t    nb_dport;
-  public : uint32_t    nb_entity;
-  public : uint32_t  * icache_dedicated_nb_port;
-  public : uint32_t  * dcache_dedicated_nb_port;
-
-  public : uint32_t  * iaccess_nb_context    ;
-  public : uint32_t  * iaccess_nb_packet     ;
-  public : uint32_t  * iaccess_size_address  ;
-  public : uint32_t  * iaccess_nb_instruction;
-  public : uint32_t  * iaccess_size_instruction;
-
-  public : uint32_t  * daccess_nb_context    ;
-  public : uint32_t  * daccess_nb_packet     ;
-  public : uint32_t  * daccess_size_address  ;
-  public : uint32_t  * daccess_size_data     ;
+  public : uint32_t                nb_iport                ;
+  public : uint32_t                nb_dport                ;
+  public : uint32_t                nb_entity               ;
+  public : uint32_t              * icache_dedicated_nb_port; //[nb_entity]
+  public : uint32_t              * dcache_dedicated_nb_port; //[nb_entity]
+                               
+  public : uint32_t              * iaccess_nb_context      ; //[nb_entity]
+  public : uint32_t              * iaccess_nb_packet       ; //[nb_entity]
+  public : uint32_t              * iaccess_size_address    ; //[nb_entity]
+  public : uint32_t              * iaccess_nb_instruction  ; //[nb_entity]
+  public : uint32_t              * iaccess_size_instruction; //[nb_entity]
+                               
+  public : uint32_t              * daccess_nb_context      ; //[nb_entity]
+  public : uint32_t              * daccess_nb_packet       ; //[nb_entity]
+  public : uint32_t              * daccess_size_address    ; //[nb_entity]
+  public : uint32_t              * daccess_size_data       ; //[nb_entity]
 
     // Parameters cache
-  public : cache::Parameters                     * param_cache;
+  public : cache::Parameters     * param_cache             ;
     // Parameters tty
-  public : uint32_t                                nb_component_tty;
-  public : uint32_t                              * tty_address;
-  public : tty::Parameters                      ** param_tty;
+  public : uint32_t                nb_component_tty        ;
+  public : uint32_t              * tty_address             ; //[nb_component_tty]
+  public : tty::Parameters      ** param_tty               ; //[nb_component_tty]
     // Parameters ramlock
-  public : uint32_t                                nb_component_ramlock;
-  public : uint32_t                              * ramlock_address;
-  public : ramlock::Parameters                  ** param_ramlock;
+  public : uint32_t                nb_component_ramlock    ;
+  public : uint32_t              * ramlock_address         ; //[nb_component_ramlock]
+  public : ramlock::Parameters  ** param_ramlock           ; //[nb_component_ramlock]
     // Parameters sim2OS
-  public : uint32_t                                sim2os_address;
-  public : uint32_t                                sim2os_size;
-  public : sim2os::Parameters                    * param_sim2os;
+  public : uint32_t                sim2os_address          ;
+  public : uint32_t                sim2os_size             ;
+  public : sim2os::Parameters    * param_sim2os            ;
     // Parameters data
-  public : data::Parameters                      * param_data;
+  public : data::Parameters      * param_data              ;
 
     // Parameters buffer_respons
-  public : queue::Parameters                    ** param_buffer_irsp;
-  public : queue::Parameters                    ** param_buffer_drsp;
+  public : queue::Parameters    ** param_buffer_irsp       ; //[nb_entity]
+  public : queue::Parameters    ** param_buffer_drsp       ; //[nb_entity]
 
   public : Parameters (// General
@@ -232,4 +233,76 @@
       delete param_cache;
     }
+
+  public : std::string print (uint32_t depth)
+    {
+      std::string tab = std::string(depth,'\t');
+      std::string str = "";
+
+      str+=tab+"nb_entity                    : "+morpheo::toString(nb_entity)+"\n";
+      str+=tab+"nb_iport                     : "+morpheo::toString(nb_iport )+"\n";
+      str+=tab+"nb_dport                     : "+morpheo::toString(nb_dport )+"\n";
+      for (uint32_t i=0; i<nb_entity; ++i)
+        {
+      str+=tab+"ENTITY ["+morpheo::toString(i)+"]\n";
+      str+=tab+"  * icache_dedicated_nb_port : "+morpheo::toString(icache_dedicated_nb_port[i])+"\n";
+      str+=tab+"  * dcache_dedicated_nb_port : "+morpheo::toString(dcache_dedicated_nb_port[i])+"\n";
+      str+=tab+"  * iaccess_nb_context       : "+morpheo::toString(iaccess_nb_context      [i])+"\n";
+      str+=tab+"  * iaccess_nb_packet        : "+morpheo::toString(iaccess_nb_packet       [i])+"\n";
+      str+=tab+"  * iaccess_size_address     : "+morpheo::toString(iaccess_size_address    [i])+"\n";
+      str+=tab+"  * iaccess_nb_instruction   : "+morpheo::toString(iaccess_nb_instruction  [i])+"\n";
+      str+=tab+"  * iaccess_size_instruction : "+morpheo::toString(iaccess_size_instruction[i])+"\n";
+      str+=tab+"  * daccess_nb_context       : "+morpheo::toString(daccess_nb_context      [i])+"\n";
+      str+=tab+"  * daccess_nb_packet        : "+morpheo::toString(daccess_nb_packet       [i])+"\n";
+      str+=tab+"  * daccess_size_address     : "+morpheo::toString(daccess_size_address    [i])+"\n";
+      str+=tab+"  * daccess_size_data        : "+morpheo::toString(daccess_size_data       [i])+"\n";
+        }
+
+      str+=tab+"CACHE\n";
+      str+=param_cache->print(depth+1);
+
+//       str+=tab+"nb_component_tty             : "+morpheo::toString(nb_component_tty           )+"\n";
+//       for (uint32_t i=0; i<nb_component_tty; ++i)
+//         {
+//       str+=tab+"TTY ["+morpheo::toString(i)+"]\n";
+//       str+=tab+"  * tty_address              : "+morpheo::toString(tty_address             [i])+"\n";
+//       str+=param_tty->print(depth+1);
+//         }      
+
+//       str+=tab+"nb_component_ramlock         : "+morpheo::toString(nb_component_ramlock       )+"\n";
+//       for (uint32_t i=0; i<nb_component_ramlock; ++i)
+//         {
+//       str+=tab+"RAMLOCK ["+morpheo::toString(i)+"]\n";
+//       str+=tab+"  * ramlock_address          : "+morpheo::toString(ramlock_address         [i])+"\n";
+//       str+=param_ramlock->print(depth+1);
+//         }      
+
+//       str+=tab+"SIM2OS\n";
+//       str+=tab+"sim2os_address               : "+morpheo::toString(sim2os_address)+"\n";
+//       str+=tab+"sim2os_size                  : "+morpheo::toString(sim2os_size   )+"\n";
+//       str+=param_sim2os->print(depth+1);
+
+//       str+=tab+"DATA\n";
+//       str+=param_data->print(depth+1);
+
+//       for (uint32_t i=0; i<nb_entity; ++i)
+//         {
+//       str+=tab+"BUFFER_IRSP ["+morpheo::toString(i)+"]\n";
+//       str+=param_buffer_irsp[i]_data->print(depth+1);
+//         }
+
+//       for (uint32_t i=0; i<nb_entity; ++i)
+//         {
+//       str+=tab+"BUFFER_DRSP ["+morpheo::toString(i)+"]\n";
+//       str+=param_buffer_drsp[i]_data->print(depth+1);
+//         }
+
+      return str;
+    }
+
+//   public : friend std::ostream& operator<< (std::ostream& output, const Parameters &x)
+//     {
+//       x.print(0);
+//       return output;
+//     }
   };
 
Index: trunk/IPs/systemC/Environment/include/Types.h
===================================================================
--- trunk/IPs/systemC/Environment/include/Types.h	(revision 81)
+++ trunk/IPs/systemC/Environment/include/Types.h	(revision 88)
@@ -2,5 +2,5 @@
 #define ENVIRONMENT_TYPES_H
 
-#include "../../processor/Morpheo/Behavioural/include/Types.h"
+#include "../../processor/Morpheo/TopLevel/include/Types.h"
 #include "../../processor/Morpheo/Behavioural/include/Constants.h"
 #include "../Cache/include/Types.h"
@@ -9,19 +9,20 @@
 {
   
-  typedef morpheo::behavioural::Tcontrol_t            Tcontrol_t           ;
+//   typedef morpheo::behavioural::Tcontrol_t            Tcontrol_t           ;
   
-  typedef morpheo::behavioural::Tcontext_t            Ticache_context_t    ;
-  typedef morpheo::behavioural::Tpacket_t             Ticache_packet_t     ;
-  typedef morpheo::behavioural::Ticache_address_t     Ticache_address_t    ;
-  typedef morpheo::behavioural::Ticache_type_t        Ticache_type_t       ;
-  typedef morpheo::behavioural::Ticache_instruction_t Ticache_instruction_t;
-  typedef morpheo::behavioural::Ticache_error_t       Ticache_error_t      ;
+//   typedef morpheo::behavioural::Tcontext_t            Ticache_context_t    ;
+//   typedef morpheo::behavioural::Tpacket_t             Ticache_packet_t     ;
+//   typedef morpheo::behavioural::Ticache_address_t     Ticache_address_t    ;
+//   typedef morpheo::behavioural::Ticache_type_t        Ticache_type_t       ;
+//   typedef morpheo::behavioural::Ticache_instruction_t Ticache_instruction_t;
+//   typedef morpheo::behavioural::Ticache_error_t       Ticache_error_t      ;
 
-  typedef morpheo::behavioural::Tcontext_t            Tdcache_context_t    ;
-  typedef morpheo::behavioural::Tpacket_t             Tdcache_packet_t     ;
-  typedef morpheo::behavioural::Tdcache_address_t     Tdcache_address_t    ;
-  typedef morpheo::behavioural::Tdcache_type_t        Tdcache_type_t       ;
-  typedef morpheo::behavioural::Tdcache_data_t        Tdcache_data_t       ;
-  typedef morpheo::behavioural::Tdcache_error_t       Tdcache_error_t      ;
+//   typedef morpheo::behavioural::Tcontext_t            Tdcache_context_t    ;
+//   typedef morpheo::behavioural::Tpacket_t             Tdcache_packet_t     ;
+//   typedef morpheo::behavioural::Tdcache_address_t     Tdcache_address_t    ;
+//   typedef morpheo::behavioural::Tdcache_type_t        Tdcache_type_t       ;
+//   typedef morpheo::behavioural::Tdcache_data_t        Tdcache_data_t       ;
+//   typedef morpheo::behavioural::Tdcache_error_t       Tdcache_error_t      ;
+
 };
 #endif