Changeset 88 for trunk/IPs/systemC/Environment/src
- Timestamp:
- Dec 10, 2008, 7:31:39 PM (16 years ago)
- Location:
- trunk/IPs/systemC/Environment/src
- Files:
-
- 2 added
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/Environment/src/Environment.cpp
r81 r88 1 1 #include "../include/Environment.h" 2 3 using namespace morpheo; 2 4 3 5 namespace environment { … … 60 62 61 63 62 63 64 64 for (uint32_t i=0; i<param->nb_entity; i++) 65 65 { … … 79 79 read_dram[0] = new char [max_data_size/8]; 80 80 write_dram = new char [max_data_size/8]; 81 context_stop = new bool [param->nb_entity]; 82 for (uint32_t i=0; i<param->nb_entity; ++i) 83 context_stop [i] = false; 84 nb_context_stop = 0; 81 85 82 86 // Port -
trunk/IPs/systemC/Environment/src/Environment_genMoore.cpp
r81 r88 1 1 #include "../include/Environment.h" 2 3 using namespace morpheo; 2 4 3 5 namespace environment { -
trunk/IPs/systemC/Environment/src/Environment_transition.cpp
r81 r88 1 1 #include "../include/Environment.h" 2 3 using namespace morpheo; 2 4 3 5 namespace environment { … … 43 45 Ticache_context_t context = ICACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence 44 46 Ticache_packet_t packet = ICACHE_REQ_PACKET_ID [i][j]->read();// TODO : test presence 45 Ticache_address_t address = ICACHE_REQ_ADDRESS [i][j]->read() ;47 Ticache_address_t address = ICACHE_REQ_ADDRESS [i][j]->read()<<2; 46 48 Ticache_type_t type = ICACHE_REQ_TYPE [i][j]->read(); 47 uint32_t size = param->iaccess_size_address [i]/8;49 uint32_t size = (param->iaccess_size_address [i]+2)/8; 48 50 49 51 _cout(ENVIRONMENT," * information\n"); … … 67 69 (entity.segment->getType() == data::TYPE_TARGET_MEMORY)) 68 70 { 69 _cout(ENVIRONMENT, 71 _cout(ENVIRONMENT," * OK !\n"); 70 72 bus_error = false; 71 73 uncached = entity.segment->getUncached(); … … 73 75 if (must_read == true) // Test if must read the ram 74 76 { 75 _cout(ENVIRONMENT, 77 _cout(ENVIRONMENT," * must read\n"); 76 78 // Read all instruction 77 79 for (unsigned int k=0; k<param->iaccess_nb_instruction[i]; k++) 78 80 { 79 81 uint32_t addr = address+k*(size); 80 _cout(ENVIRONMENT, " * addr: %.8x\n",addr);82 _cout(ENVIRONMENT," * addr : %.8x\n",addr); 81 83 82 84 bus_error |= !component_data->read(addr,size,read_iram[k]); … … 84 86 // Swap if endienness is different 85 87 if (endianness::isSameEndianness(context) == false) 86 read_iram[k] = endianness::swapBytes(read_iram[k],size,size); 88 { 89 read_iram[k] = endianness::swapBytes(read_iram[k],size,size); 90 } 91 92 _cout(ENVIRONMENT," * inst :"); 93 for (int32_t cpt=(param->iaccess_size_instruction[context]/8)-1; cpt>=0; --cpt) 94 _cout(ENVIRONMENT, "%.2x",0xff&static_cast<uint32_t>(read_iram[k][cpt])); 95 _cout(ENVIRONMENT, "\n"); 87 96 } 88 97 } … … 241 250 ,static_cast<uint32_t>((wdata>> 0)&0xff) 242 251 ); 252 253 stop (context); 243 254 244 // if (context_stop [context] == false)245 // {246 // context_stop [context] = true;247 // nb_context_stop ++;248 249 // if (nb_context_stop >= nb_context)250 // sc_stop();251 // }252 253 255 break; 254 256 } … … 387 389 { 388 390 // Decomposition en groupe octect 389 Tdcache_data_t result = (Tdcache_data_t)(component_sim2os->result);391 Tdcache_data_t result = static_cast<Tdcache_data_t>(reinterpret_cast<uint64_t>(component_sim2os->result)); 390 392 _cout(ENVIRONMENT,"<sim2os> result : %x\n",result); 391 393 … … 494 496 component_buffer_drsp [i]->push(latence,rsp); 495 497 } 496 497 498 } 498 499 //=============================================================================
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