Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp	(revision 88)
@@ -22,4 +22,6 @@
        << " - speculative_load        (uint32_t)" << endl
        << " - nb_bypass_memory        (uint32_t)" << endl
+       << " - nb_cache_port           (uint32_t)" << endl
+       << " - nb_inst_memory          (uint32_t)" << endl
        << " - nb_context              (uint32_t)" << endl
        << " - nb_front_end            (uint32_t)" << endl
@@ -62,4 +64,6 @@
 	const Tspeculative_load_t _speculative_load        = fromString<Tspeculative_load_t>(argv[x++]);
 	const uint32_t            _nb_bypass_memory        = atoi(argv[x++]);
+	const uint32_t            _nb_cache_port           = atoi(argv[x++]);
+	const uint32_t            _nb_inst_memory          = atoi(argv[x++]);
 	const uint32_t            _nb_context              = atoi(argv[x++]);
 	const uint32_t            _nb_front_end            = atoi(argv[x++]);
@@ -81,4 +85,6 @@
 	       _speculative_load       ,
 	       _nb_bypass_memory       ,
+	       _nb_cache_port          ,
+	       _nb_inst_memory         ,
 	       _nb_context             ,
 	       _nb_front_end           ,
@@ -88,5 +94,7 @@
 	       _size_special_data      ,
 	       _nb_general_register    ,
-	       _nb_special_register    );
+	       _nb_special_register    ,
+               true //is_toplevel
+               );
 	    
 	    cout << param->print(1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 88)
@@ -9,4 +9,5 @@
 #include <queue>
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
 
 //===================================================================={test}
@@ -26,4 +27,6 @@
 	 SPECULATIVE_LOAD_COMMIT,  //_speculative_load       
 	 0,  //_nb_bypass_memory
+	 1,  //_nb_cache_port
+	 1,  //_nb_inst_memory
 	 1,  //_nb_context             
 	 1,  //_nb_front_end           
@@ -33,5 +36,6 @@
 	 2 , //_size_special_data      
 	 64, //_nb_general_register    
-	 16  //_nb_special_register    
+	 16, //_nb_special_register    
+         true //is_toplevel
         );
 
@@ -39,4 +43,14 @@
   morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,0);
 #endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
 
   Load_store_unit * _Load_store_unit = new Load_store_unit (name.c_str(),
@@ -45,5 +59,5 @@
 #endif
 							    _param,
-							    USE_ALL);
+							    _usage);
   
 #ifdef SYSTEMC
@@ -56,69 +70,58 @@
   sc_signal<Tcontrol_t>                  * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
-  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_VAL                   = new sc_signal<Tcontrol_t        > (rename.c_str());
-  sc_signal<Tcontrol_t        > *  out_MEMORY_IN_ACK                   = new sc_signal<Tcontrol_t        > (rename.c_str());
-  sc_signal<Tcontext_t        > *   in_MEMORY_IN_CONTEXT_ID            = new sc_signal<Tcontext_t        > (rename.c_str());
-  sc_signal<Tcontext_t        > *   in_MEMORY_IN_FRONT_END_ID          = new sc_signal<Tcontext_t        > (rename.c_str());
-  sc_signal<Tcontext_t        > *   in_MEMORY_IN_OOO_ENGINE_ID         = new sc_signal<Tcontext_t        > (rename.c_str());
-  sc_signal<Tpacket_t         > *   in_MEMORY_IN_PACKET_ID             = new sc_signal<Tpacket_t         > (rename.c_str());
-  sc_signal<Toperation_t      > *   in_MEMORY_IN_OPERATION             = new sc_signal<Toperation_t      > (rename.c_str());
-  sc_signal<Ttype_t           > *   in_MEMORY_IN_TYPE                  = new sc_signal<Ttype_t           > (rename.c_str());
-  sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
-  sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
-  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
-  sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_IMMEDIAT              = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RA               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RB               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
-  sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
-  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
-  sc_signal<Tgeneral_address_t> *   in_MEMORY_IN_NUM_REG_RD            = new sc_signal<Tgeneral_address_t> (rename.c_str());
-  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
-  sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
-
-  sc_signal<Tcontrol_t	      > *  out_MEMORY_OUT_VAL           = new sc_signal<Tcontrol_t	  >(rename.c_str());
-  sc_signal<Tcontrol_t	      > *   in_MEMORY_OUT_ACK           = new sc_signal<Tcontrol_t	  >(rename.c_str());
-  sc_signal<Tcontext_t        > *  out_MEMORY_OUT_CONTEXT_ID    = new sc_signal<Tcontext_t        >(rename.c_str());
-  sc_signal<Tcontext_t        > *  out_MEMORY_OUT_FRONT_END_ID  = new sc_signal<Tcontext_t        >(rename.c_str());
-  sc_signal<Tcontext_t        > *  out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t        >(rename.c_str());
-  sc_signal<Tpacket_t         > *  out_MEMORY_OUT_PACKET_ID     = new sc_signal<Tpacket_t         >(rename.c_str());
-//   sc_signal<Toperation_t      > *  out_MEMORY_OUT_OPERATION     = new sc_signal<Toperation_t      >(rename.c_str());
-  sc_signal<Ttype_t           > *  out_MEMORY_OUT_TYPE          = new sc_signal<Ttype_t           >(rename.c_str());
-  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RD      = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tgeneral_address_t> *  out_MEMORY_OUT_NUM_REG_RD    = new sc_signal<Tgeneral_address_t>(rename.c_str());
-  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_DATA_RD       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
-  sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
-  sc_signal<Texception_t      > *  out_MEMORY_OUT_EXCEPTION     = new sc_signal<Texception_t      >(rename.c_str());
-  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_NO_SEQUENCE   = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_ADDRESS       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-
-  sc_signal<Tcontrol_t        > * out_DCACHE_REQ_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tcontrol_t        > *  in_DCACHE_REQ_ACK        = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tcontext_t        > * out_DCACHE_REQ_CONTEXT_ID = new sc_signal<Tcontext_t        >(rename.c_str());
-  sc_signal<Tpacket_t         > * out_DCACHE_REQ_PACKET_ID  = new sc_signal<Tpacket_t         >(rename.c_str());
-  sc_signal<Tdcache_address_t > * out_DCACHE_REQ_ADDRESS    = new sc_signal<Tdcache_address_t >(rename.c_str());
-  sc_signal<Tdcache_type_t    > * out_DCACHE_REQ_TYPE       = new sc_signal<Tdcache_type_t    >(rename.c_str());
-  sc_signal<Tdcache_data_t    > * out_DCACHE_REQ_WDATA      = new sc_signal<Tdcache_data_t    >(rename.c_str());
-  
-  sc_signal<Tcontrol_t        > *  in_DCACHE_RSP_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tcontrol_t        > * out_DCACHE_RSP_ACK        = new sc_signal<Tcontrol_t        >(rename.c_str());
-  sc_signal<Tcontext_t        > *  in_DCACHE_RSP_CONTEXT_ID = new sc_signal<Tcontext_t        >(rename.c_str());
-  sc_signal<Tpacket_t         > *  in_DCACHE_RSP_PACKET_ID  = new sc_signal<Tpacket_t         >(rename.c_str());
-  sc_signal<Tdcache_data_t    > *  in_DCACHE_RSP_RDATA      = new sc_signal<Tdcache_data_t    >(rename.c_str());
-  sc_signal<Tdcache_error_t   > *  in_DCACHE_RSP_ERROR      = new sc_signal<Tdcache_error_t   >(rename.c_str());
-  
-  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
-  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
-  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
-  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
-    
-  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
-    {
-      out_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        >(rename.c_str());
-      out_BYPASS_MEMORY_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        >(rename.c_str());
-      out_BYPASS_MEMORY_NUM_REG       [i] = new sc_signal<Tgeneral_address_t>(rename.c_str());
-      out_BYPASS_MEMORY_DATA          [i] = new sc_signal<Tgeneral_data_t   >(rename.c_str());
-    }
+    // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_VAL                  ," in_MEMORY_IN_VAL                  ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_IN_ACK                  ,"out_MEMORY_IN_ACK                  ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_CONTEXT_ID           ," in_MEMORY_IN_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_FRONT_END_ID         ," in_MEMORY_IN_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_OOO_ENGINE_ID        ," in_MEMORY_IN_OOO_ENGINE_ID        ",Tcontext_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_PACKET_ID            ," in_MEMORY_IN_PACKET_ID            ",Tpacket_t         ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_OPERATION            ," in_MEMORY_IN_OPERATION            ",Toperation_t      ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_TYPE                 ," in_MEMORY_IN_TYPE                 ",Ttype_t           ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE," in_MEMORY_IN_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ," in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_HAS_IMMEDIAT         ," in_MEMORY_IN_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_IMMEDIAT             ," in_MEMORY_IN_IMMEDIAT             ",Tgeneral_data_t   ,_param->_nb_inst_memory); // memory address
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_DATA_RA              ," in_MEMORY_IN_DATA_RA              ",Tgeneral_data_t   ,_param->_nb_inst_memory); // memory address
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_DATA_RB              ," in_MEMORY_IN_DATA_RB              ",Tgeneral_data_t   ,_param->_nb_inst_memory); // data        (store)
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_DATA_RC              ," in_MEMORY_IN_DATA_RC              ",Tspecial_data_t   ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_WRITE_RD             ," in_MEMORY_IN_WRITE_RD             ",Tcontrol_t        ,_param->_nb_inst_memory); // = (operation==load)
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_NUM_REG_RD           ," in_MEMORY_IN_NUM_REG_RD           ",Tgeneral_address_t,_param->_nb_inst_memory); // destination (load)
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_WRITE_RE             ," in_MEMORY_IN_WRITE_RE             ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_IN_NUM_REG_RE           ," in_MEMORY_IN_NUM_REG_RE           ",Tspecial_address_t,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_VAL                 ,"out_MEMORY_OUT_VAL                 ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL( in_MEMORY_OUT_ACK                 ," in_MEMORY_OUT_ACK                 ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_CONTEXT_ID          ,"out_MEMORY_OUT_CONTEXT_ID          ",Tcontext_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_FRONT_END_ID        ,"out_MEMORY_OUT_FRONT_END_ID        ",Tcontext_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_OOO_ENGINE_ID       ,"out_MEMORY_OUT_OOO_ENGINE_ID       ",Tcontext_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_PACKET_ID           ,"out_MEMORY_OUT_PACKET_ID           ",Tpacket_t         ,_param->_nb_inst_memory);
+//ALLOC1_SC_SIGNAL(out_MEMORY_OUT_OPERATION           ,"out_MEMORY_OUT_OPERATION           ",Toperation_t      ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_TYPE                ,"out_MEMORY_OUT_TYPE                ",Ttype_t           ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_WRITE_RD            ,"out_MEMORY_OUT_WRITE_RD            ",Tcontrol_t        ,_param->_nb_inst_memory); // = (operation==load)
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_NUM_REG_RD          ,"out_MEMORY_OUT_NUM_REG_RD          ",Tgeneral_address_t,_param->_nb_inst_memory); // destination (load)
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_DATA_RD             ,"out_MEMORY_OUT_DATA_RD             ",Tgeneral_data_t   ,_param->_nb_inst_memory); // data        (load)
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_WRITE_RE            ,"out_MEMORY_OUT_WRITE_RE            ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_NUM_REG_RE          ,"out_MEMORY_OUT_NUM_REG_RE          ",Tspecial_address_t,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_DATA_RE             ,"out_MEMORY_OUT_DATA_RE             ",Tspecial_data_t   ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_EXCEPTION           ,"out_MEMORY_OUT_EXCEPTION           ",Texception_t      ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_NO_SEQUENCE         ,"out_MEMORY_OUT_NO_SEQUENCE         ",Tcontrol_t        ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_ADDRESS             ,"out_MEMORY_OUT_ADDRESS             ",Tgeneral_data_t   ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_VAL                 ,"out_DCACHE_REQ_VAL                 ",Tcontrol_t        ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL( in_DCACHE_REQ_ACK                 ," in_DCACHE_REQ_ACK                 ",Tcontrol_t        ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_CONTEXT_ID          ,"out_DCACHE_REQ_CONTEXT_ID          ",Tcontext_t        ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_PACKET_ID           ,"out_DCACHE_REQ_PACKET_ID           ",Tpacket_t         ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_ADDRESS             ,"out_DCACHE_REQ_ADDRESS             ",Tdcache_address_t ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_TYPE                ,"out_DCACHE_REQ_TYPE                ",Tdcache_type_t    ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_DCACHE_REQ_WDATA               ,"out_DCACHE_REQ_WDATA               ",Tdcache_data_t    ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_VAL                 ," in_DCACHE_RSP_VAL                 ",Tcontrol_t        ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_DCACHE_RSP_ACK                 ,"out_DCACHE_RSP_ACK                 ",Tcontrol_t        ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_CONTEXT_ID          ," in_DCACHE_RSP_CONTEXT_ID          ",Tcontext_t        ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_PACKET_ID           ," in_DCACHE_RSP_PACKET_ID           ",Tpacket_t         ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_RDATA               ," in_DCACHE_RSP_RDATA               ",Tdcache_data_t    ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL( in_DCACHE_RSP_ERROR               ," in_DCACHE_RSP_ERROR               ",Tdcache_error_t   ,_param->_nb_cache_port);
+  ALLOC1_SC_SIGNAL(out_BYPASS_MEMORY_VAL              ,"out_BYPASS_MEMORY_VAL              ",Tcontrol_t        ,_param->_nb_bypass_memory);
+  ALLOC1_SC_SIGNAL(out_BYPASS_MEMORY_OOO_ENGINE_ID    ,"out_BYPASS_MEMORY_OOO_ENGINE_ID    ",Tcontext_t        ,_param->_nb_bypass_memory);
+  ALLOC1_SC_SIGNAL(out_BYPASS_MEMORY_NUM_REG          ,"out_BYPASS_MEMORY_NUM_REG          ",Tgeneral_address_t,_param->_nb_bypass_memory);
+  ALLOC1_SC_SIGNAL(out_BYPASS_MEMORY_DATA             ,"out_BYPASS_MEMORY_DATA             ",Tgeneral_data_t   ,_param->_nb_bypass_memory);
   
   /********************************************************
@@ -131,78 +134,74 @@
   (*(_Load_store_unit->in_NRESET))       (*(in_NRESET));
 
-  (*(_Load_store_unit-> in_MEMORY_IN_VAL                  ))(*( in_MEMORY_IN_VAL                  ));
-  (*(_Load_store_unit->out_MEMORY_IN_ACK                  ))(*(out_MEMORY_IN_ACK                  ));
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_VAL                  ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_IN_ACK                  ,_param->_nb_inst_memory);
   if (_param->_have_port_context_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID           ))(*( in_MEMORY_IN_CONTEXT_ID           ));
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_CONTEXT_ID           ,_param->_nb_inst_memory);
   if (_param->_have_port_front_end_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID         ))(*( in_MEMORY_IN_FRONT_END_ID         ));
-  if (_param->_have_port_ooo_engine_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID        ))(*( in_MEMORY_IN_OOO_ENGINE_ID        ));
-  if (_param->_have_port_packet_id)
-    (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
-  (*(_Load_store_unit-> in_MEMORY_IN_OPERATION            ))(*( in_MEMORY_IN_OPERATION            ));
-  (*(_Load_store_unit-> in_MEMORY_IN_TYPE                 ))(*( in_MEMORY_IN_TYPE                 ));
-  (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE));
-  if (_param->_have_port_load_queue_ptr)
-  (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ));
-  (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
-  (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT             ))(*( in_MEMORY_IN_IMMEDIAT             ));
-  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA              ))(*( in_MEMORY_IN_DATA_RA              ));
-  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB              ))(*( in_MEMORY_IN_DATA_RB              ));
-  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
-  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
-  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD           ))(*( in_MEMORY_IN_NUM_REG_RD           ));
-  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
-  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
-  
-  (*(_Load_store_unit->out_MEMORY_OUT_VAL           ))(*(out_MEMORY_OUT_VAL           ));
-  (*(_Load_store_unit-> in_MEMORY_OUT_ACK           ))(*( in_MEMORY_OUT_ACK           ));
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_FRONT_END_ID         ,_param->_nb_inst_memory);
+  if (_param->_have_port_ooo_engine_id)    
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_OOO_ENGINE_ID        ,_param->_nb_inst_memory);
+  if (_param->_have_port_rob_ptr)
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_PACKET_ID            ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_OPERATION            ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_TYPE                 ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_HAS_IMMEDIAT         ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_IMMEDIAT             ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_DATA_RA              ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_DATA_RB              ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_DATA_RC              ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_WRITE_RD             ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_NUM_REG_RD           ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_WRITE_RE             ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_IN_NUM_REG_RE           ,_param->_nb_inst_memory);
+
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_VAL          ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_MEMORY_OUT_ACK          ,_param->_nb_inst_memory);
   if (_param->_have_port_context_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID    ))(*(out_MEMORY_OUT_CONTEXT_ID    ));
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_CONTEXT_ID   ,_param->_nb_inst_memory);
   if (_param->_have_port_front_end_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID  ))(*(out_MEMORY_OUT_FRONT_END_ID  ));
-  if (_param->_have_port_ooo_engine_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID ));
-  if (_param->_have_port_packet_id)
-    (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
-//   (*(_Load_store_unit->out_MEMORY_OUT_OPERATION     ))(*(out_MEMORY_OUT_OPERATION     ));
-  (*(_Load_store_unit->out_MEMORY_OUT_TYPE          ))(*(out_MEMORY_OUT_TYPE          ));
-  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD      ))(*(out_MEMORY_OUT_WRITE_RD      ));
-  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD    ))(*(out_MEMORY_OUT_NUM_REG_RD    ));
-  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD       ))(*(out_MEMORY_OUT_DATA_RD       ));
-  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
-  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
-  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
-  (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION     ))(*(out_MEMORY_OUT_EXCEPTION     ));
-  (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE   ))(*(out_MEMORY_OUT_NO_SEQUENCE   ));
-  (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS       ))(*(out_MEMORY_OUT_ADDRESS       ));
-
-  (*(_Load_store_unit->out_DCACHE_REQ_VAL       ))(*(out_DCACHE_REQ_VAL       ));
-  (*(_Load_store_unit-> in_DCACHE_REQ_ACK       ))(*( in_DCACHE_REQ_ACK       ));
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_FRONT_END_ID ,_param->_nb_inst_memory);
+  if (_param->_have_port_ooo_engine_id)    
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_OOO_ENGINE_ID,_param->_nb_inst_memory);
+  if (_param->_have_port_rob_ptr)
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_PACKET_ID    ,_param->_nb_inst_memory);
+//INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_OPERATION    ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_TYPE         ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_WRITE_RD     ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_NUM_REG_RD   ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_DATA_RD      ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_WRITE_RE     ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_NUM_REG_RE   ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_DATA_RE      ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_EXCEPTION    ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_NO_SEQUENCE  ,_param->_nb_inst_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_ADDRESS      ,_param->_nb_inst_memory);
+
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_REQ_VAL        ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_DCACHE_REQ_ACK        ,_param->_nb_cache_port);
   if (_param->_have_port_dcache_context_id)
-    (*(_Load_store_unit->out_DCACHE_REQ_CONTEXT_ID))(*(out_DCACHE_REQ_CONTEXT_ID));
-  (*(_Load_store_unit->out_DCACHE_REQ_PACKET_ID ))(*(out_DCACHE_REQ_PACKET_ID ));
-  (*(_Load_store_unit->out_DCACHE_REQ_ADDRESS   ))(*(out_DCACHE_REQ_ADDRESS   ));
-  (*(_Load_store_unit->out_DCACHE_REQ_TYPE      ))(*(out_DCACHE_REQ_TYPE      ));
-  (*(_Load_store_unit->out_DCACHE_REQ_WDATA     ))(*(out_DCACHE_REQ_WDATA     ));
-
-  (*(_Load_store_unit-> in_DCACHE_RSP_VAL       ))(*( in_DCACHE_RSP_VAL       ));
-  (*(_Load_store_unit->out_DCACHE_RSP_ACK       ))(*(out_DCACHE_RSP_ACK       ));
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_REQ_CONTEXT_ID ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_REQ_PACKET_ID  ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_REQ_ADDRESS    ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_REQ_TYPE       ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_REQ_WDATA      ,_param->_nb_cache_port);
+
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_DCACHE_RSP_VAL        ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_DCACHE_RSP_ACK        ,_param->_nb_cache_port);
   if (_param->_have_port_dcache_context_id)
-    (*(_Load_store_unit-> in_DCACHE_RSP_CONTEXT_ID))(*( in_DCACHE_RSP_CONTEXT_ID));
-  (*(_Load_store_unit-> in_DCACHE_RSP_PACKET_ID ))(*( in_DCACHE_RSP_PACKET_ID ));
-  (*(_Load_store_unit-> in_DCACHE_RSP_RDATA     ))(*( in_DCACHE_RSP_RDATA     ));
-  (*(_Load_store_unit-> in_DCACHE_RSP_ERROR     ))(*( in_DCACHE_RSP_ERROR     ));
-
-    {
-      for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
-	{
-	  (*(_Load_store_unit->out_BYPASS_MEMORY_VAL           [i]))(*(out_BYPASS_MEMORY_VAL           [i]));
-	  if (_param->_have_port_ooo_engine_id)    
-	    (*(_Load_store_unit->out_BYPASS_MEMORY_OOO_ENGINE_ID [i]))(*(out_BYPASS_MEMORY_OOO_ENGINE_ID [i]));
-	  (*(_Load_store_unit->out_BYPASS_MEMORY_NUM_REG       [i]))(*(out_BYPASS_MEMORY_NUM_REG       [i]));
-	  (*(_Load_store_unit->out_BYPASS_MEMORY_DATA          [i]))(*(out_BYPASS_MEMORY_DATA          [i]));
-	}
-    }
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_DCACHE_RSP_CONTEXT_ID ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_DCACHE_RSP_PACKET_ID  ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_DCACHE_RSP_RDATA      ,_param->_nb_cache_port);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit, in_DCACHE_RSP_ERROR      ,_param->_nb_cache_port);
+
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_BYPASS_MEMORY_VAL           ,_param->_nb_bypass_memory);
+  if (_param->_have_port_ooo_engine_id)    
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_BYPASS_MEMORY_OOO_ENGINE_ID ,_param->_nb_bypass_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_BYPASS_MEMORY_NUM_REG       ,_param->_nb_bypass_memory);
+  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_BYPASS_MEMORY_DATA          ,_param->_nb_bypass_memory);
+
+
   cout << "<" << name << "> Start Simulation ............" << endl;
   Time * _time = new Time();
@@ -238,8 +237,8 @@
   LABEL("Initialisation");
 
-  in_MEMORY_IN_VAL ->write(0);
-  in_MEMORY_OUT_ACK->write(0);
-  in_DCACHE_REQ_ACK->write(0);
-  in_DCACHE_RSP_VAL->write(0);
+  in_MEMORY_IN_VAL [0]->write(0);
+  in_MEMORY_OUT_ACK[0]->write(0);
+  in_DCACHE_REQ_ACK[0]->write(0);
+  in_DCACHE_RSP_VAL[0]->write(0);
 
   in_NRESET        ->write(0);
@@ -419,50 +418,50 @@
 		    can_execute &= not load_queue_use  [fifo_request.top()._load_queue_ptr_write];
 		}
-	      in_MEMORY_IN_VAL ->write(can_execute);
+	      in_MEMORY_IN_VAL [0]->write(can_execute);
 	
 	      if (not fifo_request.empty())
 		{
 		  if (_param->_have_port_context_id)
-		    in_MEMORY_IN_CONTEXT_ID           ->write (fifo_request.top()._context_id           );
+		    in_MEMORY_IN_CONTEXT_ID           [0]->write (fifo_request.top()._context_id           );
 		  if (_param->_have_port_front_end_id)
-		    in_MEMORY_IN_FRONT_END_ID         ->write (fifo_request.top()._front_end_id         );
+		    in_MEMORY_IN_FRONT_END_ID         [0]->write (fifo_request.top()._front_end_id         );
 		  if (_param->_have_port_ooo_engine_id)
-		    in_MEMORY_IN_OOO_ENGINE_ID        ->write (fifo_request.top()._ooo_engine_id        );
-		  if (_param->_have_port_packet_id)
-		    in_MEMORY_IN_PACKET_ID            ->write (fifo_request.top()._packet_id            );
-		  in_MEMORY_IN_OPERATION            ->write (fifo_request.top()._operation            );
-		  in_MEMORY_IN_TYPE                 ->write (fifo_request.top()._type                 );
-		  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);
+		    in_MEMORY_IN_OOO_ENGINE_ID        [0]->write (fifo_request.top()._ooo_engine_id        );
+		  if (_param->_have_port_rob_ptr)
+		    in_MEMORY_IN_PACKET_ID            [0]->write (fifo_request.top()._packet_id            );
+		  in_MEMORY_IN_OPERATION            [0]->write (fifo_request.top()._operation            );
+		  in_MEMORY_IN_TYPE                 [0]->write (fifo_request.top()._type                 );
+		  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE[0]->write (fifo_request.top()._store_queue_ptr_write);
 		  if (_param->_have_port_load_queue_ptr)
-		  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );
-		  in_MEMORY_IN_IMMEDIAT             ->write (fifo_request.top()._immediat             );
-		  in_MEMORY_IN_DATA_RA              ->write (fifo_request.top()._data_ra              );
-		  in_MEMORY_IN_DATA_RB              ->write (fifo_request.top()._data_rb              );
-// 		  in_MEMORY_IN_WRITE_RD             ->write (fifo_request.top()._write_rd             );
-		  in_MEMORY_IN_NUM_REG_RD           ->write (fifo_request.top()._num_reg_rd           );
+		  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE [0]->write (fifo_request.top()._load_queue_ptr_write );
+		  in_MEMORY_IN_IMMEDIAT             [0]->write (fifo_request.top()._immediat             );
+		  in_MEMORY_IN_DATA_RA              [0]->write (fifo_request.top()._data_ra              );
+		  in_MEMORY_IN_DATA_RB              [0]->write (fifo_request.top()._data_rb              );
+// 		  in_MEMORY_IN_WRITE_RD             [0]->write (fifo_request.top()._write_rd             );
+		  in_MEMORY_IN_NUM_REG_RD           [0]->write (fifo_request.top()._num_reg_rd           );
 		}
-	      in_MEMORY_OUT_ACK->write((rand()%100)<percent_transaction_memory_out);
+	      in_MEMORY_OUT_ACK[0]->write((rand()%100)<percent_transaction_memory_out);
 
 	      // ***** DCACHE_REQ *****
-	      in_DCACHE_REQ_ACK->write((rand()%100)<percent_transaction_dcache);
+	      in_DCACHE_REQ_ACK[0]->write((rand()%100)<percent_transaction_dcache);
 
 	      // ***** DCACHE_RSP *****
 	      bool have_rsp = _cache->have_rsp ();
-	      in_DCACHE_RSP_VAL->write(have_rsp);
+	      in_DCACHE_RSP_VAL[0]->write(have_rsp);
 
 	      if (have_rsp)
 		{
-		  in_DCACHE_RSP_CONTEXT_ID->write(_cache->front()._context_id);
-		  in_DCACHE_RSP_PACKET_ID ->write(_cache->front()._packet_id );
-		  in_DCACHE_RSP_RDATA     ->write(_cache->front()._rdata     );
-		  in_DCACHE_RSP_ERROR     ->write(_cache->front()._error     );
+		  in_DCACHE_RSP_CONTEXT_ID[0]->write(_cache->front()._context_id);
+		  in_DCACHE_RSP_PACKET_ID [0]->write(_cache->front()._packet_id );
+		  in_DCACHE_RSP_RDATA     [0]->write(_cache->front()._rdata     );
+		  in_DCACHE_RSP_ERROR     [0]->write(_cache->front()._error     );
 		}
 
 	      SC_START(0);
 
-	      LABEL("MEMORY_IN  : %d - %d",in_MEMORY_IN_VAL ->read(),out_MEMORY_IN_ACK ->read());
-	      if ( in_MEMORY_IN_VAL ->read() and out_MEMORY_IN_ACK ->read())
+	      LABEL("MEMORY_IN  : %d - %d",in_MEMORY_IN_VAL [0]->read(),out_MEMORY_IN_ACK [0]->read());
+	      if ( in_MEMORY_IN_VAL [0]->read() and out_MEMORY_IN_ACK [0]->read())
 		{
-		  Tpacket_t  packet_id = in_MEMORY_IN_PACKET_ID->read();
+		  Tpacket_t  packet_id = in_MEMORY_IN_PACKET_ID[0]->read();
 
 		  LABEL(" * Accepted MEMORY_IN  : %d",packet_id);
@@ -483,8 +482,8 @@
 		}
 
-	      LABEL("MEMORY_OUT : %d - %d",out_MEMORY_OUT_VAL->read(),in_MEMORY_OUT_ACK ->read());
-	      if (out_MEMORY_OUT_VAL->read() and  in_MEMORY_OUT_ACK->read())
+	      LABEL("MEMORY_OUT : %d - %d",out_MEMORY_OUT_VAL[0]->read(),in_MEMORY_OUT_ACK [0]->read());
+	      if (out_MEMORY_OUT_VAL[0]->read() and  in_MEMORY_OUT_ACK[0]->read())
 		{
-		  Tpacket_t  packet_id = out_MEMORY_OUT_PACKET_ID->read();
+		  Tpacket_t  packet_id = out_MEMORY_OUT_PACKET_ID[0]->read();
 
 		  LABEL(" * Accepted MEMORY_OUT : %d",packet_id);
@@ -499,5 +498,5 @@
 		  else
 		    {
-		      if (not (out_MEMORY_OUT_EXCEPTION->read() == EXCEPTION_MEMORY_LOAD_SPECULATIVE))
+		      if (not (out_MEMORY_OUT_EXCEPTION[0]->read() == EXCEPTION_MEMORY_LOAD_SPECULATIVE))
 			{
 			  nb_request_memory_out ++;
@@ -508,5 +507,5 @@
 			{
 			  std::cout << "seth - have a load_speculative." << std::endl;
-			  tab_request[packet_id]._write_spec_ko = (out_MEMORY_OUT_DATA_RD->read() != tab_request[packet_id]._data_wait);
+			  tab_request[packet_id]._write_spec_ko = (out_MEMORY_OUT_DATA_RD[0]->read() != tab_request[packet_id]._data_wait);
 			  tab_request[packet_id]._previous_load_speculative = 1;
 			}
@@ -516,14 +515,14 @@
 
 		  // a lot of test
-		  TEST(Tpacket_t         , out_MEMORY_OUT_PACKET_ID    ->read(), tab_request[packet_id]._packet_id    );
-		  TEST(Tcontext_t        , out_MEMORY_OUT_CONTEXT_ID   ->read(), tab_request[packet_id]._context_id   );
-		  TEST(Tcontext_t        , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id );
-		  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id);
-// 		  TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    ->read(), tab_request[packet_id]._operation    );
-		  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         ->read(), TYPE_MEMORY                          );
+		  TEST(Tpacket_t         , out_MEMORY_OUT_PACKET_ID    [0]->read(), tab_request[packet_id]._packet_id    );
+		  TEST(Tcontext_t        , out_MEMORY_OUT_CONTEXT_ID   [0]->read(), tab_request[packet_id]._context_id   );
+		  TEST(Tcontext_t        , out_MEMORY_OUT_FRONT_END_ID [0]->read(), tab_request[packet_id]._front_end_id );
+		  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID[0]->read(), tab_request[packet_id]._ooo_engine_id);
+// 		  TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    [0]->read(), tab_request[packet_id]._operation    );
+		  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         [0]->read(), TYPE_MEMORY                          );
 
 		  if (is_operation_memory_load (tab_request[packet_id]._operation))
 		    {
-		      TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD   ->read(), tab_request[packet_id]._num_reg_rd   );
+		      TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD   [0]->read(), tab_request[packet_id]._num_reg_rd   );
 		    }
 
@@ -532,9 +531,9 @@
 		  bool            error_alignment = (address != (address & (~ mask_memory_access(tab_request[packet_id]._operation))));
 		  bool            berr            = (address >= size_memory);
-		  Texception_t    exception       = out_MEMORY_OUT_EXCEPTION->read();
+		  Texception_t    exception       = out_MEMORY_OUT_EXCEPTION[0]->read();
 
 		  if (is_operation_memory_store(tab_request[packet_id]._operation))
 		    {
-		      TEST(Tcontrol_t        , out_MEMORY_OUT_WRITE_RD     ->read(), 0);
+		      TEST(Tcontrol_t        , out_MEMORY_OUT_WRITE_RD     [0]->read(), 0);
 
 		      // store.
@@ -568,5 +567,5 @@
 			  if (test_result_ko)
 			    {
-			      TEST(Tgeneral_data_t   , out_MEMORY_OUT_DATA_RD->read(), address);
+			      TEST(Tgeneral_data_t   , out_MEMORY_OUT_DATA_RD[0]->read(), address);
 			    }
 		    }
@@ -578,5 +577,5 @@
 		      bool is_load = is_operation_memory_load(tab_request[packet_id]._operation);
 
-		      if (not (out_MEMORY_OUT_EXCEPTION->read() == EXCEPTION_MEMORY_LOAD_SPECULATIVE))
+		      if (not (out_MEMORY_OUT_EXCEPTION[0]->read() == EXCEPTION_MEMORY_LOAD_SPECULATIVE))
 			{
 			  bool test_result_ko = false;
@@ -586,5 +585,5 @@
 			      // IS A LOAD :D
 			      TEST(Texception_t, exception, EXCEPTION_MEMORY_MISS_SPECULATION);
-			      TEST(Tcontrol_t, out_MEMORY_OUT_WRITE_RD->read(), 1);
+			      TEST(Tcontrol_t, out_MEMORY_OUT_WRITE_RD[0]->read(), 1);
 			    }
 			  else
@@ -592,5 +591,5 @@
 			      {
 				TEST(Texception_t, exception, EXCEPTION_MEMORY_ALIGNMENT);
-				TEST(Tcontrol_t, out_MEMORY_OUT_WRITE_RD->read(), is_load);
+				TEST(Tcontrol_t, out_MEMORY_OUT_WRITE_RD[0]->read(), is_load);
 				test_result_ko = true;
 			      }
@@ -599,5 +598,5 @@
 				{
 				  TEST(Texception_t, exception, EXCEPTION_MEMORY_BUS_ERROR);
-				  TEST(Tcontrol_t  , out_MEMORY_OUT_WRITE_RD->read(), is_load);
+				  TEST(Tcontrol_t  , out_MEMORY_OUT_WRITE_RD[0]->read(), is_load);
 				  test_result_ko = true;
 				}
@@ -605,37 +604,37 @@
 				{
 				  TEST(Texception_t, exception, EXCEPTION_MEMORY_NONE);
-				  TEST(Tcontrol_t  , out_MEMORY_OUT_WRITE_RD->read(), is_load and not tab_request[packet_id]._previous_load_speculative);
+				  TEST(Tcontrol_t  , out_MEMORY_OUT_WRITE_RD[0]->read(), is_load and not tab_request[packet_id]._previous_load_speculative);
 				}
 			  // In all case : test data
 			  if (test_result_ko)
 			    {
-			      TEST(Tgeneral_data_t   , out_MEMORY_OUT_DATA_RD->read(), address);
+			      TEST(Tgeneral_data_t   , out_MEMORY_OUT_DATA_RD[0]->read(), address);
 			    }
 			  else
 			    {
-			      TEST(Tgeneral_data_t   , out_MEMORY_OUT_DATA_RD->read(), tab_request[packet_id]._data_wait);
+			      TEST(Tgeneral_data_t   , out_MEMORY_OUT_DATA_RD[0]->read(), tab_request[packet_id]._data_wait);
 			    }
 			}
 		      else
 			{
-			  TEST(Tcontrol_t        , out_MEMORY_OUT_WRITE_RD     ->read(), 1);
+			  TEST(Tcontrol_t        , out_MEMORY_OUT_WRITE_RD     [0]->read(), 1);
 			}
 		    }
 		}
 
-	      LABEL("DCACHE_REQ : %d - %d",out_DCACHE_REQ_VAL->read(),in_DCACHE_REQ_ACK ->read());
-	      if (out_DCACHE_REQ_VAL->read() and  in_DCACHE_REQ_ACK->read())
+	      LABEL("DCACHE_REQ : %d - %d",out_DCACHE_REQ_VAL[0]->read(),in_DCACHE_REQ_ACK [0]->read());
+	      if (out_DCACHE_REQ_VAL[0]->read() and  in_DCACHE_REQ_ACK[0]->read())
 		{
 		  Tcontext_t        context_id;
 		  Tpacket_t         packet_id ; 
-		  Tdcache_address_t address = out_DCACHE_REQ_ADDRESS->read();
+		  Tdcache_address_t address = out_DCACHE_REQ_ADDRESS[0]->read();
 		  Tdcache_data_t    rdata;
 		  Tdcache_error_t   error = 0;
 		  if (_param->_have_port_dcache_context_id)
-		    context_id = out_DCACHE_REQ_CONTEXT_ID->read();
+		    context_id = out_DCACHE_REQ_CONTEXT_ID[0]->read();
 		  else
 		    context_id = 0;
 
-		  packet_id  = (out_DCACHE_REQ_PACKET_ID ->read())>>1;
+		  packet_id  = (out_DCACHE_REQ_PACKET_ID [0]->read())>>1;
 	      
 		  LABEL(" * Accepted DCACHE_REQ : %d",packet_id);
@@ -649,23 +648,23 @@
 		  else
 		    {
-		      rdata = _memory->access (context_id, address, out_DCACHE_REQ_TYPE->read(), out_DCACHE_REQ_WDATA->read());
+		      rdata = _memory->access (context_id, address, out_DCACHE_REQ_TYPE[0]->read(), out_DCACHE_REQ_WDATA[0]->read());
 		      LABEL("   * rdata : 0x%x",rdata);
 		    }
 
 		  // test type : send or not a respons !
-		  if ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_SYNCHRONIZATION) or
-		      (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_8 ) or
-		      (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_16) or
-		      (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_32) or
-		      (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_LOAD_64) or
-		      ((error != DCACHE_ERROR_NONE) and ((out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_8 ) or
-							 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_16) or
-							 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_32) or
-							 (out_DCACHE_REQ_TYPE->read() == DCACHE_TYPE_STORE_64) )))
+		  if ((out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_SYNCHRONIZATION) or
+		      (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_LOAD_8 ) or
+		      (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_LOAD_16) or
+		      (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_LOAD_32) or
+		      (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_LOAD_64) or
+		      ((error != DCACHE_ERROR_NONE) and ((out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_STORE_8 ) or
+							 (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_STORE_16) or
+							 (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_STORE_32) or
+							 (out_DCACHE_REQ_TYPE[0]->read() == DCACHE_TYPE_STORE_64) )))
 		    {
 		      LABEL("     * have_dcache_rsp");
 		  
 		      _cache->push (context_id,
-				    out_DCACHE_REQ_PACKET_ID ->read(),
+				    out_DCACHE_REQ_PACKET_ID [0]->read(),
 				    rdata,
 				    error);
@@ -673,6 +672,6 @@
 		}
 
-	      LABEL("DCACHE_RSP : %d - %d",in_DCACHE_RSP_VAL->read(),out_DCACHE_RSP_ACK ->read());
-	      if (in_DCACHE_RSP_VAL->read() and out_DCACHE_RSP_ACK->read())
+	      LABEL("DCACHE_RSP : %d - %d",in_DCACHE_RSP_VAL[0]->read(),out_DCACHE_RSP_ACK [0]->read());
+	      if (in_DCACHE_RSP_VAL[0]->read() and out_DCACHE_RSP_ACK[0]->read())
 		{
 		  _cache->pop();
@@ -704,62 +703,61 @@
   delete     in_NRESET;
 
-  delete     in_MEMORY_IN_VAL         ;
-  delete    out_MEMORY_IN_ACK         ;
-  delete     in_MEMORY_IN_CONTEXT_ID  ;
-  delete     in_MEMORY_IN_FRONT_END_ID  ;
-  delete     in_MEMORY_IN_OOO_ENGINE_ID  ;
-  delete     in_MEMORY_IN_PACKET_ID   ;
-  delete     in_MEMORY_IN_OPERATION   ;
-  delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
-  delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
-  delete     in_MEMORY_IN_HAS_IMMEDIAT;
-  delete     in_MEMORY_IN_IMMEDIAT    ;
-  delete     in_MEMORY_IN_DATA_RA     ;
-  delete     in_MEMORY_IN_DATA_RB     ;
-  delete     in_MEMORY_IN_DATA_RC     ;
-  delete     in_MEMORY_IN_WRITE_RD    ;
-  delete     in_MEMORY_IN_NUM_REG_RD  ;
-  delete     in_MEMORY_IN_WRITE_RE    ;
-  delete     in_MEMORY_IN_NUM_REG_RE  ;
-    
-  delete    out_MEMORY_OUT_VAL       ;
-  delete     in_MEMORY_OUT_ACK       ;
-  delete    out_MEMORY_OUT_CONTEXT_ID;
-  delete    out_MEMORY_OUT_FRONT_END_ID;
-  delete    out_MEMORY_OUT_OOO_ENGINE_ID;
-  delete    out_MEMORY_OUT_PACKET_ID ;
-//   delete    out_MEMORY_OUT_OPERATION ;
-  delete    out_MEMORY_OUT_TYPE      ;
-  delete    out_MEMORY_OUT_WRITE_RD  ;
-  delete    out_MEMORY_OUT_NUM_REG_RD;
-  delete    out_MEMORY_OUT_DATA_RD   ;
-  delete    out_MEMORY_OUT_WRITE_RE  ;
-  delete    out_MEMORY_OUT_NUM_REG_RE;
-  delete    out_MEMORY_OUT_DATA_RE   ;
-  delete    out_MEMORY_OUT_EXCEPTION ;
-  delete    out_MEMORY_OUT_NO_SEQUENCE;
-  delete    out_MEMORY_OUT_ADDRESS   ;
-  
-  delete    out_DCACHE_REQ_VAL       ;
-  delete     in_DCACHE_REQ_ACK       ;
-  delete    out_DCACHE_REQ_CONTEXT_ID;
-  delete    out_DCACHE_REQ_PACKET_ID ;
-  delete    out_DCACHE_REQ_ADDRESS   ;
-  delete    out_DCACHE_REQ_TYPE      ;
-  delete    out_DCACHE_REQ_WDATA     ;
-  
-  delete     in_DCACHE_RSP_VAL       ;
-  delete    out_DCACHE_RSP_ACK       ;
-  delete     in_DCACHE_RSP_CONTEXT_ID;
-  delete     in_DCACHE_RSP_PACKET_ID ;
-  delete     in_DCACHE_RSP_RDATA     ;
-  delete     in_DCACHE_RSP_ERROR     ;
-  
-    {
-      delete [] out_BYPASS_MEMORY_VAL       ;
-      delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID;
-      delete [] out_BYPASS_MEMORY_NUM_REG   ;
-      delete [] out_BYPASS_MEMORY_DATA      ;
-    }
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_VAL                  ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_IN_ACK                  ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_CONTEXT_ID           ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_FRONT_END_ID         ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_OOO_ENGINE_ID        ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_PACKET_ID            ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_OPERATION            ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_TYPE                 ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_HAS_IMMEDIAT         ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_IMMEDIAT             ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_DATA_RA              ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_DATA_RB              ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_DATA_RC              ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_WRITE_RD             ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_NUM_REG_RD           ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_WRITE_RE             ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_IN_NUM_REG_RE           ,_param->_nb_inst_memory);
+
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_VAL          ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL( in_MEMORY_OUT_ACK          ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_CONTEXT_ID   ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_FRONT_END_ID ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_OOO_ENGINE_ID,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_PACKET_ID    ,_param->_nb_inst_memory);
+//DELETE1_SC_SIGNAL(out_MEMORY_OUT_OPERATION    ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_TYPE         ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_WRITE_RD     ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_NUM_REG_RD   ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_DATA_RD      ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_WRITE_RE     ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_NUM_REG_RE   ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_DATA_RE      ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_EXCEPTION    ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_NO_SEQUENCE  ,_param->_nb_inst_memory);
+  DELETE1_SC_SIGNAL(out_MEMORY_OUT_ADDRESS      ,_param->_nb_inst_memory);
+
+  DELETE1_SC_SIGNAL(out_DCACHE_REQ_VAL        ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL( in_DCACHE_REQ_ACK        ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL(out_DCACHE_REQ_CONTEXT_ID ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL(out_DCACHE_REQ_PACKET_ID  ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL(out_DCACHE_REQ_ADDRESS    ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL(out_DCACHE_REQ_TYPE       ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL(out_DCACHE_REQ_WDATA      ,_param->_nb_cache_port);
+
+  DELETE1_SC_SIGNAL( in_DCACHE_RSP_VAL        ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL(out_DCACHE_RSP_ACK        ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL( in_DCACHE_RSP_CONTEXT_ID ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL( in_DCACHE_RSP_PACKET_ID  ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL( in_DCACHE_RSP_RDATA      ,_param->_nb_cache_port);
+  DELETE1_SC_SIGNAL( in_DCACHE_RSP_ERROR      ,_param->_nb_cache_port);
+
+  DELETE1_SC_SIGNAL(out_BYPASS_MEMORY_VAL           ,_param->_nb_bypass_memory);
+  DELETE1_SC_SIGNAL(out_BYPASS_MEMORY_OOO_ENGINE_ID ,_param->_nb_bypass_memory);
+  DELETE1_SC_SIGNAL(out_BYPASS_MEMORY_NUM_REG       ,_param->_nb_bypass_memory);
+  DELETE1_SC_SIGNAL(out_BYPASS_MEMORY_DATA          ,_param->_nb_bypass_memory);
 #endif
 
