Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/Makefile	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Context_State_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg	(revision 88)
@@ -2,10 +2,8 @@
 1	1	+1	# nb_context
 1	1	+1	# nb_decod_unit
-1	1	+1	# nb_ooo_engine
 1	1	+1	# nb_inst_branch_complete
 0	0	+1	# size_depth                    [0] [nb_context]
 30	30	+1	# size_address			
 1	1	+1	# size_inst_decod               [0] [nb_decod_unit]
-1	1	+1	# size_inst_commit              [0] [nb_ooo_engine]
+1	1	+1	# size_inst_commit
 0	0	+1	# link_context_to_decod_unit    [0] [nb_context]
-0	0	+1	# link_decod_unit_to_ooo_engine [0] [nb_decod_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg	(revision 88)
@@ -2,10 +2,8 @@
 1	1	+1	# nb_context
 1	1	*4	# nb_decod_unit
-1	1	*4	# nb_ooo_engine
 1	4	*4	# nb_inst_branch_complete
 0	2	+1	# size_depth                    [0] [nb_context]
 30	30	+1	# size_address			
 1	4	*4	# size_inst_decod               [0] [nb_decod_unit]
-1	4	*4	# size_inst_commit              [0] [nb_ooo_engine]
+1	4	*4	# size_inst_commit
 0	0	+1	# link_context_to_decod_unit    [0] [nb_context]
-0	0	+1	# link_decod_unit_to_ooo_engine [0] [nb_decod_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg	(revision 88)
@@ -2,5 +2,4 @@
 8	8	+1	# nb_context
 4	4	*4	# nb_decod_unit
-2	2	*4	# nb_ooo_engine
 2	2	*4	# nb_inst_branch_complete
 4	4	+1	# size_depth                    [0] [nb_context]
@@ -17,6 +16,5 @@
 2	2	*4	# size_inst_decod               [2] [nb_decod_unit]
 4	4	*4	# size_inst_decod               [3] [nb_decod_unit]
-8	8	*4	# size_inst_commit              [0] [nb_ooo_engine]
-2	2	*4	# size_inst_commit              [1] [nb_ooo_engine]
+8	8	*4	# size_inst_commit
 0	0	+1	# link_context_to_decod_unit    [0] [nb_context]
 1	1	+1	# link_context_to_decod_unit    [1] [nb_context]
@@ -27,6 +25,2 @@
 2	2	+1	# link_context_to_decod_unit    [6] [nb_context]
 3	3	+1	# link_context_to_decod_unit    [7] [nb_context]
-0	0	+1	# link_decod_unit_to_ooo_engine [0] [nb_decod_unit]
-1	1	+1	# link_decod_unit_to_ooo_engine [1] [nb_decod_unit]
-0	0	+1	# link_decod_unit_to_ooo_engine [2] [nb_decod_unit]
-1	1	+1	# link_decod_unit_to_ooo_engine [3] [nb_decod_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp	(revision 88)
@@ -16,12 +16,10 @@
   err (_(" * nb_context                                    (uint32_t)\n"));
   err (_(" * nb_decod_unit                                 (uint32_t)\n"));
-  err (_(" * nb_ooo_engine                                 (uint32_t)\n"));
   err (_(" * nb_inst_branch_complete                       (uint32_t)\n"));
   err (_(" * size_depth                    [nb_context]	   (uint32_t)\n"));
   err (_(" * size_address                                  (uint32_t)\n"));
   err (_(" * size_inst_decod               [nb_decod_unit] (uint32_t)\n"));
-  err (_(" * size_inst_commit              [nb_ooo_engine] (uint32_t)\n"));
+  err (_(" * size_inst_commit                              (uint32_t)\n"));
   err (_(" * link_context_to_decod_unit    [nb_context]	   (uint32_t)\n"));
-  err (_(" * link_decod_unit_to_ooo_engine [nb_decod_unit] (uint32_t)\n"));
 
   exit (1);
@@ -45,8 +43,7 @@
   uint32_t   _nb_context              = fromString<uint32_t>(argv[x++]);
   uint32_t   _nb_decod_unit           = fromString<uint32_t>(argv[x++]);
-  uint32_t   _nb_ooo_engine           = fromString<uint32_t>(argv[x++]);
   uint32_t   _nb_inst_branch_complete = fromString<uint32_t>(argv[x++]);
 
-  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_context+2*_nb_decod_unit+1*_nb_ooo_engine))
+  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_context+1*_nb_decod_unit))
     usage (argc, argv);
 
@@ -60,13 +57,8 @@
   for (uint32_t i=0; i<_nb_decod_unit; i++)
     _size_inst_decod [i] = fromString<uint32_t>(argv[x++]);
-  uint32_t * _size_inst_commit              = new uint32_t [_nb_ooo_engine];
-  for (uint32_t i=0; i<_nb_ooo_engine; i++)
-    _size_inst_commit [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t   _size_inst_commit              = fromString<uint32_t>(argv[x++]);
   uint32_t * _link_context_to_decod_unit    = new uint32_t [_nb_context];
   for (uint32_t i=0; i<_nb_context; i++)
     _link_context_to_decod_unit [i] = fromString<uint32_t>(argv[x++]);
-  uint32_t * _link_decod_unit_to_ooo_engine = new uint32_t [_nb_decod_unit];
-  for (uint32_t i=0; i<_nb_decod_unit; i++)
-    _link_decod_unit_to_ooo_engine [i] = fromString<uint32_t>(argv[x++]);
 
   int _return = EXIT_SUCCESS;
@@ -76,5 +68,4 @@
 	(_nb_context                   ,
 	 _nb_decod_unit                ,
-	 _nb_ooo_engine                ,
 	 _nb_inst_branch_complete      ,
 	 _size_depth                   ,
@@ -83,5 +74,5 @@
 	 _size_inst_commit             ,
 	 _link_context_to_decod_unit   ,
-	 _link_decod_unit_to_ooo_engine
+         true
 	 );
       
@@ -98,7 +89,5 @@
   delete [] _size_depth;                   
   delete [] _size_inst_decod;              
-  delete [] _size_inst_commit;             
   delete [] _link_context_to_decod_unit;   
-  delete [] _link_decod_unit_to_ooo_engine;
 
   try 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp	(revision 83)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp	(revision 88)
@@ -48,4 +48,12 @@
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
+  ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_VAL               ," in_BRANCH_EVENT_VAL               ",Tcontrol_t   ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ACK               ,"out_BRANCH_EVENT_ACK               ",Tcontrol_t   ,_param->_nb_context);
+//ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID        ," in_BRANCH_EVENT_CONTEXT_ID        ",Tcontext_t   ,_param->_nb_context);
+//ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH             ," in_BRANCH_EVENT_DEPTH             ",Tdepth_t     ,_param->_nb_context);
+//ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION   ," in_BRANCH_EVENT_MISS_PREDICTION   ",Tcontrol_t   ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC       ," in_BRANCH_EVENT_ADDRESS_SRC       ",Taddress_t   ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST      ," in_BRANCH_EVENT_ADDRESS_DEST      ",Taddress_t   ,_param->_nb_context);
+
   ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL                ," in_DECOD_EVENT_VAL                ",Tcontrol_t   ,_param->_nb_decod_unit);
   ALLOC1_SC_SIGNAL(out_DECOD_EVENT_ACK                ,"out_DECOD_EVENT_ACK                ",Tcontrol_t   ,_param->_nb_decod_unit);
@@ -57,14 +65,14 @@
   ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR       ," in_DECOD_EVENT_ADDRESS_EPCR       ",Taddress_t   ,_param->_nb_decod_unit);
 						      				           
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_VAL               ," in_COMMIT_EVENT_VAL               ",Tcontrol_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL(out_COMMIT_EVENT_ACK               ,"out_COMMIT_EVENT_ACK               ",Tcontrol_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID        ," in_COMMIT_EVENT_CONTEXT_ID        ",Tcontext_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_DEPTH             ," in_COMMIT_EVENT_DEPTH             ",Tdepth_t     ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_TYPE              ," in_COMMIT_EVENT_TYPE              ",Tevent_type_t,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT     ," in_COMMIT_EVENT_IS_DELAY_SLOT     ",Tcontrol_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS           ," in_COMMIT_EVENT_ADDRESS           ",Taddress_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR      ," in_COMMIT_EVENT_ADDRESS_EPCR      ",Taddress_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ",Tcontrol_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR      ," in_COMMIT_EVENT_ADDRESS_EEAR      ",Taddress_t   ,_param->_nb_ooo_engine);
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_VAL               ," in_COMMIT_EVENT_VAL               ",Tcontrol_t   );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ACK               ,"out_COMMIT_EVENT_ACK               ",Tcontrol_t   );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID        ," in_COMMIT_EVENT_CONTEXT_ID        ",Tcontext_t   );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH             ," in_COMMIT_EVENT_DEPTH             ",Tdepth_t     );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_TYPE              ," in_COMMIT_EVENT_TYPE              ",Tevent_type_t);
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT     ," in_COMMIT_EVENT_IS_DELAY_SLOT     ",Tcontrol_t   );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS           ," in_COMMIT_EVENT_ADDRESS           ",Taddress_t   );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR      ," in_COMMIT_EVENT_ADDRESS_EPCR      ",Taddress_t   );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ",Tcontrol_t   );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR      ," in_COMMIT_EVENT_ADDRESS_EEAR      ",Taddress_t   );
 
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ," in_BRANCH_COMPLETE_VAL            ",Tcontrol_t   ,_param->_nb_inst_branch_complete);
@@ -78,7 +86,7 @@
 
 						      				           
-  ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL              ," in_NB_INST_DECOD_ALL              ",Tcounter_t   ,_param->_nb_decod_unit);
-  ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL             ," in_NB_INST_COMMIT_ALL             ",Tcounter_t   ,_param->_nb_ooo_engine);
-  ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM             ," in_NB_INST_COMMIT_MEM             ",Tcounter_t   ,_param->_nb_ooo_engine);
+  ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL              ," in_NB_INST_DECOD_ALL              ",Tcounter_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL             ," in_NB_INST_COMMIT_ALL             ",Tcounter_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM             ," in_NB_INST_COMMIT_MEM             ",Tcounter_t   ,_param->_nb_context   );
 						      				           
   ALLOC1_SC_SIGNAL(out_EVENT_VAL                      ,"out_EVENT_VAL                      ",Tcontrol_t   ,_param->_nb_context   );
@@ -89,16 +97,21 @@
   ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE               ,"out_EVENT_IS_DS_TAKE               ",Tcontrol_t   ,_param->_nb_context   );
 						      				           
-  ALLOC1_SC_SIGNAL(out_SPR_VAL                        ,"out_SPR_VAL                        ",Tcontrol_t   ,_param->_nb_context   );
-  ALLOC1_SC_SIGNAL( in_SPR_ACK                        ," in_SPR_ACK                        ",Tcontrol_t   ,_param->_nb_context   );
-  ALLOC1_SC_SIGNAL(out_SPR_EPCR                       ,"out_SPR_EPCR                       ",Taddress_t   ,_param->_nb_context   );
-  ALLOC1_SC_SIGNAL(out_SPR_EEAR                       ,"out_SPR_EEAR                       ",Taddress_t   ,_param->_nb_context   );
-  ALLOC1_SC_SIGNAL(out_SPR_EEAR_WEN                   ,"out_SPR_EEAR_WEN                   ",Tcontrol_t   ,_param->_nb_context   );
-  ALLOC1_SC_SIGNAL(out_SPR_SR_DSX                     ,"out_SPR_SR_DSX                     ",Tcontrol_t   ,_param->_nb_context   );
-  ALLOC1_SC_SIGNAL(out_SPR_SR_TO_ESR                  ,"out_SPR_SR_TO_ESR                  ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL                  ,"out_SPR_EVENT_VAL                  ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_SPR_EVENT_ACK                  ," in_SPR_EVENT_ACK                  ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EVENT_EPCR                 ,"out_SPR_EVENT_EPCR                 ",Taddress_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR                 ,"out_SPR_EVENT_EEAR                 ",Taddress_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN             ,"out_SPR_EVENT_EEAR_WEN             ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_DSX               ,"out_SPR_EVENT_SR_DSX               ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR            ,"out_SPR_EVENT_SR_TO_ESR            ",Tcontrol_t   ,_param->_nb_context   );
 						      				           
   ALLOC1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE           ,"out_CONTEXT_DECOD_ENABLE           ",Tcontrol_t   ,_param->_nb_context   );
 						      				           
-  ALLOC1_SC_SIGNAL( in_DEPTH_TAIL                     ," in_DEPTH_TAIL                     ",Tdepth_t     ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_DEPTH_MIN                      ," in_DEPTH_MIN                      ",Tdepth_t     ,_param->_nb_context   );
   
+  ALLOC1_SC_SIGNAL( in_SPR_SR_IEE                     ," in_SPR_SR_IEE                     ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL( in_SPR_SR_EPH                     ," in_SPR_SR_EPH                     ",Tcontrol_t   ,_param->_nb_context   );
+
+  ALLOC1_SC_SIGNAL( in_INTERRUPT_ENABLE               ," in_INTERRUPT_ENABLE               ",Tcontrol_t   ,_param->_nb_context   );
+
   /********************************************************
    * Instanciation
@@ -110,9 +123,16 @@
   (*(_Context_State->in_NRESET))       (*(in_NRESET));
 
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_VAL               ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_EVENT_ACK               ,_param->_nb_context);
+//INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CONTEXT_ID        ,_param->_nb_context);
+//INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_DEPTH             ,_param->_nb_context);
+//INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_MISS_PREDICTION   ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_SRC       ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST      ,_param->_nb_context);
   INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL                ,_param->_nb_decod_unit);
   INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK                ,_param->_nb_decod_unit);
   if (_param->_have_port_context_id)				        
   INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_CONTEXT_ID         ,_param->_nb_decod_unit);
-  if (_param->_have_port_max_depth)				        
+  if (_param->_have_port_depth)				        
   INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_DEPTH              ,_param->_nb_decod_unit);
   INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_TYPE               ,_param->_nb_decod_unit);
@@ -121,16 +141,16 @@
   INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS_EPCR       ,_param->_nb_decod_unit);
 								        
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_VAL               ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State,out_COMMIT_EVENT_ACK               ,_param->_nb_ooo_engine);
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_VAL               );
+  INSTANCE_SC_SIGNAL (_Context_State,out_COMMIT_EVENT_ACK               );
   if (_param->_have_port_context_id)				        
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_CONTEXT_ID        ,_param->_nb_ooo_engine);
-  if (_param->_have_port_max_depth)				        
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_DEPTH             ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_TYPE              ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT     ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS           ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR      ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR      ,_param->_nb_ooo_engine);
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_CONTEXT_ID        );
+  if (_param->_have_port_depth)				        
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_DEPTH             );
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_TYPE              );
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT     );
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS           );
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR      );
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL  );
+  INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR      );
 
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
@@ -138,5 +158,5 @@
   if (_param->_have_port_context_id)				        
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete);
-  if (_param->_have_port_max_depth)				        
+  if (_param->_have_port_depth)				        
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete);
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
@@ -145,7 +165,7 @@
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST   ,_param->_nb_inst_branch_complete);
 
-  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL              ,_param->_nb_decod_unit);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL             ,_param->_nb_ooo_engine);
-  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM             ,_param->_nb_ooo_engine);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL              ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL             ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM             ,_param->_nb_context   );
 								        
   INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_VAL                      ,_param->_nb_context   );
@@ -156,17 +176,22 @@
   INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_IS_DS_TAKE               ,_param->_nb_context   );
 								        
-  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_VAL                        ,_param->_nb_context   );
-  INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_ACK                        ,_param->_nb_context   );
-  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EPCR                       ,_param->_nb_context   );
-  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EEAR                       ,_param->_nb_context   );
-  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EEAR_WEN                   ,_param->_nb_context   );
-  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_SR_DSX                     ,_param->_nb_context   );
-  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_SR_TO_ESR                  ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL                  ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_EVENT_ACK                  ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EPCR                 ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR                 ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR_WEN             ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_DSX               ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_TO_ESR            ,_param->_nb_context   );
 								        
   INSTANCE1_SC_SIGNAL(_Context_State,out_CONTEXT_DECOD_ENABLE           ,_param->_nb_context   );
 
   for (uint32_t i=0; i<_param->_nb_context; i++)
-    if (_param->_have_port_depth [i])
-      INSTANCE_SC_SIGNAL(_Context_State, in_DEPTH_TAIL [i]);
+    if (_param->_have_port_depth)
+      INSTANCE_SC_SIGNAL(_Context_State, in_DEPTH_MIN [i]);
+
+  INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_IEE                     ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_EPH                     ,_param->_nb_context   );
+
+  INSTANCE1_SC_SIGNAL(_Context_State, in_INTERRUPT_ENABLE               ,_param->_nb_context   );
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -206,6 +231,5 @@
       for (uint32_t i=0; i<_param->_nb_decod_unit; i++)
 	in_DECOD_EVENT_VAL [i]->write(0);
-      for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
-	in_COMMIT_EVENT_VAL [i]->write(0);
+      in_COMMIT_EVENT_VAL ->write(0);
       for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
 	in_BRANCH_COMPLETE_VAL [i]->write(0);
@@ -213,6 +237,10 @@
       for (uint32_t i=0; i<_param->_nb_context; i++)
 	{
-	  in_EVENT_ACK [i]->write(0);
-	  in_SPR_ACK   [i]->write(0);
+          in_BRANCH_EVENT_VAL [i]->write(0);
+	  in_EVENT_ACK        [i]->write(0);
+	  in_SPR_EVENT_ACK    [i]->write(0);
+          in_SPR_SR_IEE       [i]->write(0);
+          in_SPR_SR_EPH       [i]->write(0);
+          in_INTERRUPT_ENABLE [i]->write(0);
 
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[i]->read(), 1);
@@ -220,10 +248,8 @@
 
       for (uint32_t i=0; i<_param->_nb_context; i++)
-	if (_param->_have_port_depth [i])
-	  in_DEPTH_TAIL [i]->write(i%_param->_size_depth[i]);
+	if (_param->_have_port_depth)
+	  in_DEPTH_MIN  [i]->write((_param->_array_size_depth[i]==0)?0:(i%_param->_array_size_depth[i]));
       
       uint32_t context    = rand()%_param->_nb_context;
-      uint32_t decod_unit = _param->_link_context_to_decod_unit    [context];
-      uint32_t ooo_engine = _param->_link_decod_unit_to_ooo_engine [decod_unit];
 
       if (1)
@@ -232,7 +258,7 @@
 	  
 	  LABEL("msync (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
 	  
 	  uint32_t port = rand()%_param->_nb_decod_unit;
@@ -242,6 +268,6 @@
 	  in_DECOD_EVENT_ADDRESS       [port]->write(0x100);
 	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbeef);
-	  if (_param->_have_port_depth [context])
-	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_DECOD_EVENT_DEPTH         [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));
 	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_MSYNC);
 	  
@@ -263,7 +289,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -274,15 +300,15 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
 	  SC_START(1);
 	  
 	  LABEL("msync (wait end)");
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  SC_START(3);
-	  
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  SC_START(1);
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
@@ -294,7 +320,7 @@
 
 	  LABEL("psync (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
 	  
 	  uint32_t port = rand()%_param->_nb_decod_unit;
@@ -304,6 +330,6 @@
 	  in_DECOD_EVENT_ADDRESS       [port]->write(0x200);
 	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbebe);
-	  if (_param->_have_port_depth [context])
-	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+          in_DECOD_EVENT_DEPTH         [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));
 	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_PSYNC);
 	  
@@ -325,7 +351,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -361,7 +387,7 @@
 
 	  LABEL("csync (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
 	  
 	  uint32_t port = rand()%_param->_nb_decod_unit;
@@ -371,6 +397,6 @@
 	  in_DECOD_EVENT_ADDRESS       [port]->write(0x200);
 	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbebe);
-	  if (_param->_have_port_depth [context])
-	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_DECOD_EVENT_DEPTH         [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));
 	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_CSYNC);
 	  
@@ -392,7 +418,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -426,7 +452,7 @@
 	  
 	  LABEL("spr (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
 	  
 	  uint32_t port = rand()%_param->_nb_decod_unit;
@@ -436,6 +462,6 @@
 	  in_DECOD_EVENT_ADDRESS       [port]->write(0x100);
 	  in_DECOD_EVENT_ADDRESS_EPCR  [port]->write(0xdeadbeef);
-	  if (_param->_have_port_depth [context])
-	  in_DECOD_EVENT_DEPTH         [port]->write((context+1)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_DECOD_EVENT_DEPTH         [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));
 	  in_DECOD_EVENT_TYPE          [port]->write(EVENT_TYPE_SPR_ACCESS);
 	  
@@ -457,7 +483,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -468,15 +494,15 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
 	  SC_START(1);
 	  
 	  LABEL("spr (wait end)");
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0);
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  
-	  SC_START(3);
-	  
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  
+	  SC_START(3);
+	  
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
 	  SC_START(1);
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
@@ -488,13 +514,13 @@
 	  
 	  LABEL("miss (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
 	  
 	  uint32_t port = rand()%_param->_nb_inst_branch_complete;
 	  
 	  in_BRANCH_COMPLETE_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_BRANCH_COMPLETE_DEPTH            [port]->write((context+1)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_BRANCH_COMPLETE_DEPTH            [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));
 	  in_BRANCH_COMPLETE_ADDRESS_SRC      [port]->write(0x400);
 	  in_BRANCH_COMPLETE_ADDRESS_DEST     [port]->write(0x500);
@@ -519,7 +545,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -558,13 +584,13 @@
 	  
 	  LABEL("miss (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
 	  
 	  uint32_t port = rand()%_param->_nb_inst_branch_complete;
 	  
 	  in_BRANCH_COMPLETE_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_BRANCH_COMPLETE_DEPTH            [port]->write((context+1)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_BRANCH_COMPLETE_DEPTH            [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));
 	  in_BRANCH_COMPLETE_ADDRESS_SRC      [port]->write(0x600);
 	  in_BRANCH_COMPLETE_ADDRESS_DEST     [port]->write(0x700);
@@ -589,7 +615,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -626,13 +652,13 @@
 	  
 	  LABEL("exception (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_decod_unit;
 	  
 	  in_DECOD_EVENT_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_DECOD_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_DECOD_EVENT_DEPTH            [port]->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));
 	  in_DECOD_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
 	  in_DECOD_EVENT_IS_DELAY_SLOT    [port]->write(0);
@@ -657,7 +683,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -693,24 +719,24 @@
 	  do
 	    {
-	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
-	  
-	      SC_START(0);
-	  
-	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
-	        {
-		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0x900);
-		//TEST(Taddress_t,out_SPR_EEAR      [context]->read(),);
-		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
-		  
-		  find = true;
-	        }
-	      
-	      SC_START(1);
-	    }
-	  while (not find);
-
-	  in_SPR_ACK [context]->write(0);
+	      in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EVENT_EPCR      [context]->read(),0x900);
+		//TEST(Taddress_t,out_SPR_EVENT_EEAR      [context]->read(),);
+		  TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX    [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_EVENT_ACK [context]->write(0);
 	}
 
@@ -720,13 +746,13 @@
 	  
 	  LABEL("exception (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  uint32_t port = rand()%_param->_nb_ooo_engine;
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  uint32_t port = rand()%_param->_nb_decod_unit;
 	  
 	  in_DECOD_EVENT_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_DECOD_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
+	  if (_param->_have_port_depth)
+	  in_DECOD_EVENT_DEPTH            [port]->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));
 	  in_DECOD_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
 	  in_DECOD_EVENT_IS_DELAY_SLOT    [port]->write(1);
@@ -751,7 +777,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -787,24 +813,24 @@
 	  do
 	    {
-	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
-	  
-	      SC_START(0);
-	  
-	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
-	        {
-		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0x900);
-		//TEST(Taddress_t,out_SPR_EEAR      [context]->read(),);
-		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),1);
-		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
-		  
-		  find = true;
-	        }
-	      
-	      SC_START(1);
-	    }
-	  while (not find);
-
-	  in_SPR_ACK [context]->write(0);
+	      in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EVENT_EPCR      [context]->read(),0x900);
+		//TEST(Taddress_t,out_SPR_EVENT_EEAR      [context]->read(),);
+		  TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX    [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_EVENT_ACK [context]->write(0);
 	}
 
@@ -814,31 +840,29 @@
 	  
 	  LABEL("exception (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  uint32_t port = rand()%_param->_nb_ooo_engine;
-	  
-	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
-	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
-	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(0);
-	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xa00);
-	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xb00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xc00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(0);
-
-	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
-	  
-	  do
-	    {
-	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
-	      
-	      SC_START(1);
-	    }
-	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
-		       out_COMMIT_EVENT_ACK [port]->read()));
-	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       ->write(context);
+	  if (_param->_have_port_depth)
+	  in_COMMIT_EVENT_DEPTH            ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));
+	  in_COMMIT_EVENT_TYPE             ->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    ->write(0);
+	  in_COMMIT_EVENT_ADDRESS          ->write(0xa00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     ->write(0xb00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     ->write(0xc00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL ->read() and
+		       out_COMMIT_EVENT_ACK ->read()));
+	  in_COMMIT_EVENT_VAL ->write(0);
 	  
 	  LABEL("exception (wait end)");
@@ -847,7 +871,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -883,24 +907,24 @@
 	  do
 	    {
-	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
-	  
-	      SC_START(0);
-	  
-	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
-	        {
-		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xb00);
-		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xc00);
-		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
-		  
-		  find = true;
-	        }
-	      
-	      SC_START(1);
-	    }
-	  while (not find);
-
-	  in_SPR_ACK [context]->write(0);
+	      in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EVENT_EPCR      [context]->read(),0xb00);
+		  TEST(Taddress_t,out_SPR_EVENT_EEAR      [context]->read(),0xc00);
+		  TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX    [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_EVENT_ACK [context]->write(0);
 	}
       
@@ -910,31 +934,29 @@
 	  
 	  LABEL("exception (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  uint32_t port = rand()%_param->_nb_ooo_engine;
-	  
-	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
-	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
-	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(1);
-	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xd00);
-	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xe00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xf00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(0);
-
-	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
-	  
-	  do
-	    {
-	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
-	      
-	      SC_START(1);
-	    }
-	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
-		       out_COMMIT_EVENT_ACK [port]->read()));
-	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       ->write(context);
+	  if (_param->_have_port_depth)
+	  in_COMMIT_EVENT_DEPTH            ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));
+	  in_COMMIT_EVENT_TYPE             ->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    ->write(1);
+	  in_COMMIT_EVENT_ADDRESS          ->write(0xd00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     ->write(0xe00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     ->write(0xf00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL ->read() and
+		       out_COMMIT_EVENT_ACK ->read()));
+	  in_COMMIT_EVENT_VAL ->write(0);
 	  
 	  LABEL("exception (wait end)");
@@ -943,7 +965,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -979,24 +1001,24 @@
 	  do
 	    {
-	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
-	  
-	      SC_START(0);
-	  
-	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
-	        {
-		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xe00);
-		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xf00);
-		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),1);
-		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
-		  
-		  find = true;
-	        }
-	      
-	      SC_START(1);
-	    }
-	  while (not find);
-
-	  in_SPR_ACK [context]->write(0);
+	      in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EVENT_EPCR      [context]->read(),0xe00);
+		  TEST(Taddress_t,out_SPR_EVENT_EEAR      [context]->read(),0xf00);
+		  TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN  [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX    [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_EVENT_ACK [context]->write(0);
 	}
 
@@ -1006,31 +1028,29 @@
 	  
 	  LABEL("exception (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  uint32_t port = rand()%_param->_nb_ooo_engine;
-	  
-	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
-	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
-	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(0);
-	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xa00);
-	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xb00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xc00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(1);
-
-	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
-	  
-	  do
-	    {
-	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
-	      
-	      SC_START(1);
-	    }
-	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
-		       out_COMMIT_EVENT_ACK [port]->read()));
-	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       ->write(context);
+	  if (_param->_have_port_depth)
+	  in_COMMIT_EVENT_DEPTH            ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));
+	  in_COMMIT_EVENT_TYPE             ->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    ->write(0);
+	  in_COMMIT_EVENT_ADDRESS          ->write(0xa00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     ->write(0xb00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     ->write(0xc00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL ->read() and
+		       out_COMMIT_EVENT_ACK ->read()));
+	  in_COMMIT_EVENT_VAL ->write(0);
 	  
 	  LABEL("exception (wait end)");
@@ -1039,7 +1059,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -1075,24 +1095,24 @@
 	  do
 	    {
-	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
-	  
-	      SC_START(0);
-	  
-	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
-	        {
-		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xb00);
-		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xc00);
-		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),1);
-		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),0);
-		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
-		  
-		  find = true;
-	        }
-	      
-	      SC_START(1);
-	    }
-	  while (not find);
-
-	  in_SPR_ACK [context]->write(0);
+	      in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EVENT_EPCR      [context]->read(),0xb00);
+		  TEST(Taddress_t,out_SPR_EVENT_EEAR      [context]->read(),0xc00);
+		  TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN  [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX    [context]->read(),0);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_EVENT_ACK [context]->write(0);
 	}
       
@@ -1102,31 +1122,29 @@
 	  
 	  LABEL("exception (begin)");
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(1);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(1);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(1);
-	  
-	  uint32_t port = rand()%_param->_nb_ooo_engine;
-	  
-	  in_COMMIT_EVENT_CONTEXT_ID       [port]->write(context);
-	  if (_param->_have_port_depth [context])
-	  in_COMMIT_EVENT_DEPTH            [port]->write((context)%_param->_size_depth[context]);
-	  in_COMMIT_EVENT_TYPE             [port]->write(EVENT_TYPE_EXCEPTION);
-	  in_COMMIT_EVENT_IS_DELAY_SLOT    [port]->write(1);
-	  in_COMMIT_EVENT_ADDRESS          [port]->write(0xd00);
-	  in_COMMIT_EVENT_ADDRESS_EPCR     [port]->write(0xe00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR     [port]->write(0xf00);
-	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL [port]->write(1);
-
-	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
-	  
-	  do
-	    {
-	      in_COMMIT_EVENT_VAL [port]->write(rand()%percent_transaction_commit_event);
-	      
-	      SC_START(1);
-	    }
-	  while (not ( in_COMMIT_EVENT_VAL [port]->read() and
-		       out_COMMIT_EVENT_ACK [port]->read()));
-	  in_COMMIT_EVENT_VAL [port]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(1);
+	  in_NB_INST_COMMIT_ALL [context]->write(1);
+	  in_NB_INST_COMMIT_MEM [context]->write(1);
+	  
+	  in_COMMIT_EVENT_CONTEXT_ID       ->write(context);
+	  if (_param->_have_port_depth)
+	  in_COMMIT_EVENT_DEPTH            ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));
+	  in_COMMIT_EVENT_TYPE             ->write(EVENT_TYPE_EXCEPTION);
+	  in_COMMIT_EVENT_IS_DELAY_SLOT    ->write(1);
+	  in_COMMIT_EVENT_ADDRESS          ->write(0xd00);
+	  in_COMMIT_EVENT_ADDRESS_EPCR     ->write(0xe00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR     ->write(0xf00);
+	  in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1);
+
+	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
+	  
+	  do
+	    {
+	      in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event);
+	      
+	      SC_START(1);
+	    }
+	  while (not ( in_COMMIT_EVENT_VAL ->read() and
+		       out_COMMIT_EVENT_ACK ->read()));
+	  in_COMMIT_EVENT_VAL ->write(0);
 	  
 	  LABEL("exception (wait end)");
@@ -1135,7 +1153,7 @@
 	  SC_START(3);
 	  
-	  in_NB_INST_DECOD_ALL  [decod_unit]->write(0);
-	  in_NB_INST_COMMIT_ALL [ooo_engine]->write(0);
-	  in_NB_INST_COMMIT_MEM [ooo_engine]->write(0);
+	  in_NB_INST_DECOD_ALL  [context]->write(0);
+	  in_NB_INST_COMMIT_ALL [context]->write(0);
+	  in_NB_INST_COMMIT_MEM [context]->write(0);
 	  
 	  SC_START(1);
@@ -1171,24 +1189,24 @@
 	  do
 	    {
-	      in_SPR_ACK [context]->write(rand()%percent_transaction_spr);
-	  
-	      SC_START(0);
-	  
-	      if (out_SPR_VAL [context]->read() and in_SPR_ACK [context]->read())
-	        {
-		  TEST(Taddress_t,out_SPR_EPCR      [context]->read(),0xe00);
-		  TEST(Taddress_t,out_SPR_EEAR      [context]->read(),0xf00);
-		  TEST(Tcontrol_t,out_SPR_EEAR_WEN  [context]->read(),1);
-		  TEST(Tcontrol_t,out_SPR_SR_DSX    [context]->read(),1);
-		  TEST(Tcontrol_t,out_SPR_SR_TO_ESR [context]->read(),1);
-		  
-		  find = true;
-	        }
-	      
-	      SC_START(1);
-	    }
-	  while (not find);
-
-	  in_SPR_ACK [context]->write(0);
+	      in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr);
+	  
+	      SC_START(0);
+	  
+	      if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read())
+	        {
+		  TEST(Taddress_t,out_SPR_EVENT_EPCR      [context]->read(),0xe00);
+		  TEST(Taddress_t,out_SPR_EVENT_EEAR      [context]->read(),0xf00);
+		  TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN  [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX    [context]->read(),1);
+		  TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1);
+		  
+		  find = true;
+	        }
+	      
+	      SC_START(1);
+	    }
+	  while (not find);
+
+	  in_SPR_EVENT_ACK [context]->write(0);
 	}
 
@@ -1210,4 +1228,11 @@
   delete in_NRESET;
 
+  DELETE1_SC_SIGNAL( in_BRANCH_EVENT_VAL               ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ACK               ,_param->_nb_context);
+//DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID        ,_param->_nb_context);
+//DELETE1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH             ,_param->_nb_context);
+//DELETE1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION   ,_param->_nb_context);
+  DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC       ,_param->_nb_context);
+  DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST      ,_param->_nb_context);
   DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL                ,_param->_nb_decod_unit);
   DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK                ,_param->_nb_decod_unit);
@@ -1218,14 +1243,14 @@
   DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS            ,_param->_nb_decod_unit);
   DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR       ,_param->_nb_decod_unit);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_VAL               ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL(out_COMMIT_EVENT_ACK               ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID        ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_DEPTH             ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_TYPE              ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT     ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS           ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR      ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL  ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR      ,_param->_nb_ooo_engine);
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_VAL               );
+  DELETE_SC_SIGNAL (out_COMMIT_EVENT_ACK               );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID        );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH             );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_TYPE              );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT     );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS           );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR      );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL  );
+  DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR      );
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
   DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
@@ -1236,7 +1261,7 @@
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC    ,_param->_nb_inst_branch_complete);
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST   ,_param->_nb_inst_branch_complete);
-  DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL              ,_param->_nb_decod_unit);
-  DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL             ,_param->_nb_ooo_engine);
-  DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM             ,_param->_nb_ooo_engine);
+  DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL              ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL             ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM             ,_param->_nb_context   );
   DELETE1_SC_SIGNAL(out_EVENT_VAL                      ,_param->_nb_context   );
   DELETE1_SC_SIGNAL( in_EVENT_ACK                      ,_param->_nb_context   );
@@ -1245,13 +1270,17 @@
   DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL         ,_param->_nb_context   );
   DELETE1_SC_SIGNAL(out_EVENT_IS_DS_TAKE               ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL(out_SPR_VAL                        ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL( in_SPR_ACK                        ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL(out_SPR_EPCR                       ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL(out_SPR_EEAR                       ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL(out_SPR_EEAR_WEN                   ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL(out_SPR_SR_DSX                     ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL(out_SPR_SR_TO_ESR                  ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL                  ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK                  ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EVENT_EPCR                 ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR                 ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN             ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_DSX               ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR            ,_param->_nb_context   );
   DELETE1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE           ,_param->_nb_context   );
-  DELETE1_SC_SIGNAL( in_DEPTH_TAIL                     ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_DEPTH_MIN                      ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_SPR_SR_IEE                     ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL( in_SPR_SR_EPH                     ,_param->_nb_context   );
+
+  DELETE1_SC_SIGNAL( in_INTERRUPT_ENABLE               ,_param->_nb_context   );
     }
 #endif
