Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp	(revision 86)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp	(revision 88)
@@ -14,4 +14,5 @@
 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h"
 #include "Behavioural/include/Constants.h"
+#include "Behavioural/include/Operation.h"
 
 namespace morpheo {
@@ -124,4 +125,5 @@
 	
     inst->_exception_use = EXCEPTION_USE_ILLEGAL_INSTRUCTION;
+    inst->_exception     = EXCEPTION_ILLEGAL_INSTRUCTION;
 
     if (inst->_is_delay_slot)
@@ -138,16 +140,16 @@
 
     uint32_t opcod = range<uint32_t>(inst->_instruction,31,26);
-
-    inst->_type = TYPE_CUSTOM;
+    
     switch (opcod)
       {
-      case OPCOD_L_CUST1 : {inst->_operation = OPERATION_CUSTOM_L_1; break;}
-      case OPCOD_L_CUST2 : {inst->_operation = OPERATION_CUSTOM_L_2; break;}
-      case OPCOD_L_CUST3 : {inst->_operation = OPERATION_CUSTOM_L_3; break;}
-      case OPCOD_L_CUST4 : {inst->_operation = OPERATION_CUSTOM_L_4; break;}
-      case OPCOD_L_CUST5 : {inst->_operation = OPERATION_CUSTOM_L_5; break;}
-      case OPCOD_L_CUST6 : {inst->_operation = OPERATION_CUSTOM_L_6; break;}
-      case OPCOD_L_CUST7 : {inst->_operation = OPERATION_CUSTOM_L_7; break;}
-      case OPCOD_L_CUST8 : {inst->_operation = OPERATION_CUSTOM_L_8; break;}
+      case OPCOD_L_CUST1 : {inst->_type = instruction_information(INSTRUCTION_L_CUST1)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST1)._operation; break;}
+      case OPCOD_L_CUST2 : {inst->_type = instruction_information(INSTRUCTION_L_CUST2)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST2)._operation; break;}
+      case OPCOD_L_CUST3 : {inst->_type = instruction_information(INSTRUCTION_L_CUST3)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST3)._operation; break;}
+      case OPCOD_L_CUST4 : {inst->_type = instruction_information(INSTRUCTION_L_CUST4)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST4)._operation; break;}
+      case OPCOD_L_CUST5 : {inst->_type = instruction_information(INSTRUCTION_L_CUST5)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST5)._operation; break;}
+      case OPCOD_L_CUST6 : {inst->_type = instruction_information(INSTRUCTION_L_CUST6)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST6)._operation; break;}
+      case OPCOD_L_CUST7 : {inst->_type = instruction_information(INSTRUCTION_L_CUST7)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST7)._operation; break;}
+      case OPCOD_L_CUST8 : {inst->_type = instruction_information(INSTRUCTION_L_CUST8)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST8)._operation; break;}
+
       default            : {throw ERRORMORPHEO("instruction_l_custom",_("Invalid Custom Opcod."));}
       }
@@ -164,9 +166,8 @@
     uint32_t opcod = range<uint32_t>(inst->_instruction, 7, 0);
 
-    inst->_type = TYPE_CUSTOM;
     switch (opcod)
       {
-//       case OPCOD_LF_CUST1_D : {inst->_operation = OPERATION_CUSTOM_LF_1_D; break;}
-//       case OPCOD_LF_CUST1_S : {inst->_operation = OPERATION_CUSTOM_LF_1_S; break;}
+//       case OPCOD_LF_CUST1_D : {inst->_type = instruction_information(INSTRUCTION_LF_CUST1_D)._type; inst->_operation = instruction_information(INSTRUCTION_LF_CUST1_D)._operation; break;}
+//       case OPCOD_LF_CUST1_S : {inst->_type = instruction_information(INSTRUCTION_LF_CUST1_S)._type; inst->_operation = instruction_information(INSTRUCTION_LF_CUST1_S)._operation; break;}
       default               : {throw ERRORMORPHEO("instruction_lf_custom",_("Invalid Custom Opcod."));}
       }
@@ -183,11 +184,10 @@
     uint32_t opcod = range<uint32_t>(inst->_instruction, 7, 0);
 
-    inst->_type = TYPE_CUSTOM;
     switch (opcod)
       {
-//       case OPCOD_LV_CUST1 : {inst->_operation = OPERATION_CUSTOM_LV_1; break;}
-//       case OPCOD_LV_CUST2 : {inst->_operation = OPERATION_CUSTOM_LV_2; break;}
-//       case OPCOD_LV_CUST3 : {inst->_operation = OPERATION_CUSTOM_LV_3; break;}
-//       case OPCOD_LV_CUST4 : {inst->_operation = OPERATION_CUSTOM_LV_4; break;}
+//       case OPCOD_LV_CUST1 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST1)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST1)._operation; break;}
+//       case OPCOD_LV_CUST2 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST2)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST2)._operation; break;}
+//       case OPCOD_LV_CUST3 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST3)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST3)._operation; break;}
+//       case OPCOD_LV_CUST4 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST4)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST4)._operation; break;}
       default             : {throw ERRORMORPHEO("instruction_lv_custom",_("Invalid Custom Opcod."));}
       }
@@ -252,6 +252,6 @@
   {
     log_printf(TRACE,Decod,"instruction_l_add","  * instruction   : l.add");
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_ADD;
+    inst->_type               = instruction_information(INSTRUCTION_L_ADD)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ADD)._operation; //OPERATION_ALU_L_ADD;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -267,8 +267,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -278,6 +280,6 @@
     log_printf(TRACE,Decod,"instruction_l_addc","  * instruction   : l.addc");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_ADD;
+    inst->_type               = instruction_information(INSTRUCTION_L_ADDC)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ADDC)._operation; //OPERATION_ALU_L_ADD;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -293,8 +295,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -304,6 +308,6 @@
     log_printf(TRACE,Decod,"instruction_l_addi","  * instruction   : l.addi");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_ADD;
+    inst->_type               = instruction_information(INSTRUCTION_L_ADDI)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ADDI)._operation; //OPERATION_ALU_L_ADD;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -319,8 +323,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -330,6 +336,6 @@
     log_printf(TRACE,Decod,"instruction_l_addic","  * instruction   : l.addic");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_ADD;
+    inst->_type               = instruction_information(INSTRUCTION_L_ADDIC)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ADDIC)._operation; //OPERATION_ALU_L_ADD;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -345,8 +351,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -356,23 +364,25 @@
     log_printf(TRACE,Decod,"instruction_l_and","  * instruction   : l.and");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_AND;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_AND)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_AND)._operation; //OPERATION_ALU_L_AND;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -382,6 +392,6 @@
     log_printf(TRACE,Decod,"instruction_l_andi","  * instruction   : l.andi");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_AND;
+    inst->_type               = instruction_information(INSTRUCTION_L_ANDI)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ANDI)._operation; //OPERATION_ALU_L_AND;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -397,8 +407,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -408,8 +420,9 @@
     log_printf(TRACE,Decod,"instruction_l_bf","  * instruction   : l.bf");
 
-    Tgeneral_data_t address_next = inst->_address+(EXTENDS(inst->_instruction,26)<<2);
-
-    inst->_type               = TYPE_BRANCH;
-    inst->_operation          = OPERATION_BRANCH_L_TEST_F;
+    Tgeneral_data_t address_next = signed(param->_size_data,inst->_address+EXTENDS(inst->_instruction,26)// <<2
+                                                   );
+
+    inst->_type               = instruction_information(INSTRUCTION_L_BF)._type     ; //TYPE_BRANCH;
+    inst->_operation          = instruction_information(INSTRUCTION_L_BF)._operation; //OPERATION_BRANCH_L_TEST_F;
     inst->_has_immediat       = 1;
     inst->_immediat           = address_next;
@@ -425,4 +438,5 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
     inst->_branch_condition   = BRANCH_CONDITION_FLAG_SET;
 //  inst->_branch_stack_write = 0;
@@ -430,4 +444,5 @@
     inst->_branch_direction   = range<Tgeneral_data_t   >(inst->_instruction,25,25);
     inst->_address_next       = address_next;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -437,8 +452,9 @@
     log_printf(TRACE,Decod,"instruction_l_bnf","  * instruction   : l.bnf");
 
-    Tgeneral_data_t address_next = inst->_address+(EXTENDS(inst->_instruction,26)<<2);
-
-    inst->_type               = TYPE_BRANCH;
-    inst->_operation          = OPERATION_BRANCH_L_TEST_NF;
+    Tgeneral_data_t address_next = signed(param->_size_data,inst->_address+EXTENDS(inst->_instruction,26)// <<2
+                                                   );
+
+    inst->_type               = instruction_information(INSTRUCTION_L_BNF)._type     ; //TYPE_BRANCH;
+    inst->_operation          = instruction_information(INSTRUCTION_L_BNF)._operation; //OPERATION_BRANCH_L_TEST_NF;
     inst->_has_immediat       = 1;
     inst->_immediat           = address_next;
@@ -454,8 +470,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
     inst->_branch_condition   = BRANCH_CONDITION_FLAG_UNSET;
 //  inst->_branch_stack_write = 0;
     inst->_branch_direction   = range<Tgeneral_data_t   >(inst->_instruction,25,25);
     inst->_address_next       = address_next;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -465,6 +483,6 @@
     log_printf(TRACE,Decod,"instruction_l_cmov","  * instruction   : l.cmov");
 
-    inst->_type               = TYPE_MOVE;
-    inst->_operation          = OPERATION_MOVE_L_CMOV;
+    inst->_type               = instruction_information(INSTRUCTION_L_CMOV)._type     ; //TYPE_MOVE;
+    inst->_operation          = instruction_information(INSTRUCTION_L_CMOV)._operation; //OPERATION_MOVE_L_CMOV;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -480,8 +498,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -497,6 +517,6 @@
     else
       {
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_CSYNC;
+    inst->_type               = instruction_information(INSTRUCTION_L_CSYNC)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_CSYNC)._operation; //OPERATION_SPECIAL_L_CSYNC;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -512,8 +532,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_CSYNC;
       }
@@ -533,6 +555,6 @@
     log_printf(TRACE,Decod,"instruction_l_div","  * instruction   : l.div");
 
-    inst->_type               = TYPE_MUL_DIV;
-    inst->_operation          = OPERATION_MUL_DIV_L_DIV;
+    inst->_type               = instruction_information(INSTRUCTION_L_DIV)._type     ; //TYPE_DIV;
+    inst->_operation          = instruction_information(INSTRUCTION_L_DIV)._operation; //OPERATION_DIV_L_DIV;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -548,8 +570,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -559,6 +583,6 @@
     log_printf(TRACE,Decod,"instruction_l_divu","  * instruction   : l.divu");
 
-    inst->_type               = TYPE_MUL_DIV;
-    inst->_operation          = OPERATION_MUL_DIV_L_DIVU;
+    inst->_type               = instruction_information(INSTRUCTION_L_DIVU)._type     ; //TYPE_DIV;
+    inst->_operation          = instruction_information(INSTRUCTION_L_DIVU)._operation; //OPERATION_DIV_L_DIVU;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -574,8 +598,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -585,6 +611,6 @@
     log_printf(TRACE,Decod,"instruction_l_extbs","  * instruction   : l.extbs");
 
-    inst->_type               = TYPE_EXTEND;
-    inst->_operation          = OPERATION_EXTEND_L_EXTEND_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_EXTBS)._type     ; //TYPE_EXTEND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_EXTBS)._operation; //OPERATION_EXTEND_L_EXTEND_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = 8;
@@ -600,8 +626,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -611,6 +639,6 @@
     log_printf(TRACE,Decod,"instruction_l_extbz","  * instruction   : l.extbz");
 
-    inst->_type               = TYPE_EXTEND;
-    inst->_operation          = OPERATION_EXTEND_L_EXTEND_Z;
+    inst->_type               = instruction_information(INSTRUCTION_L_EXTBZ)._type     ; //TYPE_EXTEND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_EXTBZ)._operation; //OPERATION_EXTEND_L_EXTEND_Z;
     inst->_has_immediat       = 1;
     inst->_immediat           = 8;
@@ -626,8 +654,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -637,6 +667,6 @@
     log_printf(TRACE,Decod,"instruction_l_exths","  * instruction   : l.exths");
 
-    inst->_type               = TYPE_EXTEND;
-    inst->_operation          = OPERATION_EXTEND_L_EXTEND_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_EXTHS)._type     ; //TYPE_EXTEND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_EXTHS)._operation; //OPERATION_EXTEND_L_EXTEND_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = 16;
@@ -652,8 +682,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -663,6 +695,6 @@
     log_printf(TRACE,Decod,"instruction_l_exthz","  * instruction   : l.exthz");
 
-    inst->_type               = TYPE_EXTEND;
-    inst->_operation          = OPERATION_EXTEND_L_EXTEND_Z;
+    inst->_type               = instruction_information(INSTRUCTION_L_EXTHZ)._type     ; //TYPE_EXTEND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_EXTHZ)._operation; //OPERATION_EXTEND_L_EXTEND_Z;
     inst->_has_immediat       = 1;
     inst->_immediat           = 16;
@@ -678,8 +710,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -689,6 +723,6 @@
     log_printf(TRACE,Decod,"instruction_l_extws","  * instruction   : l.extws");
 
-    inst->_type               = TYPE_EXTEND;
-    inst->_operation          = OPERATION_EXTEND_L_EXTEND_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_EXTWS)._type     ; //TYPE_EXTEND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_EXTWS)._operation; //OPERATION_EXTEND_L_EXTEND_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = 32;
@@ -704,8 +738,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -715,6 +751,6 @@
     log_printf(TRACE,Decod,"instruction_l_extwz","  * instruction   : l.extwz");
 
-    inst->_type               = TYPE_EXTEND;
-    inst->_operation          = OPERATION_EXTEND_L_EXTEND_Z;
+    inst->_type               = instruction_information(INSTRUCTION_L_EXTWZ)._type     ; //TYPE_EXTEND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_EXTWZ)._operation; //OPERATION_EXTEND_L_EXTEND_Z;
     inst->_has_immediat       = 1;
     inst->_immediat           = 32;
@@ -730,8 +766,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -741,23 +779,25 @@
     log_printf(TRACE,Decod,"instruction_l_ff1","  * instruction   : l.ff1");
 
-    inst->_type               = TYPE_FIND;
-    inst->_operation          = OPERATION_FIND_L_FF1;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 0;
-//  inst->_num_reg_rb         = ;
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_FF1)._type     ; //TYPE_FIND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_FF1)._operation; //OPERATION_FIND_L_FF1;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 0;
+//  inst->_num_reg_rb         = ;
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -767,23 +807,25 @@
     log_printf(TRACE,Decod,"instruction_l_fl1","  * instruction   : l.fl1");
 
-    inst->_type               = TYPE_FIND;
-    inst->_operation          = OPERATION_FIND_L_FL1;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 0;
-//  inst->_num_reg_rb         = ;
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_FL1)._type     ; //TYPE_FIND;
+    inst->_operation          = instruction_information(INSTRUCTION_L_FL1)._operation; //OPERATION_FIND_L_FL1;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 0;
+//  inst->_num_reg_rb         = ;
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -793,6 +835,6 @@
     log_printf(TRACE,Decod,"instruction_l_j","  * instruction   : l.j");
 
-    inst->_type               = TYPE_BRANCH;
-    inst->_operation          = OPERATION_BRANCH_NONE;
+    inst->_type               = instruction_information(INSTRUCTION_L_J)._type     ; //TYPE_BRANCH;
+    inst->_operation          = instruction_information(INSTRUCTION_L_J)._operation; //OPERATION_BRANCH_NONE;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -808,8 +850,11 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
     inst->_branch_condition   = BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK;
 //  inst->_branch_stack_write = 0;
     inst->_branch_direction   = 1;
-    inst->_address_next       = inst->_address+(EXTENDS(inst->_instruction,26)<<2);
+    inst->_address_next       = signed(param->_size_data,inst->_address+EXTENDS(inst->_instruction,26)// <<2
+                                                               );
+    inst->_no_execute         = 1;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -819,6 +864,6 @@
     log_printf(TRACE,Decod,"instruction_l_jal","  * instruction   : l.jal");
 
-    inst->_type               = TYPE_BRANCH;
-    inst->_operation          = OPERATION_BRANCH_L_JALR;
+    inst->_type               = instruction_information(INSTRUCTION_L_JAL)._type     ; //TYPE_BRANCH;
+    inst->_operation          = instruction_information(INSTRUCTION_L_JAL)._operation; //OPERATION_BRANCH_L_JALR;
     inst->_has_immediat       = 1;
     inst->_immediat           = inst->_address_next+1;
@@ -834,8 +879,11 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
     inst->_branch_condition   = BRANCH_CONDITION_NONE_WITH_WRITE_STACK; // Always jump
 //  inst->_branch_stack_write = 1;
     inst->_branch_direction   = 1;
-    inst->_address_next       = inst->_address+(EXTENDS(inst->_instruction,26)<<2);
+    inst->_address_next       = signed(param->_size_data,inst->_address+EXTENDS(inst->_instruction,26)// <<2
+                                                );
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -853,6 +901,6 @@
     else
       {
-    inst->_type               = TYPE_BRANCH;
-    inst->_operation          = OPERATION_BRANCH_L_JALR;
+    inst->_type               = instruction_information(INSTRUCTION_L_JALR)._type     ; //TYPE_BRANCH;
+    inst->_operation          = instruction_information(INSTRUCTION_L_JALR)._operation; //OPERATION_BRANCH_L_JALR;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -868,4 +916,5 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = (inst->_num_reg_rb == 9)?BRANCH_CONDITION_READ_STACK:BRANCH_CONDITION_READ_REGISTER;
     inst->_branch_condition   = BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK;
@@ -873,4 +922,5 @@
     inst->_branch_direction   = 1;
 //  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
       }
@@ -881,6 +931,6 @@
     log_printf(TRACE,Decod,"instruction_l_jr","  * instruction   : l.jr");
 
-    inst->_type               = TYPE_BRANCH;
-    inst->_operation          = OPERATION_BRANCH_L_JALR;
+    inst->_type               = instruction_information(INSTRUCTION_L_JR)._type     ; //TYPE_BRANCH;
+    inst->_operation          = instruction_information(INSTRUCTION_L_JR)._operation; //OPERATION_BRANCH_L_JALR;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -896,8 +946,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
     inst->_branch_condition   = (inst->_num_reg_rb == 9)?BRANCH_CONDITION_READ_STACK:BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK;
 //  inst->_branch_stack_write = 0;
     inst->_branch_direction   = 1;
 //  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -907,6 +959,6 @@
     log_printf(TRACE,Decod,"instruction_l_lbs","  * instruction   : l.lbs");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_8_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_LBS)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LBS)._operation; //OPERATION_MEMORY_LOAD_8_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -922,8 +974,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -933,6 +987,6 @@
     log_printf(TRACE,Decod,"instruction_l_lbz","  * instruction   : l.lbz");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_8_Z;
+    inst->_type               = instruction_information(INSTRUCTION_L_LBZ)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LBZ)._operation; //OPERATION_MEMORY_LOAD_8_Z;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -948,8 +1002,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -959,6 +1015,6 @@
     log_printf(TRACE,Decod,"instruction_l_ld","  * instruction   : l.ld");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_64_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_LD)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LD)._operation; //OPERATION_MEMORY_LOAD_64_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -974,8 +1030,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -985,6 +1043,6 @@
     log_printf(TRACE,Decod,"instruction_l_lhs","  * instruction   : l.lhs");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_16_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_LHS)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LHS)._operation; //OPERATION_MEMORY_LOAD_16_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1000,8 +1058,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1011,6 +1071,6 @@
     log_printf(TRACE,Decod,"instruction_l_lhz","  * instruction   : l.lhz");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_16_Z;
+    inst->_type               = instruction_information(INSTRUCTION_L_LHZ)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LHZ)._operation; //OPERATION_MEMORY_LOAD_16_Z;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1026,8 +1086,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1037,6 +1099,6 @@
     log_printf(TRACE,Decod,"instruction_l_lws","  * instruction   : l.lws");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_32_S;
+    inst->_type               = instruction_information(INSTRUCTION_L_LWS)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LWS)._operation; //OPERATION_MEMORY_LOAD_32_S;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1052,8 +1114,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1063,6 +1127,6 @@
     log_printf(TRACE,Decod,"instruction_l_lwz","  * instruction   : l.lwz");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_LOAD_32_Z;
+    inst->_type               = instruction_information(INSTRUCTION_L_LWZ)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_LWZ)._operation; //OPERATION_MEMORY_LOAD_32_Z;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1078,8 +1142,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1089,23 +1155,25 @@
     log_printf(TRACE,Decod,"instruction_l_mac","  * instruction   : l.mac");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MAC;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 0;
-//  inst->_num_reg_rd         = ;
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_type               = instruction_information(INSTRUCTION_L_MAC)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MAC)._operation; //OPERATION_SPECIAL_L_MAC;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 0;
+//  inst->_num_reg_rd         = ;
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_SPR_ACCESS;
   }
@@ -1115,6 +1183,6 @@
     log_printf(TRACE,Decod,"instruction_l_maci","  * instruction   : l.maci");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MAC;
+    inst->_type               = instruction_information(INSTRUCTION_L_MACI)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MACI)._operation; //OPERATION_SPECIAL_L_MAC;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(((range<Tgeneral_data_t   >(inst->_instruction,25,21)<<11)|
@@ -1131,8 +1199,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_SPR_ACCESS;
   }
@@ -1148,6 +1218,6 @@
     else
       {
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MACRC;
+    inst->_type               = instruction_information(INSTRUCTION_L_MACRC)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MACRC)._operation; //OPERATION_SPECIAL_L_MACRC;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1163,8 +1233,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_SPR_ACCESS;
       }
@@ -1175,6 +1247,6 @@
     log_printf(TRACE,Decod,"instruction_l_mfspr","  * instruction   : l.mfspr");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MFSPR;
+    inst->_type               = instruction_information(INSTRUCTION_L_MFSPR)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MFSPR)._operation; //OPERATION_SPECIAL_L_MFSPR;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -1190,8 +1262,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_SPR_ACCESS;
   }
@@ -1201,6 +1275,6 @@
     log_printf(TRACE,Decod,"instruction_l_movhi","  * instruction   : l.movhi");
 
-    inst->_type               = TYPE_MOVE;
-    inst->_operation          = OPERATION_MOVE_L_MOVHI;
+    inst->_type               = instruction_information(INSTRUCTION_L_MOVHI)._type     ; //TYPE_MOVE;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MOVHI)._operation; //OPERATION_MOVE_L_MOVHI;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -1216,8 +1290,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1227,23 +1303,25 @@
     log_printf(TRACE,Decod,"instruction_l_msb","  * instruction   : l.msb");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MSB;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 0;
-//  inst->_num_reg_rd         = ;
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_type               = instruction_information(INSTRUCTION_L_MSB)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MSB)._operation; //OPERATION_SPECIAL_L_MSB;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 0;
+//  inst->_num_reg_rd         = ;
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_SPR_ACCESS;
   }
@@ -1259,6 +1337,6 @@
     else
       {
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MSYNC;
+    inst->_type               = instruction_information(INSTRUCTION_L_MSYNC)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MSYNC)._operation; //OPERATION_SPECIAL_L_MSYNC;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1274,8 +1352,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_MSYNC;
       }
@@ -1286,6 +1366,6 @@
     log_printf(TRACE,Decod,"instruction_l_mtspr","  * instruction   : l.mtspr");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_MTSPR;
+    inst->_type               = instruction_information(INSTRUCTION_L_MTSPR)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MTSPR)._operation; //OPERATION_SPECIAL_L_MTSPR;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDZ(((range<Tgeneral_data_t   >(inst->_instruction,25,21)<<11)|
@@ -1302,8 +1382,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_SPR_ACCESS;
   }
@@ -1313,6 +1395,6 @@
     log_printf(TRACE,Decod,"instruction_l_mul","  * instruction   : l.mul");
 
-    inst->_type               = TYPE_MUL_DIV;
-    inst->_operation          = OPERATION_MUL_DIV_L_MUL;
+    inst->_type               = instruction_information(INSTRUCTION_L_MUL)._type     ; //TYPE_MUL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MUL)._operation; //OPERATION_MUL_L_MUL;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1328,8 +1410,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1339,6 +1423,6 @@
     log_printf(TRACE,Decod,"instruction_l_muli","  * instruction   : l.muli");
 
-    inst->_type               = TYPE_MUL_DIV;
-    inst->_operation          = OPERATION_MUL_DIV_L_MUL;
+    inst->_type               = instruction_information(INSTRUCTION_L_MULI)._type     ; //TYPE_MUL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MULI)._operation; //OPERATION_MUL_L_MUL;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1354,8 +1438,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1365,6 +1451,6 @@
     log_printf(TRACE,Decod,"instruction_l_mulu","  * instruction   : l.mulu");
 
-    inst->_type               = TYPE_MUL_DIV;
-    inst->_operation          = OPERATION_MUL_DIV_L_MULU;
+    inst->_type               = instruction_information(INSTRUCTION_L_MULU)._type     ; //TYPE_MUL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_MULU)._operation; //OPERATION_MUL_L_MULU;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1380,8 +1466,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1391,6 +1479,6 @@
     log_printf(TRACE,Decod,"instruction_l_nop","  * instruction   : l.nop");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_NOP;
+    inst->_type               = instruction_information(INSTRUCTION_L_NOP)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_NOP)._operation; //OPERATION_SPECIAL_L_NOP;
 //  inst->_has_immediat       = 1;
 //  inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -1408,8 +1496,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 1;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1419,23 +1509,25 @@
     log_printf(TRACE,Decod,"instruction_l_or","  * instruction   : l.or");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_OR;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_OR)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_OR)._operation; //OPERATION_ALU_L_OR;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1445,6 +1537,6 @@
     log_printf(TRACE,Decod,"instruction_l_ori","  * instruction   : l.ori");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_OR;
+    inst->_type               = instruction_information(INSTRUCTION_L_ORI)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ORI)._operation; //OPERATION_ALU_L_OR;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -1460,8 +1552,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1477,6 +1571,6 @@
     else
       {
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_PSYNC;
+    inst->_type               = instruction_information(INSTRUCTION_L_PSYNC)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_PSYNC)._operation; //OPERATION_SPECIAL_L_PSYNC;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1492,8 +1586,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_PSYNC;
       }
@@ -1504,6 +1600,6 @@
     log_printf(TRACE,Decod,"instruction_l_rfe","  * instruction   : l.rfe");
 
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_RFE;
+    inst->_type               = instruction_information(INSTRUCTION_L_RFE)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_RFE)._operation; //OPERATION_SPECIAL_L_RFE;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1519,8 +1615,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
 //  inst->_branch_direction   = ;
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 1;
     inst->_event_type         = EVENT_TYPE_NONE; // can't anticip this instruction : must read EPCR in rename stage
   }
@@ -1530,23 +1628,25 @@
     log_printf(TRACE,Decod,"instruction_l_ror","  * instruction   : l.ror");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_ROR;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_ROR)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_ROR)._operation; //OPERATION_SHIFT_L_ROR;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1556,6 +1656,6 @@
     log_printf(TRACE,Decod,"instruction_l_rori","  * instruction   : l.rori");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_ROR;
+    inst->_type               = instruction_information(INSTRUCTION_L_RORI)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_RORI)._operation; //OPERATION_SHIFT_L_ROR;
     inst->_has_immediat       = 1;
     inst->_immediat           = range<Tgeneral_data_t   >(inst->_instruction, 5, 0);
@@ -1571,8 +1671,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1582,6 +1684,6 @@
     log_printf(TRACE,Decod,"instruction_l_sb","  * instruction   : l.sb");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_STORE_8;
+    inst->_type               = instruction_information(INSTRUCTION_L_SB)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SB)._operation; //OPERATION_MEMORY_STORE_8;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(((range<Tgeneral_data_t   >(inst->_instruction,25,21)<<11)|
@@ -1598,8 +1700,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1609,6 +1713,6 @@
     log_printf(TRACE,Decod,"instruction_l_sb","  * instruction   : l.sb");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_STORE_64;
+    inst->_type               = instruction_information(INSTRUCTION_L_SD)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SD)._operation; //OPERATION_MEMORY_STORE_64;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(((range<Tgeneral_data_t   >(inst->_instruction,25,21)<<11)|
@@ -1625,8 +1729,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1636,6 +1742,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfeq","  * instruction   : l.sfeq");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFEQ;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFEQ)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFEQ)._operation; //OPERATION_TEST_L_SFEQ;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1651,8 +1757,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1662,6 +1770,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfeqi","  * instruction   : l.sfeqi");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFEQ;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFEQI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFEQI)._operation; //OPERATION_TEST_L_SFEQ;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1677,8 +1785,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1688,6 +1798,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfges","  * instruction   : l.sfges");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGES;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGES)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGES)._operation; //OPERATION_TEST_L_SFGES;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1703,8 +1813,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1714,6 +1826,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgesi","  * instruction   : l.sfgesi");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGES;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGESI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGESI)._operation; //OPERATION_TEST_L_SFGES;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1729,8 +1841,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1740,6 +1854,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgeu","  * instruction   : l.sfgeu");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGEU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGEU)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGEU)._operation; //OPERATION_TEST_L_SFGEU;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1755,8 +1869,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1766,6 +1882,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgeui","  * instruction   : l.sfgeui");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGEU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGEUI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGEUI)._operation; //OPERATION_TEST_L_SFGEU;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1781,8 +1897,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1792,6 +1910,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgts","  * instruction   : l.sfgts");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGTS;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGTS)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGTS)._operation; //OPERATION_TEST_L_SFGTS;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1807,8 +1925,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1818,6 +1938,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgtsi","  * instruction   : l.sfgtsi");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGTS;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGTSI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGTSI)._operation; //OPERATION_TEST_L_SFGTS;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1833,8 +1953,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1844,6 +1966,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgtu","  * instruction   : l.sfgtu");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGTU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGTU)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGTU)._operation; //OPERATION_TEST_L_SFGTU;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1859,8 +1981,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1870,6 +1994,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfgtui","  * instruction   : l.sfgtui");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFGTU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFGTUI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFGTUI)._operation; //OPERATION_TEST_L_SFGTU;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1885,8 +2009,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1896,6 +2022,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfles","  * instruction   : l.sfles");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLES;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLES)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLES)._operation; //OPERATION_TEST_L_SFLES;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1911,8 +2037,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1922,6 +2050,6 @@
     log_printf(TRACE,Decod,"instruction_l_sflesi","  * instruction   : l.sflesi");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLES;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLESI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLESI)._operation; //OPERATION_TEST_L_SFLES;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1937,8 +2065,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1948,6 +2078,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfleu","  * instruction   : l.sfleu");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLEU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLEU)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLEU)._operation; //OPERATION_TEST_L_SFLEU;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -1963,8 +2093,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -1974,6 +2106,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfleui","  * instruction   : l.sfleui");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLEU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLEUI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLEUI)._operation; //OPERATION_TEST_L_SFLEU;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -1989,8 +2121,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2000,6 +2134,6 @@
     log_printf(TRACE,Decod,"instruction_l_sflts","  * instruction   : l.sflts");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLTS;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLTS)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLTS)._operation; //OPERATION_TEST_L_SFLTS;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -2015,8 +2149,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2026,6 +2162,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfltsi","  * instruction   : l.sfltsi");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLTS;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLTSI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLTSI)._operation; //OPERATION_TEST_L_SFLTS;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -2041,8 +2177,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2052,6 +2190,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfltu","  * instruction   : l.sfltu");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLTU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLTU)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLTU)._operation; //OPERATION_TEST_L_SFLTU;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -2067,8 +2205,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2078,6 +2218,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfltui","  * instruction   : l.sfltui");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFLTU;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFLTUI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFLTUI)._operation; //OPERATION_TEST_L_SFLTU;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -2093,8 +2233,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2104,6 +2246,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfne","  * instruction   : l.sfne");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFNE;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFNE)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFNE)._operation; //OPERATION_TEST_L_SFNE;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -2119,8 +2261,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2130,6 +2274,6 @@
     log_printf(TRACE,Decod,"instruction_l_sfnei","  * instruction   : l.sfnei");
 
-    inst->_type               = TYPE_TEST;
-    inst->_operation          = OPERATION_TEST_L_SFNE;
+    inst->_type               = instruction_information(INSTRUCTION_L_SFNEI)._type     ; //TYPE_TEST;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SFNEI)._operation; //OPERATION_TEST_L_SFNE;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -2145,8 +2289,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_F;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2156,6 +2302,6 @@
     log_printf(TRACE,Decod,"instruction_l_sh","  * instruction   : l.sh");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_STORE_16;
+    inst->_type               = instruction_information(INSTRUCTION_L_SH)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SH)._operation; //OPERATION_MEMORY_STORE_16;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(((range<Tgeneral_data_t   >(inst->_instruction,25,21)<<11)|
@@ -2172,8 +2318,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2183,23 +2331,25 @@
     log_printf(TRACE,Decod,"instruction_l_sll","  * instruction   : l.sll");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_SLL;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_SLL)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SLL)._operation; //OPERATION_SHIFT_L_SLL;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2209,6 +2359,6 @@
     log_printf(TRACE,Decod,"instruction_l_slli","  * instruction   : l.slli");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_SLL;
+    inst->_type               = instruction_information(INSTRUCTION_L_SLLI)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SLLI)._operation; //OPERATION_SHIFT_L_SLL;
     inst->_has_immediat       = 1;
     inst->_immediat           = range<Tgeneral_data_t   >(inst->_instruction, 5, 0);
@@ -2224,8 +2374,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2235,23 +2387,25 @@
     log_printf(TRACE,Decod,"instruction_l_sra","  * instruction   : l.sra");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_SRA;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_SRA)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SRA)._operation; //OPERATION_SHIFT_L_SRA;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2261,6 +2415,6 @@
     log_printf(TRACE,Decod,"instruction_l_srai","  * instruction   : l.srai");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_SRA;
+    inst->_type               = instruction_information(INSTRUCTION_L_SRAI)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SRAI)._operation; //OPERATION_SHIFT_L_SRA;
     inst->_has_immediat       = 1;
     inst->_immediat           = range<Tgeneral_data_t   >(inst->_instruction, 5, 0);
@@ -2276,8 +2430,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2287,23 +2443,25 @@
     log_printf(TRACE,Decod,"instruction_l_srl","  * instruction   : l.srl");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_SRL;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_SRL)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SRL)._operation; //OPERATION_SHIFT_L_SRL;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2313,6 +2471,6 @@
     log_printf(TRACE,Decod,"instruction_l_srli","  * instruction   : l.srli");
 
-    inst->_type               = TYPE_SHIFT;
-    inst->_operation          = OPERATION_SHIFT_L_SRL;
+    inst->_type               = instruction_information(INSTRUCTION_L_SRLI)._type     ; //TYPE_SHIFT;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SRLI)._operation; //OPERATION_SHIFT_L_SRL;
     inst->_has_immediat       = 1;
     inst->_immediat           = range<Tgeneral_data_t   >(inst->_instruction, 5, 0);
@@ -2328,8 +2486,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2339,6 +2499,6 @@
     log_printf(TRACE,Decod,"instruction_l_sub","  * instruction   : l.sub");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_SUB;
+    inst->_type               = instruction_information(INSTRUCTION_L_SUB)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SUB)._operation; //OPERATION_ALU_L_SUB;
     inst->_has_immediat       = 0;
 //  inst->_immediat           = ;
@@ -2354,8 +2514,10 @@
     inst->_num_reg_re         = SPR_LOGIC_SR_CY_OV;
     inst->_exception_use      = EXCEPTION_USE_RANGE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2365,6 +2527,6 @@
     log_printf(TRACE,Decod,"instruction_l_sw","  * instruction   : l.sw");
 
-    inst->_type               = TYPE_MEMORY;
-    inst->_operation          = OPERATION_MEMORY_STORE_32;
+    inst->_type               = instruction_information(INSTRUCTION_L_SW)._type     ; //TYPE_MEMORY;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SW)._operation; //OPERATION_MEMORY_STORE_32;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(((range<Tgeneral_data_t   >(inst->_instruction,25,21)<<11)|
@@ -2381,8 +2543,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_MEMORY_WITH_ALIGNMENT;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2398,6 +2562,6 @@
     else
       {
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_SYS;
+    inst->_type               = instruction_information(INSTRUCTION_L_SYS)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_SYS)._operation; //OPERATION_SPECIAL_L_SYS;
 //  inst->_has_immediat       = 1;
 //  inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -2415,4 +2579,5 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_SYSCALL;
+    inst->_exception          = EXCEPTION_SYSCALL;
 //  inst->_branch_condition   = ;
 //  inst->_branch_stack_write = ;
@@ -2426,4 +2591,5 @@
 
 //  inst->_address_next       = ; // don't change
+    inst->_no_execute         = 1;
     inst->_event_type         = EVENT_TYPE_EXCEPTION;
       }
@@ -2440,6 +2606,6 @@
     else
       {
-    inst->_type               = TYPE_SPECIAL;
-    inst->_operation          = OPERATION_SPECIAL_L_TRAP;
+    inst->_type               = instruction_information(INSTRUCTION_L_TRAP)._type     ; //TYPE_SPECIAL;
+    inst->_operation          = instruction_information(INSTRUCTION_L_TRAP)._operation; //OPERATION_SPECIAL_L_TRAP;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDZ(inst->_instruction,16);
@@ -2455,8 +2621,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_TRAP;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 1;
     inst->_event_type         = EVENT_TYPE_NONE;
       }
@@ -2467,23 +2635,25 @@
     log_printf(TRACE,Decod,"instruction_l_xor","  * instruction   : l.xor");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_XOR;
-    inst->_has_immediat       = 0;
-//  inst->_immediat           = ;
-    inst->_read_ra            = 1;
-    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
-    inst->_read_rb            = 1;
-    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
-    inst->_read_rc            = 0;
-//  inst->_num_reg_rc         = ;
-    inst->_write_rd           = 1;
-    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
-    inst->_write_re           = 0;
-//  inst->_num_reg_re         = ;
-    inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_type               = instruction_information(INSTRUCTION_L_XOR)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_XOR)._operation; //OPERATION_ALU_L_XOR;
+    inst->_has_immediat       = 0;
+//  inst->_immediat           = ;
+    inst->_read_ra            = 1;
+    inst->_num_reg_ra         = range<Tgeneral_address_t>(inst->_instruction,20,16);
+    inst->_read_rb            = 1;
+    inst->_num_reg_rb         = range<Tgeneral_address_t>(inst->_instruction,15,11);
+    inst->_read_rc            = 0;
+//  inst->_num_reg_rc         = ;
+    inst->_write_rd           = 1;
+    inst->_num_reg_rd         = range<Tgeneral_address_t>(inst->_instruction,25,21);
+    inst->_write_re           = 0;
+//  inst->_num_reg_re         = ;
+    inst->_exception_use      = EXCEPTION_USE_NONE;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
@@ -2493,6 +2663,6 @@
     log_printf(TRACE,Decod,"instruction_l_xori","  * instruction   : l.xori");
 
-    inst->_type               = TYPE_ALU;
-    inst->_operation          = OPERATION_ALU_L_XOR;
+    inst->_type               = instruction_information(INSTRUCTION_L_XORI)._type     ; //TYPE_ALU;
+    inst->_operation          = instruction_information(INSTRUCTION_L_XORI)._operation; //OPERATION_ALU_L_XOR;
     inst->_has_immediat       = 1;
     inst->_immediat           = EXTENDS(inst->_instruction,16);
@@ -2508,8 +2678,10 @@
 //  inst->_num_reg_re         = ;
     inst->_exception_use      = EXCEPTION_USE_NONE;
-//  inst->_branch_condition   = ;
-//  inst->_branch_stack_write = ;
-//  inst->_branch_direction   = ;
-//  inst->_address_next       = ;
+    inst->_exception          = EXCEPTION_DECOD_NONE;
+//  inst->_branch_condition   = ;
+//  inst->_branch_stack_write = ;
+//  inst->_branch_direction   = ;
+//  inst->_address_next       = ;
+    inst->_no_execute         = 0;
     inst->_event_type         = EVENT_TYPE_NONE;
   }
