Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp	(revision 85)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp	(revision 88)
@@ -57,11 +57,11 @@
     // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("icache_req",OUT, WEST, "Instruction cache request.");
+      ALLOC_INTERFACE("icache_req",OUT, WEST, _("Instruction cache request."));
 
       ALLOC_VALACK_OUT(out_ICACHE_REQ_VAL      ,VAL);
       ALLOC_VALACK_IN ( in_ICACHE_REQ_ACK      ,ACK);
     //ALLOC_SIGNAL_OUT(out_ICACHE_REQ_THREAD_ID,"thread_id",Tcontext_t           ,_param->_size_context_id );
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_PACKET_ID,"packet_id",Tpacket_t            ,_param->_size_queue_ptr  );
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS  ,"address"  ,Ticache_instruction_t,_param->_size_address    );
+      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_PACKET_ID,"packet_id",Tpacket_t            ,_param->_size_ifetch_queue_ptr  );
+      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS  ,"address"  ,Ticache_instruction_t,_param->_size_instruction_address    );
       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_TYPE     ,"type"     ,Ticache_type_t       ,_param->_size_icache_type);
     }
@@ -69,14 +69,14 @@
     // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("icache_rsp",IN , WEST, "Instruction cache respons.");
+      ALLOC_INTERFACE("icache_rsp",IN , WEST, _("Instruction cache respons."));
 
       ALLOC_VALACK_IN  ( in_ICACHE_RSP_VAL        ,VAL);
       ALLOC_VALACK_OUT (out_ICACHE_RSP_ACK        ,ACK);
     //ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_THREAD_ID  ,"thread_id"  ,Tcontext_t           ,_param->_size_context_id  );
-      ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_PACKET_ID  ,"packet_id"  ,Tpacket_t            ,_param->_size_queue_ptr   );
+      ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_PACKET_ID  ,"packet_id"  ,Tpacket_t            ,_param->_size_ifetch_queue_ptr   );
       ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_ERROR      ,"error"      ,Ticache_error_t      ,_param->_size_icache_error);
     }
     {
-      ALLOC1_INTERFACE("icache_rsp",IN , WEST, "Instruction cache respons.",_param->_nb_instruction);
+      ALLOC1_INTERFACE("icache_rsp",IN , WEST, _("Instruction cache respons."),_param->_nb_instruction);
 
       ALLOC1_SIGNAL_IN ( in_ICACHE_RSP_INSTRUCTION,"instruction",Ticache_instruction_t,_param->_size_instruction );
@@ -85,19 +85,19 @@
     // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("predict",OUT, NORTH, "Acces Instruction cache respons.");
+      ALLOC_INTERFACE("predict",OUT, NORTH, _("Predict the next pc."));
 
       ALLOC_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
       ALLOC_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
-      ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_address);
-      ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_address);
+      ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
+      ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
-      ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_address);
+      ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
-      ALLOC_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr);
+      ALLOC_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
-      ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction);
-    }
-    {
-      ALLOC1_INTERFACE("predict",IN , NORTH, "Acces Instruction cache respons.",_param->_nb_instruction);
+      ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
+    }
+    {
+      ALLOC1_INTERFACE("predict",IN , NORTH, _("Predict the next pc."),_param->_nb_instruction);
 
       ALLOC1_SIGNAL_IN ( in_PREDICT_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t        ,1);
@@ -106,15 +106,15 @@
     // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("decod",OUT , EAST, "Send bundle to the decod unit.");
+      ALLOC_INTERFACE("decod",OUT , EAST, _("Send bundle to the decod unit."));
 
     //ALLOC_SIGNAL_OUT (out_DECOD_CONTEXT_ID                 ,"context_id"                 ,Tcontext_t        ,_param->_size_context_id);
-      ALLOC_SIGNAL_OUT (out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_address);
-      ALLOC_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_instruction_ptr);
+      ALLOC_SIGNAL_OUT (out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address);
+      ALLOC_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
       ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
-      ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_branch_update_prediction);
+      ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
       ALLOC_SIGNAL_OUT (out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
     }
     {
-      ALLOC1_INTERFACE("decod",OUT , EAST, "Send bundle to the decod unit.",_param->_nb_instruction);
+      ALLOC1_INTERFACE("decod",OUT , EAST, _("Send bundle to the decod unit."),_param->_nb_instruction);
 
       ALLOC1_VALACK_OUT(out_DECOD_VAL                        ,VAL);
@@ -125,9 +125,12 @@
     // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("event",IN , NORTH, "Event interface.");
-
-      ALLOC_VALACK_IN ( in_EVENT_VAL    ,VAL);
-      ALLOC_VALACK_OUT(out_EVENT_ACK    ,ACK);
-      ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS,"address",Tgeneral_address_t,_param->_size_address);
+      ALLOC_INTERFACE("event",IN , NORTH, _("Event interface."));
+
+      ALLOC_VALACK_IN ( in_EVENT_VAL              ,VAL);
+      ALLOC_VALACK_OUT(out_EVENT_ACK              ,ACK);
+      ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS          ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
+      ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT     ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
+      ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"address_next_val",Tcontrol_t,1);
+      ALLOC_SIGNAL_IN ( in_EVENT_IS_DS_TAKE       ,"is_ds_take"      ,Tcontrol_t,1);
     }
     
@@ -137,5 +140,5 @@
     {
       name = _name+"_address_management";
-      std::cout << "Create   : " << name << std::endl;
+      log_printf(Ifetch_unit,Core,FUNCTION,_("Create   : %s"),name.c_str());
       
       _component_address_management = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::address_management::Address_management
@@ -156,5 +159,5 @@
     {
       name = _name+"_ifetch_queue";
-      std::cout << "Create   : " << name << std::endl;
+      log_printf(Ifetch_unit,Core,FUNCTION,_("Create   : %s"),name.c_str());
       
       _component_ifetch_queue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue
@@ -175,5 +178,5 @@
     {
       name = _name+"_ifetch_unit_glue";
-      std::cout << "Create   : " << name << std::endl;
+      log_printf(Ifetch_unit,Core,FUNCTION,_("Create   : %s"),name.c_str());
       
       _component_ifetch_unit_glue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_unit_glue::Ifetch_unit_Glue
@@ -200,5 +203,5 @@
     {
       src = _name+"_address_management";
-      std::cout << "Instance : " << src << std::endl;
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
 	   
       {
@@ -225,10 +228,10 @@
 	  }
 
-	if (_param->_have_port_instruction_ptr)
+	if (_param->_have_port_inst_ifetch_ptr)
 	COMPONENT_MAP(_component,src ,"out_ADDRESS_INST_IFETCH_PTR"            ,
 		                 dest, "in_ADDRESS_INST_IFETCH_PTR"            );
 	COMPONENT_MAP(_component,src ,"out_ADDRESS_BRANCH_STATE"               ,
 		                 dest, "in_ADDRESS_BRANCH_STATE"               );
-	if (_param->_have_port_branch_update_prediction_id)
+	if (_param->_have_port_depth)
 	COMPONENT_MAP(_component,src ,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",
 		                 dest, "in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID");
@@ -281,10 +284,10 @@
 	PORT_MAP(_component,src , "in_PREDICT_PC_NEXT_IS_DS_TAKE"         
 		           ,dest, "in_PREDICT_PC_NEXT_IS_DS_TAKE"         );
-	if (_param->_have_port_instruction_ptr)
+	if (_param->_have_port_inst_ifetch_ptr)
 	PORT_MAP(_component,src , "in_PREDICT_INST_IFETCH_PTR"            
 		           ,dest, "in_PREDICT_INST_IFETCH_PTR"            );
 	PORT_MAP(_component,src , "in_PREDICT_BRANCH_STATE"               
 		           ,dest, "in_PREDICT_BRANCH_STATE"               );
-	if (_param->_have_port_branch_update_prediction_id)
+	if (_param->_have_port_depth)
 	PORT_MAP(_component,src , "in_PREDICT_BRANCH_UPDATE_PREDICTION_ID"
 		           ,dest, "in_PREDICT_BRANCH_UPDATE_PREDICTION_ID");
@@ -306,5 +309,8 @@
 
 	dest = _name;
-	PORT_MAP(_component,src , "in_EVENT_ADDRESS",dest, "in_EVENT_ADDRESS");
+	PORT_MAP(_component,src , "in_EVENT_ADDRESS"         ,dest , "in_EVENT_ADDRESS"          );
+	PORT_MAP(_component,src , "in_EVENT_ADDRESS_NEXT"    ,dest , "in_EVENT_ADDRESS_NEXT"     );
+	PORT_MAP(_component,src , "in_EVENT_ADDRESS_NEXT_VAL",dest , "in_EVENT_ADDRESS_NEXT_VAL" );
+	PORT_MAP(_component,src , "in_EVENT_IS_DS_TAKE"      ,dest , "in_EVENT_IS_DS_TAKE"       );
       }
     }
@@ -315,5 +321,5 @@
     {
       src = _name+"_ifetch_queue";
-      std::cout << "Instance : " << src << std::endl;
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
 	   
       {
@@ -335,5 +341,5 @@
 #endif
 
-	if (_param->_have_port_queue_ptr)
+	if (_param->_have_port_ifetch_queue_ptr)
 	PORT_MAP(_component,src ,"out_ADDRESS_IFETCH_QUEUE_ID"            ,
 		            dest,"out_ICACHE_REQ_PACKET_ID"               );
@@ -386,8 +392,8 @@
 
 	PORT_MAP(_component,src ,"out_DECOD_ADDRESS"                    ,dest,"out_DECOD_ADDRESS"                    );
-	if (_param->_have_port_instruction_ptr)
+	if (_param->_have_port_inst_ifetch_ptr)
 	PORT_MAP(_component,src ,"out_DECOD_INST_IFETCH_PTR"            ,dest,"out_DECOD_INST_IFETCH_PTR"            );
 	PORT_MAP(_component,src ,"out_DECOD_BRANCH_STATE"               ,dest,"out_DECOD_BRANCH_STATE"               );
-	if (_param->_have_port_branch_update_prediction_id)
+	if (_param->_have_port_depth)
 	PORT_MAP(_component,src ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID",dest,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID");
 	PORT_MAP(_component,src ,"out_DECOD_EXCEPTION"                  ,dest,"out_DECOD_EXCEPTION"                  );
@@ -404,5 +410,5 @@
 	PORT_MAP(_component,src , "in_ICACHE_RSP_VAL"      ,dest, "in_ICACHE_RSP_VAL"      );
 	PORT_MAP(_component,src ,"out_ICACHE_RSP_ACK"      ,dest,"out_ICACHE_RSP_ACK"      );
-	if (_param->_have_port_queue_ptr)
+	if (_param->_have_port_ifetch_queue_ptr)
 	PORT_MAP(_component,src , "in_ICACHE_RSP_PACKET_ID",dest, "in_ICACHE_RSP_PACKET_ID");
 	PORT_MAP(_component,src , "in_ICACHE_RSP_ERROR"    ,dest, "in_ICACHE_RSP_ERROR"    );
@@ -437,5 +443,5 @@
     {
       src = _name+"_ifetch_unit_glue";
-      std::cout << "Instance : " << src << std::endl;
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
 	   
       {
@@ -490,9 +496,11 @@
 
     // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
-    if (DEBUG_Ifetch_unit == true)
-      _component->test_map();
-
-#ifdef POSITION
-    _component->generate_file();
+#if DEBUG_Ifetch_unit == true
+    _component->test_map();
+#endif
+    
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
