Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Branch_Target_Buffer_Register_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_min.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_min.cfg	(revision 88)
@@ -4,5 +4,5 @@
 1 	1	*4	# size_buffer    
 1 	1	*4	# associativity  
-32	32	*2	# size_address   
+30	30	*2	# size_address   
 2	2	+1	# size_counter   
 1	1	*4	# nb_inst_predict
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_mono_context.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_mono_context.cfg	(revision 88)
@@ -4,5 +4,5 @@
 16	16	*4	# size_buffer    
 2 	16	*4	# associativity  
-32	32	*2	# size_address   
+30	30	*2	# size_address   
 2	2	+1	# size_counter   
 1	4	*4	# nb_inst_predict
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_multi_context.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/config_multi_context.cfg	(revision 88)
@@ -7,5 +7,5 @@
 8 	64	*4	# size_buffer    
 4	8	*2	# associativity  
-32	32	*2	# size_address   
+30	30	*2	# size_address   
 2	2	+1	# size_counter   
 1	4	*4	# nb_inst_predict
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test_BTB.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test_BTB.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test_BTB.h	(revision 88)
@@ -0,0 +1,67 @@
+#ifndef test_BTB
+#define test_BTB
+
+  class entry_t
+  {
+  public : Tcontrol_t          _val             ;
+  public : Tcontext_t          _context         ;
+  public : Tcontrol_t          _address_dest_val;
+  public : Tgeneral_data_t     _address_src     ;
+  public : Tgeneral_data_t     _address_dest    ;
+  public : Tbranch_condition_t _condition       ;
+  public : Tcontrol_t          _last_take       ;
+  public : Tcounter_t          _accurate        ;
+
+  public : bool hit (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param,
+		     Tgeneral_data_t addr_test,
+		     Tcontext_t      context)
+    {
+      Tgeneral_data_t addr_src_offset  = (_address_src  >> _param->_shift_offset)&_param->_mask_offset;
+      Tgeneral_data_t addr_src_index   = (_address_src  >> _param->_shift_bank  )&_param->_mask_bank  ;
+      Tgeneral_data_t addr_src_tag     = (_address_src  >> _param->_shift_tag   );
+      
+      Tgeneral_data_t addr_test_offset = (addr_test >> _param->_shift_offset)&_param->_mask_offset;
+      Tgeneral_data_t addr_test_index  = (addr_test >> _param->_shift_bank  )&_param->_mask_bank  ;
+      Tgeneral_data_t addr_test_tag    = (addr_test >> _param->_shift_tag   );
+
+      bool is_hit = ( (_val             == 1               ) and
+		      (_context         == context         ) and
+		      (addr_test_tag    == addr_src_tag    ) and
+		      (addr_test_index  == addr_src_index  ) and
+		      (addr_test_offset <= addr_src_offset ));
+
+      LABEL("address_src  (tag, index, offset) : %.8x %.8x %.8x",addr_src_tag, addr_src_index, addr_src_offset);
+      LABEL("address_test (tag, index, offset) : %.8x %.8x %.8x - hit : %d",addr_test_tag, addr_test_index, addr_test_offset, is_hit);
+      return is_hit;
+    }
+    
+  public : void print (void)
+    {
+      LABEL("%d - %.2d %.8x %.1d %.8x %.3d %.1d %.4d", 
+	    _val             ,
+	    _context         ,
+	    _address_src     ,
+	    _address_dest_val,
+	    _address_dest    ,
+	    _condition       ,
+	    _last_take       ,
+	    _accurate        );
+    }
+    
+  };
+
+Tgeneral_data_t gen_addr (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param,
+			  Tgeneral_data_t index)
+{
+  Tgeneral_data_t addr_tag     = (rand()%(_param->_associativity)) << _param->_shift_tag   ;
+  Tgeneral_data_t addr_index   = (index &_param->_mask_bank        ) << _param->_shift_bank  ;
+  Tgeneral_data_t addr_offset  = (rand()&_param->_mask_offset      ) << _param->_shift_offset;
+
+  LABEL("gen_addr     (tag, index, offset) : %.8x %.8x %.8x",addr_tag, addr_index, addr_offset);
+
+  return (addr_tag    |
+	  addr_index  |
+	  addr_offset );
+}
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/main.cpp	(revision 88)
@@ -67,5 +67,7 @@
 	 _nb_inst_predict,
 	 _nb_inst_decod  ,
-	 _nb_inst_commit );
+	 _nb_inst_commit ,
+         true // is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/src/test.cpp	(revision 88)
@@ -14,71 +14,5 @@
 #include "Common/include/BitManipulation.h"
 #include "Behavioural/include/Allocation.h"
-
-  class entry_t
-  {
-  public : Tcontrol_t          _val             ;
-  public : Tcontext_t          _context         ;
-  public : Tcontrol_t          _address_dest_val;
-  public : Tgeneral_data_t     _address_src     ;
-  public : Tgeneral_data_t     _address_dest    ;
-  public : Tbranch_condition_t _condition       ;
-  public : Tcontrol_t          _last_take       ;
-  public : Tcounter_t          _accurate        ;
-
-  public : bool hit (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param,
-		     Tgeneral_data_t addr_test,
-		     Tcontext_t      context)
-    {
-      Tgeneral_data_t addr_src_offset  = (_address_src  >> _param->_shift_offset)&_param->_mask_offset;
-      Tgeneral_data_t addr_src_index   = (_address_src  >> _param->_shift_bank  )&_param->_mask_bank  ;
-      Tgeneral_data_t addr_src_tag     = (_address_src  >> _param->_shift_tag   );
-      
-      Tgeneral_data_t addr_test_offset = (addr_test >> _param->_shift_offset)&_param->_mask_offset;
-      Tgeneral_data_t addr_test_index  = (addr_test >> _param->_shift_bank  )&_param->_mask_bank  ;
-      Tgeneral_data_t addr_test_tag    = (addr_test >> _param->_shift_tag   );
-
-      bool is_hit = ( (_val             == 1               ) and
-		      (_context         == context         ) and
-		      (addr_test_tag    == addr_src_tag    ) and
-		      (addr_test_index  == addr_src_index  ) and
-		      (addr_test_offset <= addr_src_offset ));
-
-      LABEL("address_src  (tag, index, offset) : %.8x %.8x %.8x",addr_src_tag, addr_src_index, addr_src_offset);
-      LABEL("address_test (tag, index, offset) : %.8x %.8x %.8x - hit : %d",addr_test_tag, addr_test_index, addr_test_offset, is_hit);
-      return is_hit;
-    }
-    
-  public : void print (void)
-    {
-      LABEL("%d - %.2d %.8x %.1d %.8x %.3d %.1d %.4d", 
-	    _val             ,
-	    _context         ,
-	    _address_src     ,
-	    _address_dest_val,
-	    _address_dest    ,
-	    _condition       ,
-	    _last_take       ,
-	    _accurate        );
-
-    }
-    
-  };
-
-
-
-Tgeneral_data_t gen_addr (morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_register::Parameters * _param,
-			  Tgeneral_data_t index)
-{
-  Tgeneral_data_t addr_tag     = (rand()%(2*_param->_associativity)) << _param->_shift_tag   ;
-  Tgeneral_data_t addr_index   = (index &_param->_mask_bank        ) << _param->_shift_bank  ;
-  Tgeneral_data_t addr_offset  = (rand()&_param->_mask_offset      ) << _param->_shift_offset;
-
-  LABEL("gen_addr     (tag, index, offset) : %.8x %.8x %.8x",addr_tag, addr_index, addr_offset);
-
-  return (addr_tag    |
-	  addr_index  |
-	  addr_offset );
-}
-
+#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/SelfTest/include/test_BTB.h"
 
 void test (string name,
@@ -90,4 +24,14 @@
   morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
 #endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
 
   Branch_Target_Buffer_Register * _Branch_Target_Buffer_Register = new Branch_Target_Buffer_Register 
@@ -97,5 +41,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -269,5 +213,5 @@
 	  in_DECOD_VICTIM          [i]->write(rand()%_param->_associativity);
 	  in_DECOD_CONTEXT_ID      [i]->write(rand()%_param->_nb_context);
-	  in_DECOD_ADDRESS_SRC     [i]->write(addr);
+	  in_DECOD_ADDRESS_SRC     [i]->write( addr);
 	  in_DECOD_ADDRESS_DEST    [i]->write(~addr);
 	  in_DECOD_CONDITION       [i]->write((addr&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK);
@@ -284,5 +228,5 @@
 	  in_UPDATE_VICTIM          [i]->write(rand()%_param->_associativity);
 	  in_UPDATE_CONTEXT_ID      [i]->write(rand()%_param->_nb_context);
-	  in_UPDATE_ADDRESS_SRC     [i]->write(addr);
+	  in_UPDATE_ADDRESS_SRC     [i]->write( addr);
 	  in_UPDATE_ADDRESS_DEST    [i]->write(~addr);
 	  in_UPDATE_CONDITION       [i]->write((addr&1)?BRANCH_CONDITION_FLAG_SET:BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK);
@@ -334,14 +278,19 @@
 
 	    bool hit = false;
-	    
-	    for (uint32_t j=0; j<_param->_associativity; j++)
-	      hit |= ((tab_old[j]._val         == 1) and
-		      (tab_old[j]._context     == in_DECOD_CONTEXT_ID  [i]->read()) and
-		      (tab_old[j]._address_src == in_DECOD_ADDRESS_SRC [i]->read()));
+
+	    Tptr_t k;
+	    for (k=0; k<_param->_associativity; k++)
+	      {
+		hit |= ((tab_old[k]._val         == 1) and
+			(tab_old[k]._context     == in_DECOD_CONTEXT_ID  [i]->read()) and
+			(tab_old[k]._address_src == in_DECOD_ADDRESS_SRC [i]->read()));
+
+		if (hit)
+		  break;
+	      }
 
 	    if (not hit)
 	      {
-		Tptr_t k = in_DECOD_VICTIM [i]->read();
-
+		k = in_DECOD_VICTIM [i]->read();
 		LABEL("  * miss");
 		LABEL("  * victim      : %d",k);
@@ -354,12 +303,17 @@
 		tab[k]._condition        = in_DECOD_CONDITION   [i]->read();
 		tab[k]._last_take        = in_DECOD_LAST_TAKE   [i]->read();
-		//tab[k]._accurate         = _param->_first_accurate_if_hit;
+		tab[k]._accurate         =(in_DECOD_IS_ACCURATE [i]->read())?_param->_first_accurate_if_hit:_param->_first_accurate_if_miss;
 	      }
 	    else
 	      {
-		LABEL("  * miss");
-	      }
-	    
-	    TEST(Tcontrol_t, out_DECOD_HIT [i]->read(), hit);
+		LABEL("  * hit");
+	      }
+	  
+	    if (_param->_have_port_victim)
+	      {
+	    TEST(Tcontrol_t, out_DECOD_HIT       [i]->read(), hit);
+	    if (hit)
+	    TEST(Tptr_t    , out_DECOD_HIT_INDEX [i]->read(), k);
+	      }
 	  }
 
@@ -373,15 +327,12 @@
 	    bool hit = false;
 	    
-	    Tptr_t k = 0;
-	    for (uint32_t j=0; j<_param->_associativity; j++)
-	      {
-		hit |= ((tab_old[j]._val         == 1) and
-			(tab_old[j]._context     == in_UPDATE_CONTEXT_ID  [i]->read()) and
-			(tab_old[j]._address_src == in_UPDATE_ADDRESS_SRC [i]->read()));
+	    Tptr_t k;
+	    for (k=0; k<_param->_associativity; k++)
+	      {
+		hit |= ((tab_old[k]._val         == 1) and
+			(tab_old[k]._context     == in_UPDATE_CONTEXT_ID  [i]->read()) and
+			(tab_old[k]._address_src == in_UPDATE_ADDRESS_SRC [i]->read()));
 		if (hit)
-		  {
-		    k = j;
-		    break;
-		  }
+		  break;
 	      }
 
@@ -400,5 +351,5 @@
 		tab[k]._condition        = in_UPDATE_CONDITION   [i]->read();
 		tab[k]._last_take        = in_UPDATE_LAST_TAKE   [i]->read();
-		//tab[k]._accurate         = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit;
+		tab[k]._accurate         = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit;
 	      }
 	    else
@@ -414,8 +365,26 @@
 		tab[k]._condition        = in_UPDATE_CONDITION   [i]->read();
 		tab[k]._last_take        = in_UPDATE_LAST_TAKE   [i]->read();
-		//tab[k]._accurate         = (in_UPDATE_MISS_PREDICTION [i]->read())?_param->_first_accurate_if_miss:_param->_first_accurate_if_hit;
-	      }
-
-	    TEST(Tcontrol_t, out_UPDATE_HIT [i]->read(), hit);
+
+
+		Tcounter_t accurate_old = tab[k]._accurate;
+		// hit  : increase accurate
+		// miss : decrease accurate
+		Tcounter_t accurate_new = (in_UPDATE_MISS_PREDICTION [i]->read())?((accurate_old>0)?(accurate_old-1):accurate_old):((accurate_old<_param->_accurate_max)?(accurate_old+1):accurate_old);
+		
+		// test if accurate go to the threshold
+		if ((accurate_old >= _param->_accurate_limit) and
+		    (accurate_new <  _param->_accurate_limit))
+		  accurate_new = 0;
+		
+
+		tab[k]._accurate         = accurate_new;
+	      }
+
+	    if (_param->_have_port_victim)
+	      {
+	    TEST(Tcontrol_t, out_UPDATE_HIT       [i]->read(), hit);
+	    if (hit)
+	    TEST(Tptr_t    , out_UPDATE_HIT_INDEX [i]->read(), k);
+	      }
 	  }
 
