Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Prediction_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_min.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_min.cfg	(revision 88)
@@ -36,3 +36,3 @@
 1	1	+1 # dir_pht_size_address_share [2] [3]
 2	2	+1 # ras_size_queue             [0] [nb_context]
-1	1	+1 # upt_size_queue             [0] [nb_context]
+2	2	+1 # upt_size_queue             [0] [nb_context]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_mono_context.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_mono_context.cfg	(revision 88)
@@ -4,9 +4,9 @@
 30	30	+1 # size_address               
 1	4	*4 # nb_instruction             [0] [nb_context]
-1	1	+1 # nb_inst_decod              [0] [nb_decod_unit]
+1	4	*4 # nb_inst_decod              [0] [nb_decod_unit]
 1	1	+1 # nb_inst_branch_predict     
-1	1	+1 # nb_inst_branch_decod       
-1	1	+1 # nb_inst_branch_update      
-1	1	+1 # nb_inst_branch_complete    
+1	2	+1 # nb_inst_branch_decod       
+1	2	+1 # nb_inst_branch_update      
+1	2	+1 # nb_inst_branch_complete    
 2	8	*4 # btb_size_queue             
 2	2	+1 # btb_associativity          
@@ -36,3 +36,3 @@
 1	1	+1 # dir_pht_size_address_share [2] [3]
 2	4	*2 # ras_size_queue             [0] [nb_context]
-1	4	*4 # upt_size_queue             [0] [nb_context]
+2	4	*2 # upt_size_queue             [0] [nb_context]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_multi_context.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/config_multi_context.cfg	(revision 88)
@@ -45,3 +45,3 @@
 4	4	*4 # upt_size_queue             [1] [nb_context]
 4	4	*4 # upt_size_queue             [2] [nb_context]
-1	1	*4 # upt_size_queue             [3] [nb_context]
+8	8	*4 # upt_size_queue             [3] [nb_context]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp	(revision 88)
@@ -129,5 +129,6 @@
 	 _dir_pht_size_address_share,
 	 _ras_size_queue            ,
-	 _upt_size_queue            
+	 _upt_size_queue            ,
+         true // is_toplevel
 	 );
       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp	(revision 88)
@@ -8,5 +8,5 @@
 
 #define NB_ITERATION  1
-#define CYCLE_MAX     (128*NB_ITERATION)
+#define CYCLE_MAX     1000000
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h"
@@ -23,4 +23,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+ 
   Prediction_unit * _Prediction_unit = new Prediction_unit 
     (name.c_str(),
@@ -29,5 +39,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -48,19 +58,19 @@
   ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT                    ,"out_PREDICT_PC_NEXT                    ",Taddress_t         ,_param->_nb_context);
   ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE         ,"out_PREDICT_PC_NEXT_IS_DS_TAKE         ",Tcontrol_t         ,_param->_nb_context);
-  ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE         ,"out_PREDICT_INSTRUCTION_ENABLE         ",Tcontrol_t         ,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE         ,"out_PREDICT_INSTRUCTION_ENABLE         ",Tcontrol_t         ,_param->_nb_context,_param->_nb_instruction[it1]);
   ALLOC1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR            ,"out_PREDICT_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t ,_param->_nb_context);
   ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE               ,"out_PREDICT_BRANCH_STATE               ",Tbranch_state_t    ,_param->_nb_context);
   ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t  ,_param->_nb_context);
 												                         
-  ALLOC2_SC_SIGNAL( in_DECOD_VAL                          ," in_DECOD_VAL                          ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL(out_DECOD_ACK                          ,"out_DECOD_ACK                          ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_CONTEXT_ID                   ," in_DECOD_CONTEXT_ID                   ",Tcontext_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR        ," in_DECOD_MATCH_INST_IFETCH_PTR        ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_STATE                 ," in_DECOD_BRANCH_STATE                 ",Tbranch_state_t    ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID  ," in_DECOD_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t  ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION             ," in_DECOD_BRANCH_CONDITION             ",Tbranch_condition_t,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION             ," in_DECOD_BRANCH_DIRECTION             ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                  ," in_DECOD_ADDRESS_SRC                  ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST                 ," in_DECOD_ADDRESS_DEST                 ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_VAL                          ," in_DECOD_VAL                          ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL(out_DECOD_ACK                          ,"out_DECOD_ACK                          ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_CONTEXT_ID                   ," in_DECOD_CONTEXT_ID                   ",Tcontext_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR        ," in_DECOD_MATCH_INST_IFETCH_PTR        ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_STATE                 ," in_DECOD_BRANCH_STATE                 ",Tbranch_state_t    ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID  ," in_DECOD_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t  ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION             ," in_DECOD_BRANCH_CONDITION             ",Tbranch_condition_t,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION             ," in_DECOD_BRANCH_DIRECTION             ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                  ," in_DECOD_ADDRESS_SRC                  ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST                 ," in_DECOD_ADDRESS_DEST                 ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
 												                         
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL                ," in_BRANCH_COMPLETE_VAL                ",Tcontrol_t         ,_param->_nb_inst_branch_complete);
@@ -83,6 +93,7 @@
   ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST          ,"out_BRANCH_EVENT_ADDRESS_DEST          ",Taddress_t         ,_param->_nb_context);
 												                         
-  ALLOC1_SC_SIGNAL(out_DEPTH_NB_BRANCH                    ,"out_DEPTH_NB_BRANCH                    ",Tdepth_t           ,_param->_nb_context);
-  ALLOC1_SC_SIGNAL(out_DEPTH_TAIL                         ,"out_DEPTH_TAIL                         ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT                      ,"out_DEPTH_CURRENT                      ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_DEPTH_MIN                          ,"out_DEPTH_MIN                          ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_DEPTH_MAX                          ,"out_DEPTH_MAX                          ",Tdepth_t           ,_param->_nb_context);
   
   /********************************************************
@@ -102,27 +113,22 @@
   INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT                    ,_param->_nb_context);
   INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT_IS_DS_TAKE         ,_param->_nb_context);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit,out_PREDICT_INSTRUCTION_ENABLE         ,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit,out_PREDICT_INSTRUCTION_ENABLE         ,_param->_nb_context,_param->_nb_instruction[it1]);
   INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_STATE               ,_param->_nb_context);
-
-  for (uint32_t i=0; i<_param->_nb_context; i++)
-    {
-      if (_param->_have_port_inst_ifetch_ptr [i])
-	INSTANCE_SC_SIGNAL(_Prediction_unit,out_PREDICT_INST_IFETCH_PTR [i]);
-      if (_param->_have_port_depth [i])
-	INSTANCE_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]);
-    }
-
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_VAL                          ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_ACK                          ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
+  if (_param->_have_port_inst_ifetch_ptr)
+  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_INST_IFETCH_PTR            ,_param->_nb_context);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_VAL                          ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_ACK                          ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   if (_param->_have_port_context_id)
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_CONTEXT_ID                   ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_MATCH_INST_IFETCH_PTR        ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_STATE                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  if (_param->_have_port_max_depth)
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_UPDATE_PREDICTION_ID  ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_CONDITION             ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_DIRECTION             ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC                  ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_CONTEXT_ID                   ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_MATCH_INST_IFETCH_PTR        ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_STATE                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  if (_param->_have_port_depth)
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_UPDATE_PREDICTION_ID  ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_CONDITION             ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_DIRECTION             ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC                  ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
 
   INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_VAL                ,_param->_nb_inst_branch_complete);
@@ -130,5 +136,5 @@
   if (_param->_have_port_context_id)
   INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_CONTEXT_ID         ,_param->_nb_inst_branch_complete);
-  if (_param->_have_port_max_depth)
+  if (_param->_have_port_depth)
   INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_DEPTH              ,_param->_nb_inst_branch_complete);
   INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_ADDRESS            ,_param->_nb_inst_branch_complete);
@@ -148,8 +154,10 @@
   INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST          ,_param->_nb_context);
 
-  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_NB_BRANCH                    ,_param->_nb_context);
-  for (uint32_t i=0; i<_param->_nb_context; i++)
-    if (_param->_have_port_depth[i])
-      INSTANCE_SC_SIGNAL(_Prediction_unit,out_DEPTH_TAIL [i]);
+  if (_param->_have_port_depth)
+    {
+  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_CURRENT                      ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MIN                          ,_param->_nb_context);
+    }
+  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MAX                          ,_param->_nb_context);
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -166,8 +174,33 @@
 //const uint32_t seed = static_cast<uint32_t>(time(NULL));
 
+  const  int32_t percent_transaction_predict         = 80;
+  const  int32_t percent_transaction_decod           = 80;
+  const  int32_t percent_transaction_branch_complete = 80;
+  const  int32_t percent_transaction_branch_event    = 80;
+
   srand(seed);
+  
+  uint32_t test1 = 1024; // TEST 1 : instruction without branch
+  uint32_t test2 = 1024; // TEST 2 : sequence : 1 branch, 1 delayed slot
 
   SC_START(0);
   LABEL("Initialisation");
+
+  for (uint32_t i=0; i<_param->_nb_context; ++i)
+    {
+      in_PREDICT_VAL      [i]->write(0);
+      in_BRANCH_EVENT_ACK [i]->write(0);
+    }
+
+  for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
+    for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
+      {
+        in_DECOD_VAL [i][j]->write(0);
+      }
+
+  for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
+    {
+      in_BRANCH_COMPLETE_VAL [i]->write(0);
+    }
 
   LABEL("Reset");
@@ -176,9 +209,91 @@
   in_NRESET->write(1);  
 
+  for (uint32_t i=0; i<_param->_nb_context; ++i)
+    {
+      TEST(Tcontrol_t,out_PREDICT_ACK      [i]->read(),1); // Accept new request
+      TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0);
+      TEST(Tdepth_t  ,out_DEPTH_CURRENT    [i]->read(),0);
+      TEST(Tdepth_t  ,out_DEPTH_MIN        [i]->read(),0);
+      TEST(Tdepth_t  ,out_DEPTH_MAX        [i]->read(),0);
+    }
+
+  for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
+    for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
+      {
+        TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction
+      }
+
+  for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
+    {
+      TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete
+    }
+
   LABEL("Loop of Test");
 
+  Taddress_t PC_PREVIOUS           [_param->_nb_context];
+  Taddress_t PC_CURRENT            [_param->_nb_context];
+  Tcontrol_t PC_CURRENT_IS_DS_TAKE [_param->_nb_context];
+
   for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
     {
       LABEL("Iteration %d",iteration);
+
+      // TEST 1 : instruction without branch
+      for (uint32_t test=0; test<test1; ++test)
+        {
+          for (uint32_t i=0; i<_param->_nb_context; ++i)
+            {
+              PC_CURRENT            [i] = (0x100000>>2);
+              PC_CURRENT_IS_DS_TAKE [i] = 0;
+              PC_PREVIOUS           [i] = PC_CURRENT[i]-1;
+            }
+          
+          for (uint32_t i=0; i<_param->_nb_context; ++i)
+            {
+              in_PREDICT_VAL                   [i]->write((rand()%100)<percent_transaction_predict);
+              in_PREDICT_PC_PREVIOUS           [i]->write(PC_PREVIOUS          [i]);
+              in_PREDICT_PC_CURRENT            [i]->write(PC_CURRENT           [i]);
+              in_PREDICT_PC_CURRENT_IS_DS_TAKE [i]->write(PC_CURRENT_IS_DS_TAKE[i]);
+            }
+
+          SC_START(1);
+
+          for (uint32_t i=0; i<_param->_nb_context; ++i)
+            // Test if transaction
+            if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read())
+              {
+                TEST(Taddress_t        ,out_PREDICT_PC_NEXT                     [i]->read(),PC_CURRENT[i]+_param->_nb_instruction[i]);
+                TEST(Tcontrol_t        ,out_PREDICT_PC_NEXT_IS_DS_TAKE          [i]->read(),0);
+                for (uint32_t j=0; j<_param->_nb_instruction[i]; ++j)
+                TEST(Tcontrol_t        ,out_PREDICT_INSTRUCTION_ENABLE          [i][j]->read(),1);
+                TEST(Tinst_ifetch_ptr_t,out_PREDICT_INST_IFETCH_PTR             [i]->read(),0);
+                TEST(Tbranch_state_t   ,out_PREDICT_BRANCH_STATE                [i]->read(),BRANCH_STATE_NONE);
+                TEST(Tprediction_ptr_t ,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(),0);
+
+                PC_PREVIOUS           [i] = PC_CURRENT [i];
+                PC_CURRENT            [i] = out_PREDICT_PC_NEXT            [i]->read();
+                PC_CURRENT_IS_DS_TAKE [i] = out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read();
+              }
+
+          // Test another output
+          for (uint32_t i=0; i<_param->_nb_context; ++i)
+            {
+              TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0);
+              TEST(Tdepth_t  ,out_DEPTH_CURRENT    [i]->read(),0);
+              TEST(Tdepth_t  ,out_DEPTH_MIN        [i]->read(),0);
+              TEST(Tdepth_t  ,out_DEPTH_MAX        [i]->read(),0);
+            }
+          
+          for (uint32_t i=0; i<_param->_nb_decod_unit;++i)
+            for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
+              {
+                TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction
+              }
+          
+          for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
+            {
+              TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete
+            }
+        }
 
       SC_START(1);
@@ -208,15 +323,15 @@
   DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context);
 
-  DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE       ,_param->_nb_context,_param->_nb_instruction[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_VAL                        ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL(out_DECOD_ACK                        ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_CONTEXT_ID                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR      ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_STATE               ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION           ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION           ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
-  DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST               ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]);
+  DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE       ,_param->_nb_context,_param->_nb_instruction[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_VAL                        ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL(out_DECOD_ACK                        ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_CONTEXT_ID                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR      ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_STATE               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION           ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION           ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
 
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
@@ -239,6 +354,7 @@
   DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST   ,_param->_nb_context);
 
-  DELETE1_SC_SIGNAL(out_DEPTH_NB_BRANCH    ,_param->_nb_context);
-  DELETE1_SC_SIGNAL(out_DEPTH_TAIL         ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(out_DEPTH_CURRENT      ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(out_DEPTH_MIN          ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(out_DEPTH_MAX          ,_param->_nb_context);
 #endif
 
