Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 88)
@@ -51,4 +51,12 @@
 #ifdef STATISTICS
   public    : Stat                           * _stat;
+
+  private   : counter_t                     ** _stat_nb_branch_hit       ; //[nb_context]
+  private   : counter_t                     ** _stat_nb_branch_miss      ; //[nb_context]
+  private   : counter_t                     ** _stat_nb_branch_unused    ; //[nb_context]
+  private   : counter_t                     ** _stat_queue_nb_cycle_empty; //[nb_context]
+  private   : counter_t                     ** _stat_queue_nb_cycle_full ; //[nb_context]
+  private   : counter_t                     ** _stat_queue_nb_elt        ; //[nb_context]
+
 #endif
 
@@ -59,37 +67,37 @@
     // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_CLOCK                      *  in_CLOCK        ;
-  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+  public    : SC_CLOCK                      *  in_CLOCK                          ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET                         ;
 
     // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_VAL                 ; //[nb_inst_predict]
-  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_ACK                 ; //[nb_inst_predict]
-  public    : SC_IN (Tcontext_t         )  **  in_PREDICT_CONTEXT_ID          ; //[nb_inst_predict]
-  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_SRC     ; //[nb_inst_predict]
-  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_DEST    ; //[nb_inst_predict]
-  public    : SC_IN (Tbranch_condition_t)  **  in_PREDICT_BTB_CONDITION       ; //[nb_inst_predict]
-  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_LAST_TAKE       ; //[nb_inst_predict]
-  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_IS_ACCURATE     ; //[nb_inst_predict]
-  public    : SC_IN (Thistory_t         )  **  in_PREDICT_DIR_HISTORY         ; //[nb_inst_predict]
-  public    : SC_IN (Taddress_t         )  **  in_PREDICT_RAS_ADDRESS         ; //[nb_inst_predict]
-  public    : SC_IN (Tptr_t             )  **  in_PREDICT_RAS_INDEX           ; //[nb_inst_predict]
-//public    : SC_OUT(Tprediction_ptr_t  )  ** out_PREDICT_UPDATE_PREDICTION_ID; //[nb_inst_predict]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_VAL                    ; //[nb_inst_predict]
+  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_ACK                    ; //[nb_inst_predict]
+  public    : SC_IN (Tcontext_t         )  **  in_PREDICT_CONTEXT_ID             ; //[nb_inst_predict]
+  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_SRC        ; //[nb_inst_predict]
+  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_DEST       ; //[nb_inst_predict]
+  public    : SC_IN (Tbranch_condition_t)  **  in_PREDICT_BTB_CONDITION          ; //[nb_inst_predict]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_LAST_TAKE          ; //[nb_inst_predict]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_IS_ACCURATE        ; //[nb_inst_predict]
+  public    : SC_IN (Thistory_t         )  **  in_PREDICT_DIR_HISTORY            ; //[nb_inst_predict]
+  public    : SC_IN (Taddress_t         )  **  in_PREDICT_RAS_ADDRESS            ; //[nb_inst_predict]
+  public    : SC_IN (Tptr_t             )  **  in_PREDICT_RAS_INDEX              ; //[nb_inst_predict]
+  public    : SC_OUT(Tprediction_ptr_t  )  ** out_PREDICT_UPDATE_PREDICTION_ID   ; //[nb_inst_predict]
 
     // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_VAL                   ; //[nb_inst_decod]
-  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_ACK                   ; //[nb_inst_decod]
-  public    : SC_IN (Tcontext_t         )  **  in_DECOD_CONTEXT_ID            ; //[nb_inst_decod]
-  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_SRC       ; //[nb_inst_decod]
-  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_DEST      ; //[nb_inst_decod]
-  public    : SC_IN (Tbranch_condition_t)  **  in_DECOD_BTB_CONDITION         ; //[nb_inst_decod]
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_BTB_LAST_TAKE         ; //[nb_inst_decod]
-//public    : SC_IN (Tcontrol_t         )  **  in_DECOD_BTB_IS_ACCURATE       ; //[nb_inst_decod]
-//public    : SC_IN (Thistory_t         )  **  in_DECOD_DIR_HISTORY           ; //[nb_inst_decod] // if ifetch prediction is miss -> miss btb -> make a static state
-  public    : SC_IN (Taddress_t         )  **  in_DECOD_RAS_ADDRESS           ; //[nb_inst_decod]
-  public    : SC_IN (Tptr_t             )  **  in_DECOD_RAS_INDEX             ; //[nb_inst_decod]
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_IFETCH           ; //[nb_inst_decod]
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_DECOD            ; //[nb_inst_decod]
-  public    : SC_IN (Tprediction_ptr_t  )  **  in_DECOD_UPDATE_PREDICTION_ID  ; //[nb_inst_decod]
-//public    : SC_OUT(Tdepth_t           )  ** out_DECOD_DEPTH                 ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_VAL                      ; //[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_ACK                      ; //[nb_inst_decod]
+  public    : SC_IN (Tcontext_t         )  **  in_DECOD_CONTEXT_ID               ; //[nb_inst_decod]
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_SRC          ; //[nb_inst_decod]
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_DEST         ; //[nb_inst_decod]
+  public    : SC_IN (Tbranch_condition_t)  **  in_DECOD_BTB_CONDITION            ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_BTB_LAST_TAKE            ; //[nb_inst_decod]
+//public    : SC_IN (Thistory_t         )  **  in_DECOD_DIR_HISTORY              ; //[nb_inst_decod] // if ifetch prediction is miss -> miss btb -> make a static state
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_RAS_ADDRESS              ; //[nb_inst_decod]
+  public    : SC_IN (Tptr_t             )  **  in_DECOD_RAS_INDEX                ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_IFETCH              ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_DECOD               ; //[nb_inst_decod]
+  public    : SC_IN (Tprediction_ptr_t  )  **  in_DECOD_UPDATE_PREDICTION_ID     ; //[nb_inst_decod]
+//public    : SC_OUT(Tdepth_t           )  ** out_DECOD_DEPTH                    ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_IS_ACCURATE              ; //[nb_inst_decod]
 
     // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -106,48 +114,69 @@
 
     // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_VAL            ; //[nb_context]
-  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_EVENT_ACK            ; //[nb_context]
-//public    : SC_OUT(Tcontext_t         )  ** out_BRANCH_EVENT_CONTEXT_ID     ; //[nb_context]
-//public    : SC_OUT(Tdepth_t           )  ** out_BRANCH_EVENT_DEPTH          ; //[nb_context]
-//public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_MISS_PREDICTION; //[nb_context] is always miss prediction
-  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_SRC    ; //[nb_context]
-  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST   ; //[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_VAL               ; //[nb_context]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_EVENT_ACK               ; //[nb_context]
+//public    : SC_OUT(Tcontext_t         )  ** out_BRANCH_EVENT_CONTEXT_ID        ; //[nb_context]
+//public    : SC_OUT(Tdepth_t           )  ** out_BRANCH_EVENT_DEPTH             ; //[nb_context]
+//public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_MISS_PREDICTION   ; //[nb_context] is always miss prediction
+  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_SRC       ; //[nb_context]
+  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST      ; //[nb_context]
 
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_VAL                  ; //[nb_inst_update]
-  public    : SC_IN (Tcontrol_t         )  **  in_UPDATE_ACK                  ; //[nb_inst_update]
-  public    : SC_OUT(Tcontext_t         )  ** out_UPDATE_CONTEXT_ID           ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_MISS_PREDICTION      ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIRECTION_GOOD       ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_BTB_VAL              ; //[nb_inst_update]
-  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_SRC      ; //[nb_inst_update]
-  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_DEST     ; //[nb_inst_update]
-  public    : SC_OUT(Tbranch_condition_t)  ** out_UPDATE_BTB_CONDITION        ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIR_VAL              ; //[nb_inst_update]
-  public    : SC_OUT(Thistory_t         )  ** out_UPDATE_DIR_HISTORY          ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_VAL              ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PUSH             ; //[nb_inst_update]
-  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_RAS_ADDRESS          ; //[nb_inst_update]
-  public    : SC_OUT(Tptr_t             )  ** out_UPDATE_RAS_INDEX            ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PREDICTION_IFETCH; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_VAL                     ; //[nb_inst_update]
+  public    : SC_IN (Tcontrol_t         )  **  in_UPDATE_ACK                     ; //[nb_inst_update]
+  public    : SC_OUT(Tcontext_t         )  ** out_UPDATE_CONTEXT_ID              ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_MISS_PREDICTION         ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIRECTION_GOOD          ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_BTB_VAL                 ; //[nb_inst_update]
+  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_SRC         ; //[nb_inst_update]
+  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_DEST        ; //[nb_inst_update]
+  public    : SC_OUT(Tbranch_condition_t)  ** out_UPDATE_BTB_CONDITION           ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIR_VAL                 ; //[nb_inst_update]
+  public    : SC_OUT(Thistory_t         )  ** out_UPDATE_DIR_HISTORY             ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_VAL                 ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PUSH                ; //[nb_inst_update]
+  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_RAS_ADDRESS             ; //[nb_inst_update]
+  public    : SC_OUT(Tptr_t             )  ** out_UPDATE_RAS_INDEX               ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PREDICTION_IFETCH   ; //[nb_inst_update]
 
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_NB_BRANCH; //[nb_context]
-  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_TAIL; //[nb_context]
+  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_CURRENT                  ; //[nb_context] 
+  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_MIN                      ; //[nb_context]
+  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_MAX                      ; //[nb_context]
+    // If DEPTH_CURRENT :
+    // equal at     DEPTH_MIN            -> not speculative
+    // not include ]DEPTH_MIN:DEPTH_MAX[ -> previous branch miss
+    //     include ]DEPTH_MIN:DEPTH_MAX[ -> speculative
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-  private   : uint32_t                      * reg_TOP                    ; //[nb_context]
-  private   : uint32_t                      * reg_BOTTOM                 ; //[nb_context]
-  private   : uint32_t                      * reg_NB_ELT                 ; //[nb_context]
-  private   : uint32_t                      * reg_NB_ELT_UPDATE          ; //[nb_context]
-  private   : uint32_t                      * reg_NB_ELT_NEED_UPDATE     ; //[nb_context]
-  private   : entry_t                      ** reg_UPDATE_PREDICTION_TABLE; //[nb_context][size_queue]
-  private   : uint32_t                        reg_UPDATE_PRIORITY        ;
+  private   : uint32_t                        reg_UPDATE_PRIORITY                ;
+                                                                                 
+  private   : ufpt_entry_t                 ** reg_UPDATE_FETCH_PREDICTION_TABLE  ; //[nb_context][size_ufpt_queue]
+  private   : uint32_t                      * reg_UFPT_BOTTOM                    ; //[nb_context]
+  private   : uint32_t                      * reg_UFPT_TOP                       ; //[nb_context]
+  private   : uint32_t                      * reg_UFPT_UPDATE                    ; //[nb_context]
+  private   : uint32_t                      * reg_UFPT_NB_NEED_UPDATE            ; //[nb_context]
+                                                                                              
+  private   : upt_entry_t                  ** reg_UPDATE_PREDICTION_TABLE        ; //[nb_context][size_upt_queue]
+  private   : uint32_t                      * reg_UPT_BOTTOM                     ; //[nb_context]
+  private   : uint32_t                      * reg_UPT_TOP                        ; //[nb_context]
+  private   : uint32_t                      * reg_UPT_UPDATE                     ; //[nb_context]
+  private   : uint32_t                      * reg_UPT_NB_NEED_UPDATE             ; //[nb_context]
+                                                                                              
+  private   : bool                          * reg_IS_ACCURATE                    ; //[nb_context]
+
+  private   : event_state_t                 * reg_EVENT_STATE                    ; //[nb_context]
+  private   : Tcontrol_t                    * reg_EVENT_RAS_CORRUPTED            ; //[nb_context] // RAS must be flush
+  private   : Taddress_t                    * reg_EVENT_ADDRESS_SRC              ; //[nb_context] // Address branch
+  private   : Tcontrol_t                    * reg_EVENT_ADDRESS_SRC_VAL          ; //[nb_context] // if miss ifetch, decod issue branch, dest must be reload
+  private   : Taddress_t                    * reg_EVENT_ADDRESS_DEST             ; //[nb_context] // Address dest
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   private   : Tcontrol_t                    * internal_PREDICT_ACK                    ; //[nb_inst_predict]
+  private   : Tdepth_t                      * internal_PREDICT_UPDATE_PREDICTION_ID   ; //[nb_inst_predict]
   private   : Tcontrol_t                    * internal_DECOD_ACK                      ; //[nb_inst_decod]
+  private   : uint32_t                      * internal_DECOD_UPT_PTR_WRITE            ; //[nb_inst_decod]
   private   : Tcontrol_t                    * internal_BRANCH_COMPLETE_ACK            ; //[nb_inst_branch_complete]
   private   : Tcontrol_t                    * internal_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete]
@@ -157,6 +186,10 @@
   private   : Tdepth_t                      * internal_BRANCH_EVENT_DEPTH             ; //[nb_context]
   private   : Tcontrol_t                    * internal_UPDATE_VAL                     ; //[nb_inst_update]
+  private   : Tcontrol_t                    * internal_UPDATE_VAL_WITHOUT_ACK         ; //[nb_inst_update]
   private   : Tcontext_t                    * internal_UPDATE_CONTEXT_ID              ; //[nb_inst_update]
+  private   : bool                          * internal_UPDATE_FROM_UFPT               ; //[nb_inst_update]
   private   : Tdepth_t                      * internal_UPDATE_DEPTH                   ; //[nb_inst_update]
+  private   : bool                          * internal_UPDATE_RAS                     ; //[nb_inst_update]
+
 #endif
 
