Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Update_Prediction_Table_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_min.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_min.cfg	(revision 88)
@@ -1,5 +1,6 @@
 Update_Prediction_Table
 1	1	+1	# nb_context             
-1	4	*4	# size_queue             [0] [nb_context]
+1	1	*4	# size_upt_queue         [0] [nb_context]
+1	1	*4	# size_ufpt_queue        [0] [nb_context]
 32	32	*2	# size_address           
 1	1	*4	# nb_inst_predict        
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_mono_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_mono_context.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_mono_context.cfg	(revision 88)
@@ -1,5 +1,6 @@
 Update_Prediction_Table
 1	1	+1	# nb_context             
-1	4	*4	# size_queue             [0] [nb_context]
+4	8	*2	# size_upt_queue         [0] [nb_context]
+1	4	*2	# size_ufpt_queue        [0] [nb_context]
 32	32	*2	# size_address           
 4	4	*4	# nb_inst_predict        
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_multi_context.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_multi_context.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/config_multi_context.cfg	(revision 88)
@@ -1,8 +1,12 @@
 Update_Prediction_Table
 4	4	+1	# nb_context             
-4	4	*4	# size_queue             [0] [nb_context]
-1	1	*4	# size_queue             [1] [nb_context]
-8	8	*4	# size_queue             [2] [nb_context]
-2	2	*4	# size_queue             [3] [nb_context]
+4	4	*4	# size_upt_queue         [0] [nb_context]
+2	2	*4	# size_upt_queue         [1] [nb_context]
+8	8	*4	# size_upt_queue         [2] [nb_context]
+1 	1 	*4	# size_upt_queue         [3] [nb_context]
+4	4	*4	# size_ufpt_queue        [0] [nb_context]
+1	1	*4	# size_ufpt_queue        [1] [nb_context]
+2	2	*4	# size_ufpt_queue        [2] [nb_context]
+1 	1 	*4	# size_ufpt_queue        [3] [nb_context]
 32	32	*2	# size_address           
 4	4	*4	# nb_inst_predict        
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp	(revision 88)
@@ -15,5 +15,6 @@
   err (_("list_params is :\n"));
   err (_(" * nb_context                           (uint32_t)\n"));
-  err (_(" * size_queue              [nb_context] (uint32_t)\n"));
+  err (_(" * size_upt_queue          [nb_context] (uint32_t)\n"));
+  err (_(" * size_ufpt_queue         [nb_context] (uint32_t)\n"));
   err (_(" * size_address                         (uint32_t)\n"));
   err (_(" * nb_inst_predict                      (uint32_t)\n"));
@@ -42,10 +43,13 @@
   uint32_t   _nb_context              = fromString<uint32_t>(argv[x++]);
 
-  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_context))
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_context))
     usage (argc, argv);
 
-  uint32_t * _size_queue              = new uint32_t [_nb_context];
+  uint32_t * _size_upt_queue              = new uint32_t [_nb_context];
   for (uint32_t i=0; i<_nb_context; i++)
-    _size_queue [i] = fromString<uint32_t>(argv[x++]);
+    _size_upt_queue  [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t * _size_ufpt_queue             = new uint32_t [_nb_context];
+  for (uint32_t i=0; i<_nb_context; i++)
+    _size_ufpt_queue [i] = fromString<uint32_t>(argv[x++]);
   uint32_t   _size_address            = fromString<uint32_t>(argv[x++]);
   uint32_t   _nb_inst_predict         = fromString<uint32_t>(argv[x++]);
@@ -63,5 +67,6 @@
       morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters
 	(_nb_context             ,
-	 _size_queue             ,
+	 _size_upt_queue         ,
+	 _size_ufpt_queue        ,
 	 _size_address           ,
 	 _nb_inst_predict        ,
@@ -70,5 +75,7 @@
 	 _nb_inst_update         ,
 	 _size_history           ,
-	 _size_ras_index         );
+	 _size_ras_index         ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
@@ -89,5 +96,6 @@
 
   delete [] _size_ras_index;
-  delete [] _size_queue;
+  delete [] _size_ufpt_queue;
+  delete [] _size_upt_queue;
 
   return (_return);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp	(revision 88)
@@ -1,4 +1,4 @@
 /*
- * $Id$
+ * $id: test.cpp 82 2008-05-01 16:48:45Z rosiere $
  *
  * [ Description ]
@@ -13,4 +13,26 @@
 #include "Common/include/Test.h"
 #include "Behavioural/include/Allocation.h"
+
+typedef struct
+{
+  uint32_t            ufpt_ptr    ;
+  uint32_t            upt_ptr     ;
+
+  Tcontext_t          context     ;
+  Taddress_t          address_src ;
+  Taddress_t          address_dest;
+  Taddress_t          address_good;
+  Tbranch_condition_t condition   ;
+  Tcontrol_t          take        ;
+  Tcontrol_t          take_good   ;
+  Tcontrol_t          flag        ;
+  Tcontrol_t          is_accurate ;
+  Thistory_t          history     ;
+  Taddress_t          ras_address ;
+  Tptr_t              ras_index   ;
+  Tcontrol_t          miss_ifetch ;
+  Tcontrol_t          miss_decod  ;
+  Tcontrol_t          miss_commit ;
+} request_t;
 
 void test (string name,
@@ -61,5 +83,5 @@
   ALLOC1_SC_SIGNAL( in_PREDICT_RAS_ADDRESS            ," in_PREDICT_RAS_ADDRESS            ",Taddress_t         ,_param->_nb_inst_predict);
   ALLOC1_SC_SIGNAL( in_PREDICT_RAS_INDEX              ," in_PREDICT_RAS_INDEX              ",Tptr_t             ,_param->_nb_inst_predict);
-//ALLOC1_SC_SIGNAL(out_PREDICT_UPDATE_PREDICTION_ID   ,"out_PREDICT_UPDATE_PREDICTION_ID   ",Tprediction_ptr_t  ,_param->_nb_inst_predict);
+  ALLOC1_SC_SIGNAL(out_PREDICT_UPDATE_PREDICTION_ID   ,"out_PREDICT_UPDATE_PREDICTION_ID   ",Tprediction_ptr_t  ,_param->_nb_inst_predict);
   ALLOC1_SC_SIGNAL( in_DECOD_VAL                      ," in_DECOD_VAL                      ",Tcontrol_t         ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL(out_DECOD_ACK                      ,"out_DECOD_ACK                      ",Tcontrol_t         ,_param->_nb_inst_decod);
@@ -75,4 +97,5 @@
   ALLOC1_SC_SIGNAL( in_DECOD_UPDATE_PREDICTION_ID     ," in_DECOD_UPDATE_PREDICTION_ID     ",Tprediction_ptr_t  ,_param->_nb_inst_decod);
 //ALLOC1_SC_SIGNAL(out_DECOD_DEPTH                    ,"out_DECOD_DEPTH                    ",Tdepth_t           ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL( in_DECOD_IS_ACCURATE              ," in_DECOD_IS_ACCURATE              ",Tcontrol_t         ,_param->_nb_inst_decod);
 
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ," in_BRANCH_COMPLETE_VAL            ",Tcontrol_t         ,_param->_nb_inst_branch_complete);
@@ -111,6 +134,7 @@
   ALLOC1_SC_SIGNAL(out_UPDATE_RAS_INDEX               ,"out_UPDATE_RAS_INDEX               ",Tptr_t             ,_param->_nb_inst_update);
   ALLOC1_SC_SIGNAL(out_UPDATE_RAS_PREDICTION_IFETCH   ,"out_UPDATE_RAS_PREDICTION_IFETCH   ",Tcontrol_t         ,_param->_nb_inst_update);
-  ALLOC1_SC_SIGNAL(out_DEPTH_NB_BRANCH                ,"out_DEPTH_NB_BRANCH                ",Tdepth_t           ,_param->_nb_context);
-  ALLOC1_SC_SIGNAL(out_DEPTH_TAIL                     ,"out_DEPTH_TAIL                     ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT                  ,"out_DEPTH_CURRENT                  ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_DEPTH_MIN                      ,"out_DEPTH_MIN                      ",Tdepth_t           ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_DEPTH_MAX                      ,"out_DEPTH_MAX                      ",Tdepth_t           ,_param->_nb_context);
   
   /********************************************************
@@ -136,6 +160,6 @@
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_RAS_ADDRESS            ,_param->_nb_inst_predict);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_RAS_INDEX              ,_param->_nb_inst_predict);
-//if (_param->_have_port_depth)
-//INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_PREDICT_UPDATE_PREDICTION_ID   ,_param->_nb_inst_predict);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_PREDICT_UPDATE_PREDICTION_ID   ,_param->_nb_inst_predict);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_VAL                      ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_ACK                      ,_param->_nb_inst_decod);
@@ -150,13 +174,14 @@
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_MISS_IFETCH              ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_MISS_DECOD               ,_param->_nb_inst_decod);
-  if (_param->_have_port_max_depth)
+  if (_param->_have_port_depth)
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_UPDATE_PREDICTION_ID     ,_param->_nb_inst_decod);
 //if (_param->_have_port_depth)
 //INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_DEPTH                    ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_IS_ACCURATE              ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
   if (_param->_have_port_context_id)
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete);
-  if (_param->_have_port_max_depth)
+  if (_param->_have_port_depth)
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_ADDRESS        ,_param->_nb_inst_branch_complete);
@@ -171,5 +196,5 @@
 //   if (_param->_have_port_context_id)
 //   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_EVENT_CONTEXT_ID     ,_param->_nb_context);
-//   if (_param->_have_port_max_depth)
+//   if (_param->_have_port_depth)
 //   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_EVENT_DEPTH          ,_param->_nb_context);
 //   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_EVENT_ADDRESS        ,_param->_nb_context);
@@ -196,12 +221,10 @@
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_INDEX               ,_param->_nb_inst_update);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_PREDICTION_IFETCH   ,_param->_nb_inst_update);
-  for (uint32_t i=0; i<_param->_nb_context; i++)
+  if (_param->_have_port_depth)
     {
-      if (_param->_have_port_depth[i])
-	{
-	  INSTANCE_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_TAIL      [i]);
-	}
-      INSTANCE_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_NB_BRANCH [i]);
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_CURRENT                  ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_MIN                      ,_param->_nb_context);
     }
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_MAX                      ,_param->_nb_context);
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -225,4 +248,9 @@
   const  int32_t percent_transaction_update          = 75;
 
+
+
+  std::list<request_t> ufpt;
+  std::list<request_t> upt;
+
   SC_START(0);
   LABEL("Initialisation");
@@ -233,145 +261,211 @@
   in_NRESET->write(1);  
 
-  for (uint32_t i=0; i<_param->_nb_context; i++)
+  Tdepth_t ufpt_bottom [_param->_nb_context];
+  Tdepth_t ufpt_top    [_param->_nb_context];
+
+  Tdepth_t upt_bottom  [_param->_nb_context];
+  Tdepth_t upt_top     [_param->_nb_context];
+
+  for (uint32_t i=0; i<_param->_nb_context; ++i)
     {
-      PORT_WRITE(in_BRANCH_EVENT_ACK [i],1);
+      ufpt_bottom [i] = 0;
+      ufpt_top    [i] = 0;
+      upt_bottom  [i] = 0;
+      upt_top     [i] = 0;
     }
 
-  LABEL("Loop of Test");
+  for (uint32_t i=0; i<_param->_nb_context; ++i)
+    {
+      TEST(Tdepth_t,out_DEPTH_CURRENT [i]->read(),upt_top    [i]);
+      TEST(Tdepth_t,out_DEPTH_MIN     [i]->read(),upt_bottom [i]);
+      TEST(Tdepth_t,out_DEPTH_MAX     [i]->read(),upt_top    [i]);
+    }
 
   for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
     {
       LABEL("Iteration %d",iteration);
-      
+
+      for (uint32_t i=0; i<_param->_nb_inst_predict; ++i)
+        in_PREDICT_VAL         [i]->write(0);
+      for (uint32_t i=0; i<_param->_nb_inst_decod; ++i)
+        in_DECOD_VAL           [i]->write(0);
+      for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i)
+        in_BRANCH_COMPLETE_VAL [i]->write(0);
+      for (uint32_t i=0; i<_param->_nb_context; ++i)
+        in_BRANCH_EVENT_ACK    [i]->write(0);
+      for (uint32_t i=0; i<_param->_nb_inst_update; ++i)
+        in_UPDATE_ACK          [i]->write(0);
+
+      //---------------------------------------------------------------------
+      //---------------------------------------------------------------------
+      // COMMON CASE
+      //---------------------------------------------------------------------
+      //---------------------------------------------------------------------
+      if (1)
       {
 	uint32_t context = rand() % _param->_nb_context;
-	
-// 	LABEL("KANE : %d",context);
-
-	LABEL("PREDICT - fill the queue");
-	
+
 	{
+          LABEL("PREDICT - fill the queue");
 	  uint32_t port = rand() % _param->_nb_inst_predict;
+
+          LABEL("  * context : %d",context);
+          LABEL("  * port    : %d",port);
 	  
-	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
+	  for (uint32_t i=0; i<_param->_size_ufpt_queue[context]; i++)
 	    {
-	      
-	      bool find = false;
+              request_t request;
+              request.context          = context;
+              request.address_src      = 0xdeadbeef+i;
+              request.address_dest     = 0x21071981+i;                                   
+              request.address_good     = request.address_dest;
+              request.condition        = BRANCH_CONDITION_FLAG_SET;                      
+              request.take             = 1;                                              
+              request.take_good        = 1;                                              
+              request.flag             = (request.condition == BRANCH_CONDITION_FLAG_SET)?request.take_good:(not request.take_good);
+              request.is_accurate      = true;
+              request.miss_ifetch      = false;
+              request.miss_decod       = false;
+              request.miss_commit      = false;
+              request.history          = i;                                              
+              request.ras_address      = 0xdeaddead+i;                                   
+              request.ras_index        = (0x12345678+i)%_param->_size_ras_index[context];
+              request.ufpt_ptr         = ufpt_top [context];
+//            request.upt_ptr;
+
+	      bool have_transaction = false;
 	      do
 		{
 		  in_PREDICT_VAL              [port]->write((rand()%100)<percent_transaction_predict);
-		  in_PREDICT_CONTEXT_ID       [port]->write(context);
-		  in_PREDICT_BTB_ADDRESS_SRC  [port]->write(0xdeadbeef+i);
-		  in_PREDICT_BTB_ADDRESS_DEST [port]->write(0x21071981+i);
-		  in_PREDICT_BTB_CONDITION    [port]->write(BRANCH_CONDITION_FLAG_SET);
-		  in_PREDICT_BTB_LAST_TAKE    [port]->write(1);
-		  in_PREDICT_BTB_IS_ACCURATE  [port]->write((rand()%100)<percent_transaction_predict);
-		  in_PREDICT_DIR_HISTORY      [port]->write(i);
-		  in_PREDICT_RAS_ADDRESS      [port]->write(0xdeaddead+i);
-		  in_PREDICT_RAS_INDEX        [port]->write((0x12345678+i)%_param->_size_ras_index[context]);
-		  
-		  if (_param->_have_port_depth[context])
-		    {
-		      TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		    }
-		      TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i);
+		  in_PREDICT_CONTEXT_ID       [port]->write(request.context     );
+		  in_PREDICT_BTB_ADDRESS_SRC  [port]->write(request.address_src );
+		  in_PREDICT_BTB_ADDRESS_DEST [port]->write(request.address_dest);
+		  in_PREDICT_BTB_CONDITION    [port]->write(request.condition   );
+		  in_PREDICT_BTB_LAST_TAKE    [port]->write(request.take        );
+		  in_PREDICT_BTB_IS_ACCURATE  [port]->write(request.is_accurate );
+		  in_PREDICT_DIR_HISTORY      [port]->write(request.history     );
+		  in_PREDICT_RAS_ADDRESS      [port]->write(request.ras_address );
+		  in_PREDICT_RAS_INDEX        [port]->write(request.ras_index   );
+		  
+		  if (_param->_have_port_depth)
+		  TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+                  TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
 		      
-		  SC_START(0);
-		  
-		  LABEL("PREDICT         [%d] %d - %d (accurate : %d).",port,in_PREDICT_VAL [port]->read(),out_PREDICT_ACK [port]->read(), in_PREDICT_BTB_IS_ACCURATE [port]->read());
+		  SC_START(0); // fct melay
+		  
+		  LABEL("PREDICT         [%d] %d - %d (accurate : %d).",
+                        port,
+                         in_PREDICT_VAL [port]->read(),
+                        out_PREDICT_ACK [port]->read(),
+                         in_PREDICT_BTB_IS_ACCURATE [port]->read());
 		  
 		  if (in_PREDICT_VAL [port]->read() and out_PREDICT_ACK [port]->read())
 		    {
 		      LABEL("PREDICT         [%d] - Transaction accepted",port);
-		      find = true;
+		      have_transaction = true;
+
+                      if (_param->_have_port_depth)
+                      TEST(Tprediction_ptr_t,out_PREDICT_UPDATE_PREDICTION_ID [port]->read(),ufpt_top [context]);
+                      
+                      ufpt_top [context] = (ufpt_top [context]+1)%_param->_size_ufpt_queue[context];
 		    }
 		  
-		  SC_START(1);
-		  
-		} while (not find);
-	      in_PREDICT_VAL              [port]->write(0);
-	      
-	      if (_param->_have_port_depth[context])
-		{
-		  TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		}
-		  TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i+1);
-
+		  SC_START(1); // transition
+		  
+		} while (not have_transaction);
+
+              ufpt.push_back(request);
+
+	      in_PREDICT_VAL [port]->write(0);
+	    
+              if (_param->_have_port_depth)
+	      TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+              TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
 	    }
 	}
 	
-	LABEL("DECOD - hit ifetch");
-	
-	{
+        {
+          LABEL("DECOD");
 	  uint32_t port = rand() % _param->_nb_inst_decod;
-	  
-	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
+
+          LABEL("  * context : %d",context);
+          LABEL("  * port    : %d",port);
+          
+	  for (uint32_t i=0; i<_param->_size_ufpt_queue[context]; i++)
 	    {
-	      
-	      bool find = false;
+              request_t request = ufpt.front();
+
+	      bool have_transaction = false;
 	      do
 		{
 		  in_DECOD_VAL                  [port]->write((rand()%100)<percent_transaction_decod);
-		  in_DECOD_CONTEXT_ID           [port]->write(context);
-		  in_DECOD_BTB_ADDRESS_SRC      [port]->write(0xdeadbeef+i);
-		  in_DECOD_BTB_ADDRESS_DEST     [port]->write(0x21071981+i);
-		  in_DECOD_BTB_CONDITION        [port]->write(BRANCH_CONDITION_FLAG_SET);
-		  in_DECOD_BTB_LAST_TAKE        [port]->write(1);
-		  in_DECOD_RAS_ADDRESS          [port]->write(0xdeaddead+i);
-		  in_DECOD_RAS_INDEX            [port]->write((0x12345678+i)%_param->_size_ras_index[context]);
-		  in_DECOD_MISS_IFETCH          [port]->write(false);
-		  in_DECOD_MISS_DECOD           [port]->write(false);
-		  in_DECOD_UPDATE_PREDICTION_ID [port]->write(i);
-		  
-		  if (_param->_have_port_depth[context])
-		    {
-		      TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		    }
-		      TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
-		  
-		  SC_START(0);
-		  
-		  LABEL("DECOD           [%d] %d - %d.",port,in_DECOD_VAL [port]->read(),out_DECOD_ACK [port]->read());
+		  in_DECOD_CONTEXT_ID           [port]->write(request.context     );
+		  in_DECOD_BTB_ADDRESS_SRC      [port]->write(request.address_src );
+		  in_DECOD_BTB_ADDRESS_DEST     [port]->write(request.address_dest);
+		  in_DECOD_BTB_CONDITION        [port]->write(request.condition   );
+		  in_DECOD_BTB_LAST_TAKE        [port]->write(request.take        );
+		  in_DECOD_RAS_ADDRESS          [port]->write(request.ras_address );
+		  in_DECOD_RAS_INDEX            [port]->write(request.ras_index   );
+		  in_DECOD_UPDATE_PREDICTION_ID [port]->write(request.ufpt_ptr    );
+		  in_DECOD_MISS_IFETCH          [port]->write(request.miss_ifetch );
+		  in_DECOD_MISS_DECOD           [port]->write(request.miss_decod  );
+		  in_DECOD_IS_ACCURATE          [port]->write(request.is_accurate );
+
+		  SC_START(0); // fct melay
+		  
+		  LABEL("DECOD           [%d] %d - %d",
+                        port,
+                         in_PREDICT_VAL [port]->read(),
+                        out_PREDICT_ACK [port]->read());
 		  
 		  if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read())
 		    {
-		      LABEL("DECOD           [%d] - Transaction accepted",port);
-		      find = true;
+		      LABEL("DECOD          [%d] - Transaction accepted",port);
+		      have_transaction = true;
+
+                      request.upt_ptr = upt_top [context];
+                      upt.push_back(request);
+                      ufpt.pop_front();
+
+                      upt_top [context] = (upt_top [context]+1)%_param->_size_upt_queue[context];
 		    }
-		  
-		  SC_START(1);
-		  
-		} while (not find);
+
+		  SC_START(1); // transition
+
+                } while (not have_transaction);
+
 	      in_DECOD_VAL              [port]->write(0);
 	      
-	      if (_param->_have_port_depth[context])
-		{
-		  TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		}
-		  TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
-	    }
-	}
+              if (_param->_have_port_depth)
+	      TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+              TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
+            }
+        }
+
+	{
+          LABEL("BRANCH_COMPLETE - hit ifetch");
 	
-	LABEL("BRANCH_COMPLETE - hit ifetch");
+	  uint32_t port = rand() % _param->_nb_inst_branch_complete;
 	
-	{
-	  uint32_t port = rand() % _param->_nb_inst_branch_complete;
-	  
-	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
+          LABEL("  * port    : %d",port);
+  
+          std::list<request_t>::iterator it_upt = upt.begin();
+
+// 	  for (uint32_t i=0; i<_param->_size_ufpt_queue[context]; i++)
+	  for (uint32_t i=0; i<upt.size(); i++)
 	    {
-	      bool find = false;
+	      bool have_transaction = false;
+
 	      do
 		{
-		  in_BRANCH_COMPLETE_VAL                  [port]->write((rand()%100)<percent_transaction_branch_complete);
-		  in_BRANCH_COMPLETE_CONTEXT_ID           [port]->write(context);
-		  in_BRANCH_COMPLETE_DEPTH                [port]->write(i);
-		  in_BRANCH_COMPLETE_ADDRESS              [port]->write(0xcacacaca+i);
-		  in_BRANCH_COMPLETE_FLAG                 [port]->write(1);
-		  
-		  if (_param->_have_port_depth[context])
-		    {
-		      TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		    }
-		      TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
+		  in_BRANCH_COMPLETE_VAL        [port]->write((rand()%100)<percent_transaction_branch_complete);
+		  in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(it_upt->context     );
+		  in_BRANCH_COMPLETE_DEPTH      [port]->write(it_upt->upt_ptr     );
+		  in_BRANCH_COMPLETE_ADDRESS    [port]->write(it_upt->address_good);
+		  in_BRANCH_COMPLETE_FLAG       [port]->write(it_upt->flag        );
+
+                  if (_param->_have_port_depth)
+                  TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+                  TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
 		  
 		  SC_START(0);
@@ -382,296 +476,115 @@
 		    {
 		      LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port);
-		      find = true;
+		      have_transaction = true;
 		      
-		      TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),0);
-		      TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE           [port]->read(),1);
-		      TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC    [port]->read(),0xdeadbeef+i);
-		      TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST   [port]->read(),0x21071981+i);
+		      TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit );
+		      TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE           [port]->read(),it_upt->take_good   );
+		      TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC    [port]->read(),it_upt->address_src );
+		      TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST   [port]->read(),it_upt->address_good);
+
+                      it_upt ++;
 		    }
 		  
 		  SC_START(1);
-
-		} while (not find);
-	      in_BRANCH_COMPLETE_VAL              [port]->write(0);
+		} while (not have_transaction);
+
+	      in_BRANCH_COMPLETE_VAL [port]->write(0);
 	      
-	      if (_param->_have_port_depth[context])
-		{
-		  TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		}
-		  TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
+              if (_param->_have_port_depth)
+              TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+              TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
 	    }
 	}
+
+	{
+          LABEL("UPDATE - hit ifetch");
 	
-	LABEL("UPDATE - hit ifetch");
+	  uint32_t port = 0;
 	
-	{
-	  uint32_t port = 0; //rand() % _param->_nb_inst_update;
-	  
-	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
+          LABEL("  * port    : %d",port);
+          std::list<request_t>::iterator it_upt = upt.begin();
+  
+// 	  for (uint32_t i=0; i<_param->_size_ufpt_queue[context]; i++)
+	  for (uint32_t i=0; i<upt.size(); i++)
 	    {
-	      bool find = false;
+              LABEL("Address_src (-1): %.8x (%d)",out_UPDATE_BTB_ADDRESS_SRC [i]->read(),upt.size());
+
+	      bool have_transaction = false;
+
 	      do
 		{
+                  LABEL("Address_src (0) : %.8x",out_UPDATE_BTB_ADDRESS_SRC [i]->read());
+
 		  in_UPDATE_ACK [port]->write((rand()%100)<percent_transaction_update);
-		  
+
+//                   if (_param->_have_port_depth)
+//                   TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+//                   TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
+		  
+                  LABEL("Address_src (1) : %.8x",out_UPDATE_BTB_ADDRESS_SRC [i]->read());
 		  SC_START(0);
+                  LABEL("Address_src (2) : %.8x",out_UPDATE_BTB_ADDRESS_SRC [i]->read());
+		  
+		  LABEL("UPDATE [%d] %d - %d.",port,out_UPDATE_VAL [port]->read(),in_UPDATE_ACK [port]->read());
 		  
 		  if (out_UPDATE_VAL [port]->read() and in_UPDATE_ACK [port]->read())
 		    {
 		      LABEL("UPDATE [%d] - Transaction accepted",port);
-		      
-		      find = true;
-		      
-		      TEST(Tcontext_t         ,out_UPDATE_CONTEXT_ID            [port]->read(), context);
-		      TEST(Tcontrol_t         ,out_UPDATE_MISS_PREDICTION       [port]->read(), 0);
-		      TEST(Tcontrol_t         ,out_UPDATE_DIRECTION_GOOD        [port]->read(), 1);
-		      TEST(Tcontrol_t         ,out_UPDATE_BTB_VAL               [port]->read(), 1);
-		      TEST(Taddress_t         ,out_UPDATE_BTB_ADDRESS_SRC       [port]->read(), 0xdeadbeef+i);
-		      TEST(Taddress_t         ,out_UPDATE_BTB_ADDRESS_DEST      [port]->read(), 0x21071981+i);	      
-		      TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION         [port]->read(), BRANCH_CONDITION_FLAG_SET);
-		      TEST(Tcontrol_t         ,out_UPDATE_DIR_VAL               [port]->read(), 1);
-		      if (_param->_have_port_history)
-			TEST(Thistory_t         ,out_UPDATE_DIR_HISTORY           [port]->read(), i);
-		      TEST(Tcontrol_t         ,out_UPDATE_RAS_VAL               [port]->read(), 0);
-		      TEST(Tcontrol_t         ,out_UPDATE_RAS_PUSH              [port]->read(), 0);
-		      TEST(Taddress_t         ,out_UPDATE_RAS_ADDRESS           [port]->read(), 0xdeaddead+i);
-		      TEST(Tptr_t             ,out_UPDATE_RAS_INDEX             [port]->read(), (0x12345678+i)%_param->_size_ras_index[context]);
-		      TEST(Tcontrol_t         ,out_UPDATE_RAS_PREDICTION_IFETCH [port]->read(), 1);
+		      have_transaction = true;
+		  
+                      if (_param->_have_port_context_id)
+                      TEST(Tcontext_t         ,out_UPDATE_CONTEXT_ID            [i]->read(),it_upt->context);
+                      TEST(Tcontrol_t         ,out_UPDATE_MISS_PREDICTION       [i]->read(),it_upt->miss_commit);
+                      TEST(Tcontrol_t         ,out_UPDATE_DIRECTION_GOOD        [i]->read(),it_upt->flag);
+                      TEST(Tcontrol_t         ,out_UPDATE_BTB_VAL               [i]->read(),update_btb(it_upt->condition));
+                      if (update_btb(it_upt->condition))
+                        {
+                      TEST(Taddress_t         ,out_UPDATE_BTB_ADDRESS_SRC       [i]->read(),it_upt->address_src);
+                      TEST(Taddress_t         ,out_UPDATE_BTB_ADDRESS_DEST      [i]->read(),it_upt->address_dest);
+                      TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION         [i]->read(),it_upt->condition);
+                        }
+                      TEST(Tcontrol_t         ,out_UPDATE_DIR_VAL               [i]->read(),update_dir(it_upt->condition));
+                      if (update_dir(it_upt->condition))
+                      if (_param->_have_port_history)
+                      TEST(Thistory_t         ,out_UPDATE_DIR_HISTORY           [i]->read(),it_upt->history);
+                      TEST(Tcontrol_t         ,out_UPDATE_RAS_VAL               [i]->read(),update_ras(it_upt->condition));
+                      if (update_ras(it_upt->condition))
+                        {
+                      TEST(Tcontrol_t         ,out_UPDATE_RAS_PUSH              [i]->read(),push_ras  (it_upt->condition));
+                      TEST(Taddress_t         ,out_UPDATE_RAS_ADDRESS           [i]->read(),it_upt->ras_address);
+                      TEST(Tptr_t             ,out_UPDATE_RAS_INDEX             [i]->read(),it_upt->ras_index);
+                      TEST(Tcontrol_t         ,out_UPDATE_RAS_PREDICTION_IFETCH [i]->read(),not it_upt->miss_ifetch);
+                        }
+                      ++ it_upt;
 		    }
-		  
+
 		  SC_START(1);
-		  
-		} while (not find);
-	      in_UPDATE_ACK              [port]->write(0);
+                  LABEL("Address_src (3) : %.8x",out_UPDATE_BTB_ADDRESS_SRC [i]->read());
+                  
+		} while (not have_transaction);
+
+              LABEL("Address_src (4) : %.8x",out_UPDATE_BTB_ADDRESS_SRC [i]->read());
+	      in_UPDATE_ACK [port]->write(0);
+              LABEL("Address_src (5) : %.8x",out_UPDATE_BTB_ADDRESS_SRC [i]->read());
+//               if (_param->_have_port_depth)
+//               TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]);
+//               TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]);
 	    }
-	  
-	  LABEL("Wait a moment");
-	  SC_START(2*_param->_size_queue[context]);
-  
-	  // wait the garbage collector
-	  while ((not (_param->_have_port_depth[context]) or (out_DEPTH_TAIL     [context]->read() != 0)) and
-		 (out_DEPTH_NB_BRANCH[context]->read() != 0))
-	    {
-	      LABEL("DEPTH [%d] nb_branch : %d - tail : %d",context,out_DEPTH_NB_BRANCH[context]->read(), out_DEPTH_TAIL [context]->read());
-	      SC_START(1);
-	    }
+          upt.clear();
 	}
+
+        // Wait Garbage Collector
+        {
+          upt_bottom [context] = (upt_bottom [context]+_param->_size_ufpt_queue[context])%_param->_size_upt_queue[context];
+//        upt_top    [context] = (upt_top    [context]);
+
+          while ((upt_bottom [context] != out_DEPTH_MIN [context]->read()) or
+                 (upt_top    [context] != out_DEPTH_MAX [context]->read()))
+            SC_START(1);
+
+        }
       }
 
-      {
-	uint32_t context = rand() % _param->_nb_context;
-	
-// 	LABEL("KANE : %d",context);
-
-	LABEL("PREDICT - fill the queue");
-	
-	{
-	  uint32_t port = rand() % _param->_nb_inst_predict;
-	  
-	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
-	    {
-	      
-	      bool find = false;
-	      do
-		{
-		  in_PREDICT_VAL              [port]->write((rand()%100)<percent_transaction_predict);
-		  in_PREDICT_CONTEXT_ID       [port]->write(context);
-		  in_PREDICT_BTB_ADDRESS_SRC  [port]->write(0xdeadbeef+i);
-		  in_PREDICT_BTB_ADDRESS_DEST [port]->write(0x21071981+i);
-		  in_PREDICT_BTB_CONDITION    [port]->write(BRANCH_CONDITION_FLAG_SET);
-		  in_PREDICT_BTB_LAST_TAKE    [port]->write(1);
-		  in_PREDICT_BTB_IS_ACCURATE  [port]->write((rand()%100)<percent_transaction_predict);
-		  in_PREDICT_DIR_HISTORY      [port]->write(i);
-		  in_PREDICT_RAS_ADDRESS      [port]->write(0xdeaddead+i);
-		  in_PREDICT_RAS_INDEX        [port]->write((0x12345678+i)%_param->_size_ras_index[context]);
-		  
-		  if (_param->_have_port_depth[context])
-		    {
-		      TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		    }
-		      TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i);
-
-		  SC_START(0);
-		  
-		  LABEL("PREDICT         [%d] %d - %d (accurate : %d).",port,in_PREDICT_VAL [port]->read(),out_PREDICT_ACK [port]->read(), in_PREDICT_BTB_IS_ACCURATE [port]->read());
-		  
-		  if (in_PREDICT_VAL [port]->read() and out_PREDICT_ACK [port]->read())
-		    {
-		      LABEL("PREDICT         [%d] - Transaction accepted",port);
-		      find = true;
-		    }
-		  
-		  SC_START(1);
-		  
-		} while (not find);
-	      in_PREDICT_VAL              [port]->write(0);
-	      
-	      if (_param->_have_port_depth[context])
-		{
-		  TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		}
-		  TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i+1);
-	    }
-	}
-	
-	LABEL("DECOD - hit ifetch");
-	
-	{
-	  uint32_t port = rand() % _param->_nb_inst_decod;
-	  
-	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
-	    {
-	      
-	      bool find = false;
-	      do
-		{
-		  in_DECOD_VAL                  [port]->write((rand()%100)<percent_transaction_decod);
-		  in_DECOD_CONTEXT_ID           [port]->write(context);
-		  in_DECOD_BTB_ADDRESS_SRC      [port]->write(0xdeadbeef+i);
-		  in_DECOD_BTB_ADDRESS_DEST     [port]->write(0x21071981+i);
-		  in_DECOD_BTB_CONDITION        [port]->write(BRANCH_CONDITION_FLAG_SET);
-		  in_DECOD_BTB_LAST_TAKE        [port]->write(1);
-		  in_DECOD_RAS_ADDRESS          [port]->write(0xdeaddead+i);
-		  in_DECOD_RAS_INDEX            [port]->write((0x12345678+i)%_param->_size_ras_index[context]);
-		  in_DECOD_MISS_IFETCH          [port]->write(false);
-		  in_DECOD_MISS_DECOD           [port]->write(false);
-		  in_DECOD_UPDATE_PREDICTION_ID [port]->write(i);
-		  
-		  if (_param->_have_port_depth[context])
-		    {
-		      TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		    }
-		      TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
-		  
-		  SC_START(0);
-		  
-		  LABEL("DECOD           [%d] %d - %d.",port,in_DECOD_VAL [port]->read(),out_DECOD_ACK [port]->read());
-		  
-		  if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read())
-		    {
-		      LABEL("DECOD           [%d] - Transaction accepted",port);
-		      find = true;
-		    }
-		  
-		  SC_START(1);
-		  
-		} while (not find);
-	      in_DECOD_VAL              [port]->write(0);
-	      
-	      if (_param->_have_port_depth[context])
-		{
-		  TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		}
-		  TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
-	    }
-	}
-	
-	LABEL("BRANCH_COMPLETE - hit ifetch");
-	
-	{
-	  uint32_t port = rand() % _param->_nb_inst_branch_complete;
-	  
-	    {
-	      uint32_t i=0;
-	      bool find = false;
-	      do
-		{
-		  in_BRANCH_COMPLETE_VAL                  [port]->write((rand()%100)<percent_transaction_branch_complete);
-		  in_BRANCH_COMPLETE_CONTEXT_ID           [port]->write(context);
-		  in_BRANCH_COMPLETE_DEPTH                [port]->write(i);
-		  in_BRANCH_COMPLETE_ADDRESS              [port]->write(0xcacacaca+i);
-		  in_BRANCH_COMPLETE_FLAG                 [port]->write(0);
-		  
-		  if (_param->_have_port_depth[context])
-		    {
-		      TEST(Tdepth_t,out_DEPTH_TAIL     [context]->read(), 0);
-		    }
-		      TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]);
-		  
-		  SC_START(0);
-		  
-		  LABEL("BRANCH_COMPLETE [%d] %d - %d.",port,in_BRANCH_COMPLETE_VAL [port]->read(),out_BRANCH_COMPLETE_ACK [port]->read());
-		  
-		  if (in_BRANCH_COMPLETE_VAL [port]->read() and out_BRANCH_COMPLETE_ACK [port]->read())
-		    {
-		      LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port);
-		      find = true;
-		      
-		      TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),1);
-		      TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE           [port]->read(),0);
-		      TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC    [port]->read(),0xdeadbeef+i);
-		      TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST   [port]->read(),0x21071981+i);
-		    }
-		  
-		  SC_START(1);
-
-		} while (not find);
-	      in_BRANCH_COMPLETE_VAL              [port]->write(0);
-	    }
-	}
-	
-	LABEL("UPDATE - miss ifetch");
-	
-	{
-	  uint32_t port = 0; //rand() % _param->_nb_inst_update;
-	  
-// 	  for (uint32_t i=0; i<_param->_size_queue[context]; i++)
-	    {
-	      uint32_t i=0;
-
-	      bool find = false;
-	      do
-		{
-		  in_UPDATE_ACK [port]->write((rand()%100)<percent_transaction_update);
-		  
-		  SC_START(0);
-		  
-		  if (out_UPDATE_VAL [port]->read() and in_UPDATE_ACK [port]->read())
-		    {
-		      LABEL("UPDATE [%d] - Transaction accepted",port);
-		      
-		      find = true;
-		      
-		      TEST(Tcontext_t         ,out_UPDATE_CONTEXT_ID            [port]->read(), context);
-		      TEST(Tcontrol_t         ,out_UPDATE_MISS_PREDICTION       [port]->read(), 1);
-		      TEST(Tcontrol_t         ,out_UPDATE_DIRECTION_GOOD        [port]->read(), 0);
-		      TEST(Tcontrol_t         ,out_UPDATE_BTB_VAL               [port]->read(), 1);
-		      TEST(Taddress_t         ,out_UPDATE_BTB_ADDRESS_SRC       [port]->read(), 0xdeadbeef+i);
-		      TEST(Taddress_t         ,out_UPDATE_BTB_ADDRESS_DEST      [port]->read(), 0x21071981+i);	      
-		      TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION         [port]->read(), BRANCH_CONDITION_FLAG_SET);
-		      TEST(Tcontrol_t         ,out_UPDATE_DIR_VAL               [port]->read(), 1);
-		      if (_param->_have_port_history)
-			TEST(Thistory_t         ,out_UPDATE_DIR_HISTORY           [port]->read(), i);
-		      TEST(Tcontrol_t         ,out_UPDATE_RAS_VAL               [port]->read(), 0);
-		      TEST(Tcontrol_t         ,out_UPDATE_RAS_PUSH              [port]->read(), 0);
-		      TEST(Taddress_t         ,out_UPDATE_RAS_ADDRESS           [port]->read(), 0xdeaddead+i);
-		      TEST(Tptr_t             ,out_UPDATE_RAS_INDEX             [port]->read(), (0x12345678+i)%_param->_size_ras_index[context]);
-		      TEST(Tcontrol_t         ,out_UPDATE_RAS_PREDICTION_IFETCH [port]->read(), 1);
-		    }
-		  
-		  SC_START(1);
-		  
-		} while (not find);
-	      in_UPDATE_ACK              [port]->write(0);
-	    }
-	    
-	    LABEL("Wait a moment");
-	    SC_START(_param->_size_queue[context]);
-	    
-	    // wait the garbage collector
-	    while (((not (_param->_have_port_depth[context])) or (out_DEPTH_TAIL     [context]->read() != 0)) and
-		   (out_DEPTH_NB_BRANCH[context]->read() != 0))
-		{
-		  LABEL("DEPTH [%d] nb_branch : %d - tail : %d",context,out_DEPTH_NB_BRANCH[context]->read(), out_DEPTH_TAIL [context]->read());
-		  SC_START(1);
-		}
-	}
-      }
-
-      LABEL ("Yo1");
-      SC_START(1);
-      LABEL ("Yo2");
-
-    }
+    }// ITERATION
 
   /********************************************************
@@ -699,5 +612,5 @@
   delete []  in_PREDICT_RAS_ADDRESS         ;
   delete []  in_PREDICT_RAS_INDEX           ;
-//delete [] out_PREDICT_UPDATE_PREDICTION_ID;
+  delete [] out_PREDICT_UPDATE_PREDICTION_ID;
   
   // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -715,4 +628,5 @@
   delete []  in_DECOD_UPDATE_PREDICTION_ID  ;
 //delete [] out_DECOD_DEPTH                 ;
+  delete []  in_DECOD_IS_ACCURATE           ;
   
   // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -756,6 +670,7 @@
 
   // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  delete [] out_DEPTH_NB_BRANCH;
-  delete [] out_DEPTH_TAIL;
+  delete [] out_DEPTH_CURRENT;
+  delete [] out_DEPTH_MIN;
+  delete [] out_DEPTH_MAX;
 
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h	(revision 88)
@@ -24,27 +24,30 @@
   {
     //-----[ fields ]------------------------------------------------------------
-  public : uint32_t   _nb_context             ;
-  public : uint32_t * _size_queue             ; // [nb_context]
-  public : uint32_t   _size_address           ;
-  public : uint32_t   _nb_inst_predict        ;
-  public : uint32_t   _nb_inst_decod          ;
-  public : uint32_t   _nb_inst_branch_complete;
-  public : uint32_t   _nb_inst_update         ;
-  public : uint32_t   _size_history           ;
-  public : uint32_t * _size_ras_index         ; // [nb_context]
+  public : uint32_t   _nb_context                ;
+  public : uint32_t * _size_upt_queue            ; // [nb_context]
+  public : uint32_t * _size_ufpt_queue           ; // [nb_context]
+//public : uint32_t   _size_address              ;
+  public : uint32_t   _nb_inst_predict           ;
+  public : uint32_t   _nb_inst_decod             ;
+  public : uint32_t   _nb_inst_branch_complete   ;
+  public : uint32_t   _nb_inst_update            ;
+  public : uint32_t   _size_history              ;
+  public : uint32_t * _size_ras_index            ; // [nb_context]
+  public : const bool _not_accurate_block_predict;
 
-  public : uint32_t   _size_context_id        ;
-  public : uint32_t * _size_depth             ; // [nb_context]
-  public : uint32_t   _max_size_depth         ;
-  public : uint32_t   _max_size_ras_index     ;
-		      
-  public : bool       _have_port_context_id   ;
-  public : bool     * _have_port_depth        ; // [nb_context]
-  public : bool       _have_port_max_depth    ;
-  public : bool       _have_port_history      ;
+//public : uint32_t   _size_context_id           ;
+//public : uint32_t * _size_depth                ; // [nb_context]
+//public : uint32_t   _max_size_depth            ;
+  public : uint32_t   _max_size_ras_index        ;
+		                                 
+//public : bool       _have_port_context_id      ;
+//public : bool     * _have_port_depth           ; // [nb_context]
+//public : bool       _have_port_max_depth       ;
+  public : bool       _have_port_history         ;
     
     //-----[ methods ]-----------------------------------------------------------
   public : Parameters  (uint32_t   nb_context             ,
-			uint32_t * size_queue             ,
+			uint32_t * size_upt_queue         ,
+			uint32_t * size_ufpt_queue        ,
 			uint32_t   size_address           ,
 			uint32_t   nb_inst_predict        ,
@@ -53,7 +56,10 @@
 			uint32_t   nb_inst_update         ,
 			uint32_t   size_history           ,
-			uint32_t * size_ras_index         );
+			uint32_t * size_ras_index         ,
+                        bool       is_toplevel=false);
 //public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h	(revision 88)
@@ -21,26 +21,85 @@
   typedef enum
     {
-      UPDATE_PREDICTION_STATE_EMPTY      , // Slot is empty
-      UPDATE_PREDICTION_STATE_WAIT_DECOD , // Fetch have access at the predictor
-      UPDATE_PREDICTION_STATE_WAITEND    , // Have make a prediction, wait branch_complete
-      UPDATE_PREDICTION_STATE_EVENT      , // have a event - must signal at the context_unit
-      UPDATE_PREDICTION_STATE_OK         , // branch is complete and can update predictor
-      UPDATE_PREDICTION_STATE_KO         , // have a event - must update predictor unit
-      UPDATE_PREDICTION_STATE_END          // branch is updated 
-    } state_t;
+      EVENT_STATE_OK                 , // Can predict
+      EVENT_STATE_FLUSH_UFPT         , // in decod  stage, detect a miss, continue to execute but flush ufpt
+      EVENT_STATE_FLUSH_UFPT_AND_UPT , // in commit stage, detect a miss, stop context and flush ufpt and upt
+      EVENT_STATE_FLUSH_UPT_RAS      , // in commit stage, detect a miss, context is stop and ufpt is flush, update RAS
+      EVENT_STATE_FLUSH_UPT          , // in commit stage, detect a miss, context is stop and ufpt is flush
+      EVENT_STATE_UPDATE_CONTEXT       // prediction unit is update, send signal to context manager
+    } event_state_t;
 
-  class entry_t
+  typedef enum
+    {
+      UPDATE_FETCH_PREDICTION_STATE_EMPTY       , // Slot is empty
+      UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD  , // Have make a prediction, wait decod
+      UPDATE_FETCH_PREDICTION_STATE_EVENT       , // previous branch is a miss prediction
+      UPDATE_FETCH_PREDICTION_STATE_END           // branch is updated 
+    } ufpt_state_t;
+
+  typedef enum
+    {
+      UPDATE_PREDICTION_STATE_EMPTY             , // Slot is empty
+      UPDATE_PREDICTION_STATE_WAIT_END          , // Have make a prediction, wait branch_complete
+      UPDATE_PREDICTION_STATE_OK                , // this branch is a hit prediction
+      UPDATE_PREDICTION_STATE_KO                , // this branch is a miss prediction
+      UPDATE_PREDICTION_STATE_EVENT             , // previous branch is a miss prediction
+      UPDATE_PREDICTION_STATE_END                 // branch is updated 
+    } upt_state_t;
+
+  class ufpt_entry_t
   {
-  public : state_t             _state;
-  public : Tcontrol_t          _ifetch_prediction;
-  public : Tbranch_condition_t _condition;
-  public : Taddress_t          _address_src;
-  public : Taddress_t          _address_dest;
-  public : Tcontrol_t          _last_take;
-  public : Tcontrol_t          _good_take;
-  public : Thistory_t          _history;
-  public : Taddress_t          _address_ras;
-  public : Tptr_t              _index_ras;
+  public : ufpt_state_t        _state            ;
+  public : Tbranch_condition_t _condition        ;
+  public : Taddress_t          _address_src      ;
+  public : Taddress_t          _address_dest     ;
+  public : Tcontrol_t          _last_take        ;
+//public : Tcontrol_t          _good_take        ;
+  public : Tcontrol_t          _is_accurate      ;
+  public : Thistory_t          _history          ;
+  public : Taddress_t          _address_ras      ;
+  public : Tptr_t              _index_ras        ;
+//public : Tcontrol_t          _ifetch_prediction;
   };
+
+  class upt_entry_t
+  {
+  public : upt_state_t         _state            ;
+  public : Tbranch_condition_t _condition        ;
+  public : Taddress_t          _address_src      ;
+  public : Taddress_t          _address_dest     ;
+  public : Tcontrol_t          _last_take        ;
+  public : Tcontrol_t          _good_take        ; // not in ufpt
+  public : Tcontrol_t          _is_accurate      ;
+  public : Thistory_t          _history          ;
+  public : Taddress_t          _address_ras      ;
+  public : Tptr_t              _index_ras        ;
+  public : Tcontrol_t          _ifetch_prediction; // not in ufpt
+  };
+
+
+// BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK          
+// BRANCH_CONDITION_NONE_WITH_WRITE_STACK             
+// BRANCH_CONDITION_FLAG_UNSET                        
+// BRANCH_CONDITION_FLAG_SET                          
+// BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK 
+// BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK    
+// BRANCH_CONDITION_READ_STACK                        
+
+
+#define update_btb(cond)  true
+
+#define update_dir(cond)  ((cond == BRANCH_CONDITION_FLAG_UNSET) or \
+                           (cond == BRANCH_CONDITION_FLAG_SET))
+
+#define update_ras(cond)  ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK         ) or \
+                           (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or \
+                           (cond == BRANCH_CONDITION_READ_STACK                    ))
+
+#define push_ras(cond)    ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK         ) or \
+                           (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK))
+
+#define pop_ras(cond)     ((cond == BRANCH_CONDITION_READ_STACK                    ))
+
+#define need_update(cond) update_ras(cond)
 
 }; // end namespace update_prediction_table
@@ -51,15 +110,39 @@
 }; // end namespace behavioural
   
+  template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_state_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_state_t& x)
+  {
+    switch (x)
+      {
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_OK                   : return "ok"                  ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_FLUSH_UFPT           : return "flush_ufpt"          ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_FLUSH_UFPT_AND_UPT   : return "flush_ufpt_and_upt"  ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_FLUSH_UPT_RAS        : return "flush_upt_ras"       ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_FLUSH_UPT            : return "flush_upt"           ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_UPDATE_CONTEXT       : return "update_context"      ; break;
+      default    : return ""      ; break;
+      }
+  };
 
-  template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::state_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::state_t& x)
+  template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::ufpt_state_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::ufpt_state_t& x)
+  {
+    switch (x)
+      {
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_FETCH_PREDICTION_STATE_EMPTY      : return "empty"     ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD : return "wait_decod"; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_FETCH_PREDICTION_STATE_EVENT      : return "event"     ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_FETCH_PREDICTION_STATE_END        : return "end"       ; break;
+      default    : return ""      ; break;
+      }
+  };
+
+  template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::upt_state_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::upt_state_t& x)
   {
     switch (x)
       {
       case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_EMPTY      : return "empty"     ; break;
-      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAIT_DECOD : return "wait_decod"; break;
-      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAITEND    : return "waitend"   ; break;
-      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_EVENT      : return "event"     ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAIT_END   : return "wait_end"  ; break;
       case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_OK         : return "ok"        ; break;
       case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_KO         : return "ko"        ; break;
+      case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_EVENT      : return "event"     ; break;
       case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_END        : return "end"       ; break;
       default    : return ""      ; break;
@@ -67,5 +150,4 @@
   };
 
-
 }; // end namespace morpheo              
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 88)
@@ -51,4 +51,12 @@
 #ifdef STATISTICS
   public    : Stat                           * _stat;
+
+  private   : counter_t                     ** _stat_nb_branch_hit       ; //[nb_context]
+  private   : counter_t                     ** _stat_nb_branch_miss      ; //[nb_context]
+  private   : counter_t                     ** _stat_nb_branch_unused    ; //[nb_context]
+  private   : counter_t                     ** _stat_queue_nb_cycle_empty; //[nb_context]
+  private   : counter_t                     ** _stat_queue_nb_cycle_full ; //[nb_context]
+  private   : counter_t                     ** _stat_queue_nb_elt        ; //[nb_context]
+
 #endif
 
@@ -59,37 +67,37 @@
     // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_CLOCK                      *  in_CLOCK        ;
-  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+  public    : SC_CLOCK                      *  in_CLOCK                          ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET                         ;
 
     // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_VAL                 ; //[nb_inst_predict]
-  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_ACK                 ; //[nb_inst_predict]
-  public    : SC_IN (Tcontext_t         )  **  in_PREDICT_CONTEXT_ID          ; //[nb_inst_predict]
-  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_SRC     ; //[nb_inst_predict]
-  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_DEST    ; //[nb_inst_predict]
-  public    : SC_IN (Tbranch_condition_t)  **  in_PREDICT_BTB_CONDITION       ; //[nb_inst_predict]
-  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_LAST_TAKE       ; //[nb_inst_predict]
-  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_IS_ACCURATE     ; //[nb_inst_predict]
-  public    : SC_IN (Thistory_t         )  **  in_PREDICT_DIR_HISTORY         ; //[nb_inst_predict]
-  public    : SC_IN (Taddress_t         )  **  in_PREDICT_RAS_ADDRESS         ; //[nb_inst_predict]
-  public    : SC_IN (Tptr_t             )  **  in_PREDICT_RAS_INDEX           ; //[nb_inst_predict]
-//public    : SC_OUT(Tprediction_ptr_t  )  ** out_PREDICT_UPDATE_PREDICTION_ID; //[nb_inst_predict]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_VAL                    ; //[nb_inst_predict]
+  public    : SC_OUT(Tcontrol_t         )  ** out_PREDICT_ACK                    ; //[nb_inst_predict]
+  public    : SC_IN (Tcontext_t         )  **  in_PREDICT_CONTEXT_ID             ; //[nb_inst_predict]
+  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_SRC        ; //[nb_inst_predict]
+  public    : SC_IN (Taddress_t         )  **  in_PREDICT_BTB_ADDRESS_DEST       ; //[nb_inst_predict]
+  public    : SC_IN (Tbranch_condition_t)  **  in_PREDICT_BTB_CONDITION          ; //[nb_inst_predict]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_LAST_TAKE          ; //[nb_inst_predict]
+  public    : SC_IN (Tcontrol_t         )  **  in_PREDICT_BTB_IS_ACCURATE        ; //[nb_inst_predict]
+  public    : SC_IN (Thistory_t         )  **  in_PREDICT_DIR_HISTORY            ; //[nb_inst_predict]
+  public    : SC_IN (Taddress_t         )  **  in_PREDICT_RAS_ADDRESS            ; //[nb_inst_predict]
+  public    : SC_IN (Tptr_t             )  **  in_PREDICT_RAS_INDEX              ; //[nb_inst_predict]
+  public    : SC_OUT(Tprediction_ptr_t  )  ** out_PREDICT_UPDATE_PREDICTION_ID   ; //[nb_inst_predict]
 
     // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_VAL                   ; //[nb_inst_decod]
-  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_ACK                   ; //[nb_inst_decod]
-  public    : SC_IN (Tcontext_t         )  **  in_DECOD_CONTEXT_ID            ; //[nb_inst_decod]
-  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_SRC       ; //[nb_inst_decod]
-  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_DEST      ; //[nb_inst_decod]
-  public    : SC_IN (Tbranch_condition_t)  **  in_DECOD_BTB_CONDITION         ; //[nb_inst_decod]
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_BTB_LAST_TAKE         ; //[nb_inst_decod]
-//public    : SC_IN (Tcontrol_t         )  **  in_DECOD_BTB_IS_ACCURATE       ; //[nb_inst_decod]
-//public    : SC_IN (Thistory_t         )  **  in_DECOD_DIR_HISTORY           ; //[nb_inst_decod] // if ifetch prediction is miss -> miss btb -> make a static state
-  public    : SC_IN (Taddress_t         )  **  in_DECOD_RAS_ADDRESS           ; //[nb_inst_decod]
-  public    : SC_IN (Tptr_t             )  **  in_DECOD_RAS_INDEX             ; //[nb_inst_decod]
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_IFETCH           ; //[nb_inst_decod]
-  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_DECOD            ; //[nb_inst_decod]
-  public    : SC_IN (Tprediction_ptr_t  )  **  in_DECOD_UPDATE_PREDICTION_ID  ; //[nb_inst_decod]
-//public    : SC_OUT(Tdepth_t           )  ** out_DECOD_DEPTH                 ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_VAL                      ; //[nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_ACK                      ; //[nb_inst_decod]
+  public    : SC_IN (Tcontext_t         )  **  in_DECOD_CONTEXT_ID               ; //[nb_inst_decod]
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_SRC          ; //[nb_inst_decod]
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_BTB_ADDRESS_DEST         ; //[nb_inst_decod]
+  public    : SC_IN (Tbranch_condition_t)  **  in_DECOD_BTB_CONDITION            ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_BTB_LAST_TAKE            ; //[nb_inst_decod]
+//public    : SC_IN (Thistory_t         )  **  in_DECOD_DIR_HISTORY              ; //[nb_inst_decod] // if ifetch prediction is miss -> miss btb -> make a static state
+  public    : SC_IN (Taddress_t         )  **  in_DECOD_RAS_ADDRESS              ; //[nb_inst_decod]
+  public    : SC_IN (Tptr_t             )  **  in_DECOD_RAS_INDEX                ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_IFETCH              ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_MISS_DECOD               ; //[nb_inst_decod]
+  public    : SC_IN (Tprediction_ptr_t  )  **  in_DECOD_UPDATE_PREDICTION_ID     ; //[nb_inst_decod]
+//public    : SC_OUT(Tdepth_t           )  ** out_DECOD_DEPTH                    ; //[nb_inst_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_IS_ACCURATE              ; //[nb_inst_decod]
 
     // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -106,48 +114,69 @@
 
     // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_VAL            ; //[nb_context]
-  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_EVENT_ACK            ; //[nb_context]
-//public    : SC_OUT(Tcontext_t         )  ** out_BRANCH_EVENT_CONTEXT_ID     ; //[nb_context]
-//public    : SC_OUT(Tdepth_t           )  ** out_BRANCH_EVENT_DEPTH          ; //[nb_context]
-//public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_MISS_PREDICTION; //[nb_context] is always miss prediction
-  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_SRC    ; //[nb_context]
-  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST   ; //[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_VAL               ; //[nb_context]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_EVENT_ACK               ; //[nb_context]
+//public    : SC_OUT(Tcontext_t         )  ** out_BRANCH_EVENT_CONTEXT_ID        ; //[nb_context]
+//public    : SC_OUT(Tdepth_t           )  ** out_BRANCH_EVENT_DEPTH             ; //[nb_context]
+//public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_MISS_PREDICTION   ; //[nb_context] is always miss prediction
+  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_SRC       ; //[nb_context]
+  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST      ; //[nb_context]
 
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_VAL                  ; //[nb_inst_update]
-  public    : SC_IN (Tcontrol_t         )  **  in_UPDATE_ACK                  ; //[nb_inst_update]
-  public    : SC_OUT(Tcontext_t         )  ** out_UPDATE_CONTEXT_ID           ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_MISS_PREDICTION      ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIRECTION_GOOD       ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_BTB_VAL              ; //[nb_inst_update]
-  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_SRC      ; //[nb_inst_update]
-  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_DEST     ; //[nb_inst_update]
-  public    : SC_OUT(Tbranch_condition_t)  ** out_UPDATE_BTB_CONDITION        ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIR_VAL              ; //[nb_inst_update]
-  public    : SC_OUT(Thistory_t         )  ** out_UPDATE_DIR_HISTORY          ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_VAL              ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PUSH             ; //[nb_inst_update]
-  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_RAS_ADDRESS          ; //[nb_inst_update]
-  public    : SC_OUT(Tptr_t             )  ** out_UPDATE_RAS_INDEX            ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PREDICTION_IFETCH; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_VAL                     ; //[nb_inst_update]
+  public    : SC_IN (Tcontrol_t         )  **  in_UPDATE_ACK                     ; //[nb_inst_update]
+  public    : SC_OUT(Tcontext_t         )  ** out_UPDATE_CONTEXT_ID              ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_MISS_PREDICTION         ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIRECTION_GOOD          ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_BTB_VAL                 ; //[nb_inst_update]
+  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_SRC         ; //[nb_inst_update]
+  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_BTB_ADDRESS_DEST        ; //[nb_inst_update]
+  public    : SC_OUT(Tbranch_condition_t)  ** out_UPDATE_BTB_CONDITION           ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_DIR_VAL                 ; //[nb_inst_update]
+  public    : SC_OUT(Thistory_t         )  ** out_UPDATE_DIR_HISTORY             ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_VAL                 ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PUSH                ; //[nb_inst_update]
+  public    : SC_OUT(Taddress_t         )  ** out_UPDATE_RAS_ADDRESS             ; //[nb_inst_update]
+  public    : SC_OUT(Tptr_t             )  ** out_UPDATE_RAS_INDEX               ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t         )  ** out_UPDATE_RAS_PREDICTION_IFETCH   ; //[nb_inst_update]
 
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_NB_BRANCH; //[nb_context]
-  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_TAIL; //[nb_context]
+  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_CURRENT                  ; //[nb_context] 
+  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_MIN                      ; //[nb_context]
+  public    : SC_OUT(Tdepth_t           )  ** out_DEPTH_MAX                      ; //[nb_context]
+    // If DEPTH_CURRENT :
+    // equal at     DEPTH_MIN            -> not speculative
+    // not include ]DEPTH_MIN:DEPTH_MAX[ -> previous branch miss
+    //     include ]DEPTH_MIN:DEPTH_MAX[ -> speculative
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-  private   : uint32_t                      * reg_TOP                    ; //[nb_context]
-  private   : uint32_t                      * reg_BOTTOM                 ; //[nb_context]
-  private   : uint32_t                      * reg_NB_ELT                 ; //[nb_context]
-  private   : uint32_t                      * reg_NB_ELT_UPDATE          ; //[nb_context]
-  private   : uint32_t                      * reg_NB_ELT_NEED_UPDATE     ; //[nb_context]
-  private   : entry_t                      ** reg_UPDATE_PREDICTION_TABLE; //[nb_context][size_queue]
-  private   : uint32_t                        reg_UPDATE_PRIORITY        ;
+  private   : uint32_t                        reg_UPDATE_PRIORITY                ;
+                                                                                 
+  private   : ufpt_entry_t                 ** reg_UPDATE_FETCH_PREDICTION_TABLE  ; //[nb_context][size_ufpt_queue]
+  private   : uint32_t                      * reg_UFPT_BOTTOM                    ; //[nb_context]
+  private   : uint32_t                      * reg_UFPT_TOP                       ; //[nb_context]
+  private   : uint32_t                      * reg_UFPT_UPDATE                    ; //[nb_context]
+  private   : uint32_t                      * reg_UFPT_NB_NEED_UPDATE            ; //[nb_context]
+                                                                                              
+  private   : upt_entry_t                  ** reg_UPDATE_PREDICTION_TABLE        ; //[nb_context][size_upt_queue]
+  private   : uint32_t                      * reg_UPT_BOTTOM                     ; //[nb_context]
+  private   : uint32_t                      * reg_UPT_TOP                        ; //[nb_context]
+  private   : uint32_t                      * reg_UPT_UPDATE                     ; //[nb_context]
+  private   : uint32_t                      * reg_UPT_NB_NEED_UPDATE             ; //[nb_context]
+                                                                                              
+  private   : bool                          * reg_IS_ACCURATE                    ; //[nb_context]
+
+  private   : event_state_t                 * reg_EVENT_STATE                    ; //[nb_context]
+  private   : Tcontrol_t                    * reg_EVENT_RAS_CORRUPTED            ; //[nb_context] // RAS must be flush
+  private   : Taddress_t                    * reg_EVENT_ADDRESS_SRC              ; //[nb_context] // Address branch
+  private   : Tcontrol_t                    * reg_EVENT_ADDRESS_SRC_VAL          ; //[nb_context] // if miss ifetch, decod issue branch, dest must be reload
+  private   : Taddress_t                    * reg_EVENT_ADDRESS_DEST             ; //[nb_context] // Address dest
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   private   : Tcontrol_t                    * internal_PREDICT_ACK                    ; //[nb_inst_predict]
+  private   : Tdepth_t                      * internal_PREDICT_UPDATE_PREDICTION_ID   ; //[nb_inst_predict]
   private   : Tcontrol_t                    * internal_DECOD_ACK                      ; //[nb_inst_decod]
+  private   : uint32_t                      * internal_DECOD_UPT_PTR_WRITE            ; //[nb_inst_decod]
   private   : Tcontrol_t                    * internal_BRANCH_COMPLETE_ACK            ; //[nb_inst_branch_complete]
   private   : Tcontrol_t                    * internal_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete]
@@ -157,6 +186,10 @@
   private   : Tdepth_t                      * internal_BRANCH_EVENT_DEPTH             ; //[nb_context]
   private   : Tcontrol_t                    * internal_UPDATE_VAL                     ; //[nb_inst_update]
+  private   : Tcontrol_t                    * internal_UPDATE_VAL_WITHOUT_ACK         ; //[nb_inst_update]
   private   : Tcontext_t                    * internal_UPDATE_CONTEXT_ID              ; //[nb_inst_update]
+  private   : bool                          * internal_UPDATE_FROM_UFPT               ; //[nb_inst_update]
   private   : Tdepth_t                      * internal_UPDATE_DEPTH                   ; //[nb_inst_update]
+  private   : bool                          * internal_UPDATE_RAS                     ; //[nb_inst_update]
+
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp	(revision 88)
@@ -21,5 +21,6 @@
 #define FUNCTION "Update_Prediction_Table::Parameters"
   Parameters::Parameters (uint32_t   nb_context             ,
-			  uint32_t * size_queue             ,
+			  uint32_t * size_upt_queue         ,
+			  uint32_t * size_ufpt_queue        ,
 			  uint32_t   size_address           ,
 			  uint32_t   nb_inst_predict        ,
@@ -28,11 +29,14 @@
 			  uint32_t   nb_inst_update         ,
 			  uint32_t   size_history           ,
-			  uint32_t * size_ras_index         )
+			  uint32_t * size_ras_index         ,
+                          bool       is_toplevel):
+    _not_accurate_block_predict (false)
   {
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
 
     _nb_context              = nb_context             ;
-    _size_queue              = size_queue             ;
-    _size_address            = size_address           ;
+    _size_upt_queue          = size_upt_queue         ;
+    _size_ufpt_queue         = size_ufpt_queue        ;
+//  _size_address            = size_address           ;
     _nb_inst_predict         = nb_inst_predict        ;
     _nb_inst_decod           = nb_inst_decod          ;
@@ -42,20 +46,22 @@
     _size_ras_index          = size_ras_index         ;
     
-    _size_context_id         = log2(nb_context);
-    _size_depth              = new uint32_t[_nb_context];
-    _have_port_depth         = new bool    [_nb_context];
-    for (uint32_t i=0; i<_nb_context; i++)
-      {
-	_size_depth      [i] = log2(_size_queue[i]);
-	_have_port_depth [i] = (_size_depth [i] > 0);
-      }
-    _max_size_depth          = max<uint32_t>(_size_depth,_nb_context);
     _max_size_ras_index      = max<uint32_t>(_size_ras_index,nb_context);
 
-    _have_port_context_id    = _size_context_id> 0;
-    _have_port_max_depth     = _max_size_depth > 0;
     _have_port_history       = _size_history   > 0;
+
+    test();
+
+    if (is_toplevel)
+      {
+        _size_instruction_address = size_address;
+        _size_context_id          = log2(nb_context);
+	_size_depth               = log2(max<uint32_t>(_size_upt_queue,_nb_context));
+
+        _have_port_context_id    = _size_context_id> 0;
+	_have_port_depth          = _size_depth > 0;
+
+        copy ();
+      }
     
-    test();
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
   };
@@ -75,6 +81,14 @@
   {
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
-    delete [] _size_depth     ;
-    delete [] _have_port_depth;
+//     delete [] _size_depth     ;
+//     delete [] _have_port_depth;
+    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Update_Prediction_Table::copy"
+  void Parameters::copy (void) 
+  {
+    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
   };
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp	(revision 88)
@@ -8,4 +8,5 @@
 #include "Behavioural/include/Types.h"
 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h"
+#include "Common/include/Max.h"
 #include <sstream>
 
@@ -27,7 +28,8 @@
     Parameters_test test ("Update_Prediction_Table");
 
-    if (morpheo::behavioural::test<Tdepth_t>(_max_size_depth) == false)
-      test.error("type \"Tdepth_t\" is too small.");
-
+    for (uint32_t i=0; i<_nb_context; i++)
+      if (_size_ufpt_queue [i] > _size_upt_queue [i])
+        test.error(toString(_("context \"%d\" : size_upt_queue must be >= at size_ufpt_queue\n"),i));
+    
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp	(revision 88)
@@ -28,5 +28,5 @@
     xml.balise_open("update_prediction_table");
     xml.singleton_begin("nb_context             "); xml.attribut("value",toString(_nb_context             )); xml.singleton_end();
-    xml.singleton_begin("size_address           "); xml.attribut("value",toString(_size_address           )); xml.singleton_end();
+//  xml.singleton_begin("size_address           "); xml.attribut("value",toString(_size_address           )); xml.singleton_end();
     xml.singleton_begin("nb_inst_predict        "); xml.attribut("value",toString(_nb_inst_predict        )); xml.singleton_end();
     xml.singleton_begin("nb_inst_decod          "); xml.attribut("value",toString(_nb_inst_decod          )); xml.singleton_end();
@@ -40,5 +40,6 @@
         xml.  attribut("id"  ,toString(i));
         xml. balise_open_end();
-	xml.  singleton_begin("size_queue             "); xml.attribut("value",toString(_size_queue             [i])); xml.singleton_end();
+	xml.  singleton_begin("size_upt_queue         "); xml.attribut("value",toString(_size_upt_queue         [i])); xml.singleton_end();
+	xml.  singleton_begin("size_ufpt_queue        "); xml.attribut("value",toString(_size_ufpt_queue        [i])); xml.singleton_end();
 	xml.  singleton_begin("size_ras_index         "); xml.attribut("value",toString(_size_ras_index         [i])); xml.singleton_end();
         xml. balise_close();
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp	(revision 88)
@@ -40,4 +40,10 @@
     usage_environment(_usage);
 
+#if DEBUG_Update_Prediction_Table == true
+    log_printf(INFO,Update_Prediction_Table,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Update_Prediction_Table,FUNCTION,"Allocation");
 
@@ -49,5 +55,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Update_Prediction_Table,FUNCTION,"Allocation of statistics");
@@ -58,5 +64,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -68,5 +74,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 
@@ -91,5 +97,5 @@
 	SC_METHOD (genMoore);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // use internal register
 	
 # ifdef SYSTEMCASS_SPECIFIC
@@ -106,5 +112,5 @@
 	    if (_param->_have_port_context_id)
 	      sensitive << (*(in_PREDICT_CONTEXT_ID [i]));
-	    sensitive << (*(in_PREDICT_BTB_IS_ACCURATE [i]));
+// 	    sensitive << (*(in_PREDICT_BTB_IS_ACCURATE [i]));
 	  }
 	
@@ -128,6 +134,4 @@
 	    if (_param->_have_port_context_id)
 	      sensitive << (*(in_DECOD_CONTEXT_ID [i]));
-	    sensitive << (*(in_DECOD_MISS_IFETCH [i]))
-		      << (*(in_DECOD_MISS_DECOD  [i]));
 	  }
 	
@@ -136,6 +140,4 @@
 	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
 	  {
-	    (*(out_DECOD_ACK                  [i])) (*(in_DECOD_MISS_IFETCH [i]));
-	    (*(out_DECOD_ACK                  [i])) (*(in_DECOD_MISS_DECOD  [i]));
 	    if (_param->_have_port_context_id)
 	    (*(out_DECOD_ACK                  [i])) (*(in_DECOD_CONTEXT_ID  [i]));
@@ -152,5 +154,5 @@
 	    if (_param->_have_port_context_id)
 	    sensitive << (*(in_BRANCH_COMPLETE_CONTEXT_ID [i]));
-	    if (_param->_have_port_max_depth)
+	    if (_param->_have_port_depth)
 	    sensitive << (*(in_BRANCH_COMPLETE_DEPTH [i]));
 	    sensitive << (*(in_BRANCH_COMPLETE_FLAG    [i]))
@@ -164,5 +166,5 @@
 	    if (_param->_have_port_context_id)
 	    (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i]));
-	    if (_param->_have_port_max_depth)
+	    if (_param->_have_port_depth)
 	    (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_DEPTH      [i]));
 	    (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_FLAG       [i]));
@@ -171,5 +173,5 @@
 	    if (_param->_have_port_context_id)
 	    (*(out_BRANCH_COMPLETE_TAKE            [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i]));
-	    if (_param->_have_port_max_depth)
+	    if (_param->_have_port_depth)
 	    (*(out_BRANCH_COMPLETE_TAKE            [i])) (*(in_BRANCH_COMPLETE_DEPTH      [i]));
 	    (*(out_BRANCH_COMPLETE_TAKE            [i])) (*(in_BRANCH_COMPLETE_FLAG       [i]));
@@ -177,10 +179,10 @@
 	    if (_param->_have_port_context_id)
 	    (*(out_BRANCH_COMPLETE_ADDRESS_SRC     [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i]));
-	    if (_param->_have_port_max_depth)
+	    if (_param->_have_port_depth)
 	    (*(out_BRANCH_COMPLETE_ADDRESS_SRC     [i])) (*(in_BRANCH_COMPLETE_DEPTH      [i]));
 
 	    if (_param->_have_port_context_id)
 	    (*(out_BRANCH_COMPLETE_ADDRESS_DEST    [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i]));
-	    if (_param->_have_port_max_depth)
+	    if (_param->_have_port_depth)
 	    (*(out_BRANCH_COMPLETE_ADDRESS_DEST    [i])) (*(in_BRANCH_COMPLETE_DEPTH      [i]));
 	    (*(out_BRANCH_COMPLETE_ADDRESS_DEST    [i])) (*(in_BRANCH_COMPLETE_ADDRESS    [i]));
@@ -200,5 +202,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	statistics_deallocation();
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp	(revision 88)
@@ -63,32 +63,33 @@
       ALLOC1_VALACK_OUT(out_PREDICT_ACK                 ,ACK);
       ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID          ,"context_id"          ,Tcontext_t         ,_param->_size_context_id);
-      ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_SRC     ,"btb_address_src"     ,Taddress_t         ,_param->_size_address);
-      ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_DEST    ,"btb_address_dest"    ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_PREDICT_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t  ,_param->_size_depth);
+      ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_SRC     ,"btb_address_src"     ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_DEST    ,"btb_address_dest"    ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_CONDITION       ,"btb_condition"       ,Tbranch_condition_t,_param->_size_branch_condition);
       ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_LAST_TAKE       ,"btb_last_take"       ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_IS_ACCURATE     ,"btb_is_accurate"     ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_IN ( in_PREDICT_DIR_HISTORY         ,"dir_history"         ,Thistory_t         ,_param->_size_history);
-      ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_ADDRESS         ,"ras_address"         ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_ADDRESS         ,"ras_address"         ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_INDEX           ,"ras_index"           ,Tptr_t             ,_param->_max_size_ras_index);
-//       ALLOC1_SIGNAL_OUT(out_PREDICT_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t  ,_param->_size_depth);
     }
 
     // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("decod", IN,SOUTH, "decod", _param->_nb_inst_predict);
+      ALLOC1_INTERFACE("decod", IN,SOUTH, "decod", _param->_nb_inst_decod);
 
       ALLOC1_VALACK_IN ( in_DECOD_VAL                 ,VAL);
       ALLOC1_VALACK_OUT(out_DECOD_ACK                 ,ACK);
       ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID          ,"context_id"          ,Tcontext_t         ,_param->_size_context_id);
-      ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_SRC     ,"btb_address_src"     ,Taddress_t         ,_param->_size_address);
-      ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_DEST    ,"btb_address_dest"    ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_SRC     ,"btb_address_src"     ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_DEST    ,"btb_address_dest"    ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_IN ( in_DECOD_BTB_CONDITION       ,"btb_condition"       ,Tbranch_condition_t,_param->_size_branch_condition);
       ALLOC1_SIGNAL_IN ( in_DECOD_BTB_LAST_TAKE       ,"btb_last_take"       ,Tcontrol_t         ,1);
-      ALLOC1_SIGNAL_IN ( in_DECOD_RAS_ADDRESS         ,"ras_address"         ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_DECOD_RAS_ADDRESS         ,"ras_address"         ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_IN ( in_DECOD_RAS_INDEX           ,"ras_index"           ,Tptr_t             ,_param->_max_size_ras_index);
       ALLOC1_SIGNAL_IN ( in_DECOD_MISS_IFETCH         ,"miss_ifetch"         ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_IN ( in_DECOD_MISS_DECOD          ,"miss_decod"          ,Tcontrol_t         ,1);
-      ALLOC1_SIGNAL_IN ( in_DECOD_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t  ,_param->_max_size_depth);
+      ALLOC1_SIGNAL_IN ( in_DECOD_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t  ,_param->_size_depth);
 //    ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH               ,"depth"               ,Tdepth_t           ,_param->_size_depth);
+      ALLOC1_SIGNAL_IN ( in_DECOD_IS_ACCURATE         ,"is_accurate"         ,Tcontrol_t         ,1);
     }
 
@@ -100,11 +101,11 @@
       ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_ACK            ,ACK);
       ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_CONTEXT_ID     ,"context_id"     ,Tcontext_t,_param->_size_context_id);
-      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH          ,"depth"          ,Tdepth_t  ,_param->_max_size_depth);
-      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS        ,"address"        ,Taddress_t,_param->_size_address);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH          ,"depth"          ,Tdepth_t  ,_param->_size_depth);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS        ,"address"        ,Taddress_t,_param->_size_instruction_address);
       ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_FLAG           ,"flag"           ,Tcontrol_t,1);
       ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1);
       ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE           ,"take"           ,Tcontrol_t,1);
-      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC    ,"address_src"    ,Taddress_t,_param->_size_address);
-      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST   ,"address_dest"   ,Taddress_t,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC    ,"address_src"    ,Taddress_t,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST   ,"address_dest"   ,Taddress_t,_param->_size_instruction_address);
     }
 
@@ -116,8 +117,8 @@
       ALLOC1_VALACK_IN ( in_BRANCH_EVENT_ACK            ,ACK);
 //    ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_CONTEXT_ID     ,"context_id"     ,Tcontext_t,_param->_size_context_id);
-//    ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_DEPTH          ,"depth"          ,Tdepth_t  ,_param->_max_size_depth);
+//    ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_DEPTH          ,"depth"          ,Tdepth_t  ,_param->_size_depth);
 //    ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1);
-      ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_SRC    ,"address_src"    ,Taddress_t,_param->_size_address);
-      ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST   ,"address_dest"   ,Taddress_t,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_SRC    ,"address_src"    ,Taddress_t,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST   ,"address_dest"   ,Taddress_t,_param->_size_instruction_address);
     }
 
@@ -132,6 +133,6 @@
       ALLOC1_SIGNAL_OUT(out_UPDATE_DIRECTION_GOOD       ,"direction_good"       ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_VAL              ,"btb_val"              ,Tcontrol_t         ,1);
-      ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_SRC      ,"btb_address_src"      ,Taddress_t         ,_param->_size_address);
-      ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_DEST     ,"btb_address_dest"     ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_SRC      ,"btb_address_src"      ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_DEST     ,"btb_address_dest"     ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_CONDITION        ,"btb_condition"        ,Tbranch_condition_t,_param->_size_branch_condition);
       ALLOC1_SIGNAL_OUT(out_UPDATE_DIR_VAL              ,"dir_val"              ,Tcontrol_t         ,1);
@@ -139,5 +140,5 @@
       ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_VAL              ,"ras_val"              ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_PUSH             ,"ras_push"             ,Tcontrol_t         ,1);
-      ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_ADDRESS          ,"ras_address"          ,Taddress_t         ,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_ADDRESS          ,"ras_address"          ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_INDEX            ,"ras_index"            ,Tptr_t             ,_param->_max_size_ras_index);
       ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_PREDICTION_IFETCH,"ras_prediction_ifetch",Tcontrol_t         ,1);
@@ -147,40 +148,57 @@
     {
       ALLOC1_INTERFACE("depth",OUT,SOUTH, "depth", _param->_nb_context);
-
-      ALLOC1_SIGNAL_OUT(out_DEPTH_TAIL     ,"TAIL"     ,Tdepth_t,_param->_size_depth[alloc_signal_it1]);
-      ALLOC1_SIGNAL_OUT(out_DEPTH_NB_BRANCH,"NB_BRANCH",Tdepth_t,_param->_size_depth[alloc_signal_it1]+1);
-    }
-
+      ALLOC1_SIGNAL_OUT(out_DEPTH_CURRENT,"CURRENT",Tdepth_t,_param->_size_depth);
+      ALLOC1_SIGNAL_OUT(out_DEPTH_MIN    ,"MIN"    ,Tdepth_t,_param->_size_depth);
+      ALLOC1_SIGNAL_OUT(out_DEPTH_MAX    ,"MAX"    ,Tdepth_t,_param->_size_depth+1);
+    }
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-    internal_PREDICT_ACK                     = new Tcontrol_t [_param->_nb_inst_predict];
-    internal_DECOD_ACK                       = new Tcontrol_t [_param->_nb_inst_decod];
-    internal_BRANCH_COMPLETE_ACK             = new Tcontrol_t [_param->_nb_inst_branch_complete];
-    internal_BRANCH_COMPLETE_MISS_PREDICTION = new Tcontrol_t [_param->_nb_inst_branch_complete];
-    internal_BRANCH_COMPLETE_TAKE            = new Tcontrol_t [_param->_nb_inst_branch_complete];
-    internal_BRANCH_COMPLETE_ADDRESS_DEST    = new Taddress_t [_param->_nb_inst_branch_complete];
-    internal_BRANCH_EVENT_VAL                = new Tcontrol_t [_param->_nb_context];
-    internal_BRANCH_EVENT_DEPTH              = new Tdepth_t   [_param->_nb_context];
-    internal_UPDATE_VAL                      = new Tcontrol_t [_param->_nb_inst_update];
-    internal_UPDATE_CONTEXT_ID               = new Tcontext_t [_param->_nb_inst_update];
-    internal_UPDATE_DEPTH                    = new Tdepth_t   [_param->_nb_inst_update];
+    ALLOC1(internal_PREDICT_ACK                     ,Tcontrol_t,_param->_nb_inst_predict);
+    ALLOC1(internal_PREDICT_UPDATE_PREDICTION_ID    ,Tdepth_t  ,_param->_nb_inst_predict);
+    ALLOC1(internal_DECOD_ACK                       ,Tcontrol_t,_param->_nb_inst_decod);
+    ALLOC1(internal_DECOD_UPT_PTR_WRITE             ,uint32_t  ,_param->_nb_inst_decod);
+    ALLOC1(internal_BRANCH_COMPLETE_ACK             ,Tcontrol_t,_param->_nb_inst_branch_complete);
+    ALLOC1(internal_BRANCH_COMPLETE_MISS_PREDICTION ,Tcontrol_t,_param->_nb_inst_branch_complete);
+    ALLOC1(internal_BRANCH_COMPLETE_TAKE            ,Tcontrol_t,_param->_nb_inst_branch_complete);
+    ALLOC1(internal_BRANCH_COMPLETE_ADDRESS_DEST    ,Taddress_t,_param->_nb_inst_branch_complete);
+    ALLOC1(internal_BRANCH_EVENT_VAL                ,Tcontrol_t,_param->_nb_context);
+    ALLOC1(internal_BRANCH_EVENT_DEPTH              ,Tdepth_t  ,_param->_nb_context);
+    ALLOC1(internal_UPDATE_VAL                      ,Tcontrol_t,_param->_nb_inst_update);
+    ALLOC1(internal_UPDATE_VAL_WITHOUT_ACK          ,Tcontrol_t,_param->_nb_inst_update);
+    ALLOC1(internal_UPDATE_CONTEXT_ID               ,Tcontext_t,_param->_nb_inst_update);
+    ALLOC1(internal_UPDATE_FROM_UFPT                ,bool      ,_param->_nb_inst_update);
+    ALLOC1(internal_UPDATE_DEPTH                    ,Tdepth_t  ,_param->_nb_inst_update);
+    ALLOC1(internal_UPDATE_RAS                      ,bool      ,_param->_nb_inst_update);
 
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    reg_TOP                     = new uint32_t  [_param->_nb_context];
-    reg_BOTTOM                  = new uint32_t  [_param->_nb_context];
-    reg_NB_ELT                  = new uint32_t  [_param->_nb_context];
-    reg_NB_ELT_UPDATE           = new uint32_t  [_param->_nb_context];
-    reg_NB_ELT_NEED_UPDATE      = new uint32_t  [_param->_nb_context];
-    reg_UPDATE_PREDICTION_TABLE = new entry_t * [_param->_nb_context];
-    for (uint32_t i=0; i<_param->_nb_context; i++)
-      {
-#ifndef NO_INIT
-	reg_TOP [i] = 0;
-#endif
-	reg_UPDATE_PREDICTION_TABLE [i] = new entry_t [_param->_size_queue[i]];
+
+    ALLOC1(reg_IS_ACCURATE                  ,bool         ,_param->_nb_context);
+                                                          
+    ALLOC2(reg_UPDATE_FETCH_PREDICTION_TABLE,ufpt_entry_t ,_param->_nb_context,_param->_size_ufpt_queue[it1]);
+    ALLOC1(reg_UFPT_BOTTOM                  ,uint32_t     ,_param->_nb_context);
+    ALLOC1(reg_UFPT_TOP                     ,uint32_t     ,_param->_nb_context);
+    ALLOC1(reg_UFPT_UPDATE                  ,uint32_t     ,_param->_nb_context);
+    ALLOC1(reg_UFPT_NB_NEED_UPDATE          ,uint32_t     ,_param->_nb_context);
+                                                          
+    ALLOC2(reg_UPDATE_PREDICTION_TABLE      ,upt_entry_t  ,_param->_nb_context,_param->_size_upt_queue[it1]);
+    ALLOC1(reg_UPT_BOTTOM                   ,uint32_t     ,_param->_nb_context);
+    ALLOC1(reg_UPT_TOP                      ,uint32_t     ,_param->_nb_context);
+    ALLOC1(reg_UPT_UPDATE                   ,uint32_t     ,_param->_nb_context);
+    ALLOC1(reg_UPT_NB_NEED_UPDATE           ,uint32_t     ,_param->_nb_context);
+
+    ALLOC1(reg_EVENT_STATE                  ,event_state_t,_param->_nb_context);
+    ALLOC1(reg_EVENT_RAS_CORRUPTED          ,Tcontrol_t   ,_param->_nb_context);
+    ALLOC1(reg_EVENT_ADDRESS_SRC            ,Taddress_t   ,_param->_nb_context);
+    ALLOC1(reg_EVENT_ADDRESS_SRC_VAL        ,Tcontrol_t   ,_param->_nb_context);
+    ALLOC1(reg_EVENT_ADDRESS_DEST           ,Taddress_t   ,_param->_nb_context);
       }
+
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
 #ifdef POSITION
-    _component->generate_file();
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp	(revision 88)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -42,6 +43,6 @@
 	delete []  in_PREDICT_RAS_ADDRESS         ;
 	delete []  in_PREDICT_RAS_INDEX           ;
-// 	if (_param->_have_port_depth)
-// 	delete [] out_PREDICT_UPDATE_PREDICTION_ID;
+ 	if (_param->_have_port_depth)
+ 	delete [] out_PREDICT_UPDATE_PREDICTION_ID;
 	
 	// ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -58,8 +59,9 @@
 	delete []  in_DECOD_MISS_IFETCH           ;
 	delete []  in_DECOD_MISS_DECOD            ;
-	if (_param->_have_port_max_depth)
+	if (_param->_have_port_depth)
 	delete []  in_DECOD_UPDATE_PREDICTION_ID  ;
 // 	if (_param->_have_port_depth)
 // 	delete [] out_DECOD_DEPTH                 ;
+	delete []  in_DECOD_IS_ACCURATE           ;
 	
 	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -68,5 +70,5 @@
 	if (_param->_have_port_context_id)
 	delete []  in_BRANCH_COMPLETE_CONTEXT_ID     ;
-	if (_param->_have_port_max_depth)
+	if (_param->_have_port_depth)
 	delete []  in_BRANCH_COMPLETE_DEPTH          ;
 	delete []  in_BRANCH_COMPLETE_ADDRESS        ;
@@ -82,5 +84,5 @@
 // 	if (_param->_have_port_context_id)
 // 	delete []  in_BRANCH_EVENT_CONTEXT_ID     ;
-// 	if (_param->_have_port_max_depth)
+// 	if (_param->_have_port_depth)
 // 	delete []  in_BRANCH_EVENT_DEPTH          ;
 // 	delete [] out_BRANCH_EVENT_MISS_PREDICTION;
@@ -109,33 +111,50 @@
 
 	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-	if (_param->_have_port_max_depth)
+	if (_param->_have_port_depth)
 	  {
-	delete [] out_DEPTH_NB_BRANCH;
-	delete [] out_DEPTH_TAIL;
+	delete [] out_DEPTH_CURRENT;
+	delete [] out_DEPTH_MIN;
 	  }
-      }
-
-    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-    delete [] internal_PREDICT_ACK                     ;
-    delete [] internal_DECOD_ACK                       ;
-    delete [] internal_BRANCH_COMPLETE_ACK             ;
-    delete [] internal_BRANCH_COMPLETE_MISS_PREDICTION ;
-    delete [] internal_BRANCH_COMPLETE_TAKE            ;
-    delete [] internal_BRANCH_COMPLETE_ADDRESS_DEST    ;
-    delete [] internal_BRANCH_EVENT_VAL                ;
-    delete [] internal_BRANCH_EVENT_DEPTH              ;
-    delete [] internal_UPDATE_VAL                      ;
-    delete [] internal_UPDATE_CONTEXT_ID               ;
-    delete [] internal_UPDATE_DEPTH                    ;
-
-    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    delete [] reg_TOP;
-    delete [] reg_BOTTOM;
-    delete [] reg_NB_ELT;
-    delete [] reg_NB_ELT_UPDATE;
-    delete [] reg_NB_ELT_NEED_UPDATE;
-    for (uint32_t i=0; i<_param->_nb_context; i++)
-      delete [] reg_UPDATE_PREDICTION_TABLE [i];
-    delete [] reg_UPDATE_PREDICTION_TABLE;
+	delete [] out_DEPTH_MAX;
+        
+        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        DELETE1(internal_PREDICT_ACK                     ,_param->_nb_inst_predict);
+        DELETE1(internal_PREDICT_UPDATE_PREDICTION_ID    ,_param->_nb_inst_predict);
+        DELETE1(internal_DECOD_ACK                       ,_param->_nb_inst_decod);
+        DELETE1(internal_DECOD_UPT_PTR_WRITE             ,_param->_nb_inst_decod);
+        DELETE1(internal_BRANCH_COMPLETE_ACK             ,_param->_nb_inst_branch_complete);
+        DELETE1(internal_BRANCH_COMPLETE_MISS_PREDICTION ,_param->_nb_inst_branch_complete);
+        DELETE1(internal_BRANCH_COMPLETE_TAKE            ,_param->_nb_inst_branch_complete);
+        DELETE1(internal_BRANCH_COMPLETE_ADDRESS_DEST    ,_param->_nb_inst_branch_complete);
+        DELETE1(internal_BRANCH_EVENT_VAL                ,_param->_nb_context);
+        DELETE1(internal_BRANCH_EVENT_DEPTH              ,_param->_nb_context);
+        DELETE1(internal_UPDATE_VAL                      ,_param->_nb_inst_update);
+        DELETE1(internal_UPDATE_VAL_WITHOUT_ACK          ,_param->_nb_inst_update);
+        DELETE1(internal_UPDATE_CONTEXT_ID               ,_param->_nb_inst_update);
+        DELETE1(internal_UPDATE_FROM_UFPT                ,_param->_nb_inst_update);
+        DELETE1(internal_UPDATE_DEPTH                    ,_param->_nb_inst_update);
+        DELETE1(internal_UPDATE_RAS                      ,_param->_nb_inst_update);
+        
+        // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+        DELETE1(reg_IS_ACCURATE                  ,_param->_nb_context);
+        
+        DELETE2(reg_UPDATE_FETCH_PREDICTION_TABLE,_param->_nb_context,_param->_size_ufpt_queue[it1]);
+        DELETE1(reg_UFPT_BOTTOM                  ,_param->_nb_context);
+        DELETE1(reg_UFPT_TOP                     ,_param->_nb_context);
+        DELETE1(reg_UFPT_UPDATE                  ,_param->_nb_context);
+        DELETE1(reg_UFPT_NB_NEED_UPDATE          ,_param->_nb_context);
+        
+        DELETE2(reg_UPDATE_PREDICTION_TABLE      ,_param->_nb_context,_param->_size_upt_queue[it1]);
+        DELETE1(reg_UPT_BOTTOM                   ,_param->_nb_context);
+        DELETE1(reg_UPT_TOP                      ,_param->_nb_context);
+        DELETE1(reg_UPT_UPDATE                   ,_param->_nb_context);
+        DELETE1(reg_UPT_NB_NEED_UPDATE           ,_param->_nb_context);
+        
+        DELETE1(reg_EVENT_STATE                  ,_param->_nb_context);
+        DELETE1(reg_EVENT_RAS_CORRUPTED          ,_param->_nb_context);
+        DELETE1(reg_EVENT_ADDRESS_SRC            ,_param->_nb_context);
+        DELETE1(reg_EVENT_ADDRESS_SRC_VAL        ,_param->_nb_context);
+        DELETE1(reg_EVENT_ADDRESS_DEST           ,_param->_nb_context);
+       }
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp	(revision 88)
@@ -25,5 +25,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -31,4 +32,5 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
     _interfaces->testbench();
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp	(revision 88)
@@ -22,14 +22,35 @@
   void Update_Prediction_Table::genMealy_branch_complete (void)
   {
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
+    log_begin(Update_Prediction_Table,FUNCTION);
+    log_function(Update_Prediction_Table,FUNCTION,_name.c_str());
     
     for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+#ifdef DEBUG_TEST
+      // just to don't have exception in not transaction
+      if (PORT_READ(in_BRANCH_COMPLETE_VAL [i]))
+#endif
       {
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * BRANCH_COMPLETE [%d]",i);
+
 	Tcontext_t          context   = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
-	Tdepth_t            depth     = (_param->_have_port_max_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
+	Tdepth_t            depth     = (_param->_have_port_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
 	Tcontrol_t          miss      = false;
 	Tcontrol_t          take      = reg_UPDATE_PREDICTION_TABLE [context][depth]._last_take   ;
 	Taddress_t          addr_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest;
 	Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition   ;
+
+        Tcontrol_t          flag      = PORT_READ(in_BRANCH_COMPLETE_FLAG [i]);
+        Taddress_t          addr_good = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]);
+
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context        : %d",context);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth          : %d",depth  );
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * condition      : %s",toString(condition).c_str());
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * flag           : %d",flag);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * address_good   : %.8x",addr_good);
+
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * (before)");
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * miss         : %d",miss);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * take         : %d",take);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * address_dest : %.8x",addr_dest);
 
 	switch (condition)
@@ -39,28 +60,45 @@
 	    {
 	      //miss      : always hit
-	      //addr_dest : know in decod stage
+	      //addr_dest : compute in decod stage
+
+#ifdef DEBUG_TEST
+              if (take != 1)
+                throw ERRORMORPHEO(FUNCTION,toString("Branch_complete[%d] (condition %s) : bad direction.",i,toString(condition).c_str()));
+              if (addr_dest != addr_good)
+                throw ERRORMORPHEO(FUNCTION,toString("Branch_complete[%d] (condition %s) : bad destination address.",i,toString(condition).c_str()));
+#endif
+
 	      break;
 	    }
 	  case BRANCH_CONDITION_FLAG_UNSET                        : // l.bnf
 	    {
-	      Tcontrol_t take_good = PORT_READ(in_BRANCH_COMPLETE_FLAG [i]) == 0;
+	      //addr_dest : compute in decod stage
+              //miss if the direction is bad
+              Tcontrol_t take_good = not flag; // flag set = not take
+
 	      miss = (take != take_good);
 	      take = take_good;
-	      //addr_dest : know in decod stage
+
+#ifdef DEBUG_TEST
+              if (addr_dest != addr_good)
+                throw ERRORMORPHEO(FUNCTION,toString("Branch_complete[%d] (condition %s) : bad destination address.",i,toString(condition).c_str()));
+#endif
+
 	      break;
 	    }
 	  case BRANCH_CONDITION_FLAG_SET                          : // l.bf
 	    {
-// 	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * BRANCH_CONDITION_FLAG_SET");
-	      
-	      Tcontrol_t take_good = PORT_READ(in_BRANCH_COMPLETE_FLAG [i]) == 1;
+	      //addr_dest : compute in decod stage
+              //miss if the direction is bad
+              Tcontrol_t take_good = flag; // flag set = take
+
 	      miss = (take != take_good);
 	      take = take_good;
 
-// 	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * flag      : %d",PORT_READ(in_BRANCH_COMPLETE_FLAG [i]));
-// 	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * take_good : %d",take_good);
-// 	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss      : %d",miss);
-	      
-	      //addr_dest : know in decod stage
+#ifdef DEBUG_TEST
+              if (addr_dest != addr_good)
+                throw ERRORMORPHEO(FUNCTION,toString("Branch_complete[%d] (condition %s) : bad destination address.",i,toString(condition).c_str()));
+#endif
+
 	      break;
 	    }
@@ -69,21 +107,26 @@
 	  case BRANCH_CONDITION_READ_STACK                        : // l.jr (rb==r9)
 	    {
-	      Taddress_t addr_good = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]);
-	      miss = ((take == 1) and
-		      (addr_dest = addr_good));
-	      take = 1;
+              // miss if destination address is bad
+	      miss      = (addr_dest != addr_good);
 	      addr_dest = addr_good;
+
+#ifdef DEBUG_TEST
+              if (take != 1)
+                throw ERRORMORPHEO(FUNCTION,toString("Branch_complete[%d] (condition %s) : bad direction.",i,toString(condition).c_str()));
+#endif
+              
 	      break;
 	    }
 	  }
 
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * miss      : %d",miss);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * take      : %d",take);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * address   : %x",addr_dest);
-
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * (after)");
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * miss         : %d",miss);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * take         : %d",take);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * address_dest : %.8x",addr_dest);
+        
 	internal_BRANCH_COMPLETE_MISS_PREDICTION [i] = miss     ;
 	internal_BRANCH_COMPLETE_TAKE            [i] = take     ;
 	internal_BRANCH_COMPLETE_ADDRESS_DEST    [i] = addr_dest;
-
+        
 	PORT_WRITE(out_BRANCH_COMPLETE_MISS_PREDICTION [i], internal_BRANCH_COMPLETE_MISS_PREDICTION [i]);
 	PORT_WRITE(out_BRANCH_COMPLETE_TAKE            [i], internal_BRANCH_COMPLETE_TAKE            [i]);
@@ -92,5 +135,5 @@
       }
 
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
+    log_end(Update_Prediction_Table,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp	(revision 88)
@@ -22,26 +22,42 @@
   void Update_Prediction_Table::genMealy_decod (void)
   {
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
+    log_begin(Update_Prediction_Table,FUNCTION);
+    log_function(Update_Prediction_Table,FUNCTION,_name.c_str());
     
+    // WARNING : One branch per context per cycle
     for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
       {
-	Tcontrol_t miss = PORT_READ(in_DECOD_MISS_DECOD [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * DECOD [%d]",i);
 
-	if (miss)
-	  {
-	    // miss : need a empty slot.
-	    Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0;
-	    uint32_t   top     = reg_TOP[context];
-	    internal_DECOD_ACK [i] = (reg_UPDATE_PREDICTION_TABLE [context][top]._state == UPDATE_PREDICTION_STATE_EMPTY);
-	  }
-	else
-	  {
-	    internal_DECOD_ACK [i] = true;
-	  }
+        Tcontext_t    context     = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0;
+        bool          is_accurate = reg_IS_ACCURATE [context];
+        event_state_t event_state = reg_EVENT_STATE [context];
+        uint32_t      ptr_write   = reg_UPT_TOP     [context];
+
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * context     : %d",context    );
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * is_accurate : %d",is_accurate);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * event_state : %s",toString(event_state).c_str());
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * ptr_write   : %d",ptr_write  );
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * upt_state   : %s",toString(reg_UPDATE_PREDICTION_TABLE [context][ptr_write]._state).c_str());
+
+        // ack :
+        //   * in all case (miss or hit), need empty slot
+        //   * is_accurate
+        //   * event_state : don't update upt
+        internal_DECOD_ACK           [i] = ((reg_UPDATE_PREDICTION_TABLE [context][ptr_write]._state == UPDATE_PREDICTION_STATE_EMPTY) and
+                                            is_accurate and
+//                                             (
+                                             (event_state == EVENT_STATE_OK            )//  or
+//                                              (event_state == EVENT_STATE_FLUSH_UFPT    ) or
+//                                              (event_state == EVENT_STATE_UPDATE_CONTEXT))
+                                            );
+        internal_DECOD_UPT_PTR_WRITE [i] = ptr_write;
+
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * ack         : %d",internal_DECOD_ACK [i]);
 
 	PORT_WRITE(out_DECOD_ACK [i], internal_DECOD_ACK [i]);
       }
 
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
+    log_end(Update_Prediction_Table,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp	(revision 88)
@@ -22,31 +22,46 @@
   void Update_Prediction_Table::genMealy_predict (void)
   {
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
-    
+    log_begin(Update_Prediction_Table,FUNCTION);
+    log_function(Update_Prediction_Table,FUNCTION,_name.c_str());
+
+    if (PORT_READ(in_NRESET) != 0)
+      {
+
     for (uint32_t i=0; i<_param->_nb_inst_predict; i++)
       {
 	Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0;
-	uint32_t   top     = reg_TOP[context];
+	uint32_t   top     = reg_UFPT_TOP[context];
 
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT [%d] (genMealy)",i);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * context     : %d",context);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * top         : %d",top);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * state       : %s",toString(reg_UPDATE_PREDICTION_TABLE [context][top]._state).c_str());
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * is accurate : %d",PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]));
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT [%d] (genMealy)",i);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * context     : %d",context);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * top         : %d",top);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * state       : %s",toString(reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state).c_str());
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * is accurate : %d",PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]));
 // 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * need update : %d",reg_NB_ELT_NEED_UPDATE [context]);
 
-	// Not Full, accurate and no previous miss
-	// Optimisation to restart faster :
-	//   don't counter nb_elt_ko, but just nb_elt that need a update (change branch structure)
-	internal_PREDICT_ACK [i] = ((reg_UPDATE_PREDICTION_TABLE [context][top]._state == UPDATE_PREDICTION_STATE_EMPTY) and
-				    PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]) and
-				    (reg_NB_ELT_NEED_UPDATE [context] == 0));
+        internal_PREDICT_UPDATE_PREDICTION_ID [i] = top;
 
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * ACK         : %d",internal_PREDICT_ACK [i]);
+        if (_param->_have_port_depth)
+        PORT_WRITE(out_PREDICT_UPDATE_PREDICTION_ID [i], internal_PREDICT_UPDATE_PREDICTION_ID [i]);
 
+        bool is_accurate = not _param->_not_accurate_block_predict or reg_IS_ACCURATE[context];
+
+        // Ack if :
+        //  * slot is empty
+        //  * no previous miss
+        //  * is_accurate
+	internal_PREDICT_ACK [i] = ((reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state == UPDATE_FETCH_PREDICTION_STATE_EMPTY) and
+// 				    PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]) and
+ 				    (reg_EVENT_STATE [context] == EVENT_STATE_OK) and
+                                    is_accurate);
+
+
+ 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * ACK         : %d",internal_PREDICT_ACK [i]);
 	PORT_WRITE(out_PREDICT_ACK [i], internal_PREDICT_ACK [i]);
       }
 
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
+      }//don't reset
+
+    log_end(Update_Prediction_Table,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp	(revision 88)
@@ -22,5 +22,10 @@
   void Update_Prediction_Table::genMoore (void)
   {
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
+    log_begin(Update_Prediction_Table,FUNCTION);
+    log_function(Update_Prediction_Table,FUNCTION,_name.c_str());
+    log_printf(NONE,Update_Prediction_Table,FUNCTION,FUNCTION);
+
+    if (PORT_READ(in_NRESET) == 1)
+      {
 
     // ===================================================================
@@ -30,99 +35,234 @@
     for (uint32_t i=0; i<_param->_nb_context; i++)
       {
-	if (_param->_have_port_depth [i])
-	  {
-	    PORT_WRITE(out_DEPTH_TAIL      [i], reg_BOTTOM [i]);
-	  }
-	PORT_WRITE(out_DEPTH_NB_BRANCH [i], reg_NB_ELT [i]);
-      }
+	if (_param->_have_port_depth)
+          {
+        PORT_WRITE(out_DEPTH_CURRENT [i], reg_UPT_TOP    [i]);
+        PORT_WRITE(out_DEPTH_MIN     [i], reg_UPT_BOTTOM [i]);
+          }
+	PORT_WRITE(out_DEPTH_MAX     [i], reg_UPT_TOP    [i]);
+      }
+
     // ===================================================================
     // =====[ UPDATE ]====================================================
     // ===================================================================
 
-    Tdepth_t tab_depth [_param->_nb_context];
+    bool     retire_ras_from_ufpt [_param->_nb_context]; // event ufpt -> restore RAS, else update upt
+    bool     retire_ras_from_upt  [_param->_nb_context]; // event upt  -> restore RAS, else restore others structure
+    bool     ufpt_update          [_param->_nb_context];
+    bool     upt_update           [_param->_nb_context];
+    Tdepth_t tab_ufpt_depth       [_param->_nb_context];
+    Tdepth_t tab_upt_depth        [_param->_nb_context];
+
     for (uint32_t i=0; i<_param->_nb_context; i++)
-      tab_depth [i] = reg_BOTTOM [i];
+      {
+        event_state_t event_state = reg_EVENT_STATE [i];
+
+        retire_ras_from_ufpt [i] = ((event_state == EVENT_STATE_FLUSH_UFPT        ) or
+                                    (event_state == EVENT_STATE_FLUSH_UFPT_AND_UPT));
+        retire_ras_from_upt  [i] = (event_state == EVENT_STATE_FLUSH_UPT_RAS);
+
+        ufpt_update          [i] = true;
+        upt_update           [i] = true;
+        tab_ufpt_depth       [i] = reg_UFPT_UPDATE [i];
+        tab_upt_depth        [i] = reg_UPT_UPDATE  [i];
+      }
 
     for (uint32_t i=0; i<_param->_nb_inst_update; i++)
       {
-	uint32_t   context = (reg_UPDATE_PRIORITY+i)%_param->_nb_context;
-	Tdepth_t   depth   = tab_depth[context];
-	state_t    state   = reg_UPDATE_PREDICTION_TABLE [context][depth]._state;
+	Tcontext_t          context     = (reg_UPDATE_PRIORITY+i)%_param->_nb_context;
+
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * UPDATE [%d] (genMoore)",i);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context         : %d",context);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * event_state     : %s",toString(reg_EVENT_STATE [context]).c_str());
+
+        Tcontrol_t          val                  = false;
+        Tcontrol_t          val_without_ack      = false;
+        Tcontrol_t          miss_prediction      ;
+        Tcontrol_t          direction_good       ;
+        Tcontrol_t          btb_val              ;
+        Taddress_t          btb_address_src      ;
+        Taddress_t          btb_address_dest     ;
+        Tbranch_condition_t btb_condition        ;
+        Tcontrol_t          dir_val              ;
+        Thistory_t          dir_history          ;
+        Tcontrol_t          ras_val              ;
+        Tcontrol_t          ras_push             ;
+        Taddress_t          ras_address          ;
+        Tptr_t              ras_index            ;
+        Tcontrol_t          ras_prediction_ifetch;
+
+        // Test if update fetch prediction table need update port
+        if (retire_ras_from_ufpt [context])
+          {
+            if (ufpt_update [context])
+              {
+                // Update Fetch Prediction Table
+                // An update of ufpt is to previous miss. Just restore Return Address Stack
+                
+                Tdepth_t            depth     = tab_ufpt_depth[context];
+                ufpt_state_t        state     = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state; 
+                Tbranch_condition_t condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition; 
+                
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update Fetch Prediction Table");
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth           : %d",depth    );
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state           : %s",toString(state    ).c_str());
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * condition       : %s",toString(condition).c_str());
+                
+                val                   = (state == UPDATE_FETCH_PREDICTION_STATE_EVENT);
+                miss_prediction       = 1;
+//              direction_good        = ;
+                btb_val               = 0; // don't update btb (is update by the event branch)
+//              btb_address_src       = ;
+//              btb_address_dest      = ;
+//              btb_condition         = ;
+                dir_val               = 0; // don't update btb (is update by the event branch (if conditionnal branch))
+//              dir_history           = ;
+                ras_val               = update_ras(condition); // repop/ repush data -> don't corrupt ras
+                ras_push              = push_ras(condition);
+                ras_address           = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._address_ras;
+                ras_index             = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._index_ras;
+                ras_prediction_ifetch = 1;
+                
+                internal_UPDATE_FROM_UFPT [i] = true;
+                internal_UPDATE_DEPTH     [i] = depth;
+                internal_UPDATE_RAS       [i] = false;
+
+                // Warning : don't update same entry
+                if (depth == reg_UFPT_BOTTOM[context])
+                  ufpt_update [context] = false;
+                
+                tab_ufpt_depth[context] = (depth==0)?(_param->_size_ufpt_queue[context]-1):(depth-1);
+              }
+          }
+        else
+          {
+            if (upt_update [context])
+              {
+                // Update Prediction Table
+                
+                Tdepth_t            depth     = tab_upt_depth[context];
+                upt_state_t         state     = reg_UPDATE_PREDICTION_TABLE [context][depth]._state; 
+                Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; 
+                Tcontrol_t          ifetch    = reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction;
+                
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update Prediction Table");
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth           : %d",depth    );
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state           : %s",toString(state    ).c_str());
+                log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * condition       : %s",toString(condition).c_str());
+              
+                Tcontrol_t          state_is_ok_ko           = ((state == UPDATE_PREDICTION_STATE_OK) or
+                                                                (state == UPDATE_PREDICTION_STATE_KO));
+                Tcontrol_t          state_is_event           = (state == UPDATE_PREDICTION_STATE_EVENT);
+                Tcontrol_t          state_is_event_update    = state_is_event and     need_update(condition);
+                Tcontrol_t          state_is_event_no_update = state_is_event and not need_update(condition);
+
+                if (retire_ras_from_upt [context])
+                  {
+                val                   = state_is_event_update;
+                val_without_ack       = state_is_event_no_update;
+                  }
+                else
+                  {
+                val                   = state_is_ok_ko;
+                val_without_ack       = false;
+                  }                  
+
+                miss_prediction       = (state != UPDATE_PREDICTION_STATE_OK);
+                direction_good        = reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take   ;
+                btb_val               = update_btb(condition);
+                btb_address_src       = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src ;
+                btb_address_dest      = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest;
+                btb_condition         = condition;
+                dir_val               = update_dir(condition) and ifetch; // if not ifetch, then static prediction
+                dir_history           = reg_UPDATE_PREDICTION_TABLE [context][depth]._history     ;
+                ras_val               = update_ras(condition); // repop/ repush data -> don't corrupt ras
+                ras_push              = push_ras(condition);
+                ras_address           = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_ras;
+                ras_index             = reg_UPDATE_PREDICTION_TABLE [context][depth]._index_ras;
+                ras_prediction_ifetch = ifetch;
+
+                internal_UPDATE_FROM_UFPT [i] = false;
+                internal_UPDATE_DEPTH     [i] = depth;
+                internal_UPDATE_RAS       [i] = retire_ras_from_upt [context];
+
+                // Warning : don't update same entry
+                if (retire_ras_from_upt [context])
+                  {
+                    // Restore RAS. 
+                    if ((depth == reg_UPT_BOTTOM[context]) or not (val or val_without_ack))
+                      upt_update [context] = false;
+                    
+                    tab_upt_depth[context] = (depth==0)?(_param->_size_upt_queue[context]-1):(depth-1);
+                  }
+                else
+                  {
+                    if ((depth == reg_UPT_TOP [context]) or not (val or val_without_ack))
+                      upt_update [context] = false;
+                    
+                    tab_upt_depth[context] = (depth+1)%_param->_size_upt_queue[context];
+                  }
+              }
+          }
+
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * val             : %d",val    );
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * val_without_ack : %d",val_without_ack);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * btb_val         : %d",btb_val);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * dir_val         : %d",dir_val);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * ras_val         : %d",ras_val);
+
+	internal_UPDATE_VAL             [i] = val;
+	internal_UPDATE_VAL_WITHOUT_ACK [i] = val_without_ack;
+        internal_UPDATE_CONTEXT_ID      [i] = context;
+
+	PORT_WRITE(out_UPDATE_VAL                   [i],internal_UPDATE_VAL [i]);
+        if (val)
+          {
+        if (_param->_have_port_context_id)
+        PORT_WRITE(out_UPDATE_CONTEXT_ID            [i],context              );
+        PORT_WRITE(out_UPDATE_MISS_PREDICTION       [i],miss_prediction      );
+        PORT_WRITE(out_UPDATE_DIRECTION_GOOD        [i],direction_good       );
+        PORT_WRITE(out_UPDATE_BTB_VAL               [i],btb_val              );
+        PORT_WRITE(out_UPDATE_BTB_ADDRESS_SRC       [i],btb_address_src      );
+
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * address_src     : %.8x",btb_address_src);
+
+        PORT_WRITE(out_UPDATE_BTB_ADDRESS_DEST      [i],btb_address_dest     );
+        PORT_WRITE(out_UPDATE_BTB_CONDITION         [i],btb_condition        );
+        PORT_WRITE(out_UPDATE_DIR_VAL               [i],dir_val              );
+        if (_param->_have_port_history)
+        PORT_WRITE(out_UPDATE_DIR_HISTORY           [i],dir_history          );
+        PORT_WRITE(out_UPDATE_RAS_VAL               [i],ras_val              );
+        PORT_WRITE(out_UPDATE_RAS_PUSH              [i],ras_push             );
+        PORT_WRITE(out_UPDATE_RAS_ADDRESS           [i],ras_address          );
+        PORT_WRITE(out_UPDATE_RAS_INDEX             [i],ras_index            );
+        PORT_WRITE(out_UPDATE_RAS_PREDICTION_IFETCH [i],ras_prediction_ifetch);
+          }
+      }
+
+//     // ===================================================================
+//     // =====[ BRANCH_EVENT ]==============================================
+//     // ===================================================================
+//     for (uint32_t i=0; i<_param->_nb_context; i++)
+//       {
+// 	Tdepth_t   depth   = (reg_BOTTOM [i] + reg_NB_ELT_UPDATE [i])%_param->_size_queue [i];
+// 	state_t    state   = reg_UPDATE_PREDICTION_TABLE [i][depth]._state;
 	
-	Tcontrol_t val     = ((state == UPDATE_PREDICTION_STATE_OK) or
-			      (state == UPDATE_PREDICTION_STATE_KO));
-
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"UPDATE [%d] (genMoore)",i);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * context     : %d",context);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * depth       : %d",depth);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * state       : %s",toString(state).c_str());
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * val         : %d",val);
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * addr_src    : %x",reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src );
-// 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * addr_dest   : %x",reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest);
-
-	if (val)
-	  {
-	    Tbranch_condition_t cond    = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition;
-		      
-	    Tcontrol_t          ifetch  = reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction;
-	    Tcontrol_t          btb_val = true;
-	    Tcontrol_t          dir_val = (ifetch and // not ifetch == static prediction
-					   ((cond == BRANCH_CONDITION_FLAG_UNSET) or
-					    (cond == BRANCH_CONDITION_FLAG_SET)));
-	    Tcontrol_t          ras_val = ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or
-					   (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or
-					   (cond == BRANCH_CONDITION_READ_STACK));
-	    
-	    Tcontrol_t          push = ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or
-					(cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK));
-
-	    if (_param->_have_port_context_id)
-	    PORT_WRITE(out_UPDATE_CONTEXT_ID            [i],context);
-	    PORT_WRITE(out_UPDATE_MISS_PREDICTION       [i],(state == UPDATE_PREDICTION_STATE_KO));
-	    PORT_WRITE(out_UPDATE_DIRECTION_GOOD        [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take   );
-	    PORT_WRITE(out_UPDATE_BTB_VAL               [i],btb_val);
-	    PORT_WRITE(out_UPDATE_BTB_ADDRESS_SRC       [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src );
-	    PORT_WRITE(out_UPDATE_BTB_ADDRESS_DEST      [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest);
-	    PORT_WRITE(out_UPDATE_BTB_CONDITION         [i],cond);
-	    PORT_WRITE(out_UPDATE_DIR_VAL               [i],dir_val);
-	    if (_param->_have_port_history)
-	    PORT_WRITE(out_UPDATE_DIR_HISTORY           [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._history     );
-	    PORT_WRITE(out_UPDATE_RAS_VAL               [i],ras_val);
-	    PORT_WRITE(out_UPDATE_RAS_PUSH              [i],push);
-	    PORT_WRITE(out_UPDATE_RAS_ADDRESS           [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._address_ras );
-	    PORT_WRITE(out_UPDATE_RAS_INDEX             [i],reg_UPDATE_PREDICTION_TABLE [context][depth]._index_ras   );
-	    PORT_WRITE(out_UPDATE_RAS_PREDICTION_IFETCH [i],ifetch);
-
-	    internal_UPDATE_CONTEXT_ID [i] = context;
-	    internal_UPDATE_DEPTH      [i] = depth;
-
-	    tab_depth[context] = (depth+1)%_param->_size_queue[context];
-	  }
-
-	internal_UPDATE_VAL [i] = val;
-	PORT_WRITE(out_UPDATE_VAL [i], internal_UPDATE_VAL [i]);
-      }
-
-    // ===================================================================
-    // =====[ BRANCH_EVENT ]==============================================
-    // ===================================================================
-    for (uint32_t i=0; i<_param->_nb_context; i++)
-      {
-	Tdepth_t   depth   = (reg_BOTTOM [i] + reg_NB_ELT_UPDATE [i])%_param->_size_queue [i];
-	state_t    state   = reg_UPDATE_PREDICTION_TABLE [i][depth]._state;
-	
-	Tcontrol_t val     = (state == UPDATE_PREDICTION_STATE_EVENT);
-
-	if (val)
-	  {
-	    PORT_WRITE(out_BRANCH_EVENT_ADDRESS_SRC  [i], reg_UPDATE_PREDICTION_TABLE [i][depth]._address_src );
-	    PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST [i], reg_UPDATE_PREDICTION_TABLE [i][depth]._address_dest);
-	    internal_BRANCH_EVENT_DEPTH [i] = depth;
-	  }
-
-	internal_BRANCH_EVENT_VAL   [i] = val;
-	PORT_WRITE(out_BRANCH_EVENT_VAL [i], internal_BRANCH_EVENT_VAL [i]);
-      }
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
+// 	Tcontrol_t val     = ((state == UPDATE_PREDICTION_STATE_EVENT) or
+//                               (state == UPDATE_PREDICTION_STATE_WAITEND_AND_EVENT));
+
+// 	if (val)
+// 	  {
+// //          breakpoint ("UPT : have an branch_event (depth %d)",depth);
+// 	    PORT_WRITE(out_BRANCH_EVENT_ADDRESS_SRC  [i], reg_UPDATE_PREDICTION_TABLE [i][depth]._address_src );
+// 	    PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST [i], reg_UPDATE_PREDICTION_TABLE [i][depth]._address_dest);
+// 	    internal_BRANCH_EVENT_DEPTH [i] = depth;
+// 	  }
+
+// 	internal_BRANCH_EVENT_VAL   [i] = val;
+// 	PORT_WRITE(out_BRANCH_EVENT_VAL [i], internal_BRANCH_EVENT_VAL [i]);
+//       }
+
+      }
+    log_end(Update_Prediction_Table,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp	(revision 88)
@@ -27,4 +27,21 @@
 		      "Update_Prediction_Table",
 		      param_statistics);
+
+//     _stat_nb_branch_hit        = new counter_t * [_param->_nb_context];
+//     _stat_nb_branch_miss       = new counter_t * [_param->_nb_context];
+//     _stat_nb_branch_unused     = new counter_t * [_param->_nb_context];
+//     _stat_queue_nb_cycle_empty = new counter_t * [_param->_nb_context];
+//     _stat_queue_nb_cycle_full  = new counter_t * [_param->_nb_context];
+//     _stat_queue_nb_elt         = new counter_t * [_param->_nb_context];
+  
+//     for (uint32_t i=0; i<_param->_nb_context; ++i)
+//       {
+//         _stat_nb_branch_hit        [i] = _stat->create_counter("nb_branch_hit_"       +toString(i),"",toString(_("Branch hit speculation (context %d)"),i));
+//         _stat_nb_branch_miss       [i] = _stat->create_counter("nb_branch_miss_"      +toString(i),"",toString(_("Branch miss speculation (context %d)"),i));
+//         _stat_nb_branch_unused     [i] = _stat->create_counter("nb_branch_unused_"    +toString(i),"",toString(_("Branch unused, because an previous branch have miss speculation (context %d)"),i));
+//         _stat_queue_nb_cycle_empty [i] = _stat->create_counter("queue_nb_cycle_empty_"+toString(i),"",toString(_("Cycle number where the Update Prediction Table is empty (context %d)"),i));
+//         _stat_queue_nb_cycle_full  [i] = _stat->create_counter("queue_nb_cycle_full_" +toString(i),"",toString(_("Cycle number where the Update Prediction Table is full (%d elements) (context %d)"),_param->_size_queue[i],i));
+//         _stat_queue_nb_elt         [i] = _stat->create_counter("queue_nb_elt_"        +toString(i),"",toString(_("Average branchement by cycle in Update Prediction Table (context %d)"),i));
+//       }
     
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp	(revision 88)
@@ -26,5 +26,11 @@
     log_printf(INFO,Update_Prediction_Table,FUNCTION,"Generate Statistics file");
     
-    delete _stat;
+    delete    _stat;
+//     delete [] _stat_nb_branch_hit       ;
+//     delete [] _stat_nb_branch_miss      ;
+//     delete [] _stat_nb_branch_unused    ;
+//     delete [] _stat_queue_nb_cycle_empty;
+//     delete [] _stat_queue_nb_cycle_full ;
+//     delete [] _stat_queue_nb_elt        ;
     
     log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 88)
@@ -17,54 +17,128 @@
 namespace update_prediction_table {
 
-
 #undef  FUNCTION
 #define FUNCTION "Update_Prediction_Table::transition"
   void Update_Prediction_Table::transition (void)
   {
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin");
+    log_begin(Update_Prediction_Table,FUNCTION);
+    log_function(Update_Prediction_Table,FUNCTION,_name.c_str());
 
     if (PORT_READ(in_NRESET) == 0)
       {
+        // Initialisation
+
+        reg_UPDATE_PRIORITY = 0;
+
+        // All pointer is set at 0
 	for (uint32_t i=0; i<_param->_nb_context; i++)
 	  {
-	    reg_TOP                [i] = 0;
-	    reg_BOTTOM             [i] = 0;
-	    reg_NB_ELT             [i] = 0;
-	    reg_NB_ELT_UPDATE      [i] = 0;
-	    reg_NB_ELT_NEED_UPDATE [i] = 0;
-	    for (uint32_t j=0; j<_param->_size_queue[i]; j++)
-	      reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY;
-	  }
-	reg_UPDATE_PRIORITY = 0;
+            for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j)
+              reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY;
+            reg_UFPT_BOTTOM          [i] = 0;
+            reg_UFPT_TOP             [i] = 0;
+            reg_UFPT_UPDATE          [i] = 0;
+            reg_UFPT_NB_NEED_UPDATE  [i] = 0;
+                                                                
+            for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j)
+              reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY;
+            reg_UPT_BOTTOM           [i] = 0;
+            reg_UPT_TOP              [i] = 0;
+            reg_UPT_UPDATE           [i] = 0;
+            reg_UPT_NB_NEED_UPDATE   [i] = 0;
+                                                                                    
+            reg_IS_ACCURATE          [i] = true;
+
+            reg_EVENT_STATE          [i] = EVENT_STATE_OK;
+          }
       }
     else
       {
 	// ===================================================================
+	// =====[ GARBAGE COLLECTOR ]=========================================
+	// ===================================================================
+
+        // Each cycle, if the most lastest branch have update all prediction struction (state = end), free this slot
+        //   * Update state -> new status is "empty"
+        //   * Update pointer (bottom and accurate)
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * GARBAGE COLLECTOR");
+	for (uint32_t i=0; i<_param->_nb_context; i++)
+	  {
+            // UPDATE_FETCH_PREDICTION_TABLE
+            {
+              uint32_t bottom = reg_UFPT_BOTTOM [i];
+              
+              // Test if state is end
+              if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END)
+                {
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UFPT [%d][%d]",i,bottom);
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UFPT [%d][%d].state =  UPDATE_FETCH_PREDICTION_STATE_EMPTY",i,bottom);
+
+                  // Free slot
+                  reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY;
+                  // Update pointer
+                  reg_UFPT_BOTTOM [i] = (bottom+1)%_param->_size_ufpt_queue[i];
+                }
+            }
+
+            // UPDATE_PREDICTION_TABLE
+            {
+              uint32_t bottom = reg_UPT_BOTTOM [i];
+              
+              // Test if state is end
+              if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END)
+                {
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT [%d][%d]",i,bottom);
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT [%d][%d]._state =  UPDATE_PREDICTION_STATE_EMPTY",i,bottom);
+
+                  // Free slot
+                  reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY;
+                  // Update pointer
+                  reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i];
+                }
+            }
+	  }
+
+	// ===================================================================
 	// =====[ PREDICT ]===================================================
 	// ===================================================================
+        
+        // An ifetch_unit compute next cycle and have an branch : predict_val is set
+        //   * Alloc new entry -> new status is "wait decod"
+        //   * Save input (to restore in miss or error)
+        //   * Update pointer
+
 	for (uint32_t i=0; i<_param->_nb_inst_predict; i++)
 	  if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i])
 	    {
 	      Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0;
-	      uint32_t   top     = reg_TOP [context];
-
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT[%d] - Accepted",i);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top     : %d",top);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt  : %d",reg_NB_ELT[context]);
-
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._state        = UPDATE_PREDICTION_STATE_WAIT_DECOD;
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._ifetch_prediction = true;
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._condition    = PORT_READ(in_PREDICT_BTB_CONDITION    [i]);
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._address_src  = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC  [i]);
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]);
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._last_take    = PORT_READ(in_PREDICT_BTB_LAST_TAKE    [i]);
-	    //reg_UPDATE_PREDICTION_TABLE [context][top]._good_take    
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._history      = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0;
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._address_ras  = PORT_READ(in_PREDICT_RAS_ADDRESS      [i]);
-	      reg_UPDATE_PREDICTION_TABLE [context][top]._index_ras    = PORT_READ(in_PREDICT_RAS_INDEX        [i]);
-
-	      reg_TOP    [context] = (top+1)%_param->_size_queue [context];
-	      reg_NB_ELT [context] ++;
+	      uint32_t   top     = internal_PREDICT_UPDATE_PREDICTION_ID [i];
+
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * PREDICT[%d] - Accepted",i);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context : %d",context);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * top     : %d",top);
+
+#ifdef DEBUG_TEST
+              if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY)
+                throw ERRORMORPHEO(FUNCTION,_("Predict : invalid state."));
+#endif
+
+              log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD (predict)",context,top);
+ 	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state        = UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD;
+
+              Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]);
+
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._condition    = condition;
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_src  = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC  [i]);
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]);
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._last_take    = PORT_READ(in_PREDICT_BTB_LAST_TAKE    [i]);
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._is_accurate  = PORT_READ(in_PREDICT_BTB_IS_ACCURATE  [i]);
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._history      = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0;
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_ras  = PORT_READ(in_PREDICT_RAS_ADDRESS      [i]);
+	      reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._index_ras    = PORT_READ(in_PREDICT_RAS_INDEX        [i]);
+
+              reg_UFPT_TOP     [context] = (top+1)%_param->_size_ufpt_queue [context];
+//            reg_UFPT_UPDATE  [context] = reg_UFPT_TOP [context];
+              if (need_update(condition))
+                reg_UFPT_NB_NEED_UPDATE [context] ++;
 	    }
 
@@ -72,75 +146,139 @@
 	// =====[ DECOD ]=====================================================
 	// ===================================================================
+
+
+        // An decod is detected by decod stage
+        //   1) Hit prediction : The instruction bundle have a branch predicted in ifetch stage and it is this branch
+        //      * Update state, wait_decod -> wait_end
+        //      * Pop ufpt -> push upt
+        //      * Update accurate register : if the predict stage have tagged this branch as not accurate, stop decod
+        //   2) Miss           : The instruction bundle have a branch but it is not predicted
+        //      * Flush ufpt
+        //      * decod information is write in upt
+
 	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
 	  if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i])
 	    {
-	      Tcontext_t context     = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0;
-	      Tcontrol_t miss_ifetch = PORT_READ(in_DECOD_MISS_IFETCH [i]);
-	      Tcontrol_t miss_decod  = PORT_READ(in_DECOD_MISS_DECOD  [i]);
-
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"DECOD[%d] - Accepted",i);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context     : %d",context);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_decod  : %d",miss_decod);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt      : %d",reg_NB_ELT[context]);
+	      Tcontext_t          context       = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0;
+	      Tcontrol_t          miss_ifetch   = PORT_READ(in_DECOD_MISS_IFETCH [i]);
+	      Tcontrol_t          miss_decod    = PORT_READ(in_DECOD_MISS_DECOD  [i]);
+              uint32_t            upt_ptr_write = internal_DECOD_UPT_PTR_WRITE [i];
+              Tbranch_condition_t condition  ;
+              Tcontrol_t          is_accurate;
+
+              log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * DECOD[%d] - Accepted",i);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context       : %d",context);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss_ifetch   : %d",miss_ifetch);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss_decod    : %d",miss_decod);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * upt_ptr_write : %d",upt_ptr_write);
 	      
-	      // Test if miss ifetch
-	      //   miss ifetch = decod a branch and the predict unit have not predict this branch ... gloup :P
-	      if (miss_ifetch or miss_decod)
+              if (miss_ifetch or miss_decod)
 		{
-		  Tdepth_t depth = (_param->_have_port_max_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0;
-		  Tdepth_t top   = reg_TOP [context];
-
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._state        = UPDATE_PREDICTION_STATE_WAITEND;
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._ifetch_prediction = false; // static prediction
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._condition    = PORT_READ(in_DECOD_BTB_CONDITION    [i]);
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._address_src  = PORT_READ(in_DECOD_BTB_ADDRESS_SRC  [i]);
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]);
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._last_take    = PORT_READ(in_DECOD_BTB_LAST_TAKE    [i]);
-		//reg_UPDATE_PREDICTION_TABLE [context][top]._good_take
-		//reg_UPDATE_PREDICTION_TABLE [context][top]._history
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._address_ras  = PORT_READ(in_DECOD_RAS_ADDRESS      [i]);
-		  reg_UPDATE_PREDICTION_TABLE [context][top]._index_ras    = PORT_READ(in_DECOD_RAS_INDEX        [i]);
-
-		  // Invalid all previous "ifetch" prediction 
-		  // (ifetch prediction = prediction make in fetch stage and not again comming in decod stage)
-		  uint32_t nb_elt_miss        = ((top> depth)?top:(top+_param->_size_queue[context]))-depth;
-		  uint32_t nb_elt_need_update = 0;
-		  for (uint32_t j=0; j<nb_elt_miss; j++)
-		    {
-		      uint32_t k=(depth+j)%_param->_size_queue[context];
-		      
-		      // Ifetch have make a prediction and it's a miss
-		      // When ifetch predict :
-		      //   * btb is not change       -> needn't update
-		      //   * direction is not change -> needn't update
-		      //   * ras have change         -> need    update
-
-		      Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition;
-		      if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or
-			  (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or
-			  (cond == BRANCH_CONDITION_READ_STACK))
-			{
-			  nb_elt_need_update ++;
-			  reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO;
-			}
-		      else
-			{
-			  reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END;
-			}
-		    }
-		  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_EVENT; // rewrite
-
-		  reg_TOP                [context] = (depth+1)%_param->_size_queue [context];
-		  reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update;
-		  reg_NB_ELT             [context] ++;
+                  // Have a miss !!!
+
+                  // Flush UPFT
+
+                  // It's to accelerate miss speculation
+                  if (reg_UFPT_NB_NEED_UPDATE [context] == 0)
+                    {
+                      // No entry need prediction, flush all entry -> Reset
+                      for (uint32_t j=0; j<_param->_size_ufpt_queue[context]; ++j)
+                        reg_UPDATE_FETCH_PREDICTION_TABLE [context][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY;
+                      reg_UFPT_BOTTOM [context] = 0;
+                      reg_UFPT_TOP    [context] = 0;
+//                    reg_UFPT_UPDATE [context] = 0;
+                    }
+                  else
+                    {
+                      reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context];
+
+#ifdef DEBUG_TEST
+                      if (reg_EVENT_STATE [context] == EVENT_STATE_OK)
+                        throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state."));
+#endif
+                      
+                      // Change state
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_FLUSH_UFPT (decod - miss)",context);
+                      
+                      reg_EVENT_STATE [context] = EVENT_STATE_FLUSH_UFPT;
+                    }
+
+                  // Push upt (from decod interface)
+                  condition   = PORT_READ(in_DECOD_BTB_CONDITION [i]);
+                  is_accurate = PORT_READ(in_DECOD_IS_ACCURATE   [i]);
+
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition         = condition;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src       = PORT_READ(in_DECOD_BTB_ADDRESS_SRC  [i]);
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest      = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]);
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take         = PORT_READ(in_DECOD_BTB_LAST_TAKE    [i]);
+//                reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate       = is_accurate;
+//                reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history           = ; // static prediction
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras       = PORT_READ(in_DECOD_RAS_ADDRESS [i]);
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras         = PORT_READ(in_DECOD_RAS_INDEX   [i]);
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = false; // static prediction
 		}
 	      else
 		{
 		  // Normal case : branch is previous predicated, change state of branch
-		  Tdepth_t depth = (_param->_have_port_max_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0;
-
-		  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_WAITEND;
+                  uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0;
+
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * ufpt_ptr_read : %d",ufpt_ptr_read);
+
+#ifdef DEBUG_TEST
+                  if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD)
+                    throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state."));
+#endif
+                  // Change state
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read);
+                  reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END;
+
+                  // Push upt (from Pop ufpt)
+                  condition   = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition;
+                  is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate;
+
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition         = condition;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src       = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest      = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take         = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take   ;
+//                reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate       = is_accurate;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history           = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history     ;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras       = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras         = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras   ;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true; // prediction from ifetch
+
+                  // Update pointer
+                  if (need_update(condition))
+                    {
+                      reg_UFPT_NB_NEED_UPDATE [context] --;
+                    }
 		}
+
+              // All case !!!
+
+#ifdef DEBUG_TEST
+              if (reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state != UPDATE_PREDICTION_STATE_EMPTY)
+                throw ERRORMORPHEO(FUNCTION,_("Decod : invalid upt state."));
+#endif
+              
+              // Change state
+              log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write);
+              reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END;
+              
+              // Write new accurate 
+#ifdef DEBUG_TEST
+              if (not reg_IS_ACCURATE [context]  and not is_accurate)
+                throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag."));
+#endif
+              reg_IS_ACCURATE [context] = is_accurate;
+              
+              // Update pointer
+              reg_UPT_TOP     [context] = (upt_ptr_write+1)%_param->_size_upt_queue [context];
+//            reg_UPT_UPDATE  [context] = reg_UPT_TOP [context];
+              if (need_update(condition))
+                {
+                  reg_UPT_NB_NEED_UPDATE  [context] ++;
+                }
 	    }
 
@@ -148,67 +286,83 @@
 	// =====[ BRANCH_COMPLETE ]===========================================
 	// ===================================================================
+        
+        // The branch is complete
+        //   * Hit  prediction : 
+        //     * update status
+        //   * Miss prediction :
 	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
 	  if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i])
 	    {
 	      Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
-	      Tdepth_t   depth   = (_param->_have_port_max_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
-
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"BRANCH_COMPLETE[%d] - Accepted",i);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth   : %d",depth);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt  : %d",reg_NB_ELT[context]);
+	      Tdepth_t   depth   = (_param->_have_port_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
+
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * BRANCH_COMPLETE[%d] - Accepted",i);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context : %d",context);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth   : %d",depth);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss    : %d",internal_BRANCH_COMPLETE_MISS_PREDICTION [i]);
 	      
 	      if (internal_BRANCH_COMPLETE_MISS_PREDICTION [i])
 		{
 		  // Miss case
-		  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_EVENT;
-
-		  // Another prediction (prediction with depth higer)
-		  Tdepth_t top                = reg_TOP [context];
-		  uint32_t nb_elt_miss        = ((top> depth)?top:(top+_param->_size_queue[context]))-depth;
-		  uint32_t nb_elt_need_update = 1;
-		  for (uint32_t j=1; j<nb_elt_miss; j++)
-		    {
-		      uint32_t k=(depth+j)%_param->_size_queue[context];
+// //                breakpoint("Branch_complete and miss ...");
+
+//                   log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state [%d][%d] <- UPDATE_PREDICTION_STATE_EVENT (branch_complete)",context,depth);
+// 		  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_EVENT;
+
+// 		  // Another prediction (prediction with depth higer)
+// 		  Tdepth_t top                = reg_TOP [context];
+// 		  uint32_t nb_elt_miss        = ((top> depth)?top:(top+_param->_size_queue[context]))-depth;
+// 		  uint32_t nb_elt_need_update = 1;
+// 		  for (uint32_t j=1; j<nb_elt_miss; j++)
+// 		    {
+// 		      uint32_t k=(depth+j)%_param->_size_queue[context];
 		      
-		      // Ifetch have make a prediction and it's a miss
-		      // When ifetch predict :
-		      //   * btb is not change       -> needn't update
-		      //   * direction is not change -> needn't update
-		      //   * ras have change         -> need    update
-
-		      Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition;
-		      if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or
-			  (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or
-			  (cond == BRANCH_CONDITION_READ_STACK))
-			{
-			  nb_elt_need_update ++;
-			  reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO;
-			}
-		      else
-			{
-			  reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END;
-			}
-		    }
-		  reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update;
-
-		  // Update pointer :
-		  reg_TOP                [context]  = depth;
-		  reg_NB_ELT             [context] -= nb_elt_miss;
+// 		      // Ifetch have make a prediction and it's a miss
+// 		      // When ifetch predict :
+// 		      //   * btb is not change       -> needn't update
+// 		      //   * direction is not change -> needn't update
+// 		      //   * ras have change         -> need    update
+
+// 		      Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition;
+// 		      if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or
+// 			  (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or
+// 			  (cond == BRANCH_CONDITION_READ_STACK))
+// 			{
+//                           log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state [%d][%d] <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch miss, update ras)",context,k);
+
+// 			  nb_elt_need_update ++;
+// 			  reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO;
+// 			}
+// 		      else
+// 			{
+//                           log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state [%d][%d] <- UPDATE_PREDICTION_STATE_END (branch_complete, ifetch miss, don't update ras)",context,k);
+
+// 			  reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END;
+// 			}
+// 		    }
+// 		  reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update;
+
+// 		  // Update pointer :
+// 		  reg_TOP                [context]  = depth;
+// 		  reg_NB_ELT             [context] -= nb_elt_miss;
+// 	      reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = internal_BRANCH_COMPLETE_ADDRESS_DEST [i];
+
 		}
 	      else
 		{
-		  // Hit case
-#ifdef DEBUG_TEST
-		  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAITEND)
-		    ERRORMORPHEO(FUNCTION,"Branche complete : invalid state");
-#endif
-		  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK;
+                  // Hit case
+
+#ifdef DEBUG_TEST
+                  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END)
+                    throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state."));
+#endif
+                    
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth);
+                  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK;
 		}
 
-	      // In all case : update good_take and address_destination
-	      reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take    = internal_BRANCH_COMPLETE_TAKE         [i];
-	      reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = internal_BRANCH_COMPLETE_ADDRESS_DEST [i];
-	    }
+	      // In all case : update good_take
+	      reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = internal_BRANCH_COMPLETE_TAKE [i];
+            }
 
 	// ===================================================================
@@ -216,17 +370,63 @@
 	// ===================================================================
 	for (uint32_t i=0; i<_param->_nb_inst_update; i++)
-	  if (internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i]))
+	  if ((internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) or
+              (internal_UPDATE_VAL_WITHOUT_ACK [i]))
 	    {
 	      Tcontext_t context = internal_UPDATE_CONTEXT_ID [i];
 	      Tdepth_t   depth   = internal_UPDATE_DEPTH      [i];
-
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"UPDATE[%d] - Accepted",i);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth   : %d",depth);
-
-	      if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO)
-		reg_NB_ELT_NEED_UPDATE [context] --;
-
-	      reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END;
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * UPDATE[%d] - Accepted",i);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context : %d",context);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth   : %d",depth);
+
+              if (internal_UPDATE_FROM_UFPT [i])
+                {
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update Fetch Prediction Table");
+                  
+                  // Change state
+#ifdef DEBUG_TEST
+                  if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state != UPDATE_FETCH_PREDICTION_STATE_EVENT)
+                    throw ERRORMORPHEO(FUNCTION,_("Update : invalid ufpt state."));
+#endif
+
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (update)",context,depth);
+
+                  reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state = UPDATE_FETCH_PREDICTION_STATE_END;
+
+                  // Update pointer
+                  reg_UFPT_UPDATE [context] = (depth==0)?(_param->_size_ufpt_queue[context]-1):(depth-1);
+
+                  // Free a register that need update ?
+                  if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition))
+                    reg_UFPT_NB_NEED_UPDATE [context] --;
+                }
+              else
+                {
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update Prediction Table");
+                  
+                  // Change state
+#ifdef DEBUG_TEST
+                  if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_OK   ) and
+                      (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_KO   ) and
+                      (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_EVENT))
+                    throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state."));
+#endif
+
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_END (update)",context,depth);
+
+                  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END;
+
+                  // Update pointer
+                  if (internal_UPDATE_RAS [i])
+                    reg_UPT_UPDATE [context] = (depth==0)?(_param->_size_upt_queue[context]-1):(depth-1);
+                  else
+                    reg_UPT_UPDATE [context] = (depth+1)%_param->_size_upt_queue[context];
+
+                  // Free a register that need update ?
+                  if (need_update(reg_UPDATE_PREDICTION_TABLE [context][depth]._condition))
+                    reg_UPT_NB_NEED_UPDATE [context] --;
+                  // Free the branch with no accurate ?
+                  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate == false)
+                    reg_IS_ACCURATE [i] = true;
+                }
 	    }
 	
@@ -234,52 +434,83 @@
 	reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context;
 
-	// ===================================================================
-	// =====[ BRANCH_EVENT ]==============================================
-	// ===================================================================
-	for (uint32_t i=0; i<_param->_nb_context; i++)
-	  if (internal_BRANCH_EVENT_VAL [i] and PORT_READ(in_BRANCH_EVENT_ACK [i]))
-	  {
-	    Tdepth_t depth = internal_BRANCH_EVENT_DEPTH [i];
-	    
-	    reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_KO;
-	  }
-
-	// ===================================================================
-	// =====[ GARBAGE COLLECTOR ]=========================================
-	// ===================================================================
-
-	for (uint32_t i=0; i<_param->_nb_context; i++)
-	  {
-	    uint32_t bottom = reg_BOTTOM [i];
-	    
-	    // Test if the tail of queue is finish (ok or ko and update)
-	    if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END)
-	      {
-		log_printf(TRACE,Update_Prediction_Table,FUNCTION,"GARBAGE_COLLECTOR");
-		log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i);
-		log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom  : %d",bottom);
-
-		reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY;
-		reg_BOTTOM [i] = (bottom+1)%_param->_size_queue [i];
-		if (reg_NB_ELT [i]>0)
-		  reg_NB_ELT [i] --;
-	      }
-	  }
-      }
+// 	// ===================================================================
+// 	// =====[ BRANCH_EVENT ]==============================================
+// 	// ===================================================================
+// 	for (uint32_t i=0; i<_param->_nb_context; i++)
+// 	  if (internal_BRANCH_EVENT_VAL [i] and PORT_READ(in_BRANCH_EVENT_ACK [i]))
+//             {
+//               Tdepth_t depth = internal_BRANCH_EVENT_DEPTH [i];
+
+//               if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_EVENT)
+//                 {
+//                   log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state [%d][%d] <- UPDATE_PREDICTION_STATE_KO (branch_event)",i,depth);
+                  
+//                   reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_KO;
+//                 }
+//               else
+//                 {
+// #ifdef DEBUG_TEST
+//                   if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_WAITEND_AND_EVENT)
+//                     throw ERRORMORPHEO(FUNCTION,_("Branche event : invalid state"));
+// #endif
+              
+//                   log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * state [%d][%d] <- UPDATE_PREDICTION_STATE_WAITEND (branch_event)",i,depth);
+                  
+//                   reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_WAITEND;
+//                 }
+//             }
 
 #if (DEBUG >= DEBUG_TRACE)
-    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"Dump Update_Prediction_Table");
-    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * reg_UPDATE_PRIORITY      : %d",reg_UPDATE_PRIORITY);
+    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * Dump Update_Prediction_Table");
+    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_UPDATE_PRIORITY       : %d",reg_UPDATE_PRIORITY);
     for (uint32_t i=0; i<_param->_nb_context; i++)
       {
-	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * Update_Prediction_Table   [%d]",i);
-	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_TOP                : %d",reg_TOP                [i]);
-	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_BOTTOM             : %d",reg_BOTTOM             [i]);
-	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_NB_ELT             : %d",reg_NB_ELT             [i]);
-	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_NB_ELT_NEED_UPDATE : %d",reg_NB_ELT_NEED_UPDATE [i]);
-	for (uint32_t j=0; j<_param->_size_queue[i]; j++)
-	  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      [%d] %s %x",j,toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str(),reg_UPDATE_PREDICTION_TABLE [i][j]._address_src);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_IS_ACCURATE           : %d",reg_IS_ACCURATE        [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_STATE           : %s"  ,toString(reg_EVENT_STATE [i]).c_str());
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_RAS_CORRUPTED   : %d"  ,reg_EVENT_RAS_CORRUPTED   [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_SRC     : %.8x",reg_EVENT_ADDRESS_SRC     [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_SRC_VAL : %d"  ,reg_EVENT_ADDRESS_SRC_VAL [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_DEST    : %.8x",reg_EVENT_ADDRESS_DEST    [i]);
+
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update_Fetch_Prediction_Table   [%d]",i);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UFPT_BOTTOM         : %d",reg_UFPT_BOTTOM         [i]);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UFPT_TOP            : %d",reg_UFPT_TOP            [i]);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]);
+	for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++)
+	  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"        [%d] %.4d, %.8x %.8x, %.1d   %.1d, %.8d %.8x %.4d - %s",
+                     j,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._last_take,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._is_accurate,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._history,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras,
+                     reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._index_ras,
+                     toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str()
+                     );
+
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update_Prediction_Table   [%d]",i);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_BOTTOM          : %d",reg_UPT_BOTTOM         [i]);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_TOP             : %d",reg_UPT_TOP            [i]);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_UPDATE          : %d",reg_UPT_UPDATE         [i]);
+	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_NB_NEED_UPDATE  : %d",reg_UPT_NB_NEED_UPDATE [i]);
+	for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++)
+	  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"        [%d] %.4d, %.8x %.8x, %.1d %.1d %.1d, %.8d %.8x %.4d - %s",
+                     j,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._condition,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._address_src,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._last_take,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._good_take,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._is_accurate,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._history,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras,
+                     reg_UPDATE_PREDICTION_TABLE [i][j]._index_ras,
+                     toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str()
+                     );
       }
 #endif
+      }
 
 
@@ -287,6 +518,6 @@
     end_cycle ();
 #endif
-
-    log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End");
+    
+    log_end(Update_Prediction_Table,FUNCTION);
   };
 
