Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libCommit_unit.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.deps	(revision 88)
@@ -0,0 +1,45 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Commit_unit			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Priority
+include 			$(DIR_MORPHEO)/Behavioural/Generic/Priority/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Commit_unit_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit
+
+#-----[ Library ]------------------------------------------
+
+Commit_unit_LIBRARY		= 	-lCommit_unit			\
+					$(Priority_LIBRARY)		\
+					$(Behavioural_LIBRARY)	
+
+Commit_unit_DIR_LIBRARY		=	-L$(Commit_unit_DIR)/lib	\
+					$(Priority_DIR_LIBRARY)		\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Commit_unit_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) Priority_library;		\
+				$(MAKE) --directory=$(Commit_unit_DIR) --makefile=Makefile;
+
+Commit_unit_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) Priority_library_clean;		\
+				$(MAKE) --directory=$(Commit_unit_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Commit_unit_LIBRARY)
+
+DIR_LIBRARY			= $(Commit_unit_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Commit_unit_library
+
+library_clean			: Commit_unit_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_min.cfg	(revision 88)
@@ -0,0 +1,20 @@
+Commit_unit
+1	1	+1	# nb_front_end            
+1	1	+1	# nb_context              [0]    [nb_front_end]
+1	1	+1	# nb_rename_unit          
+1	1	+1	# size_queue              
+1	1	+1	# nb_bank                 
+1	1	+1	# nb_inst_insert          [0]    [nb_rename_unit]
+1	1	+1	# nb_inst_retire	  [0]    [nb_rename_unit]
+1	1	+1	# nb_inst_commit
+1	1	+1	# nb_inst_reexecute	 
+1	1	+1	# nb_inst_branch_complete 
+0	0	+1	# nb_branch_speculated    [0][0] [nb_front_end][nb_context]
+32	32	+1	# size_general_data       
+1	1	+1	# size_store_queue_ptr    
+0	0	+1	# size_load_queue_ptr     
+5	5	+1	# size_general_register   
+1	1	+1	# size_special_register   
+1	1	+1	# priority              
+1	1	+1	# load_balancing        
+1	1	+1	# nb_rename_unit_select 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_mono_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_mono_rename_unit.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_mono_rename_unit.cfg	(revision 88)
@@ -0,0 +1,20 @@
+Commit_unit
+1	1	+1	# nb_front_end            
+1	1	+1	# nb_context              [0]    [nb_front_end]
+1	1	+1	# nb_rename_unit          
+64 	64	*2	# size_queue              
+4	8 	*2	# nb_bank                 
+1	4	*4	# nb_inst_insert          [0]    [nb_rename_unit]
+1	4	*4	# nb_inst_retire	  [0]    [nb_rename_unit]
+1	4	*4	# nb_inst_commit
+1	1	+1	# nb_inst_reexecute	 
+1	1	+1	# nb_inst_branch_complete 
+0	0	+1	# nb_branch_speculated    [0][0] [nb_front_end][nb_context]
+32	32	+1	# size_general_data       
+1	1	+1	# size_store_queue_ptr    
+0	0	+1	# size_load_queue_ptr     
+5	5	+1	# size_general_register   
+1	1	+1	# size_special_register   
+1	1	+1	# priority              
+1	1	+1	# load_balancing        
+1	1	+1	# nb_rename_unit_select 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,30 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (10240*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,156 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h"
+
+#define NB_PARAMS 15
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_front_end                                       (uint32_t         )\n"));
+  err (_(" * nb_context              [nb_front_end]             (uint32_t         )\n"));
+  err (_(" * nb_rename_unit                                     (uint32_t         )\n"));
+  err (_(" * size_queue                                         (uint32_t         )\n"));
+  err (_(" * nb_bank                                            (uint32_t         )\n"));
+  err (_(" * nb_inst_insert          [nb_rename_unit]           (uint32_t         )\n"));
+  err (_(" * nb_inst_retire          [nb_rename_unit]           (uint32_t         )\n"));
+  err (_(" * nb_inst_commit                                     (uint32_t         )\n"));
+  err (_(" * nb_inst_reexecute                                  (uint32_t         )\n"));
+  err (_(" * nb_inst_branch_complete                            (uint32_t         )\n"));
+  err (_(" * nb_branch_speculated    [nb_front_end][nb_context] (uint32_t         )\n"));
+  err (_(" * size_general_data                                  (uint32_t         )\n"));
+  err (_(" * size_store_queue_ptr                               (uint32_t         )\n"));
+  err (_(" * size_load_queue_ptr                                (uint32_t         )\n"));
+  err (_(" * size_general_register                              (uint32_t         )\n"));
+  err (_(" * size_special_register                              (uint32_t         )\n"));
+  err (_(" * priority                                           (Tpriority_t      )\n"));
+  err (_(" * load_balancing                                     (Tload_balancing_t)\n"));
+  err (_(" * nb_rename_unit_select                              (uint32_t         )\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t     _nb_front_end            = fromString<uint32_t>(argv[x++]);
+
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+_nb_front_end))
+    usage (argc, argv);
+
+  uint32_t     _sum_nb_context = 0;
+  uint32_t   * _nb_context              = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _nb_context [i] = fromString<uint32_t>(argv[x++]);
+      _sum_nb_context += _nb_context [i];
+    }
+  uint32_t     _nb_rename_unit          = fromString<uint32_t>(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+1*_nb_front_end+_sum_nb_context+2*_nb_rename_unit))
+    usage (argc, argv);
+
+  uint32_t     _size_queue              = fromString<uint32_t>(argv[x++]);
+  uint32_t     _nb_bank                 = fromString<uint32_t>(argv[x++]);
+  uint32_t   * _nb_inst_insert          = new uint32_t [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_inst_insert [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t   * _nb_inst_retire          = new uint32_t [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_inst_retire [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t     _nb_inst_commit    	= fromString<uint32_t>(argv[x++]);
+  uint32_t     _nb_inst_reexecute	= fromString<uint32_t>(argv[x++]);
+  uint32_t     _nb_inst_branch_complete = fromString<uint32_t>(argv[x++]);
+  uint32_t **  _nb_branch_speculated    = new uint32_t * [_nb_front_end];
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _nb_branch_speculated [i] = new uint32_t [_nb_context [i]];
+      for (uint32_t j=0; j<_nb_context [i]; j++)
+	_nb_branch_speculated [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+
+  uint32_t          _size_general_data       = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_store_queue_ptr    = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_load_queue_ptr     = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_general_register   = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_special_register   = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t       _priority                = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t _load_balancing          = fromString<Tload_balancing_t>(argv[x++]);
+  uint32_t          _nb_rename_unit_select   = fromString<uint32_t         >(argv[x++]);
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters
+	(_nb_front_end            ,
+	 _nb_context              ,
+	 _nb_rename_unit          ,
+	 _size_queue              ,
+	 _nb_bank                 ,
+	 _nb_inst_insert          ,
+	 _nb_inst_retire          ,
+	 _nb_inst_commit          ,
+	 _nb_inst_reexecute       ,
+	 _nb_inst_branch_complete ,
+	 _nb_branch_speculated    ,
+	 _size_general_data       ,
+	 _size_store_queue_ptr    ,
+	 _size_load_queue_ptr     ,
+	 _size_general_register   ,
+	 _size_special_register   ,
+	 _priority                ,
+	 _load_balancing          ,
+	 _nb_rename_unit_select   ,
+         true // is_toplevel
+	 );
+      
+//       msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("%s"),error.what ());
+      _return = EXIT_FAILURE;
+    }
+  
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("No error");
+      else
+	TEST_KO("A lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  delete [] _nb_context    ;
+  delete [] _nb_inst_insert;
+  delete [] _nb_inst_retire;
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    delete [] _nb_branch_speculated [i];
+  delete [] _nb_branch_speculated;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,723 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+class rob_entry_t
+{
+public:  bool       val;
+public : Taddress_t address;
+};
+
+
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Commit_unit * _Commit_unit = new Commit_unit 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_INSERT_VAL                     ," in_INSERT_VAL                     ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL(out_INSERT_ACK                     ,"out_INSERT_ACK                     ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_FRONT_END_ID            ," in_INSERT_FRONT_END_ID            ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_CONTEXT_ID              ," in_INSERT_CONTEXT_ID              ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL(out_INSERT_PACKET_ID               ,"out_INSERT_PACKET_ID               ",Tpacket_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_ID          ," in_INSERT_RENAME_UNIT_ID          ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_DEPTH                   ," in_INSERT_DEPTH                   ",Tdepth_t          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_TYPE                    ," in_INSERT_TYPE                    ",Ttype_t           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_OPERATION               ," in_INSERT_OPERATION               ",Toperation_t      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NO_EXECUTE              ," in_INSERT_NO_EXECUTE              ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT           ," in_INSERT_IS_DELAY_SLOT           ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS                 ," in_INSERT_ADDRESS                 ",Tgeneral_data_t   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION               ," in_INSERT_EXCEPTION               ",Texception_t      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION_USE           ," in_INSERT_EXCEPTION_USE           ",Texception_t      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_STORE_QUEUE_PTR_WRITE   ," in_INSERT_STORE_QUEUE_PTR_WRITE   ",Tlsq_ptr_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_LOAD_QUEUE_PTR_WRITE    ," in_INSERT_LOAD_QUEUE_PTR_WRITE    ",Tlsq_ptr_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_READ_RA                 ," in_INSERT_READ_RA                 ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RA_LOG          ," in_INSERT_NUM_REG_RA_LOG          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY          ," in_INSERT_NUM_REG_RA_PHY          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_READ_RB                 ," in_INSERT_READ_RB                 ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RB_LOG          ," in_INSERT_NUM_REG_RB_LOG          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY          ," in_INSERT_NUM_REG_RB_PHY          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_READ_RC                 ," in_INSERT_READ_RC                 ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RC_LOG          ," in_INSERT_NUM_REG_RC_LOG          ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY          ," in_INSERT_NUM_REG_RC_PHY          ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_WRITE_RD                ," in_INSERT_WRITE_RD                ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RD_LOG          ," in_INSERT_NUM_REG_RD_LOG          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD      ," in_INSERT_NUM_REG_RD_PHY_OLD      ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW      ," in_INSERT_NUM_REG_RD_PHY_NEW      ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_WRITE_RE                ," in_INSERT_WRITE_RE                ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RE_LOG          ," in_INSERT_NUM_REG_RE_LOG          ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD      ," in_INSERT_NUM_REG_RE_PHY_OLD      ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW      ," in_INSERT_NUM_REG_RE_PHY_NEW      ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_VAL                     ,"out_RETIRE_VAL                     ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL( in_RETIRE_ACK                     ," in_RETIRE_ACK                     ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_FRONT_END_ID            ,"out_RETIRE_FRONT_END_ID            ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_CONTEXT_ID              ,"out_RETIRE_CONTEXT_ID              ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_ID          ,"out_RETIRE_RENAME_UNIT_ID          ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_EVENT_STATE             ,"out_RETIRE_EVENT_STATE             ",Tevent_state_t    ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_USE_STORE_QUEUE         ,"out_RETIRE_USE_STORE_QUEUE         ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_USE_LOAD_QUEUE          ,"out_RETIRE_USE_LOAD_QUEUE          ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_WRITE   ,"out_RETIRE_STORE_QUEUE_PTR_WRITE   ",Tlsq_ptr_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_LOAD_QUEUE_PTR_WRITE    ,"out_RETIRE_LOAD_QUEUE_PTR_WRITE    ",Tlsq_ptr_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_READ_RA                 ,"out_RETIRE_READ_RA                 ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RA_PHY          ,"out_RETIRE_NUM_REG_RA_PHY          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_READ_RB                 ,"out_RETIRE_READ_RB                 ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RB_PHY          ,"out_RETIRE_NUM_REG_RB_PHY          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_READ_RC                 ,"out_RETIRE_READ_RC                 ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RC_PHY          ,"out_RETIRE_NUM_REG_RC_PHY          ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_WRITE_RD                ,"out_RETIRE_WRITE_RD                ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_LOG          ,"out_RETIRE_NUM_REG_RD_LOG          ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_PHY_OLD      ,"out_RETIRE_NUM_REG_RD_PHY_OLD      ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_PHY_NEW      ,"out_RETIRE_NUM_REG_RD_PHY_NEW      ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_WRITE_RE                ,"out_RETIRE_WRITE_RE                ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RE_LOG          ,"out_RETIRE_NUM_REG_RE_LOG          ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_OLD      ,"out_RETIRE_NUM_REG_RE_PHY_OLD      ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC2_SC_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_NEW      ,"out_RETIRE_NUM_REG_RE_PHY_NEW      ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  ALLOC1_SC_SIGNAL( in_COMMIT_VAL                     ," in_COMMIT_VAL               ",Tcontrol_t        ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_ACK                     ,"out_COMMIT_ACK               ",Tcontrol_t        ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_WEN                     ," in_COMMIT_WEN               ",Tcontrol_t        ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_PACKET_ID               ," in_COMMIT_PACKET_ID         ",Tpacket_t         ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL( in_COMMIT_OPERATION               ," in_COMMIT_OPERATION         ",Toperation_t      ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL( in_COMMIT_TYPE                    ," in_COMMIT_TYPE              ",Ttype_t           ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_FLAGS                   ," in_COMMIT_FLAGS             ",Tspecial_data_t   ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_EXCEPTION               ," in_COMMIT_EXCEPTION         ",Texception_t      ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_NO_SEQUENCE             ," in_COMMIT_NO_SEQUENCE       ",Tcontrol_t        ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_ADDRESS                 ," in_COMMIT_ADDRESS           ",Tgeneral_data_t   ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_NUM_REG_RD              ,"out_COMMIT_NUM_REG_RD        ",Tgeneral_address_t,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_VAL                  ,"out_REEXECUTE_VAL                  ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ACK                  ," in_REEXECUTE_ACK                  ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_CONTEXT_ID           ,"out_REEXECUTE_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_FRONT_END_ID         ,"out_REEXECUTE_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_PACKET_ID            ,"out_REEXECUTE_PACKET_ID            ",Tpacket_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_OPERATION            ,"out_REEXECUTE_OPERATION            ",Toperation_t      ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_TYPE                 ,"out_REEXECUTE_TYPE                 ",Ttype_t           ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"out_REEXECUTE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_VAL            ,"out_BRANCH_COMPLETE_VAL            ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ACK            ," in_BRANCH_COMPLETE_ACK            ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID     ,"out_BRANCH_COMPLETE_CONTEXT_ID     ",Tcontext_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_FRONT_END_ID   ,"out_BRANCH_COMPLETE_FRONT_END_ID   ",Tcontext_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_DEPTH          ,"out_BRANCH_COMPLETE_DEPTH          ",Tdepth_t          ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS        ,"out_BRANCH_COMPLETE_ADDRESS        ",Taddress_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_FLAG           ,"out_BRANCH_COMPLETE_FLAG           ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC_SC_SIGNAL (out_UPDATE_VAL                      ,"out_UPDATE_VAL                      ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_UPDATE_ACK                      ," in_UPDATE_ACK                      ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_CONTEXT_ID               ,"out_UPDATE_CONTEXT_ID               ",Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_FRONT_END_ID             ,"out_UPDATE_FRONT_END_ID             ",Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_DEPTH                    ,"out_UPDATE_DEPTH                    ",Tdepth_t          );
+  ALLOC_SC_SIGNAL (out_UPDATE_TYPE                     ,"out_UPDATE_TYPE                     ",Tevent_type_t     );
+  ALLOC_SC_SIGNAL (out_UPDATE_IS_DELAY_SLOT            ,"out_UPDATE_IS_DELAY_SLOT            ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS                  ,"out_UPDATE_ADDRESS                  ",Taddress_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR             ,"out_UPDATE_ADDRESS_EPCR             ",Taddress_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         ,"out_UPDATE_ADDRESS_EEAR_VAL         ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR             ,"out_UPDATE_ADDRESS_EEAR             ",Taddress_t        );
+
+  ALLOC2_SC_SIGNAL( in_EVENT_VAL             ," in_EVENT_VAL             ",Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_EVENT_ACK             ,"out_EVENT_ACK             ",Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_EVENT_ADDRESS         ," in_EVENT_ADDRESS         ",Taddress_t,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT    ," in_EVENT_ADDRESS_NEXT    ",Taddress_t,_param->_nb_front_end,_param->_nb_context[it1]); 
+  ALLOC2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL," in_EVENT_ADDRESS_NEXT_VAL",Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_EVENT_IS_DS_TAKE      ," in_EVENT_IS_DS_TAKE      ",Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_ALL             ,"out_NB_INST_COMMIT_ALL             ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_MEM             ,"out_NB_INST_COMMIT_MEM             ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_DEPTH_MIN                      ," in_DEPTH_MIN                      ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_DEPTH_MAX                      ," in_DEPTH_MAX                      ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL( in_SPR_READ_SR_OVE                ," in_SPR_READ_SR_OVE                ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_VAL                  ,"out_SPR_WRITE_VAL                  ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_WRITE_ACK                  ," in_SPR_WRITE_ACK                  ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_F_VAL             ,"out_SPR_WRITE_SR_F_VAL             ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_F                 ,"out_SPR_WRITE_SR_F                 ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_CY_VAL            ,"out_SPR_WRITE_SR_CY_VAL            ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_CY                ,"out_SPR_WRITE_SR_CY                ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_OV_VAL            ,"out_SPR_WRITE_SR_OV_VAL            ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_OV                ,"out_SPR_WRITE_SR_OV                ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Commit_unit.\n"),name.c_str());
+
+  (*(_Commit_unit->in_CLOCK))        (*(in_CLOCK));
+  (*(_Commit_unit->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_VAL                     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_INSERT_ACK                     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_FRONT_END_ID            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_CONTEXT_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_INSERT_PACKET_ID               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_RENAME_UNIT_ID          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_depth)
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_DEPTH                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_TYPE                    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_OPERATION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_EXCEPTION_USE           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_STORE_QUEUE_PTR_WRITE   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_LOAD_QUEUE_PTR_WRITE    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_READ_RA                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RA_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RA_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_READ_RB                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RB_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RB_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_READ_RC                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RC_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RC_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_WRITE_RD                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RD_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RD_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RD_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_WRITE_RE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RE_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RE_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NUM_REG_RE_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_VAL                     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_RETIRE_ACK                     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_FRONT_END_ID            ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_CONTEXT_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_RENAME_UNIT_ID          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_EVENT_STATE             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_USE_STORE_QUEUE         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_USE_LOAD_QUEUE          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_STORE_QUEUE_PTR_WRITE   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_LOAD_QUEUE_PTR_WRITE    ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_READ_RA                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RA_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_READ_RB                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RB_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_READ_RC                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RC_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_WRITE_RD                ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RD_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RD_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RD_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_WRITE_RE                ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RE_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RE_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_NUM_REG_RE_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_VAL               ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_COMMIT_ACK               ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_WEN               ,_param->_nb_inst_commit);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_PACKET_ID         ,_param->_nb_inst_commit);
+//INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_OPERATION         ,_param->_nb_inst_commit);
+//INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_TYPE              ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_FLAGS             ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_EXCEPTION         ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_NO_SEQUENCE       ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_ADDRESS           ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_COMMIT_NUM_REG_RD        ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_VAL                  ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_REEXECUTE_ACK                  ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_CONTEXT_ID           ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_FRONT_END_ID         ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_PACKET_ID            ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_OPERATION            ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_TYPE                 ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_FRONT_END_ID   ,_param->_nb_inst_branch_complete);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_ADDRESS        ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_FLAG           ,_param->_nb_inst_branch_complete);
+  INSTANCE1_SC_SIGNAL(_Commit_unit, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_VAL                      );
+  INSTANCE_SC_SIGNAL (_Commit_unit, in_UPDATE_ACK                      );
+  if (_param->_have_port_context_id)
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_CONTEXT_ID               );
+  if (_param->_have_port_front_end_id)
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_FRONT_END_ID             );
+  if (_param->_have_port_depth)
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_DEPTH                    );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_TYPE                     );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_IS_DELAY_SLOT            );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS                  );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EPCR             );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EEAR_VAL         );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EEAR             );
+
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_EVENT_VAL                       ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_EVENT_ACK                       ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_EVENT_ADDRESS                   ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_EVENT_ADDRESS_NEXT              ,_param->_nb_front_end, _param->_nb_context[it1]); 
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_EVENT_ADDRESS_NEXT_VAL          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_EVENT_IS_DS_TAKE                ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_NB_INST_COMMIT_ALL             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_NB_INST_COMMIT_MEM             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_DEPTH_MAX                      ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_SPR_READ_SR_OVE                ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_VAL                  ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_SPR_WRITE_ACK                  ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_F_VAL             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_F                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_CY_VAL            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_CY                ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_OV_VAL            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_OV                ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  for (uint32_t i=0; i<_param->_nb_front_end; i++)
+    for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+      if (_param->_have_port_depth)
+	INSTANCE_SC_SIGNAL(_Commit_unit, in_DEPTH_MIN  [i][j]);
+  
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  const  int32_t percent_transaction_insert = 75;
+  const  int32_t percent_transaction_retire = 75;
+  const  int32_t percent_transaction_commit = 75;
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+      uint32_t        nb_transaction      = 512;
+      uint32_t        address_insert_min  = 0xa000;
+      uint32_t        address_insert_max  = address_insert_min + nb_transaction;
+      uint32_t        address_insert_next = address_insert_min;
+      Taddress_t      tab_address_insert     [_param->_nb_rename_unit][max<uint32_t>(_param->_nb_inst_insert,_param->_nb_rename_unit)];
+      list<Tpacket_t> tab_address_commit;
+
+      uint32_t        nb_transaction_insert      = 0;
+      uint32_t        nb_transaction_retire      = 0;
+      uint32_t        nb_transaction_commit      = 0;
+
+
+      uint32_t        packet_id_head_grp  = 0;
+      uint32_t        packet_id_head_elt  = 0;
+
+      uint32_t        packet_id_tail_grp  = 0;
+      uint32_t        packet_id_tail_elt  = 0;
+
+      rob_entry_t      rob [_param->_nb_bank*_param->_size_bank];
+
+      for (uint32_t i=0; i<_param->_nb_bank*_param->_size_bank; i++)
+	rob[i].val = false;
+
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+	  tab_address_insert [i][j] = address_insert_next ++;
+
+//       while ((address_insert_next < address_insert_max) or
+// 	     (not tab_address_commit.empty()) or
+// 	     (nb_transaction_retire < (address_insert_max-address_insert_min)))
+      while (nb_transaction_retire < nb_transaction)
+	{
+	  LABEL("Condition d'arrêt :");
+	  LABEL(" * total of transaction      : %d",nb_transaction);
+	  LABEL(" * nb_transaction_insert     : %d",nb_transaction_insert);
+	  LABEL(" * nb_transaction_commit     : %d",nb_transaction_commit);
+	  LABEL(" * nb_transaction_retire     : %d",nb_transaction_retire);
+
+	  for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	    {
+	      bool     val    = ((rand()%100)<percent_transaction_insert);
+	      uint32_t nb_val = (rand()%_param->_nb_inst_insert[i]);
+	      for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+		{
+		  Taddress_t addr = tab_address_insert [i][j];
+		  in_INSERT_VAL                     [i][j]->write(val and (i <= nb_val) and ((nb_transaction_insert+i*_param->_nb_rename_unit+j)<nb_transaction));
+		  in_INSERT_FRONT_END_ID            [i][j]->write(0);
+		  in_INSERT_CONTEXT_ID              [i][j]->write(0);
+		  in_INSERT_DEPTH                   [i][j]->write(0);
+		  in_INSERT_TYPE                    [i][j]->write(0);
+		  in_INSERT_OPERATION               [i][j]->write(0);
+		  in_INSERT_IS_DELAY_SLOT           [i][j]->write(0);
+		  in_INSERT_NO_EXECUTE              [i][j]->write(0);
+		  in_INSERT_ADDRESS                 [i][j]->write(addr);
+		  in_INSERT_EXCEPTION               [i][j]->write(0);
+		  in_INSERT_EXCEPTION_USE           [i][j]->write(0);
+		  in_INSERT_STORE_QUEUE_PTR_WRITE   [i][j]->write(0);
+		  in_INSERT_LOAD_QUEUE_PTR_WRITE    [i][j]->write(0);
+		  in_INSERT_READ_RA                 [i][j]->write(0);
+		  in_INSERT_NUM_REG_RA_LOG          [i][j]->write(0);
+		  in_INSERT_NUM_REG_RA_PHY          [i][j]->write(0);
+		  in_INSERT_READ_RB                 [i][j]->write(0);
+		  in_INSERT_NUM_REG_RB_LOG          [i][j]->write(0);
+		  in_INSERT_NUM_REG_RB_PHY          [i][j]->write(0);
+		  in_INSERT_READ_RC                 [i][j]->write(0);
+		  in_INSERT_NUM_REG_RC_LOG          [i][j]->write(0);
+		  in_INSERT_NUM_REG_RC_PHY          [i][j]->write(0);
+		  in_INSERT_WRITE_RD                [i][j]->write(0);
+		  in_INSERT_NUM_REG_RD_LOG          [i][j]->write(0);
+		  in_INSERT_NUM_REG_RD_PHY_OLD      [i][j]->write(0);
+		  in_INSERT_NUM_REG_RD_PHY_NEW      [i][j]->write(0);
+		  in_INSERT_WRITE_RE                [i][j]->write(0);
+		  in_INSERT_NUM_REG_RE_LOG          [i][j]->write(0);
+		  in_INSERT_NUM_REG_RE_PHY_OLD      [i][j]->write(0);
+		  in_INSERT_NUM_REG_RE_PHY_NEW      [i][j]->write(0);
+		}
+	    }
+
+	  for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	    {
+	      bool     ack    = ((rand()%100)<percent_transaction_retire);
+	      uint32_t nb_ack = rand()%_param->_nb_inst_retire[i];
+	      for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+		{
+		  in_RETIRE_ACK [i][j]->write(ack and (i <= nb_ack));
+		  
+		}
+	    }
+
+	  {
+	    list<Tpacket_t>::iterator it=tab_address_commit.begin();
+
+            for (uint32_t j=0; j<_param->_nb_inst_commit; j++)
+              {
+                Tcontrol_t val = ((rand()%100)<percent_transaction_commit) and (it!=tab_address_commit.end());
+                
+                in_COMMIT_VAL [j]->write(val);
+                
+                if (val)
+                  {
+                    Tpacket_t packet = *(it);
+                    
+                    in_COMMIT_WEN         [j]->write(1);
+                    in_COMMIT_PACKET_ID   [j]->write(packet);
+		    //in_COMMIT_OPERATION   [j]->write(0);
+		    //in_COMMIT_TYPE        [j]->write(0);
+                    in_COMMIT_FLAGS       [j]->write(0);
+                    in_COMMIT_EXCEPTION   [j]->write(0);
+                    in_COMMIT_NO_SEQUENCE [j]->write(0);
+                    in_COMMIT_ADDRESS     [j]->write(0);
+                  }
+                
+                if (it != tab_address_commit.end())
+                  it++;
+              }
+	  }
+
+	  SC_START(0);
+
+	  for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	    for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+	      {
+		LABEL("INSERT            [%d][%d] - %d %d",i,j,in_INSERT_VAL [i][j]->read(),out_INSERT_ACK [i][j]->read());
+		if ( in_INSERT_VAL [i][j]->read() and 
+		    out_INSERT_ACK [i][j]->read())
+		  {
+		    LABEL("INSERT            [%d][%d] Transaction Accepted",i,j);
+		    LABEL("  * packet_id_tail_grp (old) : %d",packet_id_tail_grp);
+		    LABEL("  * packet_id_tail_elt (old) : %d",packet_id_tail_elt);
+
+		    Tpacket_t packet = (_param->_have_port_rob_ptr  )?out_INSERT_PACKET_ID [i][j]->read():0;
+
+		    TEST(Tpacket_t, packet, (packet_id_tail_grp << _param->_shift_num_bank) + packet_id_tail_elt);
+
+		    TEST(bool, rob[packet].val, false);
+
+		    rob[packet].val     = true;
+		    rob[packet].address = tab_address_insert [i][j];
+
+		    tab_address_commit.push_back(packet);
+		    tab_address_insert [i][j] = address_insert_next ++;
+
+		    packet_id_tail_grp ++;
+
+		    if (packet_id_tail_grp >= _param->_nb_bank)
+		      {
+			packet_id_tail_grp = 0;
+			packet_id_tail_elt = (packet_id_tail_elt+1)%_param->_size_bank;
+		      }
+
+		    LABEL("  * packet_id_tail_grp (new) : %d",packet_id_tail_grp);
+		    LABEL("  * packet_id_tail_elt (new) : %d",packet_id_tail_elt);
+
+		    nb_transaction_insert ++;
+		  }
+	      }
+	  
+	  for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	    for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+	      {
+		LABEL("RETIRE            [%d][%d] - %d %d",i,j,out_RETIRE_VAL [i][j]->read(),in_RETIRE_ACK [i][j]->read());
+		if (out_RETIRE_VAL [i][j]->read() and 
+		     in_RETIRE_ACK [i][j]->read())
+		  {
+		    LABEL("RETIRE            [%d][%d] Transaction Accepted",i,j);
+		    LABEL("  * packet_id_head_grp (old) : %d",packet_id_head_grp);
+		    LABEL("  * packet_id_head_elt (old) : %d",packet_id_head_elt);
+
+		    Tpacket_t packet = ((packet_id_head_grp << _param->_shift_num_bank) + packet_id_head_elt);
+
+		    TEST(bool, rob[packet].val, true);
+
+		    rob[packet].val     = false;
+
+		    packet_id_head_grp ++;
+		    
+		    if (packet_id_head_grp >= _param->_nb_bank)
+		      {
+			packet_id_head_grp = 0;
+			packet_id_head_elt = (packet_id_head_elt+1)%_param->_size_bank;
+		      }
+
+		    LABEL("  * packet_id_head_grp (new) : %d",packet_id_head_grp);
+		    LABEL("  * packet_id_head_elt (new) : %d",packet_id_head_elt);
+
+		    nb_transaction_retire ++;
+		  }
+	      }
+
+	  LABEL("Dump tab_address_commit (before)");
+	  for (list<Tpacket_t>::iterator it=tab_address_commit.begin();
+	       it!=tab_address_commit.end();
+	       ++it)
+	    LABEL(" * %d",*it);
+
+	  {
+	    list<Tpacket_t>::iterator it=tab_address_commit.begin();
+	    
+            for (uint32_t j=0; j<_param->_nb_inst_commit; j++)
+              {
+                if ( in_COMMIT_VAL [j]->read() and
+                     out_COMMIT_ACK [j]->read())
+                  {
+                    LABEL("COMMIT      [%d] Transaction Accepted",j);
+                    
+                    it = tab_address_commit.erase(it);
+                    
+                    nb_transaction_commit ++;
+                  }
+                else
+                  if (it != tab_address_commit.end())
+                    it++;
+              }
+	  }
+
+	  LABEL("Dump tab_address_commit (after )");
+	  for (list<Tpacket_t>::iterator it=tab_address_commit.begin();
+	       it!=tab_address_commit.end();
+	       ++it)
+	    LABEL(" * %d",*it);
+
+
+	  SC_START(1);
+	}
+
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_INSERT_VAL                     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ACK                     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_FRONT_END_ID            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_CONTEXT_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_PACKET_ID               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_ID          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_DEPTH                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_TYPE                    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_OPERATION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_EXCEPTION_USE           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_STORE_QUEUE_PTR_WRITE   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_LOAD_QUEUE_PTR_WRITE    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_READ_RA                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RA_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_READ_RB                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RB_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_READ_RC                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RC_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_WRITE_RD                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RD_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_WRITE_RE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RE_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_VAL                     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL( in_RETIRE_ACK                     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_FRONT_END_ID            ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_CONTEXT_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_ID          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_EVENT_STATE             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_USE_STORE_QUEUE         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_USE_LOAD_QUEUE          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_WRITE   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_LOAD_QUEUE_PTR_WRITE    ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_READ_RA                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RA_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_READ_RB                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RB_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_READ_RC                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RC_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_WRITE_RD                ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_WRITE_RE                ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RE_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+  DELETE1_SC_SIGNAL( in_COMMIT_VAL               ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_ACK               ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_WEN               ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_PACKET_ID         ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL( in_COMMIT_OPERATION         ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL( in_COMMIT_TYPE              ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_FLAGS             ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_EXCEPTION         ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_NO_SEQUENCE       ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_ADDRESS           ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_NUM_REG_RD        ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_VAL                  ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ACK                  ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_CONTEXT_ID           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_FRONT_END_ID         ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_PACKET_ID            ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_OPERATION            ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_TYPE                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_FRONT_END_ID   ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS        ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_FLAG           ,_param->_nb_inst_branch_complete);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
+  DELETE_SC_SIGNAL (out_UPDATE_VAL                      );
+  DELETE_SC_SIGNAL ( in_UPDATE_ACK                      );
+  DELETE_SC_SIGNAL (out_UPDATE_CONTEXT_ID               );
+  DELETE_SC_SIGNAL (out_UPDATE_FRONT_END_ID             );
+  DELETE_SC_SIGNAL (out_UPDATE_DEPTH                    );
+  DELETE_SC_SIGNAL (out_UPDATE_TYPE                     );
+  DELETE_SC_SIGNAL (out_UPDATE_IS_DELAY_SLOT            );
+  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS                  );
+  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR             );
+  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         );
+  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR             );
+
+  DELETE2_SC_SIGNAL( in_EVENT_VAL                       ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_EVENT_ACK                       ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_EVENT_ADDRESS                   ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT              ,_param->_nb_front_end, _param->_nb_context[it1]); 
+  DELETE2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_EVENT_IS_DS_TAKE                ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+  DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_ALL             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_MEM             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_DEPTH_MIN                      ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_DEPTH_MAX                      ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  DELETE2_SC_SIGNAL( in_SPR_READ_SR_OVE                ,_param->_nb_front_end,_param->_nb_context[it1]);
+  
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_VAL                  ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_WRITE_ACK                  ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_F_VAL             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_F                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_CY_VAL            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_CY                ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_OV_VAL            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_OV                ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+#endif
+
+  delete _Commit_unit;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/Commit_unit.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/Commit_unit.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/Commit_unit.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Commit\_unit}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 88)
@@ -0,0 +1,309 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_commit_unit_Commit_unit_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_commit_unit_Commit_unit_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include "Behavioural/Generic/Priority/include/Priority.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+  class Commit_unit 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+  public    : counter_t                     ** _stat_nb_inst_insert;
+  public    : counter_t                      * _stat_nb_inst_commit;
+  public    : counter_t                      * _stat_nb_inst_commit_conflit_access;
+  public    : counter_t                     ** _stat_nb_inst_retire;
+  public    : counter_t                     ** _stat_bank_nb_inst;// [nb_bank]
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_VAL                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ACK                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontext_t         ) ***  in_INSERT_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontext_t         ) ***  in_INSERT_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tpacket_t          ) *** out_INSERT_PACKET_ID                 ;//[nb_rename_unit][nb_inst_insert]
+//public    : SC_IN (Tcontext_t         ) ***  in_INSERT_RENAME_UNIT_ID            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tdepth_t           ) ***  in_INSERT_DEPTH                     ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Ttype_t            ) ***  in_INSERT_TYPE                      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Toperation_t       ) ***  in_INSERT_OPERATION                 ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_NO_EXECUTE                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_IS_DELAY_SLOT             ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_data_t    ) ***  in_INSERT_ADDRESS                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Texception_t       ) ***  in_INSERT_EXCEPTION                 ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Texception_t       ) ***  in_INSERT_EXCEPTION_USE             ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tlsq_ptr_t         ) ***  in_INSERT_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tlsq_ptr_t         ) ***  in_INSERT_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_READ_RA                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RA_LOG            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RA_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_READ_RB                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RB_LOG            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RB_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_READ_RC                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_NUM_REG_RC_LOG            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_NUM_REG_RC_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_WRITE_RD                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RD_LOG            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RD_PHY_OLD        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_NUM_REG_RD_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_WRITE_RE                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_NUM_REG_RE_LOG            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_NUM_REG_RE_PHY_OLD        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
+										   
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_VAL                       ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_IN (Tcontrol_t         ) ***  in_RETIRE_ACK                       ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontext_t         ) *** out_RETIRE_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontext_t         ) *** out_RETIRE_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_retire]
+//public    : SC_OUT(Tcontext_t         ) *** out_RETIRE_RENAME_UNIT_ID            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tevent_state_t     ) *** out_RETIRE_EVENT_STATE               ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_USE_STORE_QUEUE           ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_USE_LOAD_QUEUE            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_RETIRE_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_RETIRE_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_READ_RA                   ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_NUM_REG_RA_PHY            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_READ_RB                   ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_NUM_REG_RB_PHY            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_READ_RC                   ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tspecial_address_t ) *** out_RETIRE_NUM_REG_RC_PHY            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_WRITE_RD                  ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_NUM_REG_RD_LOG            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_NUM_REG_RD_PHY_OLD        ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_NUM_REG_RD_PHY_NEW        ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_WRITE_RE                  ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tspecial_address_t ) *** out_RETIRE_NUM_REG_RE_LOG            ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tspecial_address_t ) *** out_RETIRE_NUM_REG_RE_PHY_OLD        ;//[nb_rename_unit][nb_inst_retire]
+  public    : SC_OUT(Tspecial_address_t ) *** out_RETIRE_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_retire]
+										   
+    // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_VAL                       ;//[nb_inst_commit]
+  public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_ACK                       ;//[nb_inst_commit]
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_WEN                       ;//[nb_inst_commit]
+  public    : SC_IN (Tpacket_t          )  **  in_COMMIT_PACKET_ID                 ;//[nb_inst_commit]
+//public    : SC_IN (Toperation_t       )  **  in_COMMIT_OPERATION                 ;//[nb_inst_commit]
+//public    : SC_IN (Ttype_t            )  **  in_COMMIT_TYPE                      ;//[nb_inst_commit]
+  public    : SC_IN (Tspecial_data_t    )  **  in_COMMIT_FLAGS                     ;//[nb_inst_commit]
+  public    : SC_IN (Texception_t       )  **  in_COMMIT_EXCEPTION                 ;//[nb_inst_commit]
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_NO_SEQUENCE               ;//[nb_inst_commit]
+  public    : SC_IN (Tgeneral_data_t    )  **  in_COMMIT_ADDRESS                   ;//[nb_inst_commit]
+  public    : SC_OUT(Tgeneral_address_t )  ** out_COMMIT_NUM_REG_RD                ;//[nb_inst_commit]
+										   
+    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_VAL                    ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t         )  **  in_REEXECUTE_ACK                    ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontext_t         )  ** out_REEXECUTE_CONTEXT_ID             ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontext_t         )  ** out_REEXECUTE_FRONT_END_ID           ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tpacket_t          )  ** out_REEXECUTE_PACKET_ID              ;//[nb_inst_reexecute]
+  public    : SC_OUT(Toperation_t       )  ** out_REEXECUTE_OPERATION              ;//[nb_inst_reexecute]
+  public    : SC_OUT(Ttype_t            )  ** out_REEXECUTE_TYPE                   ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tlsq_ptr_t         )  ** out_REEXECUTE_STORE_QUEUE_PTR_WRITE  ;//[nb_inst_reexecute]
+    										   
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_COMPLETE_VAL              ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_COMPLETE_ACK              ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontext_t         )  ** out_BRANCH_COMPLETE_CONTEXT_ID       ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontext_t         )  ** out_BRANCH_COMPLETE_FRONT_END_ID     ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tdepth_t           )  ** out_BRANCH_COMPLETE_DEPTH            ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Taddress_t         )  ** out_BRANCH_COMPLETE_ADDRESS          ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_COMPLETE_FLAG             ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_COMPLETE_MISS_PREDICTION  ;//[nb_inst_branch_complete]
+										   
+    // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_VAL                       ;
+  public    : SC_IN (Tcontrol_t         )   *  in_UPDATE_ACK                       ;
+  public    : SC_OUT(Tcontext_t         )   * out_UPDATE_CONTEXT_ID                ;
+  public    : SC_OUT(Tcontext_t         )   * out_UPDATE_FRONT_END_ID              ;
+  public    : SC_OUT(Tdepth_t           )   * out_UPDATE_DEPTH                     ;
+  public    : SC_OUT(Tevent_type_t      )   * out_UPDATE_TYPE                      ;
+  public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_IS_DELAY_SLOT             ;
+  public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS                   ;
+  public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS_EPCR              ;
+  public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_ADDRESS_EEAR_VAL          ;
+  public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS_EEAR              ;
+
+    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_EVENT_VAL                        ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t        )  *** out_EVENT_ACK                        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Taddress_t        )  ***  in_EVENT_ADDRESS                    ;//[nb_front_end][nb_context]
+  public    : SC_IN (Taddress_t        )  ***  in_EVENT_ADDRESS_NEXT               ;//[nb_front_end][nb_context] 
+  public    : SC_IN (Tcontrol_t        )  ***  in_EVENT_ADDRESS_NEXT_VAL           ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_EVENT_IS_DS_TAKE                 ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  public    : SC_OUT(Tcounter_t         ) *** out_NB_INST_COMMIT_ALL               ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcounter_t         ) *** out_NB_INST_COMMIT_MEM               ;//[nb_front_end][nb_context]
+										   
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  public    : SC_IN (Tdepth_t           ) ***  in_DEPTH_MIN                        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tdepth_t           ) ***  in_DEPTH_MAX                        ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_READ_SR_OVE                  ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_VAL                    ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_WRITE_ACK                    ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_SR_F_VAL               ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_SR_F                   ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_SR_CY_VAL              ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_SR_CY                  ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_SR_OV_VAL              ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_WRITE_SR_OV                  ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    	   
+  private   : generic::priority::Priority   * _priority_insert                     ;
+										   
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    	   
+  private   : std::list<entry_t*>           * _rob                                 ;//[nb_bank]
+										   
+  private   : uint32_t                        reg_NUM_BANK_HEAD                    ;
+  private   : uint32_t                        reg_NUM_BANK_TAIL                    ;
+  private   : uint32_t                      * reg_BANK_PTR                         ;//[nb_bank]
+
+  private   : Tcounter_t                   ** reg_NB_INST_COMMIT_ALL               ;//[nb_front_end][nb_context]
+  private   : Tcounter_t                   ** reg_NB_INST_COMMIT_MEM               ;//[nb_front_end][nb_context]
+										   
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+  private   : Tcontrol_t                    * internal_BANK_INSERT_VAL             ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_INSERT_NUM_RENAME_UNIT ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_INSERT_NUM_INST        ;//[nb_bank]
+
+#ifdef STATISTICS
+  private   : uint32_t                        internal_BANK_COMMIT_CONFLIT_ACCESS  ;
+#endif
+  private   : Tcontrol_t                   ** internal_BANK_COMMIT_VAL             ;//[nb_bank][nb_bank_access_commit]
+  private   : uint32_t                     ** internal_BANK_COMMIT_NUM_INST        ;//[nb_bank][nb_bank_access_commit]
+  private   : entry_t *                    ** internal_BANK_COMMIT_ENTRY           ;//[nb_bank][nb_bank_access_commit]
+
+  private   : Tcontrol_t                    * internal_BANK_RETIRE_VAL             ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_RETIRE_NUM_RENAME_UNIT ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_RETIRE_NUM_INST        ;//[nb_bank]
+
+  private   : Tcontrol_t                    * internal_REEXECUTE_VAL               ;//[nb_inst_reexecute]
+  private   : uint32_t                      * internal_REEXECUTE_NUM_BANK          ;//[nb_inst_reexecute]
+
+  private   : Tcontrol_t                    * internal_BRANCH_COMPLETE_VAL         ;//[nb_inst_branch_complete]
+  private   : uint32_t                      * internal_BRANCH_COMPLETE_NUM_BANK    ;//[nb_inst_branch_complete]
+
+  private   : Tcontrol_t                      internal_UPDATE_VAL                  ;
+  private   : uint32_t                        internal_UPDATE_NUM_BANK             ;
+
+  private   : Tcontrol_t                   ** internal_EVENT_ACK                   ;//[nb_front_end][nb_context]
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Commit_unit);
+#endif
+  public  :          Commit_unit              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Commit_unit             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  public  : void        transition                (void);
+  public  : void        genMoore                  (void);
+  public  : void        genMealy_insert           (void);
+  public  : void        genMealy_retire           (void);
+  public  : void        genMealy_commit           (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 88)
@@ -0,0 +1,113 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_commit_unit_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_commit_unit_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h"
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t            _nb_front_end            ;
+  public : uint32_t          * _nb_context              ;//[nb_front_end]
+  public : uint32_t            _nb_rename_unit          ;
+  public : uint32_t            _size_queue              ;
+  public : uint32_t            _nb_bank                 ;
+  public : uint32_t          * _nb_inst_insert          ;//[nb_rename_unit]
+  public : uint32_t          * _nb_inst_retire	        ;//[nb_rename_unit]
+  public : uint32_t            _nb_inst_commit          ;
+  public : uint32_t            _nb_inst_reexecute       ;
+  public : uint32_t            _nb_inst_branch_complete ;
+  public : uint32_t         ** _nb_branch_speculated    ;//[nb_front_end][nb_context]
+//public : uint32_t            _size_general_data       ;
+//public : uint32_t            _size_store_queue_ptr    ;
+//public : uint32_t            _size_load_queue_ptr     ;
+//public : uint32_t            _size_general_register   ;
+//public : uint32_t            _size_special_register   ;
+  public : Tpriority_t         _priority                ;
+  public : Tload_balancing_t   _load_balancing          ;
+  public : uint32_t            _nb_rename_unit_select   ;
+  public : const uint32_t      _nb_bank_access_commit   ;
+  public : const retire_ooo_t  _retire_ooo              ;
+
+  public : uint32_t            _max_nb_context          ;
+  public : uint32_t            _max_nb_inst_insert      ;
+  public : uint32_t            _max_nb_inst_retire      ;
+//public : uint32_t            _size_address            ;
+//public : uint32_t            _size_front_end_id       ;
+//public : uint32_t            _size_context_id         ;
+  public : uint32_t            _size_rename_unit_id     ;    
+  public : uint32_t            _size_bank               ;
+//public : uint32_t            _size_nb_inst            ;
+//public : uint32_t            _size_packet_id          ;
+  public : uint32_t         ** _array_size_depth        ;//[nb_front_end][nb_context]
+//public : uint32_t            _max_size_depth          ;
+  public : Tpacket_t           _shift_num_bank          ;
+  public : Tpacket_t           _mask_size_bank          ;
+
+//public : bool                _have_port_front_end_id  ;
+//public : bool                _have_port_context_id    ;
+//public : bool                _have_port_packet_id     ;
+  public : bool                _have_port_rename_unit_id;
+//public : bool                _have_port_load_queue_ptr;
+//public : bool                _have_port_max_depth     ;
+//public : bool             ** _have_port_depth         ;//[nb_front_end][nb_context]
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t            nb_front_end            ,
+			uint32_t          * nb_context              ,
+			uint32_t            nb_rename_unit          ,
+			uint32_t            size_queue              ,
+			uint32_t            nb_bank                 ,
+			uint32_t          * nb_inst_insert          ,
+			uint32_t          * nb_inst_retire          ,
+			uint32_t            nb_inst_commit          ,
+			uint32_t            nb_inst_reexecute       ,
+			uint32_t            nb_inst_branch_complete ,
+			uint32_t         ** nb_branch_speculated    ,
+			uint32_t            size_general_data       ,
+			uint32_t            size_store_queue_ptr    ,
+			uint32_t            size_load_queue_ptr     ,
+			uint32_t            size_general_register   ,
+			uint32_t            size_special_register   ,
+			Tpriority_t         priority                ,
+			Tload_balancing_t   load_balancing          ,
+			uint32_t            nb_rename_unit_select   ,
+                        bool                is_toplevel=false
+			);
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters (void) ;
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+                                              morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters & x);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 88)
@@ -0,0 +1,184 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_commit_unit_Types_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_commit_unit_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+  typedef enum
+    {
+      RETIRE_IN_ORDER       ,
+      RETIRE_OOO_RENAME_UNIT,
+      RETIRE_OOO_CONTEXT
+    } retire_ooo_t;
+
+  typedef enum
+    {
+      ROB_EMPTY                     , // 
+      ROB_BRANCH_WAIT_END           , // 
+      ROB_BRANCH_COMPLETE           , // 
+      ROB_STORE_WAIT_HEAD_OK        , // 
+//    ROB_STORE_WAIT_HEAD_KO        , // 
+      ROB_STORE_HEAD_OK             , // 
+      ROB_STORE_HEAD_KO             , // 
+      ROB_OTHER_WAIT_END            , // 
+      ROB_MISS_WAIT_END             , // 
+      ROB_END_OK_SPECULATIVE        , // 
+      ROB_END_OK                    , // 
+      ROB_END_KO_SPECULATIVE        , // 
+      ROB_END_KO                    , // 
+      ROB_END_MISS                  , // 
+      ROB_END_EXCEPTION_WAIT_HEAD   , // 
+      ROB_END_EXCEPTION               // 
+    } rob_state_t;
+
+  class entry_t 
+  {
+  public  : rob_state_t        state                   ;
+  public  : uint32_t           ptr                     ;
+  public  : Tcontext_t         front_end_id            ;
+  public  : Tcontext_t         context_id              ;
+  public  : uint32_t           rename_unit_id          ;
+  public  : Tdepth_t           depth                   ;
+  public  : Ttype_t            type                    ;
+  public  : Toperation_t       operation               ;
+  public  : Tcontrol_t         is_delay_slot           ;
+  public  : Tgeneral_data_t    address                 ;
+  public  : Tcontrol_t         use_store_queue         ;
+  public  : Tcontrol_t         use_load_queue          ;
+  public  : Tlsq_ptr_t         store_queue_ptr_write   ;
+  public  : Tlsq_ptr_t         load_queue_ptr_write    ;
+  public  : Tcontrol_t         read_ra                 ;
+  public  : Tgeneral_address_t num_reg_ra_log          ;
+  public  : Tgeneral_address_t num_reg_ra_phy          ;
+  public  : Tcontrol_t         read_rb                 ;
+  public  : Tgeneral_address_t num_reg_rb_log          ;
+  public  : Tgeneral_address_t num_reg_rb_phy          ;
+  public  : Tcontrol_t         read_rc                 ;
+  public  : Tspecial_address_t num_reg_rc_log          ;
+  public  : Tspecial_address_t num_reg_rc_phy          ;
+  public  : Tcontrol_t         write_rd                ;
+  public  : Tgeneral_address_t num_reg_rd_log          ;
+  public  : Tgeneral_address_t num_reg_rd_phy_old      ;
+  public  : Tgeneral_address_t num_reg_rd_phy_new      ;
+  public  : Tcontrol_t         write_re                ;
+  public  : Tspecial_address_t num_reg_re_log          ;
+  public  : Tspecial_address_t num_reg_re_phy_old      ;
+  public  : Tspecial_address_t num_reg_re_phy_new      ;
+
+  public  : Tevent_state_t     event_state             ;
+  public  : Texception_t       exception               ;
+  public  : Texception_t       exception_use           ;
+
+  public  : Tspecial_data_t    flags                   ;
+  public  : Tcontrol_t         no_sequence             ;
+  public  : Tgeneral_data_t    data_commit             ; // branch's destination
+
+//   public  : entry_t (uint32_t           ptr                     ,
+// 		     Tcontext_t         front_end_id            ,
+// 		     Tcontext_t         context_id              ,
+// 		     Tcontext_t         rename_unit_id          ,
+// 		     Tdepth_t           depth                   ,
+// 		     Ttype_t            type                    ,
+// 		     Toperation_t       operation               ,
+// 		     Tcontrol_t         is_delay_slot           ,
+// 		     Tgeneral_data_t    address                 ,
+// 		     Texception_t       exception               ,
+// 		     Texception_t       exception_use           ,
+// 		     Tlsq_ptr_t         store_queue_ptr_write   ,
+// 		     Tlsq_ptr_t         load_queue_ptr_write    ,
+// 		     Tcontrol_t         read_ra                 ,
+// 		     Tgeneral_address_t num_reg_ra_log          ,
+// 		     Tgeneral_address_t num_reg_ra_phy          ,
+// 		     Tcontrol_t         read_rb                 ,
+// 		     Tgeneral_address_t num_reg_rb_log          ,
+// 		     Tgeneral_address_t num_reg_rb_phy          ,
+// 		     Tcontrol_t         read_rc                 ,
+// 		     Tspecial_address_t num_reg_rc_log          ,
+// 		     Tspecial_address_t num_reg_rc_phy          ,
+// 		     Tcontrol_t         write_rd                ,
+// 		     Tgeneral_address_t num_reg_rd_log          ,
+// 		     Tgeneral_address_t num_reg_rd_phy_old      ,
+// 		     Tgeneral_address_t num_reg_rd_phy_new      ,
+// 		     Tcontrol_t         write_re                ,
+// 		     Tspecial_address_t num_reg_re_log          ,
+// 		     Tspecial_address_t num_reg_re_phy_old      ,
+// 		     Tspecial_address_t num_reg_re_phy_new      )
+//     {
+//       this->ptr                     = ptr                   ;
+//       this->front_end_id            = front_end_id          ;
+//       this->context_id              = context_id            ;
+//       this->rename_unit_id          = rename_unit_id        ;
+//       this->depth                   = depth                 ;
+//       this->type                    = type                  ;
+//       this->operation               = operation             ;
+//       this->is_delay_slot           = is_delay_slot         ;
+//       this->address                 = address               ;
+//       this->exception               = exception             ;
+//       this->exception_use           = exception_use         ;
+//       this->store_queue_ptr_write   = store_queue_ptr_write ;
+//       this->load_queue_ptr_write    = load_queue_ptr_write  ;
+//       this->read_ra                 = read_ra               ;
+//       this->num_reg_ra_log          = num_reg_ra_log        ;
+//       this->num_reg_ra_phy          = num_reg_ra_phy        ;
+//       this->read_rb                 = read_rb               ;
+//       this->num_reg_rb_log          = num_reg_rb_log        ;
+//       this->num_reg_rb_phy          = num_reg_rb_phy        ;
+//       this->read_rc                 = read_rc               ;
+//       this->num_reg_rc_log          = num_reg_rc_log        ;
+//       this->num_reg_rc_phy          = num_reg_rc_phy        ;
+//       this->write_rd                = write_rd              ;
+//       this->num_reg_rd_log          = num_reg_rd_log        ;
+//       this->num_reg_rd_phy_old      = num_reg_rd_phy_old    ;
+//       this->num_reg_rd_phy_new      = num_reg_rd_phy_new    ;
+//       this->write_re                = write_re              ;
+//       this->num_reg_re_log          = num_reg_re_log        ;
+//       this->num_reg_re_phy_old      = num_reg_re_phy_old    ;
+//       this->num_reg_re_phy_new      = num_reg_re_phy_new    ;
+//     }
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+}; // end namespace behavioural
+
+ template<> inline std::string toString<morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::rob_state_t>(const morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::rob_state_t& x)
+  {
+    switch (x)
+      {
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_EMPTY                     : return "empty"                     ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_BRANCH_WAIT_END           : return "branch_wait_end"           ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_BRANCH_COMPLETE           : return "branch_complete"           ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_WAIT_HEAD_OK        : return "store_wait_head_ok"        ; break;
+//    case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_WAIT_HEAD_KO        : return "store_wait_head_ko"        ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_HEAD_OK             : return "store_head_ok"             ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_HEAD_KO             : return "store_head_ko"             ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_OTHER_WAIT_END            : return "other_wait_end"            ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_MISS_WAIT_END             : return "miss_wait_end"             ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_OK_SPECULATIVE        : return "end_ok_speculative"        ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_OK                    : return "end_ok"                    ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_KO_SPECULATIVE        : return "end_ko_speculative"        ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_KO                    : return "end_ko"                    ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_EXCEPTION_WAIT_HEAD   : return "end_exception_wait_head"   ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_EXCEPTION             : return "end_exception"             ; break;
+      default    : return ""      ; break;
+      }
+  };
+
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp	(revision 88)
@@ -0,0 +1,290 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::Commit_unit"
+  Commit_unit::Commit_unit 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_Commit_unit == true
+    log_printf(TRACE,Commit_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif
+
+    log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+        // Constant
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+	    {
+              internal_EVENT_ACK [i][j] = 1;
+              PORT_WRITE(out_EVENT_ACK [i][j], internal_EVENT_ACK [i][j]);
+            }
+
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Method - genMoore"),_name.c_str());
+
+	SC_METHOD (genMoore);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Method - genMealy_insert"),_name.c_str());
+
+	SC_METHOD (genMealy_insert);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+// 	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+// 	  for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+// 	    sensitive << (*(in_INSERT_VAL [i][j]));
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	  for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+	    for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
+	      for (uint32_t y=0; y<_param->_nb_inst_insert[x]; y++)
+		{
+		  (*(out_INSERT_ACK       [i][j])) (*(in_INSERT_VAL [x][y]));
+		  if (_param->_have_port_rob_ptr)
+		  (*(out_INSERT_PACKET_ID [i][j])) (*(in_INSERT_VAL [x][y]));
+		}
+# endif    
+
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Method - genMealy_retire"),_name.c_str());
+
+	SC_METHOD (genMealy_retire);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	  for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+	    sensitive << (*(in_RETIRE_ACK [i][j]));
+
+	for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+	    sensitive << (*(in_SPR_WRITE_ACK [i][j]));
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	  for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+	    {
+	      for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
+		for (uint32_t y=0; y<_param->_nb_inst_retire[x]; y++)
+		  {
+		    (*(out_RETIRE_VAL                   [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    if (_param->_have_port_front_end_id)
+		    (*(out_RETIRE_FRONT_END_ID          [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    if (_param->_have_port_context_id)
+		    (*(out_RETIRE_CONTEXT_ID            [i][j])) (*(in_RETIRE_ACK [x][y]));
+// 		    (*(out_RETIRE_RENAME_UNIT_ID        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_EVENT_STATE           [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_USE_STORE_QUEUE       [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_USE_LOAD_QUEUE        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_STORE_QUEUE_PTR_WRITE [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    if (_param->_have_port_load_queue_ptr)
+		    (*(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_READ_RA               [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RA_PHY        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_READ_RB               [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RB_PHY        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_READ_RC               [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RC_PHY        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_WRITE_RD              [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RD_LOG        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RD_PHY_OLD    [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RD_PHY_NEW    [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_WRITE_RE              [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RE_LOG        [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RE_PHY_OLD    [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RE_PHY_NEW    [i][j])) (*(in_RETIRE_ACK [x][y]));
+		  }
+
+	      for (uint32_t x=0; x<_param->_nb_front_end; ++x)
+		for (uint32_t y=0; y<_param->_nb_context[x]; ++y)
+		  {
+		    (*(out_RETIRE_VAL                   [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    if (_param->_have_port_front_end_id)
+		    (*(out_RETIRE_FRONT_END_ID          [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    if (_param->_have_port_context_id)
+		    (*(out_RETIRE_CONTEXT_ID            [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+// 		    (*(out_RETIRE_RENAME_UNIT_ID        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_EVENT_STATE           [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_USE_STORE_QUEUE       [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_USE_LOAD_QUEUE        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_STORE_QUEUE_PTR_WRITE [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    if (_param->_have_port_load_queue_ptr)
+		    (*(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_READ_RA               [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RA_PHY        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_READ_RB               [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RB_PHY        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_READ_RC               [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RC_PHY        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_WRITE_RD              [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RD_LOG        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RD_PHY_OLD    [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RD_PHY_NEW    [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_WRITE_RE              [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RE_LOG        [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RE_PHY_OLD    [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_RETIRE_NUM_REG_RE_PHY_NEW    [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		  }
+	    }
+
+	for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+	    {
+	      for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
+		for (uint32_t y=0; y<_param->_nb_inst_retire[x]; y++)
+		  {
+		    (*(out_SPR_WRITE_VAL       [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_F_VAL  [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_F      [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_CY_VAL [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_CY     [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_OV_VAL [i][j])) (*(in_RETIRE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_OV     [i][j])) (*(in_RETIRE_ACK [x][y]));
+		  }
+
+	      for (uint32_t x=0; x<_param->_nb_front_end; ++x)
+		for (uint32_t y=0; y<_param->_nb_context[x]; ++y)
+		  {
+		    (*(out_SPR_WRITE_VAL       [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_F_VAL  [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_F      [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_CY_VAL [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_CY     [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_OV_VAL [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		    (*(out_SPR_WRITE_SR_OV     [i][j])) (*(in_SPR_WRITE_ACK [x][y]));
+		  }
+	    }
+# endif    
+
+	log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Method - genMealy_commit"),_name.c_str());
+
+	SC_METHOD (genMealy_commit);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+        for (uint32_t j=0; j<_param->_nb_inst_commit; j++)
+          {
+            sensitive << (*(in_COMMIT_VAL [j]));
+            if (_param->_have_port_rob_ptr)
+              sensitive << (*(in_COMMIT_PACKET_ID [j]));
+          }
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+        for (uint32_t j=0; j<_param->_nb_inst_commit; j++)
+          for (uint32_t y=0; y<_param->_nb_inst_commit; y++)
+            {
+              (*(out_COMMIT_ACK [j])) (*(in_COMMIT_VAL       [y]));
+              if (_param->_have_port_rob_ptr)
+                (*(out_COMMIT_ACK [j])) (*(in_COMMIT_PACKET_ID [y]));
+            }
+# endif    
+	
+#endif
+      }
+    log_end(Commit_unit,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::~Commit_unit"
+  Commit_unit::~Commit_unit (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 88)
@@ -0,0 +1,309 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::allocation"
+  void Commit_unit::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Commit_unit"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("insert", IN, SOUTH, _("Interface with rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      _ALLOC2_VALACK_IN ( in_INSERT_VAL                     ,VAL,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_VALACK_OUT(out_INSERT_ACK                     ,ACK,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_FRONT_END_ID            ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_CONTEXT_ID              ,"context_id"           ,Tcontext_t        ,_param->_size_context_id            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_PACKET_ID               ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//    _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_ID          ,"rename_unit_id"       ,Tcontext_t        ,_param->_size_rename_unit_id        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_DEPTH                   ,"depth"                ,Tdepth_t          ,_param->_size_depth                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_TYPE                    ,"type"                 ,Ttype_t           ,_param->_size_type                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_OPERATION               ,"operation"            ,Toperation_t      ,_param->_size_operation             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE              ,"no_execute"           ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT           ,"is_delay_slot"        ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS                 ,"address"              ,Tgeneral_data_t   ,_param->_size_instruction_address   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION               ,"exception"            ,Texception_t      ,_param->_size_exception             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE           ,"exception_use"        ,Texception_t      ,_param->_size_exception             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_WRITE   ,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_LOAD_QUEUE_PTR_WRITE    ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RA                 ,"read_ra"              ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_LOG          ,"num_reg_ra_log"       ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_PHY          ,"num_reg_ra_phy"       ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RB                 ,"read_rb"              ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_LOG          ,"num_reg_rb_log"       ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_PHY          ,"num_reg_rb_phy"       ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RC                 ,"read_rc"              ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RC_LOG          ,"num_reg_rc_log"       ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY          ,"num_reg_rc_phy"       ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_WRITE_RD                ,"write_rd"             ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_LOG          ,"num_reg_rd_log"       ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_OLD      ,"num_reg_rd_phy_old"   ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW      ,"num_reg_rd_phy_new"   ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_WRITE_RE                ,"write_re"             ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_LOG          ,"num_reg_re_log"       ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD      ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW      ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+    }
+
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("retire",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      
+      _ALLOC2_VALACK_OUT(out_RETIRE_VAL                     ,VAL,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_VALACK_IN ( in_RETIRE_ACK                     ,ACK,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_FRONT_END_ID            ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);  
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_CONTEXT_ID              ,"context_id"           ,Tcontext_t        ,_param->_size_context_id            ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);    
+//    _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_ID          ,"rename_unit_id"       ,Tcontext_t        ,_param->_size_rename_unit_id        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STATE             ,"event_state"          ,Tevent_state_t    ,_param->_size_event_state           ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_USE_STORE_QUEUE         ,"use_store_queue"      ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_USE_LOAD_QUEUE          ,"use_load_queue"       ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_WRITE   ,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_LOAD_QUEUE_PTR_WRITE    ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RA                 ,"read_ra"              ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RA_PHY          ,"num_reg_ra_phy"       ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RB                 ,"read_rb"              ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RB_PHY          ,"num_reg_rb_phy"       ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RC                 ,"read_rc"              ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RC_PHY          ,"num_reg_rc_phy"       ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RD                ,"write_rd"             ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_LOG          ,"num_reg_rd_log"       ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_PHY_OLD      ,"num_reg_rd_phy_old"   ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_PHY_NEW      ,"num_reg_rd_phy_new"   ,Tgeneral_address_t,_param->_size_general_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RE                ,"write_re"             ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_LOG          ,"num_reg_re_log"       ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_OLD      ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_NEW      ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+    }
+
+    // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("commit",IN,EAST,_("End of execute."),_param->_nb_inst_commit);
+
+      ALLOC1_VALACK_IN ( in_COMMIT_VAL               ,VAL);
+      ALLOC1_VALACK_OUT(out_COMMIT_ACK               ,ACK);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_WEN               ,"wen"        ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_COMMIT_PACKET_ID         ,"packet_id"  ,Tpacket_t         ,_param->_size_rob_ptr         );
+//    ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION         ,"operation"  ,Toperation_t      ,_param->_size_operation       );
+//    ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE              ,"type"       ,Ttype_t           ,_param->_size_type            );
+      ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS             ,"flags"      ,Tspecial_data_t   ,_param->_size_general_data    );
+      ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION         ,"exception"  ,Texception_t      ,_param->_size_exception       );
+      ALLOC1_SIGNAL_IN ( in_COMMIT_NO_SEQUENCE       ,"no_sequence",Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_COMMIT_ADDRESS           ,"address"    ,Tgeneral_data_t   ,_param->_size_instruction_address);
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD        ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register+_param->_size_rename_unit_id);
+      ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD        ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register);
+    }
+
+    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("reexecute",OUT,EAST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_reexecute);
+
+      ALLOC1_VALACK_OUT(out_REEXECUTE_VAL                  ,VAL);
+      ALLOC1_VALACK_IN ( in_REEXECUTE_ACK                  ,ACK);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr  );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr);
+    }
+
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_branch_complete);
+
+      ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_VAL            ,VAL);
+      ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_ACK            ,ACK);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_CONTEXT_ID     ,"context_id"     ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_FRONT_END_ID   ,"front_end_id"   ,Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_DEPTH          ,"depth"          ,Tdepth_t           ,_param->_size_depth    );
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS        ,"address"        ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_FLAG           ,"flag"           ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t         ,1);
+    }
+
+    // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC_INTERFACE("update", OUT, WEST,_("Interface with to Context State."));
+
+      ALLOC_VALACK_OUT(out_UPDATE_VAL                      ,VAL);
+      ALLOC_VALACK_IN ( in_UPDATE_ACK                      ,ACK);
+      ALLOC_SIGNAL_OUT(out_UPDATE_CONTEXT_ID               ,"context_id"      ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC_SIGNAL_OUT(out_UPDATE_FRONT_END_ID             ,"front_end_id"    ,Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC_SIGNAL_OUT(out_UPDATE_DEPTH                    ,"depth"           ,Tdepth_t           ,_param->_size_depth    );
+      ALLOC_SIGNAL_OUT(out_UPDATE_TYPE                     ,"type"            ,Tevent_type_t      ,_param->_size_event_type);
+      ALLOC_SIGNAL_OUT(out_UPDATE_IS_DELAY_SLOT            ,"is_delay_slot"   ,Tcontrol_t         ,1);
+      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS                  ,"address"         ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR             ,"address_epcr"    ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL         ,"address_eear_val",Tcontrol_t         ,1);
+      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR             ,"address_eear"    ,Taddress_t         ,_param->_size_instruction_address);
+    }
+
+    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("event",IN,WEST,_("Interface with Context State (event)."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_VALACK_IN ( in_EVENT_VAL             , VAL                                                           ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_VALACK_OUT(out_EVENT_ACK             , ACK                                                           ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS         ,"ADDRESS"         ,Taddress_t,_param->_size_instruction_address,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT    ,"ADDRESS_NEXT"    ,Taddress_t,_param->_size_instruction_address,_param->_nb_front_end, _param->_nb_context[it1]); 
+      _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"ADDRESS_NEXT_VAL",Tcontrol_t,1                                ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE      ,"IS_DS_TAKE"      ,Tcontrol_t,1                                ,_param->_nb_front_end, _param->_nb_context[it1]);
+    }  
+
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Interface with Context State (synchronization)."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL             ,"commit_all",Tcounter_t         ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM             ,"commit_mem",Tcounter_t         ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_MIN                     ,"min"      ,Tdepth_t           ,_param->_size_depth  ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_MAX                     ,"max"      ,Tdepth_t           ,_param->_size_depth+1,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_read",IN ,EAST,_("Interface with special register file (read)."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_SPR_READ_SR_OVE                ,"sr_ove"    ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_write",OUT,EAST,_("Interface with special register file (write)."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_VALACK_OUT(out_SPR_WRITE_VAL                    ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_VALACK_IN ( in_SPR_WRITE_ACK                    ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_F_VAL               ,"sr_f_val"    ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_F                   ,"sr_f"        ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_CY_VAL              ,"sr_cy_val"   ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_CY                  ,"sr_cy"       ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV_VAL              ,"sr_ov_val"   ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV                  ,"sr_ov"       ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+    internal_BANK_INSERT_VAL             = new Tcontrol_t   [_param->_nb_bank];
+    internal_BANK_INSERT_NUM_RENAME_UNIT = new uint32_t     [_param->_nb_bank];
+    internal_BANK_INSERT_NUM_INST        = new uint32_t     [_param->_nb_bank];
+
+    internal_BANK_COMMIT_VAL             = new Tcontrol_t * [_param->_nb_bank];
+    internal_BANK_COMMIT_NUM_INST        = new uint32_t   * [_param->_nb_bank];
+    internal_BANK_COMMIT_ENTRY           = new entry_t   ** [_param->_nb_bank];
+    
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+	internal_BANK_COMMIT_VAL              [i] = new Tcontrol_t [_param->_nb_bank_access_commit];
+	internal_BANK_COMMIT_NUM_INST         [i] = new uint32_t   [_param->_nb_bank_access_commit];
+	internal_BANK_COMMIT_ENTRY            [i] = new entry_t  * [_param->_nb_bank_access_commit];
+      }
+
+    internal_BANK_RETIRE_VAL             = new Tcontrol_t   [_param->_nb_bank];
+    internal_BANK_RETIRE_NUM_RENAME_UNIT = new uint32_t     [_param->_nb_bank];
+    internal_BANK_RETIRE_NUM_INST        = new uint32_t     [_param->_nb_bank];
+
+    internal_REEXECUTE_VAL               = new Tcontrol_t   [_param->_nb_inst_reexecute];
+    internal_REEXECUTE_NUM_BANK          = new uint32_t     [_param->_nb_inst_reexecute];
+
+    internal_BRANCH_COMPLETE_VAL         = new Tcontrol_t   [_param->_nb_inst_branch_complete];
+    internal_BRANCH_COMPLETE_NUM_BANK    = new uint32_t     [_param->_nb_inst_branch_complete];
+
+    internal_EVENT_ACK                   = new Tcontrol_t * [_param->_nb_front_end];
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      internal_EVENT_ACK [i] = new Tcontrol_t [_param->_nb_context [i]];
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _rob = new std::list<entry_t*> [_param->_nb_bank];
+    
+    reg_BANK_PTR           = new uint32_t     [_param->_nb_bank];
+
+    reg_NB_INST_COMMIT_ALL = new Tcounter_t * [_param->_nb_front_end];
+    reg_NB_INST_COMMIT_MEM = new Tcounter_t * [_param->_nb_front_end];
+    
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      {
+	reg_NB_INST_COMMIT_ALL [i] = new Tcounter_t [_param->_nb_context [i]];
+	reg_NB_INST_COMMIT_MEM [i] = new Tcounter_t [_param->_nb_context [i]];
+      }
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _priority_insert  = new generic::priority::Priority (_name+"_priority_insert",
+							 _param->_priority      ,
+							 _param->_load_balancing,
+							 _param->_nb_rename_unit,
+							 _param->_nb_inst_insert,
+							 _param->_nb_rename_unit_select);
+    
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+	_component->generate_file();
+#endif
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 88)
@@ -0,0 +1,207 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::deallocation"
+  void Commit_unit::deallocation (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+        DELETE2_SIGNAL( in_INSERT_VAL                     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL(out_INSERT_ACK                     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_FRONT_END_ID            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_front_end_id          );
+        DELETE2_SIGNAL( in_INSERT_CONTEXT_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_context_id            );
+        DELETE2_SIGNAL(out_INSERT_PACKET_ID               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_rob_ptr               );
+//      DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_ID          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_rename_unit_id        );
+        DELETE2_SIGNAL( in_INSERT_DEPTH                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_depth                 );
+        DELETE2_SIGNAL( in_INSERT_TYPE                    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type                  );
+        DELETE2_SIGNAL( in_INSERT_OPERATION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation             );
+        DELETE2_SIGNAL( in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_instruction_address               );
+        DELETE2_SIGNAL( in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_exception             );
+        DELETE2_SIGNAL( in_INSERT_EXCEPTION_USE           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_exception             );
+        DELETE2_SIGNAL( in_INSERT_STORE_QUEUE_PTR_WRITE   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr       );
+        DELETE2_SIGNAL( in_INSERT_LOAD_QUEUE_PTR_WRITE    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_load_queue_ptr        );
+        DELETE2_SIGNAL( in_INSERT_READ_RA                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RA_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RA_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL( in_INSERT_READ_RB                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RB_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RB_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL( in_INSERT_READ_RC                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RC_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RC_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register      );
+        DELETE2_SIGNAL( in_INSERT_WRITE_RD                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RD_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL( in_INSERT_WRITE_RE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RE_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register      );
+        DELETE2_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register      );
+
+        DELETE2_SIGNAL(out_RETIRE_VAL                     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL( in_RETIRE_ACK                     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_FRONT_END_ID            ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_front_end_id          );  
+        DELETE2_SIGNAL(out_RETIRE_CONTEXT_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_context_id            );    
+//      DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_ID          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_rename_unit_id        );
+        DELETE2_SIGNAL(out_RETIRE_EVENT_STATE             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_event_state           );
+        DELETE2_SIGNAL(out_RETIRE_USE_STORE_QUEUE         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_USE_LOAD_QUEUE          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_WRITE   ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_store_queue_ptr       );
+        DELETE2_SIGNAL(out_RETIRE_LOAD_QUEUE_PTR_WRITE    ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_load_queue_ptr        );
+        DELETE2_SIGNAL(out_RETIRE_READ_RA                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RA_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL(out_RETIRE_READ_RB                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RB_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL(out_RETIRE_READ_RC                 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RC_PHY          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register      );
+        DELETE2_SIGNAL(out_RETIRE_WRITE_RD                ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RD_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RD_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RD_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register      );
+        DELETE2_SIGNAL(out_RETIRE_WRITE_RE                ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                                   );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RE_LOG          ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_OLD      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register      );
+        DELETE2_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_NEW      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register      );
+
+        DELETE1_SIGNAL( in_COMMIT_VAL               ,_param->_nb_inst_commit,1                             );
+        DELETE1_SIGNAL(out_COMMIT_ACK               ,_param->_nb_inst_commit,1                             );
+        DELETE1_SIGNAL( in_COMMIT_WEN               ,_param->_nb_inst_commit,1                             );
+        DELETE1_SIGNAL( in_COMMIT_PACKET_ID         ,_param->_nb_inst_commit,_param->_size_rob_ptr         );
+//      DELETE1_SIGNAL( in_COMMIT_OPERATION         ,_param->_nb_inst_commit,_param->_size_operation       );
+//      DELETE1_SIGNAL( in_COMMIT_TYPE              ,_param->_nb_inst_commit,_param->_size_type            );
+        DELETE1_SIGNAL( in_COMMIT_FLAGS             ,_param->_nb_inst_commit,_param->_size_general_data    );
+        DELETE1_SIGNAL( in_COMMIT_EXCEPTION         ,_param->_nb_inst_commit,_param->_size_exception       );
+        DELETE1_SIGNAL( in_COMMIT_NO_SEQUENCE       ,_param->_nb_inst_commit,1                             );
+        DELETE1_SIGNAL( in_COMMIT_ADDRESS           ,_param->_nb_inst_commit,_param->_size_instruction_address         );
+        DELETE1_SIGNAL(out_COMMIT_NUM_REG_RD        ,_param->_nb_inst_commit,_param->_size_general_register+_param->_size_rename_unit_id);
+
+        DELETE1_SIGNAL(out_REEXECUTE_VAL                  ,_param->_nb_inst_reexecute,1                            );
+        DELETE1_SIGNAL( in_REEXECUTE_ACK                  ,_param->_nb_inst_reexecute,1                            );
+        DELETE1_SIGNAL(out_REEXECUTE_CONTEXT_ID           ,_param->_nb_inst_reexecute,_param->_size_context_id     );
+        DELETE1_SIGNAL(out_REEXECUTE_FRONT_END_ID         ,_param->_nb_inst_reexecute,_param->_size_front_end_id   );
+        DELETE1_SIGNAL(out_REEXECUTE_PACKET_ID            ,_param->_nb_inst_reexecute,_param->_size_rob_ptr        );
+        DELETE1_SIGNAL(out_REEXECUTE_OPERATION            ,_param->_nb_inst_reexecute,_param->_size_operation      );
+        DELETE1_SIGNAL(out_REEXECUTE_TYPE                 ,_param->_nb_inst_reexecute,_param->_size_type           );
+        DELETE1_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute,_param->_size_store_queue_ptr);
+
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete,1                         );
+        DELETE1_SIGNAL( in_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete,1                         );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID     ,_param->_nb_inst_branch_complete,_param->_size_context_id  );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_FRONT_END_ID   ,_param->_nb_inst_branch_complete,_param->_size_front_end_id);
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_DEPTH          ,_param->_nb_inst_branch_complete,_param->_size_depth       );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS        ,_param->_nb_inst_branch_complete,_param->_size_instruction_address     );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_FLAG           ,_param->_nb_inst_branch_complete,1                         );
+        DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete,1                         );
+
+        DELETE_SIGNAL (out_UPDATE_VAL                      ,1                         );
+        DELETE_SIGNAL ( in_UPDATE_ACK                      ,1                         );
+        DELETE_SIGNAL (out_UPDATE_CONTEXT_ID               ,_param->_size_context_id  );
+        DELETE_SIGNAL (out_UPDATE_FRONT_END_ID             ,_param->_size_front_end_id);
+        DELETE_SIGNAL (out_UPDATE_DEPTH                    ,_param->_size_depth       );
+        DELETE_SIGNAL (out_UPDATE_TYPE                     ,_param->_size_event_type  );
+        DELETE_SIGNAL (out_UPDATE_IS_DELAY_SLOT            ,1                         );
+        DELETE_SIGNAL (out_UPDATE_ADDRESS                  ,_param->_size_instruction_address     );
+        DELETE_SIGNAL (out_UPDATE_ADDRESS_EPCR             ,_param->_size_instruction_address     );
+        DELETE_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         ,1                         );
+        DELETE_SIGNAL (out_UPDATE_ADDRESS_EEAR             ,_param->_size_instruction_address     );
+
+        DELETE2_SIGNAL( in_EVENT_VAL                       ,_param->_nb_front_end, _param->_nb_context[it1],1                    );
+        DELETE2_SIGNAL(out_EVENT_ACK                       ,_param->_nb_front_end, _param->_nb_context[it1],1                    );
+        DELETE2_SIGNAL( in_EVENT_ADDRESS                   ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_instruction_address);
+        DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT              ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_instruction_address); 
+        DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL          ,_param->_nb_front_end, _param->_nb_context[it1],1                    );
+        DELETE2_SIGNAL( in_EVENT_IS_DS_TAKE                ,_param->_nb_front_end, _param->_nb_context[it1],1                    );
+
+        DELETE2_SIGNAL(out_NB_INST_COMMIT_ALL             ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_nb_inst_commit);
+        DELETE2_SIGNAL(out_NB_INST_COMMIT_MEM             ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_nb_inst_commit);
+
+        DELETE2_SIGNAL( in_DEPTH_MIN                      ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth  );
+        DELETE2_SIGNAL( in_DEPTH_MAX                      ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth+1);
+
+	DELETE2_SIGNAL( in_SPR_READ_SR_OVE                ,_param->_nb_front_end, _param->_nb_context[it1],1);
+
+	DELETE2_SIGNAL(out_SPR_WRITE_VAL                  ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_WRITE_ACK                  ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_WRITE_SR_F_VAL             ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_WRITE_SR_F                 ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_WRITE_SR_CY_VAL            ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_WRITE_SR_CY                ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_WRITE_SR_OV_VAL            ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_WRITE_SR_OV                ,_param->_nb_front_end, _param->_nb_context[it1],1);
+
+        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+        delete [] internal_BANK_INSERT_VAL            ;
+        delete [] internal_BANK_INSERT_NUM_RENAME_UNIT;
+        delete [] internal_BANK_INSERT_NUM_INST       ;
+        
+        delete [] internal_BANK_COMMIT_VAL            ;
+        delete [] internal_BANK_COMMIT_NUM_INST       ;
+        delete [] internal_BANK_COMMIT_ENTRY          ;
+        
+        delete [] internal_BANK_RETIRE_VAL            ;
+        delete [] internal_BANK_RETIRE_NUM_RENAME_UNIT;
+        delete [] internal_BANK_RETIRE_NUM_INST       ;
+        
+        delete [] internal_REEXECUTE_VAL              ;
+        delete [] internal_REEXECUTE_NUM_BANK         ;
+        
+        delete [] internal_BRANCH_COMPLETE_VAL        ;
+        delete [] internal_BRANCH_COMPLETE_NUM_BANK   ;
+        
+        for (uint32_t i=0; i<_param->_nb_front_end; i++)
+          delete [] internal_EVENT_ACK [i];
+        delete [] internal_EVENT_ACK;
+        
+        // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+        for (uint32_t i=0; i<_param->_nb_front_end; i++)
+          {
+            delete [] reg_NB_INST_COMMIT_ALL [i];
+            delete [] reg_NB_INST_COMMIT_MEM [i];
+          }
+        delete [] reg_NB_INST_COMMIT_ALL;
+        delete [] reg_NB_INST_COMMIT_MEM;
+        
+        delete [] reg_BANK_PTR;
+        
+        delete [] _rob;
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    delete _priority_insert;
+
+    delete _component;
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_end_cycle.cpp	(revision 88)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::end_cycle"
+void Commit_unit::end_cycle ()
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 88)
@@ -0,0 +1,106 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::genMealy_commit"
+  void Commit_unit::genMealy_commit (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_function(Commit_unit,FUNCTION,_name.c_str());
+
+#ifdef STATISTICS
+    internal_BANK_COMMIT_CONFLIT_ACCESS = 0;
+#endif
+
+    uint32_t           bank_nb_access    [_param->_nb_bank];
+    Tcontrol_t         commit_ack        [_param->_nb_inst_commit];
+    // Initialisation
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+	bank_nb_access            [i] = 0;
+	for (uint32_t j=0; j<_param->_nb_bank_access_commit; j++)
+	  internal_BANK_COMMIT_VAL  [i][j] = false;
+      }
+
+    // commit interface
+    for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
+      {
+        commit_ack        [i] = false;
+
+	// Test if have instruction
+	if (PORT_READ(in_COMMIT_VAL [i]))
+	  {
+	    Tpacket_t packet          = (_param->_have_port_rob_ptr  )?PORT_READ(in_COMMIT_PACKET_ID [i]):0;
+	    uint32_t  num_bank        = packet >> _param->_shift_num_bank;
+	    uint32_t  num_bank_access = bank_nb_access [num_bank];
+            
+	    // test if bank is not busy (previous access)
+	    if (num_bank_access < _param->_nb_bank_access_commit)
+	      {
+		// find
+		bank_nb_access    [num_bank] ++;
+		commit_ack        [i] = true;
+
+		internal_BANK_COMMIT_VAL      [num_bank][num_bank_access] = true;
+		internal_BANK_COMMIT_NUM_INST [num_bank][num_bank_access] = i;
+                
+                Tpacket_t packet_id = packet & _param->_mask_size_bank;
+                
+                // find the good entry !!!
+                entry_t* entry = NULL;
+                for (std::list<entry_t*>::iterator it=_rob[num_bank].begin();
+                     it!=_rob[num_bank].end();
+                     it++)
+                  if ((*it)->ptr == packet_id)
+                    {
+                      entry = (*it);
+                      break;
+                    }
+
+#ifdef DEBUG_TEST
+                if (entry == NULL)
+                  throw ERRORMORPHEO(FUNCTION,_("Commit : Packet_id miss match in the Re Order Buffer.\n"));
+#endif
+
+                internal_BANK_COMMIT_ENTRY    [num_bank][num_bank_access] = entry;
+
+//              PORT_WRITE(out_COMMIT_NUM_REG_RD [i],(entry->rename_unit_id << _param->_size_general_register)+entry->num_reg_rd_phy_new);
+                PORT_WRITE(out_COMMIT_NUM_REG_RD [i],entry->num_reg_rd_phy_new);
+	      }
+#ifdef STATISTICS
+	    else
+	      {
+		internal_BANK_COMMIT_CONFLIT_ACCESS ++;
+	      }
+#endif
+	  }
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
+      PORT_WRITE(out_COMMIT_ACK [i],commit_ack [i]);
+    
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 88)
@@ -0,0 +1,135 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::genMealy_insert"
+  void Commit_unit::genMealy_insert (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_function(Commit_unit,FUNCTION,_name.c_str());
+
+    Tcontrol_t bank_full         [_param->_nb_bank];
+    Tcontrol_t insert_ack        [_param->_nb_rename_unit][_param->_max_nb_inst_insert];
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+    Tpacket_t  insert_packet_id  [_param->_nb_rename_unit][_param->_max_nb_inst_insert];
+#endif
+    bool       can_rename_select [_param->_nb_rename_unit];
+    
+    // Initialisation
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+	internal_BANK_INSERT_VAL  [i] = false;
+	bank_full [i] = not (_rob[i].size() < _param->_size_bank); 
+      }
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      {
+	can_rename_select [i] = true;
+	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+	  {
+	    insert_ack       [i][j] = false;
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+	    insert_packet_id [i][j] = false;
+#endif
+	  }
+      }
+
+    // insert interface
+//     log_printf(TRACE,Commit_unit,FUNCTION,"  * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL);
+
+    std::list<generic::priority::select_t> * select_insert = _priority_insert ->select(); // same select for all insert
+    std::list<generic::priority::select_t>::iterator it=select_insert ->begin();
+ 
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+	// compute the bank number (num_bank_tail is the older write slot)
+	uint32_t num_bank = (reg_NUM_BANK_TAIL+i)%_param->_nb_bank;
+
+// 	log_printf(TRACE,Commit_unit,FUNCTION,"  * BANK : %d", num_bank);
+// 	log_printf(TRACE,Commit_unit,FUNCTION,"    * val  : %d", internal_BANK_INSERT_VAL [num_bank]);
+// 	log_printf(TRACE,Commit_unit,FUNCTION,"    * full : %d", bank_full [num_bank]);
+
+	while (it!=select_insert ->end())
+	  {
+	    uint32_t num_rename_unit = it->grp;
+	    uint32_t num_inst_insert = it->elt;
+
+	    it++;
+
+ 	    log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT [%d][%d]", num_rename_unit,num_inst_insert);
+//  	    log_printf(TRACE,Commit_unit,FUNCTION,"    * INSERT_VAL        : %d", PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert]));
+ 	    log_printf(TRACE,Commit_unit,FUNCTION,"    * can_rename_select : %d", can_rename_select [num_rename_unit]);
+
+	    // Test if have instruction
+            //   -> rename_unit_glue test the in-order insert !!!!!
+	    if (can_rename_select [num_rename_unit] // and 
+// 		PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert])
+                )
+	      {
+                log_printf(TRACE,Commit_unit,FUNCTION,"      * have instruction");
+                log_printf(TRACE,Commit_unit,FUNCTION,"      * bank_full : %d",bank_full [num_bank]);
+
+		// test if bank is not busy (full or previous access)
+		if (not bank_full [num_bank])
+		  {
+		    // find
+		    insert_ack       [num_rename_unit][num_inst_insert] = true;
+
+		    Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
+
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+		    insert_packet_id [num_rename_unit][num_inst_insert] = packet_id;
+#else
+		    if (_param->_have_port_rob_ptr  )
+		    PORT_WRITE(out_INSERT_PACKET_ID [num_rename_unit][num_inst_insert],packet_id);
+#endif
+		    internal_BANK_INSERT_VAL             [num_bank] = true;
+		    internal_BANK_INSERT_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
+		    internal_BANK_INSERT_NUM_INST        [num_bank] = num_inst_insert;
+		    
+		    break;
+		  }
+	      }
+		
+	    // is a valid instruction, but it's not send at a bank
+	    //  ... invalid this rename_unit (because, insert in_order)
+	    can_rename_select [num_rename_unit] = false;
+	  }
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+	{
+	  PORT_WRITE(out_INSERT_ACK       [i][j],insert_ack       [i][j]);
+          log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT [%d][%d] -> ack %d",i,j,insert_ack[i][j]);
+
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+	  if (_param->_have_port_rob_ptr  )
+	  PORT_WRITE(out_INSERT_PACKET_ID [i][j],insert_packet_id [i][j]);
+#endif
+	}
+    
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp	(revision 88)
@@ -0,0 +1,193 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::genMealy_retire"
+  void Commit_unit::genMealy_retire (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_function(Commit_unit,FUNCTION,_name.c_str());
+
+    Tcontrol_t retire_val          [_param->_nb_rename_unit][_param->_max_nb_inst_retire];
+    uint32_t   num_inst_retire     [_param->_nb_rename_unit];
+    bool       can_retire          [_param->_nb_rename_unit];
+
+    Tcontrol_t spr_write_val       [_param->_nb_front_end][_param->_max_nb_context];
+    Tcontrol_t spr_write_sr_f_val  [_param->_nb_front_end][_param->_max_nb_context];
+    Tcontrol_t spr_write_sr_f      [_param->_nb_front_end][_param->_max_nb_context];
+    Tcontrol_t spr_write_sr_cy_val [_param->_nb_front_end][_param->_max_nb_context];
+    Tcontrol_t spr_write_sr_cy     [_param->_nb_front_end][_param->_max_nb_context];
+    Tcontrol_t spr_write_sr_ov_val [_param->_nb_front_end][_param->_max_nb_context];
+    Tcontrol_t spr_write_sr_ov     [_param->_nb_front_end][_param->_max_nb_context];
+
+
+    // Initialisation
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      internal_BANK_RETIRE_VAL  [i] = false;
+
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      {
+	num_inst_retire [i] = 0;
+	can_retire      [i] = true ;
+	for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+	  retire_val [i][j] = false;
+      }
+
+    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+	spr_write_val [i][j] = 0;
+
+    // Scan Top of each bank
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+	uint32_t num_bank = (reg_NUM_BANK_HEAD+i)%_param->_nb_bank;
+
+	if (not _rob[num_bank].empty())
+	  {
+	    // Scan all instruction in windows and test if instruction is speculative
+	    entry_t  * entry = _rob [num_bank].front();
+	    uint32_t   x     = entry->rename_unit_id;
+	    uint32_t   y     = num_inst_retire [x];
+	    
+	    if (can_retire [x] and // in-order
+		(y < _param->_nb_inst_retire [x]) and
+		PORT_READ(in_RETIRE_ACK [x][y])) // not busy
+	      {
+		rob_state_t state = entry->state;
+		
+		if ((state == ROB_END_OK  ) or 
+		    (state == ROB_END_KO  ) or 
+		    (state == ROB_END_MISS)//  or 
+// 		    (state == ROB_END_EXCEPTION)
+		    )
+		  {
+		    Tcontext_t         front_end_id   = entry->front_end_id;
+		    Tcontext_t         context_id     = entry->context_id;  
+		    Tcontrol_t         write_re       = entry->write_re;
+		    Tspecial_address_t num_reg_re_log = entry->num_reg_re_log;
+
+		    // if state is ok, when write flags in the SR regsiters
+		    bool spr_write_ack = true;
+
+		    if ((state == ROB_END_OK  ) and write_re)
+		      {
+			spr_write_ack = PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id]);
+
+			// retire_ack is set !!!
+			spr_write_val       [front_end_id][context_id] = 1;
+
+			Tspecial_data_t flags = entry->flags;
+
+			switch (num_reg_re_log)
+			  {
+			  case SPR_LOGIC_SR_F     : 
+			    {
+			      spr_write_sr_f_val  [front_end_id][context_id] = 1;
+			      spr_write_sr_f      [front_end_id][context_id] = (flags & FLAG_F )!=0;
+
+			      break;
+			    }
+			  case SPR_LOGIC_SR_CY_OV :
+			    {
+			      spr_write_sr_cy_val [front_end_id][context_id] = 1;
+			      spr_write_sr_ov_val [front_end_id][context_id] = 1;	
+			      spr_write_sr_cy     [front_end_id][context_id] = (flags & FLAG_CY)!=0;
+			      spr_write_sr_ov     [front_end_id][context_id] = (flags & FLAG_OV)!=0;
+			
+			      break;
+			    }
+			  default : 
+			    {
+#ifdef DEBUG_TEST
+			      throw ERRORMORPHEO(FUNCTION,_("Invalid num_reg_re_log.\n"));
+#endif
+			    }
+			  }
+		      }
+
+		    // find an instruction can be retire, and in order
+
+		    if (spr_write_ack)
+		      {
+			retire_val [x][y] = 1;
+			num_inst_retire [x] ++;
+			internal_BANK_RETIRE_VAL [num_bank] = true;
+		      }
+
+		    internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x;
+		    internal_BANK_RETIRE_NUM_INST        [num_bank] = y;
+
+		    if (_param->_have_port_front_end_id)
+		    PORT_WRITE(out_RETIRE_FRONT_END_ID          [x][y], front_end_id                );
+		    if (_param->_have_port_context_id)
+		    PORT_WRITE(out_RETIRE_CONTEXT_ID            [x][y], context_id                  );
+// 		    PORT_WRITE(out_RETIRE_RENAME_UNIT_ID        [x][y], entry->rename_unit_id       );
+		    PORT_WRITE(out_RETIRE_EVENT_STATE           [x][y], entry->event_state          );
+		    PORT_WRITE(out_RETIRE_USE_STORE_QUEUE       [x][y], entry->use_store_queue      );
+		    PORT_WRITE(out_RETIRE_USE_LOAD_QUEUE        [x][y], entry->use_load_queue       );
+		    PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [x][y], entry->store_queue_ptr_write);
+		    if (_param->_have_port_load_queue_ptr)
+		    PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [x][y], entry->load_queue_ptr_write );
+		    PORT_WRITE(out_RETIRE_READ_RA               [x][y], entry->read_ra              );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RA_PHY        [x][y], entry->num_reg_ra_phy       );
+		    PORT_WRITE(out_RETIRE_READ_RB               [x][y], entry->read_rb              );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RB_PHY        [x][y], entry->num_reg_rb_phy       );
+		    PORT_WRITE(out_RETIRE_READ_RC               [x][y], entry->read_rc              );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RC_PHY        [x][y], entry->num_reg_rc_phy       );
+		    PORT_WRITE(out_RETIRE_WRITE_RD              [x][y], entry->write_rd             );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RD_LOG        [x][y], entry->num_reg_rd_log       );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_OLD    [x][y], entry->num_reg_rd_phy_old   );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_NEW    [x][y], entry->num_reg_rd_phy_new   );
+		    PORT_WRITE(out_RETIRE_WRITE_RE              [x][y], write_re                    );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RE_LOG        [x][y], num_reg_re_log              );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD    [x][y], entry->num_reg_re_phy_old   );
+		    PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW    [x][y], entry->num_reg_re_phy_new   );
+		  }
+	      }
+
+	    // Retire "in-order"
+	    can_retire [x] &= retire_val [x][y];
+	  }
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+	PORT_WRITE(out_RETIRE_VAL [i][j],retire_val [i][j]);
+
+    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+	{
+	  PORT_WRITE(out_SPR_WRITE_VAL       [i][j], spr_write_val       [i][j]);
+	  PORT_WRITE(out_SPR_WRITE_SR_F_VAL  [i][j], spr_write_sr_f_val  [i][j]);
+	  PORT_WRITE(out_SPR_WRITE_SR_F      [i][j], spr_write_sr_f      [i][j]);
+	  PORT_WRITE(out_SPR_WRITE_SR_CY_VAL [i][j], spr_write_sr_cy_val [i][j]);
+	  PORT_WRITE(out_SPR_WRITE_SR_CY     [i][j], spr_write_sr_cy     [i][j]);
+	  PORT_WRITE(out_SPR_WRITE_SR_OV_VAL [i][j], spr_write_sr_ov_val [i][j]);
+	  PORT_WRITE(out_SPR_WRITE_SR_OV     [i][j], spr_write_sr_ov     [i][j]);
+	}
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp	(revision 88)
@@ -0,0 +1,158 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::genMoore"
+  void Commit_unit::genMoore (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_function(Commit_unit,FUNCTION,_name.c_str());
+
+    // ===================================================================
+    // =====[ REEXECUTE ]=================================================
+    // ===================================================================
+    {
+      Tcontrol_t val = false;
+
+      if (not _rob[reg_NUM_BANK_HEAD].empty())
+	{
+	  entry_t    * entry = _rob [reg_NUM_BANK_HEAD].front();
+	  rob_state_t  state = entry->state;
+
+	  val   = ((state == ROB_STORE_HEAD_OK) or
+		   (state == ROB_STORE_HEAD_KO));
+	  
+	  if (val)
+	    {
+	      if (_param->_have_port_context_id)
+  	      PORT_WRITE(out_REEXECUTE_CONTEXT_ID            [0], entry->context_id           );
+	      if (_param->_have_port_front_end_id)
+  	      PORT_WRITE(out_REEXECUTE_FRONT_END_ID          [0], entry->front_end_id         );
+	      if (_param->_have_port_rob_ptr  )
+  	      PORT_WRITE(out_REEXECUTE_PACKET_ID             [0], entry->ptr                  );
+	      PORT_WRITE(out_REEXECUTE_TYPE                  [0], entry->type                 );
+	      PORT_WRITE(out_REEXECUTE_STORE_QUEUE_PTR_WRITE [0], entry->store_queue_ptr_write);
+	      PORT_WRITE(out_REEXECUTE_OPERATION             [0], (state == ROB_STORE_HEAD_OK)?OPERATION_MEMORY_STORE_HEAD_OK:OPERATION_MEMORY_STORE_HEAD_KO);
+	    }
+	}
+ 
+      internal_REEXECUTE_VAL      [0] = val;
+      internal_REEXECUTE_NUM_BANK [0] = reg_NUM_BANK_HEAD;
+      
+      PORT_WRITE(out_REEXECUTE_VAL[0], internal_REEXECUTE_VAL [0]);
+    }
+
+    // ===================================================================
+    // =====[ BRANCH_COMPLETE ]===========================================
+    // ===================================================================
+    {
+      uint32_t nb_scan_bank = 0;
+
+      for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+	{
+	  Tcontrol_t  val  = false;
+	  
+	  for (uint32_t j=nb_scan_bank; j<_param->_nb_bank; j++)
+	    {
+	      nb_scan_bank ++;
+
+	      uint32_t num_bank = (reg_NUM_BANK_HEAD+j)%_param->_nb_bank;
+	      
+	      if (not _rob [num_bank].empty())
+		{
+		  entry_t    * entry    = _rob [num_bank].front();
+		  rob_state_t  state    = entry->state;
+		  
+		  if (state == ROB_BRANCH_COMPLETE)
+		    {
+		      val = true;
+		      
+		      internal_BRANCH_COMPLETE_NUM_BANK           [i] = num_bank;
+		      
+		      if (_param->_have_port_context_id)
+		      PORT_WRITE(out_BRANCH_COMPLETE_CONTEXT_ID   [i], entry->context_id           );
+		      if (_param->_have_port_front_end_id)
+		      PORT_WRITE(out_BRANCH_COMPLETE_FRONT_END_ID [i], entry->front_end_id         );
+		      if (_param->_have_port_depth)
+		      PORT_WRITE(out_BRANCH_COMPLETE_DEPTH        [i], entry->depth                );
+		      PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS      [i], entry->data_commit          );
+		      PORT_WRITE(out_BRANCH_COMPLETE_FLAG         [i], (entry->flags&FLAG_F)!=0    );
+		      
+		      break;
+		    }
+		}
+	    }
+
+	  internal_BRANCH_COMPLETE_VAL [i] = val;
+	  PORT_WRITE(out_BRANCH_COMPLETE_VAL [i], internal_BRANCH_COMPLETE_VAL [i]);
+	}
+    }
+
+    // ===================================================================
+    // =====[ UPDATE ]====================================================
+    // ===================================================================
+    {
+      Tcontrol_t val = false;
+
+      if (not _rob[reg_NUM_BANK_HEAD].empty())
+	{
+	  entry_t    * entry = _rob [reg_NUM_BANK_HEAD].front();
+	  rob_state_t  state = entry->state;
+
+	  val   = (state == ROB_END_EXCEPTION);
+	  
+	  if (val)
+	    {
+	      throw ERRORMORPHEO(FUNCTION,_("Moore : exception is not yet supported (Coming Soon).\n"));
+	    }
+	}
+    }
+
+//   public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_VAL                        ;
+//   public    : SC_IN (Tcontrol_t         )   *  in_UPDATE_ACK                        ;
+//   public    : SC_OUT(Tcontext_t         )   * out_UPDATE_CONTEXT_ID                 ;
+//   public    : SC_OUT(Tcontext_t         )   * out_UPDATE_FRONT_END_ID               ;
+//   public    : SC_OUT(Tdepth_t           )   * out_UPDATE_DEPTH                      ;
+//   public    : SC_OUT(Tevent_type_t      )   * out_UPDATE_TYPE                       ;
+//   public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_IS_DELAY_SLOT              ;
+//   public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS                    ;
+//   public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS_EPCR               ;
+//   public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_ADDRESS_EEAR_VAL           ;
+//   public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS_EEAR               ;
+ 
+    // ===================================================================
+    // =====[ NB_INST ]===================================================
+    // ===================================================================
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+	{
+	  PORT_WRITE(out_NB_INST_COMMIT_ALL [i][j], reg_NB_INST_COMMIT_ALL [i][j]);
+	  PORT_WRITE(out_NB_INST_COMMIT_MEM [i][j], reg_NB_INST_COMMIT_MEM [i][j]);
+	}
+
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,102 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::statistics_allocation"
+  void Commit_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Commit_unit",
+		      param_statistics);
+
+    _stat_nb_inst_insert                = new counter_t * [_param->_nb_rename_unit];
+    _stat_nb_inst_retire                = new counter_t * [_param->_nb_rename_unit];
+    _stat_bank_nb_inst                  = new counter_t * [_param->_nb_bank];
+    
+    {
+      std::string sum_nb_inst_insert = "";
+      std::string sum_nb_inst_retire = "";
+
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	{
+	  _stat_nb_inst_insert [i] = _stat->create_variable("nb_inst_insert_"+toString(i));
+	  _stat_nb_inst_retire [i] = _stat->create_variable("nb_inst_retire_"+toString(i));
+	  
+	  _stat->create_expr_average_by_cycle("average_use_interface_insert_"+toString(i), "nb_inst_insert_"+toString(i), "", toString(_("Average instruction by cycle on insert interface (rename_unit %d)"),i));
+	  _stat->create_expr_average_by_cycle("average_use_interface_retire_"+toString(i), "nb_inst_retire_"+toString(i), "", toString(_("Average instruction by cycle on retire interface (rename_unit %d)"),i));
+	  _stat->create_expr_percent         ("percent_use_interface_insert_"+toString(i) , "average_use_interface_insert_"+toString(i), toString(_param->_nb_inst_insert [i]), toString(_("Percent usage of insert interface (rename_unit %d)"),i));
+	  _stat->create_expr_percent         ("percent_use_interface_retire_"+toString(i) , "average_use_interface_retire_"+toString(i), toString(_param->_nb_inst_retire [i]), toString(_("Percent usage of retire interface (rename_unit %d)"),i));
+
+	  if (i == 0)
+            {
+              sum_nb_inst_insert = "nb_inst_insert_"+toString(i);
+              sum_nb_inst_retire = "nb_inst_retire_"+toString(i);
+            }
+          else
+            {
+              sum_nb_inst_insert = "+ nb_inst_insert_"+toString(i) + " " +sum_nb_inst_insert;
+              sum_nb_inst_retire = "+ nb_inst_retire_"+toString(i) + " " +sum_nb_inst_retire;
+            }
+	}
+
+      _stat->create_expr_average_by_cycle("average_inst_insert", sum_nb_inst_insert, "", _("Average instruction insert by cycle"));
+      _stat->create_expr_average_by_cycle("average_inst_retire", sum_nb_inst_retire, "", _("Average instruction retire by cycle"));
+    }
+
+    _stat_nb_inst_commit = _stat->create_variable("nb_inst_commit");
+    _stat->create_expr_average_by_cycle("average_use_interface_commit","nb_inst_commit", "", _("Average instruction by cycle on commit interface"));
+    _stat->create_expr_percent         ("percent_use_interface_commit", "average_use_interface_commit", toString(_param->_nb_inst_commit), _("Percent usage of commit interface"));
+
+    _stat_nb_inst_commit_conflit_access = _stat->create_variable("nb_inst_commit_conflit_access");
+    _stat->create_expr_average_by_cycle("average_use_interface_commit_conflit_access","nb_inst_commit_conflit_access", "", _("Average access conflit by cycle on commit interface"));
+    _stat->create_expr_percent         ("percent_use_interface_commit_conflit_access","average_use_interface_commit_conflit_access", "average_use_interface_commit", _("Percent access conflit on commit interface"));
+
+    // bank/queue occupation
+    {
+      std::string sum_bank_nb_inst = "";
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+        {
+          _stat_bank_nb_inst [i] = _stat->create_variable("bank_nb_inst_"+toString(i));
+          
+          _stat->create_expr_average_by_cycle("average_occupation_bank_"+toString(i), "bank_nb_inst_"+toString(i), "", toString(_("Average instruction by cycle (bank %d)"),i));
+          _stat->create_expr_percent         ("percent_occupation_bank_"+toString(i), "average_occupation_bank_"+toString(i), toString(_param->_size_bank), toString(_("Percent occupation of bank (bank %d)"),i));
+          
+          if (i == 0)
+            sum_bank_nb_inst = "bank_nb_inst_"+toString(i);
+          else
+            sum_bank_nb_inst = "+ bank_nb_inst_"+toString(i) + " " +sum_bank_nb_inst;
+        }
+      
+      _stat->create_expr_average_by_cycle("average_occupation_bank", sum_bank_nb_inst, "", _("Average instruction by cycle (all bank)"));
+      _stat->create_expr_percent         ("percent_occupation_bank" , "average_occupation_bank", toString(_param->_size_queue), _("Percent occupation of Re-Order-Buffer (all bank)"));
+    }
+
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,43 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::statistics_deallocation"
+  void Commit_unit::statistics_deallocation (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    log_printf(INFO,Commit_unit,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+
+    delete _stat;
+
+    delete [] _stat_nb_inst_insert;
+    delete [] _stat_nb_inst_retire;
+    delete [] _stat_bank_nb_inst;
+    
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 88)
@@ -0,0 +1,504 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+  
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::transition"
+  void Commit_unit::transition (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_function(Commit_unit,FUNCTION,_name.c_str());
+
+    if (PORT_READ(in_NRESET) == 0)
+      {
+        for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  {
+	    _rob [i].clear();
+	    reg_BANK_PTR [i] = 0;
+	  }
+
+	reg_NUM_BANK_HEAD = 0;
+	reg_NUM_BANK_TAIL = 0;
+
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+	    {
+	      reg_NB_INST_COMMIT_ALL [i][j] = 0;
+	      reg_NB_INST_COMMIT_MEM [i][j] = 0;
+	    }
+
+	_priority_insert->reset();
+      }
+    else
+      {
+	// next priority
+	_priority_insert->transition();
+
+	// ===================================================================
+	// =====[ INSERT ]====================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  if (internal_BANK_INSERT_VAL [i])
+	    {
+	      uint32_t x = internal_BANK_INSERT_NUM_RENAME_UNIT [i];
+	      uint32_t y = internal_BANK_INSERT_NUM_INST        [i];
+
+	      if (PORT_READ(in_INSERT_VAL [x][y]))
+		{
+		  log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT            [%d][%d]",x,y);
+
+#ifdef STATISTICS
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_insert [x]) ++;
+#endif
+
+		  Tcontext_t   front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_INSERT_FRONT_END_ID [x][y]):0;
+		  Tcontext_t   context_id   = (_param->_have_port_context_id  )?PORT_READ(in_INSERT_CONTEXT_ID   [x][y]):0;
+		  Ttype_t      type         = PORT_READ(in_INSERT_TYPE         [x][y]);
+                  Toperation_t operation    = PORT_READ(in_INSERT_OPERATION    [x][y]);
+		  Texception_t exception    = PORT_READ(in_INSERT_EXCEPTION    [x][y]);
+
+		  log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id   : %d",front_end_id);
+		  log_printf(TRACE,Commit_unit,FUNCTION,"    * context_id     : %d",context_id);
+		  log_printf(TRACE,Commit_unit,FUNCTION,"    * type           : %s",toString_type(type).c_str());
+		  log_printf(TRACE,Commit_unit,FUNCTION,"    * operation      : %d",operation );
+		  log_printf(TRACE,Commit_unit,FUNCTION,"    * exception      : %d",exception );
+
+		  entry_t * entry = new entry_t;
+
+		  entry->ptr                     = reg_BANK_PTR [i];
+		  entry->front_end_id            = front_end_id;
+		  entry->context_id              = context_id  ;
+		  entry->rename_unit_id          = x;
+		  entry->depth                   = (_param->_have_port_depth)?PORT_READ(in_INSERT_DEPTH [x][y]):0;
+		  entry->type                    = type;
+		  entry->operation               = operation;
+		  entry->is_delay_slot           = PORT_READ(in_INSERT_IS_DELAY_SLOT         [x][y]);
+		  entry->address                 = PORT_READ(in_INSERT_ADDRESS               [x][y]);
+		  entry->exception               = exception;
+		  entry->exception_use           = PORT_READ(in_INSERT_EXCEPTION_USE         [x][y]);
+		  entry->use_store_queue         = (type == TYPE_MEMORY) and (    is_operation_memory_store(operation));
+		  entry->use_load_queue          = (type == TYPE_MEMORY) and (not is_operation_memory_store(operation));
+		  entry->store_queue_ptr_write   = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE [x][y]);
+		  entry->load_queue_ptr_write    = (_param->_have_port_load_queue_ptr)?PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE [x][y]):0;
+		  entry->read_ra                 = PORT_READ(in_INSERT_READ_RA               [x][y]);
+		  entry->num_reg_ra_log          = PORT_READ(in_INSERT_NUM_REG_RA_LOG        [x][y]);
+		  entry->num_reg_ra_phy          = PORT_READ(in_INSERT_NUM_REG_RA_PHY        [x][y]);
+		  entry->read_rb                 = PORT_READ(in_INSERT_READ_RB               [x][y]);
+		  entry->num_reg_rb_log          = PORT_READ(in_INSERT_NUM_REG_RB_LOG        [x][y]);
+		  entry->num_reg_rb_phy          = PORT_READ(in_INSERT_NUM_REG_RB_PHY        [x][y]);
+		  entry->read_rc                 = PORT_READ(in_INSERT_READ_RC               [x][y]);
+		  entry->num_reg_rc_log          = PORT_READ(in_INSERT_NUM_REG_RC_LOG        [x][y]);
+		  entry->num_reg_rc_phy          = PORT_READ(in_INSERT_NUM_REG_RC_PHY        [x][y]);
+		  entry->write_rd                = PORT_READ(in_INSERT_WRITE_RD              [x][y]);
+		  entry->num_reg_rd_log          = PORT_READ(in_INSERT_NUM_REG_RD_LOG        [x][y]);
+		  entry->num_reg_rd_phy_old      = PORT_READ(in_INSERT_NUM_REG_RD_PHY_OLD    [x][y]);
+		  entry->num_reg_rd_phy_new      = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW    [x][y]);
+		  entry->write_re                = PORT_READ(in_INSERT_WRITE_RE              [x][y]);
+		  entry->num_reg_re_log          = PORT_READ(in_INSERT_NUM_REG_RE_LOG        [x][y]);
+		  entry->num_reg_re_phy_old      = PORT_READ(in_INSERT_NUM_REG_RE_PHY_OLD    [x][y]);
+		  entry->num_reg_re_phy_new      = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW    [x][y]);
+
+		  if (exception == EXCEPTION_NONE)
+		    {
+                      Tcontrol_t no_execute = PORT_READ(in_INSERT_NO_EXECUTE [x][y]);
+                      // no_execute : l.j, l.nop, l.rfe
+
+                      log_printf(TRACE,Commit_unit,FUNCTION,"    * no_execute     : %d",no_execute);
+
+		      switch (type)
+			{
+			case TYPE_BRANCH : {entry->state=(no_execute==1)?ROB_BRANCH_COMPLETE:ROB_BRANCH_WAIT_END; break;}
+			case TYPE_MEMORY : {entry->state=ROB_STORE_WAIT_HEAD_OK; break;}
+			default          : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:ROB_OTHER_WAIT_END; break;}
+			}
+		    }
+		  else
+		    {
+                      // in_INSERT_NO_EXECUTE [x][y] : l.sys, l.trap
+
+		      entry->state = ROB_END_EXCEPTION_WAIT_HEAD;
+		    }
+
+		  _rob[i].push_back(entry);
+
+		  // Update nb_inst
+		  reg_NB_INST_COMMIT_ALL [front_end_id][context_id] ++;
+		  if (type == TYPE_MEMORY)
+		    reg_NB_INST_COMMIT_MEM [front_end_id][context_id] ++;
+
+		  reg_NUM_BANK_TAIL = (reg_NUM_BANK_TAIL+1)%_param->_nb_bank;
+		  reg_BANK_PTR [i]  = (reg_BANK_PTR [i]+1)%_param->_size_bank;
+		}
+	    }
+
+	// ===================================================================
+	// =====[ COMMIT ]====================================================
+	// ===================================================================
+
+#ifdef STATISTICS
+        if (usage_is_set(_usage,USE_STATISTICS))
+          (*_stat_nb_inst_commit_conflit_access) += internal_BANK_COMMIT_CONFLIT_ACCESS;
+#endif
+
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  for (uint32_t j=0; j<_param->_nb_bank_access_commit; j++)
+	    if (internal_BANK_COMMIT_VAL [i][j])
+	      {
+		uint32_t x = internal_BANK_COMMIT_NUM_INST [i][j];
+
+		if (PORT_READ(in_COMMIT_VAL [x]) and PORT_READ(in_COMMIT_WEN [x]))
+		  {
+		    log_printf(TRACE,Commit_unit,FUNCTION,"  * COMMIT            [%d]",x);
+
+#ifdef STATISTICS
+                    if (usage_is_set(_usage,USE_STATISTICS))
+                      (*_stat_nb_inst_commit) ++;
+#endif
+
+// 		    Tpacket_t packet_id = (_param->_have_port_rob_ptr  )?(PORT_READ(in_COMMIT_PACKET_ID [x])&_param->_mask_size_bank):0;
+		    
+		    log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank   : %d",i);
+// 		    log_printf(TRACE,Commit_unit,FUNCTION,"    * packet_id  : %d",(_param->_have_port_rob_ptr  )?(PORT_READ(in_COMMIT_PACKET_ID [x])):0);
+// 		    log_printf(TRACE,Commit_unit,FUNCTION,"    * num_entry  : %d",packet_id);
+		    
+		    // test pandex with ptr_write.
+// 		    Tpacket_t index     = (packet_id<reg_BANK_PTR [i])?(reg_BANK_PTR [i]-packet_id):(_param->_size_bank+reg_BANK_PTR [i]-packet_id);
+
+		    // find the good entry !!!
+		    entry_t *       entry       = internal_BANK_COMMIT_ENTRY [i][j];
+
+		  //Toperation_t    operation   = PORT_READ(in_COMMIT_OPERATION   [x]);
+		  //Ttype_t         type        = PORT_READ(in_COMMIT_TYPE        [x]);
+		    Texception_t    exception   = PORT_READ(in_COMMIT_EXCEPTION   [x]);
+
+		    rob_state_t state        = entry->state;
+		    Tcontext_t  front_end_id = entry->front_end_id;
+		    Tcontext_t  context_id   = entry->context_id;
+
+		    // change state
+		    //  * test if exception : exception and mask
+		    
+		    bool have_exception = false;
+		    
+		    if (exception != EXCEPTION_NONE)
+		      switch (entry->exception_use)
+			{
+			case  EXCEPTION_USE_RANGE                    : {have_exception = ((exception == EXCEPTION_RANGE) and PORT_READ(in_SPR_READ_SR_OVE[front_end_id][context_id])); break;}
+			case  EXCEPTION_USE_MEMORY_WITH_ALIGNMENT    : {have_exception = ((exception == EXCEPTION_BUS_ERROR) or
+											  (exception == EXCEPTION_DATA_TLB ) or
+											  (exception == EXCEPTION_DATA_PAGE) or
+											  (exception == EXCEPTION_ALIGNMENT)); break;};
+			case  EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT : {have_exception = ((exception == EXCEPTION_BUS_ERROR) or
+											  (exception == EXCEPTION_DATA_TLB ) or
+											  (exception == EXCEPTION_DATA_PAGE)); break;};
+			case  EXCEPTION_USE_CUSTOM_0                 : {have_exception = (exception == EXCEPTION_CUSTOM_0); break;}; 
+			case  EXCEPTION_USE_CUSTOM_1                 : {have_exception = (exception == EXCEPTION_CUSTOM_1); break;}; 
+			case  EXCEPTION_USE_CUSTOM_2                 : {have_exception = (exception == EXCEPTION_CUSTOM_2); break;}; 
+			case  EXCEPTION_USE_CUSTOM_3                 : {have_exception = (exception == EXCEPTION_CUSTOM_3); break;}; 
+			case  EXCEPTION_USE_CUSTOM_4                 : {have_exception = (exception == EXCEPTION_CUSTOM_4); break;}; 
+			case  EXCEPTION_USE_CUSTOM_5                 : {have_exception = (exception == EXCEPTION_CUSTOM_5); break;}; 
+			case  EXCEPTION_USE_CUSTOM_6                 : {have_exception = (exception == EXCEPTION_CUSTOM_6); break;}; 
+			case  EXCEPTION_USE_TRAP                     : {have_exception = false; break;};
+			case  EXCEPTION_USE_NONE                     : {have_exception = false; break;}; 
+			case  EXCEPTION_USE_ILLEGAL_INSTRUCTION      : {have_exception = false; break;};
+			case  EXCEPTION_USE_SYSCALL                  : {have_exception = false; break;};
+			default :
+			  {
+			    throw ERRORMORPHEO(FUNCTION,_("Commit : invalid exception_use.\n"));
+			    break;
+			  }
+			}
+
+		    if (not have_exception)
+		      {
+			switch (state)
+			  {
+			  case ROB_OTHER_WAIT_END  : {state = ROB_END_OK_SPECULATIVE; break;}
+			  case ROB_BRANCH_WAIT_END : {state = ROB_BRANCH_COMPLETE   ; break;}
+			  case ROB_MISS_WAIT_END   : {state = ROB_END_KO_SPECULATIVE; break;}
+			  default :
+			    {
+			      throw ERRORMORPHEO(FUNCTION,toString(_("Commit : invalid state value (%s).\n"),toString(state).c_str()));
+			      break;
+			    }
+			  }
+			// can have an exception, but this instruction is not sensible a this exception
+			exception = EXCEPTION_NONE; 
+		      }
+		    else
+		      {
+#ifdef DEBUG_TEST
+			if ((entry->type == TYPE_MEMORY) and (exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE))
+			  throw ERRORMORPHEO(FUNCTION,_("Commit : invalid exception.\n"));
+#endif 
+
+			switch (state)
+			  {
+			  case ROB_OTHER_WAIT_END  : 
+			  case ROB_BRANCH_WAIT_END : {state = ROB_END_EXCEPTION_WAIT_HEAD; break;}
+			  case ROB_MISS_WAIT_END   : {state = ROB_END_KO_SPECULATIVE     ; break;}
+			  default :
+			    {
+			      throw ERRORMORPHEO(FUNCTION,_("Commit : invalid state value.\n"));
+			      break;
+			    }
+			  }
+		      }
+
+		    // update Re Order Buffer
+		    entry->state       = state;
+		    entry->exception   = exception;
+		    entry->flags       = PORT_READ(in_COMMIT_FLAGS       [x]);
+		    entry->no_sequence = PORT_READ(in_COMMIT_NO_SEQUENCE [x]);
+		    entry->data_commit = PORT_READ(in_COMMIT_ADDRESS     [x]);
+		  }
+	      }
+
+	// ===================================================================
+	// =====[ RETIRE ]====================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  if (internal_BANK_RETIRE_VAL [i])
+	    {
+	      uint32_t x = internal_BANK_RETIRE_NUM_RENAME_UNIT [i];
+	      uint32_t y = internal_BANK_RETIRE_NUM_INST        [i];
+
+	      log_printf(TRACE,Commit_unit,FUNCTION,"  * RETIRE            [%d][%d]",x,y);
+
+#ifdef STATISTICS
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*_stat_nb_inst_retire [x]) ++;
+#endif
+
+#ifdef DEBUG_TEST
+	      if (not PORT_READ(in_RETIRE_ACK [x][y]))
+		throw ERRORMORPHEO(FUNCTION,_("Retire : retire_ack must be set.\n"));
+#endif
+
+
+	      entry_t *  entry        =  _rob [i].front();
+	      
+	      Tcontext_t front_end_id = entry->front_end_id;
+	      Tcontext_t context_id   = entry->context_id  ;
+	      Ttype_t    type         = entry->type        ;
+	      
+	      // Update nb_inst
+	      reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --;
+	      if (type == TYPE_MEMORY)
+		reg_NB_INST_COMMIT_MEM [front_end_id][context_id] --;
+	      
+	      reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank;
+	      
+	      _rob [i].pop_front();
+	      delete entry;
+	    }
+
+	// ===================================================================
+	// =====[ REEXECUTE ]=================================================
+	// ===================================================================
+	if (internal_REEXECUTE_VAL [0] and PORT_READ(in_REEXECUTE_ACK [0]))
+	  {
+	    uint32_t num_bank = internal_REEXECUTE_NUM_BANK [0];
+
+	    entry_t    * entry = _rob [num_bank].front();
+	    rob_state_t  state = entry->state;
+
+	    switch (state)
+	      {
+	      case ROB_STORE_HEAD_OK : {state = ROB_OTHER_WAIT_END; break; }
+	      case ROB_STORE_HEAD_KO : {state = ROB_MISS_WAIT_END ; break; }
+	      default : {throw ERRORMORPHEO(FUNCTION,_("Reexecute : invalid state value.\n"));}
+	      }
+
+	    entry->state = state;
+	  }
+
+	// ===================================================================
+	// =====[ BRANCH_COMPLETE ]===========================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+	  if (internal_BRANCH_COMPLETE_VAL [i] and PORT_READ(in_BRANCH_COMPLETE_ACK [i]))
+	    {
+	      uint32_t num_bank = internal_BRANCH_COMPLETE_NUM_BANK [i];
+	      
+	      entry_t   * entry = _rob [num_bank].front();
+
+#ifdef DEBUG_TEST
+	      rob_state_t  state = entry->state;
+	      if (state != ROB_BRANCH_COMPLETE)
+		throw ERRORMORPHEO(FUNCTION,_("Branch_complete : Invalid state value.\n"));
+#endif
+
+	      entry->state = ROB_END_OK_SPECULATIVE;
+	    }
+
+	// ===================================================================
+	// =====[ EVENT ]=====================================================
+	// ===================================================================
+
+	// ===================================================================
+	// =====[ DEPTH - HEAD ]==============================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  if (not _rob[i].empty())
+	    {
+	      // Scan all instruction in windows and test if instruction is speculative
+	      entry_t    * entry        = _rob [i].front();
+	      
+	      Tcontext_t   front_end_id = entry->front_end_id;
+	      Tcontext_t   context_id   = entry->context_id  ;
+	      rob_state_t  state        = entry->state;
+	      Tdepth_t     depth        = entry->depth;
+
+              Tdepth_t     depth_min    = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [front_end_id][context_id]):0;
+              Tdepth_t     depth_max    = PORT_READ(in_DEPTH_MAX[front_end_id][context_id]);
+              
+              // is a valid instruction ?
+              // If DEPTH_CURRENT :
+              // equal at     DEPTH_MIN            -> not speculative
+              // not include ]DEPTH_MIN:DEPTH_MAX[ -> previous branch miss
+              //     include ]DEPTH_MIN:DEPTH_MAX[ -> speculative
+              
+              // All case
+              // ....... min ...X... max ....... OK
+              // ....... min ....... max ...X... KO
+              // ...X... min ....... max ....... KO
+              // ....... max ....... min ...X... OK
+              // ...X... max ....... min ....... OK
+              // ....... max ...X... min ....... KO
+              
+              Tcontrol_t   is_valid      = ((depth == depth_min) or 
+                                            ((depth_min < depth_max)?
+                                             (depth<depth_max):
+                                             ((depth > depth_min) or (depth < depth_max))));
+	      
+	      //------------------------------------------------------
+	      // test if instruction is miss speculative
+	      //------------------------------------------------------
+	      if (not is_valid)
+		{
+		  switch (state)
+		    {
+		    case ROB_BRANCH_WAIT_END           : {state = ROB_MISS_WAIT_END; break;}
+		    case ROB_BRANCH_COMPLETE           : {state = ROB_END_MISS     ; break;}
+		    case ROB_STORE_WAIT_HEAD_OK        : {state = ROB_STORE_HEAD_KO; break;}
+		  //case ROB_STORE_WAIT_HEAD_KO        : {state = ; break;}
+		    case ROB_OTHER_WAIT_END            : {state = ROB_MISS_WAIT_END; break;}
+		    case ROB_END_OK_SPECULATIVE        : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_KO_SPECULATIVE        : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_EXCEPTION_WAIT_HEAD   : {state = ROB_END_MISS     ; break;}
+		      
+		      // don't change
+		    case ROB_STORE_HEAD_KO             : {break;}
+		    case ROB_MISS_WAIT_END             : {break;}
+		    case ROB_END_MISS                  : {break;}
+		      
+		      // can't have miss speculation
+		    case ROB_STORE_HEAD_OK             :
+		    case ROB_END_OK                    :
+		    case ROB_END_KO                    :
+		    case ROB_END_EXCEPTION             :
+		    default                            : 
+		      {
+			throw ERRORMORPHEO(FUNCTION,_("Miss Speculation : Invalide state.\n"));
+			break;
+		      }
+		    }
+		}
+	      
+	      //------------------------------------------------------
+	      // test if instruction is not speculative
+	      //------------------------------------------------------
+	      if (entry->depth == depth_min)
+		{
+		  switch (state)
+		    {
+		    case ROB_END_OK_SPECULATIVE        : {state = ROB_END_OK                 ; break;}
+		    case ROB_END_KO_SPECULATIVE        : {state = ROB_END_KO                 ; break;}
+		    default : {break;}
+		  }
+		}
+	      
+	      //------------------------------------------------------
+	      // test if instruction is store and head
+	      //------------------------------------------------------
+	      if (i == reg_NUM_BANK_HEAD)
+		{
+		  switch (state)
+		    {
+		    case ROB_STORE_WAIT_HEAD_OK      : {state = ROB_STORE_HEAD_OK; break;}
+		    case ROB_END_EXCEPTION_WAIT_HEAD : {state = ROB_END_EXCEPTION; break;}
+		    default : {break;}
+		    }
+		}
+	      
+	      entry->state = state;
+	    }
+      }
+
+    // ===================================================================
+    // =====[ OTHER ]=====================================================
+    // ===================================================================
+
+    log_printf(TRACE,Commit_unit,FUNCTION,"  * Dump ROB (Re-Order-Buffer)");
+    log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank_head : %d",reg_NUM_BANK_HEAD);
+    log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank_tail : %d",reg_NUM_BANK_TAIL);
+
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+	log_printf(TRACE,Commit_unit,FUNCTION,"    * num_inst[%d][%d] all : %d, mem : %d",i,j,reg_NB_INST_COMMIT_ALL[i][j],reg_NB_INST_COMMIT_MEM[i][j]);
+	
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+        log_printf(TRACE,Commit_unit,FUNCTION,"    * Bank[%d] size : %d, ptr : %d",i,(int)_rob[i].size(), reg_BANK_PTR [i]);
+
+#ifdef STATISTICS
+        if (usage_is_set(_usage,USE_STATISTICS))
+          *(_stat_bank_nb_inst [i]) += _rob[i].size();
+#endif
+
+	uint32_t x=0;
+	for (std::list<entry_t*>::iterator it=_rob[i].begin();
+	     it!=_rob[i].end();
+	     it++)
+	  {
+            log_printf(TRACE,Commit_unit,FUNCTION,"      [%d] %.8x (%.8x) %s - ptr : %d",
+                       x,
+                       (*it)->address,
+                       (*it)->address<<2,
+                       toString((*it)->state).c_str(),
+                       (*it)->ptr);
+	    x++;
+	  }
+      }
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl.cpp	(revision 88)
@@ -0,0 +1,48 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::vhdl"
+  void Commit_unit::vhdl (void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl_body.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl_body.cpp	(revision 88)
@@ -0,0 +1,35 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::vhdl_body"
+  void Commit_unit::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    vhdl->set_body ("");
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl_declaration.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_vhdl_declaration.cpp	(revision 88)
@@ -0,0 +1,34 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::vhdl_declaration"
+  void Commit_unit::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,146 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h"
+#include "Common/include/Max.h"
+#include "Common/include/BitManipulation.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::Parameters"
+  Parameters::Parameters (uint32_t            nb_front_end            ,
+			  uint32_t          * nb_context              ,
+			  uint32_t            nb_rename_unit          ,
+			  uint32_t            size_queue              ,
+			  uint32_t            nb_bank                 ,
+			  uint32_t          * nb_inst_insert          ,
+			  uint32_t          * nb_inst_retire          ,
+			  uint32_t            nb_inst_commit          ,
+			  uint32_t            nb_inst_reexecute       ,
+			  uint32_t            nb_inst_branch_complete ,
+			  uint32_t         ** nb_branch_speculated    ,
+			  uint32_t            size_general_data       ,
+			  uint32_t            size_store_queue_ptr    ,
+			  uint32_t            size_load_queue_ptr     ,
+			  uint32_t            size_general_register   ,
+			  uint32_t            size_special_register   ,
+			  Tpriority_t         priority                ,
+			  Tload_balancing_t   load_balancing          ,
+			  uint32_t            nb_rename_unit_select   ,
+                          bool                is_toplevel):
+    _nb_bank_access_commit (1              ),
+    _retire_ooo            (RETIRE_IN_ORDER)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    _nb_front_end             = nb_front_end           ;
+    _nb_context               = nb_context             ;
+    _nb_rename_unit           = nb_rename_unit         ;
+    _size_queue               = size_queue             ;
+    _nb_bank                  = nb_bank                ;
+    _nb_inst_insert           = nb_inst_insert         ;
+    _nb_inst_retire           = nb_inst_retire         ;
+    _nb_inst_commit           = nb_inst_commit         ;
+    _nb_inst_reexecute        = nb_inst_reexecute      ;
+    _nb_inst_branch_complete  = nb_inst_branch_complete;
+    _nb_branch_speculated     = nb_branch_speculated   ;
+    _priority                 = priority               ;
+    _load_balancing           = load_balancing         ;
+    _nb_rename_unit_select    = nb_rename_unit_select  ;
+
+    _size_rename_unit_id      = log2(_nb_rename_unit);
+    _max_nb_context           = max<uint32_t>(_nb_context,_nb_front_end);
+    _max_nb_inst_insert       = max<uint32_t>(_nb_inst_insert,_nb_rename_unit);
+    _max_nb_inst_retire       = max<uint32_t>(_nb_inst_retire,_nb_rename_unit);
+    _size_bank                = _size_queue/_nb_bank;
+    _shift_num_bank           = log2(_size_bank);
+    _mask_size_bank           = gen_mask<Tpacket_t>(log2(_size_bank));
+
+    _have_port_rename_unit_id = _size_rename_unit_id > 0;
+
+    _array_size_depth               = new uint32_t * [_nb_front_end];
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      {
+	_array_size_depth      [i]      = new uint32_t [_nb_context [i]];
+	for (uint32_t j=0; j<_nb_context [i]; j++)
+          _array_size_depth      [i][j] = (_nb_branch_speculated [i][j] == 0)?0:log2(_nb_branch_speculated [i][j]);
+      }
+
+    test();
+
+    if (is_toplevel)
+      {
+        _size_front_end_id        = log2(_nb_front_end);
+        _size_context_id          = log2(_max_nb_context);
+        _size_rob_ptr             = log2(_nb_bank)+log2(_size_bank);
+        _size_instruction_address = size_general_data-2;
+        _size_store_queue_ptr     = size_store_queue_ptr   ;
+        _size_load_queue_ptr      = size_load_queue_ptr    ;
+        _size_general_data        = size_general_data      ;
+        _size_general_register    = size_general_register  ;
+        _size_special_register    = size_special_register  ;
+        _size_depth               = max<uint32_t>(_array_size_depth,_nb_front_end,_nb_context);
+        _size_nb_inst_commit      = log2(_size_queue)+1;
+        
+        _have_port_front_end_id   = _size_front_end_id   > 0;
+        _have_port_context_id     = _size_context_id     > 0;
+        _have_port_rob_ptr        = _size_rob_ptr        > 0;
+        _have_port_load_queue_ptr = _size_load_queue_ptr > 0;
+        _have_port_depth          = _size_depth          > 0;
+	
+        copy();
+      }
+
+    log_end(Commit_unit,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Commit_unit::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Commit_unit,FUNCTION);
+//     test();
+//     log_end(Commit_unit,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      {
+	delete [] _array_size_depth [i];
+      }
+    delete [] _array_size_depth;
+
+    log_end(Commit_unit,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(Commit_unit,FUNCTION);
+    log_end(Commit_unit,FUNCTION);
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,61 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    Parameters_test test ("Commit_unit");
+
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      if (_nb_bank < _nb_inst_insert [i])
+	test.error (toString(_("For the nb_rename_unit[%d] : nb_bank must be >= nb_inst_insert.\n"),i));
+    
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      if (_nb_bank < _nb_inst_retire [i])
+	test.error (toString(_("For the nb_rename_unit[%d] : nb_bank must be >= nb_inst_retire.\n"),i));
+    
+    if (_nb_rename_unit_select > _nb_rename_unit)
+      test.error("nb_rename_unit must be >= nb_rename_unit_select.\n");
+
+    if (not is_multiple(_size_queue, _nb_bank))
+      test.error("nb_bank must be a multiple of size_queue.\n");
+
+    if (_nb_inst_reexecute != 1)
+      test.error("nb_inst_reexecute must be set at 1. Anothers value is unsupported.\n");
+
+    if (_size_queue == 1)
+      test.information ("Instructions are issued In-Order.\n");
+    else
+      test.information ("Instructions are issued Out-Of-Order.\n");
+
+    log_end(Commit_unit,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,135 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace commit_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    std::string str = "";
+    
+    str += toString(MSG_INFORMATION)+"  * nb_front_end            : "+toString<uint32_t         >(_nb_front_end           )+"\n";
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    str += toString(MSG_INFORMATION)+"  * nb_context                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_context [i])+"\n";//[nb_front_end]
+    str += toString(MSG_INFORMATION)+"  * nb_rename_unit          : "+toString<uint32_t         >(_nb_rename_unit         )+"\n";
+    str += toString(MSG_INFORMATION)+"  * size_queue              : "+toString<uint32_t         >(_size_queue             )+"\n";
+    str += toString(MSG_INFORMATION)+"  * nb_bank                 : "+toString<uint32_t         >(_nb_bank                )+"\n";
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str += toString(MSG_INFORMATION)+"  * nb_inst_insert            ["+toString(i)+"] : "+toString<uint32_t         >(_nb_inst_insert[i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str += toString(MSG_INFORMATION)+"  * nb_inst_retire            ["+toString(i)+"] : "+toString<uint32_t         >(_nb_inst_retire[i])+"\n";//[nb_rename_unit]
+    str += toString(MSG_INFORMATION)+"  * nb_inst_commit          : "+toString<uint32_t         >(_nb_inst_commit         )+"\n";
+    str += toString(MSG_INFORMATION)+"  * nb_inst_reexecute       : "+toString<uint32_t         >(_nb_inst_reexecute      )+"\n";
+    str += toString(MSG_INFORMATION)+"  * nb_inst_branch_complete : "+toString<uint32_t         >(_nb_inst_branch_complete)+"\n";
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    for (uint32_t j=0; j<_nb_context[i]; ++j)
+    str += toString(MSG_INFORMATION)+"  * nb_branch_speculated      ["+toString(i)+"]["+toString(j)+"] : "+toString<uint32_t         >(_nb_branch_speculated[i][j])+"\n";//[nb_front_end][nb_context]
+    str += toString(MSG_INFORMATION)+"  * size_general_data       : "+toString<uint32_t         >(_size_general_data      )+"\n";
+    str += toString(MSG_INFORMATION)+"  * size_store_queue_ptr    : "+toString<uint32_t         >(_size_store_queue_ptr   )+"\n";
+    str += toString(MSG_INFORMATION)+"  * size_load_queue_ptr     : "+toString<uint32_t         >(_size_load_queue_ptr    )+"\n";
+    str += toString(MSG_INFORMATION)+"  * size_general_register   : "+toString<uint32_t         >(_size_general_register  )+"\n";
+    str += toString(MSG_INFORMATION)+"  * size_special_register   : "+toString<uint32_t         >(_size_special_register  )+"\n";
+    str += toString(MSG_INFORMATION)+"  * priority                : "+toString<Tpriority_t      >(_priority               )+"\n";
+    str += toString(MSG_INFORMATION)+"  * load_balancing          : "+toString<Tload_balancing_t>(_load_balancing         )+"\n";
+    str += toString(MSG_INFORMATION)+"  * nb_rename_unit_select   : "+toString<uint32_t         >(_nb_rename_unit_select  )+"\n";
+    str += toString(MSG_INFORMATION)+"  * nb_bank_access_commit   : "+toString<uint32_t         >(_nb_bank_access_commit  )+"\n";
+    str += toString(MSG_INFORMATION)+"  * retire_ooo              : "+toString<retire_ooo_t     >(_retire_ooo             )+"\n";
+
+    /*
+    XML xml ("commit_unit");
+
+    xml.balise_open("commit_unit");
+    xml.singleton_begin("nb_front_end           "); xml.attribut("value",toString(_nb_front_end           )); xml.singleton_end();
+    xml.singleton_begin("nb_rename_unit         "); xml.attribut("value",toString(_nb_rename_unit         )); xml.singleton_end();
+    xml.singleton_begin("size_queue             "); xml.attribut("value",toString(_size_queue             )); xml.singleton_end();
+    xml.singleton_begin("nb_bank                "); xml.attribut("value",toString(_nb_bank                )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_reexecute      "); xml.attribut("value",toString(_nb_inst_reexecute      )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_branch_complete"); xml.attribut("value",toString(_nb_inst_branch_complete)); xml.singleton_end();
+    xml.singleton_begin("nb_inst_commit         "); xml.attribut("value",toString(_nb_inst_commit         )); xml.singleton_end();
+    xml.singleton_begin("size_general_data      "); xml.attribut("value",toString(_size_general_data      )); xml.singleton_end();
+    xml.singleton_begin("size_store_queue_ptr   "); xml.attribut("value",toString(_size_store_queue_ptr   )); xml.singleton_end();
+    xml.singleton_begin("size_load_queue_ptr    "); xml.attribut("value",toString(_size_load_queue_ptr    )); xml.singleton_end();
+    xml.singleton_begin("size_general_register  "); xml.attribut("value",toString(_size_general_register  )); xml.singleton_end();
+    xml.singleton_begin("size_special_register  "); xml.attribut("value",toString(_size_special_register  )); xml.singleton_end();
+    xml.singleton_begin("priority               "); xml.attribut("value",toString(_priority               )); xml.singleton_end();
+    xml.singleton_begin("load_balancing         "); xml.attribut("value",toString(_load_balancing         )); xml.singleton_end();
+    xml.singleton_begin("nb_rename_unit_select  "); xml.attribut("value",toString(_nb_rename_unit_select  )); xml.singleton_end();
+
+    for (uint32_t i=0;i<_nb_front_end; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","front_end");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.singleton_begin("nb_context             "); xml.attribut("value",toString(_nb_context             [i])); xml.singleton_end();
+
+        for (uint32_t j=0;j<_nb_context [i]; j++)
+          {
+            xml. balise_open_begin("component");
+            xml.  attribut("type","context");
+            xml.  attribut("id"  ,toString(j));
+            xml. balise_open_end();
+            xml.singleton_begin("nb_branch_speculated   "); xml.attribut("value",toString(_nb_branch_speculated   [i][j])); xml.singleton_end();
+            xml. balise_close();
+          }
+
+        xml. balise_close();
+      }
+
+    for (uint32_t i=0;i<_nb_rename_unit; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","rename_unit");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.singleton_begin("nb_inst_insert         "); xml.attribut("value",toString(_nb_inst_insert         [i])); xml.singleton_end();
+        xml.singleton_begin("nb_inst_retire         "); xml.attribut("value",toString(_nb_inst_retire         [i])); xml.singleton_end();
+        xml. balise_close();
+      }
+
+    xml.balise_close();
+    */
+    log_end(Commit_unit,FUNCTION);
+    
+
+//     return xml.get_body(depth);
+    return str;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Commit_unit::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+                            morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters & x)
+  {
+    log_begin(Commit_unit,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Commit_unit,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace commit_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libIssue_queue.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.deps	(revision 88)
@@ -0,0 +1,45 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Issue_queue			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Priority
+include 			$(DIR_MORPHEO)/Behavioural/Generic/Priority/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Issue_queue_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue
+
+#-----[ Library ]------------------------------------------
+
+Issue_queue_LIBRARY		= 	-lIssue_queue			\
+					$(Priority_LIBRARY)		\
+					$(Behavioural_LIBRARY)	
+
+Issue_queue_DIR_LIBRARY		=	-L$(Issue_queue_DIR)/lib	\
+					$(Priority_DIR_LIBRARY)		\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Issue_queue_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) Priority_library;		\
+				$(MAKE) --directory=$(Issue_queue_DIR) --makefile=Makefile;
+
+Issue_queue_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) Priority_library_clean;		\
+				$(MAKE) --directory=$(Issue_queue_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Issue_queue_LIBRARY)
+
+DIR_LIBRARY			= $(Issue_queue_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Issue_queue_library
+
+library_clean			: Issue_queue_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg	(revision 88)
@@ -0,0 +1,32 @@
+Issue_queue
+1	1	*2	# nb_context              
+1	1	*2	# nb_front_end            
+1	1	*2	# nb_rename_unit          
+1	1	*2	# size_queue              
+1	1	*2	# nb_bank                 
+0	0	*2	# size_packet             
+32	32	*2	# size_general_data       
+2	2	*2	# size_special_data       
+5	5	*2	# size_general_register   
+2	2	*2	# size_special_register   
+1	1	*2	# size_store_queue_ptr    
+0	0	*2	# size_load_queue_ptr     
+1	1	*2	# nb_inst_issue           
+1	1	*2	# nb_inst_rename         [0]               [nb_rename_unit]
+1	1	*2	# nb_inst_reexecute       
+1	1	*2	# nb_rename_unit_select   
+1	1	*2	# priority                
+1	1	*2	# load_balancing          
+1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg	(revision 88)
@@ -0,0 +1,45 @@
+Issue_queue
+4	4	*2	# nb_context              
+4	4	*2	# nb_front_end            
+1	1	*2	# nb_rename_unit          
+16	32	*2	# size_queue              
+4	16	*2	# nb_bank                 
+0	0	*2	# size_packet             
+32	32	*2	# size_general_data       
+2	2	*2	# size_special_data       
+5	5	*2	# size_general_register   
+2	2	*2	# size_special_register   
+1	1	*2	# size_store_queue_ptr    
+0	0	*2	# size_load_queue_ptr     
+2	2	*4	# nb_inst_issue           
+1	4	*4	# nb_inst_rename         [0]               [nb_rename_unit]
+1	4	*4	# nb_inst_reexecute       
+1	1	*2	# nb_rename_unit_select   
+1	1	*2	# priority                
+1	1	*2	# load_balancing          
+1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [0][1]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_DIV    ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [1][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+0	0	+1	# table_issue_type       [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg	(revision 88)
@@ -0,0 +1,86 @@
+Issue_queue
+4	4	*2	# nb_context              
+4	4	*2	# nb_front_end            
+4	4	*2	# nb_rename_unit          
+64	64	*2	# size_queue              
+4	16	*2	# nb_bank                 
+0	0	*2	# size_packet             
+32	32	*2	# size_general_data       
+2	2	*2	# size_special_data       
+5	5	*2	# size_general_register   
+2	2	*2	# size_special_register   
+1	1	*2	# size_store_queue_ptr    
+0	0	*2	# size_load_queue_ptr     
+4	4	*4	# nb_inst_issue           
+4	4	*4	# nb_inst_rename         [0]               [nb_rename_unit]
+1	1	*4	# nb_inst_rename         [1]               [nb_rename_unit]
+2	2	*4	# nb_inst_rename         [2]               [nb_rename_unit]
+8	8	*4	# nb_inst_rename         [3]               [nb_rename_unit]
+4	4	*4	# nb_inst_reexecute       
+1	4	+1	# nb_rename_unit_select   
+1	1	*2	# priority                
+1	1	*2	# load_balancing          
+1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [0][1]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [0][2]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [0][3]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [1][0]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [1][1]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [1][2]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [1][3]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [2][0]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [2][1]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [2][2]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [2][3]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [3][0]            [nb_rename_unit][nb_inst_issue]
+0	0	+1	# table_routing          [3][1]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [3][2]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_routing          [3][3]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [2][TYPE_MEMORY ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type       [3][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,30 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  1024
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,180 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h"
+
+#define NB_PARAMS 17
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_context                                            (uint32_t         )\n"));
+  err (_(" * nb_front_end                                          (uint32_t         )\n"));
+  err (_(" * nb_rename_unit                                        (uint32_t         )\n"));
+  err (_(" * size_queue                                            (uint32_t         )\n"));
+  err (_(" * nb_bank                                               (uint32_t         )\n"));
+  err (_(" * size_packet                                           (uint32_t         )\n"));
+  err (_(" * size_general_data                                     (uint32_t         )\n"));
+  err (_(" * size_special_data                                     (uint32_t         )\n"));
+  err (_(" * size_general_register                                 (uint32_t         )\n"));
+  err (_(" * size_special_register                                 (uint32_t         )\n"));
+  err (_(" * size_store_queue_ptr                                  (uint32_t         )\n"));
+  err (_(" * size_load_queue_ptr                                   (uint32_t         )\n"));
+  err (_(" * nb_inst_issue                                         (uint32_t         )\n"));
+  err (_(" * nb_inst_rename        [nb_rename_unit]                (uint32_t         )\n"));
+  err (_(" * nb_inst_reexecute                                     (uint32_t         )\n"));
+  err (_(" * nb_rename_unit_select                                 (uint32_t         )\n"));
+  err (_(" * priority                                              (Tpriority_t      )\n"));
+  err (_(" * load_balancing                                        (Tload_balancing_t)\n"));
+  err (_(" * table_routing         [nb_rename_unit][nb_inst_issue] (bool             )\n"));
+  err (_(" * table_routing         [nb_inst_issue][nb_type]        (bool             )\n"));
+  err (_("   * TYPE_ALU    \n"));
+  err (_("   * TYPE_SHIFT  \n"));
+  err (_("   * TYPE_MOVE   \n"));
+  err (_("   * TYPE_TEST   \n"));
+  err (_("   * TYPE_MUL    \n"));
+  err (_("   * TYPE_DIV    \n"));
+  err (_("   * TYPE_EXTEND \n"));
+  err (_("   * TYPE_FIND   \n"));
+  err (_("   * TYPE_SPECIAL\n"));
+  err (_("   * TYPE_CUSTOM \n"));
+  err (_("   * TYPE_BRANCH \n"));
+  err (_("   * TYPE_MEMORY \n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t          _nb_context             = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _nb_front_end           = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _nb_rename_unit         = fromString<uint32_t         >(argv[x++]);
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+_nb_rename_unit))
+    usage (argc, argv);
+
+  uint32_t          _size_queue             = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _nb_bank                = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_packet            = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_general_data      = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_special_data      = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_general_register  = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_special_register  = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_store_queue_ptr   = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _size_load_queue_ptr    = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _nb_inst_issue          = fromString<uint32_t         >(argv[x++]);
+  uint32_t        * _nb_inst_rename         = new uint32_t [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_inst_rename [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t          _nb_inst_reexecute      = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _nb_rename_unit_select  = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t       _priority               = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t _load_balancing         = fromString<Tload_balancing_t>(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue))
+    usage (argc, argv);
+
+  bool           ** _table_routing          = new bool * [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    {
+      _table_routing [i] = new bool [_nb_inst_issue];
+      for (uint32_t j=0; j<_nb_inst_issue; j++)
+	_table_routing [i][j] = fromString<bool>(argv[x++]);
+    }
+
+  bool           ** _table_issue_type          = new bool * [_nb_inst_issue];
+  for (uint32_t i=0; i<_nb_inst_issue; i++)
+    {
+      _table_issue_type [i] = new bool [_nb_inst_issue];
+
+      _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+    }
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters
+	(_nb_context            ,
+	 _nb_front_end          ,
+	 _nb_rename_unit        ,
+	 _size_queue            ,
+	 _nb_bank               ,
+	 _size_packet           ,
+	 _size_general_data     ,
+	 _size_special_data     ,
+	 _size_general_register ,
+	 _size_special_register ,
+	 _size_store_queue_ptr  ,
+	 _size_load_queue_ptr   ,
+	 _nb_inst_issue         ,
+	 _nb_inst_rename        ,
+	 _nb_inst_reexecute     ,
+	 _nb_rename_unit_select ,
+	 _priority              ,
+	 _load_balancing        ,
+	 _table_routing         ,
+	 _table_issue_type      ,
+         true // is_toplevel
+         );
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+  
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("Issue_queue : no error");
+      else
+	TEST_KO("Issue_queue : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  delete [] _nb_inst_rename;
+
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    delete [] _table_routing [i];
+  delete [] _table_routing   ;
+  for (uint32_t i=0; i<_nb_inst_issue; i++)
+    delete [] _table_issue_type [i];
+  delete [] _table_issue_type;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,425 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+#include <set>
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Issue_queue * _Issue_queue = new Issue_queue 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_VAL                   ," in_ISSUE_IN_VAL                   ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL(out_ISSUE_IN_ACK                   ,"out_ISSUE_IN_ACK                   ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_CONTEXT_ID            ," in_ISSUE_IN_CONTEXT_ID            ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_FRONT_END_ID          ," in_ISSUE_IN_FRONT_END_ID          ",Tcontext_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_PACKET_ID             ," in_ISSUE_IN_PACKET_ID             ",Tpacket_t         ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_OPERATION             ," in_ISSUE_IN_OPERATION             ",Toperation_t      ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_TYPE                  ," in_ISSUE_IN_TYPE                  ",Ttype_t           ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ," in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ," in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ",Tlsq_ptr_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_HAS_IMMEDIAT          ," in_ISSUE_IN_HAS_IMMEDIAT          ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_IMMEDIAT              ," in_ISSUE_IN_IMMEDIAT              ",Tgeneral_data_t   ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_READ_RA               ," in_ISSUE_IN_READ_RA               ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RA            ," in_ISSUE_IN_NUM_REG_RA            ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_READ_RB               ," in_ISSUE_IN_READ_RB               ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RB            ," in_ISSUE_IN_NUM_REG_RB            ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_READ_RC               ," in_ISSUE_IN_READ_RC               ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RC            ," in_ISSUE_IN_NUM_REG_RC            ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_WRITE_RD              ," in_ISSUE_IN_WRITE_RD              ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RD            ," in_ISSUE_IN_NUM_REG_RD            ",Tgeneral_address_t,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_WRITE_RE              ," in_ISSUE_IN_WRITE_RE              ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RE            ," in_ISSUE_IN_NUM_REG_RE            ",Tspecial_address_t,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_VAL                  ," in_REEXECUTE_VAL                  ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_ACK                  ,"out_REEXECUTE_ACK                  ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_CONTEXT_ID           ," in_REEXECUTE_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_FRONT_END_ID         ," in_REEXECUTE_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_PACKET_ID            ," in_REEXECUTE_PACKET_ID            ",Tpacket_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_OPERATION            ," in_REEXECUTE_OPERATION            ",Toperation_t      ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_TYPE                 ," in_REEXECUTE_TYPE                 ",Ttype_t           ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_WRITE," in_REEXECUTE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ," in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_HAS_IMMEDIAT         ," in_REEXECUTE_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_IMMEDIAT             ," in_REEXECUTE_IMMEDIAT             ",Tgeneral_data_t   ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_READ_RA              ," in_REEXECUTE_READ_RA              ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RA           ," in_REEXECUTE_NUM_REG_RA           ",Tgeneral_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_READ_RB              ," in_REEXECUTE_READ_RB              ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RB           ," in_REEXECUTE_NUM_REG_RB           ",Tgeneral_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_READ_RC              ," in_REEXECUTE_READ_RC              ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RC           ," in_REEXECUTE_NUM_REG_RC           ",Tspecial_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_WRITE_RD             ," in_REEXECUTE_WRITE_RD             ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RD           ," in_REEXECUTE_NUM_REG_RD           ",Tgeneral_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_WRITE_RE             ," in_REEXECUTE_WRITE_RE             ",Tcontrol_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RE           ," in_REEXECUTE_NUM_REG_RE           ",Tspecial_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_VAL                  ,"out_ISSUE_OUT_VAL                  ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL( in_ISSUE_OUT_ACK                  ," in_ISSUE_OUT_ACK                  ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_CONTEXT_ID           ,"out_ISSUE_OUT_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_FRONT_END_ID         ,"out_ISSUE_OUT_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_PACKET_ID            ,"out_ISSUE_OUT_PACKET_ID            ",Tpacket_t         ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_OPERATION            ,"out_ISSUE_OUT_OPERATION            ",Toperation_t      ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_TYPE                 ,"out_ISSUE_OUT_TYPE                 ",Ttype_t           ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,"out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,"out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_HAS_IMMEDIAT         ,"out_ISSUE_OUT_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_IMMEDIAT             ,"out_ISSUE_OUT_IMMEDIAT             ",Tgeneral_data_t   ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_READ_RA              ,"out_ISSUE_OUT_READ_RA              ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RA           ,"out_ISSUE_OUT_NUM_REG_RA           ",Tgeneral_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_READ_RB              ,"out_ISSUE_OUT_READ_RB              ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RB           ,"out_ISSUE_OUT_NUM_REG_RB           ",Tgeneral_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_READ_RC              ,"out_ISSUE_OUT_READ_RC              ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RC           ,"out_ISSUE_OUT_NUM_REG_RC           ",Tspecial_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_WRITE_RD             ,"out_ISSUE_OUT_WRITE_RD             ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RD           ,"out_ISSUE_OUT_NUM_REG_RD           ",Tgeneral_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_WRITE_RE             ,"out_ISSUE_OUT_WRITE_RE             ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RE           ,"out_ISSUE_OUT_NUM_REG_RE           ",Tspecial_address_t,_param->_nb_inst_issue);
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Issue_queue.\n"),name.c_str());
+
+  (*(_Issue_queue->in_CLOCK))        (*(in_CLOCK));
+  (*(_Issue_queue->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_VAL                   ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue,out_ISSUE_IN_ACK                   ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_CONTEXT_ID            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_FRONT_END_ID          ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_PACKET_ID             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_OPERATION             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_TYPE                  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_HAS_IMMEDIAT          ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_IMMEDIAT              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_READ_RA               ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_NUM_REG_RA            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_READ_RB               ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_NUM_REG_RB            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_READ_RC               ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_NUM_REG_RC            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_WRITE_RD              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_NUM_REG_RD            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_WRITE_RE              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_NUM_REG_RE            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_VAL                  ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_REEXECUTE_ACK                  ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_CONTEXT_ID           ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_FRONT_END_ID         ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_PACKET_ID            ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_OPERATION            ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_TYPE                 ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_HAS_IMMEDIAT         ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_IMMEDIAT             ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_READ_RA              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_NUM_REG_RA           ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_READ_RB              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_NUM_REG_RB           ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_READ_RC              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_NUM_REG_RC           ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_WRITE_RD             ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_NUM_REG_RD           ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_WRITE_RE             ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_NUM_REG_RE           ,_param->_nb_inst_reexecute);
+
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_VAL                  ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue, in_ISSUE_OUT_ACK                  ,_param->_nb_inst_issue);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_CONTEXT_ID           ,_param->_nb_inst_issue);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_FRONT_END_ID         ,_param->_nb_inst_issue);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_PACKET_ID            ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_OPERATION            ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_TYPE                 ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_HAS_IMMEDIAT         ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_IMMEDIAT             ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_READ_RA              ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_NUM_REG_RA           ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_READ_RB              ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_NUM_REG_RB           ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_READ_RC              ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_NUM_REG_RC           ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_WRITE_RD             ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_NUM_REG_RD           ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_WRITE_RE             ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_NUM_REG_RE           ,_param->_nb_inst_issue);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  // Initialisation
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  LABEL("Initialisation");
+
+  const  int32_t percent_transaction_reexecute = 35;
+  const  int32_t percent_transaction_issue_in  = 65;
+  const  int32_t percent_transaction_issue_out = 87;
+
+  #define NB_TYPE 12
+
+  Ttype_t tab_type [] = {TYPE_ALU    ,
+			 TYPE_SHIFT  ,
+			 TYPE_MOVE   ,
+			 TYPE_TEST   ,
+			 TYPE_MUL    ,
+			 TYPE_DIV    ,
+			 TYPE_EXTEND ,
+			 TYPE_FIND   ,
+			 TYPE_SPECIAL,
+			 TYPE_CUSTOM ,
+			 TYPE_BRANCH ,
+			 TYPE_MEMORY };
+
+  set<Tgeneral_data_t> issue_queue;
+
+  Tgeneral_data_t reexecute_immediat = 0xbeef;
+  Tgeneral_data_t reexecute_tab_immediat [_param->_nb_inst_reexecute];
+  for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+    reexecute_tab_immediat [i] = reexecute_immediat++;
+
+  Tgeneral_data_t   issue_in_immediat = 0x1981;
+  Tgeneral_data_t   issue_in_tab_immediat  [_param->_nb_rename_unit][_param->_max_nb_inst_rename];
+  for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+    for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+      issue_in_tab_immediat [i][j] = issue_in_immediat ++;
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	{
+	  in_REEXECUTE_VAL      [i]->write((rand()%100)<percent_transaction_reexecute);
+	  Tgeneral_data_t imm = reexecute_tab_immediat [i];
+	  in_REEXECUTE_IMMEDIAT [i]->write((imm<<1)|1);
+	  in_REEXECUTE_TYPE     [i]->write(tab_type[imm%NB_TYPE]);
+	}
+
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+	  {
+	    in_ISSUE_IN_VAL      [i][j]->write((rand()%100)<percent_transaction_issue_in);
+	    Tgeneral_data_t imm = issue_in_tab_immediat [i][j];
+	    in_ISSUE_IN_IMMEDIAT [i][j]->write((imm<<1)|1);
+	    in_ISSUE_IN_TYPE     [i][j]->write(tab_type[imm%NB_TYPE]);
+	  }
+
+      for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+	{
+	  in_ISSUE_OUT_ACK      [i]->write((rand()%100)<percent_transaction_issue_out);
+	}
+
+      SC_START(0);
+
+      for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+	if (out_ISSUE_OUT_VAL [i]->read() and in_ISSUE_OUT_ACK [i]->read())
+	  {
+	    LABEL("ISSUE_OUT [%d] - Transaction Accepted.",i);
+
+	    Tgeneral_data_t imm = out_ISSUE_OUT_IMMEDIAT[i]->read();
+
+	    bool find = issue_queue.find(imm) != issue_queue.end();
+	    TEST(Tgeneral_data_t,imm, *issue_queue.find(imm));
+	    TEST(bool, find, true);
+	    issue_queue.erase(imm);
+
+	    if (imm&1)
+	      {
+		LABEL(" * REEXECUTE");
+	      }
+	    else
+	      {
+		LABEL(" * ISSUE_IN");
+	      }
+	    
+	    imm = imm>>1;
+	    Ttype_t type = out_ISSUE_OUT_TYPE[i]->read();
+	    TEST(Ttype_t,type, tab_type[imm%NB_TYPE]);
+	    TEST(bool   ,_param->_table_issue_type[i][type],true);
+	  }
+
+      for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	if (in_REEXECUTE_VAL [i]->read() and out_REEXECUTE_ACK [i]->read())
+	  {
+	    LABEL("REEXECUTE [%d] - Transaction Accepted.",i);
+	    reexecute_tab_immediat [i] = reexecute_immediat;
+	    reexecute_immediat ++;
+
+	    issue_queue.insert(in_REEXECUTE_IMMEDIAT [i]->read());
+	  }
+
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+	if (in_ISSUE_IN_VAL [i][j]->read() and out_ISSUE_IN_ACK [i][j]->read())
+	  {
+	    LABEL("ISSUE_IN  [%d][%d] - Transaction Accepted.",i,j);
+	    issue_in_tab_immediat [i][j] = issue_in_immediat;
+	    issue_in_immediat ++;
+
+	    issue_queue.insert(in_ISSUE_IN_IMMEDIAT [i][j]->read());
+	  }
+
+      bool test_size = issue_queue.size() <= _param->_size_queue;
+      TEST(bool,test_size,true);
+
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_VAL                   ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL(out_ISSUE_IN_ACK                   ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_CONTEXT_ID            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_FRONT_END_ID          ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_PACKET_ID             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_OPERATION             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_TYPE                  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_HAS_IMMEDIAT          ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_IMMEDIAT              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_READ_RA               ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RA            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_READ_RB               ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RB            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_READ_RC               ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RC            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_WRITE_RD              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RD            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_WRITE_RE              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_IN_NUM_REG_RE            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+
+  DELETE1_SC_SIGNAL( in_REEXECUTE_VAL                  ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_ACK                  ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_CONTEXT_ID           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_FRONT_END_ID         ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_PACKET_ID            ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_OPERATION            ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_TYPE                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_HAS_IMMEDIAT         ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_IMMEDIAT             ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_READ_RA              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RA           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_READ_RB              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RB           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_READ_RC              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RC           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_WRITE_RD             ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RD           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_WRITE_RE             ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_NUM_REG_RE           ,_param->_nb_inst_reexecute);
+
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_VAL                  ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL( in_ISSUE_OUT_ACK                  ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_CONTEXT_ID           ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_FRONT_END_ID         ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_PACKET_ID            ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_OPERATION            ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_TYPE                 ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_HAS_IMMEDIAT         ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_IMMEDIAT             ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_READ_RA              ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RA           ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_READ_RB              ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RB           ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_READ_RC              ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RC           ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_WRITE_RD             ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RD           ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_WRITE_RE             ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OUT_NUM_REG_RE           ,_param->_nb_inst_issue);
+    }
+#endif
+
+  delete _Issue_queue;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/Issue_queue.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/Issue_queue.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/Issue_queue.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Issue_queue}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h	(revision 88)
@@ -0,0 +1,215 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_issue_queue_Issue_queue_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_issue_queue_Issue_queue_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include "Behavioural/Generic/Priority/include/Priority.h"
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+  class Issue_queue 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+  private   : counter_t                     ** _stat_bank_nb_inst;
+  private   : counter_t                      * _stat_nb_inst_reexecute;
+  private   : counter_t                     ** _stat_nb_inst_issue_in;
+  private   : counter_t                      * _stat_nb_inst_issue_out;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_VAL                   ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t        )  *** out_ISSUE_IN_ACK                   ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontext_t        )  ***  in_ISSUE_IN_CONTEXT_ID            ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontext_t        )  ***  in_ISSUE_IN_FRONT_END_ID          ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tpacket_t         )  ***  in_ISSUE_IN_PACKET_ID             ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Toperation_t      )  ***  in_ISSUE_IN_OPERATION             ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Ttype_t           )  ***  in_ISSUE_IN_TYPE                  ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tlsq_ptr_t        )  ***  in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tlsq_ptr_t        )  ***  in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_HAS_IMMEDIAT          ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_ISSUE_IN_IMMEDIAT              ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_READ_RA               ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_ISSUE_IN_NUM_REG_RA            ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_READ_RB               ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_ISSUE_IN_NUM_REG_RB            ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_READ_RC               ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tspecial_address_t)  ***  in_ISSUE_IN_NUM_REG_RC            ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_WRITE_RD              ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_ISSUE_IN_NUM_REG_RD            ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t        )  ***  in_ISSUE_IN_WRITE_RE              ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tspecial_address_t)  ***  in_ISSUE_IN_NUM_REG_RE            ;//[nb_rename_unit][nb_inst_rename]
+
+    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_VAL                  ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t        )   ** out_REEXECUTE_ACK                  ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontext_t        )   **  in_REEXECUTE_CONTEXT_ID           ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontext_t        )   **  in_REEXECUTE_FRONT_END_ID         ;//[nb_inst_reexecute]
+  public    : SC_IN (Tpacket_t         )   **  in_REEXECUTE_PACKET_ID            ;//[nb_inst_reexecute]
+  public    : SC_IN (Toperation_t      )   **  in_REEXECUTE_OPERATION            ;//[nb_inst_reexecute]
+  public    : SC_IN (Ttype_t           )   **  in_REEXECUTE_TYPE                 ;//[nb_inst_reexecute]
+  public    : SC_IN (Tlsq_ptr_t        )   **  in_REEXECUTE_STORE_QUEUE_PTR_WRITE;//[nb_inst_reexecute]
+  public    : SC_IN (Tlsq_ptr_t        )   **  in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_HAS_IMMEDIAT         ;//[nb_inst_reexecute]
+  public    : SC_IN (Tgeneral_data_t   )   **  in_REEXECUTE_IMMEDIAT             ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_READ_RA              ;//[nb_inst_reexecute]
+  public    : SC_IN (Tgeneral_address_t)   **  in_REEXECUTE_NUM_REG_RA           ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_READ_RB              ;//[nb_inst_reexecute]
+  public    : SC_IN (Tgeneral_address_t)   **  in_REEXECUTE_NUM_REG_RB           ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_READ_RC              ;//[nb_inst_reexecute]
+  public    : SC_IN (Tspecial_address_t)   **  in_REEXECUTE_NUM_REG_RC           ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_WRITE_RD             ;//[nb_inst_reexecute]
+  public    : SC_IN (Tgeneral_address_t)   **  in_REEXECUTE_NUM_REG_RD           ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t        )   **  in_REEXECUTE_WRITE_RE             ;//[nb_inst_reexecute]
+  public    : SC_IN (Tspecial_address_t)   **  in_REEXECUTE_NUM_REG_RE           ;//[nb_inst_reexecute]
+
+    // ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_VAL                  ;//[nb_inst_issue]
+  public    : SC_IN (Tcontrol_t        )   **  in_ISSUE_OUT_ACK                  ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontext_t        )   ** out_ISSUE_OUT_CONTEXT_ID           ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontext_t        )   ** out_ISSUE_OUT_FRONT_END_ID         ;//[nb_inst_issue]
+  public    : SC_OUT(Tpacket_t         )   ** out_ISSUE_OUT_PACKET_ID            ;//[nb_inst_issue]
+  public    : SC_OUT(Toperation_t      )   ** out_ISSUE_OUT_OPERATION            ;//[nb_inst_issue]
+  public    : SC_OUT(Ttype_t           )   ** out_ISSUE_OUT_TYPE                 ;//[nb_inst_issue]
+  public    : SC_OUT(Tlsq_ptr_t        )   ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE;//[nb_inst_issue]
+  public    : SC_OUT(Tlsq_ptr_t        )   ** out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_HAS_IMMEDIAT         ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_ISSUE_OUT_IMMEDIAT             ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_READ_RA              ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_ISSUE_OUT_NUM_REG_RA           ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_READ_RB              ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_ISSUE_OUT_NUM_REG_RB           ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_READ_RC              ;//[nb_inst_issue]
+  public    : SC_OUT(Tspecial_address_t)   ** out_ISSUE_OUT_NUM_REG_RC           ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_WRITE_RD             ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_ISSUE_OUT_NUM_REG_RD           ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_OUT_WRITE_RE             ;//[nb_inst_issue]
+  public    : SC_OUT(Tspecial_address_t)   ** out_ISSUE_OUT_NUM_REG_RE           ;//[nb_inst_issue]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : generic::priority::Priority   * _priority_in ;
+  private   : generic::priority::Priority   * _priority_out;
+  private   : generic::priority::Priority   * _priority_reg;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : std::list<entry_t*>           * _issue_queue;
+  
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  private   : Tcontrol_t                    * internal_BANK_IN_ACK              ;//[nb_bank]
+  private   : bool                          * internal_BANK_IN_IS_REEXECUTE     ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_IN_NUM_RENAME_UNIT  ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_IN_NUM_INST         ;//[nb_bank]
+
+  private   : Tcontrol_t                    * internal_BANK_OUT_VAL             ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_OUT_NUM_INST        ;//[nb_bank]
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Issue_queue);
+#endif
+  public  :          Issue_queue              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Issue_queue             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  public  : void        transition                (void);
+  public  : void        genMoore                  (void);
+  public  : void        genMealy                  (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h	(revision 88)
@@ -0,0 +1,103 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_issue_queue_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_issue_queue_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h"
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+#include <list>
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t          _nb_context              ;
+  public : uint32_t          _nb_front_end            ;
+  public : uint32_t          _nb_rename_unit          ;
+  public : uint32_t          _size_queue              ;
+  public : uint32_t          _nb_bank                 ;
+//public : uint32_t          _size_packet             ;
+//public : uint32_t          _size_general_data       ;
+//public : uint32_t          _size_special_data       ;
+//public : uint32_t          _size_general_register   ;
+//public : uint32_t          _size_special_register   ;
+//public : uint32_t          _size_store_queue_ptr    ;
+//public : uint32_t          _size_load_queue_ptr     ;
+  public : uint32_t          _nb_inst_issue           ;
+  public : uint32_t        * _nb_inst_rename          ;//[nb_rename_unit]
+  public : uint32_t          _nb_inst_reexecute       ;
+  public : uint32_t          _nb_rename_unit_select   ;
+  public : Tpriority_t       _priority                ;
+  public : Tload_balancing_t _load_balancing          ;
+  public : bool           ** _table_routing           ;//[nb_rename_unit][nb_inst_issue]
+  public : bool           ** _table_issue_type        ;//[nb_inst_issue][nb_type]
+
+  public : uint32_t          _nb_bank_select_out      ;
+  public : uint32_t          _max_nb_inst_rename      ;
+
+//public : uint32_t          _size_context_id         ;
+//public : uint32_t          _size_front_end_id       ;
+  public : uint32_t          _size_bank               ;
+
+//public : bool              _have_port_context_id    ;
+//public : bool              _have_port_front_end_id  ;
+//public : bool              _have_port_packet_id     ;
+//public : bool              _have_port_load_queue_ptr;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t          nb_context              ,
+			uint32_t          nb_front_end            ,
+			uint32_t          nb_rename_unit          ,
+			uint32_t          size_queue              ,
+			uint32_t          nb_bank                 ,
+			uint32_t          size_packet             ,
+			uint32_t          size_general_data       ,
+			uint32_t          size_special_data       ,
+			uint32_t          size_general_register   ,
+			uint32_t          size_special_register   ,
+			uint32_t          size_store_queue_ptr    ,
+			uint32_t          size_load_queue_ptr     ,
+			uint32_t          nb_inst_issue           ,
+			uint32_t        * nb_inst_rename          ,
+			uint32_t          nb_inst_reexecute       ,
+			uint32_t          nb_rename_unit_select   ,
+			Tpriority_t       priority                ,
+			Tload_balancing_t load_balancing          ,
+			bool           ** table_routing           ,
+			bool           ** table_issue_type        ,
+                        bool              is_toplevel=false);
+
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters (void);
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters & x);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h	(revision 88)
@@ -0,0 +1,91 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_issue_queue_Types_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_issue_queue_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+  class entry_t
+  {
+  public : Tcontext_t         _context_id            ;
+  public : Tcontext_t         _front_end_id          ;
+  public : Tpacket_t          _packet_id             ;
+  public : Toperation_t       _operation             ;
+  public : Ttype_t            _type                  ;
+  public : Tlsq_ptr_t         _store_queue_ptr_write ;
+  public : Tlsq_ptr_t         _load_queue_ptr_write  ;
+  public : Tcontrol_t         _has_immediat          ;
+  public : Tgeneral_data_t    _immediat              ;
+  public : Tcontrol_t         _read_ra               ;
+  public : Tgeneral_address_t _num_reg_ra            ;
+  public : Tcontrol_t         _read_rb               ;
+  public : Tgeneral_address_t _num_reg_rb            ;
+  public : Tcontrol_t         _read_rc               ;
+  public : Tspecial_address_t _num_reg_rc            ;
+  public : Tcontrol_t         _write_rd              ;
+  public : Tgeneral_address_t _num_reg_rd            ;
+  public : Tcontrol_t         _write_re              ;
+  public : Tspecial_address_t _num_reg_re            ;
+    
+  public : entry_t (Tcontext_t         context_id            ,
+		    Tcontext_t         front_end_id          ,
+		    Tpacket_t          packet_id             ,
+		    Toperation_t       operation             ,
+		    Ttype_t            type                  ,
+		    Tlsq_ptr_t         store_queue_ptr_write ,
+		    Tlsq_ptr_t         load_queue_ptr_write  ,
+		    Tcontrol_t         has_immediat          ,
+		    Tgeneral_data_t    immediat              ,
+		    Tcontrol_t         read_ra               ,
+		    Tgeneral_address_t num_reg_ra            ,
+		    Tcontrol_t         read_rb               ,
+		    Tgeneral_address_t num_reg_rb            ,
+		    Tcontrol_t         read_rc               ,
+		    Tspecial_address_t num_reg_rc            ,
+		    Tcontrol_t         write_rd              ,
+		    Tgeneral_address_t num_reg_rd            ,
+		    Tcontrol_t         write_re              ,
+		    Tspecial_address_t num_reg_re            )
+    {
+      _context_id            = context_id           ;
+      _front_end_id          = front_end_id         ;
+      _packet_id             = packet_id            ;
+      _operation             = operation            ;
+      _type                  = type                 ;
+      _store_queue_ptr_write = store_queue_ptr_write;
+      _load_queue_ptr_write  = load_queue_ptr_write ;
+      _has_immediat          = has_immediat         ;
+      _immediat              = immediat             ;
+      _read_ra               = read_ra              ;
+      _num_reg_ra            = num_reg_ra           ;
+      _read_rb               = read_rb              ;
+      _num_reg_rb            = num_reg_rb           ;
+      _read_rc               = read_rc              ;
+      _num_reg_rc            = num_reg_rc           ;
+      _write_rd              = write_rd             ;
+      _num_reg_rd            = num_reg_rd           ;
+      _write_re              = write_re             ;
+      _num_reg_re            = num_reg_re           ;
+    }
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp	(revision 88)
@@ -0,0 +1,168 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::Issue_queue"
+  Issue_queue::Issue_queue 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_Issue_queue == true
+    log_printf(INFO,Issue_queue,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
+    log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str());
+
+	SC_METHOD (genMoore);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMealy"),_name.c_str());
+
+	SC_METHOD (genMealy);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  sensitive << (*(in_REEXECUTE_VAL  [i])) 
+		    << (*(in_REEXECUTE_TYPE [i]));
+	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	  for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+	    sensitive // << (*(in_ISSUE_IN_VAL  [i][j])) 
+		      << (*(in_ISSUE_IN_TYPE [i][j]));
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  for (uint32_t x=0; x<_param->_nb_inst_reexecute; x++)
+	    {
+	      (*(out_REEXECUTE_ACK [i])) (*(in_REEXECUTE_VAL  [x]));
+	      (*(out_REEXECUTE_ACK [i])) (*(in_REEXECUTE_TYPE [x]));
+	    }
+
+	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	  for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+	    {
+	      for (uint32_t x=0; x<_param->_nb_inst_reexecute; x++)
+		{
+		  (*(out_ISSUE_IN_ACK [i][j])) (*(in_REEXECUTE_VAL  [x]));
+		  (*(out_ISSUE_IN_ACK [i][j])) (*(in_REEXECUTE_TYPE [x]));
+		}
+
+	      for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
+		for (uint32_t y=0; y<_param->_nb_inst_rename[x]; y++)
+		  {
+		    (*(out_ISSUE_IN_ACK [i][j])) (*(in_ISSUE_IN_VAL  [x][y]));
+		    (*(out_ISSUE_IN_ACK [i][j])) (*(in_ISSUE_IN_TYPE [x][y]));
+		  }
+	    }
+# endif    
+	
+#endif
+      }
+    log_end(Issue_queue,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::~Issue_queue"
+  Issue_queue::~Issue_queue (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Deallocation"),_name.c_str());
+
+    deallocation ();
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp	(revision 88)
@@ -0,0 +1,188 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::allocation"
+  void Issue_queue::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Issue_queue"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+
+    // ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("issue_in", IN, WEST, _("Rename_out / Insert Rob interface"),_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+    
+      _ALLOC2_VALACK_IN ( in_ISSUE_IN_VAL                  ,VAL,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_VALACK_OUT(out_ISSUE_IN_ACK                  ,ACK,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id      ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id    ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr         ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation       ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data    ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+    }
+
+    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("reexecute", IN, NORTH, _("Instruction reexecute (store head/ spr access)"),_param->_nb_inst_reexecute);
+      
+      ALLOC1_VALACK_IN ( in_REEXECUTE_VAL                  ,VAL);
+      ALLOC1_VALACK_OUT(out_REEXECUTE_ACK                  ,ACK);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id      );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id    );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr         );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation       );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type            );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr  );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data    );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
+    }
+
+    // ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("issue_out",OUT, EAST, _("Go to issue network"),_param->_nb_inst_issue);
+      
+      ALLOC1_VALACK_OUT(out_ISSUE_OUT_VAL                  ,VAL);
+      ALLOC1_VALACK_IN ( in_ISSUE_OUT_ACK                  ,ACK);
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id      );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id    );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr         );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation       );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type            );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr  );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data    );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
+    }
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+    // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _issue_queue = new std::list<entry_t*> [_param->_nb_bank];
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    internal_BANK_IN_ACK             = new Tcontrol_t [_param->_nb_bank];
+    internal_BANK_IN_IS_REEXECUTE    = new bool       [_param->_nb_bank];
+    internal_BANK_IN_NUM_RENAME_UNIT = new uint32_t   [_param->_nb_bank];
+    internal_BANK_IN_NUM_INST        = new uint32_t   [_param->_nb_bank];
+    
+    internal_BANK_OUT_VAL            = new Tcontrol_t [_param->_nb_bank];
+    internal_BANK_OUT_NUM_INST       = new uint32_t   [_param->_nb_bank];
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    _priority_in  = new generic::priority::Priority (_name+"_priority_in"   ,
+						     _param->_priority      ,
+						     _param->_load_balancing,
+						     _param->_nb_rename_unit,
+						     _param->_nb_inst_rename,
+						     _param->_nb_rename_unit_select);
+
+    _priority_out = new generic::priority::Priority (_name+"_priority_out"  ,
+						     _param->_priority      ,
+						     _param->_nb_bank_select_out,
+						     _param->_nb_bank_select_out);
+
+    _priority_reg = new generic::priority::Priority (_name+"_priority_reg",
+						     PRIORITY_ROUND_ROBIN ,
+						     _param->_nb_bank,
+						     _param->_nb_bank);
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
+#endif
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp	(revision 88)
@@ -0,0 +1,125 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::deallocation"
+  void Issue_queue::deallocation (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+	DELETE2_SIGNAL( in_ISSUE_IN_VAL                  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL(out_ISSUE_IN_ACK                  ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_CONTEXT_ID           ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_context_id      );
+	DELETE2_SIGNAL( in_ISSUE_IN_FRONT_END_ID         ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_front_end_id    );
+	DELETE2_SIGNAL( in_ISSUE_IN_PACKET_ID            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_rob_ptr         );
+	DELETE2_SIGNAL( in_ISSUE_IN_OPERATION            ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_operation       );
+	DELETE2_SIGNAL( in_ISSUE_IN_TYPE                 ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_type            );
+	DELETE2_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_store_queue_ptr );
+	DELETE2_SIGNAL( in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_load_queue_ptr  );
+	DELETE2_SIGNAL( in_ISSUE_IN_HAS_IMMEDIAT         ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_IMMEDIAT             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_general_data    );
+	DELETE2_SIGNAL( in_ISSUE_IN_READ_RA              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_NUM_REG_RA           ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_general_register);
+	DELETE2_SIGNAL( in_ISSUE_IN_READ_RB              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_NUM_REG_RB           ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_general_register);
+	DELETE2_SIGNAL( in_ISSUE_IN_READ_RC              ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_NUM_REG_RC           ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_special_register);
+	DELETE2_SIGNAL( in_ISSUE_IN_WRITE_RD             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_NUM_REG_RD           ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_general_register);
+	DELETE2_SIGNAL( in_ISSUE_IN_WRITE_RE             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],1                             );
+	DELETE2_SIGNAL( in_ISSUE_IN_NUM_REG_RE           ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1],_param->_size_special_register);
+      
+        DELETE1_SIGNAL( in_REEXECUTE_VAL                  ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL(out_REEXECUTE_ACK                  ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_CONTEXT_ID           ,_param->_nb_inst_reexecute,_param->_size_context_id      );
+        DELETE1_SIGNAL( in_REEXECUTE_FRONT_END_ID         ,_param->_nb_inst_reexecute,_param->_size_front_end_id    );
+        DELETE1_SIGNAL( in_REEXECUTE_PACKET_ID            ,_param->_nb_inst_reexecute,_param->_size_rob_ptr         );
+        DELETE1_SIGNAL( in_REEXECUTE_OPERATION            ,_param->_nb_inst_reexecute,_param->_size_operation       );
+        DELETE1_SIGNAL( in_REEXECUTE_TYPE                 ,_param->_nb_inst_reexecute,_param->_size_type            );
+        DELETE1_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute,_param->_size_store_queue_ptr );
+        DELETE1_SIGNAL( in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute,_param->_size_load_queue_ptr  );
+        DELETE1_SIGNAL( in_REEXECUTE_HAS_IMMEDIAT         ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_IMMEDIAT             ,_param->_nb_inst_reexecute,_param->_size_general_data    );
+        DELETE1_SIGNAL( in_REEXECUTE_READ_RA              ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_NUM_REG_RA           ,_param->_nb_inst_reexecute,_param->_size_general_register);
+        DELETE1_SIGNAL( in_REEXECUTE_READ_RB              ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_NUM_REG_RB           ,_param->_nb_inst_reexecute,_param->_size_general_register);
+        DELETE1_SIGNAL( in_REEXECUTE_READ_RC              ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_NUM_REG_RC           ,_param->_nb_inst_reexecute,_param->_size_special_register);
+        DELETE1_SIGNAL( in_REEXECUTE_WRITE_RD             ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_NUM_REG_RD           ,_param->_nb_inst_reexecute,_param->_size_general_register);
+        DELETE1_SIGNAL( in_REEXECUTE_WRITE_RE             ,_param->_nb_inst_reexecute,1                             );
+        DELETE1_SIGNAL( in_REEXECUTE_NUM_REG_RE           ,_param->_nb_inst_reexecute,_param->_size_special_register);
+
+        DELETE1_SIGNAL(out_ISSUE_OUT_VAL                  ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL( in_ISSUE_OUT_ACK                  ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_CONTEXT_ID           ,_param->_nb_inst_issue,_param->_size_context_id      );
+        DELETE1_SIGNAL(out_ISSUE_OUT_FRONT_END_ID         ,_param->_nb_inst_issue,_param->_size_front_end_id    );
+        DELETE1_SIGNAL(out_ISSUE_OUT_PACKET_ID            ,_param->_nb_inst_issue,_param->_size_rob_ptr         );
+        DELETE1_SIGNAL(out_ISSUE_OUT_OPERATION            ,_param->_nb_inst_issue,_param->_size_operation       );
+        DELETE1_SIGNAL(out_ISSUE_OUT_TYPE                 ,_param->_nb_inst_issue,_param->_size_type            );
+        DELETE1_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue,_param->_size_store_queue_ptr );
+        DELETE1_SIGNAL(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_issue,_param->_size_load_queue_ptr  );
+        DELETE1_SIGNAL(out_ISSUE_OUT_HAS_IMMEDIAT         ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_IMMEDIAT             ,_param->_nb_inst_issue,_param->_size_general_data    );
+        DELETE1_SIGNAL(out_ISSUE_OUT_READ_RA              ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_NUM_REG_RA           ,_param->_nb_inst_issue,_param->_size_general_register);
+        DELETE1_SIGNAL(out_ISSUE_OUT_READ_RB              ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_NUM_REG_RB           ,_param->_nb_inst_issue,_param->_size_general_register);
+        DELETE1_SIGNAL(out_ISSUE_OUT_READ_RC              ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_NUM_REG_RC           ,_param->_nb_inst_issue,_param->_size_special_register);
+        DELETE1_SIGNAL(out_ISSUE_OUT_WRITE_RD             ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_NUM_REG_RD           ,_param->_nb_inst_issue,_param->_size_general_register);
+        DELETE1_SIGNAL(out_ISSUE_OUT_WRITE_RE             ,_param->_nb_inst_issue,1                             );
+        DELETE1_SIGNAL(out_ISSUE_OUT_NUM_REG_RE           ,_param->_nb_inst_issue,_param->_size_special_register);
+
+        // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+        delete [] _issue_queue;
+        
+        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        delete [] internal_BANK_IN_ACK            ;
+        delete [] internal_BANK_IN_IS_REEXECUTE   ;
+        delete [] internal_BANK_IN_NUM_RENAME_UNIT;
+        delete [] internal_BANK_IN_NUM_INST       ;
+        
+        delete [] internal_BANK_OUT_VAL           ;
+        delete [] internal_BANK_OUT_NUM_INST      ;
+      }
+    
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    
+    delete    _priority_in ;
+    delete    _priority_out;
+    delete    _priority_reg;
+    delete    _component;
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_end_cycle.cpp	(revision 88)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::end_cycle"
+void Issue_queue::end_cycle ()
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy.cpp	(revision 88)
@@ -0,0 +1,133 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::genMealy"
+  void Issue_queue::genMealy (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+    log_function(Issue_queue,FUNCTION,_name.c_str());
+
+    Tcontrol_t bank_full         [_param->_nb_bank];
+    Tcontrol_t issue_ack         [_param->_nb_rename_unit][_param->_max_nb_inst_rename];
+    Tcontrol_t reexecute_ack     [_param->_nb_inst_reexecute];
+    bool       can_rename_select [_param->_nb_rename_unit];
+    
+    // Initialisation
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+	internal_BANK_IN_ACK  [i] = false;
+	bank_full [i] = not (_issue_queue[i].size() < _param->_size_bank); 
+      }
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      {
+	can_rename_select [i] = true;
+	for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+	  issue_ack [i][j] = false;
+      }
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+      reexecute_ack [i] = false;
+    
+    std::list<generic::priority::select_t> * select_reg = _priority_reg->select(); // same select for all issue
+
+    // Priority at the Reexecute instruction !
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+      // Test if have instruction
+      if (PORT_READ(in_REEXECUTE_VAL [i]))
+	{
+	  Ttype_t type = PORT_READ(in_REEXECUTE_TYPE [i]);
+	  
+	  // scan all bank
+	  for (std::list<generic::priority::select_t>::iterator it=select_reg->begin();
+	       it!=select_reg->end();
+	       it++)
+	    {
+	      uint32_t num_bank  = it->grp;
+	      uint32_t num_issue = num_bank/_param->_nb_bank_select_out;
+	      // test if bank is not busy (full or previous access) and if type match
+	      if (not internal_BANK_IN_ACK [num_bank] and not bank_full [num_bank] and _param->_table_issue_type[num_issue][type])
+		{
+		  // find
+		  reexecute_ack [i] = true;
+		  internal_BANK_IN_ACK          [num_bank] = true;
+		  internal_BANK_IN_IS_REEXECUTE [num_bank] = 1;
+		  internal_BANK_IN_NUM_INST     [num_bank] = i;
+		  break;
+		}
+	    }
+	}
+    
+    // issue_in interface
+    std::list<generic::priority::select_t> * select_in = _priority_in ->select(); // same select for all issue
+    for (std::list<generic::priority::select_t>::iterator it=select_in ->begin();
+	 it!=select_in ->end();
+	 it++)
+      {
+	uint32_t num_rename_unit = it->grp;
+	uint32_t num_inst_rename = it->elt;
+
+        // Test if have instruction 
+	if (can_rename_select [num_rename_unit]//  and 
+// 	    PORT_READ(in_ISSUE_IN_VAL [num_rename_unit][num_inst_rename])
+            )
+	  {
+	    Ttype_t type = PORT_READ(in_ISSUE_IN_TYPE [num_rename_unit][num_inst_rename]);
+	  
+	    // scan all bank
+	    for (std::list<generic::priority::select_t>::iterator it=select_reg->begin();
+		 it!=select_reg->end();
+		 it++)
+	      {
+		uint32_t num_bank  = it->grp;
+		uint32_t num_issue = num_bank/_param->_nb_bank_select_out;
+		// test if bank is not busy (full or previous access) and if type match
+		if (not internal_BANK_IN_ACK [num_bank] and not bank_full [num_bank] and _param->_table_issue_type[num_issue][type])
+		  {
+		    // find
+		    issue_ack [num_rename_unit][num_inst_rename] = true;
+		    internal_BANK_IN_ACK             [num_bank] = true;
+		    internal_BANK_IN_IS_REEXECUTE    [num_bank] = 0;
+		    internal_BANK_IN_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
+		    internal_BANK_IN_NUM_INST        [num_bank] = num_inst_rename;
+		    break;
+		  }
+	      }
+
+	    // is a valid instruction, but it's not send at a bank
+	    //  ... invalid this rename_unit (because, rename in_order)
+	    can_rename_select [num_rename_unit] |= issue_ack [num_rename_unit][num_inst_rename];
+	  }
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+	PORT_WRITE(out_ISSUE_IN_ACK [i][j],issue_ack [i][j]);
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+      PORT_WRITE(out_REEXECUTE_ACK [i],reexecute_ack [i]);
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp	(revision 88)
@@ -0,0 +1,104 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::genMoore"
+  void Issue_queue::genMoore (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+    log_function(Issue_queue,FUNCTION,_name.c_str());
+
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      internal_BANK_OUT_VAL [i] = false;
+
+    std::list<generic::priority::select_t> * select = _priority_out->select(); // same select for all issue
+
+    uint32_t num_bank_offset = 0;
+    for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+      {
+// 	log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_OUT [%d]",i);
+	Tcontrol_t val      = false;
+	uint32_t   num_bank = 0;
+
+	// find a non empty bank
+	for (std::list<generic::priority::select_t>::iterator it=select->begin();
+	     it!=select->end();
+	     it++)
+	  {
+	    num_bank=num_bank_offset+it->grp;
+	   
+// 	    log_printf(TRACE,Issue_queue,FUNCTION,"    * Bank [%d]",num_bank);
+	    
+	    if (not _issue_queue [num_bank].empty())
+	      {
+// 		log_printf(TRACE,Issue_queue,FUNCTION,"      * Not Empty !!!");
+		val = true;
+
+		internal_BANK_OUT_NUM_INST [num_bank] = i;
+		break; // quit scearch loop
+	      }
+	  }
+
+	PORT_WRITE(out_ISSUE_OUT_VAL [i], val);
+
+	if (val)
+	  {
+	    // have find a bank with a data
+	    internal_BANK_OUT_VAL [num_bank] = true;
+	
+	    entry_t* entry = _issue_queue [num_bank].front();
+	    
+	    if (_param->_have_port_context_id)
+	    PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [i], entry->_context_id           );
+	    if (_param->_have_port_front_end_id)
+	    PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [i], entry->_front_end_id         );
+	    if (_param->_have_port_rob_ptr  )
+	    PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [i], entry->_packet_id            );
+	    PORT_WRITE(out_ISSUE_OUT_OPERATION             [i], entry->_operation            );
+	    PORT_WRITE(out_ISSUE_OUT_TYPE                  [i], entry->_type                 );
+	    PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write);
+	    if (_param->_have_port_load_queue_ptr)
+	    PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [i], entry->_load_queue_ptr_write );
+	    PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [i], entry->_has_immediat         );
+	    PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [i], entry->_immediat             );
+	    PORT_WRITE(out_ISSUE_OUT_READ_RA               [i], entry->_read_ra              );
+	    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [i], entry->_num_reg_ra           );
+	    PORT_WRITE(out_ISSUE_OUT_READ_RB               [i], entry->_read_rb              );
+	    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [i], entry->_num_reg_rb           );
+	    PORT_WRITE(out_ISSUE_OUT_READ_RC               [i], entry->_read_rc              );
+	    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [i], entry->_num_reg_rc           );
+	    PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [i], entry->_write_rd             );
+	    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [i], entry->_num_reg_rd           );
+	    PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [i], entry->_write_re             );
+	    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [i], entry->_num_reg_re           );
+	  }
+
+	num_bank_offset += _param->_nb_bank_select_out;
+      }
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,103 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::statistics_allocation"
+  void Issue_queue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Issue_queue",
+		      param_statistics);
+    
+    _stat_bank_nb_inst     = new counter_t * [_param->_nb_bank];
+    _stat_nb_inst_issue_in = new counter_t * [_param->_nb_rename_unit];
+
+    // instruction
+    {
+      _stat_nb_inst_reexecute = _stat->create_variable("nb_inst_reexecute");
+
+      std::string sum_nb_inst_issue_in = "";
+      std::string sum_average_use_interface_issue_in = "";
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+	{
+	  _stat_nb_inst_issue_in [i] = _stat->create_variable("nb_inst_issue_in_"+toString(i));
+	  
+	  _stat->create_expr_average_by_cycle("average_use_interface_issue_in_"+toString(i), "nb_inst_issue_in_"+toString(i), "", toString(_("Average instruction by cycle on issue_in interface (rename_unit %d)"),i));
+	  _stat->create_expr_percent         ("percent_use_interface_issue_in_"+toString(i) , "average_use_interface_issue_in_"+toString(i), toString(_param->_nb_inst_rename [i]), toString(_("Percent usage of issue_in interface (rename_unit %d)"),i));
+	  
+	  if (i == 0)
+	    {
+	      sum_nb_inst_issue_in               = "nb_inst_issue_in_"+toString(i);
+	      sum_average_use_interface_issue_in = "average_use_interface_issue_in_"+toString(i);
+	    }
+	  else
+	    {
+	      sum_nb_inst_issue_in               = "+ nb_inst_issue_in_"+toString(i) + " " +sum_nb_inst_issue_in;
+	      sum_average_use_interface_issue_in = "+ average_use_interface_issue_in_"+toString(i)+ " "+sum_average_use_interface_issue_in;
+	    }
+      	}
+      
+      _stat->create_expr_average_by_cycle("average_use_interface_reexecute", "nb_inst_reexecute", "", _("Average instruction by cycle on reexecute interface"));
+      _stat->create_expr_percent         ("percent_use_interface_reexecute" , "average_use_interface_reexecute", toString(_param->_nb_inst_reexecute), _("Percent usage of reexecute interface"));
+      
+      _stat->create_expr_average_by_cycle("average_inst_in", "+ nb_inst_reexecute " + sum_nb_inst_issue_in, "", _("Average instruction by cycle"));
+      _stat->create_expr_percent         ("percent_inst_in"          , "average_inst_in"              , toString(_param->_nb_bank), _("Percent of instruction by cycle"));
+      _stat->create_expr_percent         ("percent_inst_reexecute", "average_use_interface_reexecute" , "average_inst_in", _("Percent of instruction reexecute by cycle"));
+      _stat->create_expr_percent         ("percent_inst_issue_in" , sum_average_use_interface_issue_in, "average_inst_in", _("Percent of instruction issue_in by cycle"));
+    }
+    
+    {
+      _stat_nb_inst_issue_out = _stat->create_variable("nb_inst_issue_out");
+
+      _stat->create_expr_average_by_cycle("average_use_interface_issue_out", "nb_inst_issue_out", "", _("Average instruction by cycle on issue_out interface"));
+      _stat->create_expr_percent         ("percent_use_interface_issue_out" , "average_use_interface_issue_out", toString(_param->_nb_inst_issue), _("Percent usage of issue_out interface"));
+    }
+
+    // bank/queue occupation
+    {
+      std::string sum_bank_nb_inst = "";
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+	{
+	  _stat_bank_nb_inst [i] = _stat->create_variable("bank_nb_inst_"+toString(i));
+	  
+	  _stat->create_expr_average_by_cycle("average_occupation_bank_"+toString(i), "bank_nb_inst_"+toString(i), "", toString(_("Average instruction by cycle (bank %d)"),i));
+	  _stat->create_expr_percent         ("percent_occupation_bank_"+toString(i), "average_occupation_bank_"+toString(i), toString(_param->_size_bank), toString(_("Percent occupation of bank (bank %d)"),i));
+	  
+	  if (i == 0)
+	    sum_bank_nb_inst = "bank_nb_inst_"+toString(i);
+	  else
+	    sum_bank_nb_inst = "+ bank_nb_inst_"+toString(i) + " " +sum_bank_nb_inst;
+	}
+      
+      _stat->create_expr_average_by_cycle("average_occupation_bank", sum_bank_nb_inst, "", _("Average instruction by cycle (all bank)"));
+      _stat->create_expr_percent         ("percent_occupation_bank" , "average_occupation_bank", toString(_param->_size_queue), _("Percent occupation of issue_queue (all bank)"));
+    }
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,40 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::statistics_deallocation"
+  void Issue_queue::statistics_deallocation (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete    _stat;
+    delete [] _stat_bank_nb_inst;
+    delete [] _stat_nb_inst_issue_in;
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp	(revision 88)
@@ -0,0 +1,174 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::transition"
+  void Issue_queue::transition (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+    log_function(Issue_queue,FUNCTION,_name.c_str());
+
+    if (PORT_READ(in_NRESET) == 0)
+      {
+	_priority_in ->reset();
+	_priority_out->reset();
+	_priority_reg->reset();
+	
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  _issue_queue [i].clear();
+      }
+    else
+      {
+	_priority_in ->transition();
+	_priority_out->transition();
+	_priority_reg->transition();
+
+	// ===================================================================
+	// =====[ ISSUE_IN ]==================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  if (internal_BANK_IN_ACK [i])
+	    {
+	      entry_t* entry = NULL;
+
+	      if (internal_BANK_IN_IS_REEXECUTE [i])
+		{
+		  uint32_t y = internal_BANK_IN_NUM_INST [i];
+	      
+		  if (PORT_READ(in_REEXECUTE_VAL [y]))
+		    {
+#ifdef STATISTICS
+                      if (usage_is_set(_usage,USE_STATISTICS))
+                        (*_stat_nb_inst_reexecute) ++;
+#endif
+		      entry = new entry_t
+			(
+			 (_param->_have_port_context_id    )?PORT_READ(in_REEXECUTE_CONTEXT_ID            [y]):0,
+			 (_param->_have_port_front_end_id  )?PORT_READ(in_REEXECUTE_FRONT_END_ID          [y]):0,
+			 (_param->_have_port_rob_ptr       )?PORT_READ(in_REEXECUTE_PACKET_ID             [y]):0,
+			 PORT_READ(in_REEXECUTE_OPERATION             [y]),
+			 PORT_READ(in_REEXECUTE_TYPE                  [y]),
+			 PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]),
+			 (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE  [y]):0,
+			 PORT_READ(in_REEXECUTE_HAS_IMMEDIAT          [y]),
+			 PORT_READ(in_REEXECUTE_IMMEDIAT              [y]),
+			 PORT_READ(in_REEXECUTE_READ_RA               [y]),
+			 PORT_READ(in_REEXECUTE_NUM_REG_RA            [y]),
+			 PORT_READ(in_REEXECUTE_READ_RB               [y]),
+			 PORT_READ(in_REEXECUTE_NUM_REG_RB            [y]),
+			 PORT_READ(in_REEXECUTE_READ_RC               [y]),
+			 PORT_READ(in_REEXECUTE_NUM_REG_RC            [y]),
+			 PORT_READ(in_REEXECUTE_WRITE_RD              [y]),
+			 PORT_READ(in_REEXECUTE_NUM_REG_RD            [y]),
+			 PORT_READ(in_REEXECUTE_WRITE_RE              [y]),
+			 PORT_READ(in_REEXECUTE_NUM_REG_RE            [y])
+			 );
+		    }
+		}
+	      else
+		{
+		  uint32_t x = internal_BANK_IN_NUM_RENAME_UNIT [i];
+		  uint32_t y = internal_BANK_IN_NUM_INST [i];
+
+		  if (PORT_READ(in_ISSUE_IN_VAL[x][y]))
+		    {
+#ifdef STATISTICS
+                      if (usage_is_set(_usage,USE_STATISTICS))
+                        (*_stat_nb_inst_issue_in [x]) ++;
+#endif
+		      entry = new entry_t
+			(
+			 (_param->_have_port_context_id    )?PORT_READ(in_ISSUE_IN_CONTEXT_ID            [x][y]):0,
+			 (_param->_have_port_front_end_id  )?PORT_READ(in_ISSUE_IN_FRONT_END_ID          [x][y]):0,
+			 (_param->_have_port_rob_ptr       )?PORT_READ(in_ISSUE_IN_PACKET_ID             [x][y]):0,
+			 PORT_READ(in_ISSUE_IN_OPERATION             [x][y]),
+			 PORT_READ(in_ISSUE_IN_TYPE                  [x][y]),
+			 PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]),
+			 (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  [x][y]):0,
+			 PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT          [x][y]),
+			 PORT_READ(in_ISSUE_IN_IMMEDIAT              [x][y]),
+			 PORT_READ(in_ISSUE_IN_READ_RA               [x][y]),
+			 PORT_READ(in_ISSUE_IN_NUM_REG_RA            [x][y]),
+			 PORT_READ(in_ISSUE_IN_READ_RB               [x][y]),
+			 PORT_READ(in_ISSUE_IN_NUM_REG_RB            [x][y]),
+			 PORT_READ(in_ISSUE_IN_READ_RC               [x][y]),
+			 PORT_READ(in_ISSUE_IN_NUM_REG_RC            [x][y]),
+			 PORT_READ(in_ISSUE_IN_WRITE_RD              [x][y]),
+			 PORT_READ(in_ISSUE_IN_NUM_REG_RD            [x][y]),
+			 PORT_READ(in_ISSUE_IN_WRITE_RE              [x][y]),
+			 PORT_READ(in_ISSUE_IN_NUM_REG_RE            [x][y])
+			 );
+		    }
+		}
+
+	      if (entry != NULL)
+		_issue_queue [i].push_back(entry);
+	    }
+
+	// ===================================================================
+	// =====[ ISSUE_OUT ]=================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  {
+// 	    log_printf(TRACE,Issue_queue,FUNCTION,"  * internal_BANK_OUT [%d] val %d, num_inst %d",i,internal_BANK_OUT_VAL [i],internal_BANK_OUT_NUM_INST [i]);
+
+	    if (internal_BANK_OUT_VAL [i])
+	      {
+#ifdef STATISTICS
+                if (usage_is_set(_usage,USE_STATISTICS))
+                  (*_stat_nb_inst_issue_out) ++;
+#endif
+
+		uint32_t x = internal_BANK_OUT_NUM_INST [i];
+// 		log_printf(TRACE,Issue_queue,FUNCTION,"    * ISSUE_OUT_ACK : %d",PORT_READ(in_ISSUE_OUT_ACK [x]));
+		
+		if (PORT_READ(in_ISSUE_OUT_ACK [x]))
+		  {
+		    entry_t * entry =  _issue_queue [i].front();
+		    _issue_queue [i].pop_front();
+		    delete entry;
+		  }
+	      }
+	  }
+      }
+
+    log_printf(TRACE,Issue_queue,FUNCTION,"  * Info Issue_queue");
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
+#ifdef STATISTICS
+        if (usage_is_set(_usage,USE_STATISTICS))
+          *(_stat_bank_nb_inst [i]) += _issue_queue[i].size();
+#endif
+	log_printf(TRACE,Issue_queue,FUNCTION,"    * [%d] size : %d",i,(int)_issue_queue[i].size());
+      }
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl.cpp	(revision 88)
@@ -0,0 +1,48 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::vhdl"
+  void Issue_queue::vhdl (void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl_body.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl_body.cpp	(revision 88)
@@ -0,0 +1,35 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::vhdl_body"
+  void Issue_queue::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(Issue_queue,FUNCTION);
+    vhdl->set_body ("");
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl_declaration.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_vhdl_declaration.cpp	(revision 88)
@@ -0,0 +1,34 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::vhdl_declaration"
+  void Issue_queue::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(Issue_queue,FUNCTION);
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,120 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::Parameters"
+  Parameters::Parameters (uint32_t          nb_context              ,
+			  uint32_t          nb_front_end            ,
+			  uint32_t          nb_rename_unit          ,
+			  uint32_t          size_queue              ,
+			  uint32_t          nb_bank                 ,
+			  uint32_t          size_packet             ,
+			  uint32_t          size_general_data       ,
+			  uint32_t          size_special_data       ,
+			  uint32_t          size_general_register   ,
+			  uint32_t          size_special_register   ,
+			  uint32_t          size_store_queue_ptr    ,
+			  uint32_t          size_load_queue_ptr     ,
+			  uint32_t          nb_inst_issue           ,
+			  uint32_t        * nb_inst_rename          ,
+			  uint32_t          nb_inst_reexecute       ,
+			  uint32_t          nb_rename_unit_select   ,
+			  Tpriority_t       priority                ,
+			  Tload_balancing_t load_balancing          ,
+			  bool           ** table_routing           ,
+			  bool           ** table_issue_type        ,
+                          bool              is_toplevel             )
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    _nb_context               = nb_context           ;
+    _nb_front_end             = nb_front_end         ;
+    _nb_rename_unit           = nb_rename_unit       ;
+    _size_queue               = size_queue           ;
+    _nb_bank                  = nb_bank              ;   
+    _nb_inst_issue            = nb_inst_issue        ;
+    _nb_inst_rename           = nb_inst_rename       ;
+    _nb_inst_reexecute        = nb_inst_reexecute    ;
+    _nb_rename_unit_select    = nb_rename_unit_select;
+    _priority                 = priority             ;
+    _load_balancing           = load_balancing       ;
+    _table_routing            = table_routing        ;
+    _table_issue_type         = table_issue_type     ;
+
+    _max_nb_inst_rename       = max<uint32_t>(_nb_inst_rename,_nb_rename_unit);
+    _nb_bank_select_out       = _nb_bank/nb_inst_issue;
+
+    _size_bank                = _size_queue / _nb_bank;
+    
+    test();
+
+    if (is_toplevel)
+      {
+        _size_context_id          = log2(nb_context  );
+        _size_front_end_id        = log2(nb_front_end);
+        _size_rob_ptr             = size_packet          ;
+        _size_general_data        = size_general_data    ;
+        _size_special_data        = size_special_data    ;
+        _size_general_register    = size_general_register;
+        _size_special_register    = size_special_register;
+        _size_store_queue_ptr     = size_store_queue_ptr ;
+        _size_load_queue_ptr      = size_load_queue_ptr  ;
+        
+        _have_port_context_id     = (_size_context_id     > 0);
+        _have_port_front_end_id   = (_size_front_end_id   > 0);
+        _have_port_rob_ptr        = (_size_rob_ptr        > 0);
+        _have_port_load_queue_ptr = (_size_load_queue_ptr > 0);
+        
+        copy();
+      }
+
+    log_end(Issue_queue,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Issue_queue::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Issue_queue,FUNCTION);
+//     test();
+//     log_end(Issue_queue,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(Issue_queue,FUNCTION);
+    log_end(Issue_queue,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(Issue_queue,FUNCTION);
+    log_end(Issue_queue,FUNCTION);
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,100 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    Parameters_test test ("Issue_queue");
+
+    if (not is_multiple(_size_queue, _nb_bank))
+      test.error(toString(_("nb_bank must be a multiple of size_queue.\n")));
+    
+    if (not is_multiple(_nb_bank, _nb_inst_issue))
+      test.error(toString(_("nb_inst_issue must be a multiple of nb_bank.\n")));
+
+    if (_nb_rename_unit_select > _nb_rename_unit)
+      test.error(toString(_("nb_rename_unit_select must be <= nb_rename_unit.\n")));
+
+    if (_size_bank == 1)
+      test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n"));
+
+    bool type_valid [_nb_type];
+
+    for (uint32_t i=0; i<_nb_type; i++)
+      type_valid [i] = false;
+    
+    type_valid [TYPE_ALU    ] = true;
+    type_valid [TYPE_SHIFT  ] = true;
+    type_valid [TYPE_MOVE   ] = true;
+    type_valid [TYPE_TEST   ] = true;
+    type_valid [TYPE_MUL    ] = true;
+    type_valid [TYPE_DIV    ] = true;
+    type_valid [TYPE_EXTEND ] = true;
+    type_valid [TYPE_FIND   ] = true;
+    type_valid [TYPE_SPECIAL] = true;
+    type_valid [TYPE_CUSTOM ] = true;
+    type_valid [TYPE_BRANCH ] = true;
+    type_valid [TYPE_MEMORY ] = true;
+
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      {
+	bool type_present [_nb_type];
+	
+	for (uint32_t j=0; j<_nb_type; j++)
+	  type_present [j] = not type_valid [j];
+
+	bool find = false;
+	for (uint32_t j=0; j<_nb_inst_issue; j++)
+	  if (_table_routing [i][j])
+	  {
+	    find = true;
+
+	    for (uint32_t k=0; k<_nb_type; k++)
+	      type_present [k] |= _table_issue_type [j][k];
+	  }
+
+	if (not find)
+	  test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i));
+	else
+	  for (uint32_t j=0; j<_nb_type; j++)
+	    if (not type_present [j])
+	      test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString_type(j).c_str()));
+      }
+    
+    if ((_priority != PRIORITY_ROUND_ROBIN))
+      test.error(toString(_("Unsupported priority scheme (Coming Soon). Supported scheme are : %s.\n"),toString(PRIORITY_ROUND_ROBIN).c_str()));
+    
+    if ((_load_balancing != LOAD_BALANCING_MAXIMUM_FOR_PRIORITY))
+      test.error(toString(_("Unsupported load_balancing scheme (Coming Soon). Supported scheme are : %s.\n"),toString(LOAD_BALANCING_MAXIMUM_FOR_PRIORITY).c_str()));
+
+    log_end(Issue_queue,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,81 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace issue_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    XML xml ("issue_queue");
+
+    xml.balise_open("issue_queue");
+    xml.singleton_begin("nb_context           "); xml.attribut("value",toString(_nb_context           )); xml.singleton_end();
+    xml.singleton_begin("nb_front_end         "); xml.attribut("value",toString(_nb_front_end         )); xml.singleton_end();
+    xml.singleton_begin("nb_rename_unit       "); xml.attribut("value",toString(_nb_rename_unit       )); xml.singleton_end();
+    xml.singleton_begin("size_queue           "); xml.attribut("value",toString(_size_queue           )); xml.singleton_end();
+    xml.singleton_begin("nb_bank              "); xml.attribut("value",toString(_nb_bank              )); xml.singleton_end();
+//  xml.singleton_begin("size_packet          "); xml.attribut("value",toString(_size_packet          )); xml.singleton_end();
+    xml.singleton_begin("size_general_data    "); xml.attribut("value",toString(_size_general_data    )); xml.singleton_end();
+    xml.singleton_begin("size_special_data    "); xml.attribut("value",toString(_size_special_data    )); xml.singleton_end();
+    xml.singleton_begin("size_general_register"); xml.attribut("value",toString(_size_general_register)); xml.singleton_end();
+    xml.singleton_begin("size_special_register"); xml.attribut("value",toString(_size_special_register)); xml.singleton_end();
+    xml.singleton_begin("size_store_queue_ptr "); xml.attribut("value",toString(_size_store_queue_ptr )); xml.singleton_end();
+    xml.singleton_begin("size_load_queue_ptr  "); xml.attribut("value",toString(_size_load_queue_ptr  )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_issue        "); xml.attribut("value",toString(_nb_inst_issue        )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_reexecute    "); xml.attribut("value",toString(_nb_inst_reexecute    )); xml.singleton_end();
+    xml.singleton_begin("nb_rename_unit_select"); xml.attribut("value",toString(_nb_rename_unit_select)); xml.singleton_end();
+    xml.singleton_begin("priority             "); xml.attribut("value",toString(_priority             )); xml.singleton_end();
+    xml.singleton_begin("load_balancing       "); xml.attribut("value",toString(_load_balancing       )); xml.singleton_end();
+    for (uint32_t i=0;i<_nb_rename_unit; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","rename_unit");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+	xml.singleton_begin("nb_inst_rename       "); xml.attribut("value",toString(_nb_inst_rename       [i])); xml.singleton_end();
+        xml. balise_close();
+      }
+    xml.balise_close();
+
+    log_end(Issue_queue,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Issue_queue::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters & x)
+  {
+    log_begin(Issue_queue,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Issue_queue,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace issue_queue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libOOO_Engine.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Makefile.deps	(revision 88)
@@ -0,0 +1,80 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+OOO_Engine			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Commit_unit
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/Makefile.deps
+endif
+ifndef Issue_queue
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/Makefile.deps
+endif
+ifndef Reexecute_unit
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.deps
+endif
+ifndef Rename_unit
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.deps
+endif
+ifndef Special_Register_unit
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.deps
+endif
+ifndef OOO_Engine_Glue
+include 			$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+OOO_Engine_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine
+
+#-----[ Library ]------------------------------------------
+
+OOO_Engine_LIBRARY		= 	-lOOO_Engine				\
+					$(Commit_unit_LIBRARY)			\
+					$(Issue_queue_LIBRARY)			\
+					$(Reexecute_unit_LIBRARY)		\
+					$(Rename_unit_LIBRARY)			\
+					$(Special_Register_unit_LIBRARY)	\
+					$(OOO_Engine_Glue_LIBRARY)		\
+					$(Behavioural_LIBRARY)
+
+OOO_Engine_DIR_LIBRARY		=	-L$(OOO_Engine_DIR)/lib			\
+					$(Commit_unit_DIR_LIBRARY)		\
+					$(Issue_queue_DIR_LIBRARY)		\
+					$(Reexecute_unit_DIR_LIBRARY)		\
+					$(Rename_unit_DIR_LIBRARY)		\
+					$(Special_Register_unit_DIR_LIBRARY)	\
+					$(OOO_Engine_Glue_DIR_LIBRARY)		\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+OOO_Engine_library		:
+				@\
+				$(MAKE) Behavioural_library;			\
+				$(MAKE) Commit_unit_library;			\
+				$(MAKE) Issue_queue_library;			\
+				$(MAKE) Reexecute_unit_library;			\
+				$(MAKE) Rename_unit_library;			\
+				$(MAKE) Special_Register_unit_library;		\
+				$(MAKE) OOO_Engine_Glue_library;		\
+				$(MAKE) --directory=$(OOO_Engine_DIR) --makefile=Makefile;
+
+OOO_Engine_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;		\
+				$(MAKE) Commit_unit_library_clean;		\
+				$(MAKE) Issue_queue_library_clean;		\
+				$(MAKE) Reexecute_unit_library_clean;		\
+				$(MAKE) Rename_unit_library_clean;		\
+				$(MAKE) Special_Register_unit_library_clean;	\
+				$(MAKE) OOO_Engine_Glue_library_clean;		\
+				$(MAKE) --directory=$(OOO_Engine_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libOOO_Engine_Glue.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/Makefile.deps	(revision 88)
@@ -0,0 +1,38 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+OOO_Engine_Glue			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+OOO_Engine_Glue_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue
+
+#-----[ Library ]------------------------------------------
+
+OOO_Engine_Glue_LIBRARY		= 	-lOOO_Engine_Glue	\
+					$(Behavioural_LIBRARY)	
+
+OOO_Engine_Glue_DIR_LIBRARY		=	-L$(OOO_Engine_Glue_DIR)/lib	\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+OOO_Engine_Glue_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) --directory=$(OOO_Engine_Glue_DIR) --makefile=Makefile;
+
+OOO_Engine_Glue_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) --directory=$(OOO_Engine_Glue_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(OOO_Engine_Glue_LIBRARY)
+
+DIR_LIBRARY			= $(OOO_Engine_Glue_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: OOO_Engine_Glue_library
+
+library_clean			: OOO_Engine_Glue_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_1-rename_unit_1.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_1-rename_unit_1.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_1-rename_unit_1.cfg	(revision 88)
@@ -0,0 +1,15 @@
+OOO_Engine_Glue
+1	1	*2	# nb_front_end                    
+1	1	*2	# nb_context                      [0] [nb_front_end]
+1	1	*2	# nb_rename_unit                     
+4	4	*2	# nb_inst_decod                   [0] [nb_front_end]
+4	4	*2	# nb_inst_insert                  [0] [nb_rename_unit]
+4	4	*2	# nb_inst_retire                  [0] [nb_rename_unit]
+32	32	*2	# size_general_data                  
+2	2	*2	# size_special_data                  
+0	0	*2	# link_rename_unit_with_front_end [0] [nb_front_end]
+2	2	*2	# size_packet_id                    
+8	8	*2	# size_general_register             
+4	4	*2	# size_special_register             
+4	4	*2	# size_store_queue_ptr              
+4	4	*2	# size_load_queue_ptr               
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_1-rename_unit_4.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_1-rename_unit_4.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_1-rename_unit_4.cfg	(revision 88)
@@ -0,0 +1,21 @@
+OOO_Engine_Glue
+1	1	*2	# nb_front_end                    
+1	1	*2	# nb_context                      [0] [nb_front_end]
+4	4	*2	# nb_rename_unit                     
+4	4	*2	# nb_inst_decod                   [0] [nb_front_end]
+4	4	*2	# nb_inst_insert                  [0] [nb_rename_unit]
+2	2	*2	# nb_inst_insert                  [1] [nb_rename_unit]
+1	1	*2	# nb_inst_insert                  [2] [nb_rename_unit]
+4	4	*2	# nb_inst_insert                  [3] [nb_rename_unit]
+1	1	*2	# nb_inst_retire                  [0] [nb_rename_unit]
+8	8	*2	# nb_inst_retire                  [1] [nb_rename_unit]
+2	2	*2	# nb_inst_retire                  [2] [nb_rename_unit]
+4	4	*2	# nb_inst_retire                  [3] [nb_rename_unit]
+32	32	*2	# size_general_data                  
+2	2	*2	# size_special_data                  
+0	0	*2	# link_rename_unit_with_front_end [0] [nb_front_end]
+2	2	*2	# size_packet_id                    
+8	8	*2	# size_general_register             
+4	4	*2	# size_special_register             
+4	4	*2	# size_store_queue_ptr              
+4	4	*2	# size_load_queue_ptr               
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_4-rename_unit_1.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_4-rename_unit_1.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_4-rename_unit_1.cfg	(revision 88)
@@ -0,0 +1,24 @@
+OOO_Engine_Glue
+4	4	*2	# nb_front_end                    
+4	4	*2	# nb_context                      [0] [nb_front_end]
+1	1	*2	# nb_context                      [1] [nb_front_end]
+2	2	*2	# nb_context                      [2] [nb_front_end]
+8	8	*2	# nb_context                      [3] [nb_front_end]
+1	1	*2	# nb_rename_unit                     
+4	4	*2	# nb_inst_decod                   [0] [nb_front_end]
+2	2	*2	# nb_inst_decod                   [1] [nb_front_end]
+1	1	*2	# nb_inst_decod                   [2] [nb_front_end]
+4	4	*2	# nb_inst_decod                   [3] [nb_front_end]
+4	4	*2	# nb_inst_insert                  [0] [nb_rename_unit]
+4	4	*2	# nb_inst_retire                  [0] [nb_rename_unit]
+32	32	*2	# size_general_data                  
+2	2	*2	# size_special_data                  
+0	0	*2	# link_rename_unit_with_front_end [0] [nb_front_end]
+0	0	*2	# link_rename_unit_with_front_end [1] [nb_front_end]
+0	0	*2	# link_rename_unit_with_front_end [2] [nb_front_end]
+0	0	*2	# link_rename_unit_with_front_end [3] [nb_front_end]
+2	2	*2	# size_packet_id                    
+8	8	*2	# size_general_register             
+4	4	*2	# size_special_register             
+4	4	*2	# size_store_queue_ptr              
+4	4	*2	# size_load_queue_ptr               
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_4-rename_unit_4.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_4-rename_unit_4.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-front_end_4-rename_unit_4.cfg	(revision 88)
@@ -0,0 +1,30 @@
+OOO_Engine_Glue
+4	4	*2	# nb_front_end                    
+4	4	*2	# nb_context                      [0] [nb_front_end]
+1	1	*2	# nb_context                      [1] [nb_front_end]
+2	2	*2	# nb_context                      [2] [nb_front_end]
+8	8	*2	# nb_context                      [3] [nb_front_end]
+4	4	*2	# nb_rename_unit                     
+4	4	*2	# nb_inst_decod                   [0] [nb_front_end]
+2	2	*2	# nb_inst_decod                   [1] [nb_front_end]
+1	1	*2	# nb_inst_decod                   [2] [nb_front_end]
+4	4	*2	# nb_inst_decod                   [3] [nb_front_end]
+4	4	*2	# nb_inst_insert                  [0] [nb_rename_unit]
+2	2	*2	# nb_inst_insert                  [1] [nb_rename_unit]
+1	1	*2	# nb_inst_insert                  [2] [nb_rename_unit]
+4	4	*2	# nb_inst_insert                  [3] [nb_rename_unit]
+1	1	*2	# nb_inst_retire                  [0] [nb_rename_unit]
+8	8	*2	# nb_inst_retire                  [1] [nb_rename_unit]
+2	2	*2	# nb_inst_retire                  [2] [nb_rename_unit]
+4	4	*2	# nb_inst_retire                  [3] [nb_rename_unit]
+32	32	*2	# size_general_data                  
+2	2	*2	# size_special_data                  
+0	0	*2	# link_rename_unit_with_front_end [0] [nb_front_end]
+3	3	*2	# link_rename_unit_with_front_end [1] [nb_front_end]
+1	1	*2	# link_rename_unit_with_front_end [2] [nb_front_end]
+2	2	*2	# link_rename_unit_with_front_end [3] [nb_front_end]
+2	2	*2	# size_packet_id                    
+8	8	*2	# size_general_register             
+4	4	*2	# size_special_register             
+4	4	*2	# size_store_queue_ptr              
+4	4	*2	# size_load_queue_ptr               
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/config-min.cfg	(revision 88)
@@ -0,0 +1,15 @@
+OOO_Engine_Glue
+1	1	*2	# nb_front_end                    
+1	1	*2	# nb_context                      [0] [nb_front_end]
+1	1	*2	# nb_rename_unit                     
+1	1	*2	# nb_inst_decod                   [0] [nb_front_end]
+1	1	*2	# nb_inst_insert                  [0] [nb_rename_unit]
+1	1	*2	# nb_inst_retire                  [0] [nb_rename_unit]
+32	32	*2	# size_general_data                  
+2	2	*2	# size_special_data                  
+0	0	*2	# link_rename_unit_with_front_end [0] [nb_front_end]
+0	0	*2	# size_packet_id                    
+6	6	*2	# size_general_register             
+2	2	*2	# size_special_register             
+1	1	*2	# size_store_queue_ptr              
+0	0	*2	# size_load_queue_ptr               
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,30 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION   1024
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,139 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/include/test.h"
+
+#define NB_PARAMS 9
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_front_end                                     (uint32_t)\n"));
+  err (_(" * nb_context                      [nb_front_end]   (uint32_t)\n"));
+  err (_(" * nb_rename_unit                                   (uint32_t)\n"));
+  err (_(" * nb_inst_decod                   [nb_front_end]   (uint32_t)\n"));
+  err (_(" * nb_inst_insert                  [nb_rename_unit] (uint32_t)\n"));
+  err (_(" * nb_inst_retire                  [nb_rename_unit] (uint32_t)\n"));
+  err (_(" * size_general_data                                (uint32_t)\n"));
+  err (_(" * size_special_data                                (uint32_t)\n"));
+  err (_(" * link_rename_unit_with_front_end [nb_front_end]   (uint32_t)\n"));
+  err (_(" * size_packet_id                                   (uint32_t)\n"));
+  err (_(" * size_general_register                            (uint32_t)\n"));
+  err (_(" * size_special_register                            (uint32_t)\n"));
+  err (_(" * size_store_queue_ptr                             (uint32_t)\n"));
+  err (_(" * size_load_queue_ptr                              (uint32_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t                _nb_front_end                    = fromString<uint32_t>(argv[x++]);
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end))
+    usage (argc, argv);
+
+  uint32_t              * _nb_context                      = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; ++i)
+    _nb_context [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t                _nb_rename_unit                  = fromString<uint32_t>(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_nb_rename_unit))
+    usage (argc, argv);
+
+  uint32_t              * _nb_inst_decod                   = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; ++i)
+    _nb_inst_decod [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t              * _nb_inst_insert                  = new uint32_t [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    _nb_inst_insert [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t              * _nb_inst_retire                  = new uint32_t [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    _nb_inst_retire [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t                _size_general_data               = fromString<uint32_t>(argv[x++]);
+  uint32_t                _size_special_data               = fromString<uint32_t>(argv[x++]);
+  uint32_t              * _link_rename_unit_with_front_end = new uint32_t [_nb_front_end];
+  std::vector<uint32_t> * _translate_front_end_id_from_rename_unit = new std::vector<uint32_t> [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_front_end; ++i)
+    {
+      _link_rename_unit_with_front_end [i] = fromString<uint32_t>(argv[x++]);
+      _translate_front_end_id_from_rename_unit[_link_rename_unit_with_front_end[i]].push_back(i);
+    }
+
+  uint32_t                _size_packet_id                  = fromString<uint32_t>(argv[x++]);
+  uint32_t                _size_general_register           = fromString<uint32_t>(argv[x++]);
+  uint32_t                _size_special_register           = fromString<uint32_t>(argv[x++]);
+  uint32_t                _size_store_queue_ptr            = fromString<uint32_t>(argv[x++]);
+  uint32_t                _size_load_queue_ptr             = fromString<uint32_t>(argv[x++]);
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters
+	(_nb_front_end                     ,
+         _nb_context                       ,
+         _nb_rename_unit                   ,
+         _nb_inst_decod                    ,
+         _nb_inst_insert                   ,
+         _nb_inst_retire                   ,
+         _size_general_data                ,
+         _size_special_data                ,
+         _link_rename_unit_with_front_end  ,
+         _translate_front_end_id_from_rename_unit  ,
+         _size_packet_id                   ,
+         _size_general_register            ,
+         _size_special_register            ,
+         _size_store_queue_ptr             ,
+         _size_load_queue_ptr              ,
+         true //is_toplevel
+         );
+      
+      msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+  
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("OOO_Engine_Glue : no error");
+      else
+	TEST_KO("OOO_Engine_Glue : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  delete [] _translate_front_end_id_from_rename_unit;
+  delete [] _link_rename_unit_with_front_end;
+  delete [] _nb_inst_retire                 ;
+  delete [] _nb_inst_insert                 ;
+  delete [] _nb_inst_decod                  ;
+  delete [] _nb_context                     ;
+
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,502 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  OOO_Engine_Glue * _OOO_Engine_Glue = new OOO_Engine_Glue 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_RENAME_FRONT_END_ID                     ," in_RENAME_FRONT_END_ID                     ",Tcontext_t         ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);                               
+  ALLOC2_SC_SIGNAL(out_RENAME_RENAME_UNIT_FRONT_END_ID         ,"out_RENAME_RENAME_UNIT_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);                               
+
+  ALLOC1_SC_SIGNAL(out_INSERT_VAL                              ,"out_INSERT_VAL                              ",Tcontrol_t         ,_param->_sum_inst_insert);                                                        
+  ALLOC1_SC_SIGNAL( in_INSERT_ACK                              ," in_INSERT_ACK                              ",Tcontrol_t         ,_param->_sum_inst_insert);                                                        
+  ALLOC1_SC_SIGNAL(out_INSERT_RD_USE                           ,"out_INSERT_RD_USE                           ",Tcontrol_t         ,_param->_sum_inst_insert);                                                        
+  ALLOC1_SC_SIGNAL(out_INSERT_RD_NUM_REG                       ,"out_INSERT_RD_NUM_REG                       ",Tgeneral_address_t ,_param->_sum_inst_insert);                                                        
+  ALLOC1_SC_SIGNAL(out_INSERT_RE_USE                           ,"out_INSERT_RE_USE                           ",Tcontrol_t         ,_param->_sum_inst_insert);                                                        
+  ALLOC1_SC_SIGNAL(out_INSERT_RE_NUM_REG                       ,"out_INSERT_RE_NUM_REG                       ",Tspecial_address_t ,_param->_sum_inst_insert);                                                        
+
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_VAL                  ," in_INSERT_RENAME_UNIT_VAL                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_RENAME_UNIT_ACK                  ,"out_INSERT_RENAME_UNIT_ACK                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_FRONT_END_ID         ," in_INSERT_RENAME_UNIT_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_CONTEXT_ID           ," in_INSERT_RENAME_UNIT_CONTEXT_ID           ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_TYPE                 ," in_INSERT_RENAME_UNIT_TYPE                 ",Ttype_t            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_OPERATION            ," in_INSERT_RENAME_UNIT_OPERATION            ",Toperation_t       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NO_EXECUTE           ," in_INSERT_RENAME_UNIT_NO_EXECUTE           ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_HAS_IMMEDIAT         ," in_INSERT_RENAME_UNIT_HAS_IMMEDIAT         ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_IMMEDIAT             ," in_INSERT_RENAME_UNIT_IMMEDIAT             ",Tgeneral_data_t    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE," in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ," in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RA              ," in_INSERT_RENAME_UNIT_READ_RA              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY       ," in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY       ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RB              ," in_INSERT_RENAME_UNIT_READ_RB              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY       ," in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY       ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RC              ," in_INSERT_RENAME_UNIT_READ_RC              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY       ," in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY       ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_WRITE_RD             ," in_INSERT_RENAME_UNIT_WRITE_RD             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD   ," in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW   ," in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_WRITE_RE             ," in_INSERT_RENAME_UNIT_WRITE_RE             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD   ," in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW   ," in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_VAL                  ,"out_INSERT_COMMIT_UNIT_VAL                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_COMMIT_UNIT_ACK                  ," in_INSERT_COMMIT_UNIT_ACK                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_FRONT_END_ID         ,"out_INSERT_COMMIT_UNIT_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_CONTEXT_ID           ,"out_INSERT_COMMIT_UNIT_CONTEXT_ID           ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+//ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID       ,"out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID       ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_TYPE                 ,"out_INSERT_COMMIT_UNIT_TYPE                 ",Ttype_t            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_OPERATION            ,"out_INSERT_COMMIT_UNIT_OPERATION            ",Toperation_t       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NO_EXECUTE           ,"out_INSERT_COMMIT_UNIT_NO_EXECUTE           ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE,"out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RA              ,"out_INSERT_COMMIT_UNIT_READ_RA              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY       ,"out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY       ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RB              ,"out_INSERT_COMMIT_UNIT_READ_RB              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY       ,"out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY       ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RC              ,"out_INSERT_COMMIT_UNIT_READ_RC              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY       ,"out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY       ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_WRITE_RD             ,"out_INSERT_COMMIT_UNIT_WRITE_RD             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD   ,"out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW   ,"out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_WRITE_RE             ,"out_INSERT_COMMIT_UNIT_WRITE_RE             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD   ,"out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW   ,"out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_VAL                  ,"out_INSERT_ISSUE_QUEUE_VAL                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL( in_INSERT_ISSUE_QUEUE_ACK                  ," in_INSERT_ISSUE_QUEUE_ACK                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_CONTEXT_ID           ,"out_INSERT_ISSUE_QUEUE_CONTEXT_ID           ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_FRONT_END_ID         ,"out_INSERT_ISSUE_QUEUE_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_OPERATION            ,"out_INSERT_ISSUE_QUEUE_OPERATION            ",Toperation_t       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_TYPE                 ,"out_INSERT_ISSUE_QUEUE_TYPE                 ",Ttype_t            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE,"out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT         ,"out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT         ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_IMMEDIAT             ,"out_INSERT_ISSUE_QUEUE_IMMEDIAT             ",Tgeneral_data_t    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RA              ,"out_INSERT_ISSUE_QUEUE_READ_RA              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RA           ,"out_INSERT_ISSUE_QUEUE_NUM_REG_RA           ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RB              ,"out_INSERT_ISSUE_QUEUE_READ_RB              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RB           ,"out_INSERT_ISSUE_QUEUE_NUM_REG_RB           ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RC              ,"out_INSERT_ISSUE_QUEUE_READ_RC              ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RC           ,"out_INSERT_ISSUE_QUEUE_NUM_REG_RC           ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_WRITE_RD             ,"out_INSERT_ISSUE_QUEUE_WRITE_RD             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RD           ,"out_INSERT_ISSUE_QUEUE_NUM_REG_RD           ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_WRITE_RE             ,"out_INSERT_ISSUE_QUEUE_WRITE_RE             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+  ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RE           ,"out_INSERT_ISSUE_QUEUE_NUM_REG_RE           ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);                            
+
+//   ALLOC1_SC_SIGNAL(out_RETIRE_VAL                              ,"out_RETIRE_VAL                              ",Tcontrol_t         ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL( in_RETIRE_ACK                              ," in_RETIRE_ACK                              ",Tcontrol_t         ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_OLD_USE                       ,"out_RETIRE_RD_OLD_USE                       ",Tcontrol_t         ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_OLD_NUM_REG                   ,"out_RETIRE_RD_OLD_NUM_REG                   ",Tgeneral_address_t ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_NEW_USE                       ,"out_RETIRE_RD_NEW_USE                       ",Tcontrol_t         ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_NEW_NUM_REG                   ,"out_RETIRE_RD_NEW_NUM_REG                   ",Tgeneral_address_t ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_OLD_USE                       ,"out_RETIRE_RE_OLD_USE                       ",Tcontrol_t         ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_OLD_NUM_REG                   ,"out_RETIRE_RE_OLD_NUM_REG                   ",Tspecial_address_t ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_NEW_USE                       ,"out_RETIRE_RE_NEW_USE                       ",Tcontrol_t         ,_param->_sum_inst_retire);                                                        
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_NEW_NUM_REG                   ,"out_RETIRE_RE_NEW_NUM_REG                   ",Tspecial_address_t ,_param->_sum_inst_retire);                                                        
+
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_VAL                  ,"out_RETIRE_RENAME_UNIT_VAL                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_RENAME_UNIT_ACK                  ," in_RETIRE_RENAME_UNIT_ACK                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_FRONT_END_ID         ,"out_RETIRE_RENAME_UNIT_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_WRITE_RD             ,"out_RETIRE_RENAME_UNIT_WRITE_RD             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD   ,"out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW   ,"out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_WRITE_RE             ,"out_RETIRE_RENAME_UNIT_WRITE_RE             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD   ,"out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW   ,"out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_EVENT_STATE          ,"out_RETIRE_RENAME_UNIT_EVENT_STATE          ",Tevent_state_t     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_VAL                  ," in_RETIRE_COMMIT_UNIT_VAL                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL(out_RETIRE_COMMIT_UNIT_ACK                  ,"out_RETIRE_COMMIT_UNIT_ACK                  ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_FRONT_END_ID         ," in_RETIRE_COMMIT_UNIT_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_WRITE_RD             ," in_RETIRE_COMMIT_UNIT_WRITE_RD             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD   ," in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW   ," in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW   ",Tgeneral_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_WRITE_RE             ," in_RETIRE_COMMIT_UNIT_WRITE_RE             ",Tcontrol_t         ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD   ," in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW   ," in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW   ",Tspecial_address_t ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+//   ALLOC2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_EVENT_STATE          ," in_RETIRE_COMMIT_UNIT_EVENT_STATE          ",Tevent_state_t     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);                            
+
+  ALLOC2_SC_SIGNAL(out_SPR_SR_IEE                              ,"out_SPR_SR_IEE                              ",Tcontrol_t         ,_param->_nb_front_end,_param->_nb_context[it1]);                                  
+  ALLOC2_SC_SIGNAL(out_SPR_SR_EPH                              ,"out_SPR_SR_EPH                              ",Tcontrol_t         ,_param->_nb_front_end,_param->_nb_context[it1]);                                  
+  ALLOC2_SC_SIGNAL(out_SPR_RENAME_UNIT_SR                      ,"out_SPR_RENAME_UNIT_SR                      ",Tspr_t             ,_param->_nb_front_end,_param->_nb_context[it1]);                                  
+  ALLOC2_SC_SIGNAL(out_SPR_COMMIT_UNIT_SR_OVE                  ,"out_SPR_COMMIT_UNIT_SR_OVE                  ",Tcontrol_t         ,_param->_nb_front_end,_param->_nb_context[it1]);                                  
+  ALLOC2_SC_SIGNAL( in_SPR_SPECIAL_REGISTER_UNIT_SR            ," in_SPR_SPECIAL_REGISTER_UNIT_SR            ",Tspr_t             ,_param->_nb_front_end,_param->_nb_context[it1]);                                  
+
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _OOO_Engine_Glue.\n"),name.c_str());
+
+  (*(_OOO_Engine_Glue->in_CLOCK))        (*(in_CLOCK));
+  (*(_OOO_Engine_Glue->in_NRESET))       (*(in_NRESET));
+
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RENAME_FRONT_END_ID                          ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RENAME_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+  INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_VAL                                   ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_ACK                                   ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_RD_USE                                ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_RD_NUM_REG                            ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_RE_USE                                ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_RE_NUM_REG                            ,_param->_sum_inst_insert);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_RENAME_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NO_EXECUTE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_HAS_IMMEDIAT              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_IMMEDIAT                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_COMMIT_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NO_EXECUTE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_ISSUE_QUEUE_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_VAL                                   ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_ACK                                   ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RD_OLD_USE                            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RD_OLD_NUM_REG                        ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RD_NEW_USE                            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RD_NEW_NUM_REG                        ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RE_OLD_USE                            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RE_OLD_NUM_REG                        ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RE_NEW_USE                            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RE_NEW_NUM_REG                        ,_param->_sum_inst_retire);
+
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_RENAME_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   if (_param->_have_port_front_end_id)
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_RENAME_UNIT_EVENT_STATE               ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_RETIRE_COMMIT_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   if (_param->_have_port_front_end_id)
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_RETIRE_COMMIT_UNIT_EVENT_STATE               ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_SPR_SR_IEE                                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_SPR_SR_EPH                                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_SPR_RENAME_UNIT_SR                           ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_SPR_COMMIT_UNIT_SR_OVE                       ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_SPR_SPECIAL_REGISTER_UNIT_SR                 ,_param->_nb_front_end,_param->_nb_context[it1]);                                  
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+//       // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//       for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+//         for (uint32_t j=0; j<_param->_nb_inst_retire[i]; ++j)
+//           {
+            
+//           }
+
+      // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+        for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+          {
+            in_SPR_SPECIAL_REGISTER_UNIT_SR [i][j]->write(rand());
+          }
+
+      SC_START(0);
+
+      // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+        for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+          {
+            Tspr_t sr = in_SPR_SPECIAL_REGISTER_UNIT_SR [i][j]->read();
+
+            TEST(Tspr_t    ,out_SPR_RENAME_UNIT_SR     [i][j]->read(),((sr|(1<<15))&0xf001ffff)); // with FO, and without reserved
+            TEST(Tcontrol_t,out_SPR_SR_IEE             [i][j]->read(),(sr>> 2)&1);
+            TEST(Tcontrol_t,out_SPR_SR_EPH             [i][j]->read(),(sr>>14)&1);
+            TEST(Tcontrol_t,out_SPR_COMMIT_UNIT_SR_OVE [i][j]->read(),(sr>>12)&1);
+          }
+      
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_RENAME_FRONT_END_ID                          ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL(out_RENAME_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+  DELETE1_SC_SIGNAL(out_INSERT_VAL                                   ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_ACK                                   ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RD_USE                                ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RD_NUM_REG                            ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RE_USE                                ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RE_NUM_REG                            ,_param->_sum_inst_insert);
+
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_RENAME_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NO_EXECUTE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_HAS_IMMEDIAT              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_IMMEDIAT                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_COMMIT_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NO_EXECUTE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_ISSUE_QUEUE_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+//   DELETE1_SC_SIGNAL(out_RETIRE_VAL                                   ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL( in_RETIRE_ACK                                   ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_OLD_USE                            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_OLD_NUM_REG                        ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_NEW_USE                            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_NEW_NUM_REG                        ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_OLD_USE                            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_OLD_NUM_REG                        ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_NEW_USE                            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_NEW_NUM_REG                        ,_param->_sum_inst_retire);
+
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_RENAME_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_RENAME_UNIT_EVENT_STATE               ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL(out_RETIRE_COMMIT_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//   DELETE2_SC_SIGNAL( in_RETIRE_COMMIT_UNIT_EVENT_STATE               ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+  DELETE2_SC_SIGNAL(out_SPR_SR_IEE                                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_SR_EPH                                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_RENAME_UNIT_SR                           ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_COMMIT_UNIT_SR_OVE                       ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_SPECIAL_REGISTER_UNIT_SR                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+#endif
+
+  delete _OOO_Engine_Glue;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/OOO_Engine_Glue.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/OOO_Engine_Glue.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/OOO_Engine_Glue.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{OOO_Engine_Glue}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h	(revision 88)
@@ -0,0 +1,256 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_ooo_engine_glue_OOO_Engine_Glue_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_ooo_engine_glue_OOO_Engine_Glue_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+  class OOO_Engine_Glue 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontext_t         ) ***  in_RENAME_FRONT_END_ID                          ;//[nb_front_end][nb_inst_decod]
+  public    : SC_OUT(Tcontext_t         ) *** out_RENAME_RENAME_UNIT_FRONT_END_ID              ;//[nb_front_end][nb_inst_decod]
+
+    // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_INSERT_VAL                                   ;//[sum_inst_insert]
+  public    : SC_IN (Tcontrol_t         )  **  in_INSERT_ACK                                   ;//[sum_inst_insert]
+  public    : SC_OUT(Tcontrol_t         )  ** out_INSERT_RD_USE                                ;//[sum_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t )  ** out_INSERT_RD_NUM_REG                            ;//[sum_inst_insert]
+  public    : SC_OUT(Tcontrol_t         )  ** out_INSERT_RE_USE                                ;//[sum_inst_insert]
+  public    : SC_OUT(Tspecial_address_t )  ** out_INSERT_RE_NUM_REG                            ;//[sum_inst_insert]
+
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_VAL                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_RENAME_UNIT_ACK                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_NO_EXECUTE                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontext_t         ) ***  in_INSERT_RENAME_UNIT_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontext_t         ) ***  in_INSERT_RENAME_UNIT_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Ttype_t            ) ***  in_INSERT_RENAME_UNIT_TYPE                      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Toperation_t       ) ***  in_INSERT_RENAME_UNIT_OPERATION                 ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_HAS_IMMEDIAT              ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_data_t    ) ***  in_INSERT_RENAME_UNIT_IMMEDIAT                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tlsq_ptr_t         ) ***  in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tlsq_ptr_t         ) ***  in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_READ_RA                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_READ_RB                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_READ_RC                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_WRITE_RD                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_RENAME_UNIT_WRITE_RE                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t ) ***  in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
+
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_VAL                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_COMMIT_UNIT_ACK                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontext_t         ) *** out_INSERT_COMMIT_UNIT_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontext_t         ) *** out_INSERT_COMMIT_UNIT_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_insert]
+//public    : SC_OUT(Tcontext_t         ) *** out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Ttype_t            ) *** out_INSERT_COMMIT_UNIT_TYPE                      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Toperation_t       ) *** out_INSERT_COMMIT_UNIT_OPERATION                 ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_NO_EXECUTE                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_READ_RA                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_READ_RB                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_READ_RC                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY            ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_WRITE_RD                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_COMMIT_UNIT_WRITE_RE                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
+
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_VAL                       ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_ISSUE_QUEUE_ACK                       ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontext_t         ) *** out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontext_t         ) *** out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Toperation_t       ) *** out_INSERT_ISSUE_QUEUE_OPERATION                 ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Ttype_t            ) *** out_INSERT_ISSUE_QUEUE_TYPE                      ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tgeneral_data_t    ) *** out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RA                   ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RB                   ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RC                   ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_WRITE_RD                  ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_WRITE_RE                  ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ;//[nb_rename_unit][nb_inst_rename]
+
+//     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//   public    : SC_OUT(Tcontrol_t         )  ** out_RETIRE_VAL                                   ;//[sum_inst_retire]
+//   public    : SC_IN (Tcontrol_t         )  **  in_RETIRE_ACK                                   ;//[sum_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         )  ** out_RETIRE_RD_OLD_USE                            ;//[sum_inst_retire] 
+//   public    : SC_OUT(Tgeneral_address_t )  ** out_RETIRE_RD_OLD_NUM_REG                        ;//[sum_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         )  ** out_RETIRE_RD_NEW_USE                            ;//[sum_inst_retire]
+//   public    : SC_OUT(Tgeneral_address_t )  ** out_RETIRE_RD_NEW_NUM_REG                        ;//[sum_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         )  ** out_RETIRE_RE_OLD_USE                            ;//[sum_inst_retire] 
+//   public    : SC_OUT(Tspecial_address_t )  ** out_RETIRE_RE_OLD_NUM_REG                        ;//[sum_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         )  ** out_RETIRE_RE_NEW_USE                            ;//[sum_inst_retire]
+//   public    : SC_OUT(Tspecial_address_t )  ** out_RETIRE_RE_NEW_NUM_REG                        ;//[sum_inst_retire]
+
+//   public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_RENAME_UNIT_VAL                       ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tcontrol_t         ) ***  in_RETIRE_RENAME_UNIT_ACK                       ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tcontext_t         ) *** out_RETIRE_RENAME_UNIT_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_RENAME_UNIT_WRITE_RD                  ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tgeneral_address_t ) *** out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_RENAME_UNIT_WRITE_RE                  ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tspecial_address_t ) *** out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tspecial_address_t ) *** out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tevent_state_t     ) *** out_RETIRE_RENAME_UNIT_EVENT_STATE               ;//[nb_rename_unit][nb_inst_retire]
+
+//   public    : SC_IN (Tcontrol_t         ) ***  in_RETIRE_COMMIT_UNIT_VAL                       ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t         ) *** out_RETIRE_COMMIT_UNIT_ACK                       ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tcontext_t         ) ***  in_RETIRE_COMMIT_UNIT_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tcontrol_t         ) ***  in_RETIRE_COMMIT_UNIT_WRITE_RD                  ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tgeneral_address_t ) ***  in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tgeneral_address_t ) ***  in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tcontrol_t         ) ***  in_RETIRE_COMMIT_UNIT_WRITE_RE                  ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tspecial_address_t ) ***  in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tspecial_address_t ) ***  in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_retire]
+//   public    : SC_IN (Tevent_state_t     ) ***  in_RETIRE_COMMIT_UNIT_EVENT_STATE               ;//[nb_rename_unit][nb_inst_retire]
+
+    // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_SR_IEE                                   ;//[nb_front_end][nb_context] - Interrupt Exception Enabled
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_SR_EPH                                   ;//[nb_front_end][nb_context] - Exception Prefix High
+  public    : SC_OUT(Tspr_t             ) *** out_SPR_RENAME_UNIT_SR                           ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_COMMIT_UNIT_SR_OVE                       ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tspr_t             ) ***  in_SPR_SPECIAL_REGISTER_UNIT_SR                 ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (OOO_Engine_Glue);
+#endif
+  public  :          OOO_Engine_Glue              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~OOO_Engine_Glue             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  public  : void        transition                (void);
+//public  : void        genMoore                  (void);
+  public  : void        genMealy_rename           (void);
+  public  : void        genMealy_insert_valack    (void);
+  public  : void        genMealy_insert           (void);
+  public  : void        genMealy_retire_valack    (void);
+  public  : void        genMealy_retire           (void);
+  public  : void        genMealy_spr              (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h	(revision 88)
@@ -0,0 +1,100 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_ooo_engine_glue_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_ooo_engine_glue_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Types.h"
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+#include <vector>
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+// #define translateFrontEndIdToRenameUnit(front_end_id)                   _param->_translate_front_end_id_to_rename_unit[front_end_id]
+// #define translateFrontEndIdFromRenameUnit(num_rename_unit,front_end_id) _param->_translate_front_end_id_from_rename_unit[num_rename_unit][front_end_id]
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t                _nb_front_end                           ;
+  public : uint32_t              * _nb_context                             ;//[nb_front_end]
+  public : uint32_t                _nb_rename_unit                         ;
+  public : uint32_t              * _nb_inst_decod                          ;//[nb_front_end]
+  public : uint32_t              * _nb_inst_insert                         ;//[nb_rename_unit]
+  public : uint32_t              * _nb_inst_retire                         ;//[nb_rename_unit]
+//public : uint32_t                _size_general_data                      ;
+//public : uint32_t                _size_special_data                      ;
+  public : uint32_t              * _link_rename_unit_with_front_end        ;//[nb_front_end]
+  public : std::vector<uint32_t> * _translate_front_end_id_from_rename_unit;//[nb_rename_unit]
+//public : uint32_t                _size_packet_id                         ;
+//public : uint32_t                _size_general_register                  ;
+//public : uint32_t                _size_special_register                  ;
+//public : uint32_t                _size_store_queue_ptr                   ;
+//public : uint32_t                _size_load_queue_ptr                    ;
+                                                                           
+//public : uint32_t              * _rename_unit_nb_front_end               ;//[nb_rename_unit]
+//public : uint32_t             ** _rename_unit_nb_context                 ;//[nb_rename_unit][nb_front_end]
+//public : uint32_t              * _rename_unit_size_front_end_id          ;//[nb_rename_unit]
+//public : uint32_t              * _rename_unit_size_context_id            ;//[nb_rename_unit]
+//public : uint32_t                _size_front_end_id                      ;
+//public : uint32_t                _size_context_id                        ;
+  public : uint32_t                _size_rename_id                         ;
+  public : uint32_t                _sum_inst_insert                        ;
+//public : uint32_t                _sum_inst_retire                        ;
+  public : uint32_t              * _translate_front_end_id_to_rename_unit  ;//[nb_front_end]
+  public : Tgeneral_address_t      _mask_num_general_register              ;
+  public : Tspecial_address_t      _mask_num_special_register              ;
+
+//public : bool                    _have_port_front_end_id                 ;
+//public : bool                    _have_port_context_id                   ;
+//public : bool                    _have_port_packet_id                    ;
+//public : bool                    _have_port_load_queue_ptr               ;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t                nb_front_end                           ,
+                        uint32_t              * nb_context                             ,
+                        uint32_t                nb_rename_unit                         ,
+                        uint32_t              * nb_inst_decod                          ,
+                        uint32_t              * nb_inst_insert                         ,
+                        uint32_t              * nb_inst_retire                         ,
+                        uint32_t                size_general_data                      ,
+                        uint32_t                size_special_data                      ,
+                        uint32_t              * link_rename_unit_with_front_end        ,
+                        std::vector<uint32_t> * translate_front_end_id_from_rename_unit,
+                        uint32_t                size_packet_id                         ,
+                        uint32_t                size_general_register                  ,
+                        uint32_t                size_special_register                  ,
+                        uint32_t                size_store_queue_ptr                   ,
+                        uint32_t                size_load_queue_ptr                    ,
+                        bool                    is_toplevel=false);
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters & x);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Types.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Types.h	(revision 88)
@@ -0,0 +1,29 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_ooo_engine_glue_Types_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_ooo_engine_glue_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp	(revision 88)
@@ -0,0 +1,259 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::OOO_Engine_Glue"
+  OOO_Engine_Glue::OOO_Engine_Glue 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_OOO_Engine_Glue == true
+    log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
+    log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+// 	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str());
+
+// 	SC_METHOD (genMoore);
+// 	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+// # ifdef SYSTEMCASS_SPECIFIC
+// 	// List dependency information
+// # endif    
+
+        if (_param->_have_port_front_end_id)
+          {
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMealy_rename"),_name.c_str());
+
+	SC_METHOD (genMealy_rename);
+	dont_initialize ();
+	//sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+        for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+          for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
+            sensitive << (*(in_RENAME_FRONT_END_ID [i][j]));
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+          }
+
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMealy_insert_valack"),_name.c_str());
+
+	SC_METHOD (genMealy_insert_valack);
+	dont_initialize ();
+	//sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+        {
+          uint32_t x=0;
+          for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+            for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j)
+              sensitive << (*(in_INSERT_ACK                    [x++] ))
+                        << (*(in_INSERT_RENAME_UNIT_VAL        [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NO_EXECUTE [i][j]))
+                        << (*(in_INSERT_COMMIT_UNIT_ACK        [i][j]))
+                        << (*(in_INSERT_ISSUE_QUEUE_ACK        [i][j]));
+        }
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMealy_insert"),_name.c_str());
+
+	SC_METHOD (genMealy_insert);
+	dont_initialize ();
+	//sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+
+        for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+          for (uint32_t j=0; j<_param->_nb_inst_insert[i];++j)
+            {
+              if (_param->_have_port_front_end_id)
+              sensitive << (*(in_INSERT_RENAME_UNIT_FRONT_END_ID          [i][j]));
+              if (_param->_have_port_context_id)
+              sensitive << (*(in_INSERT_RENAME_UNIT_CONTEXT_ID            [i][j]));
+              if (_param->_have_port_load_queue_ptr)
+              sensitive << (*(in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE  [i][j]));
+              sensitive << (*(in_INSERT_RENAME_UNIT_TYPE                  [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_OPERATION             [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NO_EXECUTE            [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_HAS_IMMEDIAT          [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_IMMEDIAT              [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_READ_RA               [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY        [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_READ_RB               [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY        [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_READ_RC               [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY        [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_WRITE_RD              [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD    [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW    [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_WRITE_RE              [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD    [i][j]))
+                        << (*(in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW    [i][j]));
+            }
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+// 	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMealy_retire_valack"),_name.c_str());
+
+// 	SC_METHOD (genMealy_retire_valack);
+// 	dont_initialize ();
+// 	//sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+//         {
+//           uint32_t x=0;
+//           for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+//             for (uint32_t j=0; j<_param->_nb_inst_retire[i]; ++j)
+//               sensitive 
+//              << (*(in_RETIRE_ACK             [x++]))  
+//                 << (*(in_RETIRE_RENAME_UNIT_ACK [i][j])) 
+//                 << (*(in_RETIRE_COMMIT_UNIT_VAL [i][j]));
+//         }
+
+// # ifdef SYSTEMCASS_SPECIFIC
+// 	// List dependency information
+// # endif    
+
+// 	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMealy_retire"),_name.c_str());
+
+// 	SC_METHOD (genMealy_retire);
+// 	dont_initialize ();
+// 	//sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+//         for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+//           for (uint32_t j=0; j<_param->_nb_inst_retire[i]; ++j)
+//             {
+//               if (_param->_have_port_front_end_id)
+//               sensitive << (*( in_RETIRE_COMMIT_UNIT_FRONT_END_ID       [i][j]));
+//               sensitive << (*( in_RETIRE_COMMIT_UNIT_WRITE_RD           [i][j]))
+//                         << (*( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD [i][j]))
+//                         << (*( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW [i][j]))
+//                         << (*( in_RETIRE_COMMIT_UNIT_WRITE_RE           [i][j]))
+//                         << (*( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD [i][j]))
+//                         << (*( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW [i][j]))
+//                         << (*( in_RETIRE_COMMIT_UNIT_EVENT_STATE        [i][j]));
+//             }
+
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Method - genMealy_spr"),_name.c_str());
+
+	SC_METHOD (genMealy_spr);
+	dont_initialize ();
+	//sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+        for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+          for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+            sensitive << (*(in_SPR_SPECIAL_REGISTER_UNIT_SR [i][j]));
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	
+#endif
+      }
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::~OOO_Engine_Glue"
+  OOO_Engine_Glue::~OOO_Engine_Glue (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp	(revision 88)
@@ -0,0 +1,219 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::allocation"
+  void OOO_Engine_Glue::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"OOO_Engine_Glue"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("rename",IN, SOUTH,_("rename's interface"),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      
+      _ALLOC2_SIGNAL_IN ( in_RENAME_FRONT_END_ID                          ,"FRONT_END_ID"                          ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_OUT(out_RENAME_RENAME_UNIT_FRONT_END_ID              ,"RENAME_UNIT_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+    }
+    
+    // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert);
+
+      ALLOC1_SIGNAL_OUT (out_INSERT_VAL                                   ,"VAL"                                   ,Tcontrol_t         ,1                             );
+      ALLOC1_SIGNAL_IN  ( in_INSERT_ACK                                   ,"ACK"                                   ,Tcontrol_t         ,1                             );
+      ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE                                ,"RD_USE"                                ,Tcontrol_t         ,1                             );
+      ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG                            ,"RD_NUM_REG"                            ,Tgeneral_address_t ,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE                                ,"RE_USE"                                ,Tcontrol_t         ,1                             );
+      ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG                            ,"RE_NUM_REG"                            ,Tspecial_address_t ,_param->_size_general_register);
+    }
+
+    {
+      ALLOC2_INTERFACE("insert",IN, EAST,_("insert's interface"),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_VAL                       ,"RENAME_UNIT_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_RENAME_UNIT_ACK                       ,"RENAME_UNIT_ACK"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_FRONT_END_ID              ,"RENAME_UNIT_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_CONTEXT_ID                ,"RENAME_UNIT_CONTEXT_ID"                ,Tcontext_t         ,_param->_size_context_id      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_TYPE                      ,"RENAME_UNIT_TYPE"                      ,Ttype_t            ,_param->_size_type            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_OPERATION                 ,"RENAME_UNIT_OPERATION"                 ,Toperation_t       ,_param->_size_operation       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NO_EXECUTE                ,"RENAME_UNIT_NO_EXECUTE"                ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_HAS_IMMEDIAT              ,"RENAME_UNIT_HAS_IMMEDIAT"              ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_IMMEDIAT                  ,"RENAME_UNIT_IMMEDIAT"                  ,Tgeneral_data_t    ,_param->_size_general_data    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE     ,"RENAME_UNIT_STORE_QUEUE_PTR_WRITE"     ,Tlsq_ptr_t         ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE      ,"RENAME_UNIT_LOAD_QUEUE_PTR_WRITE"      ,Tlsq_ptr_t         ,_param->_size_load_queue_ptr  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_READ_RA                   ,"RENAME_UNIT_READ_RA"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY            ,"RENAME_UNIT_NUM_REG_RA_PHY"            ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_READ_RB                   ,"RENAME_UNIT_READ_RB"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY            ,"RENAME_UNIT_NUM_REG_RB_PHY"            ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_READ_RC                   ,"RENAME_UNIT_READ_RC"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY            ,"RENAME_UNIT_NUM_REG_RC_PHY"            ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_WRITE_RD                  ,"RENAME_UNIT_WRITE_RD"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,"RENAME_UNIT_NUM_REG_RD_PHY_OLD"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,"RENAME_UNIT_NUM_REG_RD_PHY_NEW"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_WRITE_RE                  ,"RENAME_UNIT_WRITE_RE"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,"RENAME_UNIT_NUM_REG_RE_PHY_OLD"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,"RENAME_UNIT_NUM_REG_RE_PHY_NEW"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_VAL                       ,"COMMIT_UNIT_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_COMMIT_UNIT_ACK                       ,"COMMIT_UNIT_ACK"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_FRONT_END_ID              ,"COMMIT_UNIT_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_CONTEXT_ID                ,"COMMIT_UNIT_CONTEXT_ID"                ,Tcontext_t         ,_param->_size_context_id      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+//    _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID            ,"COMMIT_UNIT_RENAME_UNIT_ID"            ,Tcontext_t         ,_param->_size_rename_unit_id  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_TYPE                      ,"COMMIT_UNIT_TYPE"                      ,Ttype_t            ,_param->_size_type            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_OPERATION                 ,"COMMIT_UNIT_OPERATION"                 ,Toperation_t       ,_param->_size_operation       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NO_EXECUTE                ,"COMMIT_UNIT_NO_EXECUTE"                ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE     ,"COMMIT_UNIT_STORE_QUEUE_PTR_WRITE"     ,Tlsq_ptr_t         ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE      ,"COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE"      ,Tlsq_ptr_t         ,_param->_size_load_queue_ptr  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_READ_RA                   ,"COMMIT_UNIT_READ_RA"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY            ,"COMMIT_UNIT_NUM_REG_RA_PHY"            ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_READ_RB                   ,"COMMIT_UNIT_READ_RB"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY            ,"COMMIT_UNIT_NUM_REG_RB_PHY"            ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_READ_RC                   ,"COMMIT_UNIT_READ_RC"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY            ,"COMMIT_UNIT_NUM_REG_RC_PHY"            ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_WRITE_RD                  ,"COMMIT_UNIT_WRITE_RD"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,"COMMIT_UNIT_NUM_REG_RD_PHY_OLD"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,"COMMIT_UNIT_NUM_REG_RD_PHY_NEW"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_WRITE_RE                  ,"COMMIT_UNIT_WRITE_RE"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,"COMMIT_UNIT_NUM_REG_RE_PHY_OLD"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,"COMMIT_UNIT_NUM_REG_RE_PHY_NEW"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_VAL                       ,"ISSUE_QUEUE_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_ISSUE_QUEUE_ACK                       ,"ISSUE_QUEUE_ACK"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ,"ISSUE_QUEUE_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ,"ISSUE_QUEUE_CONTEXT_ID"                ,Tcontext_t         ,_param->_size_context_id      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_OPERATION                 ,"ISSUE_QUEUE_OPERATION"                 ,Toperation_t       ,_param->_size_operation       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_TYPE                      ,"ISSUE_QUEUE_TYPE"                      ,Ttype_t            ,_param->_size_type            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ,"ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE"     ,Tlsq_ptr_t         ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ,"ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE"      ,Tlsq_ptr_t         ,_param->_size_load_queue_ptr  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ,"ISSUE_QUEUE_HAS_IMMEDIAT"              ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ,"ISSUE_QUEUE_IMMEDIAT"                  ,Tgeneral_data_t    ,_param->_size_general_data    ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_READ_RA                   ,"ISSUE_QUEUE_READ_RA"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ,"ISSUE_QUEUE_NUM_REG_RA"                ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_READ_RB                   ,"ISSUE_QUEUE_READ_RB"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ,"ISSUE_QUEUE_NUM_REG_RB"                ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_READ_RC                   ,"ISSUE_QUEUE_READ_RC"                   ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ,"ISSUE_QUEUE_NUM_REG_RC"                ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_WRITE_RD                  ,"ISSUE_QUEUE_WRITE_RD"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ,"ISSUE_QUEUE_NUM_REG_RD"                ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_WRITE_RE                  ,"ISSUE_QUEUE_WRITE_RE"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ,"ISSUE_QUEUE_NUM_REG_RE"                ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+    }
+
+//     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//     {
+//       ALLOC1_INTERFACE("retire",OUT, WEST,_("retire's interface"),_param->_sum_inst_retire);
+      
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_VAL                                   ,"VAL"                                   ,Tcontrol_t         ,1                             );
+//       ALLOC1_SIGNAL_IN  ( in_RETIRE_ACK                                   ,"ACK"                                   ,Tcontrol_t         ,1                             );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_USE                            ,"RD_OLD_USE"                            ,Tcontrol_t         ,1                             );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_NUM_REG                        ,"RD_OLD_NUM_REG"                        ,Tgeneral_address_t ,_param->_size_general_register);
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_USE                            ,"RD_NEW_USE"                            ,Tcontrol_t         ,1                             );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_NUM_REG                        ,"RD_NEW_NUM_REG"                        ,Tgeneral_address_t ,_param->_size_general_register);
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_USE                            ,"RE_OLD_USE"                            ,Tcontrol_t         ,1                             );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_NUM_REG                        ,"RE_OLD_NUM_REG"                        ,Tspecial_address_t ,_param->_size_special_register);
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE                            ,"RE_NEW_USE"                            ,Tcontrol_t         ,1                             );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG                        ,"RE_NEW_NUM_REG"                        ,Tspecial_address_t ,_param->_size_special_register);
+//     }
+
+//     {
+//       ALLOC2_INTERFACE("retire",IN, EAST,_("retire's interface"),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_VAL                       ,"RENAME_UNIT_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_RENAME_UNIT_ACK                       ,"RENAME_UNIT_ACK"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_FRONT_END_ID              ,"RENAME_UNIT_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_WRITE_RD                  ,"RENAME_UNIT_WRITE_RD"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,"RENAME_UNIT_NUM_REG_RD_PHY_OLD"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,"RENAME_UNIT_NUM_REG_RD_PHY_NEW"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_WRITE_RE                  ,"RENAME_UNIT_WRITE_RE"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,"RENAME_UNIT_NUM_REG_RE_PHY_OLD"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,"RENAME_UNIT_NUM_REG_RE_PHY_NEW"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_EVENT_STATE               ,"RENAME_UNIT_EVENT_STATE"               ,Tevent_state_t     ,_param->_size_event_state     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_VAL                       ,"COMMIT_UNIT_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_OUT(out_RETIRE_COMMIT_UNIT_ACK                       ,"COMMIT_UNIT_ACK"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_FRONT_END_ID              ,"COMMIT_UNIT_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_WRITE_RD                  ,"COMMIT_UNIT_WRITE_RD"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,"COMMIT_UNIT_NUM_REG_RD_PHY_OLD"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,"COMMIT_UNIT_NUM_REG_RD_PHY_NEW"        ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_WRITE_RE                  ,"COMMIT_UNIT_WRITE_RE"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,"COMMIT_UNIT_NUM_REG_RE_PHY_OLD"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,"COMMIT_UNIT_NUM_REG_RE_PHY_NEW"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_EVENT_STATE               ,"COMMIT_UNIT_EVENT_STATE"               ,Tevent_state_t     ,_param->_size_event_state     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//     }
+
+    // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr",IN, NORTH,_("spr's interface"),_param->_nb_front_end,_param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE                                   ,"SR_IEE"                                ,Tcontrol_t         ,1                             ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_SR_EPH                                   ,"SR_EPH"                                ,Tcontrol_t         ,1                             ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_RENAME_UNIT_SR                           ,"RENAME_UNIT_SR"                        ,Tspr_t             ,_param->_size_spr             ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_COMMIT_UNIT_SR_OVE                       ,"COMMIT_UNIT_SR_OVE"                    ,Tcontrol_t         ,1                             ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_SPECIAL_REGISTER_UNIT_SR                 ,"SPECIAL_REGISTER_UNIT_SR"              ,Tspr_t             ,_param->_size_spr             ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
+#endif
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp	(revision 88)
@@ -0,0 +1,160 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::deallocation"
+  void OOO_Engine_Glue::deallocation (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+        DELETE2_SIGNAL( in_RENAME_FRONT_END_ID                          ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_front_end_id    );
+        DELETE2_SIGNAL(out_RENAME_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_front_end_id    );
+
+        DELETE1_SIGNAL(out_INSERT_VAL                                   ,_param->_sum_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_ACK                                   ,_param->_sum_inst_insert,1                             );
+        DELETE1_SIGNAL(out_INSERT_RD_USE                                ,_param->_sum_inst_insert,1                             );
+        DELETE1_SIGNAL(out_INSERT_RD_NUM_REG                            ,_param->_sum_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL(out_INSERT_RE_USE                                ,_param->_sum_inst_insert,1                             );
+        DELETE1_SIGNAL(out_INSERT_RE_NUM_REG                            ,_param->_sum_inst_insert,_param->_size_general_register);
+
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_RENAME_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_front_end_id    );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_context_id      );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type            );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation       );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NO_EXECUTE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_HAS_IMMEDIAT              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_IMMEDIAT                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_data    );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_load_queue_ptr  );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+        DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_COMMIT_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_front_end_id    );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_context_id      );
+//      DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_rename_unit_id  );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type            );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation       );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_load_queue_ptr  );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+        DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL( in_INSERT_ISSUE_QUEUE_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_front_end_id    );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_context_id      );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_OPERATION                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation       );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_TYPE                      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type            );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_load_queue_ptr  );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_data    );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RA                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RB                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_READ_RC                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register);
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                             );
+        DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_special_register);
+
+//         DELETE1_SIGNAL(out_RETIRE_VAL                                   ,_param->_sum_inst_retire,1                             );
+//         DELETE1_SIGNAL( in_RETIRE_ACK                                   ,_param->_sum_inst_retire,1                             );
+//         DELETE1_SIGNAL(out_RETIRE_RD_OLD_USE                            ,_param->_sum_inst_retire,1                             );
+//         DELETE1_SIGNAL(out_RETIRE_RD_OLD_NUM_REG                        ,_param->_sum_inst_retire,_param->_size_general_register);
+//         DELETE1_SIGNAL(out_RETIRE_RD_NEW_USE                            ,_param->_sum_inst_retire,1                             );
+//         DELETE1_SIGNAL(out_RETIRE_RD_NEW_NUM_REG                        ,_param->_sum_inst_retire,_param->_size_general_register);
+//         DELETE1_SIGNAL(out_RETIRE_RE_OLD_USE                            ,_param->_sum_inst_retire,1                             );
+//         DELETE1_SIGNAL(out_RETIRE_RE_OLD_NUM_REG                        ,_param->_sum_inst_retire,_param->_size_special_register);
+//         DELETE1_SIGNAL(out_RETIRE_RE_NEW_USE                            ,_param->_sum_inst_retire,1                             );
+//         DELETE1_SIGNAL(out_RETIRE_RE_NEW_NUM_REG                        ,_param->_sum_inst_retire,_param->_size_special_register);
+
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL( in_RETIRE_RENAME_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_front_end_id    );
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register);
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register);
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register);
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register);
+//         DELETE2_SIGNAL(out_RETIRE_RENAME_UNIT_EVENT_STATE               ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_event_state     );
+
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_VAL                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL(out_RETIRE_COMMIT_UNIT_ACK                       ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_FRONT_END_ID              ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_front_end_id    );
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_WRITE_RD                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register);
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_general_register);
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_WRITE_RE                  ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1                             );
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register);
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register);
+//         DELETE2_SIGNAL( in_RETIRE_COMMIT_UNIT_EVENT_STATE               ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_event_state     );
+
+        DELETE2_SIGNAL(out_SPR_SR_IEE                                   ,_param->_nb_front_end,_param->_nb_context[it1],1                             );
+        DELETE2_SIGNAL(out_SPR_SR_EPH                                   ,_param->_nb_front_end,_param->_nb_context[it1],1                             );
+        DELETE2_SIGNAL(out_SPR_RENAME_UNIT_SR                           ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr             );
+        DELETE2_SIGNAL(out_SPR_COMMIT_UNIT_SR_OVE                       ,_param->_nb_front_end,_param->_nb_context[it1],1                             );
+        DELETE2_SIGNAL( in_SPR_SPECIAL_REGISTER_UNIT_SR                 ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr             );
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    delete _component;
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_end_cycle.cpp	(revision 88)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::end_cycle"
+void OOO_Engine_Glue::end_cycle ()
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp	(revision 88)
@@ -0,0 +1,119 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::genMealy_insert"
+  void OOO_Engine_Glue::genMealy_insert (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_function(OOO_Engine_Glue,FUNCTION,_name.c_str());
+
+    uint32_t x=0;
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j)
+        {
+          Tcontext_t         FRONT_END_ID          = (_param->_have_port_front_end_id  )?_param->_translate_front_end_id_from_rename_unit[i][PORT_READ(in_INSERT_RENAME_UNIT_FRONT_END_ID [i][j])]:0;
+          Tcontext_t         CONTEXT_ID            = (_param->_have_port_context_id    )?PORT_READ(in_INSERT_RENAME_UNIT_CONTEXT_ID           [i][j]):0;
+          Ttype_t            TYPE                  = PORT_READ(in_INSERT_RENAME_UNIT_TYPE                  [i][j]);
+          Toperation_t       OPERATION             = PORT_READ(in_INSERT_RENAME_UNIT_OPERATION             [i][j]);
+          Tcontrol_t         NO_EXECUTE            = PORT_READ(in_INSERT_RENAME_UNIT_NO_EXECUTE            [i][j]);
+          Tcontrol_t         HAS_IMMEDIAT          = PORT_READ(in_INSERT_RENAME_UNIT_HAS_IMMEDIAT          [i][j]);
+          Tgeneral_data_t    IMMEDIAT              = PORT_READ(in_INSERT_RENAME_UNIT_IMMEDIAT              [i][j]);
+          Tlsq_ptr_t         STORE_QUEUE_PTR_WRITE = PORT_READ(in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE [i][j]);
+          Tlsq_ptr_t         LOAD_QUEUE_PTR_WRITE  = (_param->_have_port_load_queue_ptr)?PORT_READ(in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE [i][j]):0;
+          Tcontrol_t         READ_RA               = PORT_READ(in_INSERT_RENAME_UNIT_READ_RA               [i][j]);
+          Tgeneral_address_t NUM_REG_RA_PHY        = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY        [i][j]);
+          Tcontrol_t         READ_RB               = PORT_READ(in_INSERT_RENAME_UNIT_READ_RB               [i][j]);
+          Tgeneral_address_t NUM_REG_RB_PHY        = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY        [i][j]);
+          Tcontrol_t         READ_RC               = PORT_READ(in_INSERT_RENAME_UNIT_READ_RC               [i][j]);
+          Tspecial_address_t NUM_REG_RC_PHY        = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY        [i][j]);
+          Tcontrol_t         WRITE_RD              = PORT_READ(in_INSERT_RENAME_UNIT_WRITE_RD              [i][j]);
+          Tgeneral_address_t NUM_REG_RD_PHY_OLD    = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD    [i][j]);
+          Tgeneral_address_t NUM_REG_RD_PHY_NEW    = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW    [i][j]);
+          Tcontrol_t         WRITE_RE              = PORT_READ(in_INSERT_RENAME_UNIT_WRITE_RE              [i][j]);
+          Tspecial_address_t NUM_REG_RE_PHY_OLD    = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD    [i][j]);
+          Tspecial_address_t NUM_REG_RE_PHY_NEW    = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW    [i][j]);
+
+          Tgeneral_address_t general_address_msb   = FRONT_END_ID << _param->_size_general_register;
+          Tspecial_address_t special_address_msb   = FRONT_END_ID << _param->_size_special_register;
+          
+          PORT_WRITE(out_INSERT_RD_USE                            [x]   ,WRITE_RD);
+          PORT_WRITE(out_INSERT_RD_NUM_REG                        [x]   ,general_address_msb | NUM_REG_RD_PHY_NEW);
+          PORT_WRITE(out_INSERT_RE_USE                            [x]   ,WRITE_RE);
+          PORT_WRITE(out_INSERT_RE_NUM_REG                        [x]   ,special_address_msb | NUM_REG_RE_PHY_NEW);
+
+          if (_param->_have_port_front_end_id)
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_FRONT_END_ID          [i][j],FRONT_END_ID         );
+          if (_param->_have_port_context_id)
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_CONTEXT_ID            [i][j],CONTEXT_ID           );
+//        PORT_WRITE(out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID        [i][j],RENAME_UNIT_ID       );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_TYPE                  [i][j],TYPE                 );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_OPERATION             [i][j],OPERATION            );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NO_EXECUTE            [i][j],NO_EXECUTE           );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE [i][j],STORE_QUEUE_PTR_WRITE);
+          if (_param->_have_port_load_queue_ptr)
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE  [i][j],LOAD_QUEUE_PTR_WRITE );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_READ_RA               [i][j],READ_RA              );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY        [i][j],NUM_REG_RA_PHY       );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_READ_RB               [i][j],READ_RB              );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY        [i][j],NUM_REG_RB_PHY       );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_READ_RC               [i][j],READ_RC              );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY        [i][j],NUM_REG_RC_PHY       );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_WRITE_RD              [i][j],WRITE_RD             );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD    [i][j],NUM_REG_RD_PHY_OLD   );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW    [i][j],NUM_REG_RD_PHY_NEW   );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_WRITE_RE              [i][j],WRITE_RE             );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD    [i][j],NUM_REG_RE_PHY_OLD   );
+          PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW    [i][j],NUM_REG_RE_PHY_NEW   );
+
+          if (_param->_have_port_front_end_id)
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_FRONT_END_ID          [i][j],FRONT_END_ID         );
+          if (_param->_have_port_context_id)
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_CONTEXT_ID            [i][j],CONTEXT_ID           );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_TYPE                  [i][j],TYPE                 );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_OPERATION             [i][j],OPERATION            );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE [i][j],STORE_QUEUE_PTR_WRITE);
+          if (_param->_have_port_load_queue_ptr)
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE  [i][j],LOAD_QUEUE_PTR_WRITE );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT          [i][j],HAS_IMMEDIAT         );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_IMMEDIAT              [i][j],IMMEDIAT             );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_READ_RA               [i][j],READ_RA              );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RA            [i][j],general_address_msb | NUM_REG_RA_PHY);
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_READ_RB               [i][j],READ_RB              );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RB            [i][j],general_address_msb | NUM_REG_RB_PHY);
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_READ_RC               [i][j],READ_RC              );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RC            [i][j],special_address_msb | NUM_REG_RC_PHY);
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_WRITE_RD              [i][j],WRITE_RD             );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RD            [i][j],general_address_msb | NUM_REG_RD_PHY_NEW);
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_WRITE_RE              [i][j],WRITE_RE             );
+          PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RE            [i][j],special_address_msb | NUM_REG_RE_PHY_NEW);
+
+          x ++;
+        }
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp	(revision 88)
@@ -0,0 +1,102 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::genMealy_insert_valack"
+  void OOO_Engine_Glue::genMealy_insert_valack (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_function(OOO_Engine_Glue,FUNCTION,_name.c_str());
+
+    uint32_t x=0;
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      {
+        // Transaction must be in-order
+//         Tcontrol_t previous_transaction = true;
+
+        for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j)
+          {
+            Tcontrol_t ack                    = PORT_READ(in_INSERT_ACK                    [x]   );
+            Tcontrol_t rename_unit_val        = PORT_READ(in_INSERT_RENAME_UNIT_VAL        [i][j]);
+            Tcontrol_t rename_unit_no_execute = PORT_READ(in_INSERT_RENAME_UNIT_NO_EXECUTE [i][j]);
+            Tcontrol_t commit_unit_ack        = PORT_READ(in_INSERT_COMMIT_UNIT_ACK        [i][j]);
+            Tcontrol_t issue_queue_ack        = PORT_READ(in_INSERT_ISSUE_QUEUE_ACK        [i][j]);
+            
+            
+            
+            // if not execute -> don't route to issue_queue
+            
+            Tcontrol_t val             = (
+//                                           previous_transaction   and
+                                          rename_unit_val        and
+                                          commit_unit_ack        and
+                                          (rename_unit_no_execute or
+                                           issue_queue_ack));
+            Tcontrol_t rename_unit_ack = (
+//                                           previous_transaction   and
+                                          ack                    and
+                                          commit_unit_ack        and
+                                          (rename_unit_no_execute or
+                                           issue_queue_ack));
+            Tcontrol_t commit_unit_val = (
+//                                           previous_transaction   and
+                                          ack                    and
+                                          rename_unit_val        and
+                                          (rename_unit_no_execute or
+                                           issue_queue_ack));
+            Tcontrol_t issue_queue_val = (
+//                                           previous_transaction   and
+                                          ack                    and
+                                          rename_unit_val        and
+                                          commit_unit_ack        and
+                                          not rename_unit_no_execute);
+            
+            PORT_WRITE(out_INSERT_VAL             [x]   ,val            );
+            PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],rename_unit_ack);
+            PORT_WRITE(out_INSERT_COMMIT_UNIT_VAL [i][j],commit_unit_val);
+            PORT_WRITE(out_INSERT_ISSUE_QUEUE_VAL [i][j],issue_queue_val);
+
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"  * rename_unit [%d].inst_insert[%d] -> %d",i,j,x);
+//          log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * previous_transaction              : %d",previous_transaction  );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_val                    (w) : %d",val                   );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_ack                    (r) : %d",ack                   );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_rename_unit_val        (r) : %d",rename_unit_val       );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_rename_unit_ack        (w) : %d",rename_unit_ack       );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_rename_unit_no_execute (r) : %d",rename_unit_no_execute);
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_commit_unit_val        (w) : %d",commit_unit_val       );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_commit_unit_ack        (r) : %d",commit_unit_ack       );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_issue_queue_val        (w) : %d",issue_queue_val       );
+            log_printf(TRACE,OOO_Engine_Glue,FUNCTION,"    * insert_issue_queue_ack        (r) : %d",issue_queue_ack       );
+
+            
+//          previous_transaction = VAL and ACK;
+            x ++;
+          }
+      }
+    
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_rename.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_rename.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_rename.cpp	(revision 88)
@@ -0,0 +1,41 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::genMealy_rename"
+  void OOO_Engine_Glue::genMealy_rename (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_function(OOO_Engine_Glue,FUNCTION,_name.c_str());
+
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j)
+        // if have not front_end_id port, this function is not use
+        PORT_WRITE(out_RENAME_RENAME_UNIT_FRONT_END_ID [i][j],_param->_translate_front_end_id_to_rename_unit [PORT_READ(in_RENAME_FRONT_END_ID [i][j])]);
+    
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire.cpp	(revision 88)
@@ -0,0 +1,75 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+/*
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::genMealy_retire"
+  void OOO_Engine_Glue::genMealy_retire (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_function(OOO_Engine_Glue,FUNCTION,_name.c_str());
+
+    uint32_t x=0;
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_retire[i]; ++j)
+        {
+          Tcontext_t         FRONT_END_ID       = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_COMMIT_UNIT_FRONT_END_ID [i][j]):0;
+          Tcontrol_t         WRITE_RD           = PORT_READ(in_RETIRE_COMMIT_UNIT_WRITE_RD           [i][j]);
+          Tgeneral_address_t NUM_REG_RD_PHY_OLD = PORT_READ(in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD [i][j]);
+          Tgeneral_address_t NUM_REG_RD_PHY_NEW = PORT_READ(in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW [i][j]);
+          Tcontrol_t         WRITE_RE           = PORT_READ(in_RETIRE_COMMIT_UNIT_WRITE_RE           [i][j]);
+          Tspecial_address_t NUM_REG_RE_PHY_OLD = PORT_READ(in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD [i][j]);
+          Tspecial_address_t NUM_REG_RE_PHY_NEW = PORT_READ(in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW [i][j]);
+          Tevent_state_t     EVENT_STATE        = PORT_READ(in_RETIRE_COMMIT_UNIT_EVENT_STATE        [i][j]);
+
+          Tgeneral_address_t general_address_msb= FRONT_END_ID << _param->_size_general_register;
+          Tspecial_address_t special_address_msb= FRONT_END_ID << _param->_size_special_register;
+
+          PORT_WRITE(out_RETIRE_RD_OLD_USE     [x],0); 
+          PORT_WRITE(out_RETIRE_RD_OLD_NUM_REG [x],general_address_msb | NUM_REG_RD_PHY_OLD);
+          PORT_WRITE(out_RETIRE_RD_NEW_USE     [x],WRITE_RD);
+          PORT_WRITE(out_RETIRE_RD_NEW_NUM_REG [x],general_address_msb | NUM_REG_RD_PHY_NEW);
+          PORT_WRITE(out_RETIRE_RE_OLD_USE     [x],0); 
+          PORT_WRITE(out_RETIRE_RE_OLD_NUM_REG [x],special_address_msb | NUM_REG_RE_PHY_OLD);
+          PORT_WRITE(out_RETIRE_RE_NEW_USE     [x],WRITE_RE);
+          PORT_WRITE(out_RETIRE_RE_NEW_NUM_REG [x],special_address_msb | NUM_REG_RE_PHY_NEW);
+          
+          if (_param->_have_port_front_end_id)
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_FRONT_END_ID       [i][j],_param->_translate_front_end_id_to_rename_unit [FRONT_END_ID]);
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_WRITE_RD           [i][j],WRITE_RD          );
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD [i][j],NUM_REG_RD_PHY_OLD);
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW [i][j],NUM_REG_RD_PHY_NEW);
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_WRITE_RE           [i][j],WRITE_RE          );
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD [i][j],NUM_REG_RE_PHY_OLD);
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW [i][j],NUM_REG_RE_PHY_NEW);
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_EVENT_STATE        [i][j],EVENT_STATE       );
+           
+          x ++;
+        }
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+*/
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire_valack.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire_valack.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire_valack.cpp	(revision 88)
@@ -0,0 +1,61 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+/*
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::genMealy_retire_valack"
+  void OOO_Engine_Glue::genMealy_retire_valack (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_function(OOO_Engine_Glue,FUNCTION,_name.c_str());
+
+    uint32_t x=0;
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_retire[i]; ++j)
+        {
+          Tcontrol_t ACK             = PORT_READ(in_RETIRE_ACK             [x]   );
+          Tcontrol_t RENAME_UNIT_ACK = PORT_READ(in_RETIRE_RENAME_UNIT_ACK [i][j]);
+          Tcontrol_t COMMIT_UNIT_VAL = PORT_READ(in_RETIRE_COMMIT_UNIT_VAL [i][j]);
+          
+          
+          
+          Tcontrol_t VAL             = (RENAME_UNIT_ACK and
+                                        COMMIT_UNIT_VAL );
+          Tcontrol_t RENAME_UNIT_VAL = (ACK             and
+                                        COMMIT_UNIT_VAL );
+          Tcontrol_t COMMIT_UNIT_ACK = (ACK             and
+                                        RENAME_UNIT_ACK );
+          
+          PORT_WRITE(out_RETIRE_VAL             [x]   , VAL            );
+          PORT_WRITE(out_RETIRE_RENAME_UNIT_VAL [i][j], RENAME_UNIT_VAL);
+          PORT_WRITE(out_RETIRE_COMMIT_UNIT_ACK [i][j], COMMIT_UNIT_ACK);
+           
+          x ++;
+        }
+    
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+*/
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_spr.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_spr.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_spr.cpp	(revision 88)
@@ -0,0 +1,51 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::genMealy_spr"
+  void OOO_Engine_Glue::genMealy_spr (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+        {
+          special_register_unit::SR * sr = new special_register_unit::SR (i,j);
+          
+          sr->write(PORT_READ(in_SPR_SPECIAL_REGISTER_UNIT_SR [i][j]));
+
+          PORT_WRITE(out_SPR_SR_IEE             [i][j],sr->iee);
+          PORT_WRITE(out_SPR_SR_EPH             [i][j],sr->eph);
+          PORT_WRITE(out_SPR_COMMIT_UNIT_SR_OVE [i][j],sr->ove);
+          PORT_WRITE(out_SPR_RENAME_UNIT_SR     [i][j],sr->read());
+
+          delete sr;
+        }
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::statistics_allocation"
+  void OOO_Engine_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "OOO_Engine_Glue",
+		      param_statistics);
+    
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::statistics_deallocation"
+  void OOO_Engine_Glue::statistics_deallocation (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete _stat;
+    
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp	(revision 88)
@@ -0,0 +1,39 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::transition"
+  void OOO_Engine_Glue::transition (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl.cpp	(revision 88)
@@ -0,0 +1,48 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::vhdl"
+  void OOO_Engine_Glue::vhdl (void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl_body.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl_body.cpp	(revision 88)
@@ -0,0 +1,35 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::vhdl_body"
+  void OOO_Engine_Glue::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    vhdl->set_body ("");
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl_declaration.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_vhdl_declaration.cpp	(revision 88)
@@ -0,0 +1,34 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::vhdl_declaration"
+  void OOO_Engine_Glue::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,139 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h"
+#include "Common/include/Max.h"
+#include "Common/include/BitManipulation.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::Parameters"
+  Parameters::Parameters (uint32_t                nb_front_end                           ,
+                          uint32_t              * nb_context                             ,
+                          uint32_t                nb_rename_unit                         ,
+                          uint32_t              * nb_inst_decod                          ,
+                          uint32_t              * nb_inst_insert                         ,
+                          uint32_t              * nb_inst_retire                         ,
+                          uint32_t                size_general_data                      ,
+                          uint32_t                size_special_data                      ,
+                          uint32_t              * link_rename_unit_with_front_end        ,
+                          std::vector<uint32_t> * translate_front_end_id_from_rename_unit,
+                          uint32_t                size_packet_id                         ,
+                          uint32_t                size_general_register                  ,
+                          uint32_t                size_special_register                  ,
+                          uint32_t                size_store_queue_ptr                   ,
+                          uint32_t                size_load_queue_ptr                    ,
+                          bool                    is_toplevel                            )
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    _nb_front_end                           = nb_front_end                    ;
+    _nb_context                             = nb_context                      ;
+    _nb_rename_unit                         = nb_rename_unit                  ;
+    _nb_inst_decod                          = nb_inst_decod                   ;
+    _nb_inst_insert                         = nb_inst_insert                  ;
+    _nb_inst_retire                         = nb_inst_retire                  ;
+    _link_rename_unit_with_front_end        = link_rename_unit_with_front_end ;
+    _translate_front_end_id_from_rename_unit= translate_front_end_id_from_rename_unit ;
+                                            
+//  _rename_unit_nb_front_end               = rename_unit_nb_front_end        ;
+//  _rename_unit_nb_context                 = rename_unit_nb_context          ;
+//  _rename_unit_size_front_end_id          = rename_unit_size_front_end_id   ;
+//  _rename_unit_size_context_id            = rename_unit_size_context_id     ;
+    _size_rename_id                         = log2(_nb_rename_unit)           ;
+    _sum_inst_insert                        = 0;
+//     _sum_inst_retire                        = 0;
+
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+      {
+        _sum_inst_insert += _nb_inst_insert[i];
+//         _sum_inst_retire += _nb_inst_retire[i];
+      }
+
+    _translate_front_end_id_to_rename_unit  = new uint32_t [_nb_front_end];
+    
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      {
+        _translate_front_end_id_to_rename_unit [i]=0;
+        
+        uint32_t x = _link_rename_unit_with_front_end [i];
+
+        for (uint32_t j=0; j<_translate_front_end_id_from_rename_unit [x].size(); ++j)
+          {
+            if (_translate_front_end_id_from_rename_unit [x][j] == i)
+              break;
+            _translate_front_end_id_to_rename_unit [i]++;
+          }
+      }
+    
+    _mask_num_general_register              = gen_mask<Tgeneral_address_t>(size_general_register);
+    _mask_num_special_register              = gen_mask<Tspecial_address_t>(size_special_register);
+
+    test();
+
+    if (is_toplevel)
+      {
+        _size_context_id                        = log2(max<uint32_t>(_nb_context,_nb_front_end));
+        _size_front_end_id                      = log2(_nb_front_end)  ;
+        _size_rob_ptr                           = size_packet_id       ;
+        _size_general_data                      = size_general_data    ;
+        _size_special_data                      = size_special_data    ;
+        _size_general_register                  = size_general_register;
+        _size_special_register                  = size_special_register;
+        _size_store_queue_ptr                   = size_store_queue_ptr ;
+        _size_load_queue_ptr                    = size_load_queue_ptr  ;
+        
+        _have_port_context_id                   = _size_context_id     > 0;
+        _have_port_front_end_id                 = _size_front_end_id   > 0;
+        _have_port_rob_ptr                      = _size_rob_ptr        > 0;
+        _have_port_load_queue_ptr               = _size_load_queue_ptr > 0;
+        
+        copy();
+      }
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "OOO_Engine_Glue::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(OOO_Engine_Glue,FUNCTION);
+//     test();
+//     log_end(OOO_Engine_Glue,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    delete _translate_front_end_id_to_rename_unit;
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+    log_end(OOO_Engine_Glue,FUNCTION);
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,39 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    Parameters_test test ("OOO_Engine_Glue");
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,56 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace ooo_engine_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    XML xml ("ooo_engine_glue");
+
+    xml.balise_open("ooo_engine_glue");
+//  xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end();
+    xml.balise_close();
+
+    log_end(OOO_Engine_Glue,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine_Glue::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters & x)
+  {
+    log_begin(OOO_Engine_Glue,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(OOO_Engine_Glue,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace ooo_engine_glue
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libReexecute_unit.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/Makefile.deps	(revision 88)
@@ -0,0 +1,45 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Reexecute_unit			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Priority
+include 			$(DIR_MORPHEO)/Behavioural/Generic/Priority/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Reexecute_unit_DIR		=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit
+
+#-----[ Library ]------------------------------------------
+
+Reexecute_unit_LIBRARY		= 	-lReexecute_unit		\
+					$(Priority_LIBRARY)		\
+					$(Behavioural_LIBRARY)	
+
+Reexecute_unit_DIR_LIBRARY	=	-L$(Reexecute_unit_DIR)/lib	\
+					$(Priority_DIR_LIBRARY)		\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Reexecute_unit_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) Priority_library;		\
+				$(MAKE) --directory=$(Reexecute_unit_DIR) --makefile=Makefile;
+
+Reexecute_unit_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) Priority_library_clean;		\
+				$(MAKE) --directory=$(Reexecute_unit_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Reexecute_unit_LIBRARY)
+
+DIR_LIBRARY			= $(Reexecute_unit_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Reexecute_unit_library
+
+library_clean			: Reexecute_unit_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-execute_loop_1.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-execute_loop_1.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-execute_loop_1.cfg	(revision 88)
@@ -0,0 +1,18 @@
+Reexecute_unit
+0	0	+1	# size_context_id         
+0	0	+1	# size_front_end_id       
+6	6	+1	# size_packet_id          
+4	4	+1	# size_queue              
+1	1	+1	# nb_execute_loop         
+4	4	+1	# nb_inst_execute          [0] [nb_execute_loop]
+2	2	+1	# nb_inst_commit          
+2	2	+1	# nb_inst_reexecute       
+1	1	+1	# nb_execute_loop_select  
+0	1	+1	# priority                
+0	1	+1	# load_balancing          
+5	5	+1	# size_general_register_id
+1	1	+1	# size_special_register_id
+32	32	+1	# size_general_data       
+5	5	+1	# size_special_data       
+2	2	+1	# size_store_queue_ptr    
+2	2	+1	# size_load_queue_ptr     
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-execute_loop_4.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-execute_loop_4.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-execute_loop_4.cfg	(revision 88)
@@ -0,0 +1,21 @@
+Reexecute_unit
+0	0	+1	# size_context_id         
+0	0	+1	# size_front_end_id       
+6	6	+1	# size_packet_id          
+8	8	+1	# size_queue              
+4	4	+1	# nb_execute_loop         
+4	4	+1	# nb_inst_execute          [0] [nb_execute_loop]
+1	1	+1	# nb_inst_execute          [1] [nb_execute_loop]
+3	3	+1	# nb_inst_execute          [2] [nb_execute_loop]
+8	8	+1	# nb_inst_execute          [3] [nb_execute_loop]
+4	4	+1	# nb_inst_commit          
+3 	3	+1	# nb_inst_reexecute       
+1	4	+1	# nb_execute_loop_select  
+0	1	+1	# priority                
+0	1	+1	# load_balancing          
+5	5	+1	# size_general_register_id
+1	1	+1	# size_special_register_id
+32	32	+1	# size_general_data       
+5	5	+1	# size_special_data       
+2	2	+1	# size_store_queue_ptr    
+2	2	+1	# size_load_queue_ptr     
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/config-min.cfg	(revision 88)
@@ -0,0 +1,18 @@
+Reexecute_unit
+0	0	+1	# size_context_id         
+0	0	+1	# size_front_end_id       
+0	0	+1	# size_packet_id          
+1	1	+1	# size_queue              
+1	1	+1	# nb_execute_loop         
+1	1	+1	# nb_inst_execute          [0] [nb_execute_loop]
+1	1	+1	# nb_inst_commit          
+1	1	+1	# nb_inst_reexecute       
+1	1	+1	# nb_execute_loop_select  
+0	1	+1	# priority                
+0	1	+1	# load_balancing          
+5	5	+1	# size_general_register_id
+1	1	+1	# size_special_register_id
+32	32	+1	# size_general_data       
+5	5	+1	# size_special_data       
+1	1	+1	# size_store_queue_ptr    
+0	0	+1	# size_load_queue_ptr     
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,30 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  32
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,126 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/include/test.h"
+
+#define NB_PARAMS 16
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * size_context_id                            (uint32_t         )\n"));
+  err (_(" * size_front_end_id                          (uint32_t         )\n"));
+  err (_(" * size_packet_id                             (uint32_t         )\n"));
+  err (_(" * size_queue                                 (uint32_t         )\n"));
+  err (_(" * nb_execute_loop                            (uint32_t         )\n"));
+  err (_(" * nb_inst_execute          [nb_execute_loop] (uint32_t         )\n"));
+  err (_(" * nb_inst_commit                             (uint32_t         )\n"));
+  err (_(" * nb_inst_reexecute                          (uint32_t         )\n"));
+  err (_(" * nb_inst_reexecute_commit                   (uint32_t         )\n"));
+  err (_(" * nb_execute_loop_select                     (uint32_t         )\n"));
+  err (_(" * priority                                   (Tpriority_t      )\n"));
+  err (_(" * load_balancing                             (Tload_balancing_t)\n"));
+  err (_(" * size_general_register_id                   (uint32_t         )\n"));
+  err (_(" * size_special_register_id                   (uint32_t         )\n"));
+  err (_(" * size_general_data                          (uint32_t         )\n"));
+  err (_(" * size_special_data                          (uint32_t         )\n"));
+  err (_(" * size_store_queue_ptr                       (uint32_t         )\n"));
+  err (_(" * size_load_queue_ptr                        (uint32_t         )\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+  uint32_t            _size_context_id          = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_front_end_id        = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_packet_id           = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_queue               = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _nb_execute_loop          = fromString<uint32_t         >(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_execute_loop))
+    usage (argc, argv);
+
+  uint32_t          * _nb_inst_execute          = new uint32_t [_nb_execute_loop];
+  for (uint32_t i=0; i<_nb_execute_loop; i++)
+    _nb_inst_execute [i] = fromString<uint32_t>(argv[x++]);
+
+  uint32_t            _nb_inst_commit           = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _nb_inst_reexecute        = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _nb_execute_loop_select   = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t         _priority                 = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t   _load_balancing           = fromString<Tload_balancing_t>(argv[x++]);
+  uint32_t            _size_general_register_id = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_special_register_id = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_general_data        = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_special_data        = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_store_queue_ptr     = fromString<uint32_t         >(argv[x++]);
+  uint32_t            _size_load_queue_ptr      = fromString<uint32_t         >(argv[x++]);
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters
+	(
+	 _size_context_id         ,
+	 _size_front_end_id       ,
+	 _size_packet_id          ,
+	 _size_queue              ,
+	 _nb_execute_loop         ,
+	 _nb_inst_execute         ,
+	 _nb_inst_commit          ,
+	 _nb_inst_reexecute       ,
+	 _nb_execute_loop_select  ,
+	 _priority                ,
+	 _load_balancing          ,
+	 _size_general_register_id,
+	 _size_special_register_id,
+	 _size_general_data       ,
+	 _size_special_data       ,
+	 _size_store_queue_ptr    ,
+	 _size_load_queue_ptr     ,
+         true //is_toplevel
+        );
+      
+      msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+  
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("Reexecute_unit : no error");
+      else
+	TEST_KO("Reexecute_unit : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  delete [] _nb_inst_execute;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,590 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/BitManipulation.h"
+
+class request_t
+{
+public : Tcontext_t         context_id   ;
+public : Tcontext_t         front_end_id ;
+public : Tpacket_t          packet_id    ;
+public : Tcontrol_t         commit_wen   ;
+public : Tcontrol_t         spr_access   ;
+public : Tcontrol_t         spr_wen      ;
+public : Tcontrol_t         spr_ren      ;
+public : Tcontrol_t         reexecute    ;
+public : Ttype_t            type         ;
+public : Toperation_t       operation    ;
+public : Tgeneral_data_t    num_group    ;
+public : Tgeneral_data_t    num_reg      ;
+public : Tgeneral_data_t    address      ;
+public : Tgeneral_data_t    data         ;
+public : Tcontrol_t         write_rd     ;
+public : Tgeneral_address_t num_reg_rd   ;
+public : Tspecial_data_t    flags        ;
+public : Texception_t       exception    ;
+public : Tcontrol_t         no_sequence  ;
+  
+public : void init (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters * _param, Tpacket_t _packet_id)
+  {
+    context_id   = range<Tcontext_t        >(rand(),_param->_size_context_id         );
+    front_end_id = range<Tcontext_t        >(rand(),_param->_size_front_end_id       );
+    packet_id    = _packet_id;
+    num_group    = (rand()%2)?GROUP_DCACHE:GROUP_POWER_MANAGEMENT;
+    num_reg      = packet_id;
+    data         = range<Tgeneral_data_t   >(rand(),_param->_size_general_data       );
+    num_reg_rd   = range<Tspecial_address_t>(rand(),_param->_size_special_register   );
+    flags        = range<Tspecial_data_t   >(rand(),_param->_size_special_data       );
+
+    switch (rand()%4)
+      {
+      case 0  : exception = EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE; break;
+      case 1  : exception = EXCEPTION_ALU_SPR_ACCESS_MUST_READ ; break;
+      default : exception = EXCEPTION_NONE;
+      }
+
+    no_sequence  = rand()%2;
+
+    address      = (num_group << 11)+num_reg;
+    
+
+    spr_wen      = (exception ==  EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE);
+    spr_ren      = (exception ==  EXCEPTION_ALU_SPR_ACCESS_MUST_READ );
+    spr_access   = spr_wen or spr_ren;
+
+    reexecute    = spr_ren or (spr_wen and ((num_group == GROUP_DCACHE) and 
+					    ((num_reg == SPR_DCBPR) or
+					     (num_reg == SPR_DCBFR) or
+					     (num_reg == SPR_DCBIR) or
+					     (num_reg == SPR_DCBLR))));
+
+    commit_wen   = not reexecute;
+
+    if (not spr_access)
+      {
+	write_rd  = 0;
+	type      = TYPE_SHIFT;
+	operation = OPERATION_SHIFT_L_SRA;
+      }
+    else
+      if (spr_ren)
+	{
+	  write_rd  = 1;
+	  type      = TYPE_ALU;
+	  operation = OPERATION_ALU_L_OR;
+	}
+      else
+	{
+	  write_rd = 0;
+	  type     = TYPE_MEMORY;
+	  switch (num_reg)
+	    {
+	    case SPR_DCBPR : {operation = OPERATION_MEMORY_PREFETCH  ; break;}
+	    case SPR_DCBFR : {operation = OPERATION_MEMORY_FLUSH     ; break;}
+	    case SPR_DCBIR : {operation = OPERATION_MEMORY_INVALIDATE; break;}
+	    case SPR_DCBLR : {operation = OPERATION_MEMORY_LOCK      ; break;}
+	    default        : break;
+	    }
+	}
+
+  }
+};
+
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Reexecute_unit * _Reexecute_unit = new Reexecute_unit 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_VAL                     ," in_EXECUTE_LOOP_VAL                   ",Tcontrol_t         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL(out_EXECUTE_LOOP_ACK                     ,"out_EXECUTE_LOOP_ACK                   ",Tcontrol_t         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_CONTEXT_ID              ," in_EXECUTE_LOOP_CONTEXT_ID            ",Tcontext_t         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_FRONT_END_ID            ," in_EXECUTE_LOOP_FRONT_END_ID          ",Tcontext_t         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_PACKET_ID               ," in_EXECUTE_LOOP_PACKET_ID             ",Tpacket_t          ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_OPERATION               ," in_EXECUTE_LOOP_OPERATION             ",Toperation_t       ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_TYPE                    ," in_EXECUTE_LOOP_TYPE                  ",Ttype_t            ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_FLAGS                   ," in_EXECUTE_LOOP_FLAGS                 ",Tspecial_data_t    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_EXCEPTION               ," in_EXECUTE_LOOP_EXCEPTION             ",Texception_t       ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE             ," in_EXECUTE_LOOP_NO_SEQUENCE           ",Tcontrol_t         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_ADDRESS                 ," in_EXECUTE_LOOP_ADDRESS               ",Tgeneral_data_t    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_DATA                    ," in_EXECUTE_LOOP_DATA                  ",Tgeneral_data_t    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+  ALLOC1_SC_SIGNAL(out_COMMIT_VAL                           ,"out_COMMIT_VAL                         ",Tcontrol_t         ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_ACK                           ," in_COMMIT_ACK                         ",Tcontrol_t         ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_WEN                           ,"out_COMMIT_WEN                         ",Tcontrol_t         ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,"out_COMMIT_CONTEXT_ID                  ",Tcontext_t         ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,"out_COMMIT_FRONT_END_ID                ",Tcontext_t         ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_PACKET_ID                     ,"out_COMMIT_PACKET_ID                   ",Tpacket_t          ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL(out_COMMIT_OPERATION                     ,"out_COMMIT_OPERATION                   ",Toperation_t       ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL(out_COMMIT_TYPE                          ,"out_COMMIT_TYPE                        ",Ttype_t            ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_FLAGS                         ,"out_COMMIT_FLAGS                       ",Tspecial_data_t    ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_EXCEPTION                     ,"out_COMMIT_EXCEPTION                   ",Texception_t       ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_NO_SEQUENCE                   ,"out_COMMIT_NO_SEQUENCE                 ",Tcontrol_t         ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL(out_COMMIT_ADDRESS                       ,"out_COMMIT_ADDRESS                     ",Tgeneral_data_t    ,_param->_nb_inst_commit);
+  ALLOC1_SC_SIGNAL( in_COMMIT_NUM_REG_RD                    ," in_COMMIT_NUM_REG_RD                  ",Tgeneral_address_t ,_param->_nb_inst_commit);
+
+  ALLOC1_SC_SIGNAL(out_SPR_VAL                              ,"out_SPR_VAL                            ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACK                              ," in_SPR_ACK                            ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_WEN                              ,"out_SPR_WEN                            ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_CONTEXT_ID                       ,"out_SPR_CONTEXT_ID                     ",Tcontext_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_FRONT_END_ID                     ,"out_SPR_FRONT_END_ID                   ",Tcontext_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_NUM_GROUP                        ,"out_SPR_NUM_GROUP                      ",Tspr_address_t     ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_NUM_REG                          ,"out_SPR_NUM_REG                        ",Tspr_address_t     ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_WDATA                            ,"out_SPR_WDATA                          ",Tspr_t             ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_RDATA                            ," in_SPR_RDATA                          ",Tspr_t             ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_INVALID                          ," in_SPR_INVALID                        ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_VAL                    ," in_REEXECUTE_ROB_VAL                  ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_ROB_ACK                    ,"out_REEXECUTE_ROB_ACK                  ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_CONTEXT_ID             ," in_REEXECUTE_ROB_CONTEXT_ID           ",Tcontext_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_FRONT_END_ID           ," in_REEXECUTE_ROB_FRONT_END_ID         ",Tcontext_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_PACKET_ID              ," in_REEXECUTE_ROB_PACKET_ID            ",Tpacket_t          ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_OPERATION              ," in_REEXECUTE_ROB_OPERATION            ",Toperation_t       ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_TYPE                   ," in_REEXECUTE_ROB_TYPE                 ",Ttype_t            ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  ," in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t         ,_param->_nb_inst_reexecute);
+
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_VAL                        ,"out_REEXECUTE_VAL                      ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_REEXECUTE_ACK                        ," in_REEXECUTE_ACK                      ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_CONTEXT_ID                 ,"out_REEXECUTE_CONTEXT_ID               ",Tcontext_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_FRONT_END_ID               ,"out_REEXECUTE_FRONT_END_ID             ",Tcontext_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_PACKET_ID                  ,"out_REEXECUTE_PACKET_ID                ",Tpacket_t          ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_OPERATION                  ,"out_REEXECUTE_OPERATION                ",Toperation_t       ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_TYPE                       ,"out_REEXECUTE_TYPE                     ",Ttype_t            ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE      ,"out_REEXECUTE_STORE_QUEUE_PTR_WRITE    ",Tlsq_ptr_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE       ,"out_REEXECUTE_LOAD_QUEUE_PTR_WRITE     ",Tlsq_ptr_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_HAS_IMMEDIAT               ,"out_REEXECUTE_HAS_IMMEDIAT             ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_IMMEDIAT                   ,"out_REEXECUTE_IMMEDIAT                 ",Tgeneral_data_t    ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_READ_RA                    ,"out_REEXECUTE_READ_RA                  ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RA                 ,"out_REEXECUTE_NUM_REG_RA               ",Tgeneral_address_t ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_READ_RB                    ,"out_REEXECUTE_READ_RB                  ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RB                 ,"out_REEXECUTE_NUM_REG_RB               ",Tgeneral_address_t ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_READ_RC                    ,"out_REEXECUTE_READ_RC                  ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RC                 ,"out_REEXECUTE_NUM_REG_RC               ",Tspecial_address_t ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_WRITE_RD                   ,"out_REEXECUTE_WRITE_RD                 ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RD                 ,"out_REEXECUTE_NUM_REG_RD               ",Tgeneral_address_t ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_WRITE_RE                   ,"out_REEXECUTE_WRITE_RE                 ",Tcontrol_t         ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RE                 ,"out_REEXECUTE_NUM_REG_RE               ",Tspecial_address_t ,_param->_nb_inst_reexecute);
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Reexecute_unit.\n"),name.c_str());
+
+  (*(_Reexecute_unit->in_CLOCK))        (*(in_CLOCK));
+  (*(_Reexecute_unit->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_VAL                     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit,out_EXECUTE_LOOP_ACK                     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_CONTEXT_ID              ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_FRONT_END_ID            ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_PACKET_ID               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_OPERATION               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_TYPE                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_FLAGS                   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_EXCEPTION               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_NO_SEQUENCE             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_ADDRESS                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_Reexecute_unit, in_EXECUTE_LOOP_DATA                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_VAL                           ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_COMMIT_ACK                           ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_WEN                           ,_param->_nb_inst_commit);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit);
+//INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_OPERATION                     ,_param->_nb_inst_commit);
+//INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_TYPE                          ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FLAGS                         ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_EXCEPTION                     ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_NO_SEQUENCE                   ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_ADDRESS                       ,_param->_nb_inst_commit);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_COMMIT_NUM_REG_RD                    ,_param->_nb_inst_commit);
+
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_VAL                              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_SPR_ACK                              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_WEN                              ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_CONTEXT_ID                       ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_FRONT_END_ID                     ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_NUM_GROUP                        ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_NUM_REG                          ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_SPR_WDATA                            ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_SPR_RDATA                            ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_SPR_INVALID                          ,_param->_nb_inst_reexecute);
+
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_VAL                    ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_ROB_ACK                    ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_CONTEXT_ID             ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_FRONT_END_ID           ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_PACKET_ID              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_OPERATION              ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_TYPE                   ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  ,_param->_nb_inst_reexecute);
+
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_VAL                        ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_REEXECUTE_ACK                        ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_CONTEXT_ID                 ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_FRONT_END_ID               ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_rob_ptr  )
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_PACKET_ID                  ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_OPERATION                  ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_TYPE                       ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_STORE_QUEUE_PTR_WRITE      ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_LOAD_QUEUE_PTR_WRITE       ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_HAS_IMMEDIAT               ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_IMMEDIAT                   ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_READ_RA                    ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_NUM_REG_RA                 ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_READ_RB                    ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_NUM_REG_RB                 ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_READ_RC                    ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_NUM_REG_RC                 ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_WRITE_RD                   ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_NUM_REG_RD                 ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_WRITE_RE                   ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_NUM_REG_RE                 ,_param->_nb_inst_reexecute);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  const  int32_t percent_transaction_execute_loop = 75;
+  const  int32_t percent_transaction_commit       = 75;
+  const  int32_t percent_transaction_spr          = 75;
+  const  int32_t percent_transaction_reexecute    = 75;
+
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+      
+      uint32_t nb_request     = 1<<_param->_size_rob_ptr;
+      uint32_t nb_request_in  = 0;
+      uint32_t nb_request_out = 0;
+
+      request_t request [nb_request];
+
+      uint32_t tab_request_in  [_param->_nb_execute_loop][_param->_max_nb_inst_execute];
+      bool     tab_request_out [nb_request];
+      for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+	for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j)
+	  tab_request_in [i][j] = (nb_request_in < nb_request)?(nb_request_in++):nb_request;
+      for (uint32_t i=0; i<nb_request; i++)
+	{
+	  tab_request_out [i] = true;
+	  request [i].init(_param, i);
+	}
+      
+      while (nb_request_out < nb_request)
+	{
+	  for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+	    for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j)
+	      {
+		uint32_t x=tab_request_in [i][j];
+
+		in_EXECUTE_LOOP_VAL          [i][j]->write(((rand()%100)<percent_transaction_execute_loop) and (x<nb_request));
+		in_EXECUTE_LOOP_CONTEXT_ID   [i][j]->write(request[x].context_id  );
+		in_EXECUTE_LOOP_FRONT_END_ID [i][j]->write(request[x].front_end_id);
+		in_EXECUTE_LOOP_PACKET_ID    [i][j]->write(x);
+	      //in_EXECUTE_LOOP_OPERATION    [i][j]->write(0);
+	      //in_EXECUTE_LOOP_TYPE         [i][j]->write(0);
+		in_EXECUTE_LOOP_FLAGS        [i][j]->write(request[x].flags       );
+		in_EXECUTE_LOOP_EXCEPTION    [i][j]->write(request[x].exception   );
+		in_EXECUTE_LOOP_NO_SEQUENCE  [i][j]->write(request[x].no_sequence );
+		uint32_t num_group = request[x].num_group;
+		uint32_t num_reg   = request[x].num_reg  ;
+		in_EXECUTE_LOOP_ADDRESS      [i][j]->write((num_group << 11) | num_reg);
+		in_EXECUTE_LOOP_DATA         [i][j]->write(request[x].data        );
+	      }
+	  
+	  SC_START(0);
+	  for (uint32_t i=0; i<_param->_nb_inst_commit; ++i)
+	    {
+	      in_COMMIT_ACK        [i]->write((rand()%100)<percent_transaction_commit);
+
+	      Tpacket_t packet = (_param->_have_port_rob_ptr  )?PORT_READ(out_COMMIT_PACKET_ID [i]):0;
+	      in_COMMIT_NUM_REG_RD [i]->write(request[packet].num_reg_rd);
+	    }
+
+	  for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	    {
+	      in_SPR_ACK     [i]->write((rand()%100)<percent_transaction_spr);
+	      in_SPR_RDATA   [i]->write(~out_SPR_WDATA [i]->read());
+	      in_SPR_INVALID [i]->write(0);
+	    }
+
+	  for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	    in_REEXECUTE_ACK   [i]->write((rand()%100)<percent_transaction_reexecute);
+
+	  SC_START(0);
+
+	  for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+	    for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j)
+	      if (in_EXECUTE_LOOP_VAL [i][j]->read() and out_EXECUTE_LOOP_ACK [i][j]->read())
+		{
+		  LABEL("EXECUTE_LOOP [%d][%d] : Transaction accepted",i,j);
+		  
+		  tab_request_in [i][j] = (nb_request_in < nb_request)?(nb_request_in++):nb_request;
+		}
+	  
+	  for (uint32_t i=0; i<_param->_nb_inst_commit; ++i)
+	    if (out_COMMIT_VAL [i]->read() and in_COMMIT_ACK [i]->read())
+		{
+		  LABEL("COMMIT       [%d] : Transaction accepted",i);
+		  
+		  Tpacket_t packet = (_param->_have_port_rob_ptr  )?PORT_READ(out_COMMIT_PACKET_ID [i]):0;
+
+		  LABEL(" * packet : %d",packet);
+
+		  TEST(bool, tab_request_out [packet], true);
+
+		  TEST(Tcontrol_t     ,out_COMMIT_WEN          [i]->read(),request[packet].commit_wen  );
+		  if (_param->_have_port_context_id)
+		  TEST(Tcontext_t     ,out_COMMIT_CONTEXT_ID   [i]->read(),request[packet].context_id  );
+		  if (_param->_have_port_front_end_id)
+		  TEST(Tcontext_t     ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id);
+// 		  TEST(Toperation_t   ,out_COMMIT_OPERATION    [i]->read(),request[packet].operation   );
+// 		  TEST(Ttype_t        ,out_COMMIT_TYPE         [i]->read(),request[packet].type        );
+		  TEST(Tspecial_data_t,out_COMMIT_FLAGS        [i]->read(),request[packet].flags       );
+		  TEST(Texception_t   ,out_COMMIT_EXCEPTION    [i]->read(),request[packet].exception   );
+		  TEST(Tcontrol_t     ,out_COMMIT_NO_SEQUENCE  [i]->read(),request[packet].no_sequence );
+		  TEST(Tgeneral_data_t,out_COMMIT_ADDRESS      [i]->read(),request[packet].address     );
+
+		  tab_request_out [packet] = false;
+		  if (not request[packet].spr_access)
+		    nb_request_out++;
+		}
+	  
+	  for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	    if (out_SPR_VAL[i]->read() and in_SPR_ACK[i]->read())
+	      {
+		LABEL("SPR          [%d] : Transaction accepted",i);
+		
+		Tspr_address_t num_reg = out_SPR_NUM_REG [i]->read();
+		TEST(Tcontrol_t    ,out_SPR_WEN          [i]->read(), request[num_reg].spr_wen);
+		if (_param->_have_port_context_id)
+		TEST(Tcontext_t    ,out_SPR_CONTEXT_ID   [i]->read(), request[num_reg].context_id);
+		if (_param->_have_port_front_end_id)
+		TEST(Tcontext_t    ,out_SPR_FRONT_END_ID [i]->read(), request[num_reg].front_end_id);
+		TEST(Tspr_address_t,out_SPR_NUM_GROUP    [i]->read(), request[num_reg].num_group);
+		TEST(Tspr_t        ,out_SPR_WDATA        [i]->read(), request[num_reg].data);
+
+		if (request[num_reg].spr_ren)
+		  request[num_reg].data = ~request[num_reg].data;
+
+		if (not request[num_reg].reexecute)
+		  nb_request_out++;
+	      }
+
+	  for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	    if (out_REEXECUTE_VAL[i]->read() and in_REEXECUTE_ACK[i]->read())
+	      {
+		LABEL("REEXECUTE    [%d] : Transaction accepted",i);
+
+		Tpacket_t packet = (_param->_have_port_rob_ptr  )?PORT_READ(out_REEXECUTE_PACKET_ID [i]):0;
+		
+		LABEL(" * packet : %d",packet);
+		TEST(Tcontrol_t        ,request [packet].reexecute, true);
+		
+		if (_param->_have_port_context_id)
+		TEST(Tcontext_t        ,out_REEXECUTE_CONTEXT_ID            [i]->read(), request[packet].context_id  );
+		if (_param->_have_port_front_end_id)
+		TEST(Tcontext_t        ,out_REEXECUTE_FRONT_END_ID          [i]->read(), request[packet].front_end_id);
+		TEST(Tgeneral_data_t   ,out_REEXECUTE_IMMEDIAT              [i]->read(), request[packet].data        );
+		TEST(Tcontrol_t        ,out_REEXECUTE_WRITE_RD              [i]->read(), request[packet].write_rd    );
+		TEST(Tgeneral_address_t,out_REEXECUTE_NUM_REG_RD            [i]->read(), request[packet].num_reg_rd  );
+
+		TEST(Ttype_t           ,out_REEXECUTE_TYPE                  [i]->read(), request[packet].type        );
+		TEST(Toperation_t      ,out_REEXECUTE_OPERATION             [i]->read(), request[packet].operation   );
+
+		TEST(Tcontrol_t        ,out_REEXECUTE_HAS_IMMEDIAT          [i]->read(), 1);
+		TEST(Tlsq_ptr_t        ,out_REEXECUTE_STORE_QUEUE_PTR_WRITE [i]->read(), 0);
+		TEST(Tlsq_ptr_t        ,out_REEXECUTE_LOAD_QUEUE_PTR_WRITE  [i]->read(), 0);
+		TEST(Tcontrol_t        ,out_REEXECUTE_READ_RA               [i]->read(), 0);
+		TEST(Tgeneral_address_t,out_REEXECUTE_NUM_REG_RA            [i]->read(), 0);
+		TEST(Tcontrol_t        ,out_REEXECUTE_READ_RB               [i]->read(), 0);
+		TEST(Tgeneral_address_t,out_REEXECUTE_NUM_REG_RB            [i]->read(), 0);
+		TEST(Tcontrol_t        ,out_REEXECUTE_READ_RC               [i]->read(), 0);
+		TEST(Tspecial_address_t,out_REEXECUTE_NUM_REG_RC            [i]->read(), 0);
+		TEST(Tcontrol_t        ,out_REEXECUTE_WRITE_RE              [i]->read(), 0);
+		TEST(Tspecial_address_t,out_REEXECUTE_NUM_REG_RE            [i]->read(), 0);
+
+		nb_request_out++;
+	      }
+
+	  SC_START(1);
+	}
+
+
+      TEST(uint32_t, nb_request_in  ,nb_request);
+      TEST(uint32_t, nb_request_out ,nb_request);
+
+//       for (uint32_t i=0; i<nb_request; i++)
+// 	TEST(bool,tab_request_out [i],false);
+
+      SC_START(1);
+    }
+  
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_VAL                     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL(out_EXECUTE_LOOP_ACK                     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_CONTEXT_ID              ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_FRONT_END_ID            ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_PACKET_ID               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_OPERATION               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_TYPE                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_FLAGS                   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_EXCEPTION               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_ADDRESS                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_DATA                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+  DELETE1_SC_SIGNAL(out_COMMIT_VAL                           ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_ACK                           ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_WEN                           ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL(out_COMMIT_OPERATION                     ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL(out_COMMIT_TYPE                          ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_FLAGS                         ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_EXCEPTION                     ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_NO_SEQUENCE                   ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL(out_COMMIT_ADDRESS                       ,_param->_nb_inst_commit);
+  DELETE1_SC_SIGNAL( in_COMMIT_NUM_REG_RD                    ,_param->_nb_inst_commit);
+
+  DELETE1_SC_SIGNAL(out_SPR_VAL                              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACK                              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_WEN                              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_CONTEXT_ID                       ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_FRONT_END_ID                     ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_NUM_GROUP                        ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_NUM_REG                          ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_WDATA                            ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_RDATA                            ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_INVALID                          ,_param->_nb_inst_reexecute);
+
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_VAL                    ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_ROB_ACK                    ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_CONTEXT_ID             ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_FRONT_END_ID           ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_PACKET_ID              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_OPERATION              ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_TYPE                   ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  ,_param->_nb_inst_reexecute);
+
+  DELETE1_SC_SIGNAL(out_REEXECUTE_VAL                        ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_REEXECUTE_ACK                        ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_CONTEXT_ID                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_FRONT_END_ID               ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_PACKET_ID                  ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_OPERATION                  ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_TYPE                       ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE      ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE       ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_HAS_IMMEDIAT               ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_IMMEDIAT                   ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_READ_RA                    ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RA                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_READ_RB                    ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RB                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_READ_RC                    ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RC                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_WRITE_RD                   ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RD                 ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_WRITE_RE                   ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_REEXECUTE_NUM_REG_RE                 ,_param->_nb_inst_reexecute);
+    }
+#endif
+
+  delete _Reexecute_unit;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/Reexecute_unit.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/Reexecute_unit.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/Reexecute_unit.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Reexecute\_unit}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,11 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
+
+A lot of instructions must be reissue in execute loop.
+\begin{itemize}
+\item Store : each store wait the top of Re Order Buffer.
+\item SPR access
+\end{itemize}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h	(revision 88)
@@ -0,0 +1,94 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_reexecute_unit_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_reexecute_unit_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+//public : uint32_t            _size_context_id         ;
+//public : uint32_t            _size_front_end_id       ;
+//public : uint32_t            _size_packet_id          ;
+  public : uint32_t            _size_queue              ;
+  public : uint32_t            _nb_execute_loop         ;
+  public : uint32_t          * _nb_inst_execute         ;//[nb_execute_loop]
+  public : uint32_t            _nb_inst_commit          ;
+  public : uint32_t            _nb_inst_reexecute       ;
+  public : uint32_t            _nb_execute_loop_select  ;
+  public : Tpriority_t         _priority_execute_loop   ;
+  public : Tload_balancing_t   _load_balancing          ;
+//public : uint32_t            _size_general_register_id;
+//public : uint32_t            _size_special_register_id;
+//public : uint32_t            _size_general_data       ;
+//public : uint32_t            _size_special_data       ;
+//public : uint32_t            _size_store_queue_ptr    ;
+//public : uint32_t            _size_load_queue_ptr     ;
+  public : static const Tpriority_t _priority_queue_in = PRIORITY_ROUND_ROBIN;
+
+  public : uint32_t            _max_nb_inst_execute     ;
+  public : uint32_t            _nb_bank                 ;
+  public : uint32_t            _size_bank               ;
+
+//public : bool                _have_port_context_id    ;
+//public : bool                _have_port_front_end_id  ;
+//public : bool                _have_port_packet_id     ;
+//public : bool                _have_port_load_queue_ptr;
+    
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t            size_context_id         ,
+			uint32_t            size_front_end_id       ,
+			uint32_t            size_packet_id          ,
+			uint32_t            size_queue              ,
+			uint32_t            nb_execute_loop         ,
+			uint32_t          * nb_inst_execute         ,
+			uint32_t            nb_inst_commit          ,
+			uint32_t            nb_inst_reexecute       ,
+			uint32_t            nb_execute_loop_select  ,
+			Tpriority_t         priority_execute_loop   ,
+			Tload_balancing_t   load_balancing          ,
+			uint32_t            size_general_register_id,
+			uint32_t            size_special_register_id,
+			uint32_t            size_general_data       ,
+			uint32_t            size_special_data       ,
+			uint32_t            size_store_queue_ptr    ,
+			uint32_t            size_load_queue_ptr     ,
+                        bool                is_toplevel=false);
+
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters & x);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h	(revision 88)
@@ -0,0 +1,228 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_reexecute_unit_Reexecute_unit_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_reexecute_unit_Reexecute_unit_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include "Behavioural/Generic/Priority/include/Priority.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+  class Reexecute_unit 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+  private   : counter_t                     ** _stat_bank_nb_inst;
+  private   : counter_t                      * _stat_nb_inst_commit;
+  private   : counter_t                      * _stat_nb_inst_reexecute;
+  private   : counter_t                      * _stat_nb_spr_access;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         ) ***  in_EXECUTE_LOOP_VAL                     ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_OUT(Tcontrol_t         ) *** out_EXECUTE_LOOP_ACK                     ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tcontext_t         ) ***  in_EXECUTE_LOOP_CONTEXT_ID              ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tcontext_t         ) ***  in_EXECUTE_LOOP_FRONT_END_ID            ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tpacket_t          ) ***  in_EXECUTE_LOOP_PACKET_ID               ;//[nb_execute_loop][nb_inst_execute]
+//public    : SC_IN (Toperation_t       ) ***  in_EXECUTE_LOOP_OPERATION               ;//[nb_execute_loop][nb_inst_execute]
+//public    : SC_IN (Ttype_t            ) ***  in_EXECUTE_LOOP_TYPE                    ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tspecial_data_t    ) ***  in_EXECUTE_LOOP_FLAGS                   ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Texception_t       ) ***  in_EXECUTE_LOOP_EXCEPTION               ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tcontrol_t         ) ***  in_EXECUTE_LOOP_NO_SEQUENCE             ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tgeneral_data_t    ) ***  in_EXECUTE_LOOP_ADDRESS                 ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tgeneral_data_t    ) ***  in_EXECUTE_LOOP_DATA                    ;//[nb_execute_loop][nb_inst_execute]
+
+    // ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_VAL                           ;//[nb_inst_commit]
+  public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_ACK                           ;//[nb_inst_commit]
+  public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_WEN                           ;//[nb_inst_commit]
+  public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_CONTEXT_ID                    ;//[nb_inst_commit]
+  public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_FRONT_END_ID                  ;//[nb_inst_commit]
+  public    : SC_OUT(Tpacket_t          )  ** out_COMMIT_PACKET_ID                     ;//[nb_inst_commit]
+//public    : SC_OUT(Toperation_t       )  ** out_COMMIT_OPERATION                     ;//[nb_inst_commit]
+//public    : SC_OUT(Ttype_t            )  ** out_COMMIT_TYPE                          ;//[nb_inst_commit]
+  public    : SC_OUT(Tspecial_data_t    )  ** out_COMMIT_FLAGS                         ;//[nb_inst_commit]
+  public    : SC_OUT(Texception_t       )  ** out_COMMIT_EXCEPTION                     ;//[nb_inst_commit]
+  public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_NO_SEQUENCE                   ;//[nb_inst_commit]
+  public    : SC_OUT(Tgeneral_data_t    )  ** out_COMMIT_ADDRESS                       ;//[nb_inst_commit]
+  public    : SC_IN (Tgeneral_address_t )  **  in_COMMIT_NUM_REG_RD                    ;//[nb_inst_commit]
+
+    // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_VAL                              ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t         )  **  in_SPR_ACK                              ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_WEN                              ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontext_t         )  ** out_SPR_CONTEXT_ID                       ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontext_t         )  ** out_SPR_FRONT_END_ID                     ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tspr_address_t     )  ** out_SPR_NUM_GROUP                        ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tspr_address_t     )  ** out_SPR_NUM_REG                          ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tspr_t             )  ** out_SPR_WDATA                            ;//[nb_inst_reexecute]
+  public    : SC_IN (Tspr_t             )  **  in_SPR_RDATA                            ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t         )  **  in_SPR_INVALID                          ;//[nb_inst_reexecute]
+
+    // ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         )  **  in_REEXECUTE_ROB_VAL                    ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_ROB_ACK                    ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontext_t         )  **  in_REEXECUTE_ROB_CONTEXT_ID             ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontext_t         )  **  in_REEXECUTE_ROB_FRONT_END_ID           ;//[nb_inst_reexecute]
+  public    : SC_IN (Tpacket_t          )  **  in_REEXECUTE_ROB_PACKET_ID              ;//[nb_inst_reexecute]
+  public    : SC_IN (Toperation_t       )  **  in_REEXECUTE_ROB_OPERATION              ;//[nb_inst_reexecute]
+  public    : SC_IN (Ttype_t            )  **  in_REEXECUTE_ROB_TYPE                   ;//[nb_inst_reexecute]
+  public    : SC_IN (Tlsq_ptr_t         )  **  in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  ;//[nb_inst_reexecute]
+
+    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_VAL                        ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t         )  **  in_REEXECUTE_ACK                        ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontext_t         )  ** out_REEXECUTE_CONTEXT_ID                 ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontext_t         )  ** out_REEXECUTE_FRONT_END_ID               ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tpacket_t          )  ** out_REEXECUTE_PACKET_ID                  ;//[nb_inst_reexecute]
+  public    : SC_OUT(Toperation_t       )  ** out_REEXECUTE_OPERATION                  ;//[nb_inst_reexecute]
+  public    : SC_OUT(Ttype_t            )  ** out_REEXECUTE_TYPE                       ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tlsq_ptr_t         )  ** out_REEXECUTE_STORE_QUEUE_PTR_WRITE      ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tlsq_ptr_t         )  ** out_REEXECUTE_LOAD_QUEUE_PTR_WRITE       ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_HAS_IMMEDIAT               ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tgeneral_data_t    )  ** out_REEXECUTE_IMMEDIAT                   ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_READ_RA                    ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tgeneral_address_t )  ** out_REEXECUTE_NUM_REG_RA                 ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_READ_RB                    ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tgeneral_address_t )  ** out_REEXECUTE_NUM_REG_RB                 ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_READ_RC                    ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tspecial_address_t )  ** out_REEXECUTE_NUM_REG_RC                 ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_WRITE_RD                   ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tgeneral_address_t )  ** out_REEXECUTE_NUM_REG_RD                 ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t         )  ** out_REEXECUTE_WRITE_RE                   ;//[nb_inst_reexecute] //*
+  public    : SC_OUT(Tspecial_address_t )  ** out_REEXECUTE_NUM_REG_RE                 ;//[nb_inst_reexecute] //*
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : generic::priority::Priority   * _priority_execute_loop;
+  private   : generic::priority::Priority   * _priority_queue_in    ;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : std::list<entry_t *>          * _reexecute_queue                         ;//[nb_bank]
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : Tcontrol_t                    * internal_QUEUE_PUSH                      ;//[nb_bank]
+  public    : uint32_t                      * internal_QUEUE_NUM_EXECUTE_LOOP          ;//[nb_bank]
+  public    : uint32_t                      * internal_QUEUE_NUM_INST_EXECUTE          ;//[nb_bank]
+  public    : uint32_t                      * internal_QUEUE_NUM_INST_COMMIT           ;//[nb_bank]
+  public    : info_t                        * internal_QUEUE_INFO                      ;//[nb_bank]
+  public    : Tcontrol_t                    * internal_SPR_VAL                         ;//[nb_inst_reexecute]
+  public    : Tcontrol_t                    * internal_REEXECUTE_ROB_ACK               ;//[nb_inst_reexecute]
+  public    : Tcontrol_t                    * internal_REEXECUTE_VAL                   ;//[nb_inst_reexecute]
+#ifdef STATISTICS
+  public    : Tcontrol_t                    * internal_COMMIT_VAL                      ;//[nb_inst_commit]
+#endif
+
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Reexecute_unit);
+#endif
+  public  :          Reexecute_unit              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Reexecute_unit             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  private : bool        must_reexecute            (Tspr_address_t address, info_t & info);
+
+  public  : void        transition                (void);
+  public  : void        genMoore                  (void);
+  public  : void        genMealy_reexecute        (void);
+  public  : void        genMealy_commit           (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Types.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Types.h	(revision 88)
@@ -0,0 +1,61 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_reexecute_unit_Types_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_reexecute_unit_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+  
+  typedef enum
+    {
+      STATE_EMPTY     ,
+      STATE_SPR_ACCESS,
+      STATE_REEXECUTE 
+    } state_t;
+  
+  typedef struct 
+  {
+    state_t            state         ;
+    Tcontext_t         context_id    ;
+    Tcontext_t         front_end_id  ;
+    Tpacket_t          packet_id     ;
+    Tcontrol_t         spr_wen       ;
+    Tcontrol_t         reexecute     ;
+    Ttype_t            type          ;
+    Toperation_t       operation     ;
+    Tgeneral_data_t    address       ;
+    Tgeneral_data_t    data          ;
+    Tcontrol_t         write_rd      ;
+    Tgeneral_address_t num_reg_rd    ;
+  } entry_t;
+  
+  typedef struct
+  {
+    Tcontrol_t         spr_wen       ;
+    Tcontrol_t         reexecute     ;
+    Ttype_t            type          ;
+    Toperation_t       operation     ;
+    Tcontrol_t         write_rd      ;
+  } info_t;
+
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,125 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::Parameters"
+  Parameters::Parameters (uint32_t            size_context_id         ,
+			  uint32_t            size_front_end_id       ,
+			  uint32_t            size_packet_id          ,
+			  uint32_t            size_queue              ,
+			  uint32_t            nb_execute_loop         ,
+			  uint32_t          * nb_inst_execute         ,
+			  uint32_t            nb_inst_commit          ,
+			  uint32_t            nb_inst_reexecute       ,
+			  uint32_t            nb_execute_loop_select  ,
+			  Tpriority_t         priority_execute_loop   ,
+			  Tload_balancing_t   load_balancing          ,
+			  uint32_t            size_general_register_id,
+			  uint32_t            size_special_register_id,
+			  uint32_t            size_general_data       ,
+			  uint32_t            size_special_data       ,
+			  uint32_t            size_store_queue_ptr    ,
+			  uint32_t            size_load_queue_ptr     ,
+                          bool                is_toplevel)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+//  _size_context_id          = size_context_id         ;
+//  _size_front_end_id        = size_front_end_id       ;
+//  _size_packet_id           = size_packet_id          ;
+    _size_queue               = size_queue              ;
+    _nb_execute_loop          = nb_execute_loop         ;
+    _nb_inst_execute          = nb_inst_execute         ;
+    _nb_inst_commit           = nb_inst_commit          ;
+    _nb_inst_reexecute        = nb_inst_reexecute       ;
+    _nb_execute_loop_select   = nb_execute_loop_select  ;
+    _priority_execute_loop    = priority_execute_loop   ;
+    _load_balancing           = load_balancing          ;
+//  _size_general_register_id = size_general_register_id;
+//  _size_special_register_id = size_special_register_id;
+//  _size_general_data        = size_general_data       ;
+//  _size_special_data        = size_special_data       ;
+//  _size_store_queue_ptr     = size_store_queue_ptr    ;
+//  _size_load_queue_ptr      = size_load_queue_ptr     ;
+
+    _max_nb_inst_execute      = max<uint32_t>(_nb_inst_execute, _nb_execute_loop);
+    _nb_bank                  = _nb_inst_reexecute;
+    _size_bank                = _size_queue / _nb_bank;
+
+//  _have_port_context_id     = _size_context_id     > 0;
+//  _have_port_front_end_id   = _size_front_end_id   > 0;
+//  _have_port_packet_id      = _size_packet_id      > 0;
+//  _have_port_load_queue_ptr = _size_load_queue_ptr > 0;
+
+    test();
+
+    if (is_toplevel)
+      {
+        _size_context_id          = size_context_id         ;
+        _size_front_end_id        = size_front_end_id       ;
+        _size_rob_ptr             = size_packet_id          ;
+        _size_general_register    = size_general_register_id;
+        _size_special_register    = size_special_register_id;
+        _size_general_data        = size_general_data       ;
+        _size_special_data        = size_special_data       ;
+        _size_store_queue_ptr     = size_store_queue_ptr    ;
+        _size_load_queue_ptr      = size_load_queue_ptr     ;
+        
+        _have_port_context_id     = _size_context_id     > 0;
+        _have_port_front_end_id   = _size_front_end_id   > 0;
+        _have_port_rob_ptr        = _size_rob_ptr        > 0;
+        _have_port_load_queue_ptr = _size_load_queue_ptr > 0;
+
+        copy();
+      }
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Reexecute_unit::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Reexecute_unit,FUNCTION);
+//     test();
+//     log_end(Reexecute_unit,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,48 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    Parameters_test test ("Reexecute_unit");
+
+    if (_size_queue < _nb_inst_reexecute)
+      test.error(_("size_queue must be >= nb_inst_reexecute_commit.\n"));
+
+    if (_nb_execute_loop_select > _nb_execute_loop)
+      test.error(toString(_("nb_execute_loop_select must be <= nb_execute_loop.\n")));
+
+    if (_size_bank == 1)
+      test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n"));
+
+    log_end(Reexecute_unit,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,56 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    XML xml ("reexecute_unit");
+
+    xml.balise_open("reexecute_unit");
+//  xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end();
+    xml.balise_close();
+
+    log_end(Reexecute_unit,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters & x)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Reexecute_unit,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp	(revision 88)
@@ -0,0 +1,197 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::Reexecute_unit"
+  Reexecute_unit::Reexecute_unit 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_Reexecute_unit == true
+    log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
+    log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	// Constant
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i)
+	  {
+	    if (_param->_have_port_load_queue_ptr)
+	    PORT_WRITE(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE [i],0);
+	    PORT_WRITE(out_REEXECUTE_READ_RA              [i],0);
+	    PORT_WRITE(out_REEXECUTE_NUM_REG_RA           [i],0);
+	    PORT_WRITE(out_REEXECUTE_READ_RB              [i],0);
+	    PORT_WRITE(out_REEXECUTE_NUM_REG_RB           [i],0);
+	    PORT_WRITE(out_REEXECUTE_READ_RC              [i],0);
+	    PORT_WRITE(out_REEXECUTE_NUM_REG_RC           [i],0);
+	    PORT_WRITE(out_REEXECUTE_WRITE_RE             [i],0);
+	    PORT_WRITE(out_REEXECUTE_NUM_REG_RE           [i],0);
+	  }
+
+
+	log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str());
+
+	SC_METHOD (genMoore);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Method - genMealy_reexecute"),_name.c_str());
+
+	SC_METHOD (genMealy_reexecute);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  {
+	    if (_param->_have_port_context_id)
+	    sensitive << (*(in_REEXECUTE_ROB_CONTEXT_ID            [i]));
+	    if (_param->_have_port_front_end_id)
+	    sensitive << (*(in_REEXECUTE_ROB_FRONT_END_ID          [i]));
+	    if (_param->_have_port_rob_ptr  )
+	    sensitive << (*(in_REEXECUTE_ROB_PACKET_ID             [i]));
+	    sensitive << (*(in_REEXECUTE_ROB_OPERATION             [i]))
+		      << (*(in_REEXECUTE_ROB_TYPE                  [i]))
+		      << (*(in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE [i]));
+	  }
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Method - genMealy_commit"),_name.c_str());
+
+	SC_METHOD (genMealy_commit);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+
+	for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+	  for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j)
+	    {
+	      if (_param->_have_port_context_id)
+	      sensitive << (*(in_EXECUTE_LOOP_CONTEXT_ID   [i][j]));
+	      if (_param->_have_port_front_end_id)
+	      sensitive << (*(in_EXECUTE_LOOP_FRONT_END_ID [i][j]));
+	      if (_param->_have_port_rob_ptr  )
+	      sensitive << (*(in_EXECUTE_LOOP_PACKET_ID    [i][j]));
+	      sensitive << (*(in_EXECUTE_LOOP_VAL          [i][j]))
+// 			<< (*(in_EXECUTE_LOOP_OPERATION    [i][j]))
+// 			<< (*(in_EXECUTE_LOOP_TYPE         [i][j]))
+			<< (*(in_EXECUTE_LOOP_FLAGS        [i][j]))
+			<< (*(in_EXECUTE_LOOP_EXCEPTION    [i][j]))
+			<< (*(in_EXECUTE_LOOP_NO_SEQUENCE  [i][j]))
+			<< (*(in_EXECUTE_LOOP_ADDRESS      [i][j]))
+			<< (*(in_EXECUTE_LOOP_DATA         [i][j]));
+	    }
+	for (uint32_t i=0; i<_param->_nb_inst_commit; ++i)
+	  sensitive << (*(in_COMMIT_ACK [i]));
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+#endif
+      }
+    log_end(Reexecute_unit,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::~Reexecute_unit"
+  Reexecute_unit::~Reexecute_unit (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 88)
@@ -0,0 +1,197 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::allocation"
+  void Reexecute_unit::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Reexecute_unit"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("execute_loop", IN, EAST, _("Instruction executed from execute_loop"),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+      _ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL                     ,VAL,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_VALACK_OUT(out_EXECUTE_LOOP_ACK                     ,ACK,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CONTEXT_ID              ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FRONT_END_ID            ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_PACKET_ID               ,"packet_id"   ,Tpacket_t          ,_param->_size_rob_ptr     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//    _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION               ,"operation"   ,Toperation_t       ,_param->_size_operation   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//    _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE                    ,"type"        ,Ttype_t            ,_param->_size_type        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS                   ,"flags"       ,Tspecial_data_t    ,_param->_size_special_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION               ,"exception"   ,Texception_t       ,_param->_size_exception   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE             ,"no_sequence" ,Tcontrol_t         ,1                         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS                 ,"address"     ,Tgeneral_data_t    ,_param->_size_general_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA                    ,"data"        ,Tgeneral_data_t    ,_param->_size_general_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+    }
+
+    // ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("commit",OUT,WEST, _("Instruction executed to Re Order Buffer"),_param->_nb_inst_commit);
+
+      ALLOC1_VALACK_OUT(out_COMMIT_VAL                           ,VAL);
+      ALLOC1_VALACK_IN ( in_COMMIT_ACK                           ,ACK);
+      ALLOC1_SIGNAL_OUT(out_COMMIT_WEN                           ,"wen"         ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_OUT(out_COMMIT_CONTEXT_ID                    ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
+      ALLOC1_SIGNAL_OUT(out_COMMIT_FRONT_END_ID                  ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_COMMIT_PACKET_ID                     ,"packet_id"   ,Tpacket_t          ,_param->_size_rob_ptr     );
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_OPERATION                     ,"operation"   ,Toperation_t       ,_param->_size_operation   );
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_TYPE                          ,"type"        ,Ttype_t            ,_param->_size_type        );
+      ALLOC1_SIGNAL_OUT(out_COMMIT_FLAGS                         ,"flags"       ,Tspecial_data_t    ,_param->_size_special_data);
+      ALLOC1_SIGNAL_OUT(out_COMMIT_EXCEPTION                     ,"exception"   ,Texception_t       ,_param->_size_exception   );
+      ALLOC1_SIGNAL_OUT(out_COMMIT_NO_SEQUENCE                   ,"no_sequence" ,Tcontrol_t         ,1                         );
+      ALLOC1_SIGNAL_OUT(out_COMMIT_ADDRESS                       ,"address"     ,Tgeneral_data_t    ,_param->_size_general_data);
+      ALLOC1_SIGNAL_IN ( in_COMMIT_NUM_REG_RD                    ,"num_reg_rd"  ,Tgeneral_address_t ,_param->_size_general_register);
+    }
+
+    // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("spr",OUT,EAST, _("Access to Special Register"), _param->_nb_inst_reexecute);
+
+      ALLOC1_VALACK_OUT(out_SPR_VAL                              ,VAL);
+      ALLOC1_VALACK_IN ( in_SPR_ACK                              ,ACK);
+      ALLOC1_SIGNAL_OUT(out_SPR_WEN                              ,"wen"         ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_OUT(out_SPR_CONTEXT_ID                       ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
+      ALLOC1_SIGNAL_OUT(out_SPR_FRONT_END_ID                     ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_SPR_NUM_GROUP                        ,"num_group"   ,Tspr_address_t     ,_param->_size_special_address_group   );
+      ALLOC1_SIGNAL_OUT(out_SPR_NUM_REG                          ,"num_reg"     ,Tspr_address_t     ,_param->_size_special_address_register);
+      ALLOC1_SIGNAL_OUT(out_SPR_WDATA                            ,"wdata"       ,Tspr_t             ,_param->_size_spr);
+      ALLOC1_SIGNAL_IN ( in_SPR_RDATA                            ,"rdata"       ,Tspr_t             ,_param->_size_spr);
+      ALLOC1_SIGNAL_IN ( in_SPR_INVALID                          ,"invalid"     ,Tcontrol_t         ,1);
+    }
+
+    // ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("reexecute_rob", IN,EAST, _("Instruction reexecuted by the Re Order Buffer (Store head)"), _param->_nb_inst_reexecute);
+
+      ALLOC1_VALACK_IN ( in_REEXECUTE_ROB_VAL                    ,VAL);
+      ALLOC1_VALACK_OUT(out_REEXECUTE_ROB_ACK                    ,ACK);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_CONTEXT_ID             ,"context_id"           ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_FRONT_END_ID           ,"front_end_id"         ,Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_PACKET_ID              ,"packet_id"            ,Tpacket_t          ,_param->_size_rob_ptr  );
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_OPERATION              ,"operation"            ,Toperation_t       ,_param->_size_operation);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_TYPE                   ,"type"                 ,Ttype_t            ,_param->_size_type);
+      ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  ,"store_queue_ptr_write",Tlsq_ptr_t         ,_param->_size_store_queue_ptr);
+    }
+
+    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("reexecute",OUT,SOUTH, _("Instruction reexecute, send at the issue_queue"), _param->_nb_inst_reexecute);
+
+      ALLOC1_VALACK_OUT(out_REEXECUTE_VAL                  ,VAL);
+      ALLOC1_VALACK_IN ( in_REEXECUTE_ACK                  ,ACK);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id         );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id       );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr            );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation          );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type               );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr    );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr     );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                                );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data       );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                                );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register   );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                                );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register   );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                                );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register   );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                                );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register   );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                                );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register   );
+    }
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _reexecute_queue = new std::list<entry_t *> [_param->_nb_bank];
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    internal_QUEUE_PUSH             = new Tcontrol_t [_param->_nb_bank];
+    internal_QUEUE_NUM_EXECUTE_LOOP = new uint32_t   [_param->_nb_bank];
+    internal_QUEUE_NUM_INST_EXECUTE = new uint32_t   [_param->_nb_bank];
+    internal_QUEUE_NUM_INST_COMMIT  = new uint32_t   [_param->_nb_bank];
+    internal_QUEUE_INFO             = new info_t     [_param->_nb_bank];
+    internal_SPR_VAL                = new Tcontrol_t [_param->_nb_inst_reexecute];
+    internal_REEXECUTE_ROB_ACK      = new Tcontrol_t [_param->_nb_inst_reexecute];
+    internal_REEXECUTE_VAL          = new Tcontrol_t [_param->_nb_inst_reexecute];
+#ifdef STATISTICS
+    internal_COMMIT_VAL             = new Tcontrol_t [_param->_nb_inst_commit];
+#endif
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _priority_execute_loop = new generic::priority::Priority (_name+"_priority_execute_loop",
+							      _param->_priority_execute_loop,
+							      _param->_load_balancing ,
+							      _param->_nb_execute_loop,
+							      _param->_nb_inst_execute,
+							      _param->_nb_execute_loop_select);
+
+    _priority_queue_in     = new generic::priority::Priority (_name+"_priority_queue_in",
+							      _param->_priority_queue_in,
+							      _param->_nb_bank);
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+	_component->generate_file();
+#endif
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 88)
@@ -0,0 +1,139 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::deallocation"
+  void Reexecute_unit::deallocation (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_VAL                     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1);
+        DELETE2_SIGNAL(out_EXECUTE_LOOP_ACK                     ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1);
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_CONTEXT_ID              ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_context_id  );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_FRONT_END_ID            ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_front_end_id);
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_PACKET_ID               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_rob_ptr     );
+//      DELETE2_SIGNAL( in_EXECUTE_LOOP_OPERATION               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_operation   );
+//      DELETE2_SIGNAL( in_EXECUTE_LOOP_TYPE                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_type        );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_FLAGS                   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_special_data);
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception   );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1                         );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_ADDRESS                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data);
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_DATA                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data);
+        
+        DELETE1_SIGNAL(out_COMMIT_VAL                           ,_param->_nb_inst_commit,1);
+        DELETE1_SIGNAL( in_COMMIT_ACK                           ,_param->_nb_inst_commit,1);
+        DELETE1_SIGNAL(out_COMMIT_WEN                           ,_param->_nb_inst_commit,1);
+        DELETE1_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit,_param->_size_context_id  );
+        DELETE1_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit,_param->_size_front_end_id);
+        DELETE1_SIGNAL(out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit,_param->_size_rob_ptr     );
+//      DELETE1_SIGNAL(out_COMMIT_OPERATION                     ,_param->_nb_inst_commit,_param->_size_operation   );
+//      DELETE1_SIGNAL(out_COMMIT_TYPE                          ,_param->_nb_inst_commit,_param->_size_type        );
+        DELETE1_SIGNAL(out_COMMIT_FLAGS                         ,_param->_nb_inst_commit,_param->_size_special_data);
+        DELETE1_SIGNAL(out_COMMIT_EXCEPTION                     ,_param->_nb_inst_commit,_param->_size_exception   );
+        DELETE1_SIGNAL(out_COMMIT_NO_SEQUENCE                   ,_param->_nb_inst_commit,1                         );
+        DELETE1_SIGNAL(out_COMMIT_ADDRESS                       ,_param->_nb_inst_commit,_param->_size_general_data);
+        DELETE1_SIGNAL( in_COMMIT_NUM_REG_RD                    ,_param->_nb_inst_commit,_param->_size_general_register   );
+        
+        DELETE1_SIGNAL(out_SPR_VAL                              , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL( in_SPR_ACK                              , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL(out_SPR_WEN                              , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL(out_SPR_CONTEXT_ID                       , _param->_nb_inst_reexecute,_param->_size_context_id  );
+        DELETE1_SIGNAL(out_SPR_FRONT_END_ID                     , _param->_nb_inst_reexecute,_param->_size_front_end_id);
+        DELETE1_SIGNAL(out_SPR_NUM_GROUP                        , _param->_nb_inst_reexecute,_param->_size_special_address_group   );
+        DELETE1_SIGNAL(out_SPR_NUM_REG                          , _param->_nb_inst_reexecute,_param->_size_special_address_register);
+        DELETE1_SIGNAL(out_SPR_WDATA                            , _param->_nb_inst_reexecute,_param->_size_spr);
+        DELETE1_SIGNAL( in_SPR_RDATA                            , _param->_nb_inst_reexecute,_param->_size_spr);
+        DELETE1_SIGNAL( in_SPR_INVALID                          , _param->_nb_inst_reexecute,1);
+        
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_VAL                    , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL(out_REEXECUTE_ROB_ACK                    , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_CONTEXT_ID             , _param->_nb_inst_reexecute,_param->_size_context_id);
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_FRONT_END_ID           , _param->_nb_inst_reexecute,_param->_size_front_end_id);
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_PACKET_ID              , _param->_nb_inst_reexecute,_param->_size_rob_ptr  );
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_OPERATION              , _param->_nb_inst_reexecute,_param->_size_operation);
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_TYPE                   , _param->_nb_inst_reexecute,_param->_size_type);
+        DELETE1_SIGNAL( in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  , _param->_nb_inst_reexecute,_param->_size_store_queue_ptr);
+        
+        DELETE1_SIGNAL(out_REEXECUTE_VAL                        , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL( in_REEXECUTE_ACK                        , _param->_nb_inst_reexecute,1);
+        DELETE1_SIGNAL(out_REEXECUTE_CONTEXT_ID                 , _param->_nb_inst_reexecute,_param->_size_context_id         );
+        DELETE1_SIGNAL(out_REEXECUTE_FRONT_END_ID               , _param->_nb_inst_reexecute,_param->_size_front_end_id       );
+        DELETE1_SIGNAL(out_REEXECUTE_PACKET_ID                  , _param->_nb_inst_reexecute,_param->_size_rob_ptr            );
+        DELETE1_SIGNAL(out_REEXECUTE_OPERATION                  , _param->_nb_inst_reexecute,_param->_size_operation          );
+        DELETE1_SIGNAL(out_REEXECUTE_TYPE                       , _param->_nb_inst_reexecute,_param->_size_type               );
+        DELETE1_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE      , _param->_nb_inst_reexecute,_param->_size_store_queue_ptr    );
+        DELETE1_SIGNAL(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE       , _param->_nb_inst_reexecute,_param->_size_load_queue_ptr     );
+        DELETE1_SIGNAL(out_REEXECUTE_HAS_IMMEDIAT               , _param->_nb_inst_reexecute,1                                );
+        DELETE1_SIGNAL(out_REEXECUTE_IMMEDIAT                   , _param->_nb_inst_reexecute,_param->_size_general_data       );
+        DELETE1_SIGNAL(out_REEXECUTE_READ_RA                    , _param->_nb_inst_reexecute,1                                );
+        DELETE1_SIGNAL(out_REEXECUTE_NUM_REG_RA                 , _param->_nb_inst_reexecute,_param->_size_general_register   );
+        DELETE1_SIGNAL(out_REEXECUTE_READ_RB                    , _param->_nb_inst_reexecute,1                                );
+        DELETE1_SIGNAL(out_REEXECUTE_NUM_REG_RB                 , _param->_nb_inst_reexecute,_param->_size_general_register   );
+        DELETE1_SIGNAL(out_REEXECUTE_READ_RC                    , _param->_nb_inst_reexecute,1                                );
+        DELETE1_SIGNAL(out_REEXECUTE_NUM_REG_RC                 , _param->_nb_inst_reexecute,_param->_size_special_register   );
+        DELETE1_SIGNAL(out_REEXECUTE_WRITE_RD                   , _param->_nb_inst_reexecute,1                                );
+        DELETE1_SIGNAL(out_REEXECUTE_NUM_REG_RD                 , _param->_nb_inst_reexecute,_param->_size_general_register   );
+        DELETE1_SIGNAL(out_REEXECUTE_WRITE_RE                   , _param->_nb_inst_reexecute,1                                );
+        DELETE1_SIGNAL(out_REEXECUTE_NUM_REG_RE                 , _param->_nb_inst_reexecute,_param->_size_special_register   );
+
+        // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+        for (uint32_t i=0; i<_param->_nb_bank; i++)
+          if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_EMPTY))
+            {
+              entry_t * entry = _reexecute_queue [i].front();
+              _reexecute_queue [i].pop_front();
+              delete entry;
+            }
+        delete [] _reexecute_queue;
+        
+        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        delete [] internal_QUEUE_PUSH            ;
+        delete [] internal_QUEUE_NUM_EXECUTE_LOOP;
+        delete [] internal_QUEUE_NUM_INST_EXECUTE;
+        delete [] internal_QUEUE_NUM_INST_COMMIT ;
+        delete [] internal_QUEUE_INFO            ;
+        delete [] internal_SPR_VAL               ;
+        delete [] internal_REEXECUTE_ROB_ACK     ;
+        delete [] internal_REEXECUTE_VAL         ;
+#ifdef STATISTICS
+        delete [] internal_COMMIT_VAL            ;
+#endif
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    
+    delete _priority_execute_loop;
+    delete _priority_queue_in    ;
+
+    delete _component;
+    
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_end_cycle.cpp	(revision 88)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::end_cycle"
+void Reexecute_unit::end_cycle ()
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp	(revision 88)
@@ -0,0 +1,140 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::genMealy_commit"
+  void Reexecute_unit::genMealy_commit (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    // Initialisation
+    Tcontrol_t execute_loop_ack [_param->_nb_execute_loop][_param->_max_nb_inst_execute];
+
+    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j)
+	execute_loop_ack [i][j] = false;
+
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      internal_QUEUE_PUSH [i] = 0;
+
+    // execute_loop interface
+    std::list<generic::priority::select_t> * select_queue_in        = _priority_queue_in ->select();
+    std::list<generic::priority::select_t>::iterator it_queue_in    = select_queue_in    ->begin();
+
+    std::list<generic::priority::select_t> * select_execute_loop    = _priority_execute_loop ->select();
+    std::list<generic::priority::select_t>::iterator it_execute_loop= select_execute_loop ->begin();
+  
+    // For each nb_inst
+    for (uint32_t i=0; i<_param->_nb_inst_commit; ++i)
+      {
+	Tcontrol_t commit_val = false;
+
+	// find a executed instruction
+	for (;
+	     (it_execute_loop!=select_execute_loop->end()) and (commit_val == false);
+	     ++it_execute_loop)
+	  {
+	    // take num_execute_loop and num_inst_execute
+	    uint32_t x = it_execute_loop->grp;
+	    uint32_t y = it_execute_loop->elt;
+
+	    // test id instruction is valid
+	    if (PORT_READ(in_EXECUTE_LOOP_VAL [x][y]))
+	      {
+		// Need spr_acces / reexecute ?
+		Texception_t    exception  = PORT_READ(in_EXECUTE_LOOP_EXCEPTION [x][y]);
+		Tgeneral_data_t address    = PORT_READ(in_EXECUTE_LOOP_ADDRESS   [x][y]);
+		Tcontrol_t      spr_access = ((exception ==  EXCEPTION_ALU_SPR_ACCESS_MUST_READ ) or
+					      (exception ==  EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE));
+		if (spr_access)
+		  {
+		    // find a not full bank
+		    bool find = false;
+		    for (;
+			 (it_queue_in!=select_queue_in->end()) and (find == false);
+			 ++it_queue_in)
+		      {
+			uint32_t num_bank = it_queue_in->grp;
+			if (_reexecute_queue [num_bank].size() < _param->_size_queue)
+			  {
+			    find = true;
+			    
+			    // this instruction don't need spr access. send at the re order buffer
+			    commit_val              = 1; // in_EXECUTE_LOOP_VAL = 1
+			    execute_loop_ack [x][y] = PORT_READ(in_COMMIT_ACK [i]);
+			    
+			    internal_QUEUE_PUSH                [num_bank] = execute_loop_ack [x][y]; // in_EXECUTE_LOOP_VAL = 1
+			    internal_QUEUE_NUM_EXECUTE_LOOP    [num_bank] = x;
+			    internal_QUEUE_NUM_INST_EXECUTE    [num_bank] = y;
+			    internal_QUEUE_NUM_INST_COMMIT     [num_bank] = i;
+			    internal_QUEUE_INFO                [num_bank].spr_wen = (exception ==  EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE);
+			    
+			    // if reexecute, don't commit, just read instruction information (num_reg_rd)
+			    PORT_WRITE(out_COMMIT_WEN          [i], not must_reexecute(address & 0xffff, internal_QUEUE_INFO[num_bank]));
+			  }
+		      }
+		  }
+		else
+		  {
+		    // this instruction don't need spr access. send at the re order buffer
+		    commit_val              = 1; // in_EXECUTE_LOOP_VAL = 1
+		    execute_loop_ack [x][y] = PORT_READ(in_COMMIT_ACK [i]);
+
+		    PORT_WRITE(out_COMMIT_WEN          [i], 1);
+		  }
+		
+		if (commit_val)
+		  {
+		    if (_param->_have_port_context_id)
+		    PORT_WRITE(out_COMMIT_CONTEXT_ID   [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID   [x][y]));
+		    if (_param->_have_port_front_end_id)
+		    PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]));
+		    if (_param->_have_port_rob_ptr  )
+		    PORT_WRITE(out_COMMIT_PACKET_ID    [i], PORT_READ(in_EXECUTE_LOOP_PACKET_ID    [x][y]));
+		  //PORT_WRITE(out_COMMIT_OPERATION    [i], PORT_READ(in_EXECUTE_LOOP_OPERATION    [x][y]));
+		  //PORT_WRITE(out_COMMIT_TYPE         [i], PORT_READ(in_EXECUTE_LOOP_TYPE         [x][y]));
+		    PORT_WRITE(out_COMMIT_FLAGS        [i], PORT_READ(in_EXECUTE_LOOP_FLAGS        [x][y]));
+		    PORT_WRITE(out_COMMIT_EXCEPTION    [i], exception);
+		    PORT_WRITE(out_COMMIT_NO_SEQUENCE  [i], PORT_READ(in_EXECUTE_LOOP_NO_SEQUENCE  [x][y]));
+		    PORT_WRITE(out_COMMIT_ADDRESS      [i], address);
+		  }
+	      }
+	  }
+	
+#ifdef STATISTICS
+	internal_COMMIT_VAL [i] = commit_val;
+#endif
+	PORT_WRITE(out_COMMIT_VAL [i], commit_val);
+      }
+
+    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j)
+	PORT_WRITE(out_EXECUTE_LOOP_ACK [i][j], execute_loop_ack [i][j]);
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+  
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
+
+
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp	(revision 88)
@@ -0,0 +1,93 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::genMealy_reexecute"
+  void Reexecute_unit::genMealy_reexecute (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    // ===================================================================
+    // =====[ REEXECUTE ]=================================================
+    // ===================================================================
+    // Between reexecute_rob and rexecute_queue, reexecute_queue is most priotary
+    
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+      {
+	Tcontrol_t val;
+	Tcontrol_t ack;
+
+	if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_REEXECUTE))
+	  {
+	    val = true ;
+	    ack = false;
+
+	    entry_t * entry = _reexecute_queue [i].front();
+
+	    if (_param->_have_port_context_id)
+	    PORT_WRITE(out_REEXECUTE_CONTEXT_ID            [i],entry->context_id    );
+	    if (_param->_have_port_front_end_id)
+	    PORT_WRITE(out_REEXECUTE_FRONT_END_ID          [i],entry->front_end_id  );
+	    if (_param->_have_port_rob_ptr  )
+	    PORT_WRITE(out_REEXECUTE_PACKET_ID             [i],entry->packet_id     );
+	    PORT_WRITE(out_REEXECUTE_OPERATION             [i],entry->operation     );
+	    PORT_WRITE(out_REEXECUTE_TYPE                  [i],entry->type          );
+	    PORT_WRITE(out_REEXECUTE_STORE_QUEUE_PTR_WRITE [i],0);
+	    PORT_WRITE(out_REEXECUTE_HAS_IMMEDIAT          [i],1);
+	    PORT_WRITE(out_REEXECUTE_IMMEDIAT              [i],entry->data          );
+	    PORT_WRITE(out_REEXECUTE_WRITE_RD              [i],entry->write_rd      );
+	    PORT_WRITE(out_REEXECUTE_NUM_REG_RD            [i],entry->num_reg_rd    );
+	  }
+	else
+	  {
+	    val = PORT_READ(in_REEXECUTE_ROB_VAL [i]);
+	    ack = PORT_READ(in_REEXECUTE_ACK     [i]);
+
+	    if (_param->_have_port_context_id)
+	    PORT_WRITE(out_REEXECUTE_CONTEXT_ID            [i], PORT_READ(in_REEXECUTE_ROB_CONTEXT_ID              [i]));
+	    if (_param->_have_port_front_end_id)
+	    PORT_WRITE(out_REEXECUTE_FRONT_END_ID          [i], PORT_READ(in_REEXECUTE_ROB_FRONT_END_ID            [i]));
+	    if (_param->_have_port_rob_ptr  )
+	    PORT_WRITE(out_REEXECUTE_PACKET_ID             [i], PORT_READ(in_REEXECUTE_ROB_PACKET_ID               [i]));
+	    PORT_WRITE(out_REEXECUTE_OPERATION             [i], PORT_READ(in_REEXECUTE_ROB_OPERATION               [i]));
+	    PORT_WRITE(out_REEXECUTE_TYPE                  [i], PORT_READ(in_REEXECUTE_ROB_TYPE                    [i]));
+	    PORT_WRITE(out_REEXECUTE_STORE_QUEUE_PTR_WRITE [i], PORT_READ(in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE   [i]));
+	    PORT_WRITE(out_REEXECUTE_HAS_IMMEDIAT          [i], 0);
+	    PORT_WRITE(out_REEXECUTE_IMMEDIAT              [i], 0);
+	    PORT_WRITE(out_REEXECUTE_WRITE_RD              [i], 0);
+	    PORT_WRITE(out_REEXECUTE_NUM_REG_RD            [i], 0);
+	  }
+
+	internal_REEXECUTE_VAL     [i] = val;
+	internal_REEXECUTE_ROB_ACK [i] = ack;
+
+	PORT_WRITE(out_REEXECUTE_VAL     [i], internal_REEXECUTE_VAL     [i]);
+	PORT_WRITE(out_REEXECUTE_ROB_ACK [i], internal_REEXECUTE_ROB_ACK [i]);
+      }
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMoore.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMoore.cpp	(revision 88)
@@ -0,0 +1,61 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::genMoore"
+  void Reexecute_unit::genMoore (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    // ===================================================================
+    // =====[ SPR ]=======================================================
+    // ===================================================================
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+      {
+	Tcontrol_t val = (not _reexecute_queue [i].empty() and
+			  (_reexecute_queue [i].front()->state == STATE_SPR_ACCESS));
+
+	if (val)
+	  {
+	    entry_t * entry = _reexecute_queue [i].front();
+
+	    PORT_WRITE(out_SPR_WEN          [i],entry->spr_wen);
+	    if (_param->_have_port_context_id)
+	    PORT_WRITE(out_SPR_CONTEXT_ID   [i],entry->context_id);
+	    if (_param->_have_port_front_end_id)
+	    PORT_WRITE(out_SPR_FRONT_END_ID [i],entry->front_end_id);
+	    PORT_WRITE(out_SPR_NUM_GROUP    [i],(entry->address >> _param->_shift_spr_num_group) & _param->_mask_spr_num_group);
+	    PORT_WRITE(out_SPR_NUM_REG      [i],(entry->address                                ) & _param->_mask_spr_num_reg  );
+	    PORT_WRITE(out_SPR_WDATA        [i],entry->data);
+	  }
+
+	internal_SPR_VAL [i] = val;
+	PORT_WRITE(out_SPR_VAL [i], internal_SPR_VAL [i]);
+      }
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_must_reexecute.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_must_reexecute.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_must_reexecute.cpp	(revision 88)
@@ -0,0 +1,86 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::must_reexecute"
+  bool Reexecute_unit::must_reexecute (Tspr_address_t address, info_t & info)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    // Test if need reexecute
+    if (info.spr_wen)
+      {
+	// ***** SPR WRITE *****
+	
+	Tspr_address_t num_group = (address >> _param->_shift_spr_num_group) & _param->_mask_spr_num_group;
+	Tspr_address_t num_reg   = (address                                ) & _param->_mask_spr_num_reg  ;
+	
+	switch (num_group)
+	  {
+	  case GROUP_DCACHE :
+	    {
+	      info.type     = TYPE_MEMORY;
+	      info.write_rd = 0;
+	      
+	      switch (num_reg)
+		{
+		case SPR_DCBPR : {info.reexecute = true; info.operation = OPERATION_MEMORY_PREFETCH  ; break;}
+		case SPR_DCBFR : {info.reexecute = true; info.operation = OPERATION_MEMORY_FLUSH     ; break;}
+		case SPR_DCBIR : {info.reexecute = true; info.operation = OPERATION_MEMORY_INVALIDATE; break;}
+// 		case SPR_DCBWR : {info.reexecute = true; info.operation = OPERATION_MEMORY_FLUSH     ; break;}
+		case SPR_DCBLR : {info.reexecute = true; info.operation = OPERATION_MEMORY_LOCK      ; break;}
+		default :
+		  {
+		    info.reexecute = false;
+		    break;
+		  }
+		}
+	      
+	      break;
+	    }
+	  default :
+	    {
+	      info.reexecute = false;
+	      break;
+	    }
+	  }
+      }
+    else
+      {
+	// ***** SPR READ *****
+	info.reexecute = true;
+	info.type      = TYPE_ALU;
+	info.operation = OPERATION_ALU_L_OR;
+	info.write_rd  = 1;
+      }
+
+    log_end(Reexecute_unit,FUNCTION);
+
+    return info.reexecute;
+  }
+  
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
+
+
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,74 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::statistics_allocation"
+  void Reexecute_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Reexecute_unit",
+		      param_statistics);
+
+    _stat_bank_nb_inst     = new counter_t * [_param->_nb_bank];
+
+    // bank/queue occupation
+    {
+      std::string sum_bank_nb_inst = "";
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+	{
+	  _stat_bank_nb_inst [i] = _stat->create_variable("bank_nb_inst_"+toString(i));
+	  
+	  _stat->create_expr_average_by_cycle("average_occupation_bank_"+toString(i), "bank_nb_inst_"+toString(i), "", toString(_("Average instruction by cycle (bank %d)"),i));
+	  _stat->create_expr_percent         ("percent_occupation_bank_"+toString(i), "average_occupation_bank_"+toString(i), toString(_param->_size_bank), toString(_("Percent occupation of bank (bank %d)"),i));
+	  
+	  if (i == 0)
+	    sum_bank_nb_inst = "bank_nb_inst_"+toString(i);
+	  else
+	    sum_bank_nb_inst = "+ bank_nb_inst_"+toString(i) + " " +sum_bank_nb_inst;
+	}
+      
+      _stat->create_expr_average_by_cycle("average_occupation_bank", sum_bank_nb_inst, "", _("Average instruction by cycle (all bank)"));
+      _stat->create_expr_percent         ("percent_occupation_bank" , "average_occupation_bank", toString(_param->_size_queue), _("Percent occupation of reexecute_queue (all bank)"));
+    }
+
+
+    _stat_nb_inst_reexecute = _stat->create_variable("nb_inst_reexecute");
+    _stat_nb_inst_commit    = _stat->create_variable("nb_inst_commit");
+    _stat_nb_spr_access     = _stat->create_variable("nb_spr_access");
+
+    _stat->create_expr_average_by_cycle("average_inst_commit"   , "nb_inst_commit"   , "", _("Average instruction commited by cycle"));
+    _stat->create_expr_average_by_cycle("average_inst_reexecute", "nb_inst_reexecute", "", _("Average instruction reexecuted by cycle"));
+    _stat->create_expr_average_by_cycle("average_spr_access"    , "nb_spr_access"    , "", _("Average spr access by cycle"));
+
+    _stat->create_expr_percent         ("percent_use_interface_commit"    , "average_inst_commit"   , toString(_param->_nb_inst_commit   ), _("Percent usage of commit interface"));
+    _stat->create_expr_percent         ("percent_use_interface_reexecute" , "average_inst_reexecute", toString(_param->_nb_inst_reexecute), _("Percent usage of reexecute interface"));
+    _stat->create_expr_percent         ("percent_use_interface_spr"       , "average_spr_access"    , toString(_param->_nb_inst_reexecute), _("Percent usage of spr interface"));
+    
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,40 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::statistics_deallocation"
+  void Reexecute_unit::statistics_deallocation (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete _stat;
+    delete [] _stat_bank_nb_inst;
+    
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_transition.cpp	(revision 88)
@@ -0,0 +1,151 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::transition"
+  void Reexecute_unit::transition (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    if (PORT_READ(in_NRESET) == 0)
+      {
+	_priority_execute_loop->reset();
+	_priority_queue_in    ->reset();
+
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  _reexecute_queue [i].clear();
+      }
+    else
+      {
+	_priority_execute_loop->transition();
+	_priority_queue_in    ->transition();
+
+	// ===================================================================
+	// =====[ EXECUTE_LOOP / COMMIT ]=====================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; ++i)
+	  if (internal_QUEUE_PUSH [i])
+	    {
+	      entry_t * entry = new entry_t;
+	      _reexecute_queue [i].push_back(entry);
+
+	      uint32_t x = internal_QUEUE_NUM_EXECUTE_LOOP [i];
+	      uint32_t y = internal_QUEUE_NUM_INST_EXECUTE [i];
+	      uint32_t z = internal_QUEUE_NUM_INST_COMMIT  [i];
+	      
+	      entry->state        = STATE_SPR_ACCESS;
+	      entry->context_id   = (_param->_have_port_context_id  )?PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID   [x][y]):0;
+	      entry->front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]):0;
+	      entry->packet_id    = (_param->_have_port_rob_ptr     )?PORT_READ(in_EXECUTE_LOOP_PACKET_ID    [x][y]):0;
+	      entry->address      = PORT_READ(in_EXECUTE_LOOP_ADDRESS [x][y]);
+	      entry->data         = PORT_READ(in_EXECUTE_LOOP_DATA    [x][y]);
+	      entry->num_reg_rd   = PORT_READ(in_COMMIT_NUM_REG_RD    [z]);
+	      entry->spr_wen      = internal_QUEUE_INFO [i].spr_wen  ;
+	      entry->reexecute    = internal_QUEUE_INFO [i].reexecute;
+	      entry->type         = internal_QUEUE_INFO [i].type     ;
+	      entry->operation    = internal_QUEUE_INFO [i].operation;
+	      entry->write_rd     = internal_QUEUE_INFO [i].write_rd ;
+	    }
+
+#ifdef STATISTICS
+        if (usage_is_set(_usage,USE_STATISTICS))
+          for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
+            if (internal_COMMIT_VAL [i] and PORT_READ(in_COMMIT_ACK[i]))
+              (*_stat_nb_inst_commit) ++;
+#endif
+
+	// ===================================================================
+	// =====[ SPR ]=======================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  if (internal_SPR_VAL [i] and PORT_READ(in_SPR_ACK [i]))
+	    {
+#ifdef STATISTICS
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*_stat_nb_spr_access) ++;
+#endif
+	      entry_t * entry = _reexecute_queue [i].front();
+
+	      if (not entry->spr_wen)
+		{
+		  entry->data     =     PORT_READ(in_SPR_RDATA   [i]);
+		  entry->write_rd = not PORT_READ(in_SPR_INVALID [i]);
+		}
+
+	      if (entry->reexecute)
+		entry->state = STATE_REEXECUTE;
+	      else
+		entry->state = STATE_EMPTY;
+	    }
+
+	// ===================================================================
+	// =====[ REEXECUTE ]=================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  if (internal_REEXECUTE_VAL [i] and PORT_READ(in_REEXECUTE_ACK [i]))
+	    // test source
+	    if (not internal_REEXECUTE_ROB_ACK [i])
+	      {
+#ifdef STATISTICS
+                if (usage_is_set(_usage,USE_STATISTICS))
+                  (*_stat_nb_inst_reexecute) ++;
+#endif
+
+		// invalid entry
+		_reexecute_queue [i].front()->state = STATE_EMPTY;		
+	      }
+#ifdef DEBUG_TEST
+	    else
+	      {
+		if (not PORT_READ(in_REEXECUTE_ROB_VAL [i]))
+		  throw ERRORMORPHEO(FUNCTION,toString(_("in_REEXECUTE_ROB_VAL [%d] must be = 1.\n"),i));
+	      }
+#endif
+	
+	// ===================================================================
+	// =====[ End cycle ]=================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_bank; i++)
+	  if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_EMPTY))
+	    {
+	      entry_t * entry = _reexecute_queue [i].front();
+	      _reexecute_queue [i].pop_front();
+	      delete entry;
+
+#ifdef STATISTICS
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*(_stat_bank_nb_inst [i])) += _reexecute_queue [i].size();
+#endif
+	    }
+      }
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl.cpp	(revision 88)
@@ -0,0 +1,48 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::vhdl"
+  void Reexecute_unit::vhdl (void)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl_body.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl_body.cpp	(revision 88)
@@ -0,0 +1,35 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::vhdl_body"
+  void Reexecute_unit::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+    vhdl->set_body ("");
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl_declaration.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_vhdl_declaration.cpp	(revision 88)
@@ -0,0 +1,34 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace reexecute_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Reexecute_unit::vhdl_declaration"
+  void Reexecute_unit::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(Reexecute_unit,FUNCTION);
+    log_end(Reexecute_unit,FUNCTION);
+  };
+
+}; // end namespace reexecute_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Load_Store_pointer_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp	(revision 88)
@@ -51,5 +51,5 @@
     }
 
-  uint32_t    _nb_load_store_queue              = atoi(argv[x++]);
+  uint32_t    _nb_load_store_queue              = fromString<uint32_t>(argv[x++]);
   
   if (argc != static_cast<int>(2+NB_PARAMS+_nb_front_end+2*_nb_load_store_queue+nb_thread))
@@ -86,5 +86,7 @@
 	 _link_load_store_unit_with_thread,
 	 _nb_inst_insert                  ,
-	 _nb_inst_retire                  );
+	 _nb_inst_retire                  ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp	(revision 88)
@@ -50,4 +50,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Load_Store_pointer_unit * _Load_Store_pointer_unit = new Load_Store_pointer_unit 
     (name.c_str(),
@@ -56,5 +66,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -79,6 +89,8 @@
   ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID         ," in_RETIRE_FRONT_END_ID         ",Tcontext_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID           ," in_RETIRE_CONTEXT_ID           ",Tcontext_t  ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t     ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t,_param->_nb_inst_retire);
+//   ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t     ,_param->_nb_inst_retire);
+//   ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ," in_RETIRE_USE_STORE_QUEUE      ",Tcontrol_t  ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ," in_RETIRE_USE_LOAD_QUEUE       ",Tcontrol_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE," in_RETIRE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ," in_RETIRE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t  ,_param->_nb_inst_retire);
@@ -111,6 +123,8 @@
   if (_param->_have_port_context_id)
   INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_CONTEXT_ID           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_TYPE                 ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_OPERATION            ,_param->_nb_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_TYPE                 ,_param->_nb_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_OPERATION            ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_USE_STORE_QUEUE      ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_USE_LOAD_QUEUE       ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Load_Store_pointer_unit, in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire);
   if (_param->_have_port_load_queue_ptr)
@@ -197,6 +211,8 @@
 	      in_RETIRE_FRONT_END_ID          [i]->write(it->_front_end_id         );
 	      in_RETIRE_CONTEXT_ID            [i]->write(it->_context_id           );
-	      in_RETIRE_TYPE                  [i]->write(it->_type                 );
-	      in_RETIRE_OPERATION             [i]->write(it->_operation            );
+// 	      in_RETIRE_TYPE                  [i]->write(it->_type                 );
+// 	      in_RETIRE_OPERATION             [i]->write(it->_operation            );
+ 	      in_RETIRE_USE_STORE_QUEUE       [i]->write((it->_type == TYPE_MEMORY) and     is_operation_memory_store(it->_operation));
+ 	      in_RETIRE_USE_LOAD_QUEUE        [i]->write((it->_type == TYPE_MEMORY) and not is_operation_memory_store(it->_operation));
 	      in_RETIRE_STORE_QUEUE_PTR_WRITE [i]->write(it->_store_queue_ptr_write);
 	      in_RETIRE_LOAD_QUEUE_PTR_WRITE  [i]->write(it->_load_queue_ptr_write );
@@ -214,5 +230,6 @@
 	  if (in_RETIRE_VAL[i]->read())
 	    {
-	      if (in_RETIRE_TYPE [i]->read() != TYPE_MEMORY)
+	      if (not (in_RETIRE_USE_STORE_QUEUE [i]->read() or
+		       in_RETIRE_USE_LOAD_QUEUE  [i]->read()))
 		TEST(Tcontrol_t, out_RETIRE_ACK[i]->read(),true);
 	      
@@ -366,6 +383,8 @@
   delete []  in_RETIRE_FRONT_END_ID         ;
   delete []  in_RETIRE_CONTEXT_ID           ;
-  delete []  in_RETIRE_TYPE                 ;
-  delete []  in_RETIRE_OPERATION            ;
+//   delete []  in_RETIRE_TYPE                 ;
+//   delete []  in_RETIRE_OPERATION            ;
+  delete []  in_RETIRE_USE_STORE_QUEUE      ;
+  delete []  in_RETIRE_USE_LOAD_QUEUE       ;
   delete []  in_RETIRE_STORE_QUEUE_PTR_WRITE;
   delete []  in_RETIRE_LOAD_QUEUE_PTR_WRITE ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h	(revision 88)
@@ -77,6 +77,8 @@
   public    : SC_IN (Tcontext_t     )      **  in_RETIRE_FRONT_END_ID         ; // [nb_inst_retire]
   public    : SC_IN (Tcontext_t     )      **  in_RETIRE_CONTEXT_ID           ; // [nb_inst_retire]
-  public    : SC_IN (Ttype_t        )      **  in_RETIRE_TYPE                 ; // [nb_inst_retire]
-  public    : SC_IN (Toperation_t   )      **  in_RETIRE_OPERATION            ; // [nb_inst_retire]
+//public    : SC_IN (Ttype_t        )      **  in_RETIRE_TYPE                 ; // [nb_inst_retire]
+//public    : SC_IN (Toperation_t   )      **  in_RETIRE_OPERATION            ; // [nb_inst_retire]
+  public    : SC_IN (Tcontrol_t     )      **  in_RETIRE_USE_STORE_QUEUE      ; // [nb_inst_retire]
+  public    : SC_IN (Tcontrol_t     )      **  in_RETIRE_USE_LOAD_QUEUE       ; // [nb_inst_retire]
   public    : SC_IN (Tlsq_ptr_t     )      **  in_RETIRE_STORE_QUEUE_PTR_WRITE; // [nb_inst_retire]
   public    : SC_IN (Tlsq_ptr_t     )      **  in_RETIRE_LOAD_QUEUE_PTR_WRITE ; // [nb_inst_retire]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h	(revision 88)
@@ -33,16 +33,18 @@
   public : uint32_t    _nb_inst_retire                  ;
 
-  public : uint32_t    _size_front_end_id               ;
-  public : uint32_t    _size_context_id                 ;    
-  public : uint32_t    _size_store_queue_ptr            ;
-  public : uint32_t    _size_load_queue_ptr             ;
+//public : uint32_t    _size_front_end_id               ;
+//public : uint32_t    _size_context_id                 ;    
+//public : uint32_t    _size_store_queue_ptr            ;
+//public : uint32_t    _size_load_queue_ptr             ;
 
-  public : uint32_t    _have_port_front_end_id          ;
-  public : uint32_t    _have_port_context_id            ;
-  public : uint32_t    _have_port_load_queue_ptr        ;
+//public : uint32_t    _have_port_front_end_id          ;
+//public : uint32_t    _have_port_context_id            ;
+//public : uint32_t    _have_port_load_queue_ptr        ;
 
     //-----[ methods ]-----------------------------------------------------------
   public : Parameters  (uint32_t    nb_front_end                    ,
 			uint32_t  * nb_context                      ,
+//                      uint32_t    size_front_end_id               ,
+//                      uint32_t    size_context_id                 ,
 			uint32_t    nb_load_store_queue             ,
 			uint32_t  * size_store_queue                ,
@@ -50,8 +52,12 @@
 			uint32_t ** link_load_store_unit_with_thread,
 			uint32_t    nb_inst_insert                  ,
-			uint32_t    nb_inst_retire                  );
+			uint32_t    nb_inst_retire                  ,
+                        bool        is_toplevel=false
+                        );
 
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp	(revision 88)
@@ -38,4 +38,10 @@
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
 
+#if DEBUG_Load_Store_pointer_unit == true
+    log_printf(INFO,Load_Store_pointer_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Allocation");
 
@@ -47,5 +53,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Allocation of statistics");
@@ -56,5 +62,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -66,5 +72,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Method - transition");
@@ -141,6 +147,8 @@
 	    sensitive << (*(in_RETIRE_LOAD_QUEUE_PTR_WRITE  [i]));
 	    sensitive << (*(in_RETIRE_VAL                   [i]))
-		      << (*(in_RETIRE_TYPE                  [i]))
-		      << (*(in_RETIRE_OPERATION             [i]))
+// 		      << (*(in_RETIRE_TYPE                  [i]))
+// 		      << (*(in_RETIRE_OPERATION             [i]))
+ 		      << (*(in_RETIRE_USE_STORE_QUEUE       [i]))
+ 		      << (*(in_RETIRE_USE_LOAD_QUEUE        [i]))
 		      << (*(in_RETIRE_STORE_QUEUE_PTR_WRITE [i]));;
 	  }
@@ -155,6 +163,8 @@
 	    if (_param->_have_port_context_id)
 	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_CONTEXT_ID            [i]));
-	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_TYPE                  [i]));
-	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_OPERATION             [i]));
+// 	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_TYPE                  [i]));
+// 	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_OPERATION             [i]));
+	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_USE_STORE_QUEUE       [i]));
+	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_USE_LOAD_QUEUE        [i]));
   	    if (_param->_have_port_load_queue_ptr)
 	    (*(out_RETIRE_ACK                   [i])) (*( in_RETIRE_LOAD_QUEUE_PTR_WRITE  [i]));
@@ -175,5 +185,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp	(revision 88)
@@ -78,11 +78,14 @@
       ALLOC1_SIGNAL_IN ( in_RETIRE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t  ,_param->_size_front_end_id   );
       ALLOC1_SIGNAL_IN ( in_RETIRE_CONTEXT_ID           ,"context_id"           ,Tcontext_t  ,_param->_size_context_id     );
-      ALLOC1_SIGNAL_IN ( in_RETIRE_TYPE                 ,"type"                 ,Ttype_t     ,_param->_size_type           );
-      ALLOC1_SIGNAL_IN ( in_RETIRE_OPERATION            ,"operation"            ,Toperation_t,_param->_size_operation      );
+//       ALLOC1_SIGNAL_IN ( in_RETIRE_TYPE                 ,"type"                 ,Ttype_t     ,_param->_size_type           );
+//       ALLOC1_SIGNAL_IN ( in_RETIRE_OPERATION            ,"operation"            ,Toperation_t,_param->_size_operation      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_USE_STORE_QUEUE      ,"use_store_queue"      ,Tcontrol_t  ,_param->_size_operation      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_USE_LOAD_QUEUE       ,"use_load_queue"       ,Tcontrol_t  ,_param->_size_operation      );
       ALLOC1_SIGNAL_IN ( in_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t  ,_param->_size_store_queue_ptr);
       ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t  ,_param->_size_load_queue_ptr );
     }
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
     reg_STORE_QUEUE_PTR_WRITE     = new Tlsq_ptr_t      [_param->_nb_load_store_queue];
     reg_STORE_QUEUE_USE           = new bool *          [_param->_nb_load_store_queue];
@@ -106,7 +109,10 @@
     internal_RETIRE_LSQ           = new uint32_t        [_param->_nb_inst_retire];
     internal_RETIRE_PTR           = new Tlsq_ptr_t      [_param->_nb_inst_retire];
+      }
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
 #ifdef POSITION
-    _component->generate_file();
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp	(revision 88)
@@ -23,5 +23,5 @@
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete    in_CLOCK ;
@@ -48,25 +48,26 @@
 	if (_param->_have_port_context_id)
 	delete []  in_RETIRE_CONTEXT_ID           ;
-	delete []  in_RETIRE_TYPE                 ;
-	delete []  in_RETIRE_OPERATION            ;
+// 	delete []  in_RETIRE_TYPE                 ;
+// 	delete []  in_RETIRE_OPERATION            ;
+ 	delete []  in_RETIRE_USE_STORE_QUEUE      ;
+ 	delete []  in_RETIRE_USE_LOAD_QUEUE       ;
 	delete []  in_RETIRE_STORE_QUEUE_PTR_WRITE;
 	if (_param->_have_port_load_queue_ptr)
 	delete []  in_RETIRE_LOAD_QUEUE_PTR_WRITE ;
 
+        delete [] reg_STORE_QUEUE_PTR_WRITE    ;
+        delete [] reg_STORE_QUEUE_USE          ;
+        delete [] reg_STORE_QUEUE_NB_USE       ;
+        delete [] reg_LOAD_QUEUE_PTR_WRITE     ;
+        delete [] reg_LOAD_QUEUE_USE           ;
+        delete [] internal_INSERT_ACK          ;
+        delete [] internal_INSERT_OPERATION_USE;
+        delete [] internal_INSERT_LSQ          ;
+        delete [] internal_INSERT_PTR          ;
+        delete [] internal_RETIRE_ACK          ;
+        delete [] internal_RETIRE_OPERATION_USE;
+        delete [] internal_RETIRE_LSQ          ;
+        delete [] internal_RETIRE_PTR          ;
       }
-
-    delete [] reg_STORE_QUEUE_PTR_WRITE    ;
-    delete [] reg_STORE_QUEUE_USE          ;
-    delete [] reg_STORE_QUEUE_NB_USE       ;
-    delete [] reg_LOAD_QUEUE_PTR_WRITE     ;
-    delete [] reg_LOAD_QUEUE_USE           ;
-    delete [] internal_INSERT_ACK          ;
-    delete [] internal_INSERT_OPERATION_USE;
-    delete [] internal_INSERT_LSQ          ;
-    delete [] internal_INSERT_PTR          ;
-    delete [] internal_RETIRE_ACK          ;
-    delete [] internal_RETIRE_OPERATION_USE;
-    delete [] internal_RETIRE_LSQ          ;
-    delete [] internal_RETIRE_PTR          ;
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_end_cycle.cpp	(revision 88)
@@ -25,5 +25,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -31,5 +32,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp	(revision 88)
@@ -31,7 +31,8 @@
       {
 	Tcontrol_t ack = false;
-
-	if ( (PORT_READ(in_RETIRE_VAL  [i]) == true       ) and
-	     (PORT_READ(in_RETIRE_TYPE [i]) == TYPE_MEMORY))
+	Tcontrol_t use_sq  = PORT_READ(in_RETIRE_USE_STORE_QUEUE [i]);
+	Tcontrol_t use_lq  = PORT_READ(in_RETIRE_USE_LOAD_QUEUE  [i]);
+	if ( (PORT_READ(in_RETIRE_VAL  [i]) == true) and (use_sq or use_lq))
+// 	     (PORT_READ(in_RETIRE_TYPE [i]) == TYPE_MEMORY))
 	  {
 	    Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0;
@@ -49,5 +50,6 @@
 		
 		// operation became of decod_stage. Also operation is != store_head_ok and store_head_ko
-		if (is_operation_memory_store(PORT_READ(in_RETIRE_OPERATION [i])))
+// 		if (is_operation_memory_store(PORT_READ(in_RETIRE_OPERATION [i])))
+		if (use_sq)
 		  {
 		    internal_RETIRE_OPERATION_USE [i] = OPERATION_USE_STORE_QUEUE;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp	(revision 88)
@@ -22,4 +22,6 @@
   Parameters::Parameters (uint32_t    nb_front_end                    ,
 			  uint32_t  * nb_context                      ,
+//                           uint32_t    size_front_end_id               ,
+//                           uint32_t    size_context_id                 ,
 			  uint32_t    nb_load_store_queue             ,
 			  uint32_t  * size_store_queue                ,
@@ -27,5 +29,7 @@
 			  uint32_t ** link_load_store_unit_with_thread,
 			  uint32_t    nb_inst_insert                  ,
-			  uint32_t    nb_inst_retire                  )
+			  uint32_t    nb_inst_retire                  ,
+                          bool        is_toplevel
+                          )
   {
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
@@ -40,17 +44,20 @@
     _nb_inst_retire                   = nb_inst_retire                  ;
     
-    uint32_t max_nb_context       = max<uint32_t>(nb_context,       nb_front_end);
-    uint32_t max_size_store_queue = max<uint32_t>(size_store_queue, nb_load_store_queue);
-    uint32_t max_size_load_queue  = max<uint32_t>(size_load_queue,  nb_load_store_queue);
+    test();
 
-    _size_front_end_id                = log2(nb_front_end        );
-    _size_context_id                  = log2(max_nb_context      );
-    _size_store_queue_ptr             = log2(max_size_store_queue);
-    _size_load_queue_ptr              = log2(max_size_load_queue );
-    _have_port_front_end_id           = (_size_front_end_id   > 0);
-    _have_port_context_id             = (_size_context_id     > 0);
-    _have_port_load_queue_ptr         = (_size_load_queue_ptr > 0);
+    if (is_toplevel)
+      {
+        _size_front_end_id                = log2(_nb_front_end);
+        _size_context_id                  = log2(max<uint32_t>(_nb_context,_nb_front_end));
+        _size_store_queue_ptr             = log2(max<uint32_t>(size_store_queue, nb_load_store_queue));
+        _size_load_queue_ptr              = log2(max<uint32_t>(size_load_queue,  nb_load_store_queue));
+
+        _have_port_front_end_id           = (_size_front_end_id   > 0);
+        _have_port_context_id             = (_size_context_id     > 0);
+        _have_port_load_queue_ptr         = (_size_load_queue_ptr > 0);
     
-    test();
+        copy();
+      }
+
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End");
   };
@@ -67,5 +74,13 @@
 #undef  FUNCTION
 #define FUNCTION "Load_Store_pointer_unit::~Parameters"
-  Parameters::~Parameters () 
+  Parameters::~Parameters (void) 
+  {
+    log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
+    log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Load_Store_pointer_unit::copy"
+  void Parameters::copy (void) 
   {
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_msg_error.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters_msg_error.cpp	(revision 88)
@@ -49,7 +49,7 @@
 	test.error(toString(_("The load store unit [%d] is not linked with a thread.\n"),i));
     
+    log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End");
+
     return test;
-
-    log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End");
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libRename_unit.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Makefile.deps	(revision 88)
@@ -0,0 +1,69 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Rename_unit			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+ifndef Load_Store_pointer_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/Makefile.deps
+endif
+ifndef Register_translation_unit
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Makefile.deps
+endif
+ifndef Rename_select
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps
+endif
+ifndef Rename_unit_Glue
+include				$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.deps
+endif
+
+
+#-----[ Directory ]----------------------------------------
+
+Rename_unit_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit
+
+#-----[ Library ]------------------------------------------
+
+
+
+Rename_unit_LIBRARY		= 	-lRename_unit					\
+					$(Load_Store_pointer_unit_LIBRARY)		\
+					$(Register_translation_unit_LIBRARY)		\
+					$(Rename_select_LIBRARY)			\
+					$(Rename_unit_Glue_LIBRARY)			\
+					$(Behavioural_LIBRARY)	
+
+Rename_unit_DIR_LIBRARY		=	-L$(Rename_unit_DIR)/lib			\
+					$(Load_Store_pointer_unit_DIR_LIBRARY)		\
+					$(Register_translation_unit_DIR_LIBRARY)	\
+					$(Rename_select_DIR_LIBRARY)			\
+					$(Rename_unit_Glue_DIR_LIBRARY)			\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Rename_unit_library		:
+				@\
+				$(MAKE) Behavioural_library;			\
+				$(MAKE) Load_Store_pointer_unit_library;	\
+				$(MAKE) Register_translation_unit_library;	\
+				$(MAKE) Rename_select_library;			\
+				$(MAKE) Rename_unit_Glue_library;		\
+				$(MAKE) --directory=$(Rename_unit_DIR) --makefile=Makefile;
+
+Rename_unit_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;		\
+				$(MAKE) Load_Store_pointer_unit_library_clean;	\
+				$(MAKE) Register_translation_unit_library_clean;\
+				$(MAKE) Rename_select_library_clean;		\
+				$(MAKE) Rename_unit_Glue_library_clean;		\
+				$(MAKE) --directory=$(Rename_unit_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Dependency_checking_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/main.cpp	(revision 88)
@@ -48,5 +48,7 @@
 	 _nb_general_register,
 	 _nb_special_register,
-	 _nb_inst_insert     );
+	 _nb_inst_insert     ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/SelfTest/src/test.cpp	(revision 88)
@@ -24,4 +24,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Dependency_checking_unit * _Dependency_checking_unit = new Dependency_checking_unit 
     (name.c_str(),
@@ -30,5 +40,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Parameters.h	(revision 88)
@@ -31,11 +31,11 @@
   public : uint32_t   _nb_inst_insert        ;
 
-  public : uint32_t   _size_front_end_id     ;
-  public : uint32_t   _size_context_id       ;
-  public : uint32_t   _size_general_register ;
-  public : uint32_t   _size_special_register ;
-                      
-  public : uint32_t   _have_port_context_id  ;
-  public : uint32_t   _have_port_front_end_id;
+//public : uint32_t   _size_front_end_id     ;
+//public : uint32_t   _size_context_id       ;
+//public : uint32_t   _size_general_register ;
+//public : uint32_t   _size_special_register ;
+
+//public : uint32_t   _have_port_context_id  ;
+//public : uint32_t   _have_port_front_end_id;
 
     //-----[ methods ]-----------------------------------------------------------
@@ -44,9 +44,13 @@
 			uint32_t nb_general_register   ,
 			uint32_t nb_special_register   ,
-			uint32_t nb_inst_insert        );
+			uint32_t nb_inst_insert        ,
+                        bool     is_toplevel=false
+                        );
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
 
   public :        Parameters_test msg_error  (void);
+
+  public :        void            copy       (void);
 
   public :        std::string     print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp	(revision 88)
@@ -39,4 +39,10 @@
     log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin");
 
+#if DEBUG_Dependency_checking_unit == true
+    log_printf(INFO,Dependency_checking_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Dependency_checking_unit,FUNCTION,"Allocation");
 
@@ -48,5 +54,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Dependency_checking_unit,FUNCTION,"Allocation of statistics");
@@ -57,5 +63,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -67,5 +73,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 # if defined(STATISTICS) or defined(VHDL_TESTBENCH)
@@ -86,5 +92,5 @@
 	SC_METHOD (genMealy);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
 	for (uint32_t i=0;i<_param->_nb_inst_insert; i++)
 	  {
@@ -221,5 +227,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Dependency_checking_unit,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp	(revision 88)
@@ -113,5 +113,6 @@
 
 #ifdef POSITION
-    _component->generate_file();
+     if (usage_is_set(_usage,USE_POSITION))
+       _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp	(revision 88)
@@ -24,5 +24,5 @@
     log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete     in_CLOCK ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_end_cycle.cpp	(revision 88)
@@ -26,5 +26,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -32,5 +33,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Dependency_checking_unit::genMealy (void)
   {
-    log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin");
+    log_begin(Dependency_checking_unit,FUNCTION);
+    log_function(Dependency_checking_unit,FUNCTION,_name.c_str());
 
 //     Tcontrol_t         val                [_param->_nb_inst_insert];
@@ -77,4 +78,26 @@
 	num_reg_re_phy_new [i] = PORT_READ(in_RENAME_IN_NUM_REG_RE_PHY_NEW [i]);
 	
+        log_printf(TRACE,Dependency_checking_unit,FUNCTION,"  * (before) [%d] %.2d %.2d, %.1d %.2d %.5d, %.1d %.2d %.5d, %.1d %.2d %.5d, %.1d %.2d %.5d -> %.5d, %.1d %.2d %.5d -> %.5d",
+                   i,
+                   front_end_id       [i],
+                   context_id         [i],
+                   read_ra            [i],
+                   num_reg_ra_log     [i],
+                   num_reg_ra_phy     [i],
+                   read_rb            [i],
+                   num_reg_rb_log     [i],
+                   num_reg_rb_phy     [i],
+                   read_rc            [i],
+                   num_reg_rc_log     [i],
+                   num_reg_rc_phy     [i],
+                   write_rd           [i],
+                   num_reg_rd_log     [i],
+                   num_reg_rd_phy_old [i],
+                   num_reg_rd_phy_new [i],
+                   write_re           [i],
+                   num_reg_re_log     [i],
+                   num_reg_re_phy_old [i],
+                   num_reg_re_phy_new [i]);
+
 	// ================================================================
 	// =====[ Write after Write ]======================================
@@ -88,4 +111,5 @@
 		(context_id     [j] == context_id     [i]) )
 	      {
+                log_printf(TRACE,Dependency_checking_unit,FUNCTION,"    * RD :  WAW dependency with inst[%d].RD",j);
 		num_reg_rd_phy_old [i] = num_reg_rd_phy_new [j];
 		break; // find the most recently dependency
@@ -100,4 +124,5 @@
 		(context_id     [j] == context_id     [i]) )
 	      {
+                log_printf(TRACE,Dependency_checking_unit,FUNCTION,"    * RE : WAW dependency with inst[%d].RE",j);
 		num_reg_re_phy_old [i] = num_reg_re_phy_new [j];
 		break; // find the most recently dependency
@@ -114,4 +139,5 @@
 		(context_id     [j] == context_id     [i]) )
 	      {
+                log_printf(TRACE,Dependency_checking_unit,FUNCTION,"    * RA :  RAW dependency with inst[%d].RD",j);
 		num_reg_ra_phy [i] = num_reg_rd_phy_new [j];
 		break; // find the most recently dependency
@@ -126,4 +152,5 @@
 		(context_id     [j] == context_id     [i]) )
 	      {
+                log_printf(TRACE,Dependency_checking_unit,FUNCTION,"    * RB :  RAW dependency with inst[%d].RD",j);
 		num_reg_rb_phy [i] = num_reg_rd_phy_new [j];
 		break; // find the most recently dependency
@@ -138,7 +165,30 @@
 		(context_id     [j] == context_id     [i]) )
 	      {
+                log_printf(TRACE,Dependency_checking_unit,FUNCTION,"    * RC :  RAW dependency with inst[%d].RE",j);
 		num_reg_rc_phy [i] = num_reg_re_phy_new [j];
 		break; // find the most recently dependency
 	      }
+
+        log_printf(TRACE,Dependency_checking_unit,FUNCTION,"  * (after ) [%d] %.2d %.2d, %.1d %.2d %.5d, %.1d %.2d %.5d, %.1d %.2d %.5d, %.1d %.2d %.5d -> %.5d, %.1d %.2d %.5d -> %.5d",
+                   i,
+                   front_end_id       [i],
+                   context_id         [i],
+                   read_ra            [i],
+                   num_reg_ra_log     [i],
+                   num_reg_ra_phy     [i],
+                   read_rb            [i],
+                   num_reg_rb_log     [i],
+                   num_reg_rb_phy     [i],
+                   read_rc            [i],
+                   num_reg_rc_log     [i],
+                   num_reg_rc_phy     [i],
+                   write_rd           [i],
+                   num_reg_rd_log     [i],
+                   num_reg_rd_phy_old [i],
+                   num_reg_rd_phy_new [i],
+                   write_re           [i],
+                   num_reg_re_log     [i],
+                   num_reg_re_phy_old [i],
+                   num_reg_re_phy_new [i]);
 
  	// =====[ Output ]=================================================
@@ -168,5 +218,5 @@
       }
 
-    log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End");
+    log_end(Dependency_checking_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Parameters.cpp	(revision 88)
@@ -24,5 +24,6 @@
 			  uint32_t nb_general_register   ,
 			  uint32_t nb_special_register   ,
-			  uint32_t nb_inst_insert        )
+			  uint32_t nb_inst_insert        ,
+                          bool     is_toplevel           )
   {
     log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin");
@@ -34,13 +35,19 @@
     _nb_inst_insert      = nb_inst_insert     ;
 
-    _size_front_end_id      = log2(nb_front_end       );
-    _size_context_id        = log2(max_nb_context     );
-    _size_general_register  = log2(nb_general_register);
-    _size_special_register  = log2(nb_special_register);
-    
-    _have_port_front_end_id = _size_front_end_id>0;
-    _have_port_context_id   = _size_context_id  >0;
+    test();
 
-    test();
+    if (is_toplevel)
+      {
+        _size_front_end_id      = log2(nb_front_end       );
+        _size_context_id        = log2(max_nb_context     );
+        _size_general_register  = log2(nb_general_register);
+        _size_special_register  = log2(nb_special_register);
+        
+        _have_port_front_end_id = _size_front_end_id>0;
+        _have_port_context_id   = _size_context_id  >0;
+
+        copy();
+      }
+
     log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End");
   };
@@ -57,5 +64,13 @@
 #undef  FUNCTION
 #define FUNCTION "Dependency_checking_unit::~Parameters"
-  Parameters::~Parameters () 
+  Parameters::~Parameters (void)
+  {
+    log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin");
+    log_printf(FUNC,Dependency_checking_unit,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Dependency_checking_unit::copy"
+  void Parameters::copy (void)
   {
     log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Free_List_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/main.cpp	(revision 88)
@@ -57,5 +57,7 @@
 	 _nb_pop             ,
 	 _nb_push            ,
-	 _priority           );
+	 _priority           ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp	(revision 88)
@@ -23,4 +23,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Free_List_unit * _Free_List_unit = new Free_List_unit 
     (name.c_str(),
@@ -29,5 +39,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h	(revision 88)
@@ -34,6 +34,6 @@
   public : Tpriority_t _priority             ;
 
-  public : uint32_t    _size_general_register;
-  public : uint32_t    _size_special_register;
+//public : uint32_t    _size_general_register;
+//public : uint32_t    _size_special_register;
 
   public : uint32_t    _nb_bank_by_pop       ;
@@ -52,9 +52,12 @@
 			uint32_t    nb_pop             ,
 			uint32_t    nb_push            ,
-			Tpriority_t priority           );
+			Tpriority_t priority           ,
+                        bool        is_toplevel=false);
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
 
   public :        Parameters_test msg_error  (void);
+
+  public :        void            copy       (void);
 
   public :        std::string     print      (uint32_t depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp	(revision 88)
@@ -39,4 +39,10 @@
     log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
 
+#if DEBUG_Free_List_unit == true
+    log_printf(INFO,Free_List_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Free_List_unit,FUNCTION,"Allocation");
 
@@ -48,5 +54,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Free_List_unit,FUNCTION,"Allocation of statistics");
@@ -57,5 +63,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -67,5 +73,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	log_printf(INFO,Free_List_unit,FUNCTION,"Method - transition");
@@ -83,5 +89,5 @@
 	SC_METHOD (genMealy_pop);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
 	for (uint32_t i=0; i<_param->_nb_pop; i++)
 	  sensitive << (*(in_POP_GPR_VAL[i]))
@@ -104,5 +110,5 @@
 	SC_METHOD (genMealy_push_gpr);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
 	for (uint32_t i=0; i<_param->_nb_push; i++)
 	  sensitive << (*(in_PUSH_GPR_VAL    [i]))
@@ -123,5 +129,5 @@
 	SC_METHOD (genMealy_push_spr);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
 	for (uint32_t i=0; i<_param->_nb_push; i++)
 	  sensitive << (*(in_PUSH_SPR_VAL    [i]))
@@ -150,5 +156,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Free_List_unit,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp	(revision 88)
@@ -86,5 +86,6 @@
      }
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+     if (usage_is_set(_usage,USE_SYSTEMC))
+       {
      _gpr_list = new std::list<uint32_t> [_param->_nb_bank];
      _spr_list = new std::list<uint32_t> [_param->_nb_bank];
@@ -98,7 +99,10 @@
      internal_PUSH_GPR_BANK = new uint32_t   [_param->_nb_push];
      internal_PUSH_SPR_BANK = new uint32_t   [_param->_nb_push];
+       }
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
 #ifdef POSITION
-    _component->generate_file();
+     if (usage_is_set(_usage,USE_POSITION))
+       _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp	(revision 88)
@@ -24,5 +24,5 @@
     log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete    in_CLOCK ;
@@ -43,17 +43,19 @@
 	delete [] out_PUSH_SPR_ACK    ;
 	delete []  in_PUSH_SPR_NUM_REG;
+
+        delete [] _gpr_list;
+        delete [] _spr_list;
+        
+        delete [] internal_POP_ACK     ;
+        delete [] internal_POP_GPR_BANK;
+        delete [] internal_POP_SPR_BANK;
+        
+        delete [] internal_PUSH_GPR_ACK ;
+        delete [] internal_PUSH_SPR_ACK ;
+        delete [] internal_PUSH_GPR_BANK;
+        delete [] internal_PUSH_SPR_BANK;
       }
+
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-     delete [] _gpr_list;
-     delete [] _spr_list;
-
-     delete [] internal_POP_ACK     ;
-     delete [] internal_POP_GPR_BANK;
-     delete [] internal_POP_SPR_BANK;
-
-     delete [] internal_PUSH_GPR_ACK ;
-     delete [] internal_PUSH_SPR_ACK ;
-     delete [] internal_PUSH_GPR_BANK;
-     delete [] internal_PUSH_SPR_BANK;
 
      delete _component;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_end_cycle.cpp	(revision 88)
@@ -26,5 +26,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -32,5 +33,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Free_List_unit::genMealy_pop (void)
   {
-    log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
+    log_begin(Free_List_unit,FUNCTION);
+    log_function(Free_List_unit,FUNCTION,_name.c_str());
 
     for (uint32_t i=0; i<_param->_nb_pop; i++)
@@ -77,5 +78,5 @@
     
 
-    log_printf(FUNC,Free_List_unit,FUNCTION,"End");
+    log_end(Free_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Free_List_unit::genMealy_push_gpr (void)
   {
-    log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
+    log_begin(Free_List_unit,FUNCTION);
+    log_function(Free_List_unit,FUNCTION,_name.c_str());
 
     bool bank_use [_param->_nb_bank];
@@ -51,5 +52,5 @@
       }
     
-    log_printf(FUNC,Free_List_unit,FUNCTION,"End");
+    log_end(Free_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Free_List_unit::genMealy_push_spr (void)
   {
-    log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
+    log_begin(Free_List_unit,FUNCTION);
+    log_function(Free_List_unit,FUNCTION,_name.c_str());
 
     bool bank_use [_param->_nb_bank];
@@ -51,5 +52,5 @@
       }
     
-    log_printf(FUNC,Free_List_unit,FUNCTION,"End");
+    log_end(Free_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Free_List_unit::transition (void)
   {
-    log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
+    log_begin(Free_List_unit,FUNCTION);
+    log_function(Free_List_unit,FUNCTION,_name.c_str());
 
     if (PORT_READ(in_NRESET) == 0)
@@ -39,8 +40,9 @@
 	// =====[ POP ]======================================
 	// ==================================================
-// 	log_printf(TRACE,Free_List_unit,FUNCTION,"Test transaction POP");
 	for (uint32_t i=0; i<_param->_nb_pop; i++)
 	  if (PORT_READ(in_POP_VAL[i]) and internal_POP_ACK [i])
 	    {
+              log_printf(TRACE,Free_List_unit,FUNCTION,"  * POP [%d]",i);
+
 	      if (PORT_READ(in_POP_GPR_VAL [i]))
 		_gpr_list [internal_POP_GPR_BANK[i]].pop_front();
@@ -53,21 +55,54 @@
 	// =====[ PUSH_GPR ]=================================
 	// ==================================================
-// 	log_printf(TRACE,Free_List_unit,FUNCTION,"Test transaction PUSH_GPR");
 	for (uint32_t i=0; i<_param->_nb_push; i++)
 	  if (PORT_READ(in_PUSH_GPR_VAL[i]) and internal_PUSH_GPR_ACK [i])
-	    _gpr_list [internal_PUSH_GPR_BANK[i]].push_back(//_param->_mask_gpr &
-							    PORT_READ(in_PUSH_GPR_NUM_REG [i]));
+            {
+              log_printf(TRACE,Free_List_unit,FUNCTION,"  * PUSH_GPR[%d]",i);
 
+              _gpr_list [internal_PUSH_GPR_BANK[i]].push_back(//_param->_mask_gpr &
+                                                              PORT_READ(in_PUSH_GPR_NUM_REG [i]));
+            }
 	// ==================================================
 	// =====[ PUSH_SPR ]=================================
 	// ==================================================
-// 	log_printf(TRACE,Free_List_unit,FUNCTION,"Test transaction PUSH_SPR");
 	for (uint32_t i=0; i<_param->_nb_push; i++)
 	  if (PORT_READ(in_PUSH_SPR_VAL[i]) and internal_PUSH_SPR_ACK [i])
-	    _spr_list [internal_PUSH_SPR_BANK[i]].push_back(//_param->_mask_spr &
-							    PORT_READ(in_PUSH_SPR_NUM_REG [i]));
+            {
+              log_printf(TRACE,Free_List_unit,FUNCTION,"  * PUSH_SPR[%d]",i);
+
+              _spr_list [internal_PUSH_SPR_BANK[i]].push_back(//_param->_mask_spr &
+                                                              PORT_READ(in_PUSH_SPR_NUM_REG [i]));
+            }
 
 	if (_param->_priority == PRIORITY_ROUND_ROBIN)
 	  internal_BANK_PRIORITY = (internal_BANK_PRIORITY+1)%_param->_nb_bank_by_pop;
+
+#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Free_List_unit == true)
+        log_printf(TRACE,Free_List_unit,FUNCTION,"  * Dump Free List");
+
+        for (uint32_t i=0; i<_param->_nb_bank; ++i)
+          {
+            uint32_t j=0;
+            for (std::list<Tgeneral_address_t>::iterator it=_gpr_list->begin();
+                 it!=_gpr_list->end();
+                 ++it)
+              {
+                log_printf(TRACE,Free_List_unit,FUNCTION,"    * GPR_LIST[%.5d][%.5d] : %.5d",i,j,*it);
+                ++j;
+              }
+          }
+        for (uint32_t i=0; i<_param->_nb_bank; ++i)
+          {
+            uint32_t j=0;
+            for (std::list<Tspecial_address_t>::iterator it=_spr_list->begin();
+                 it!=_spr_list->end();
+                 ++it)
+              {
+                log_printf(TRACE,Free_List_unit,FUNCTION,"    * SPR_LIST[%.5d][%.5d] : %.5d",i,j,*it);
+                ++j;
+              }
+          }
+
+#endif
       }
 
@@ -76,5 +111,5 @@
 #endif
 
-    log_printf(FUNC,Free_List_unit,FUNCTION,"End");
+    log_end(Free_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp	(revision 88)
@@ -27,5 +27,6 @@
 			  uint32_t    nb_pop             ,
 			  uint32_t    nb_push            ,
-			  Tpriority_t priority           )
+			  Tpriority_t priority           ,
+                          bool        is_toplevel        )
   {
     log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
@@ -41,6 +42,6 @@
     test();
 
-    _size_general_register = log2(nb_general_register);
-    _size_special_register = log2(nb_special_register);
+    uint32_t size_general_register = log2(nb_general_register);
+    uint32_t size_special_register = log2(nb_special_register);
 
     _nb_bank_by_pop        = _nb_bank / _nb_pop;
@@ -49,5 +50,5 @@
 
     _bank_gpr_nb_slot      = gpr_nb_slot/nb_bank;
-    _bank_gpr_size_slot    = _size_general_register-log2(nb_bank);
+    _bank_gpr_size_slot    = size_general_register-log2(nb_bank);
 
     _mask_gpr              = gen_mask<Tgeneral_address_t> (_bank_gpr_size_slot);
@@ -56,7 +57,15 @@
 
     _bank_spr_nb_slot      = spr_nb_slot/nb_bank;
-    _bank_spr_size_slot    = _size_special_register-log2(nb_bank);
+    _bank_spr_size_slot    = size_special_register-log2(nb_bank);
 
     _mask_spr              = gen_mask<Tspecial_address_t> (_bank_spr_size_slot);
+
+    if (is_toplevel)
+      {
+        _size_general_register = size_general_register;
+        _size_special_register = size_special_register;
+
+        copy();
+      }
 
     log_printf(FUNC,Free_List_unit,FUNCTION,"End");
@@ -74,5 +83,13 @@
 #undef  FUNCTION
 #define FUNCTION "Free_List_unit::~Parameters"
-  Parameters::~Parameters () 
+  Parameters::~Parameters (void) 
+  {
+    log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
+    log_printf(FUNC,Free_List_unit,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Free_List_unit::copy"
+  void Parameters::copy (void) 
   {
     log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_msg_error.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters_msg_error.cpp	(revision 88)
@@ -29,11 +29,15 @@
 
     if (_nb_general_register <= _nb_thread*_nb_general_register_logic)
-      test.error(_("The number of physical general register is insufficient.\n"));
+      test.error(toString(_("The number of physical general register is insufficient. (Minimum : %d)\n"),_nb_thread*_nb_general_register_logic+1));
     if (_nb_special_register <= _nb_thread*_nb_special_register_logic)
-      test.error(_("The number of physical special register is insufficient.\n"));
+      test.error(toString(_("The number of physical special register is insufficient. (Minimum : %d)\n"),_nb_thread*_nb_special_register_logic+1));
     if (not is_multiple (_nb_bank, _nb_pop))
       test.error(_("Number of pop must be a multiple of number of bank.\n"));
     if (not is_power2 (_nb_bank))
       test.error(_("Number of bank must be a power of 2.\n"));
+    if (_nb_general_register < _nb_bank)
+      test.error(_("The number of physical general register must be >= nb_bank.\n"));
+    if (_nb_special_register < _nb_bank)
+      test.error(_("The number of physical special register must be >= nb_bank.\n"));
 
     if ((_priority != PRIORITY_STATIC) and
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Register_Address_Translation_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp	(revision 88)
@@ -60,5 +60,7 @@
 	 _nb_special_register ,
 	 _nb_inst_insert      ,
-	 _nb_inst_retire      );
+	 _nb_inst_retire      ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp	(revision 88)
@@ -24,4 +24,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Register_Address_Translation_unit * _Register_Address_Translation_unit = new Register_Address_Translation_unit 
     (name.c_str(),
@@ -30,5 +40,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -78,4 +88,6 @@
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD,"out_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD,"out_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
   
   /********************************************************
@@ -131,4 +143,6 @@
   INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire);
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -226,8 +240,14 @@
 	    }
 
+          uint32_t retire_max = _param->_nb_inst_retire;
 	  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
 	    {
-	      Tcontrol_t val = (rand()%100)<percent_transaction_retire;
+              // in order ...........
+
+	      Tcontrol_t val = (i<retire_max) and ((rand()%100)<percent_transaction_retire);
 	      
+              if (not val)
+                retire_max = i;
+
 	      Tcontext_t front_end_id = rand() % _param->_nb_front_end;
 
@@ -259,4 +279,11 @@
 		}
 	    }
+
+	  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	    {
+              TEST(Tcontrol_t,out_RETIRE_RESTORE_RD_PHY_OLD[i]->read(), 0);
+              TEST(Tcontrol_t,out_RETIRE_RESTORE_RE_PHY_OLD[i]->read(), 0);
+            }
+
 	  for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
 	    {
@@ -320,4 +347,6 @@
       SC_START(1);
 
+      // EVENT !!!!!!!!
+
       nb_request = 32;
       while (nb_request > 1)
@@ -347,7 +376,14 @@
 	    }
 
+          uint32_t retire_max = _param->_nb_inst_retire;
 	  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
 	    {
-	      Tcontrol_t val = (rand()%100)<percent_transaction_retire;
+              // in order ...........
+
+	      Tcontrol_t val = (i<retire_max) and ((rand()%100)<percent_transaction_retire);
+	      
+              if (not val)
+                retire_max = i;
+
 	      in_RETIRE_VAL                [i]->write(val);
 	      in_RETIRE_FRONT_END_ID       [i]->write(retire_front_end_id [i]);
@@ -362,5 +398,5 @@
 	    }
 
-	  SC_START(1);
+	  SC_START(0);
 	  
 
@@ -380,10 +416,21 @@
 	  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
 	    {
+              LABEL("RETIRE[%d]",i);
+
 	      Tcontext_t front_end_id = in_RETIRE_FRONT_END_ID [i]->read();
 	      Tcontext_t context_id   = in_RETIRE_CONTEXT_ID   [i]->read();
+
+              LABEL("  * front_end_id : %d",front_end_id);
+              LABEL("  * context_id   : %d",context_id  );
+
 	      if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read())
 		{
 		  if (in_RETIRE_WRITE_RD [i]->read() == 1)
 		    {
+//                       LABEL("  * transaction and write rd");
+//                       LABEL("    * rd_log       : %d",in_RETIRE_NUM_REG_RD_LOG[i]->read());
+//                       LABEL("    * rat_gpr_updt : %d",rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()]);
+                      TEST(Tcontrol_t,out_RETIRE_RESTORE_RD_PHY_OLD[i]->read(), (rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] == false));
+
 		      if (rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] == false)
 			rat_gpr[front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] = in_RETIRE_NUM_REG_RD_PHY_OLD[i]->read();
@@ -392,4 +439,6 @@
 		  if (in_RETIRE_WRITE_RE [i]->read() == 1)
 		    {
+                      TEST(Tcontrol_t,out_RETIRE_RESTORE_RE_PHY_OLD[i]->read(), (rat_spr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] == false));
+
 		      if (rat_spr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] == false)
 			rat_spr[front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] = in_RETIRE_NUM_REG_RE_PHY_OLD[i]->read();
@@ -398,4 +447,7 @@
 		}
 	    }
+
+	  SC_START(1);
+
 	  for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
 	    {
@@ -412,6 +464,6 @@
 		  TEST(Tspecial_address_t,out_RENAME_NUM_REG_RE_PHY_OLD[i]->read(), rat_spr[front_end_id][context_id][in_RENAME_NUM_REG_RE_LOG[i]->read()]);
 		}
-
-	    }
+	    }
+
 	}
     }
@@ -472,4 +524,6 @@
   delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
   delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
+  delete [] out_RETIRE_RESTORE_RD_PHY_OLD;
+  delete [] out_RETIRE_RESTORE_RE_PHY_OLD;
 
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h	(revision 88)
@@ -32,11 +32,11 @@
   public : uint32_t   _nb_inst_retire        ;    
 		      
-  public : uint32_t   _size_front_end_id     ;
-  public : uint32_t   _size_context_id       ;
-  public : uint32_t   _size_general_register ;
-  public : uint32_t   _size_special_register ;
-		      
-  public : uint32_t   _have_port_context_id  ;
-  public : uint32_t   _have_port_front_end_id;
+//public : uint32_t   _size_front_end_id     ;
+//public : uint32_t   _size_context_id       ;
+//public : uint32_t   _size_general_register ;
+//public : uint32_t   _size_special_register ;
+//      	      
+//public : uint32_t   _have_port_context_id  ;
+//public : uint32_t   _have_port_front_end_id;
 
     //-----[ methods ]-----------------------------------------------------------
@@ -46,8 +46,11 @@
 			uint32_t   nb_special_register,
 			uint32_t   nb_inst_insert     ,
-			uint32_t   nb_inst_retire     
+			uint32_t   nb_inst_retire     ,
+                        bool       is_toplevel=false
 			);
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h	(revision 88)
@@ -103,8 +103,14 @@
   public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RD_PHY_OLD;//[nb_inst_retire]
   public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire]
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : Tgeneral_address_t          *** rat_gpr;                      //[nb_front_end][nb_context][nb_general_register_logic]
+  private   : bool                        *** rat_gpr_update_table;         //[nb_front_end][nb_context][nb_general_register_logic]
+  private   : Tspecial_address_t          *** rat_spr;                      //[nb_front_end][nb_context][nb_special_register_logic]
+  private   : bool                        *** rat_spr_update_table;         //[nb_front_end][nb_context][nb_special_register_logic]
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -113,8 +119,6 @@
   private   : Tcontrol_t                    * internal_RETIRE_ACK;          //[nb_inst_retire]
 
-  private   : Tgeneral_address_t          *** rat_gpr;                      //[nb_front_end][nb_context][nb_general_register_logic]
-  private   : bool                        *** rat_gpr_update_table;         //[nb_front_end][nb_context][nb_general_register_logic]
-  private   : Tspecial_address_t          *** rat_spr;                      //[nb_front_end][nb_context][nb_special_register_logic]
-  private   : bool                        *** rat_spr_update_table;         //[nb_front_end][nb_context][nb_special_register_logic]
+  private   : bool                        *** internal_rat_gpr_update_table;         //[nb_front_end][nb_context][nb_general_register_logic]
+  private   : bool                        *** internal_rat_spr_update_table;         //[nb_front_end][nb_context][nb_special_register_logic]
 #endif
 
@@ -150,5 +154,6 @@
 #ifdef SYSTEMC				       
   public  : void        transition                (void);
-  public  : void        genMoore                  (void);
+  public  : void        genMealy_rename           (void);
+  public  : void        genMealy_retire           (void);
 #endif					       
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp	(revision 88)
@@ -25,5 +25,6 @@
 			  uint32_t   nb_special_register,
 			  uint32_t   nb_inst_insert     ,
-			  uint32_t   nb_inst_retire     )
+			  uint32_t   nb_inst_retire     ,
+                          bool       is_toplevel)
   {
     log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
@@ -36,13 +37,18 @@
     _nb_inst_retire         = nb_inst_retire     ;
 
-    _size_front_end_id      = log2(nb_front_end       );
-    _size_context_id        = log2(max<uint32_t>(nb_context, nb_front_end));
-    _size_general_register  = log2(nb_general_register);
-    _size_special_register  = log2(nb_special_register);
+    test();
+
+    if (is_toplevel)
+      {
+        _size_front_end_id      = log2(nb_front_end       );
+        _size_context_id        = log2(max<uint32_t>(nb_context, nb_front_end));
+        _size_general_register  = log2(nb_general_register);
+        _size_special_register  = log2(nb_special_register);
     
-    _have_port_front_end_id = _size_front_end_id>0;
-    _have_port_context_id   = _size_context_id  >0;
-
-    test();
+        _have_port_front_end_id = _size_front_end_id>0;
+        _have_port_context_id   = _size_context_id  >0;
+        
+        copy();
+      }
 
     log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End");
@@ -60,5 +66,13 @@
 #undef  FUNCTION
 #define FUNCTION "Register_Address_Translation_unit::~Parameters"
-  Parameters::~Parameters () 
+  Parameters::~Parameters (void) 
+  {
+    log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
+    log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Register_Address_Translation_unit::copy"
+  void Parameters::copy (void) 
   {
     log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp	(revision 88)
@@ -39,4 +39,10 @@
     log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
 
+#if DEBUG_Register_Address_Translation_unit == true
+    log_printf(INFO,Register_Address_Translation_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Allocation");
 
@@ -48,5 +54,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Allocation of statistics");
@@ -57,5 +63,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -67,5 +73,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	// Constant : accepted already transaction
@@ -95,9 +101,46 @@
 # endif    
 
-	log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Method - genMoore");
+	log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Method - genMealy_rename");
 
-	SC_METHOD (genMoore);
+	SC_METHOD (genMealy_rename);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+        for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+          {
+            if (_param->_have_port_front_end_id) 
+            sensitive << (*(in_RENAME_FRONT_END_ID   [i]));
+            if (_param->_have_port_context_id  )
+            sensitive << (*(in_RENAME_CONTEXT_ID     [i]));
+            
+            sensitive << (*(in_RENAME_NUM_REG_RA_LOG [i]))
+                      << (*(in_RENAME_NUM_REG_RB_LOG [i]))
+                      << (*(in_RENAME_NUM_REG_RC_LOG [i]))
+                      << (*(in_RENAME_NUM_REG_RD_LOG [i]))
+                      << (*(in_RENAME_NUM_REG_RE_LOG [i]));
+      }
+
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Method - genMealy_retire");
+
+	SC_METHOD (genMealy_retire);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+        for (uint32_t i=0; i<_param->_nb_inst_retire; ++i)
+          {
+            if (param->_have_port_front_end_id)
+            sensitive << (*(in_RETIRE_FRONT_END_ID   [i]));
+            if (param->_have_port_context_id)
+            sensitive << (*(in_RETIRE_CONTEXT_ID     [i]));
+            
+            sensitive << (*(in_RETIRE_EVENT_STATE    [i]))
+                      << (*(in_RETIRE_WRITE_RD       [i]))
+                      << (*(in_RETIRE_WRITE_RE       [i]))
+                      << (*(in_RETIRE_NUM_REG_RD_LOG [i]))
+                      << (*(in_RETIRE_NUM_REG_RE_LOG [i]));
+          }
 	
 # ifdef SYSTEMCASS_SPECIFIC
@@ -117,5 +160,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp	(revision 88)
@@ -107,34 +107,47 @@
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register);
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE_RD_PHY_OLD,"restore_rd_phy_old",Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE_RE_PHY_OLD,"restore_re_phy_old",Tcontrol_t        ,1);
     }
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
     internal_RENAME_ACK = new Tcontrol_t [_param->_nb_inst_insert];
     internal_INSERT_ACK = new Tcontrol_t [_param->_nb_inst_insert];
     internal_RETIRE_ACK = new Tcontrol_t [_param->_nb_inst_retire];
 
-    rat_gpr              = new Tgeneral_address_t ** [_param->_nb_front_end];
-    rat_gpr_update_table = new bool               ** [_param->_nb_front_end];
-    rat_spr              = new Tspecial_address_t ** [_param->_nb_front_end];
-    rat_spr_update_table = new bool               ** [_param->_nb_front_end];
+    rat_gpr                       = new Tgeneral_address_t ** [_param->_nb_front_end];
+    rat_spr                       = new Tspecial_address_t ** [_param->_nb_front_end];
+    rat_gpr_update_table          = new bool               ** [_param->_nb_front_end];
+    rat_spr_update_table          = new bool               ** [_param->_nb_front_end];
+    internal_rat_gpr_update_table = new bool               ** [_param->_nb_front_end];
+    internal_rat_spr_update_table = new bool               ** [_param->_nb_front_end];
 
     for (uint32_t i=0; i<_param->_nb_front_end; i++)
       {
-	rat_gpr              [i] = new Tgeneral_address_t * [_param->_nb_context[i]];
-	rat_gpr_update_table [i] = new bool               * [_param->_nb_context[i]];
-	rat_spr              [i] = new Tspecial_address_t * [_param->_nb_context[i]];
-	rat_spr_update_table [i] = new bool               * [_param->_nb_context[i]];
+	rat_gpr                       [i] = new Tgeneral_address_t * [_param->_nb_context[i]];
+	rat_spr                       [i] = new Tspecial_address_t * [_param->_nb_context[i]];
+	rat_gpr_update_table          [i] = new bool               * [_param->_nb_context[i]];
+	rat_spr_update_table          [i] = new bool               * [_param->_nb_context[i]];
+	internal_rat_gpr_update_table [i] = new bool               * [_param->_nb_context[i]];
+	internal_rat_spr_update_table [i] = new bool               * [_param->_nb_context[i]];
 
 	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
 	  {
-	    rat_gpr              [i][j] = new Tgeneral_address_t [_param->_nb_general_register_logic];
-	    rat_gpr_update_table [i][j] = new bool               [_param->_nb_general_register_logic];
-	    rat_spr              [i][j] = new Tspecial_address_t [_param->_nb_special_register_logic];
-	    rat_spr_update_table [i][j] = new bool               [_param->_nb_special_register_logic];
+	    rat_gpr                       [i][j] = new Tgeneral_address_t [_param->_nb_general_register_logic];
+	    rat_spr                       [i][j] = new Tspecial_address_t [_param->_nb_special_register_logic];
+	    rat_gpr_update_table          [i][j] = new bool               [_param->_nb_general_register_logic];
+	    rat_spr_update_table          [i][j] = new bool               [_param->_nb_special_register_logic];
+	    internal_rat_gpr_update_table [i][j] = new bool               [_param->_nb_general_register_logic];
+	    internal_rat_spr_update_table [i][j] = new bool               [_param->_nb_special_register_logic];
 	  }
       }
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
 #ifdef POSITION
-    _component->generate_file();
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp	(revision 88)
@@ -24,5 +24,5 @@
     log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete     in_CLOCK ;
@@ -72,14 +72,20 @@
   	delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
   	delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
+  	delete [] out_RETIRE_RESTORE_RD_PHY_OLD;
+  	delete [] out_RETIRE_RESTORE_RE_PHY_OLD;
+
+        delete [] internal_RENAME_ACK;
+        delete [] internal_INSERT_ACK;
+        delete [] internal_RETIRE_ACK;
+        
+        delete [] rat_gpr             ;
+        delete [] rat_spr             ;
+        delete [] rat_gpr_update_table;
+        delete [] rat_spr_update_table;
+        delete [] internal_rat_gpr_update_table;
+        delete [] internal_rat_spr_update_table;
       }
+
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    delete [] internal_RENAME_ACK;
-    delete [] internal_INSERT_ACK;
-    delete [] internal_RETIRE_ACK;
-
-    delete [] rat_gpr             ;
-    delete [] rat_gpr_update_table;
-    delete [] rat_spr             ;
-    delete [] rat_spr_update_table;
     delete    _component;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_end_cycle.cpp	(revision 88)
@@ -26,5 +26,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -32,5 +33,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp	(revision 88)
@@ -0,0 +1,52 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace register_translation_unit {
+namespace register_address_translation_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Register_Address_Translation_unit::genMealy_rename"
+  void Register_Address_Translation_unit::genMealy_rename (void)
+  {
+    log_begin(Register_Address_Translation_unit,FUNCTION);
+    log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str());
+
+    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+      {
+	Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
+	Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
+
+	PORT_WRITE(out_RENAME_NUM_REG_RA_PHY     [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RA_LOG [i])]);
+	PORT_WRITE(out_RENAME_NUM_REG_RB_PHY     [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RB_LOG [i])]);
+	PORT_WRITE(out_RENAME_NUM_REG_RC_PHY     [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RC_LOG [i])]);
+	PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RD_LOG [i])]);
+	PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RE_LOG [i])]);
+      }
+
+    log_end(Register_Address_Translation_unit,FUNCTION);
+  };
+
+}; // end namespace register_address_translation_unit
+}; // end namespace register_translation_unit
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp	(revision 88)
@@ -0,0 +1,110 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace register_translation_unit {
+namespace register_address_translation_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Register_Address_Translation_unit::genMealy_retire"
+  void Register_Address_Translation_unit::genMealy_retire (void)
+  {
+    log_begin(Register_Address_Translation_unit,FUNCTION);
+    log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str());
+
+    // Init internal update table
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+        {
+          for (uint32_t k=0; k<_param->_nb_general_register_logic; ++k)
+            internal_rat_gpr_update_table [i][j][k] = rat_gpr_update_table [i][j][k];
+          for (uint32_t k=0; k<_param->_nb_special_register_logic; ++k)
+            internal_rat_spr_update_table [i][j][k] = rat_spr_update_table [i][j][k];
+        }
+
+
+    // RETIRE is in order -> also don't need test if an instruction is valid
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * inst_retire [%d]",i);
+
+        // init -> need't restore old value
+        Tcontrol_t     retire_restore_rd_phy_old = false;
+        Tcontrol_t     retire_restore_re_phy_old = false;
+        Tevent_state_t event_state               = PORT_READ(in_RETIRE_EVENT_STATE [i]);
+
+        // Test if event -> need restore ?
+        if (event_state != EVENT_STATE_NO_EVENT)
+          {
+            Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0;
+            Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RETIRE_CONTEXT_ID   [i]):0;
+
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * Have event");
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end_id         : %d",front_end_id);
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context_id           : %d",context_id  );
+                        
+            // Test if event have just occure -> reset update_table
+            if (event_state == EVENT_STATE_EVENT)
+              {
+                // Reset update_table
+                for (uint32_t j=0; j<_param->_nb_general_register_logic; j++)
+                  internal_rat_gpr_update_table[front_end_id][context_id][j] = 0;
+                for (uint32_t j=0; j<_param->_nb_special_register_logic; j++)
+                  internal_rat_spr_update_table[front_end_id][context_id][j] = 0;
+              }
+            
+            // Test and update update table
+            if (PORT_READ(in_RETIRE_WRITE_RD [i]))
+              {
+                Tgeneral_address_t rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]);
+                retire_restore_rd_phy_old = (internal_rat_gpr_update_table[front_end_id][context_id][rd_log] == 0);
+
+//                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_rd");
+//                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * rd_log             : %d",rd_log);
+//                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * rat_gpr_update     : %d",internal_rat_gpr_update_table[front_end_id][context_id][rd_log]);
+
+                internal_rat_gpr_update_table[front_end_id][context_id][rd_log] = 1;
+              }
+            if (PORT_READ(in_RETIRE_WRITE_RE [i]))
+              {
+//                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_re");
+
+                Tgeneral_address_t re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]);
+                retire_restore_re_phy_old = (internal_rat_spr_update_table[front_end_id][context_id][re_log] == 0);
+                internal_rat_spr_update_table[front_end_id][context_id][re_log] = 1;
+              }
+
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * restore_rd_phy_old   : %d",retire_restore_rd_phy_old);
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * restore_re_phy_old   : %d",retire_restore_re_phy_old);
+          }
+              
+        PORT_WRITE(out_RETIRE_RESTORE_RD_PHY_OLD[i], retire_restore_rd_phy_old);
+        PORT_WRITE(out_RETIRE_RESTORE_RE_PHY_OLD[i], retire_restore_re_phy_old);
+      }
+
+    log_end(Register_Address_Translation_unit,FUNCTION);
+  };
+
+}; // end namespace register_address_translation_unit
+}; // end namespace register_translation_unit
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMoore.cpp	(revision 82)
+++ 	(revision )
@@ -1,51 +1,0 @@
-#ifdef SYSTEMC
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace core {
-namespace multi_ooo_engine {
-namespace ooo_engine {
-namespace rename_unit {
-namespace register_translation_unit {
-namespace register_address_translation_unit {
-
-
-#undef  FUNCTION
-#define FUNCTION "Register_Address_Translation_unit::genMoore"
-  void Register_Address_Translation_unit::genMoore (void)
-  {
-    log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
-
-    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-      {
-	Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
-	Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
-
-	PORT_WRITE(out_RENAME_NUM_REG_RA_PHY     [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RA_LOG [i])]);
-	PORT_WRITE(out_RENAME_NUM_REG_RB_PHY     [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RB_LOG [i])]);
-	PORT_WRITE(out_RENAME_NUM_REG_RC_PHY     [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RC_LOG [i])]);
-	PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RD_LOG [i])]);
-	PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RE_LOG [i])]);
-      }
-
-    log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End");
-  };
-
-}; // end namespace register_address_translation_unit
-}; // end namespace register_translation_unit
-}; // end namespace rename_unit
-}; // end namespace ooo_engine
-}; // end namespace multi_ooo_engine
-}; // end namespace core
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Register_Address_Translation_unit::transition (void)
   {
-    log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin");
+    log_begin(Register_Address_Translation_unit,FUNCTION);
+    log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str());
 
     if (PORT_READ(in_NRESET) == 0)
@@ -90,15 +91,15 @@
 		    }
 
- 
-		  // Test if write and have not a previous update
+ 		  // Test if write and have not a previous update
 		  if (PORT_READ(in_RETIRE_WRITE_RD [i]) == 1)
 		    {
 		      Tgeneral_address_t rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]);
 		      
-		      log_printf(NONE,Register_Address_Translation_unit,FUNCTION,"retire[%d]",i);
-		      log_printf(NONE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id);
-		      log_printf(NONE,Register_Address_Translation_unit,FUNCTION," * context_id   : %d",context_id  );
-		      log_printf(NONE,Register_Address_Translation_unit,FUNCTION," * rd_log       : %d",rd_log      );
+		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * retire[%d]",i);
+		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end_id : %d",front_end_id);
+		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context_id   : %d",context_id  );
+		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * rd_log       : %d",rd_log      );
 		      
+// 		      if (RETIRE_RESTORE_RD_PHY_OLD [i])
 		      if (rat_gpr_update_table[front_end_id][context_id][rd_log] == 0)
 			{
@@ -112,4 +113,5 @@
 		      Tspecial_address_t re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]);
 
+// 		      if (RETIRE_RESTORE_RE_PHY_OLD [i])
 		      if (rat_spr_update_table[front_end_id][context_id][re_log] == 0)
 			{
@@ -122,9 +124,24 @@
       }
 
+#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Register_Address_Translation_unit == true)
+    log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * Dump RAT (Register_Address_Translation_unit)");
+    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+        {
+          log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end[%d].context[%d]",i,j);
+
+          for (uint32_t k=0; k<_param->_nb_general_register_logic; ++k)
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * GPR[%.2d] - %.5d %.1d",k,rat_gpr[i][j][k],rat_gpr_update_table[i][j][k]);
+
+          for (uint32_t k=0; k<_param->_nb_special_register_logic; ++k)
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * SPR[%.2d] - %.5d %.1d",k,rat_spr[i][j][k],rat_spr_update_table[i][j][k]);
+        }
+#endif
+
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
     end_cycle ();
 #endif
 
-    log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"End");
+    log_end(Register_Address_Translation_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Register_translation_unit_Glue_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/configuration.cfg	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/configuration.cfg	(revision 88)
@@ -2,2 +2,4 @@
 1	4	*2	# nb_inst_insert
 1	4	*2	# nb_inst_retire
+5  	5  	*2	# size_general_register
+2 	2 	*2	# size_special_register
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/main.cpp	(revision 88)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/include/test.h"
 
-#define NB_PARAMS 2
+#define NB_PARAMS 4
 
 void usage (int argc, char * argv[])
@@ -14,6 +14,8 @@
   err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
   err (_("list_params is :\n"));
-  err (_(" * nb_inst_insert (uint32_t)\n"));
-  err (_(" * nb_inst_retire (uint32_t)\n"));
+  err (_(" * nb_inst_insert        (uint32_t)\n"));
+  err (_(" * nb_inst_retire        (uint32_t)\n"));
+  err (_(" * size_general_register (uint32_t)\n"));
+  err (_(" * size_special_register (uint32_t)\n"));
 
   exit (1);
@@ -32,6 +34,9 @@
 
   string name = argv[x++];
-  uint32_t _nb_inst_insert = atoi(argv[x++]);
-  uint32_t _nb_inst_retire = atoi(argv[x++]);
+  uint32_t _nb_inst_insert        = fromString<uint32_t>(argv[x++]);
+  uint32_t _nb_inst_retire        = fromString<uint32_t>(argv[x++]);
+  uint32_t _size_general_register = fromString<uint32_t>(argv[x++]);
+  uint32_t _size_special_register = fromString<uint32_t>(argv[x++]);
+
 
   int _return = EXIT_SUCCESS;
@@ -40,5 +45,9 @@
       morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters
 	(_nb_inst_insert,
-	 _nb_inst_retire);
+	 _nb_inst_retire,
+	 _size_general_register,
+	 _size_special_register,
+         true //is_toplevel
+	 );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp	(revision 88)
@@ -23,4 +23,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Register_translation_unit_Glue * _Register_translation_unit_Glue = new Register_translation_unit_Glue 
     (name.c_str(),
@@ -29,5 +39,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -51,4 +61,53 @@
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_VAL ,"out_INSERT_STAT_LIST_VAL ",Tcontrol_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_STAT_LIST_ACK ," in_INSERT_STAT_LIST_ACK ",Tcontrol_t,_param->_nb_inst_insert);
+
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RA           ," in_INSERT_DEPENDENCY_CHECKING_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RB           ," in_INSERT_DEPENDENCY_CHECKING_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RC           ," in_INSERT_DEPENDENCY_CHECKING_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ," in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ," in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
+
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,"out_INSERT_STAT_LIST_READ_RA                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,"out_INSERT_STAT_LIST_READ_RB                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,"out_INSERT_STAT_LIST_READ_RC                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,"out_INSERT_STAT_LIST_WRITE_RD                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,"out_INSERT_STAT_LIST_WRITE_RE                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ",Tspecial_address_t,_param->_nb_inst_insert);
+
+  ALLOC1_SC_SIGNAL(out_INSERT_RAT_WRITE_RD                          ,"out_INSERT_RAT_WRITE_RD                          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RD_LOG                    ,"out_INSERT_RAT_NUM_REG_RD_LOG                    ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ,"out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RAT_WRITE_RE                          ,"out_INSERT_RAT_WRITE_RE                          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RE_LOG                    ,"out_INSERT_RAT_NUM_REG_RE_LOG                    ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ,"out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ",Tspecial_address_t,_param->_nb_inst_insert);
+
+  ALLOC1_SC_SIGNAL(out_INSERT_READ_RA                               ,"out_INSERT_READ_RA                               ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RA_PHY                        ,"out_INSERT_NUM_REG_RA_PHY                        ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_READ_RB                               ,"out_INSERT_READ_RB                               ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RB_PHY                        ,"out_INSERT_NUM_REG_RB_PHY                        ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_READ_RC                               ,"out_INSERT_READ_RC                               ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RC_PHY                        ,"out_INSERT_NUM_REG_RC_PHY                        ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_WRITE_RD                              ,"out_INSERT_WRITE_RD                              ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_LOG                        ,"out_INSERT_NUM_REG_RD_LOG                        ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD                    ,"out_INSERT_NUM_REG_RD_PHY_OLD                    ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW                    ,"out_INSERT_NUM_REG_RD_PHY_NEW                    ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_WRITE_RE                              ,"out_INSERT_WRITE_RE                              ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_LOG                        ,"out_INSERT_NUM_REG_RE_LOG                        ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD                    ,"out_INSERT_NUM_REG_RE_PHY_OLD                    ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                    ,"out_INSERT_NUM_REG_RE_PHY_NEW                    ",Tspecial_address_t,_param->_nb_inst_insert);
+
   ALLOC1_SC_SIGNAL( in_RETIRE_VAL           ," in_RETIRE_VAL           ",Tcontrol_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL(out_RETIRE_ACK           ,"out_RETIRE_ACK           ",Tcontrol_t,_param->_nb_inst_retire);
@@ -78,10 +137,59 @@
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_VAL ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_STAT_LIST_ACK ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_VAL           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_ACK           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_RAT_VAL       ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_RAT_ACK       ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_STAT_LIST_VAL ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_STAT_LIST_ACK ,_param->_nb_inst_retire);
+  
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_READ_RA           ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_READ_RB           ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_READ_RC           ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
+
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert);
+
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_WRITE_RD                          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_NUM_REG_RD_LOG                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_WRITE_RE                          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_NUM_REG_RE_LOG                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ,_param->_nb_inst_insert);
+
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_READ_RA                               ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RA_PHY                        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_READ_RB                               ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RB_PHY                        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_READ_RC                               ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RC_PHY                        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_WRITE_RD                              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RD_LOG                        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RD_PHY_OLD                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RD_PHY_NEW                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_WRITE_RE                              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RE_LOG                        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RE_PHY_OLD                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_NUM_REG_RE_PHY_NEW                    ,_param->_nb_inst_insert);
+  
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_VAL          ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_ACK          ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_RAT_VAL      ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_RAT_ACK      ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_RETIRE_STAT_LIST_VAL,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_RETIRE_STAT_LIST_ACK,_param->_nb_inst_retire);
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -187,21 +295,70 @@
   delete in_NRESET;
 
-  delete []  in_INSERT_RENAME_VAL    ;
-  delete [] out_INSERT_RENAME_ACK    ;
-  delete [] out_INSERT_INSERT_VAL    ;
-  delete []  in_INSERT_INSERT_ACK    ;
-  delete [] out_INSERT_RAT_INSERT_VAL;
-  delete []  in_INSERT_RAT_RENAME_ACK;
-  delete []  in_INSERT_RAT_INSERT_ACK;
-  delete [] out_INSERT_FREE_LIST_VAL ;
-  delete []  in_INSERT_FREE_LIST_ACK ;
-  delete [] out_INSERT_STAT_LIST_VAL ;
-  delete []  in_INSERT_STAT_LIST_ACK ;
-  delete []  in_RETIRE_VAL           ;
-  delete [] out_RETIRE_ACK           ;
-  delete [] out_RETIRE_RAT_VAL       ;
-  delete []  in_RETIRE_RAT_ACK       ;
-  delete [] out_RETIRE_STAT_LIST_VAL ;
-  delete []  in_RETIRE_STAT_LIST_ACK ;
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_VAL    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RENAME_ACK    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_INSERT_VAL    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_INSERT_ACK    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_INSERT_VAL,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RAT_RENAME_ACK,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RAT_INSERT_ACK,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_FREE_LIST_VAL ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_FREE_LIST_ACK ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_VAL ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_STAT_LIST_ACK ,_param->_nb_inst_insert);
+  
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RA           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RB           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RC           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
+
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert);
+
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_WRITE_RD                          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RD_LOG                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_WRITE_RE                          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RE_LOG                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ,_param->_nb_inst_insert);
+
+  DELETE1_SC_SIGNAL(out_INSERT_READ_RA                               ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RA_PHY                        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_READ_RB                               ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RB_PHY                        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_READ_RC                               ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RC_PHY                        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_WRITE_RD                              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RD_LOG                        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_WRITE_RE                              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_LOG                        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                    ,_param->_nb_inst_insert);
+  
+  DELETE1_SC_SIGNAL( in_RETIRE_VAL          ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_ACK          ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_RAT_VAL      ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_RAT_ACK      ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_STAT_LIST_VAL,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_STAT_LIST_ACK,_param->_nb_inst_retire);
 
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Parameters.h	(revision 88)
@@ -27,11 +27,19 @@
   public : uint32_t _nb_inst_insert;
   public : uint32_t _nb_inst_retire;
+//public : uint32_t _size_general_register;
+//public : uint32_t _size_special_register;
     
     //-----[ methods ]-----------------------------------------------------------
   public : Parameters  (uint32_t nb_inst_insert,
-			uint32_t nb_inst_retire);
+			uint32_t nb_inst_retire,
+			uint32_t size_general_register,
+			uint32_t size_special_register,
+                        bool     is_toplevel=false
+                        );
 
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h	(revision 88)
@@ -64,15 +64,63 @@
 
     // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t)           **  in_INSERT_RENAME_VAL    ;//[nb_inst_insert]
-  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_RENAME_ACK    ;//[nb_inst_insert]
-  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_INSERT_VAL    ;//[nb_inst_insert]
-  public    : SC_IN (Tcontrol_t)           **  in_INSERT_INSERT_ACK    ;//[nb_inst_insert]
-  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_RAT_INSERT_VAL;//[nb_inst_insert]
-  public    : SC_IN (Tcontrol_t)           **  in_INSERT_RAT_RENAME_ACK;//[nb_inst_insert]
-  public    : SC_IN (Tcontrol_t)           **  in_INSERT_RAT_INSERT_ACK;//[nb_inst_insert]
-  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_FREE_LIST_VAL ;//[nb_inst_insert]
-  public    : SC_IN (Tcontrol_t)           **  in_INSERT_FREE_LIST_ACK ;//[nb_inst_insert]
-  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_STAT_LIST_VAL ;//[nb_inst_insert]
-  public    : SC_IN (Tcontrol_t)           **  in_INSERT_STAT_LIST_ACK ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t)           **  in_INSERT_RENAME_VAL                            ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_RENAME_ACK                            ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_INSERT_VAL                            ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t)           **  in_INSERT_INSERT_ACK                            ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_RAT_INSERT_VAL                        ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t)           **  in_INSERT_RAT_RENAME_ACK                        ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t)           **  in_INSERT_RAT_INSERT_ACK                        ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_FREE_LIST_VAL                         ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t)           **  in_INSERT_FREE_LIST_ACK                         ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t)           ** out_INSERT_STAT_LIST_VAL                         ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t)           **  in_INSERT_STAT_LIST_ACK                         ;//[nb_inst_insert]
+
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_DEPENDENCY_CHECKING_READ_RA           ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_DEPENDENCY_CHECKING_READ_RB           ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_DEPENDENCY_CHECKING_READ_RC           ;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW;//[nb_inst_insert]
+
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_READ_RA                     ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_READ_RB                     ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_READ_RC                     ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_WRITE_RD                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_WRITE_RE                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ;//[nb_inst_insert]
+
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_RAT_WRITE_RD                          ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_RAT_NUM_REG_RD_LOG                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_RAT_WRITE_RE                          ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_RAT_NUM_REG_RE_LOG                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ;//[nb_inst_insert]
+
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_READ_RA                               ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RA_PHY                        ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_READ_RB                               ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RB_PHY                        ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_READ_RC                               ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RC_PHY                        ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_WRITE_RD                              ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RD_LOG                        ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RD_PHY_OLD                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RD_PHY_NEW                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_WRITE_RE                              ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_LOG                        ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_PHY_OLD                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_PHY_NEW                    ;//[nb_inst_insert]
 
     // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -124,4 +172,5 @@
   public  : void        transition                (void);
 # endif
+  public  : void        genMealy_insert_valack    (void);
   public  : void        genMealy_insert           (void);
   public  : void        genMealy_retire           (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp	(revision 88)
@@ -21,12 +21,24 @@
 #define FUNCTION "Register_translation_unit_Glue::Parameters"
   Parameters::Parameters (uint32_t nb_inst_insert,
-			  uint32_t nb_inst_retire)
+			  uint32_t nb_inst_retire,
+			  uint32_t size_general_register,
+			  uint32_t size_special_register,
+                          bool     is_toplevel)
   {
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
 
-    _nb_inst_insert = nb_inst_insert;
-    _nb_inst_retire = nb_inst_retire;
+    _nb_inst_insert        = nb_inst_insert;
+    _nb_inst_retire        = nb_inst_retire;
 
     test();
+
+    if (is_toplevel)
+      {
+        _size_general_register = size_general_register;
+        _size_special_register = size_special_register;
+
+        copy ();
+      }
+
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");
   };
@@ -43,5 +55,13 @@
 #undef  FUNCTION
 #define FUNCTION "Register_translation_unit_Glue::~Parameters"
-  Parameters::~Parameters () 
+  Parameters::~Parameters (void) 
+  {
+    log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
+    log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Register_translation_unit_Glue::copy"
+  void Parameters::copy (void) 
   {
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp	(revision 88)
@@ -28,6 +28,8 @@
 
     xml.balise_open("register_translation_unit_glue");
-    xml.singleton_begin("nb_inst_insert"); xml.attribut("value",toString(_nb_inst_insert)); xml.singleton_end();
-    xml.singleton_begin("nb_inst_retire"); xml.attribut("value",toString(_nb_inst_retire)); xml.singleton_end();
+    xml.singleton_begin("nb_inst_insert       "); xml.attribut("value",toString(_nb_inst_insert       )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_retire       "); xml.attribut("value",toString(_nb_inst_retire       )); xml.singleton_end();
+    xml.singleton_begin("size_general_register"); xml.attribut("value",toString(_size_general_register)); xml.singleton_end();
+    xml.singleton_begin("size_special_register"); xml.attribut("value",toString(_size_special_register)); xml.singleton_end();
     xml.balise_close();
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp	(revision 88)
@@ -39,4 +39,10 @@
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
 
+#if DEBUG_Register_translation_unit_Glue == true
+    log_printf(INFO,Register_translation_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation");
 
@@ -48,5 +54,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation of statistics");
@@ -57,5 +63,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -67,5 +73,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - transition");
@@ -83,5 +89,5 @@
 	SC_METHOD (genMealy_retire);
 	dont_initialize ();
-// 	sensitive << (*(in_CLOCK)).neg();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
 	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
 	  sensitive << (*(in_RETIRE_VAL           [i]))
@@ -104,9 +110,9 @@
 # endif    
 
-	log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert");
-
-	SC_METHOD (genMealy_insert);
-	dont_initialize ();
-// 	sensitive << (*(in_CLOCK)).neg();
+	log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert_valack");
+
+	SC_METHOD (genMealy_insert_valack);
+	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
 	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
 	  sensitive << (*(in_INSERT_RENAME_VAL     [i]))
@@ -152,4 +158,31 @@
 	  }
 # endif    
+
+	log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert");
+
+	SC_METHOD (genMealy_insert);
+	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	  sensitive << (*(in_INSERT_DEPENDENCY_CHECKING_READ_RA            [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY     [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_READ_RB            [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY     [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_READ_RC            [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY     [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_WRITE_RD           [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG     [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_WRITE_RE           [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG     [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD [i]))
+		    << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW [i]));
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+
 	
 #endif
@@ -165,5 +198,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 88)
@@ -72,4 +72,52 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_VAL ,"stat_list_val" ,Tcontrol_t,1);
       ALLOC1_SIGNAL_IN ( in_INSERT_STAT_LIST_ACK ,"stat_list_ack" ,Tcontrol_t,1);
+
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_READ_RA           ,"DEPENDENCY_CHECKING_READ_RA"           ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ,"DEPENDENCY_CHECKING_NUM_REG_RA_PHY"    ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_READ_RB           ,"DEPENDENCY_CHECKING_READ_RB"           ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ,"DEPENDENCY_CHECKING_NUM_REG_RB_PHY"    ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_READ_RC           ,"DEPENDENCY_CHECKING_READ_RC"           ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ,"DEPENDENCY_CHECKING_NUM_REG_RC_PHY"    ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ,"DEPENDENCY_CHECKING_WRITE_RD"          ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ,"DEPENDENCY_CHECKING_NUM_REG_RD_LOG"    ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD,"DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW,"DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ,"DEPENDENCY_CHECKING_WRITE_RE"          ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ,"DEPENDENCY_CHECKING_NUM_REG_RE_LOG"    ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD,"DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,"DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_READ_RA                     ,"STAT_LIST_READ_RA"                     ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,"STAT_LIST_NUM_REG_RA_PHY"              ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_READ_RB                     ,"STAT_LIST_READ_RB"                     ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,"STAT_LIST_NUM_REG_RB_PHY"              ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_READ_RC                     ,"STAT_LIST_READ_RC"                     ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"STAT_LIST_NUM_REG_RC_PHY"              ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RD                    ,"STAT_LIST_WRITE_RD"                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,"STAT_LIST_NUM_REG_RD_PHY_NEW"          ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RE                    ,"STAT_LIST_WRITE_RE"                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,"STAT_LIST_NUM_REG_RE_PHY_NEW"          ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_SIGNAL_OUT(out_INSERT_RAT_WRITE_RD                          ,"RAT_WRITE_RD"                          ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RD_LOG                    ,"RAT_NUM_REG_RD_LOG"                    ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ,"RAT_NUM_REG_RD_PHY_NEW"                ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_RAT_WRITE_RE                          ,"RAT_WRITE_RE"                          ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RE_LOG                    ,"RAT_NUM_REG_RE_LOG"                    ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ,"RAT_NUM_REG_RE_PHY_NEW"                ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_SIGNAL_OUT(out_INSERT_READ_RA                               ,"READ_RA"                               ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_PHY                        ,"NUM_REG_RA_PHY"                        ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_READ_RB                               ,"READ_RB"                               ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_PHY                        ,"NUM_REG_RB_PHY"                        ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_READ_RC                               ,"READ_RC"                               ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_PHY                        ,"NUM_REG_RC_PHY"                        ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RD                              ,"WRITE_RD"                              ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_LOG                        ,"NUM_REG_RD_LOG"                        ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_OLD                    ,"NUM_REG_RD_PHY_OLD"                    ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_NEW                    ,"NUM_REG_RD_PHY_NEW"                    ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RE                              ,"WRITE_RE"                              ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_LOG                        ,"NUM_REG_RE_LOG"                        ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD                    ,"NUM_REG_RE_PHY_OLD"                    ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW                    ,"NUM_REG_RE_PHY_NEW"                    ,Tspecial_address_t,_param->_size_special_register      );
     }
 
@@ -89,5 +137,6 @@
 
 #ifdef POSITION
-    _component->generate_file();
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp	(revision 88)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -24,27 +25,76 @@
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete     in_CLOCK ;
 	delete     in_NRESET;
 
-	delete []  in_INSERT_RENAME_VAL    ;
-	delete [] out_INSERT_RENAME_ACK    ;
-	delete [] out_INSERT_INSERT_VAL    ;
-	delete []  in_INSERT_INSERT_ACK    ;
-	delete [] out_INSERT_RAT_INSERT_VAL;
-	delete []  in_INSERT_RAT_RENAME_ACK;
-	delete []  in_INSERT_RAT_INSERT_ACK;
-	delete [] out_INSERT_FREE_LIST_VAL ;
-	delete []  in_INSERT_FREE_LIST_ACK ;
-	delete [] out_INSERT_STAT_LIST_VAL ;
-	delete []  in_INSERT_STAT_LIST_ACK ;
+	DELETE1_SIGNAL( in_INSERT_RENAME_VAL    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_RENAME_ACK    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_INSERT_VAL    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_INSERT_ACK    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_RAT_INSERT_VAL,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_RAT_RENAME_ACK,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_RAT_INSERT_ACK,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_FREE_LIST_VAL ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_FREE_LIST_ACK ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_VAL ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_STAT_LIST_ACK ,_param->_nb_inst_insert,1);
+	
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RA           ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY    ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RB           ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY    ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RC           ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register      );
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RD          ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RE          ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register      );
+	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register      );
+	
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert,_param->_size_special_register      );
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert,_param->_size_special_register      );
+	
+	DELETE1_SIGNAL(out_INSERT_RAT_WRITE_RD                          ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RD_LOG                    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+	DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RD_PHY_NEW                ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_RAT_WRITE_RE                          ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RE_LOG                    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+	DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RE_PHY_NEW                ,_param->_nb_inst_insert,_param->_size_special_register      );
+	
+	DELETE1_SIGNAL(out_INSERT_READ_RA                               ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_PHY                        ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_READ_RB                               ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_PHY                        ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_READ_RC                               ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_PHY                        ,_param->_nb_inst_insert,_param->_size_special_register      );
+	DELETE1_SIGNAL(out_INSERT_WRITE_RD                              ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_LOG                        ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD                    ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW                    ,_param->_nb_inst_insert,_param->_size_general_register      );
+	DELETE1_SIGNAL(out_INSERT_WRITE_RE                              ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_LOG                        ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD                    ,_param->_nb_inst_insert,_param->_size_special_register      );
+	DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                    ,_param->_nb_inst_insert,_param->_size_special_register      );
+	
+	DELETE1_SIGNAL( in_RETIRE_VAL          ,_param->_nb_inst_retire,1);
+	DELETE1_SIGNAL(out_RETIRE_ACK          ,_param->_nb_inst_retire,1);
+	DELETE1_SIGNAL(out_RETIRE_RAT_VAL      ,_param->_nb_inst_retire,1);
+	DELETE1_SIGNAL( in_RETIRE_RAT_ACK      ,_param->_nb_inst_retire,1);
+	DELETE1_SIGNAL(out_RETIRE_STAT_LIST_VAL,_param->_nb_inst_retire,1);
+	DELETE1_SIGNAL( in_RETIRE_STAT_LIST_ACK,_param->_nb_inst_retire,1);
 
-	delete []  in_RETIRE_VAL           ;
-	delete [] out_RETIRE_ACK           ;
-	delete [] out_RETIRE_RAT_VAL       ;
-	delete []  in_RETIRE_RAT_ACK       ;
-	delete [] out_RETIRE_STAT_LIST_VAL ;
-	delete []  in_RETIRE_STAT_LIST_ACK ;
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp	(revision 88)
@@ -26,5 +26,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -32,5 +33,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp	(revision 88)
@@ -23,43 +23,59 @@
   void Register_translation_unit_Glue::genMealy_insert (void)
   {
-    log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
+    log_begin(Register_translation_unit_Glue,FUNCTION);
+    log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str());
 
     for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
       {
-	Tcontrol_t rename_val     = PORT_READ(in_INSERT_RENAME_VAL     [i]);
-	Tcontrol_t insert_ack     = PORT_READ(in_INSERT_INSERT_ACK     [i]);
-	Tcontrol_t rat_rename_ack = PORT_READ(in_INSERT_RAT_RENAME_ACK [i]);
-	Tcontrol_t rat_insert_ack = PORT_READ(in_INSERT_RAT_INSERT_ACK [i]);
-	Tcontrol_t free_list_ack  = PORT_READ(in_INSERT_FREE_LIST_ACK  [i]);
-	Tcontrol_t stat_list_ack  = PORT_READ(in_INSERT_STAT_LIST_ACK  [i]);
+	Tcontrol_t         READ_RA            = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RA            [i]);
+	Tgeneral_address_t NUM_REG_RA_PHY     = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY     [i]);
+	Tcontrol_t         READ_RB            = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RB            [i]);
+	Tgeneral_address_t NUM_REG_RB_PHY     = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY     [i]);
+	Tcontrol_t         READ_RC            = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RC            [i]);
+	Tspecial_address_t NUM_REG_RC_PHY     = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY     [i]);
+	Tcontrol_t         WRITE_RD           = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_WRITE_RD           [i]);
+	Tgeneral_address_t NUM_REG_RD_LOG     = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG     [i]);
+	Tgeneral_address_t NUM_REG_RD_PHY_OLD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD [i]);
+	Tgeneral_address_t NUM_REG_RD_PHY_NEW = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW [i]);
+	Tcontrol_t         WRITE_RE           = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_WRITE_RE           [i]);
+	Tspecial_address_t NUM_REG_RE_LOG     = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG     [i]);
+	Tspecial_address_t NUM_REG_RE_PHY_OLD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD [i]);
+	Tspecial_address_t NUM_REG_RE_PHY_NEW = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW [i]);
 
-	PORT_WRITE(out_INSERT_RENAME_ACK     [i], (insert_ack     and
-						   rat_rename_ack and
-						   rat_insert_ack and
-						   free_list_ack  and
-						   stat_list_ack  ));
-	PORT_WRITE(out_INSERT_INSERT_VAL     [i], (rename_val     and
-						   rat_rename_ack and
-						   rat_insert_ack and
-						   free_list_ack  and
-						   stat_list_ack  ));
-	PORT_WRITE(out_INSERT_RAT_INSERT_VAL [i], (rename_val     and
-						   insert_ack     and
-						   rat_rename_ack and
-						   free_list_ack  and
-						   stat_list_ack  ));
-	PORT_WRITE(out_INSERT_FREE_LIST_VAL  [i], (rename_val     and
-						   insert_ack     and
-						   rat_rename_ack and
-						   rat_insert_ack and
-						   stat_list_ack  ));
-	PORT_WRITE(out_INSERT_STAT_LIST_VAL  [i], (rename_val     and
-						   insert_ack     and
-						   rat_rename_ack and
-						   rat_insert_ack and
-						   free_list_ack  ));
+	PORT_WRITE(out_INSERT_STAT_LIST_READ_RA            [i], READ_RA           );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY     [i], NUM_REG_RA_PHY    );
+	PORT_WRITE(out_INSERT_STAT_LIST_READ_RB            [i], READ_RB           );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY     [i], NUM_REG_RB_PHY    );
+	PORT_WRITE(out_INSERT_STAT_LIST_READ_RC            [i], READ_RC           );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY     [i], NUM_REG_RC_PHY    );
+	PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RD           [i], WRITE_RD          );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW);
+	PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RE           [i], WRITE_RE          );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW);
+	
+	PORT_WRITE(out_INSERT_RAT_WRITE_RD                 [i], WRITE_RD          );
+	PORT_WRITE(out_INSERT_RAT_NUM_REG_RD_LOG           [i], NUM_REG_RD_LOG    );
+	PORT_WRITE(out_INSERT_RAT_NUM_REG_RD_PHY_NEW       [i], NUM_REG_RD_PHY_NEW);
+	PORT_WRITE(out_INSERT_RAT_WRITE_RE                 [i], WRITE_RE          );
+	PORT_WRITE(out_INSERT_RAT_NUM_REG_RE_LOG           [i], NUM_REG_RE_LOG    );
+	PORT_WRITE(out_INSERT_RAT_NUM_REG_RE_PHY_NEW       [i], NUM_REG_RE_PHY_NEW);
+	
+	PORT_WRITE(out_INSERT_READ_RA                      [i], READ_RA           );
+	PORT_WRITE(out_INSERT_NUM_REG_RA_PHY               [i], NUM_REG_RA_PHY    );
+	PORT_WRITE(out_INSERT_READ_RB                      [i], READ_RB           );
+	PORT_WRITE(out_INSERT_NUM_REG_RB_PHY               [i], NUM_REG_RB_PHY    );
+	PORT_WRITE(out_INSERT_READ_RC                      [i], READ_RC           );
+	PORT_WRITE(out_INSERT_NUM_REG_RC_PHY               [i], NUM_REG_RC_PHY    );
+	PORT_WRITE(out_INSERT_WRITE_RD                     [i], WRITE_RD          );
+	PORT_WRITE(out_INSERT_NUM_REG_RD_LOG               [i], NUM_REG_RD_LOG    );
+	PORT_WRITE(out_INSERT_NUM_REG_RD_PHY_OLD           [i], NUM_REG_RD_PHY_OLD);
+	PORT_WRITE(out_INSERT_NUM_REG_RD_PHY_NEW           [i], NUM_REG_RD_PHY_NEW);
+	PORT_WRITE(out_INSERT_WRITE_RE                     [i], WRITE_RE          );
+	PORT_WRITE(out_INSERT_NUM_REG_RE_LOG               [i], NUM_REG_RE_LOG    );
+	PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_OLD           [i], NUM_REG_RE_PHY_OLD);
+	PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_NEW           [i], NUM_REG_RE_PHY_NEW);
       }
 
-    log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");
+    log_end(Register_translation_unit_Glue,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert_valack.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert_valack.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert_valack.cpp	(revision 88)
@@ -0,0 +1,98 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace register_translation_unit {
+namespace register_translation_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Register_translation_unit_Glue::genMealy_insert_valack"
+  void Register_translation_unit_Glue::genMealy_insert_valack (void)
+  {
+    log_begin(Register_translation_unit_Glue,FUNCTION);
+    log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str());
+    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+      {
+	Tcontrol_t rename_val     = PORT_READ(in_INSERT_RENAME_VAL     [i]);
+	Tcontrol_t insert_ack     = PORT_READ(in_INSERT_INSERT_ACK     [i]);
+	Tcontrol_t rat_rename_ack = PORT_READ(in_INSERT_RAT_RENAME_ACK [i]);
+	Tcontrol_t rat_insert_ack = PORT_READ(in_INSERT_RAT_INSERT_ACK [i]);
+	Tcontrol_t free_list_ack  = PORT_READ(in_INSERT_FREE_LIST_ACK  [i]);
+	Tcontrol_t stat_list_ack  = PORT_READ(in_INSERT_STAT_LIST_ACK  [i]);
+
+	Tcontrol_t rename_ack     = (insert_ack     and
+                                     rat_rename_ack and
+                                     rat_insert_ack and
+                                     free_list_ack  and
+                                     stat_list_ack  );
+	Tcontrol_t insert_val     = (rename_val     and
+                                     rat_rename_ack and
+                                     rat_insert_ack and
+                                     free_list_ack  and
+                                     stat_list_ack  );
+	Tcontrol_t rat_insert_val = (rename_val     and
+                                     insert_ack     and
+                                     rat_rename_ack and
+                                     free_list_ack  and
+                                     stat_list_ack  );
+	Tcontrol_t free_list_val  = (rename_val     and
+                                     insert_ack     and
+                                     rat_rename_ack and
+                                     rat_insert_ack and
+                                     stat_list_ack  );
+	Tcontrol_t stat_list_val  = (rename_val     and
+                                     insert_ack     and
+                                     rat_rename_ack and
+                                     rat_insert_ack and
+                                     free_list_ack  );
+
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"  * inst_insert [%d]",i);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rename_val     (r): %d",rename_val    );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rename_ack     (w): %d",rename_ack    );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * insert_val     (w): %d",insert_val    );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * insert_ack     (r): %d",insert_ack    );
+//      log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_rename_val (w): %d",rat_rename_val);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_rename_val    -> rename_val");
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_rename_ack (r): %d",rat_rename_ack);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_insert_val (w): %d",rat_insert_val);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_insert_ack (r): %d",rat_insert_ack);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * free_list_val  (w): %d",free_list_val );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * free_list_ack  (r): %d",free_list_ack );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * stat_list_val  (w): %d",stat_list_val );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * stat_list_ack  (r): %d",stat_list_ack );
+
+
+	PORT_WRITE(out_INSERT_RENAME_ACK     [i], rename_ack    );
+	PORT_WRITE(out_INSERT_INSERT_VAL     [i], insert_val    );
+	PORT_WRITE(out_INSERT_RAT_INSERT_VAL [i], rat_insert_val);
+	PORT_WRITE(out_INSERT_FREE_LIST_VAL  [i], free_list_val );
+	PORT_WRITE(out_INSERT_STAT_LIST_VAL  [i], stat_list_val );
+
+      }
+
+    log_end(Register_translation_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace register_translation_unit_glue
+}; // end namespace register_translation_unit
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Register_translation_unit_Glue::genMealy_retire (void)
   {
-    log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
+    log_begin(Register_translation_unit_Glue,FUNCTION);
+    log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str());
 
     for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
@@ -36,5 +37,5 @@
       }
 
-    log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");
+    log_end(Register_translation_unit_Glue,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Register_translation_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-min.cfg	(revision 88)
@@ -0,0 +1,10 @@
+Register_translation_unit
+1	1	*2	#nb_front_end       
+1	1	*2	#nb_context          [nb_front_end]
+64	64	*2	#nb_general_register
+4	4	*2	#nb_special_register
+1	1	*4	#nb_inst_insert     
+1	1	*4	#nb_inst_retire     
+1	1	*4	#nb_reg_free        
+1	1	*2	#nb_bank            
+1	1	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1.cfg	(revision 88)
@@ -0,0 +1,10 @@
+Register_translation_unit
+1	1	*2	#nb_front_end       
+1	1	*2	#nb_context          [nb_front_end]
+64	64	*2	#nb_general_register
+16	16	*2	#nb_special_register
+1	4	*4	#nb_inst_insert     
+1	4	*4	#nb_inst_retire     
+1	4	*4	#nb_reg_free        
+8	8	*2	#nb_bank            
+1	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1a.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1a.cfg	(revision 88)
@@ -0,0 +1,10 @@
+Register_translation_unit
+1	1	*2	#nb_front_end       
+1	1	*2	#nb_context          [nb_front_end]
+64	64	*2	#nb_general_register
+16	16	*2	#nb_special_register
+1	4	*4	#nb_inst_insert     
+1	4	*4	#nb_inst_retire     
+1	4	*4	#nb_reg_free        
+8	8	*2	#nb_bank            
+1	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4a.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4a.cfg	(revision 88)
@@ -0,0 +1,13 @@
+Register_translation_unit
+4	4	*2	#nb_front_end       
+1	1	*2	#nb_context          [0] [nb_front_end]
+1	1	*2	#nb_context          [1] [nb_front_end]
+1	1	*2	#nb_context          [2] [nb_front_end]
+1	1	*2	#nb_context          [3] [nb_front_end]
+256	256	*2	#nb_general_register
+32	32	*2	#nb_special_register
+4	4	*4	#nb_inst_insert     
+4	4	*4	#nb_inst_retire     
+4	4	*4	#nb_reg_free        
+8	8	*2	#nb_bank            
+2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4b.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4b.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4b.cfg	(revision 88)
@@ -0,0 +1,10 @@
+Register_translation_unit
+1	1	*2	#nb_front_end       
+4	4	*2	#nb_context          [0] [nb_front_end]
+256	256	*2	#nb_general_register
+32	32	*2	#nb_special_register
+4	4	*4	#nb_inst_insert     
+4	4	*4	#nb_inst_retire     
+4	4	*4	#nb_reg_free        
+8	8	*2	#nb_bank            
+2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4c.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4c.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4c.cfg	(revision 88)
@@ -0,0 +1,11 @@
+Register_translation_unit
+2	2	*2	#nb_front_end       
+2	2	*2	#nb_context          [0] [nb_front_end]
+2	2	*2	#nb_context          [1] [nb_front_end]
+256	256	*2	#nb_general_register
+32	32	*2	#nb_special_register
+4	4	*4	#nb_inst_insert     
+4	4	*4	#nb_inst_retire     
+4	4	*4	#nb_reg_free        
+8	8	*2	#nb_bank            
+2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4d.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4d.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4d.cfg	(revision 88)
@@ -0,0 +1,11 @@
+Register_translation_unit
+2	2	*2	#nb_front_end       
+1	1	*2	#nb_context          [0] [nb_front_end]
+3	3	*2	#nb_context          [1] [nb_front_end]
+256	256	*2	#nb_general_register
+32	32	*2	#nb_special_register
+4	4	*4	#nb_inst_insert     
+4	4	*4	#nb_inst_retire     
+4	4	*4	#nb_reg_free        
+8	8	*2	#nb_bank            
+2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/configuration.cfg	(revision 82)
+++ 	(revision )
@@ -1,10 +1,0 @@
-Register_translation_unit
-1	1	*2	#nb_front_end       
-1	1	*2	#nb_context          [nb_front_end]
-64	64	*2	#nb_general_register
-16	16	*2	#nb_special_register
-1	4	*4	#nb_inst_insert     
-1	4	*4	#nb_inst_retire     
-1	4	*4	#nb_reg_free        
-8	8	*2	#nb_bank            
-1	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp	(revision 88)
@@ -65,5 +65,7 @@
 	 _nb_reg_free           ,
 	 _nb_bank               ,
-	 _size_read_counter     );
+	 _size_read_counter     ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/test.cpp	(revision 88)
@@ -23,4 +23,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Register_translation_unit * _Register_translation_unit = new Register_translation_unit 
     (name.c_str(),
@@ -29,5 +39,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Stat_List_unit_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp	(revision 88)
@@ -68,5 +68,7 @@
 	 _nb_reg_free           ,
 	 _nb_bank               ,
-	 _size_counter          );
+	 _size_counter          ,
+         true //is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 88)
@@ -34,4 +34,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Stat_List_unit * _Stat_List_unit = new Stat_List_unit 
     (name.c_str(),
@@ -40,5 +50,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -72,7 +82,9 @@
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ," in_RETIRE_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD          ," in_RETIRE_WRITE_RD          ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE          ," in_RETIRE_WRITE_RE          ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RE_PHY_OLD," in_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire);
@@ -116,7 +128,9 @@
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD          ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RE          ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire);
@@ -347,7 +361,9 @@
 	      in_RETIRE_NUM_REG_RC_PHY     [i]->write(rc);
 	      in_RETIRE_WRITE_RD           [i]->write(write_rd);
+	      in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0);
 	      in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rd_old);
 	      in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rd_new);
 	      in_RETIRE_WRITE_RE           [i]->write(write_re);
+	      in_RETIRE_RESTORE_RE_PHY_OLD [i]->write(0);
 	      in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(re_old);
 	      in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(re_new);
@@ -486,16 +502,18 @@
 	    if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read())
 	      {
-		Tcontrol_t         read_ra  = in_RETIRE_READ_RA            [i]->read();
-		Tgeneral_address_t ra       = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
-		Tcontrol_t         read_rb  = in_RETIRE_READ_RB            [i]->read();
-		Tgeneral_address_t rb       = in_RETIRE_NUM_REG_RB_PHY     [i]->read();
-		Tcontrol_t         read_rc  = in_RETIRE_READ_RC            [i]->read();
-		Tspecial_address_t rc       = in_RETIRE_NUM_REG_RC_PHY     [i]->read();
-		Tcontrol_t         write_rd = in_RETIRE_WRITE_RD           [i]->read();
-		Tgeneral_address_t rd_old   = in_RETIRE_NUM_REG_RD_PHY_OLD [i]->read();
-		Tgeneral_address_t rd_new   = in_RETIRE_NUM_REG_RD_PHY_NEW [i]->read();
-		Tcontrol_t         write_re = in_RETIRE_WRITE_RE           [i]->read();
-		Tgeneral_address_t re_old   = in_RETIRE_NUM_REG_RE_PHY_OLD [i]->read();
-		Tgeneral_address_t re_new   = in_RETIRE_NUM_REG_RE_PHY_NEW [i]->read();		
+		Tcontrol_t         read_ra        = in_RETIRE_READ_RA            [i]->read();
+		Tgeneral_address_t ra             = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
+		Tcontrol_t         read_rb        = in_RETIRE_READ_RB            [i]->read();
+		Tgeneral_address_t rb             = in_RETIRE_NUM_REG_RB_PHY     [i]->read();
+		Tcontrol_t         read_rc        = in_RETIRE_READ_RC            [i]->read();
+		Tspecial_address_t rc             = in_RETIRE_NUM_REG_RC_PHY     [i]->read();
+		Tcontrol_t         write_rd       = in_RETIRE_WRITE_RD           [i]->read();
+		Tcontrol_t         restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read();
+		Tgeneral_address_t rd_old         = in_RETIRE_NUM_REG_RD_PHY_OLD [i]->read();
+		Tgeneral_address_t rd_new         = in_RETIRE_NUM_REG_RD_PHY_NEW [i]->read();
+		Tcontrol_t         write_re       = in_RETIRE_WRITE_RE           [i]->read();
+		Tcontrol_t         restore_re_old = in_RETIRE_RESTORE_RE_PHY_OLD [i]->read();
+		Tgeneral_address_t re_old         = in_RETIRE_NUM_REG_RE_PHY_OLD [i]->read();
+		Tgeneral_address_t re_new         = in_RETIRE_NUM_REG_RE_PHY_NEW [i]->read();		
 
 		LABEL("RETIRE [%d] - Accepted",i);
@@ -519,4 +537,5 @@
 		LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
 		LABEL(" * read_rd          : %d",write_rd);
+		LABEL(" * restore_rd_old   : %d",restore_rd_old);
 		LABEL(" * reg_rd_old       : %d",rd_old  );
 		LABEL("   * status[%d]._is_free  : %d",rd_old,spr_status[rd_old]._is_free );
@@ -530,4 +549,5 @@
 		LABEL("   * status[%d]._counter  : %d",rd_new,spr_status[rd_new]._counter );
 		LABEL(" * read_re          : %d",write_re);
+		LABEL(" * restore_re_old   : %d",restore_re_old);
 		LABEL(" * reg_re_old       : %d",re_old  );
 		LABEL("   * status[%d]._is_free  : %d",re_old,spr_status[re_old]._is_free );
@@ -555,12 +575,30 @@
 		if (write_rd)
 		  {
-		    gpr_status[rd_old]._is_link  = 0;
-		    gpr_status[rd_new]._is_valid = 1;
+                    if (restore_rd_old)
+                      {
+                        gpr_status[rd_old]._is_link  = 1;
+                        gpr_status[rd_new]._is_link  = 0;
+                        gpr_status[rd_new]._is_valid = 1;
+                      }
+                    else
+                      {
+                        gpr_status[rd_old]._is_link  = 0;
+                        gpr_status[rd_new]._is_valid = 1;
+                      }
 		  }
 		if (write_re)
 		  {
-		    spr_status[re_old]._is_link  = 0;
-		    spr_status[re_new]._is_valid = 1;
-		  }
+                    if (restore_re_old)
+                      {
+                        spr_status[re_old]._is_link  = 1;
+                        spr_status[re_new]._is_link  = 0;
+                        spr_status[re_new]._is_valid = 1;
+                      }
+                    else
+                      {
+                        spr_status[re_old]._is_link  = 0;
+                        spr_status[re_new]._is_valid = 1;
+                      }
+                  }
 	      }
 
@@ -647,7 +685,9 @@
   delete []  in_RETIRE_NUM_REG_RC_PHY    ;
   delete []  in_RETIRE_WRITE_RD          ;
+  delete []  in_RETIRE_RESTORE_RD_PHY_OLD;
   delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
   delete []  in_RETIRE_NUM_REG_RD_PHY_NEW;
   delete []  in_RETIRE_WRITE_RE          ;
+  delete []  in_RETIRE_RESTORE_RE_PHY_OLD;
   delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
   delete []  in_RETIRE_NUM_REG_RE_PHY_NEW;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h	(revision 88)
@@ -36,6 +36,6 @@
   public : uint32_t   _size_counter          ;
 
-  public : uint32_t   _size_general_register ;
-  public : uint32_t   _size_special_register ;
+//public : uint32_t   _size_general_register ;
+//public : uint32_t   _size_special_register ;
 		      
   public : uint32_t   _max_reader            ;
@@ -63,8 +63,12 @@
 			uint32_t   nb_reg_free           ,
 			uint32_t   nb_bank               ,
-			uint32_t   size_counter          );
+			uint32_t   size_counter          ,
+                        bool       is_toplevel=false
+                        );
 
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 88)
@@ -1,3 +1,3 @@
-#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Stat_List_unit_h
+ #ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Stat_List_unit_h
 #define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_register_translation_unit_stat_list_unit_Stat_List_unit_h
 
@@ -86,7 +86,9 @@
   public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RC_PHY    ;//[nb_inst_retire]
   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_WRITE_RD          ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire]
   public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RD_PHY_OLD;//[nb_inst_retire]
   public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RD_PHY_NEW;//[nb_inst_retire]
   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_WRITE_RE          ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire]
   public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire]
   public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RE_PHY_NEW;//[nb_inst_retire]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 88)
@@ -23,8 +23,8 @@
   class stat_list_entry_t
   {
-  private : bool     _is_free ; // set = is present in free list
-  private : bool     _is_link ; // set = is present in rat
-  private : bool     _is_valid; // set = an instruction have write in this register
-  private : uint32_t _counter ; // number of register that must read this register
+  public : bool     _is_free ; // set = is present in free list
+  public : bool     _is_link ; // set = is present in rat
+  public : bool     _is_valid; // set = an instruction have write in this register
+  public : uint32_t _counter ; // number of register that must read this register
 
   public :  stat_list_entry_t (void) {};
@@ -55,11 +55,21 @@
     }
 
-  public : void retire_write_old (void)
+  public : void retire_write_old (bool restore_old)
     {
-      _is_link  = 0;
+      if (not restore_old)
+        {
+          _is_link  = 0;
+        }
+      // else nothing
     }
 
-  public : void retire_write_new (void)
+  public : void retire_write_new (bool restore_old)
     {
+      if (restore_old)
+        {
+          _is_link  = 0;
+        }
+
+      // in all case
       _is_valid = 1;
     }
@@ -79,17 +89,17 @@
       return ((_is_free  == 0) and
 	      (_is_link  == 0) and
-	      (_is_valid == 1) and
+// 	      (_is_valid == 1) and // if is_link <- 0, then retire_write_old or reset
 	      (_counter  == 0));
     }
 
-  public : friend std::ostream& operator<< (std::ostream& output_stream,
+  public : friend std::ostream& operator<< (std::ostream& output,
 					    stat_list_entry_t & x)
     {
-      output_stream << x._is_free  << " "
-		    << x._is_link  << " "
-		    << x._is_valid << " "
-		    << x._counter;
+      output << x._is_free  << " "
+             << x._is_link  << " "
+             << x._is_valid << " "
+             << x._counter;
       
-      return output_stream;
+      return output;
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp	(revision 88)
@@ -29,5 +29,6 @@
 			  uint32_t   nb_reg_free           ,
 			  uint32_t   nb_bank               ,
-			  uint32_t   size_counter          )
+			  uint32_t   size_counter          ,
+                          bool       is_toplevel)
   {
     log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
@@ -43,7 +44,4 @@
     _size_counter           = size_counter       ;
 
-    _size_general_register  = log2(nb_general_register);
-    _size_special_register  = log2(nb_special_register);
-    
     _max_reader             = 1<<size_counter;
 
@@ -68,4 +66,13 @@
 
     test();
+    
+    if (is_toplevel)
+      {
+        _size_general_register  = log2(nb_general_register);
+        _size_special_register  = log2(nb_special_register);
+        
+        copy ();
+      }
+
     log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
   };
@@ -82,9 +89,18 @@
 #undef  FUNCTION
 #define FUNCTION "Stat_List_unit::~Parameters"
-  Parameters::~Parameters () 
+  Parameters::~Parameters (void) 
   {
     log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
     log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
   };
+
+#undef  FUNCTION
+#define FUNCTION "Stat_List_unit::copy"
+  void Parameters::copy (void) 
+  {
+    log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
+    log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
+  };
+
 
 }; // end namespace stat_list_unit
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp	(revision 88)
@@ -16,5 +16,4 @@
 namespace register_translation_unit {
 namespace stat_list_unit {
-
 
 #undef  FUNCTION
@@ -39,4 +38,10 @@
     log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
 
+#if DEBUG_Stat_List_unit == true
+    log_printf(INFO,Stat_List_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Stat_List_unit,FUNCTION,"Allocation");
 
@@ -48,5 +53,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Stat_List_unit,FUNCTION,"Allocation of statistics");
@@ -57,5 +62,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -67,5 +72,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	// Constant
@@ -90,5 +95,5 @@
 	SC_METHOD (genMoore);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
 	
 # ifdef SYSTEMCASS_SPECIFIC
@@ -100,5 +105,5 @@
 	SC_METHOD (genMealy);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
 	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
 	  sensitive << (*(in_INSERT_READ_RA        [i]))
@@ -135,5 +140,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Stat_List_unit,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 88)
@@ -87,7 +87,9 @@
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY    ,"num_reg_rc_phy"    ,Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD          ,"write_rd"          ,Tcontrol_t        ,1                             );
+       ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE_RD_PHY_OLD,"restore_rd_phy_old",Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register);
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register);
        ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RE          ,"write_re"          ,Tcontrol_t        ,1                             );
+       ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE_RE_PHY_OLD,"restore_re_phy_old",Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register);
@@ -112,5 +114,7 @@
      }
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
      gpr_stat_list = new stat_list_entry_t * [_param->_nb_bank];
      spr_stat_list = new stat_list_entry_t * [_param->_nb_bank];
@@ -128,7 +132,11 @@
      internal_PUSH_SPR_VAL      = new Tcontrol_t [_param->_nb_reg_free];
      internal_PUSH_SPR_NUM_BANK = new uint32_t   [_param->_nb_reg_free];
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
 #ifdef POSITION
-    _component->generate_file();
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 88)
@@ -24,5 +24,5 @@
     log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete     in_CLOCK ;
@@ -51,7 +51,9 @@
 	delete []  in_RETIRE_NUM_REG_RC_PHY    ;
 	delete []  in_RETIRE_WRITE_RD          ;
+	delete []  in_RETIRE_RESTORE_RD_PHY_OLD;
 	delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
 	delete []  in_RETIRE_NUM_REG_RD_PHY_NEW;
 	delete []  in_RETIRE_WRITE_RE          ;
+	delete []  in_RETIRE_RESTORE_RE_PHY_OLD;
 	delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
 	delete []  in_RETIRE_NUM_REG_RE_PHY_NEW;
@@ -64,15 +66,20 @@
 	delete []  in_PUSH_SPR_ACK             ;
 	delete [] out_PUSH_SPR_NUM_REG         ;
+    
+        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    
+        delete [] gpr_stat_list;
+        delete [] spr_stat_list;
+        
+        delete [] internal_INSERT_ACK       ;
+        delete [] internal_RETIRE_ACK       ;
+        delete [] internal_PUSH_GPR_VAL     ;
+        delete [] internal_PUSH_GPR_NUM_BANK;
+        delete [] internal_PUSH_SPR_VAL     ;
+        delete [] internal_PUSH_SPR_NUM_BANK;
       }
+
+
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    delete [] gpr_stat_list;
-    delete [] spr_stat_list;
-
-    delete [] internal_INSERT_ACK       ;
-    delete [] internal_RETIRE_ACK       ;
-    delete [] internal_PUSH_GPR_VAL     ;
-    delete [] internal_PUSH_GPR_NUM_BANK;
-    delete [] internal_PUSH_SPR_VAL     ;
-    delete [] internal_PUSH_SPR_NUM_BANK;
 
     delete _component;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_end_cycle.cpp	(revision 88)
@@ -26,5 +26,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -32,5 +33,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Stat_List_unit::genMealy (void)
   {
-    log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
+    log_begin(Stat_List_unit,FUNCTION);
+    log_function(Stat_List_unit,FUNCTION,_name.c_str());
 
     for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
@@ -57,5 +58,5 @@
       }
     
-    log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
+    log_end(Stat_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Stat_List_unit::genMoore (void)
   {
-    log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
+    log_begin(Stat_List_unit,FUNCTION);
+    log_function(Stat_List_unit,FUNCTION,_name.c_str());
 
     uint32_t gpr_ptr = internal_GPR_PTR_FREE;
@@ -69,5 +70,5 @@
       }
     
-    log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
+    log_end(Stat_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 88)
@@ -23,5 +23,6 @@
   void Stat_List_unit::transition (void)
   {
-    log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
+    log_begin(Stat_List_unit,FUNCTION);
+    log_function(Stat_List_unit,FUNCTION,_name.c_str());
 
     if (PORT_READ(in_NRESET) == 0)
@@ -121,9 +122,10 @@
 	      if (PORT_READ(in_RETIRE_WRITE_RD [i]))
 		{
+                  Tcontrol_t restore_old = PORT_READ(in_RETIRE_RESTORE_RD_PHY_OLD [i]);
 		  {
 		    Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]);
 		    uint32_t bank = num_reg >> _param->_shift_gpr;
 		    uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		    gpr_stat_list [bank][reg].retire_write_old();
+		    gpr_stat_list [bank][reg].retire_write_old(restore_old);
 		  }
 		  {
@@ -131,5 +133,5 @@
 		    uint32_t bank = num_reg >> _param->_shift_gpr;
 		    uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		    gpr_stat_list [bank][reg].retire_write_new();
+		    gpr_stat_list [bank][reg].retire_write_new(restore_old);
 		  }
 		}
@@ -137,9 +139,10 @@
 	      if (PORT_READ(in_RETIRE_WRITE_RE [i]))
 		{
+                  Tcontrol_t restore_old = PORT_READ(in_RETIRE_RESTORE_RE_PHY_OLD [i]);
 		  {
 		    Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]);
 		    uint32_t bank = num_reg >> _param->_shift_spr;
 		    uint32_t reg  = num_reg  & _param->_mask_spr ;
-		    spr_stat_list [bank][reg].retire_write_old();
+		    spr_stat_list [bank][reg].retire_write_old(restore_old);
 		  }
 		  {
@@ -147,5 +150,5 @@
 		    uint32_t bank = num_reg >> _param->_shift_spr;
 		    uint32_t reg  = num_reg  & _param->_mask_spr ;
-		    spr_stat_list [bank][reg].retire_write_new();
+		    spr_stat_list [bank][reg].retire_write_new(restore_old);
 		  }
 		}
@@ -171,28 +174,29 @@
 	internal_SPR_PTR_FREE = ((internal_SPR_PTR_FREE==0)?_param->_nb_special_register_by_bank:internal_SPR_PTR_FREE)-1;
       }
-    
-//     log_printf(TRACE,Stat_List_unit,FUNCTION,"Print gpr_stat_list :");
-//     for (uint32_t i=0; i<_param->_nb_bank; i++)
-//       {
-// 	log_printf(TRACE,Stat_List_unit,FUNCTION," * Bank : %d",i);
-// 	for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++)
-// 	  {
-// 	    std::ostringstream str;
-// 	    str << gpr_stat_list [i][j];
-// 	    log_printf(TRACE,Stat_List_unit,FUNCTION,"   [%d] %s",j,str.str().c_str());
-
-// 	  }
-//       }
-//     log_printf(TRACE,Stat_List_unit,FUNCTION,"Print spr_stat_list :");
-//     for (uint32_t i=0; i<_param->_nb_bank; i++)
-//       {
-// 	log_printf(TRACE,Stat_List_unit,FUNCTION," * Bank : %d",i);
-// 	for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++)
-// 	  {
-// 	    std::ostringstream str;
-// 	    str << spr_stat_list [i][j];
-// 	    log_printf(TRACE,Stat_List_unit,FUNCTION,"   [%d] %s",j,str.str().c_str());
-// 	  }
-//       }
+
+
+#if (DEBUG >= DEBUG_TRACE)
+    log_printf(TRACE,Stat_List_unit,FUNCTION,"  * Dump Stat List");
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++)
+        log_printf(TRACE,Stat_List_unit,FUNCTION,"    * GPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d, valid %.1d, counter %.4d",
+                   i,
+                   j,
+                   (i<<_param->_shift_gpr)|j,
+                   gpr_stat_list[i][j]._is_free,
+                   gpr_stat_list[i][j]._is_link,
+                   gpr_stat_list[i][j]._is_valid,
+                   gpr_stat_list[i][j]._counter);
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++)
+        log_printf(TRACE,Stat_List_unit,FUNCTION,"    * SPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d, valid %.1d, counter %.4d",
+                   i,
+                   j,
+                   (i<<_param->_shift_spr)|j,
+                   spr_stat_list[i][j]._is_free,
+                   spr_stat_list[i][j]._is_link,
+                   spr_stat_list[i][j]._is_valid,
+                   spr_stat_list[i][j]._counter);
+#endif
 
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
@@ -200,5 +204,5 @@
 #endif
 
-    log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
+    log_end(Stat_List_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h	(revision 88)
@@ -40,11 +40,11 @@
   public : uint32_t   _size_read_counter     ;
 
-  public : uint32_t   _size_front_end_id     ;
-  public : uint32_t   _size_context_id       ;
-  public : uint32_t   _size_general_register ;
-  public : uint32_t   _size_special_register ;
+//public : uint32_t   _size_front_end_id     ;
+//public : uint32_t   _size_context_id       ;
+//public : uint32_t   _size_general_register ;
+//public : uint32_t   _size_special_register ;
 		      
-  public : uint32_t   _have_port_context_id  ;
-  public : uint32_t   _have_port_front_end_id;
+//public : uint32_t   _have_port_context_id  ;
+//public : uint32_t   _have_port_front_end_id;
 
   public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::         Parameters * _param_dependency_checking_unit;
@@ -62,7 +62,10 @@
 			uint32_t   nb_reg_free           ,
 			uint32_t   nb_bank               ,
-			uint32_t   size_read_counter     );
+			uint32_t   size_read_counter     ,
+                        bool       is_toplevel=false);
 //   public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp	(revision 88)
@@ -28,5 +28,6 @@
 			  uint32_t   nb_reg_free           ,
 			  uint32_t   nb_bank               ,
-			  uint32_t   size_read_counter     )
+			  uint32_t   size_read_counter     ,
+                          bool       is_toplevel)
   {
     log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin");
@@ -42,15 +43,8 @@
     _size_read_counter   = size_read_counter  ;
 
-    uint32_t max_nb_context = max<uint32_t>(nb_context, nb_front_end);
+    uint32_t size_general_register = log2(nb_general_register);
+    uint32_t size_special_register = log2(nb_special_register);
+    uint32_t max_nb_context        = max<uint32_t>(nb_context, nb_front_end);
     
-    _size_front_end_id      = log2(nb_front_end       );
-    _size_context_id        = log2(max_nb_context     );
-    _size_general_register  = log2(nb_general_register);
-    _size_special_register  = log2(nb_special_register);
-    
-    _have_port_front_end_id = _size_front_end_id>0;
-    _have_port_context_id   = _size_context_id  >0;
-
-
     uint32_t nb_thread = 0;
     for (uint32_t i=0; i<nb_front_end; i++)
@@ -94,7 +88,24 @@
     _param_register_translation_unit_glue    = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters
       (_nb_inst_insert,
-       _nb_inst_retire);
+       _nb_inst_retire,
+        size_general_register,
+        size_special_register);
       
     test();
+
+    if (is_toplevel)
+      {
+        _size_front_end_id      = log2(nb_front_end       );
+        _size_context_id        = log2(max_nb_context     );
+
+        _size_general_register  = size_general_register;
+        _size_special_register  = size_special_register;
+        
+        _have_port_front_end_id = _size_front_end_id>0;
+        _have_port_context_id   = _size_context_id  >0;
+
+        copy();
+      }
+
     log_printf(FUNC,Register_translation_unit,FUNCTION,"End");
   };
@@ -124,4 +135,19 @@
   };
 
+#undef  FUNCTION
+#define FUNCTION "Register_translation_unit::copy"
+  void Parameters::copy (void) 
+  {
+    log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin");
+
+    COPY(_param_dependency_checking_unit);
+    COPY(_param_free_list_unit);
+    COPY(_param_register_address_translation_unit);
+    COPY(_param_stat_list_unit);    
+    COPY(_param_register_translation_unit_glue);
+
+    log_printf(FUNC,Register_translation_unit,FUNCTION,"End");
+  };
+
 }; // end namespace register_translation_unit
 }; // end namespace rename_unit
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp	(revision 88)
@@ -38,4 +38,10 @@
     log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin");
 
+#if DEBUG_Register_translation_unit == true
+    log_printf(INFO,Register_translation_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Register_translation_unit,FUNCTION,"Allocation");
 
@@ -47,5 +53,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Register_translation_unit,FUNCTION,"Allocation of statistics");
@@ -56,5 +62,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -66,5 +72,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	log_printf(INFO,Register_translation_unit,FUNCTION,"Method - transition");
@@ -90,5 +96,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Register_translation_unit,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 88)
@@ -130,6 +130,6 @@
      {
        name = _name+"_dependency_checking_unit";
-       std::cout << "Create   : " << name << std::endl;
-       
+       log_printf(INFO,Core,FUNCTION,_("Create   : %s"),name.c_str());
+
        _component_dependency_checking_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Dependency_checking_unit
 	 (name.c_str()
@@ -149,5 +149,5 @@
      {
        name = _name+"_free_list_unit";
-       std::cout << "Create   : " << name << std::endl;
+       log_printf(INFO,Core,FUNCTION,_("Create   : %s"),name.c_str());
        
        _component_free_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::free_list_unit::Free_List_unit
@@ -168,5 +168,5 @@
      {
        name = _name+"_register_address_translation_unit";
-       std::cout << "Create   : " << name << std::endl;
+       log_printf(INFO,Core,FUNCTION,_("Create   : %s"),name.c_str());
        
        _component_register_address_translation_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit
@@ -187,5 +187,5 @@
      {
        name = _name+"_stat_list_unit";
-       std::cout << "Create   : " << name << std::endl;
+       log_printf(INFO,Core,FUNCTION,_("Create   : %s"),name.c_str());
        
        _component_stat_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Stat_List_unit
@@ -206,5 +206,5 @@
      {
        name = _name+"_register_translation_unit_glue";
-       std::cout << "Create   : " << name << std::endl;
+       log_printf(INFO,Core,FUNCTION,_("Create   : %s"),name.c_str());
        
        _component_register_translation_unit_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Register_translation_unit_Glue
@@ -225,5 +225,214 @@
     // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     std::string src,dest;
+
+    // ===================================================================
+    // =====[ register_address_translation_unit ]=========================
+    // ===================================================================
+    {
+      src = _name+"_register_address_translation_unit";
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name;
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_"+toString(i)
+				     dest,"rename_"+toString(i));
+#endif
+	  
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_VAL"               ,
+		              dest, "in_RENAME_"+toString(i)+"_VAL"               );
+	  if (_param->_have_port_front_end_id)
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_FRONT_END_ID"      ,
+		              dest, "in_RENAME_"+toString(i)+"_FRONT_END_ID"      );
+	  if (_param->_have_port_context_id)
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_CONTEXT_ID"        ,
+		              dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID"        );
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG"    ,
+		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG"    );
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG"    ,
+		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG"    );
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG"    ,
+		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG"    );
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG"    ,
+		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG"    );
+	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG"    ,
+		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG"    );
+
+	  dest = _name+"_register_translation_unit_glue";
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_ACK",
+		                   dest, "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK");
+	  
+	  dest = _name+"_dependency_checking_unit";
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY"    ,
+		                   dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY"    ,
+		                   dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY"    ,
+		                   dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		                   dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		                   dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
+	}
+
+      // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name+"_register_translation_unit_glue";
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_"+toString(i)
+				     dest,"rename_in_"+toString(i));
+#endif
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_VAL",
+		                   dest,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL");
+	  COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK",
+		                   dest, "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK");
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD"      ,
+			           dest,"out_INSERT_"+toString(i)+"_RAT_WRITE_RD"      );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE"      ,
+		                   dest,"out_INSERT_"+toString(i)+"_RAT_WRITE_RE"      );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_LOG",
+		                   dest,"out_INSERT_"+toString(i)+"_RAT_NUM_REG_RD_LOG");
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_LOG",
+		                   dest,"out_INSERT_"+toString(i)+"_RAT_NUM_REG_RE_LOG");
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY",
+		                   dest,"out_INSERT_"+toString(i)+"_RAT_NUM_REG_RD_PHY_NEW");
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY",
+		                   dest,"out_INSERT_"+toString(i)+"_RAT_NUM_REG_RE_PHY_NEW");
+	}
+
+      // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	{
+	  dest = _name;
+#ifdef POSITION
+	  _component->interface_map (src ,"retire_"+toString(i)
+				     dest,"retire_"+toString(i));
+#endif
+
+	  if (_param->_have_port_front_end_id)
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_FRONT_END_ID"      ,
+		              dest, "in_RETIRE_"+toString(i)+"_FRONT_END_ID"      );
+	  if (_param->_have_port_context_id)
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_CONTEXT_ID"        ,
+		              dest, "in_RETIRE_"+toString(i)+"_CONTEXT_ID"        );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_EVENT_STATE"       ,
+		              dest, "in_RETIRE_"+toString(i)+"_EVENT_STATE"       );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD"          ,
+		              dest, "in_RETIRE_"+toString(i)+"_WRITE_RD"          );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE"          ,
+		              dest, "in_RETIRE_"+toString(i)+"_WRITE_RE"          );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
+
+	  dest = _name+"_register_translation_unit_glue";
+	  COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL"          ,
+			           dest,"out_RETIRE_"+toString(i)+"_RAT_VAL"      );
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK"          ,
+		                   dest, "in_RETIRE_"+toString(i)+"_RAT_ACK"      );
+
+	  dest = _name+"_stat_list_unit";
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD",
+		                   dest, "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD");
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD",
+		                   dest, "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD");
+	}
+    }
     
+    // ===================================================================
+    // =====[ free_list_unit ]============================================
+    // ===================================================================
+    {
+      src = _name+"_free_list_unit";
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name;
+#ifdef POSITION
+	  _component->interface_map (src ,"pop_"+toString(i)
+				     dest,"rename_"+toString(i));
+#endif
+	  
+	  PORT_MAP(_component,src , "in_POP_"+toString(i)+"_GPR_VAL"    ,
+		              dest,"in_RENAME_"+toString(i)+"_WRITE_RD");
+	  PORT_MAP(_component,src , "in_POP_"+toString(i)+"_SPR_VAL"    ,
+		              dest,"in_RENAME_"+toString(i)+"_WRITE_RE");
+
+	  dest = _name+"_register_translation_unit_glue";
+	  COMPONENT_MAP(_component,src , "in_POP_"+toString(i)+"_VAL" ,
+			           dest,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" );
+	  COMPONENT_MAP(_component,src ,"out_POP_"+toString(i)+"_ACK" ,
+		                   dest, "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" );
+
+	  dest = _name+"_dependency_checking_unit";
+
+	  COMPONENT_MAP(_component,src ,"out_POP_"+toString(i)+"_GPR_NUM_REG",
+			           dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
+	  COMPONENT_MAP(_component,src ,"out_POP_"+toString(i)+"_SPR_NUM_REG",
+			           dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
+	}
+
+      // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_reg_free; i++)
+	{
+	  dest = _name+"_stat_list_unit";
+#ifdef POSITION
+	  _component->interface_map (src ,"push_gpr_"+toString(i)
+				     dest,"push_gpr_"+toString(i));
+#endif
+
+	  COMPONENT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_VAL"    ,
+			           dest,"out_PUSH_GPR_"+toString(i)+"_VAL"    );
+	  COMPONENT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_ACK"    ,
+		                   dest, "in_PUSH_GPR_"+toString(i)+"_ACK"    );
+	  COMPONENT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_NUM_REG",
+		                   dest,"out_PUSH_GPR_"+toString(i)+"_NUM_REG");
+
+#ifdef POSITION
+	  _component->interface_map (src ,"push_spr_"+toString(i)
+				     dest,"push_spr_"+toString(i));
+#endif
+
+	  COMPONENT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_VAL"    ,
+		                   dest,"out_PUSH_SPR_"+toString(i)+"_VAL"    );
+	  COMPONENT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_ACK"    ,
+		                   dest, "in_PUSH_SPR_"+toString(i)+"_ACK"    );
+	  COMPONENT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_NUM_REG",
+		                   dest,"out_PUSH_SPR_"+toString(i)+"_NUM_REG");
+	}
+    }
+
+
     // ===================================================================
     // =====[ dependency_checking_unit ]==================================
@@ -231,5 +440,5 @@
     {
       src = _name+"_dependency_checking_unit";
-      std::cout << "Instance : " << src << std::endl;
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
 	   
       {
@@ -252,6 +461,6 @@
 #endif
 
-// 	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_VAL"               ,dest,);
-// 	  PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(i)+"_ACK"               ,dest,);
+// // 	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_VAL"               ,dest,);
+// // 	  PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(i)+"_ACK"               ,dest,);
 	  if (_param->_have_port_front_end_id)
 	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_FRONT_END_ID"      ,
@@ -280,24 +489,13 @@
 	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_LOG"    ,
 	  	              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG"    );
-
-	  dest = _name+"_register_address_translation_unit";
 	  
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY"    ,
-		              dest,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY"    );
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY"    ,
-		              dest,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY"    );
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY"    ,
-		              dest,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY"    );
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
-		              dest,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
-		              dest,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
+	  // in_RENAME_IN_NUM_REG_RA_PHY     - register_address_translation_unit
+	  // in_RENAME_IN_NUM_REG_RB_PHY     - register_address_translation_unit
+	  // in_RENAME_IN_NUM_REG_RC_PHY     - register_address_translation_unit
+	  // in_RENAME_IN_NUM_REG_RD_PHY_OLD - register_address_translation_unit
+	  // in_RENAME_IN_NUM_REG_RE_PHY_OLD - register_address_translation_unit
 	  
-	  dest = _name+"_free_list_unit";
-	  
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
-		              dest,"out_POP_"+toString(i)+"_GPR_NUM_REG");
-	  PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
-		              dest,"out_POP_"+toString(i)+"_SPR_NUM_REG");
+	  // in_RENAME_IN_NUM_REG_RD_PHY_NEW - free_list_unit
+	  // in_RENAME_IN_NUM_REG_RE_PHY_NEW - free_list_unit
 	}
 
@@ -311,8 +509,4 @@
 #endif
 
-// 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_VAL"               ,
-// 		              dest,"out_INSERT_"+toString(i)+"_VAL"               );
-// 	  PORT_MAP(_component,src , "in_RENAME_OUT_"+toString(i)+"_ACK"               ,
-// 		              dest, "in_INSERT_"+toString(i)+"_ACK"               );
 	  if (_param->_have_port_front_end_id)
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_FRONT_END_ID"      ,
@@ -321,47 +515,55 @@
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_CONTEXT_ID"        ,
 		              dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID"        );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RA"           ,
-		              dest,"out_INSERT_"+toString(i)+"_READ_RA"           );
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_LOG"    ,
 		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_LOG"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY"    ,
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RB"           ,
-		              dest,"out_INSERT_"+toString(i)+"_READ_RB"           );
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_LOG"    ,
 		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_LOG"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY"    ,
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RC"           ,
-		              dest,"out_INSERT_"+toString(i)+"_READ_RC"           );
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_LOG"    ,
 		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_LOG"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY"    ,
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD"          ,
-		              dest,"out_INSERT_"+toString(i)+"_WRITE_RD"          );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG"    ,
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE"          ,
-		              dest,"out_INSERT_"+toString(i)+"_WRITE_RE"          );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG"    ,
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG"    );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
-		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
-	}
+
+// 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_VAL"               ,
+// 		              dest,"out_INSERT_"+toString(i)+"_VAL"               );
+// 	  PORT_MAP(_component,src , "in_RENAME_OUT_"+toString(i)+"_ACK"               ,
+// 		              dest, "in_INSERT_"+toString(i)+"_ACK"               );
+
+	  dest = _name+"_register_translation_unit_glue";
+
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RA"           ,
+			           dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_READ_RA"           );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY"    ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RA_PHY"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RB"           ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_READ_RB"           );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY"    ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RB_PHY"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RC"           ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_READ_RC"           );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY"    ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RC_PHY"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD"          ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_WRITE_RD"          );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG"    ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RD_LOG"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE"          ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_WRITE_RE"          );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG"    ,
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RE_LOG"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
+		                   dest, "in_INSERT_"+toString(i)+"_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW");
+ 	}
     }
 
     // ===================================================================
-    // =====[ free_list_unit ]============================================
+    // =====[ stat_list_unit ]============================================
     // ===================================================================
     {
-      src = _name+"_free_list_unit";
-      std::cout << "Instance : " << src << std::endl;
+      src = _name+"_stat_list_unit";
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
 	   
       {
@@ -375,243 +577,37 @@
       }
 
-      // ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-	{
-	  dest = _name;
-#ifdef POSITION
-	  _component->interface_map (src ,"pop_"+toString(i)
-				     dest,"rename_"+toString(i));
-#endif
-	  
-	  PORT_MAP(_component,src , "in_POP_"+toString(i)+"_GPR_VAL"    ,
-		              dest,"in_RENAME_"+toString(i)+"_WRITE_RD");
-	  PORT_MAP(_component,src , "in_POP_"+toString(i)+"_SPR_VAL"    ,
-		              dest,"in_RENAME_"+toString(i)+"_WRITE_RE");
-
-	  dest = _name+"_register_translation_unit_glue";
-	  PORT_MAP(_component,src , "in_POP_"+toString(i)+"_VAL" ,
-		              dest,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" );
-	  PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_ACK" ,
-		              dest, "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" );
-
-	  dest = _name+"_dependency_checking_unit";
-
-	  PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_GPR_NUM_REG",
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
-	  PORT_MAP(_component,src ,"out_POP_"+toString(i)+"_SPR_NUM_REG",
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
-	}
-      // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-      // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-      for (uint32_t i=0; i<_param->_nb_reg_free; i++)
-	{
-	  dest = _name+"_stat_list_unit";
-#ifdef POSITION
-	  _component->interface_map (src ,"push_gpr_"+toString(i)
-				     dest,"push_gpr_"+toString(i));
-#endif
-
-	  PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_VAL"    ,
-		              dest,"out_PUSH_GPR_"+toString(i)+"_VAL"    );
-	  PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_ACK"    ,
-		              dest, "in_PUSH_GPR_"+toString(i)+"_ACK"    );
-	  PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_NUM_REG",
-		              dest,"out_PUSH_GPR_"+toString(i)+"_NUM_REG");
-
-#ifdef POSITION
-	  _component->interface_map (src ,"push_spr_"+toString(i)
-				     dest,"push_spr_"+toString(i));
-#endif
-
-	  PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_VAL"    ,
-		              dest,"out_PUSH_SPR_"+toString(i)+"_VAL"    );
-	  PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_ACK"    ,
-		              dest, "in_PUSH_SPR_"+toString(i)+"_ACK"    );
-	  PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_NUM_REG",
-		              dest,"out_PUSH_SPR_"+toString(i)+"_NUM_REG");
-	}
-    }
-
-    // ===================================================================
-    // =====[ register_address_translation_unit ]=========================
-    // ===================================================================
-    {
-      src = _name+"_register_address_translation_unit";
-      std::cout << "Instance : " << src << std::endl;
-	   
-      {
-	dest = _name;
-#ifdef POSITION
-	_component->interface_map (src ,"",
-				   dest,"");
-#endif
-	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
-	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
-      }
-
-      // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-	{
-	  dest = _name;
-#ifdef POSITION
-	  _component->interface_map (src ,"rename_"+toString(i)
-				     dest,"rename_"+toString(i));
-#endif
-	  
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_VAL"               ,
-		              dest, "in_RENAME_"+toString(i)+"_VAL"               );
-	  if (_param->_have_port_front_end_id)
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_FRONT_END_ID"      ,
-		              dest, "in_RENAME_"+toString(i)+"_FRONT_END_ID"      );
-	  if (_param->_have_port_context_id)
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_CONTEXT_ID"        ,
-		              dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID"        );
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG"    ,
-		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG"    );
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG"    ,
-		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RB_LOG"    );
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG"    ,
-		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RC_LOG"    );
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG"    ,
-		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RD_LOG"    );
-	  PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG"    ,
-		              dest, "in_RENAME_"+toString(i)+"_NUM_REG_RE_LOG"    );
-
-	  dest = _name+"_register_translation_unit_glue";
-	  PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_ACK",
-		              dest, "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK");
-	  
-	  dest = _name+"_dependency_checking_unit";
-	  PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RA_PHY"    ,
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RA_PHY"    );
-	  PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RB_PHY"    ,
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RB_PHY"    );
-	  PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RC_PHY"    ,
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RC_PHY"    );
-	  PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
-	  PORT_MAP(_component,src ,"out_RENAME_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
-		              dest, "in_RENAME_IN_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
-	}
-
       // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
       for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
 	{
-	  dest = _name+"_dependency_checking_unit";
-#ifdef POSITION
-	  _component->interface_map (src ,"rename_"+toString(i)
-				     dest,"rename_in_"+toString(i));
-#endif
-
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD"      ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD"      );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE"      ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE"      );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_LOG",
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_LOG");
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_LOG",
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_LOG");
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY",
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY",
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
-
 	  dest = _name+"_register_translation_unit_glue";
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_VAL",
-		              dest,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL");
-	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK",
-		              dest, "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK");
-	}
-
-      // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-      for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
-	{
-	  dest = _name;
-#ifdef POSITION
-	  _component->interface_map (src ,"retire_"+toString(i)
-				     dest,"retire_"+toString(i));
-#endif
-
-	  if (_param->_have_port_front_end_id)
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_FRONT_END_ID"      ,
-		              dest, "in_RETIRE_"+toString(i)+"_FRONT_END_ID"      );
-	  if (_param->_have_port_context_id)
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_CONTEXT_ID"        ,
-		              dest, "in_RETIRE_"+toString(i)+"_CONTEXT_ID"        );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_EVENT_STATE"       ,
-		              dest, "in_RETIRE_"+toString(i)+"_EVENT_STATE"       );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD"          ,
-		              dest, "in_RETIRE_"+toString(i)+"_WRITE_RD"          );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE"          ,
-		              dest, "in_RETIRE_"+toString(i)+"_WRITE_RE"          );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG"    ,
-		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG"    );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG"    ,
-		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG"    );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
-		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
-		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
-
-	  dest = _name+"_register_translation_unit_glue";
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL"          ,
-		              dest,"out_RETIRE_"+toString(i)+"_RAT_VAL"      );
-	  PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK"          ,
-		              dest, "in_RETIRE_"+toString(i)+"_RAT_ACK"      );
-	}
-    }
-    
-    // ===================================================================
-    // =====[ stat_list_unit ]============================================
-    // ===================================================================
-    {
-      src = _name+"_stat_list_unit";
-      std::cout << "Instance : " << src << std::endl;
-	   
-      {
-	dest = _name;
-#ifdef POSITION
-	_component->interface_map (src ,"",
-				   dest,"");
-#endif
-	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
-	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
-      }
-
-      // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-	{
-	  dest = _name+"_dependency_checking_unit";
 #ifdef POSITION
 	  _component->interface_map (src ,"insert_"+toString(i)
-				     dest,"rename_out_"+toString(i));
-#endif
-
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RA"           ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_READ_RA"           );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_PHY"    );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RB"           ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_READ_RB"           );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB_PHY"    );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RC"           ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_READ_RC"           );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC_PHY"    );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD"          ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD"          );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE"          ,
-		              dest,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE"          );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
-		              dest,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
-
-	  dest = _name+"_register_translation_unit_glue";
-	  PORT_MAP(_component,src ,  "in_INSERT_"+toString(i)+"_VAL" ,
-		              dest,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL");
-	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK" ,
-		              dest, "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" );
+				     dest,"insert_stat_list_"+toString(i));
+#endif
+
+	  COMPONENT_MAP(_component,src ,  "in_INSERT_"+toString(i)+"_VAL" ,
+			           dest,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL");
+	  COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_ACK" ,
+		                   dest, "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RA"           ,
+			           dest,"out_INSERT_"+toString(i)+"_STAT_LIST_READ_RA"           );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RA_PHY"    );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RB"           ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_READ_RB"           );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RB_PHY"    );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_READ_RC"           ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_READ_RC"           );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RC_PHY"    );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD"          ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RD"          );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_NEW");
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE"          ,
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RE"          );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_NEW");
 	}
 
@@ -650,9 +646,12 @@
 		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
 
+	  // in_RETIRE_RESTORE_RD_PHY_OLD - register_address_translation_unit.out_RETIRE_RESTORE_RD_PHY_OLD
+	  // in_RETIRE_RESTORE_RE_PHY_OLD - register_address_translation_unit.out_RETIRE_RESTORE_RE_PHY_OLD
+
 	  dest = _name+"_register_translation_unit_glue";
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL",
-		              dest,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL");
-	  PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK",
-		              dest, "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK");
+	  COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL",
+		                   dest,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL");
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK",
+			           dest, "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK");
 	}
 
@@ -667,10 +666,7 @@
 #endif
 
-	  PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_VAL"    ,
-		              dest, "in_PUSH_GPR_"+toString(i)+"_VAL"    );
-	  PORT_MAP(_component,src , "in_PUSH_GPR_"+toString(i)+"_ACK"    ,
-		              dest,"out_PUSH_GPR_"+toString(i)+"_ACK"    );
-	  PORT_MAP(_component,src ,"out_PUSH_GPR_"+toString(i)+"_NUM_REG",
-		              dest, "in_PUSH_GPR_"+toString(i)+"_NUM_REG");
+	  //out_PUSH_GPR_VAL     - free_list_unit
+	  // in_PUSH_GPR_ACK     - free_list_unit
+	  //out_PUSH_GPR_NUM_REG - free_list_unit
 
 #ifdef POSITION
@@ -679,10 +675,7 @@
 #endif
 
-	  PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_VAL"    ,
-		              dest, "in_PUSH_SPR_"+toString(i)+"_VAL"    );
-	  PORT_MAP(_component,src , "in_PUSH_SPR_"+toString(i)+"_ACK"    ,
-		              dest,"out_PUSH_SPR_"+toString(i)+"_ACK"    );
-	  PORT_MAP(_component,src ,"out_PUSH_SPR_"+toString(i)+"_NUM_REG",
-		              dest, "in_PUSH_SPR_"+toString(i)+"_NUM_REG");
+	  //out_PUSH_SPR_VAL     - free_list_unit
+	  // in_PUSH_SPR_ACK     - free_list_unit
+	  //out_PUSH_SPR_NUM_REG - free_list_unit
 	}
     }
@@ -693,5 +686,5 @@
     {
       src = _name+"_register_translation_unit_glue";
-      std::cout << "Instance : " << src << std::endl;
+      log_printf(INFO,Core,FUNCTION,_("Instance : %s"),src.c_str());
 	   
       {
@@ -723,23 +716,73 @@
 		              dest, "in_INSERT_"+toString(i)+"_ACK"    );
 
-	  dest = _name+"_register_address_translation_unit";
-	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RAT_INSERT_VAL",
-		              dest, "in_INSERT_"+toString(i)+"_VAL");
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RAT_RENAME_ACK",
-		              dest,"out_RENAME_"+toString(i)+"_ACK");
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_RAT_INSERT_ACK",
-		              dest,"out_INSERT_"+toString(i)+"_ACK");
-
-	  dest = _name+"_free_list_unit";
-	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FREE_LIST_VAL" ,
-		              dest, "in_POP_"+toString(i)+"_VAL" );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_FREE_LIST_ACK" ,
-		              dest,"out_POP_"+toString(i)+"_ACK" );
-
-	  dest = _name+"_stat_list_unit";
-	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_STAT_LIST_VAL" ,
-		              dest, "in_INSERT_"+toString(i)+"_VAL" );
-	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_STAT_LIST_ACK" ,
-		              dest,"out_INSERT_"+toString(i)+"_ACK" );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RA"           ,
+		              dest,"out_INSERT_"+toString(i)+"_READ_RA"           );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RB"           ,
+		              dest,"out_INSERT_"+toString(i)+"_READ_RB"           );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RC"           ,
+		              dest,"out_INSERT_"+toString(i)+"_READ_RC"           );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_WRITE_RD"          ,
+		              dest,"out_INSERT_"+toString(i)+"_WRITE_RD"          );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_WRITE_RE"          ,
+		              dest,"out_INSERT_"+toString(i)+"_WRITE_RE"          );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
+
+	  // out_INSERT_RAT_INSERT_VAL - register_address_translation_unit
+	  //  in_INSERT_RAT_RENAME_ACK - register_address_translation_unit
+	  //  in_INSERT_RAT_INSERT_ACK - register_address_translation_unit
+	  // out_INSERT_FREE_LIST_VAL  - free_list_unit
+	  //  in_INSERT_FREE_LIST_ACK  - free_list_unit
+	  // out_INSERT_STAT_LIST_VAL  - stat_list_unit
+	  //  in_INSERT_STAT_LIST_ACK  - stat_list_unit
+
+	  //  in_INSERT_DEPENDENCY_CHECKING_READ_RA            - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY     - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_READ_RB            - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY     - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_READ_RC            - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY     - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_WRITE_RD           - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG     - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_WRITE_RE           - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG     - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD - dependency_checking_unit
+	  //  in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW - dependency_checking_unit
+
+	  // out_INSERT_STAT_LIST_READ_RA                      - stat_list_unit
+	  // out_INSERT_STAT_LIST_NUM_REG_RA_PHY               - stat_list_unit
+	  // out_INSERT_STAT_LIST_READ_RB                      - stat_list_unit
+	  // out_INSERT_STAT_LIST_NUM_REG_RB_PHY               - stat_list_unit
+	  // out_INSERT_STAT_LIST_READ_RC                      - stat_list_unit
+	  // out_INSERT_STAT_LIST_NUM_REG_RC_PHY               - stat_list_unit
+	  // out_INSERT_STAT_LIST_WRITE_RD                     - stat_list_unit
+	  // out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW           - stat_list_unit
+	  // out_INSERT_STAT_LIST_WRITE_RE                     - stat_list_unit
+	  // out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW           - stat_list_unit
+
+	  // out_INSERT_RAT_WRITE_RD                           - register_address_translation_unit
+	  // out_INSERT_RAT_NUM_REG_RD_LOG                     - register_address_translation_unit
+	  // out_INSERT_RAT_NUM_REG_RD_PHY_NEW                 - register_address_translation_unit
+	  // out_INSERT_RAT_WRITE_RE                           - register_address_translation_unit
+	  // out_INSERT_RAT_NUM_REG_RE_LOG                     - register_address_translation_unit
+	  // out_INSERT_RAT_NUM_REG_RE_PHY_NEW                 - register_address_translation_unit
 	}
 
@@ -758,15 +801,8 @@
 		              dest,"out_RETIRE_"+toString(i)+"_ACK"          );
 
-	  dest = _name+"_register_address_translation_unit";
-	  PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RAT_VAL"      ,
-		              dest, "in_RETIRE_"+toString(i)+"_VAL"          );
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RAT_ACK"      ,
-		              dest,"out_RETIRE_"+toString(i)+"_ACK"          );
-
-	  dest = _name+"_stat_list_unit";
-	  PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_STAT_LIST_VAL",
-		              dest, "in_RETIRE_"+toString(i)+"_VAL");
-	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_STAT_LIST_ACK",
-		              dest,"out_RETIRE_"+toString(i)+"_ACK");
+	  // out_RETIRE_RAT_VAL       - register_address_translation_unit
+	  //  in_RETIRE_RAT_ACK       - register_address_translation_unit
+	  // out_RETIRE_STAT_LIST_VAL - stat_list_unit
+	  //  in_RETIRE_STAT_LIST_ACK - stat_list_unit
 	}
      }
@@ -774,8 +810,11 @@
 
     // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
-     _component->test_map();
-
-#ifdef POSITION
-    _component->generate_file();
+#if (DEBUG_Register_translation_unit == true)
+    _component->test_map();
+#endif
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp	(revision 88)
@@ -23,5 +23,5 @@
     log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete    in_CLOCK ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_end_cycle.cpp	(revision 88)
@@ -25,5 +25,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -31,5 +32,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/Makefile.deps	(revision 88)
@@ -13,15 +13,20 @@
 include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
 endif
+ifndef Priority
+include 			$(DIR_MORPHEO)/Behavioural/Generic/Priority/Makefile.deps
+endif
 
 #-----[ Directory ]----------------------------------------
 
-Rename_select_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select
+Rename_select_DIR		=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select
 
 #-----[ Library ]------------------------------------------
 
-Rename_select_LIBRARY		= 	-lRename_select	\
+Rename_select_LIBRARY		= 	-lRename_select			\
+					$(Priority_LIBRARY)		\
 					$(Behavioural_LIBRARY)	
 
-Rename_select_DIR_LIBRARY		=	-L$(Rename_select_DIR)/lib	\
+Rename_select_DIR_LIBRARY	=	-L$(Rename_select_DIR)/lib	\
+					$(Priority_DIR_LIBRARY)		\
 					$(Behavioural_DIR_LIBRARY)
 
@@ -31,4 +36,5 @@
 				@\
 				$(MAKE) Behavioural_library;		\
+				$(MAKE) Priority_library;		\
 				$(MAKE) --directory=$(Rename_select_DIR) --makefile=Makefile;
 
@@ -36,3 +42,4 @@
 				@\
 				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) Priority_library_clean;		\
 				$(MAKE) --directory=$(Rename_select_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/Makefile	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/Makefile	(revision 88)
@@ -24,4 +24,6 @@
 library_clean			: Rename_select_library_clean
 
+local_clean			:
+
 include                         $(DIR_COMPONENT)/Makefile.deps
 include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/main.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/main.cpp	(revision 88)
@@ -16,4 +16,6 @@
   err (_(" * nb_front_end                         (uint32_t         )\n"));
   err (_(" * nb_context            [nb_front_end] (uint32_t         )\n"));
+//   err (_(" * size_nb_front_end_id                 (uint32_t         )\n"));
+//   err (_(" * size_nb_context_id                   (uint32_t         )\n"));
   err (_(" * max_branch_speculated                (uint32_t         )\n"));
   err (_(" * size_general_data                    (uint32_t         )\n"));
@@ -49,4 +51,6 @@
     _nb_context [i] = atoi(argv[x++]);
 
+//   uint32_t          _size_front_end_id    = atoi(argv[x++]);
+//   uint32_t          _size_context_id      = atoi(argv[x++]);
   uint32_t          _max_branch_speculated= atoi(argv[x++]);
   uint32_t          _size_general_data    = atoi(argv[x++]);
@@ -66,4 +70,6 @@
 	(_nb_front_end         ,
 	 _nb_context           ,
+//          _size_front_end_id    ,
+//          _size_context_id      ,
 	 _max_branch_speculated,
 	 _size_general_data    ,
@@ -72,5 +78,7 @@
 	 _nb_front_end_select  ,
 	 _priority             ,
-	 _load_balancing       );
+	 _load_balancing       ,
+         true // is_toplevel
+         );
       
       msg(_("%s"),param->print(1).c_str());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 88)
@@ -23,4 +23,14 @@
 #endif
 
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
   Rename_select * _Rename_select = new Rename_select
     (name.c_str(),
@@ -29,5 +39,5 @@
 #endif
      _param,
-     USE_ALL);
+     _usage);
   
 #ifdef SYSTEMC
@@ -40,25 +50,28 @@
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_VAL           ," in_RENAME_IN_VAL           ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL(out_RENAME_IN_ACK           ,"out_RENAME_IN_ACK           ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID  ," in_RENAME_IN_FRONT_END_ID  ",Tcontext_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID    ," in_RENAME_IN_CONTEXT_ID    ",Tcontext_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_DEPTH         ," in_RENAME_IN_DEPTH         ",Tdepth_t          ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_TYPE          ," in_RENAME_IN_TYPE          ",Ttype_t           ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_OPERATION     ," in_RENAME_IN_OPERATION     ",Toperation_t      ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS       ," in_RENAME_IN_ADDRESS       ",Tgeneral_data_t   ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT  ," in_RENAME_IN_HAS_IMMEDIAT  ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT      ," in_RENAME_IN_IMMEDIAT      ",Tgeneral_data_t   ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RA       ," in_RENAME_IN_READ_RA       ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA    ," in_RENAME_IN_NUM_REG_RA    ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RB       ," in_RENAME_IN_READ_RB       ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB    ," in_RENAME_IN_NUM_REG_RB    ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RC       ," in_RENAME_IN_READ_RC       ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC    ," in_RENAME_IN_NUM_REG_RC    ",Tspecial_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RD      ," in_RENAME_IN_WRITE_RD      ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD    ," in_RENAME_IN_NUM_REG_RD    ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RE      ," in_RENAME_IN_WRITE_RE      ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE    ," in_RENAME_IN_NUM_REG_RE    ",Tspecial_address_t,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_EXCEPTION_USE ," in_RENAME_IN_EXCEPTION_USE ",Texception_t      ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_VAL           ," in_RENAME_IN_VAL           ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL(out_RENAME_IN_ACK           ,"out_RENAME_IN_ACK           ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID  ," in_RENAME_IN_FRONT_END_ID  ",Tcontext_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID    ," in_RENAME_IN_CONTEXT_ID    ",Tcontext_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_DEPTH         ," in_RENAME_IN_DEPTH         ",Tdepth_t          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_TYPE          ," in_RENAME_IN_TYPE          ",Ttype_t           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_OPERATION     ," in_RENAME_IN_OPERATION     ",Toperation_t      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE    ," in_RENAME_IN_NO_EXECUTE    ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ," in_RENAME_IN_IS_DELAY_SLOT ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS       ," in_RENAME_IN_ADDRESS       ",Tgeneral_data_t   ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT  ," in_RENAME_IN_HAS_IMMEDIAT  ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT      ," in_RENAME_IN_IMMEDIAT      ",Tgeneral_data_t   ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RA       ," in_RENAME_IN_READ_RA       ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA    ," in_RENAME_IN_NUM_REG_RA    ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RB       ," in_RENAME_IN_READ_RB       ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB    ," in_RENAME_IN_NUM_REG_RB    ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RC       ," in_RENAME_IN_READ_RC       ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC    ," in_RENAME_IN_NUM_REG_RC    ",Tspecial_address_t,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RD      ," in_RENAME_IN_WRITE_RD      ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD    ," in_RENAME_IN_NUM_REG_RD    ",Tgeneral_address_t,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RE      ," in_RENAME_IN_WRITE_RE      ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE    ," in_RENAME_IN_NUM_REG_RE    ",Tspecial_address_t,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_EXCEPTION_USE ," in_RENAME_IN_EXCEPTION_USE ",Texception_t      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_EXCEPTION     ," in_RENAME_IN_EXCEPTION     ",Texception_t      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
 
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_VAL          ,"out_RENAME_OUT_VAL          ",Tcontrol_t        ,_param->_nb_inst_rename);
@@ -69,4 +82,6 @@
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_TYPE         ,"out_RENAME_OUT_TYPE         ",Ttype_t           ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_OPERATION    ,"out_RENAME_OUT_OPERATION    ",Toperation_t      ,_param->_nb_inst_rename);
+  ALLOC1_SC_SIGNAL(out_RENAME_OUT_NO_EXECUTE   ,"out_RENAME_OUT_NO_EXECUTE   ",Tcontrol_t        ,_param->_nb_inst_rename);
+  ALLOC1_SC_SIGNAL(out_RENAME_OUT_IS_DELAY_SLOT,"out_RENAME_OUT_IS_DELAY_SLOT",Tcontrol_t        ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS      ,"out_RENAME_OUT_ADDRESS      ",Tgeneral_data_t   ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_HAS_IMMEDIAT ,"out_RENAME_OUT_HAS_IMMEDIAT ",Tcontrol_t        ,_param->_nb_inst_rename);
@@ -83,4 +98,5 @@
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_NUM_REG_RE   ,"out_RENAME_OUT_NUM_REG_RE   ",Tspecial_address_t,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_EXCEPTION_USE,"out_RENAME_OUT_EXCEPTION_USE",Texception_t      ,_param->_nb_inst_rename);
+  ALLOC1_SC_SIGNAL(out_RENAME_OUT_EXCEPTION    ,"out_RENAME_OUT_EXCEPTION    ",Texception_t      ,_param->_nb_inst_rename);
   
   /********************************************************
@@ -93,28 +109,31 @@
   (*(_Rename_select->in_NRESET))       (*(in_NRESET));
 
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_VAL           ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select,out_RENAME_IN_ACK           ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_VAL           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select,out_RENAME_IN_ACK           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   if (_param->_have_port_front_end_id)
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_FRONT_END_ID  ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_FRONT_END_ID  ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   if (_param->_have_port_context_id)
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_CONTEXT_ID    ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_CONTEXT_ID    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   if (_param->_have_port_depth)
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_DEPTH         ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_TYPE          ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_OPERATION     ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS       ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_HAS_IMMEDIAT  ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RA       ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RA    ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RB       ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RB    ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RC       ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RC    ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_WRITE_RD      ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RD    ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_WRITE_RE      ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RE    ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_EXCEPTION_USE ,_param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_DEPTH         ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_TYPE          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_OPERATION     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NO_EXECUTE    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS       ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_HAS_IMMEDIAT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RA       ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RA    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RB       ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RB    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_READ_RC       ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RC    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_WRITE_RD      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RD    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_WRITE_RE      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NUM_REG_RE    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_EXCEPTION_USE ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_EXCEPTION     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
 
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_VAL          ,_param->_nb_inst_rename);
@@ -128,4 +147,6 @@
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_TYPE         ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_OPERATION    ,_param->_nb_inst_rename);
+  INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NO_EXECUTE   ,_param->_nb_inst_rename);
+  INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_IS_DELAY_SLOT,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_ADDRESS      ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_HAS_IMMEDIAT ,_param->_nb_inst_rename);
@@ -142,4 +163,5 @@
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NUM_REG_RE   ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_EXCEPTION_USE,_param->_nb_inst_rename);
+  INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_EXCEPTION    ,_param->_nb_inst_rename);
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -189,4 +211,6 @@
 	    in_RENAME_IN_TYPE         [i][j]->write(range<Ttype_t           >(rand(),_param->_size_type                  ));
 	    in_RENAME_IN_OPERATION    [i][j]->write(range<Toperation_t      >(rand(),_param->_size_operation             ));
+	    in_RENAME_IN_NO_EXECUTE   [i][j]->write(rand()%2);
+	    in_RENAME_IN_IS_DELAY_SLOT[i][j]->write(rand()%2);
 	    in_RENAME_IN_ADDRESS      [i][j]->write(address++                                                             );
 	    in_RENAME_IN_HAS_IMMEDIAT [i][j]->write(range<Tcontrol_t        >(rand(),1                                   ));
@@ -203,4 +227,5 @@
 	    in_RENAME_IN_NUM_REG_RE   [i][j]->write(range<Tspecial_address_t>(rand(),_param->_size_special_register_logic));
 	    in_RENAME_IN_EXCEPTION_USE[i][j]->write(range<Texception_t      >(rand(),_param->_size_exception             ));
+	    in_RENAME_IN_EXCEPTION    [i][j]->write(range<Texception_t      >(rand(),_param->_size_exception             ));
 	  }
 
@@ -256,4 +281,6 @@
 		      TEST(Ttype_t           ,out_RENAME_OUT_TYPE         [i]->read(),in_RENAME_IN_TYPE         [x][y]->read());
 		      TEST(Toperation_t      ,out_RENAME_OUT_OPERATION    [i]->read(),in_RENAME_IN_OPERATION    [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_NO_EXECUTE   [i]->read(),in_RENAME_IN_NO_EXECUTE   [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_IS_DELAY_SLOT[i]->read(),in_RENAME_IN_IS_DELAY_SLOT[x][y]->read());
 		      TEST(Tcontrol_t        ,out_RENAME_OUT_HAS_IMMEDIAT [i]->read(),in_RENAME_IN_HAS_IMMEDIAT [x][y]->read());
 		      TEST(Tgeneral_data_t   ,out_RENAME_OUT_IMMEDIAT     [i]->read(),in_RENAME_IN_IMMEDIAT     [x][y]->read());
@@ -269,5 +296,5 @@
 		      TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE   [i]->read(),in_RENAME_IN_NUM_REG_RE   [x][y]->read());
 		      TEST(Texception_t      ,out_RENAME_OUT_EXCEPTION_USE[i]->read(),in_RENAME_IN_EXCEPTION_USE[x][y]->read());
-
+		      TEST(Texception_t      ,out_RENAME_OUT_EXCEPTION    [i]->read(),in_RENAME_IN_EXCEPTION    [x][y]->read());
 		  }
 
@@ -300,4 +327,6 @@
   delete []  in_RENAME_IN_TYPE          ;
   delete []  in_RENAME_IN_OPERATION     ;
+  delete []  in_RENAME_IN_NO_EXECUTE    ;
+  delete []  in_RENAME_IN_IS_DELAY_SLOT ;
   delete []  in_RENAME_IN_ADDRESS       ;
   delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
@@ -314,4 +343,5 @@
   delete []  in_RENAME_IN_NUM_REG_RE    ;
   delete []  in_RENAME_IN_EXCEPTION_USE ;
+  delete []  in_RENAME_IN_EXCEPTION     ;
   
   delete [] out_RENAME_OUT_VAL          ;
@@ -322,4 +352,6 @@
   delete [] out_RENAME_OUT_TYPE         ;
   delete [] out_RENAME_OUT_OPERATION    ;
+  delete [] out_RENAME_OUT_NO_EXECUTE   ;
+  delete [] out_RENAME_OUT_IS_DELAY_SLOT;
   delete [] out_RENAME_OUT_ADDRESS      ;
   delete [] out_RENAME_OUT_HAS_IMMEDIAT ;
@@ -336,4 +368,5 @@
   delete [] out_RENAME_OUT_NUM_REG_RE   ;
   delete [] out_RENAME_OUT_EXCEPTION_USE;
+  delete [] out_RENAME_OUT_EXCEPTION    ;
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h	(revision 88)
@@ -28,5 +28,5 @@
   public : uint32_t *        _nb_context            ;//[nb_front_end]
   public : uint32_t          _max_branch_speculated ;
-  public : uint32_t          _size_general_data     ;
+//public : uint32_t          _size_general_data     ;
   public : uint32_t          _nb_inst_rename        ;
   public : uint32_t *        _nb_inst_decod         ;//[nb_front_end]
@@ -36,16 +36,17 @@
 
   public : uint32_t          _max_nb_inst_decod     ;
+//public : uint32_t          _size_depth            ;
+//public : uint32_t          _size_front_end_id     ;
+//public : uint32_t          _size_context_id       ;
 
-  public : uint32_t          _size_front_end_id     ;
-  public : uint32_t          _size_context_id       ;
-  public : uint32_t          _size_depth            ;
-
-  public : bool              _have_port_front_end_id;
-  public : bool              _have_port_context_id  ;
-  public : bool              _have_port_depth       ;
+//public : bool              _have_port_front_end_id;
+//public : bool              _have_port_context_id  ;
+//public : bool              _have_port_depth       ;
 
     //-----[ methods ]-----------------------------------------------------------
   public : Parameters  (uint32_t          nb_front_end         ,
 			uint32_t *        nb_context           ,
+//                      uint32_t          size_front_end_id    ,
+//                      uint32_t          size_context_id      ,
 			uint32_t          max_branch_speculated,
 			uint32_t          size_general_data    ,
@@ -54,7 +55,10 @@
 			uint32_t          nb_front_end_select  ,
 			Tpriority_t       priority             ,
-			Tload_balancing_t load_balancing       );
-//   public : Parameters  (Parameters & param) ;
+			Tload_balancing_t load_balancing       ,
+                        bool              is_toplevel=true);
+//public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
+
+  public :        void            copy       (void);
 
   public :        Parameters_test msg_error  (void);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h	(revision 88)
@@ -13,5 +13,4 @@
 #endif
 
-#include <iostream>
 #include "Common/include/ToString.h"
 #include "Common/include/Debug.h"
@@ -27,5 +26,9 @@
 #endif
 #include "Behavioural/include/Usage.h"
+
+#include "Behavioural/Generic/Priority/include/Priority.h"
+
 #include <list>
+#include <iostream>
 
 namespace morpheo {
@@ -71,4 +74,6 @@
   public    : SC_IN (Ttype_t           )  ***  in_RENAME_IN_TYPE          ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Toperation_t      )  ***  in_RENAME_IN_OPERATION     ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_NO_EXECUTE    ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IN_ADDRESS       ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_HAS_IMMEDIAT  ;//[nb_front_end][nb_inst_decod]
@@ -85,4 +90,5 @@
   public    : SC_IN (Tspecial_address_t)  ***  in_RENAME_IN_NUM_REG_RE    ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Texception_t      )  ***  in_RENAME_IN_EXCEPTION_USE ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Texception_t      )  ***  in_RENAME_IN_EXCEPTION     ;//[nb_front_end][nb_inst_decod]
 
     // ~~~~~[ Interface : "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -94,4 +100,6 @@
   public    : SC_OUT(Ttype_t           )   ** out_RENAME_OUT_TYPE         ;//[nb_inst_rename]
   public    : SC_OUT(Toperation_t      )   ** out_RENAME_OUT_OPERATION    ;//[nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_NO_EXECUTE   ;//[nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_IS_DELAY_SLOT;//[nb_inst_rename]
   public    : SC_OUT(Tgeneral_data_t   )   ** out_RENAME_OUT_ADDRESS      ;//[nb_inst_rename]
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_HAS_IMMEDIAT ;//[nb_inst_rename]
@@ -108,12 +116,12 @@
   public    : SC_OUT(Tspecial_address_t)   ** out_RENAME_OUT_NUM_REG_RE   ;//[nb_inst_rename]
   public    : SC_OUT(Texception_t      )   ** out_RENAME_OUT_EXCEPTION_USE;//[nb_inst_rename]
+  public    : SC_OUT(Texception_t      )   ** out_RENAME_OUT_EXCEPTION    ;//[nb_inst_rename]
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  private   : generic::priority::Priority   * _priority;
 
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  private   : uint32_t                        reg_FRONT_END_PRIORITY;
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  private   : std::list<select_t>             select;
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Types.h	(revision 88)
@@ -19,17 +19,4 @@
 namespace rename_select {
 
-  class select_t
-  {
-  public : uint32_t _front_end ;
-  public : uint32_t _inst_decod;
-    
-  public : select_t (uint32_t front_end,
-		     uint32_t inst_decod)
-    {
-      _front_end  = front_end ;
-      _inst_decod = inst_decod;
-    }
-  };
-
 }; // end namespace rename_select
 }; // end namespace rename_unit
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp	(revision 88)
@@ -22,4 +22,6 @@
   Parameters::Parameters (uint32_t          nb_front_end         ,
 			  uint32_t *        nb_context           ,
+//                           uint32_t          size_front_end_id    ,
+//                           uint32_t          size_context_id      ,
 			  uint32_t          max_branch_speculated,
 			  uint32_t          size_general_data    ,
@@ -28,5 +30,6 @@
 			  uint32_t          nb_front_end_select  ,
 			  Tpriority_t       priority             ,
-			  Tload_balancing_t load_balancing       )
+			  Tload_balancing_t load_balancing       ,
+                          bool              is_toplevel)
   {
     log_printf(FUNC,Rename_select,FUNCTION,"Begin");
@@ -35,5 +38,4 @@
     _nb_context            = nb_context           ;
     _max_branch_speculated = max_branch_speculated;
-    _size_general_data     = size_general_data    ;
     _nb_inst_rename        = nb_inst_rename       ;
     _nb_inst_decod         = nb_inst_decod        ;
@@ -44,13 +46,20 @@
     _max_nb_inst_decod     = max<uint32_t>(nb_inst_decod,nb_front_end);
 
-    _size_front_end_id     = log2(nb_front_end);
-    _size_context_id       = log2(max<uint32_t>(nb_context,nb_front_end));
-    _size_depth            = log2(max_branch_speculated);
+    test();
 
-    _have_port_front_end_id= _size_front_end_id > 0;
-    _have_port_context_id  = _size_context_id   > 0;
-    _have_port_depth       = _size_depth        > 0;
+    if (is_toplevel)
+      {
+        _size_general_data     = size_general_data    ;
+        _size_depth            = log2(max_branch_speculated);
+        _size_front_end_id     = log2(_nb_front_end);
+        _size_context_id       = log2(max<uint32_t>(_nb_context,_nb_front_end));
         
-    test();
+        _have_port_front_end_id= _size_front_end_id > 0;
+        _have_port_context_id  = _size_context_id   > 0;
+        _have_port_depth       = _size_depth        > 0;
+        
+        copy();
+      }
+
     log_printf(FUNC,Rename_select,FUNCTION,"End");
   };
@@ -73,4 +82,12 @@
   };
 
+#undef  FUNCTION
+#define FUNCTION "Rename_select::copy"
+  void Parameters::copy (void) 
+  {
+    log_printf(FUNC,Rename_select,FUNCTION,"Begin");
+    log_printf(FUNC,Rename_select,FUNCTION,"End");
+  };
+
 }; // end namespace rename_select
 }; // end namespace rename_unit
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp	(revision 88)
@@ -38,4 +38,10 @@
     log_printf(FUNC,Rename_select,FUNCTION,"Begin");
 
+#if DEBUG_Core == true
+    log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
     log_printf(INFO,Rename_select,FUNCTION,"Allocation");
 
@@ -47,5 +53,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {	
 	log_printf(INFO,Rename_select,FUNCTION,"Allocation of statistics");
@@ -56,5 +62,5 @@
 
 #ifdef VHDL
-    if (_usage & USE_VHDL)
+    if (usage_is_set(_usage,USE_VHDL))
       {
 	// generate the vhdl
@@ -66,5 +72,5 @@
 
 #ifdef SYSTEMC
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	log_printf(INFO,Rename_select,FUNCTION,"Method - transition");
@@ -89,4 +95,6 @@
 			<< (*(in_RENAME_IN_TYPE          [i][j]))
 			<< (*(in_RENAME_IN_OPERATION     [i][j]))
+			<< (*(in_RENAME_IN_NO_EXECUTE    [i][j]))
+			<< (*(in_RENAME_IN_IS_DELAY_SLOT [i][j]))
 			<< (*(in_RENAME_IN_ADDRESS       [i][j]))
 			<< (*(in_RENAME_IN_HAS_IMMEDIAT  [i][j]))
@@ -102,5 +110,6 @@
 			<< (*(in_RENAME_IN_WRITE_RE      [i][j]))
 			<< (*(in_RENAME_IN_NUM_REG_RE    [i][j]))
-			<< (*(in_RENAME_IN_EXCEPTION_USE [i][j]));
+			<< (*(in_RENAME_IN_EXCEPTION_USE [i][j]))
+			<< (*(in_RENAME_IN_EXCEPTION     [i][j]));
 	      if (_param->_have_port_front_end_id)
 	      sensitive << (*(in_RENAME_IN_FRONT_END_ID  [i][j]));
@@ -150,4 +159,8 @@
 		  (*(out_RENAME_OUT_OPERATION     [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_OPERATION     [x])) (*(in_RENAME_IN_OPERATION     [i][j]));
+		  (*(out_RENAME_OUT_NO_EXECUTE    [x])) (*(in_RENAME_IN_VAL           [i][j]));
+		  (*(out_RENAME_OUT_NO_EXECUTE    [x])) (*(in_RENAME_IN_NO_EXECUTE    [i][j]));
+		  (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_VAL           [i][j]));
+		  (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_IS_DELAY_SLOT [i][j]));
 		  (*(out_RENAME_OUT_ADDRESS       [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_ADDRESS       [x])) (*(in_RENAME_IN_ADDRESS       [i][j]));
@@ -178,4 +191,6 @@
 		  (*(out_RENAME_OUT_EXCEPTION_USE [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_EXCEPTION_USE [x])) (*(in_RENAME_IN_EXCEPTION_USE [i][j]));
+		  (*(out_RENAME_OUT_EXCEPTION     [x])) (*(in_RENAME_IN_VAL           [i][j]));
+		  (*(out_RENAME_OUT_EXCEPTION     [x])) (*(in_RENAME_IN_EXCEPTION     [i][j]));
 		}
 	  }
@@ -194,5 +209,5 @@
 
 #ifdef STATISTICS
-    if (_usage & USE_STATISTICS)
+    if (usage_is_set(_usage,USE_STATISTICS))
       {
 	log_printf(INFO,Rename_select,FUNCTION,"Generate Statistics file");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 88)
@@ -58,27 +58,30 @@
     // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[alloc_interface_it1]);
+      ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       
-      _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL           ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_VALACK_OUT(out_RENAME_IN_ACK           ,ACK, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_FRONT_END_ID  ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id          , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID    ,"context_id"   ,Tcontext_t        ,_param->_size_context_id            , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_DEPTH         ,"depth"        ,Tdepth_t          ,_param->_size_depth                 , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_TYPE          ,"type"         ,Ttype_t           ,_param->_size_type                  , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION     ,"operation"    ,Toperation_t      ,_param->_size_operation             , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT      ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RA       ,"read_ra"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RA    ,"num_reg_ra"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RB       ,"read_rb"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RB    ,"num_reg_rb"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RC       ,"read_rc"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RC    ,"num_reg_rc"   ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RD      ,"write_rd"     ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD    ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RE      ,"write_re"     ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE    ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[alloc_signal_it1]);
+      _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL           ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_VALACK_OUT(out_RENAME_IN_ACK           ,ACK, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_FRONT_END_ID  ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID    ,"context_id"   ,Tcontext_t        ,_param->_size_context_id            , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_DEPTH         ,"depth"        ,Tdepth_t          ,_param->_size_depth                 , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_TYPE          ,"type"         ,Ttype_t           ,_param->_size_type                  , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION     ,"operation"    ,Toperation_t      ,_param->_size_operation             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT      ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RA       ,"read_ra"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RA    ,"num_reg_ra"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RB       ,"read_rb"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RB    ,"num_reg_rb"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RC       ,"read_rc"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RC    ,"num_reg_rc"   ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RD      ,"write_rd"     ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD    ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RE      ,"write_re"     ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE    ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
     }
 
@@ -94,4 +97,6 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_TYPE          ,"type"         ,Ttype_t           ,_param->_size_type                  );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_OPERATION     ,"operation"    ,Toperation_t      ,_param->_size_operation             );
+      ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS       ,"address"      ,Tgeneral_data_t   ,_param->_size_general_data          );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   );
@@ -108,11 +113,18 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE    ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register_logic);
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception             );
+      ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             );
     }
 
-
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _priority = new generic::priority::Priority (_name+"_priority"      ,
+						 _param->_priority      ,
+						 _param->_load_balancing,
+						 _param->_nb_front_end  ,
+						 _param->_nb_inst_decod ,
+						 _param->_nb_front_end_select);
 
 #ifdef POSITION
-    _component->generate_file();
+    if (usage_is_set(_usage,USE_POSITION)) 
+      _component->generate_file();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 88)
@@ -23,5 +23,5 @@
     log_printf(FUNC,Rename_select,FUNCTION,"Begin");
 
-    if (_usage & USE_SYSTEMC)
+    if (usage_is_set(_usage,USE_SYSTEMC))
       {
 	delete    in_CLOCK ;
@@ -38,4 +38,6 @@
 	delete []  in_RENAME_IN_TYPE          ;
 	delete []  in_RENAME_IN_OPERATION     ;
+	delete []  in_RENAME_IN_NO_EXECUTE    ;
+	delete []  in_RENAME_IN_IS_DELAY_SLOT ;
 	delete []  in_RENAME_IN_ADDRESS       ;
 	delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
@@ -52,4 +54,5 @@
 	delete []  in_RENAME_IN_NUM_REG_RE    ;
 	delete []  in_RENAME_IN_EXCEPTION_USE ;
+	delete []  in_RENAME_IN_EXCEPTION     ;
 
 	delete [] out_RENAME_OUT_VAL          ;
@@ -79,5 +82,5 @@
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-
+    delete _priority;
     delete _component;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_end_cycle.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_end_cycle.cpp	(revision 88)
@@ -25,5 +25,6 @@
 
 #ifdef STATISTICS
-    _stat->end_cycle();
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
 #endif    
 
@@ -31,5 +32,6 @@
     // Evaluation before read the ouput signal
 //  sc_start(0);
-    _interfaces->testbench();
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 88)
@@ -22,28 +22,46 @@
   void Rename_select::genMealy (void)
   {
-    log_printf(FUNC,Rename_select,FUNCTION,"Begin");
+    log_begin(Rename_select,FUNCTION);
+    log_function(Rename_select,FUNCTION,_name.c_str());
 
-    Tcontrol_t ack [_param->_nb_front_end][_param->_max_nb_inst_decod];
+    Tcontrol_t val                  [_param->_nb_inst_rename];
+    Tcontrol_t ack                  [_param->_nb_front_end][_param->_max_nb_inst_decod];
+    Tcontrol_t previous_transaction [_param->_nb_front_end];
+
+    for (uint32_t i=0; i<_param->_nb_inst_rename; ++i)
+      val [i] = false;
     for (uint32_t i=0; i<_param->_nb_front_end; i++)
-      for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++)
-	ack [i][j] = false;
-    
-    std::list<select_t>::iterator it=select.begin();
+      {
+        previous_transaction [i] = true;
+        for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++)
+          ack [i][j] = false;
+      }
+
+    std::list<generic::priority::select_t> * select = _priority->select();
+    std::list<generic::priority::select_t>::iterator it=select->begin();
 
     for (uint32_t i=0; i<_param->_nb_inst_rename; i++)
       {
-	Tcontrol_t val = false;
+        log_printf(TRACE,Rename_select,FUNCTION,"  * inst_rename [%d]",i);
 
-	while ((it != select.end()) and (val == false))
+        // Scan all instruction until find
+	while ((it != select->end()) and (val [i] == false))
 	  {
-	    Tcontext_t x = it->_front_end ;
-	    uint32_t   y = it->_inst_decod;
+	    Tcontext_t x = it->grp;
+	    uint32_t   y = it->elt;
 
-	    // Test if this instruction is valid
-	    if (PORT_READ(in_RENAME_IN_VAL[x][y]) == 1)
+            log_printf(TRACE,Rename_select,FUNCTION,"    * front_end[%d].inst_decod[%d]",x,y);
+            log_printf(TRACE,Rename_select,FUNCTION,"      * rename_in_val        : %d",PORT_READ(in_RENAME_IN_VAL[x][y]));
+            log_printf(TRACE,Rename_select,FUNCTION,"      * previous_transaction : %d",previous_transaction[x]);
+
+	    // Test if this instruction is valid and if all previous instruction of this front end is an valid transaction
+	    if (previous_transaction [x] and
+                PORT_READ(in_RENAME_IN_VAL[x][y]))
 	      {
 		// Find !!!
-		val        = true;
+		val [i]    = true;
 		ack [x][y] = PORT_READ(in_RENAME_OUT_ACK [i]);
+
+                log_printf(TRACE,Rename_select,FUNCTION,"      * rename_out_ack       : %d",PORT_READ(in_RENAME_OUT_ACK[i]));
 
 		if (_param->_have_port_front_end_id)
@@ -55,4 +73,6 @@
 		PORT_WRITE(out_RENAME_OUT_TYPE         [i],PORT_READ(in_RENAME_IN_TYPE          [x][y]));
 		PORT_WRITE(out_RENAME_OUT_OPERATION    [i],PORT_READ(in_RENAME_IN_OPERATION     [x][y]));
+		PORT_WRITE(out_RENAME_OUT_NO_EXECUTE   [i],PORT_READ(in_RENAME_IN_NO_EXECUTE    [x][y]));
+		PORT_WRITE(out_RENAME_OUT_IS_DELAY_SLOT[i],PORT_READ(in_RENAME_IN_IS_DELAY_SLOT [x][y]));
 		PORT_WRITE(out_RENAME_OUT_ADDRESS      [i],PORT_READ(in_RENAME_IN_ADDRESS       [x][y]));
 		PORT_WRITE(out_RENAME_OUT_HAS_IMMEDIAT [i],PORT_READ(in_RENAME_IN_HAS_IMMEDIAT  [x][y]));
@@ -69,11 +89,17 @@
 		PORT_WRITE(out_RENAME_OUT_NUM_REG_RE   [i],PORT_READ(in_RENAME_IN_NUM_REG_RE    [x][y]));
 		PORT_WRITE(out_RENAME_OUT_EXCEPTION_USE[i],PORT_READ(in_RENAME_IN_EXCEPTION_USE [x][y]));
+		PORT_WRITE(out_RENAME_OUT_EXCEPTION    [i],PORT_READ(in_RENAME_IN_EXCEPTION     [x][y]));
 	      }
+
+            // ack = 1 if previous_transaction == true and rename_in_val == true and rename_out == true
+            previous_transaction [x] = ack [x][y];
 
 	    it ++;
 	  }
 
-	PORT_WRITE(out_RENAME_OUT_VAL [i], val);
       }
+
+    for (uint32_t i=0; i<_param->_nb_inst_rename; ++i)
+      PORT_WRITE(out_RENAME_OUT_VAL [i], val [i]);
 
     for (uint32_t i=0; i<_param->_nb_front_end; i++)
@@ -81,5 +107,5 @@
 	PORT_WRITE(out_RENAME_IN_ACK [i][j], ack [i][j]);
 
-    log_printf(FUNC,Rename_select,FUNCTION,"End");
+    log_end(Rename_select,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_transition.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_transition.cpp	(revision 88)
@@ -26,65 +26,9 @@
     if (PORT_READ(in_NRESET) == 0)
       {
-	select.clear();
-	reg_FRONT_END_PRIORITY = 0;
+	_priority->reset();
       }
     else
       {
-	switch (_param->_priority)
-	  {
-	  case PRIORITY_STATIC :
-	    {
-	      reg_FRONT_END_PRIORITY = (reg_FRONT_END_PRIORITY+_param->_nb_front_end_select)%_param->_nb_front_end;
-	      break;
-	    }
-	  case PRIORITY_ROUND_ROBIN :
-	    {
-	      reg_FRONT_END_PRIORITY = (reg_FRONT_END_PRIORITY+1)%_param->_nb_front_end;
-	      break;
-	    }
-	  default:
-	    {
-	      break;
-	    }
-	  }
-
-	// flush list
-	select.clear();
-	
-	// Compute next scan order !!!
-	switch (_param->_load_balancing)
-	  {
-	  case LOAD_BALANCING_BALANCE :
-	    {
-	      for (uint32_t j=0; j<_param->_max_nb_inst_decod; j++)
-		for (uint32_t i=0; i<_param->_nb_front_end_select; i++)
-		  {
-		    uint32_t x=(reg_FRONT_END_PRIORITY+i)%_param->_nb_front_end;
-		    
-		    // Test valid inst_decod
-		    if (j < _param->_nb_inst_decod[x])
-		      select.push_back(select_t(x,j));
-		  }
-		  
-	      break;
-	    }
-	  case LOAD_BALANCING_MAXIMUM_FOR_PRIORITY :
-	    {
-
-	      for (uint32_t i=0; i<_param->_nb_front_end_select; i++)
-		{
-		  uint32_t x=(reg_FRONT_END_PRIORITY+i)%_param->_nb_front_end;
-		  
-		  for (uint32_t j=0; j<_param->_nb_inst_decod[x]; j++)
-		    select.push_back(select_t(x,j));
-		}
-
-	      break;
-	    }
-	  default :
-	    {
-	      break;
-	    }
-	  }
+	_priority->transition();
 
 // #if (DEBUG >= DEBUG_TRACE)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libRename_unit_Glue.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/Makefile.deps	(revision 88)
@@ -0,0 +1,38 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Rename_unit_Glue			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Rename_unit_Glue_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue
+
+#-----[ Library ]------------------------------------------
+
+Rename_unit_Glue_LIBRARY		= 	-lRename_unit_Glue	\
+					$(Behavioural_LIBRARY)	
+
+Rename_unit_Glue_DIR_LIBRARY		=	-L$(Rename_unit_Glue_DIR)/lib	\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Rename_unit_Glue_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) --directory=$(Rename_unit_Glue_DIR) --makefile=Makefile;
+
+Rename_unit_Glue_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) --directory=$(Rename_unit_Glue_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Rename_unit_Glue_LIBRARY)
+
+DIR_LIBRARY			= $(Rename_unit_Glue_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Rename_unit_Glue_library
+
+library_clean			: Rename_unit_Glue_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/config-min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/config-min.cfg	(revision 88)
@@ -0,0 +1,7 @@
+Rename_unit_Glue
+1	1	+1	# nb_front_end          
+1	1	+1	# nb_context     [0] [nb_front_end]
+1	1	+1	# nb_inst_insert        
+1	1	+1	# nb_inst_retire        
+32	32	+1	# size_general_data
+2	2	+1	# size_special_register
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,31 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,94 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/include/test.h"
+
+#define NB_PARAMS 5
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_front_end                  (uint32_t)\n"));
+  err (_(" * nb_context     [nb_front_end] (uint32_t)\n"));
+  err (_(" * nb_inst_insert                (uint32_t)\n"));
+  err (_(" * nb_inst_retire                (uint32_t)\n"));
+  err (_(" * size_general_data             (uint32_t)\n"));
+  err (_(" * size_special_register         (uint32_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t    _nb_front_end   = fromString<uint32_t>(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_front_end))
+    usage (argc, argv);
+
+  uint32_t  * _nb_context     = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    _nb_context [i] = fromString<uint32_t>(argv[x++]);
+
+  
+  uint32_t    _nb_inst_insert        = fromString<uint32_t>(argv[x++]);
+  uint32_t    _nb_inst_retire        = fromString<uint32_t>(argv[x++]);
+  uint32_t    _size_general_data     = fromString<uint32_t>(argv[x++]);
+  uint32_t    _size_special_register = fromString<uint32_t>(argv[x++]);
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters
+	(
+	 _nb_front_end  ,
+	 _nb_context    ,
+	 _nb_inst_insert,
+	 _nb_inst_retire,
+	 _size_general_data,
+	 _size_special_register,
+         true //is_toplevel
+         );
+      
+      msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+  
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("Rename_unit_Glue : no error");
+      else
+	TEST_KO("Rename_unit_Glue : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  delete [] _nb_context;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,241 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Rename_unit_Glue * _Rename_unit_Glue = new Rename_unit_Glue 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+  
+//ALLOC1_SC_SIGNAL(out_INSERT_VAL                                     ,"out_INSERT_VAL                                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_ACK                                     ," in_INSERT_ACK                                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_FRONT_END_ID                            ,"out_INSERT_FRONT_END_ID                           ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_CONTEXT_ID                              ,"out_INSERT_CONTEXT_ID                             ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_TYPE                                    ,"out_INSERT_TYPE                                   ",Ttype_t           ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_OPERATION                               ,"out_INSERT_OPERATION                              ",Toperation_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_IMMEDIAT                                ,"out_INSERT_IMMEDIAT                               ",Tgeneral_data_t   ,_param->_nb_inst_insert);
+//   ALLOC1_SC_SIGNAL(out_INSERT_EXCEPTION_USE                           ,"out_INSERT_EXCEPTION_USE                          ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_EXCEPTION                               ,"out_INSERT_EXCEPTION                              ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                      ,"out_INSERT_NUM_REG_RE_PHY_NEW                     ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_VAL                       ," in_INSERT_RENAME_SELECT_VAL                      ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RENAME_SELECT_ACK                       ,"out_INSERT_RENAME_SELECT_ACK                      ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_FRONT_END_ID              ," in_INSERT_RENAME_SELECT_FRONT_END_ID             ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_CONTEXT_ID                ," in_INSERT_RENAME_SELECT_CONTEXT_ID               ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_TYPE                      ," in_INSERT_RENAME_SELECT_TYPE                     ",Ttype_t           ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_OPERATION                 ," in_INSERT_RENAME_SELECT_OPERATION                ",Toperation_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_IMMEDIAT                  ," in_INSERT_RENAME_SELECT_IMMEDIAT                 ",Tgeneral_data_t   ,_param->_nb_inst_insert);
+//   ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE             ," in_INSERT_RENAME_SELECT_EXCEPTION_USE            ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION                 ," in_INSERT_RENAME_SELECT_EXCEPTION                ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL                ,"out_INSERT_REGISTER_TRANSLATION_VAL               ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK                ," in_INSERT_REGISTER_TRANSLATION_ACK               ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID       ,"out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID      ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID         ,"out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID        ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW ," in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL            ,"out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL           ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK            ," in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK           ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID   ,"out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID  ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID     ,"out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID    ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE           ,"out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ",Ttype_t           ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION      ,"out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ",Toperation_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_RETIRE_VAL                                     ," in_RETIRE_VAL                                    ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_ACK                                     ,"out_RETIRE_ACK                                    ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL            ,"out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL           ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK            ," in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE           ,"out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE          ",Ttype_t           ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION      ,"out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION     ",Toperation_t      ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_REGISTER_TRANSLATION_VAL                ,"out_RETIRE_REGISTER_TRANSLATION_VAL               ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_REGISTER_TRANSLATION_ACK                ," in_RETIRE_REGISTER_TRANSLATION_ACK               ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC2_SC_SIGNAL( in_SPR_READ_SR                                    ," in_SPR_READ_SR                                   ",Tspr_t            ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Rename_unit_Glue.\n"),name.c_str());
+
+  (*(_Rename_unit_Glue->in_CLOCK))        (*(in_CLOCK));
+  (*(_Rename_unit_Glue->in_NRESET))       (*(in_NRESET));
+
+//INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_VAL                                    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_ACK                                    ,_param->_nb_inst_insert);
+  if (_param->_have_port_front_end_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_FRONT_END_ID                           ,_param->_nb_inst_insert);
+  if (_param->_have_port_context_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_CONTEXT_ID                             ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_TYPE                                   ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_OPERATION                              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_IMMEDIAT                               ,_param->_nb_inst_insert);
+//   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_EXCEPTION_USE                          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_EXCEPTION                              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_NUM_REG_RE_PHY_NEW                     ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_VAL                      ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_RENAME_SELECT_ACK                      ,_param->_nb_inst_insert);
+  if (_param->_have_port_front_end_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_FRONT_END_ID             ,_param->_nb_inst_insert);
+  if (_param->_have_port_context_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_CONTEXT_ID               ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_TYPE                     ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_OPERATION                ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_IMMEDIAT                 ,_param->_nb_inst_insert);
+//   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_EXCEPTION                ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_insert);
+  if (_param->_have_port_front_end_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID      ,_param->_nb_inst_insert);
+  if (_param->_have_port_context_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL           ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK           ,_param->_nb_inst_insert);
+  if (_param->_have_port_front_end_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID  ,_param->_nb_inst_insert);
+  if (_param->_have_port_context_id)							  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ,_param->_nb_inst_insert);
+											  
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_RETIRE_VAL                                    ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_RETIRE_ACK                                    ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL           ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE          ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION     ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_RETIRE_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_RETIRE_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_retire);
+											  
+  INSTANCE2_SC_SIGNAL(_Rename_unit_Glue, in_SPR_READ_SR                                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+//DELETE1_SC_SIGNAL(out_INSERT_VAL                                    ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL( in_INSERT_ACK                                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_FRONT_END_ID                           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_CONTEXT_ID                             ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_TYPE                                   ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_OPERATION                              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_IMMEDIAT                               ,_param->_nb_inst_insert);
+//   DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION_USE                          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION                              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                     ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_VAL                      ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RENAME_SELECT_ACK                      ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_FRONT_END_ID             ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_CONTEXT_ID               ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_TYPE                     ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_OPERATION                ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_IMMEDIAT                 ,_param->_nb_inst_insert);
+//   DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION                ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID      ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID  ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ,_param->_nb_inst_insert);
+								      
+  DELETE1_SC_SIGNAL( in_RETIRE_VAL                                    ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_ACK                                    ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL           ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK           ,_param->_nb_inst_retire);
+//DELETE1_SC_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE          ,_param->_nb_inst_retire);
+//DELETE1_SC_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION     ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_retire);
+								      
+  DELETE2_SC_SIGNAL( in_SPR_READ_SR                                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+#endif
+
+  delete _Rename_unit_Glue;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/Rename_unit_Glue.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/Rename_unit_Glue.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/Rename_unit_Glue.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Rename_unit_Glue}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h	(revision 88)
@@ -0,0 +1,71 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_unit_glue_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_unit_glue_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t    _nb_front_end          ;
+  public : uint32_t  * _nb_context            ;//[nb_front_end]
+  public : uint32_t    _nb_inst_insert        ;
+  public : uint32_t    _nb_inst_retire        ;
+//public : uint32_t    _size_general_data     ;
+//public : uint32_t    _size_special_register ;
+
+//public : uint32_t    _size_front_end_id     ;
+//public : uint32_t    _size_context_id       ;
+
+//public : bool        _have_port_front_end_id;
+//public : bool        _have_port_context_id  ;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t    nb_front_end         ,
+			uint32_t  * nb_context           ,
+//                      uint32_t    size_front_end_id    ,
+//                      uint32_t    size_context_id      ,
+			uint32_t    nb_inst_insert       ,
+			uint32_t    nb_inst_retire       ,
+			uint32_t    size_general_data    ,
+			uint32_t    size_special_register,
+                        bool        is_toplevel=false
+			);
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters & x);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h	(revision 88)
@@ -0,0 +1,184 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_unit_glue_Rename_unit_Glue_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_unit_glue_Rename_unit_Glue_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+  class Rename_unit_Glue 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_VAL                                    ;//[nb_inst_insert]
+//public    : SC_IN (Tcontrol_t        )   **  in_INSERT_ACK                                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_FRONT_END_ID                           ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_CONTEXT_ID                             ;//[nb_inst_insert]
+  public    : SC_OUT(Ttype_t           )   ** out_INSERT_TYPE                                   ;//[nb_inst_insert]
+  public    : SC_OUT(Toperation_t      )   ** out_INSERT_OPERATION                              ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_INSERT_IMMEDIAT                               ;//[nb_inst_insert]
+  public    : SC_OUT(Texception_t      )   ** out_INSERT_EXCEPTION_USE                          ;//[nb_inst_insert]
+  public    : SC_OUT(Texception_t      )   ** out_INSERT_EXCEPTION                              ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_PHY_NEW                     ;//[nb_inst_insert]
+											        
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_RENAME_SELECT_VAL                      ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_RENAME_SELECT_ACK                      ;//[nb_inst_insert]
+  public    : SC_IN (Tcontext_t        )   **  in_INSERT_RENAME_SELECT_FRONT_END_ID             ;//[nb_inst_insert]
+  public    : SC_IN (Tcontext_t        )   **  in_INSERT_RENAME_SELECT_CONTEXT_ID               ;//[nb_inst_insert]
+  public    : SC_IN (Ttype_t           )   **  in_INSERT_RENAME_SELECT_TYPE                     ;//[nb_inst_insert]
+  public    : SC_IN (Toperation_t      )   **  in_INSERT_RENAME_SELECT_OPERATION                ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_data_t   )   **  in_INSERT_RENAME_SELECT_IMMEDIAT                 ;//[nb_inst_insert]
+  public    : SC_IN (Texception_t      )   **  in_INSERT_RENAME_SELECT_EXCEPTION_USE            ;//[nb_inst_insert]
+  public    : SC_IN (Texception_t      )   **  in_INSERT_RENAME_SELECT_EXCEPTION                ;//[nb_inst_insert]
+											        
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_REGISTER_TRANSLATION_VAL               ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_REGISTER_TRANSLATION_ACK               ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID      ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID        ;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW;//[nb_inst_insert]
+
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL           ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK           ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID  ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID    ;//[nb_inst_insert]
+  public    : SC_OUT(Ttype_t           )   ** out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ;//[nb_inst_insert]
+  public    : SC_OUT(Toperation_t      )   ** out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ;//[nb_inst_insert]
+											        
+    // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~		        
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_VAL                                    ;//[nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_ACK                                    ;//[nb_inst_retire]
+											        
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL           ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK           ;//[nb_inst_retire]
+//public    : SC_OUT(Ttype_t           )   ** out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE          ;//[nb_inst_retire]
+//public    : SC_OUT(Toperation_t      )   ** out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION     ;//[nb_inst_retire]
+											        
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_REGISTER_TRANSLATION_VAL               ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_REGISTER_TRANSLATION_ACK               ;//[nb_inst_retire]
+											        
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~		        
+  public    : SC_IN (Tspr_t            )  ***  in_SPR_READ_SR                                   ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Rename_unit_Glue);
+#endif
+  public  :          Rename_unit_Glue              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Rename_unit_Glue             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  public  : void        transition                (void);
+//public  : void        genMoore                  (void);
+  public  : void        genMealy_insert_valack    (void);
+  public  : void        genMealy_retire_valack    (void);
+  public  : void        genMealy_insert           (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Types.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Types.h	(revision 88)
@@ -0,0 +1,31 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_unit_glue_Types_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_rename_unit_glue_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,90 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h"
+#include "Common/include/Max.h"
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::Parameters"
+  Parameters::Parameters (uint32_t    nb_front_end          ,
+			  uint32_t  * nb_context            ,
+//                        uint32_t    size_front_end_id     ,
+//                        uint32_t    size_context_id       ,
+			  uint32_t    nb_inst_insert        ,
+			  uint32_t    nb_inst_retire        ,
+			  uint32_t    size_general_data     ,
+			  uint32_t    size_special_register ,
+                          bool        is_toplevel
+                          )
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    _nb_front_end           = nb_front_end  ;
+    _nb_context             = nb_context    ;
+    _nb_inst_insert         = nb_inst_insert;
+    _nb_inst_retire         = nb_inst_retire;
+
+    test();
+
+    if (is_toplevel)
+      {
+        _size_general_data      = size_general_data    ;
+        _size_special_register  = size_special_register;
+        
+        _size_front_end_id      = log2(_nb_front_end);
+        _size_context_id        = log2(max<uint32_t>(_nb_context,_nb_front_end));
+        
+        _have_port_front_end_id = _size_front_end_id > 0;
+        _have_port_context_id   = _size_context_id   > 0;
+        
+        copy();
+      }
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Rename_unit_Glue::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Rename_unit_Glue,FUNCTION);
+//     test();
+//     log_end(Rename_unit_Glue,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::~Parameters"
+  Parameters::~Parameters (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::copy"
+  void Parameters::copy (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,44 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    Parameters_test test ("Rename_unit_Glue");
+
+//  if (_size_special_register < 2)
+//    test.error(("size_special_register must be >= 2.\n"));
+
+    log_end(Rename_unit_Glue,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,58 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    XML xml ("rename_unit_glue");
+
+    xml.balise_open("rename_unit_glue");
+//  xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end();
+    xml.balise_close();
+
+    log_end(Rename_unit_Glue,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters & x)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Rename_unit_Glue,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp	(revision 88)
@@ -0,0 +1,190 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::Rename_unit_Glue"
+  Rename_unit_Glue::Rename_unit_Glue 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_Rename_unit_Glue == true
+    log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
+    log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+// 	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str());
+
+// 	SC_METHOD (genMoore);
+// 	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+// # ifdef SYSTEMCASS_SPECIFIC
+// 	// List dependency information
+// # endif    
+
+	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Method - genMealy_insert_valack"),_name.c_str());
+
+	SC_METHOD (genMealy_insert_valack);
+	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+	
+	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	  sensitive 
+	  //<< (*(in_INSERT_ACK                          [i]))
+	    << (*(in_INSERT_RENAME_SELECT_VAL            [i]))
+	    << (*(in_INSERT_REGISTER_TRANSLATION_ACK     [i]))
+	    << (*(in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK [i]))
+	    ;
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Method - genMealy_retire_valack"),_name.c_str());
+
+	SC_METHOD (genMealy_retire_valack);
+	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	  sensitive 
+	    << (*(in_RETIRE_VAL                          [i]))
+	    << (*(in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK [i]))
+	    << (*(in_RETIRE_REGISTER_TRANSLATION_ACK     [i]))
+	    ;
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Method - genMealy_insert"),_name.c_str());
+
+	SC_METHOD (genMealy_insert);
+	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	  {
+	    if (_param->_have_port_front_end_id)
+	    sensitive << (*(in_INSERT_RENAME_SELECT_FRONT_END_ID              [i]));
+	    if (_param->_have_port_context_id)
+	    sensitive << (*(in_INSERT_RENAME_SELECT_CONTEXT_ID                [i]));
+	    sensitive << (*(in_INSERT_RENAME_SELECT_TYPE                      [i]))
+		      << (*(in_INSERT_RENAME_SELECT_OPERATION                 [i]))
+		      << (*(in_INSERT_RENAME_SELECT_IMMEDIAT                  [i]))
+// 		      << (*(in_INSERT_RENAME_SELECT_EXCEPTION_USE             [i]))
+		      << (*(in_INSERT_RENAME_SELECT_EXCEPTION                 [i]))
+		      << (*(in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW [i]));
+
+	  }
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	    sensitive << (*(in_SPR_READ_SR [i][j]));
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::~Rename_unit_Glue"
+  Rename_unit_Glue::~Rename_unit_Glue (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp	(revision 88)
@@ -0,0 +1,132 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::allocation"
+  void Rename_unit_Glue::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Rename_unit_Glue"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("insert",OUT,NORTH,_("Insert interface"),_param->_nb_inst_insert);
+
+//    ALLOC1_SIGNAL_OUT(out_INSERT_VAL                                    ,"VAL"                                    ,Tcontrol_t        ,1);
+//    ALLOC1_SIGNAL_IN ( in_INSERT_ACK                                    ,"ACK"                                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID                           ,"FRONT_END_ID"                           ,Tcontext_t        ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID                             ,"CONTEXT_ID"                             ,Tcontext_t        ,_param->_size_context_id);
+      ALLOC1_SIGNAL_OUT(out_INSERT_TYPE                                   ,"TYPE"                                   ,Ttype_t           ,_param->_size_type);
+      ALLOC1_SIGNAL_OUT(out_INSERT_OPERATION                              ,"OPERATION"                              ,Toperation_t      ,_param->_size_operation);
+      ALLOC1_SIGNAL_OUT(out_INSERT_IMMEDIAT                               ,"IMMEDIAT"                               ,Tgeneral_data_t   ,_param->_size_general_data);
+//       ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION_USE                          ,"EXCEPTION_USE"                          ,Texception_t      ,_param->_size_exception_use);
+      ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION                              ,"EXCEPTION"                              ,Texception_t      ,_param->_size_exception);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW                     ,"NUM_REG_RE_PHY_NEW"                     ,Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_VAL                      ,"RENAME_SELECT_VAL"                      ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_RENAME_SELECT_ACK                      ,"RENAME_SELECT_ACK"                      ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_FRONT_END_ID             ,"RENAME_SELECT_FRONT_END_ID"             ,Tcontext_t        ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_CONTEXT_ID               ,"RENAME_SELECT_CONTEXT_ID"               ,Tcontext_t        ,_param->_size_context_id);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_TYPE                     ,"RENAME_SELECT_TYPE"                     ,Ttype_t           ,_param->_size_type);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_OPERATION                ,"RENAME_SELECT_OPERATION"                ,Toperation_t      ,_param->_size_operation);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_IMMEDIAT                 ,"RENAME_SELECT_IMMEDIAT"                 ,Tgeneral_data_t   ,_param->_size_general_data);
+//       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,"RENAME_SELECT_EXCEPTION_USE"            ,Texception_t      ,_param->_size_exception_use);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION                ,"RENAME_SELECT_EXCEPTION"                ,Texception_t      ,_param->_size_exception);
+      ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_VAL               ,"REGISTER_TRANSLATION_VAL"               ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_ACK               ,"REGISTER_TRANSLATION_ACK"               ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID      ,"REGISTER_TRANSLATION_FRONT_END_ID"      ,Tcontext_t        ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID        ,"REGISTER_TRANSLATION_CONTEXT_ID"        ,Tcontext_t        ,_param->_size_context_id);
+      ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,"REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL           ,"LOAD_STORE_QUEUE_POINTER_VAL"           ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK           ,"LOAD_STORE_QUEUE_POINTER_ACK"           ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID  ,"LOAD_STORE_QUEUE_POINTER_FRONT_END_ID"  ,Tcontext_t        ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID    ,"LOAD_STORE_QUEUE_POINTER_CONTEXT_ID"    ,Tcontext_t        ,_param->_size_context_id);
+      ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ,"LOAD_STORE_QUEUE_POINTER_TYPE"          ,Ttype_t           ,_param->_size_type);
+      ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ,"LOAD_STORE_QUEUE_POINTER_OPERATION"     ,Toperation_t      ,_param->_size_operation);
+    }
+
+    // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("retire",OUT,NORTH,_("Retire interface"),_param->_nb_inst_retire);
+
+      ALLOC1_SIGNAL_IN ( in_RETIRE_VAL                                   ,"VAL"                                  ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_RETIRE_ACK                                   ,"ACK"                                  ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL          ,"LOAD_STORE_QUEUE_POINTER_VAL"         ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK          ,"LOAD_STORE_QUEUE_POINTER_ACK"         ,Tcontrol_t        ,1);
+//    ALLOC1_SIGNAL_OUT(out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE         ,"LOAD_STORE_QUEUE_POINTER_TYPE"        ,Ttype_t           ,_param->_size_type);
+//    ALLOC1_SIGNAL_OUT(out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION    ,"LOAD_STORE_QUEUE_POINTER_OPERATION"   ,Toperation_t      ,_param->_size_operation);
+      ALLOC1_SIGNAL_OUT(out_RETIRE_REGISTER_TRANSLATION_VAL              ,"REGISTER_TRANSLATION_VAL"             ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_IN ( in_RETIRE_REGISTER_TRANSLATION_ACK              ,"REGISTER_TRANSLATION_ACK"             ,Tcontrol_t        ,1);
+    }
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_read",IN ,NORTH,_("SPR read"),_param->_nb_front_end,_param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_SPR_READ_SR                                  ,"SR"                                   ,Tspr_t            ,_param->_size_spr,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+	_component->generate_file();
+#endif
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp	(revision 88)
@@ -0,0 +1,87 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::deallocation"
+  void Rename_unit_Glue::deallocation (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+//      DELETE1_SIGNAL(out_INSERT_VAL                                    ,_param->_nb_inst_insert,1);
+//      DELETE1_SIGNAL( in_INSERT_ACK                                    ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_FRONT_END_ID                           ,_param->_nb_inst_insert,_param->_size_front_end_id);
+        DELETE1_SIGNAL(out_INSERT_CONTEXT_ID                             ,_param->_nb_inst_insert,_param->_size_context_id);
+        DELETE1_SIGNAL(out_INSERT_TYPE                                   ,_param->_nb_inst_insert,_param->_size_type);
+        DELETE1_SIGNAL(out_INSERT_OPERATION                              ,_param->_nb_inst_insert,_param->_size_operation);
+        DELETE1_SIGNAL(out_INSERT_IMMEDIAT                               ,_param->_nb_inst_insert,_param->_size_general_data); 
+// 	DELETE1_SIGNAL(out_INSERT_EXCEPTION_USE                          ,_param->_nb_inst_insert,_param->_size_exception_use);
+        DELETE1_SIGNAL(out_INSERT_EXCEPTION                              ,_param->_nb_inst_insert,_param->_size_exception);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                     ,_param->_nb_inst_insert,_param->_size_special_register);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_VAL                      ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_RENAME_SELECT_ACK                      ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_FRONT_END_ID             ,_param->_nb_inst_insert,_param->_size_front_end_id);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_CONTEXT_ID               ,_param->_nb_inst_insert,_param->_size_context_id);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_TYPE                     ,_param->_nb_inst_insert,_param->_size_type);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_OPERATION                ,_param->_nb_inst_insert,_param->_size_operation);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_IMMEDIAT                 ,_param->_nb_inst_insert,_param->_size_general_data);
+//      DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,_param->_nb_inst_insert,_param->_size_exception_use);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION                ,_param->_nb_inst_insert,_param->_size_exception);
+        DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID      ,_param->_nb_inst_insert,_param->_size_front_end_id);
+        DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID        ,_param->_nb_inst_insert,_param->_size_context_id);
+        DELETE1_SIGNAL( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register);
+        DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL           ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK           ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID  ,_param->_nb_inst_insert,_param->_size_front_end_id);
+        DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID    ,_param->_nb_inst_insert,_param->_size_context_id);
+        DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ,_param->_nb_inst_insert,_param->_size_type);
+        DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ,_param->_nb_inst_insert,_param->_size_operation);
+									 
+        DELETE1_SIGNAL( in_RETIRE_VAL                                    ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_ACK                                    ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL           ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK           ,_param->_nb_inst_retire,1);
+//      DELETE1_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE          ,_param->_nb_inst_retire,_param->_size_type);
+//      DELETE1_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION     ,_param->_nb_inst_retire,_param->_size_operation);
+        DELETE1_SIGNAL(out_RETIRE_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_retire,1);
+									 
+        DELETE2_SIGNAL( in_SPR_READ_SR                                   ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr);
+      }
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    delete _component;
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_end_cycle.cpp	(revision 88)
@@ -0,0 +1,49 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::end_cycle"
+void Rename_unit_Glue::end_cycle ()
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp	(revision 88)
@@ -0,0 +1,118 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::genMealy_insert"
+  void Rename_unit_Glue::genMealy_insert (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    log_function(Rename_unit_Glue,FUNCTION,_name.c_str());
+
+    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+      {
+	
+	Tcontext_t         FRONT_END_ID       = (_param->_have_port_front_end_id)?PORT_READ(in_INSERT_RENAME_SELECT_FRONT_END_ID [i]):0;
+	Tcontext_t         CONTEXT_ID         = (_param->_have_port_context_id  )?PORT_READ(in_INSERT_RENAME_SELECT_CONTEXT_ID   [i]):0;
+	Ttype_t            TYPE               = PORT_READ(in_INSERT_RENAME_SELECT_TYPE                      [i]);
+	Toperation_t       OPERATION          = PORT_READ(in_INSERT_RENAME_SELECT_OPERATION                 [i]);
+	Tgeneral_data_t    IMMEDIAT           = PORT_READ(in_INSERT_RENAME_SELECT_IMMEDIAT                  [i]);
+// 	Texception_t       EXCEPTION_USE      = PORT_READ(in_INSERT_RENAME_SELECT_EXCEPTION_USE             [i]);
+	Texception_t       EXCEPTION          = PORT_READ(in_INSERT_RENAME_SELECT_EXCEPTION                 [i]);
+	Tspecial_address_t NUM_REG_RE_PHY_NEW = PORT_READ(in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW [i]);
+	Tspr_t             SR                 = PORT_READ(in_SPR_READ_SR[FRONT_END_ID][CONTEXT_ID]);
+
+	switch (TYPE)
+	  {
+	  case TYPE_SPECIAL :
+	    {
+	      switch (OPERATION)
+		{
+		case OPERATION_SPECIAL_L_TRAP  :
+		  {
+#ifdef DEBUG_TEST
+		    if (IMMEDIAT > 32)
+		      throw ERRORMORPHEO(FUNCTION,_("Immediat is too high.\n"));
+#endif
+		    
+		    // Test if bit is set
+		    if ((SR>>IMMEDIAT)&1)
+		      EXCEPTION = EXCEPTION_TRAP;
+
+		    // Test 
+		    break;
+		  }
+		case OPERATION_SPECIAL_L_MFSPR :
+		case OPERATION_SPECIAL_L_MTSPR :
+		  {
+		    // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
+		    NUM_REG_RE_PHY_NEW = (
+					  ((SR >> 16)&1) | // SUMRA
+					  ((SR >>  0)&1)   // SM
+					  );
+
+		    break;
+		  }
+		default :
+		  {
+		    break;
+		  }
+		}
+	      break;
+	    }
+	  default :
+	    {
+	      break;
+	    }
+	  }
+
+	
+	if (_param->_have_port_front_end_id)
+	  {
+	PORT_WRITE(out_INSERT_FRONT_END_ID                          [i],FRONT_END_ID      );
+	PORT_WRITE(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID     [i],FRONT_END_ID      );
+	PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID [i],FRONT_END_ID      );
+	  }
+	if (_param->_have_port_context_id)
+	  {
+	PORT_WRITE(out_INSERT_CONTEXT_ID                            [i],CONTEXT_ID        );
+	PORT_WRITE(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID       [i],CONTEXT_ID        );
+	PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID   [i],CONTEXT_ID        );
+	  }
+	PORT_WRITE(out_INSERT_TYPE                                  [i],TYPE              );
+	PORT_WRITE(out_INSERT_OPERATION                             [i],OPERATION         );
+	PORT_WRITE(out_INSERT_IMMEDIAT                              [i],IMMEDIAT          );
+// 	PORT_WRITE(out_INSERT_EXCEPTION_USE                         [i],EXCEPTION_USE     );
+	PORT_WRITE(out_INSERT_EXCEPTION                             [i],EXCEPTION         );
+	PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_NEW                    [i],NUM_REG_RE_PHY_NEW);
+	PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE         [i],TYPE              );
+	PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION    [i],OPERATION         );
+      }
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp	(revision 88)
@@ -0,0 +1,85 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::genMealy_insert_valack"
+  void Rename_unit_Glue::genMealy_insert_valack (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    log_function(Rename_unit_Glue,FUNCTION,_name.c_str());
+
+//     // Transaction must be in-order
+//     Tcontrol_t previous_transaction = true;
+    
+    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+      {
+      //Tcontrol_t ACK                          = PORT_READ(in_INSERT_ACK                          [i]);
+	Tcontrol_t RENAME_SELECT_VAL            = PORT_READ(in_INSERT_RENAME_SELECT_VAL            [i]);
+	Tcontrol_t REGISTER_TRANSLATION_ACK     = PORT_READ(in_INSERT_REGISTER_TRANSLATION_ACK     [i]);
+	Tcontrol_t LOAD_STORE_QUEUE_POINTER_ACK = PORT_READ(in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK [i]);
+
+// 	Tcontrol_t VAL                          = (
+// 						   previous_transaction         and
+// 						   RENAME_SELECT_VAL            and
+// 						   REGISTER_TRANSLATION_ACK     and
+// 						   LOAD_STORE_QUEUE_POINTER_ACK );
+	Tcontrol_t RENAME_SELECT_ACK            = (
+//                                                 previous_transaction         and
+// 						   ACK                          and
+						   REGISTER_TRANSLATION_ACK     and
+						   LOAD_STORE_QUEUE_POINTER_ACK );
+	Tcontrol_t REGISTER_TRANSLATION_VAL     = (
+//                                                 previous_transaction         and
+// 						   ACK                          and
+						   RENAME_SELECT_VAL            and
+						   LOAD_STORE_QUEUE_POINTER_ACK );
+	Tcontrol_t LOAD_STORE_QUEUE_POINTER_VAL = (
+//                                                 previous_transaction         and
+// 						   ACK                          and
+						   RENAME_SELECT_VAL            and
+						   REGISTER_TRANSLATION_ACK     );
+
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"  * insert [%d]",i);
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * rename_select_val            (r) : %d",RENAME_SELECT_VAL           );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * rename_select_ack            (w) : %d",RENAME_SELECT_ACK           );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * register_translation_val     (w) : %d",REGISTER_TRANSLATION_VAL    );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * register_translation_ack     (r) : %d",REGISTER_TRANSLATION_ACK    );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * load_store_queue_pointer_val (w) : %d",LOAD_STORE_QUEUE_POINTER_VAL);
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * load_store_queue_pointer_ack (r) : %d",LOAD_STORE_QUEUE_POINTER_ACK);
+	
+// 	PORT_WRITE(out_INSERT_VAL                          [i], VAL                         );
+	PORT_WRITE(out_INSERT_RENAME_SELECT_ACK            [i], RENAME_SELECT_ACK           );
+	PORT_WRITE(out_INSERT_REGISTER_TRANSLATION_VAL     [i], REGISTER_TRANSLATION_VAL    );
+	PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL [i], LOAD_STORE_QUEUE_POINTER_VAL);
+
+// 	previous_transaction = RENAME_SELECT_VAL and RENAME_SELECT_ACK;
+      }
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_retire_valack.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_retire_valack.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_retire_valack.cpp	(revision 88)
@@ -0,0 +1,64 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::genMealy_retire_valack"
+  void Rename_unit_Glue::genMealy_retire_valack (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    log_function(Rename_unit_Glue,FUNCTION,_name.c_str());
+
+    // Transaction must be in-order
+    Tcontrol_t previous_transaction = true;
+    
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+	Tcontrol_t VAL                          = PORT_READ(in_RETIRE_VAL                          [i]);
+	Tcontrol_t LOAD_STORE_QUEUE_POINTER_ACK = PORT_READ(in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK [i]);
+	Tcontrol_t REGISTER_TRANSLATION_ACK     = PORT_READ(in_RETIRE_REGISTER_TRANSLATION_ACK     [i]);
+
+	Tcontrol_t ACK                          = (previous_transaction         and
+						   LOAD_STORE_QUEUE_POINTER_ACK and
+						   REGISTER_TRANSLATION_ACK     );
+	Tcontrol_t LOAD_STORE_QUEUE_POINTER_VAL = (previous_transaction         and
+						   VAL                          and
+						   REGISTER_TRANSLATION_ACK     );
+	Tcontrol_t REGISTER_TRANSLATION_VAL     = (previous_transaction         and
+						   VAL                          and
+						   LOAD_STORE_QUEUE_POINTER_ACK );
+	
+	PORT_WRITE(out_RETIRE_ACK                          [i], ACK                         );
+	PORT_WRITE(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL [i], LOAD_STORE_QUEUE_POINTER_VAL);
+	PORT_WRITE(out_RETIRE_REGISTER_TRANSLATION_VAL     [i], REGISTER_TRANSLATION_VAL    );
+
+	previous_transaction = VAL and ACK;
+      }
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,41 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::statistics_allocation"
+  void Rename_unit_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Rename_unit_Glue",
+		      param_statistics);
+    
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,41 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::statistics_deallocation"
+  void Rename_unit_Glue::statistics_deallocation (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete _stat;
+    
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_transition.cpp	(revision 88)
@@ -0,0 +1,41 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::transition"
+  void Rename_unit_Glue::transition (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl.cpp	(revision 88)
@@ -0,0 +1,50 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::vhdl"
+  void Rename_unit_Glue::vhdl (void)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl_body.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl_body.cpp	(revision 88)
@@ -0,0 +1,37 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::vhdl_body"
+  void Rename_unit_Glue::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    vhdl->set_body ("");
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl_declaration.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_vhdl_declaration.cpp	(revision 88)
@@ -0,0 +1,36 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace rename_unit_glue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit_Glue::vhdl_declaration"
+  void Rename_unit_Glue::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(Rename_unit_Glue,FUNCTION);
+    log_end(Rename_unit_Glue,FUNCTION);
+  };
+
+}; // end namespace rename_unit_glue
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Rename_unit_LIBRARY)
+
+DIR_LIBRARY			= $(Rename_unit_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Rename_unit_library
+
+library_clean			: Rename_unit_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg	(revision 88)
@@ -0,0 +1,20 @@
+Rename_unit
+1	1	+1	# nb_front_end                     
+1	1	+1	# nb_context                       [0]    [nb_front_end]
+1	1	+1	# nb_inst_decod                    [0]    [nb_front_end]
+1	1	+1	# nb_inst_insert                   
+1	1	+1	# nb_inst_retire                   
+1	1	+1	# nb_load_store_queue              
+2	2	+1	# size_store_queue                 [0]    [nb_load_store_queue]
+1	1	+1	# size_load_queue                  [0]    [nb_load_store_queue]
+0	0	+1	# link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
+1	1	+1	# rename_select_priority           
+1	1	+1	# rename_select_load_balancing     
+1	1	+1	# rename_select_nb_front_end_select
+1 	1	+1	# max_branch_speculated            
+32	32	+1	# size_general_data                
+64	64	+1	# nb_general_register              
+4	4	+1	# nb_special_register              
+1	1	+1	# nb_reg_free                      
+1	1	+1	# nb_bank                          
+1	1	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg	(revision 88)
@@ -0,0 +1,20 @@
+Rename_unit
+1	1	+1	# nb_front_end                     
+1	1	+1	# nb_context                       [0]    [nb_front_end]
+4	4	+1	# nb_inst_decod                    [0]    [nb_front_end]
+4	4	+1	# nb_inst_insert                   
+4	4	+1	# nb_inst_retire                   
+1	1	+1	# nb_load_store_queue              
+8	8	+1	# size_store_queue                 [0]    [nb_load_store_queue]
+8	8	+1	# size_load_queue                  [0]    [nb_load_store_queue]
+0	0	+1	# link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
+1	1	+1	# rename_select_priority           
+1	1	+1	# rename_select_load_balancing     
+1	1	+1	# rename_select_nb_front_end_select
+4 	4	+1	# max_branch_speculated            
+32	32	+1	# size_general_data                
+64	64	+1	# nb_general_register              
+8	8	+1	# nb_special_register              
+2	2	+1	# nb_reg_free                      
+4	8	*2	# nb_bank                          
+4	4	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg	(revision 88)
@@ -0,0 +1,23 @@
+Rename_unit
+1	1	+1	# nb_front_end                     
+4	4	+1	# nb_context                       [0]    [nb_front_end]
+4	4	+1	# nb_inst_decod                    [0]    [nb_front_end]
+4	4	+1	# nb_inst_insert                   
+4	4	+1	# nb_inst_retire                   
+1	1	+1	# nb_load_store_queue              
+8	8	+1	# size_store_queue                 [0]    [nb_load_store_queue]
+8	8	+1	# size_load_queue                  [0]    [nb_load_store_queue]
+0	0	+1	# link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
+0	0	+1	# link_load_store_unit_with_thread [0][1] [nb_front_end][nb_context]
+0	0	+1	# link_load_store_unit_with_thread [0][2] [nb_front_end][nb_context]
+0	0	+1	# link_load_store_unit_with_thread [0][3] [nb_front_end][nb_context]
+1	1	+1	# rename_select_priority           
+1	1	+1	# rename_select_load_balancing     
+1	1	+1	# rename_select_nb_front_end_select
+4 	4	+1	# max_branch_speculated            
+32	32      +1	# size_general_data                
+256	256     +1	# nb_general_register              
+16	16	+1	# nb_special_register              
+2	2	+1	# nb_reg_free                      
+8	8	*2	# nb_bank                          
+4	4	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg	(revision 88)
@@ -0,0 +1,25 @@
+Rename_unit
+1	1	+1	# nb_front_end                     
+4	4	+1	# nb_context                       [0]    [nb_front_end]
+4	4	+1	# nb_inst_decod                    [0]    [nb_front_end]
+4	4	+1	# nb_inst_insert                   
+4	4	+1	# nb_inst_retire                   
+2	2	+1	# nb_load_store_queue              
+8	8	+1	# size_store_queue                 [0]    [nb_load_store_queue]
+4	4	+1	# size_store_queue                 [1]    [nb_load_store_queue]
+8	8	+1	# size_load_queue                  [0]    [nb_load_store_queue]
+4	4	+1	# size_load_queue                  [1]    [nb_load_store_queue]
+0	0	+1	# link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
+1	1	+1	# link_load_store_unit_with_thread [0][1] [nb_front_end][nb_context]
+1	1	+1	# link_load_store_unit_with_thread [0][2] [nb_front_end][nb_context]
+0	0	+1	# link_load_store_unit_with_thread [0][3] [nb_front_end][nb_context]
+1	1	+1	# rename_select_priority           
+1	1	+1	# rename_select_load_balancing     
+1	1	+1	# rename_select_nb_front_end_select
+4 	4	+1	# max_branch_speculated            
+32	32      +1	# size_general_data                
+256	256     +1	# nb_general_register              
+16	16	+1	# nb_special_register              
+2	2	+1	# nb_reg_free                      
+8	8	*2	# nb_bank                          
+4	4	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,34 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+
+#include <string>
+#include <iostream>
+#include <sys/time.h>
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,162 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/include/test.h"
+
+#define NB_PARAMS 14
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_front_end                                                 (uint32_t         )\n"));
+  err (_(" * nb_context                        [nb_front_end]             (uint32_t         )\n"));
+  err (_(" * nb_inst_decod                     [nb_front_end]             (uint32_t         )\n"));
+  err (_(" * nb_inst_insert                                               (uint32_t         )\n"));
+  err (_(" * nb_inst_retire                                               (uint32_t         )\n"));
+  err (_(" * nb_load_store_queue                                          (uint32_t         )\n"));
+  err (_(" * size_store_queue                  [nb_load_store_queue]      (uint32_t         )\n"));
+  err (_(" * size_load_queue                   [nb_load_store_queue]      (uint32_t         )\n"));
+  err (_(" * link_load_store_unit_with_thread  [nb_front_end][nb_context] (uint32_t         )\n"));
+  err (_(" * rename_select_priority                                       (Tpriority_t      )\n"));
+  err (_(" * rename_select_load_balancing                                 (Tload_balancing_t)\n"));
+  err (_(" * rename_select_nb_front_end_select                            (uint32_t         )\n"));
+  err (_(" * max_branch_speculated                                        (uint32_t         )\n"));
+  err (_(" * size_general_data                                            (uint32_t         )\n"));
+  err (_(" * nb_general_register                                          (uint32_t         )\n"));
+  err (_(" * nb_special_register                                          (uint32_t         )\n"));
+  err (_(" * nb_reg_free                                                  (uint32_t         )\n"));
+  err (_(" * nb_bank                                                      (uint32_t         )\n"));
+  err (_(" * size_read_counter                                            (uint32_t         )\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t             _nb_front_end                      = fromString<uint32_t         >(argv[x++]);
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+2*_nb_front_end))
+    usage (argc, argv);
+
+  uint32_t             _sum_nb_context = 0;
+
+  uint32_t           * _nb_context    = new uint32_t [_nb_front_end];
+  uint32_t           * _nb_inst_decod = new uint32_t [_nb_front_end];
+  
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _nb_context [i] = fromString<uint32_t>(argv[x++]);
+      _sum_nb_context += _nb_context [i];
+    }
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    _nb_inst_decod [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t             _nb_inst_insert                    = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _nb_inst_retire                    = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _nb_load_store_queue               = fromString<uint32_t         >(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_front_end+2*_nb_load_store_queue+_sum_nb_context))
+    usage (argc, argv);
+
+  uint32_t           * _size_store_queue                  = new uint32_t [_nb_load_store_queue];
+  uint32_t           * _size_load_queue                   = new uint32_t [_nb_load_store_queue];
+
+  for (uint32_t i=0; i<_nb_load_store_queue; i++)
+    _size_store_queue [i] = fromString<uint32_t>(argv[x++]);
+  for (uint32_t i=0; i<_nb_load_store_queue; i++)
+    _size_load_queue  [i] = fromString<uint32_t>(argv[x++]);
+
+  uint32_t          ** _link_load_store_unit_with_thread  = new uint32_t * [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _link_load_store_unit_with_thread [i] = new uint32_t [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+	_link_load_store_unit_with_thread  [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+
+  Tpriority_t          _rename_select_priority            = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t    _rename_select_load_balancing      = fromString<Tload_balancing_t>(argv[x++]);
+  uint32_t             _rename_select_nb_front_end_select = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _max_branch_speculated             = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _size_general_data                 = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _nb_general_register               = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _nb_special_register               = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _nb_reg_free                       = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _nb_bank                           = fromString<uint32_t         >(argv[x++]);
+  uint32_t             _size_read_counter                 = fromString<uint32_t         >(argv[x++]);
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters
+	(_nb_front_end                     ,
+	 _nb_context                       ,
+	 _nb_inst_decod                    ,
+	 _nb_inst_insert                   ,
+	 _nb_inst_retire                   ,
+	 _nb_load_store_queue              ,
+	 _size_store_queue                 ,
+	 _size_load_queue                  ,
+	 _link_load_store_unit_with_thread ,
+	 _rename_select_priority           ,
+	 _rename_select_load_balancing     ,
+	 _rename_select_nb_front_end_select,
+	 _max_branch_speculated            ,
+	 _size_general_data                ,
+	 _nb_general_register              ,
+	 _nb_special_register              ,
+	 _nb_reg_free                      ,
+	 _nb_bank                          ,
+	 _size_read_counter                ,
+         true //is_toplevel
+         );
+      
+      msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("Rename_unit : no error");
+      else
+	TEST_KO("Rename_unit : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    delete [] _link_load_store_unit_with_thread [i];
+  delete [] _link_load_store_unit_with_thread;
+
+  delete [] _nb_inst_decod   ;
+  delete [] _size_store_queue;
+  delete [] _size_load_queue ;
+  delete [] _nb_context      ;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,378 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Rename_unit * _Rename_unit = new Rename_unit 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_VAL               ," in_RENAME_IN_VAL               ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL(out_RENAME_IN_ACK               ,"out_RENAME_IN_ACK               ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID      ," in_RENAME_IN_FRONT_END_ID      ",Tcontext_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID        ," in_RENAME_IN_CONTEXT_ID        ",Tcontext_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_DEPTH             ," in_RENAME_IN_DEPTH             ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_TYPE              ," in_RENAME_IN_TYPE              ",Ttype_t           ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_OPERATION         ," in_RENAME_IN_OPERATION         ",Toperation_t      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE        ," in_RENAME_IN_NO_EXECUTE        ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ," in_RENAME_IN_IS_DELAY_SLOT     ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS           ," in_RENAME_IN_ADDRESS           ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ," in_RENAME_IN_HAS_IMMEDIAT      ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT          ," in_RENAME_IN_IMMEDIAT          ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RA           ," in_RENAME_IN_READ_RA           ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA        ," in_RENAME_IN_NUM_REG_RA        ",Tgeneral_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RB           ," in_RENAME_IN_READ_RB           ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB        ," in_RENAME_IN_NUM_REG_RB        ",Tgeneral_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_READ_RC           ," in_RENAME_IN_READ_RC           ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC        ," in_RENAME_IN_NUM_REG_RC        ",Tspecial_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RD          ," in_RENAME_IN_WRITE_RD          ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD        ," in_RENAME_IN_NUM_REG_RD        ",Tgeneral_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_WRITE_RE          ," in_RENAME_IN_WRITE_RE          ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE        ," in_RENAME_IN_NUM_REG_RE        ",Tspecial_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_EXCEPTION_USE     ," in_RENAME_IN_EXCEPTION_USE     ",Texception_t      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_EXCEPTION         ," in_RENAME_IN_EXCEPTION         ",Texception_t      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC1_SC_SIGNAL(out_INSERT_VAL                  ,"out_INSERT_VAL                  ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_ACK                  ," in_INSERT_ACK                  ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_FRONT_END_ID         ,"out_INSERT_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_CONTEXT_ID           ,"out_INSERT_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_DEPTH                ,"out_INSERT_DEPTH                ",Tdepth_t          ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_TYPE                 ,"out_INSERT_TYPE                 ",Ttype_t           ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_OPERATION            ,"out_INSERT_OPERATION            ",Toperation_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NO_EXECUTE           ,"out_INSERT_NO_EXECUTE           ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,"out_INSERT_IS_DELAY_SLOT        ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS              ,"out_INSERT_ADDRESS              ",Tgeneral_data_t   ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,"out_INSERT_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_IMMEDIAT             ,"out_INSERT_IMMEDIAT             ",Tgeneral_data_t   ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,"out_INSERT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_READ_RA              ,"out_INSERT_READ_RA              ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RA_LOG       ,"out_INSERT_NUM_REG_RA_LOG       ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RA_PHY       ,"out_INSERT_NUM_REG_RA_PHY       ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_READ_RB              ,"out_INSERT_READ_RB              ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RB_LOG       ,"out_INSERT_NUM_REG_RB_LOG       ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RB_PHY       ,"out_INSERT_NUM_REG_RB_PHY       ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_READ_RC              ,"out_INSERT_READ_RC              ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RC_LOG       ,"out_INSERT_NUM_REG_RC_LOG       ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RC_PHY       ,"out_INSERT_NUM_REG_RC_PHY       ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_WRITE_RD             ,"out_INSERT_WRITE_RD             ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_LOG       ,"out_INSERT_NUM_REG_RD_LOG       ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD   ,"out_INSERT_NUM_REG_RD_PHY_OLD   ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW   ,"out_INSERT_NUM_REG_RD_PHY_NEW   ",Tgeneral_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_WRITE_RE             ,"out_INSERT_WRITE_RE             ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_LOG       ,"out_INSERT_NUM_REG_RE_LOG       ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD   ,"out_INSERT_NUM_REG_RE_PHY_OLD   ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW   ,"out_INSERT_NUM_REG_RE_PHY_NEW   ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_EXCEPTION_USE        ,"out_INSERT_EXCEPTION_USE        ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_EXCEPTION            ,"out_INSERT_EXCEPTION            ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_RETIRE_VAL                  ," in_RETIRE_VAL                  ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_ACK                  ,"out_RETIRE_ACK                  ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID         ," in_RETIRE_FRONT_END_ID         ",Tcontext_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID           ," in_RETIRE_CONTEXT_ID           ",Tcontext_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t           ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t      ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ," in_RETIRE_USE_STORE_QUEUE      ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ," in_RETIRE_USE_LOAD_QUEUE       ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE," in_RETIRE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ," in_RETIRE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_EVENT_STATE          ," in_RETIRE_EVENT_STATE          ",Tevent_state_t    ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA              ," in_RETIRE_READ_RA              ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY       ," in_RETIRE_NUM_REG_RA_PHY       ",Tgeneral_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB              ," in_RETIRE_READ_RB              ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY       ," in_RETIRE_NUM_REG_RB_PHY       ",Tgeneral_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC              ," in_RETIRE_READ_RC              ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY       ," in_RETIRE_NUM_REG_RC_PHY       ",Tspecial_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD             ," in_RETIRE_WRITE_RD             ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_LOG       ," in_RETIRE_NUM_REG_RD_LOG       ",Tgeneral_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD   ," in_RETIRE_NUM_REG_RD_PHY_OLD   ",Tgeneral_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW   ," in_RETIRE_NUM_REG_RD_PHY_NEW   ",Tgeneral_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE             ," in_RETIRE_WRITE_RE             ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_LOG       ," in_RETIRE_NUM_REG_RE_LOG       ",Tspecial_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD   ," in_RETIRE_NUM_REG_RE_PHY_OLD   ",Tspecial_address_t,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW   ," in_RETIRE_NUM_REG_RE_PHY_NEW   ",Tspecial_address_t,_param->_nb_inst_retire);
+  ALLOC2_SC_SIGNAL( in_SPR_READ_SR                 ," in_SPR_READ_SR                 ",Tspr_t            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Rename_unit.\n"),name.c_str());
+
+  (*(_Rename_unit->in_CLOCK))        (*(in_CLOCK));
+  (*(_Rename_unit->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_VAL               ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit,out_RENAME_IN_ACK               ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_FRONT_END_ID      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_CONTEXT_ID        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  if (_param->_have_port_depth)
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_DEPTH             ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_TYPE              ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_OPERATION         ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_IMMEDIAT          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_READ_RA           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NUM_REG_RA        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_READ_RB           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NUM_REG_RB        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_READ_RC           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NUM_REG_RC        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_WRITE_RD          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NUM_REG_RD        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_WRITE_RE          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NUM_REG_RE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_EXCEPTION_USE     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_EXCEPTION         ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_VAL                  ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_INSERT_ACK                  ,_param->_nb_inst_insert);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_FRONT_END_ID         ,_param->_nb_inst_insert);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_CONTEXT_ID           ,_param->_nb_inst_insert);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_DEPTH                ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_TYPE                 ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_OPERATION            ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_ADDRESS              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IMMEDIAT             ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_EXCEPTION_USE        ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_EXCEPTION            ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_READ_RA              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RA_LOG       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RA_PHY       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_READ_RB              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RB_LOG       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RB_PHY       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_READ_RC              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RC_LOG       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RC_PHY       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_WRITE_RD             ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RD_LOG       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RD_PHY_OLD   ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RD_PHY_NEW   ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_WRITE_RE             ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RE_LOG       ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RE_PHY_OLD   ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NUM_REG_RE_PHY_NEW   ,_param->_nb_inst_insert);
+
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_VAL                  ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_RETIRE_ACK                  ,_param->_nb_inst_retire);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_FRONT_END_ID         ,_param->_nb_inst_retire);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_CONTEXT_ID           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_TYPE                 ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_OPERATION            ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_USE_STORE_QUEUE      ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_USE_LOAD_QUEUE       ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_EVENT_STATE          ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_READ_RA              ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RA_PHY       ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_READ_RB              ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RB_PHY       ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_READ_RC              ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RC_PHY       ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_WRITE_RD             ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RD_LOG       ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RD_PHY_OLD   ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RD_PHY_NEW   ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_WRITE_RE             ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RE_LOG       ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RE_PHY_OLD   ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Rename_unit, in_RETIRE_NUM_REG_RE_PHY_NEW   ,_param->_nb_inst_retire);
+
+  INSTANCE2_SC_SIGNAL(_Rename_unit,in_SPR_READ_SR                  ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_RENAME_IN_VAL               ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL(out_RENAME_IN_ACK               ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_FRONT_END_ID      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_CONTEXT_ID        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_DEPTH             ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_TYPE              ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_OPERATION         ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_READ_RA           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RA        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_READ_RB           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RB        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_READ_RC           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RC        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_WRITE_RD          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RD        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_WRITE_RE          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_NUM_REG_RE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_EXCEPTION_USE     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_EXCEPTION         ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  
+  DELETE1_SC_SIGNAL(out_INSERT_VAL                  ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_ACK                  ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_FRONT_END_ID         ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_CONTEXT_ID           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_DEPTH                ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_TYPE                 ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_OPERATION            ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_ADDRESS              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_IMMEDIAT             ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION_USE        ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION            ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_READ_RA              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RA_LOG       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RA_PHY       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_READ_RB              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RB_LOG       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RB_PHY       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_READ_RC              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RC_LOG       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RC_PHY       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_WRITE_RD             ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RD_LOG       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD   ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW   ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_WRITE_RE             ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_LOG       ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD   ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW   ,_param->_nb_inst_insert);
+  
+  DELETE1_SC_SIGNAL( in_RETIRE_VAL                  ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL(out_RETIRE_ACK                  ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_FRONT_END_ID         ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_CONTEXT_ID           ,_param->_nb_inst_retire);
+//DELETE1_SC_SIGNAL( in_RETIRE_TYPE                 ,_param->_nb_inst_retire);
+//DELETE1_SC_SIGNAL( in_RETIRE_OPERATION            ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_READ_RA              ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY       ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_READ_RB              ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY       ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_READ_RC              ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY       ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_WRITE_RD             ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_LOG       ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD   ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW   ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_WRITE_RE             ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_LOG       ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD   ,_param->_nb_inst_retire);
+  DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW   ,_param->_nb_inst_retire);
+  
+  DELETE2_SC_SIGNAL(in_SPR_READ_SR                  ,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+#endif
+
+  delete _Rename_unit;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/Rename_unit.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/Rename_unit.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/Rename_unit.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Rename_unit}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h	(revision 88)
@@ -0,0 +1,110 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t             _nb_front_end                     ;
+  public : uint32_t           * _nb_context                       ;//[nb_front_end]
+  public : uint32_t           * _nb_inst_decod                    ;//[nb_front_end]
+  public : uint32_t             _nb_inst_insert                   ;
+  public : uint32_t             _nb_inst_retire                   ;
+  public : uint32_t             _nb_load_store_queue              ;
+  public : uint32_t           * _size_store_queue                 ;//[nb_load_store_queue]
+  public : uint32_t           * _size_load_queue                  ;//[nb_load_store_queue]
+  public : uint32_t          ** _link_load_store_unit_with_thread ;//[nb_front_end][nb_context]
+  public : Tpriority_t          _rename_select_priority           ;
+  public : Tload_balancing_t    _rename_select_load_balancing     ;
+  public : uint32_t             _rename_select_nb_front_end_select;
+  public : uint32_t             _max_branch_speculated            ;
+//public : uint32_t             _size_general_data                ;
+  public : uint32_t             _nb_general_register              ;
+  public : uint32_t             _nb_special_register              ;
+  public : uint32_t             _nb_reg_free                      ;
+  public : uint32_t             _nb_bank                          ;
+  public : uint32_t             _size_read_counter                ;
+								  
+//public : uint32_t             _size_front_end_id                ;
+//public : uint32_t             _size_context_id                  ;    
+//public : uint32_t             _size_store_queue_ptr             ;
+//public : uint32_t             _size_load_queue_ptr              ;
+//public : uint32_t             _size_general_register            ;
+//public : uint32_t             _size_special_register            ;
+//public : uint32_t             _size_depth                       ;
+
+//public : uint32_t             _have_port_front_end_id           ;
+//public : uint32_t             _have_port_context_id             ;
+//public : uint32_t             _have_port_load_queue_ptr         ;
+//public : bool                 _have_port_depth                  ;
+
+  public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select            ::Parameters * _param_rename_select            ;
+  public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters * _param_register_translation_unit;
+  public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit  ::Parameters * _param_load_store_pointer_unit  ;
+  public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue         ::Parameters * _param_glue                     ;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t             nb_front_end                     ,
+			uint32_t           * nb_context                       ,
+			uint32_t           * nb_inst_decod                    ,
+			uint32_t             nb_inst_insert                   ,
+			uint32_t             nb_inst_retire                   ,
+			uint32_t             nb_load_store_queue              ,
+			uint32_t           * size_store_queue                 ,
+			uint32_t           * size_load_queue                  ,
+			uint32_t          ** link_load_store_unit_with_thread ,
+			Tpriority_t          rename_select_priority           ,
+			Tload_balancing_t    rename_select_load_balancing     ,
+			uint32_t             rename_select_nb_front_end_select,
+			uint32_t             max_branch_speculated            ,
+			uint32_t             size_general_data                ,
+			uint32_t             nb_general_register              ,
+			uint32_t             nb_special_register              ,
+			uint32_t             nb_reg_free                      ,
+			uint32_t             nb_bank                          ,
+			uint32_t             size_read_counter                ,
+                        bool                 is_toplevel=false
+                        );
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters & x);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h	(revision 88)
@@ -0,0 +1,228 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_Rename_unit_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_rename_unit_Rename_unit_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h"
+#include "Behavioural/include/Types.h"
+
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+  class Rename_unit 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_VAL               ;//[nb_front_end][nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t        )  *** out_RENAME_IN_ACK               ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontext_t        )  ***  in_RENAME_IN_FRONT_END_ID      ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontext_t        )  ***  in_RENAME_IN_CONTEXT_ID        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tdepth_t          )  ***  in_RENAME_IN_DEPTH             ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Ttype_t           )  ***  in_RENAME_IN_TYPE              ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Toperation_t      )  ***  in_RENAME_IN_OPERATION         ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_NO_EXECUTE        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_IS_DELAY_SLOT     ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IN_ADDRESS           ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_HAS_IMMEDIAT      ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IN_IMMEDIAT          ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_READ_RA           ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RENAME_IN_NUM_REG_RA        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_READ_RB           ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RENAME_IN_NUM_REG_RB        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_READ_RC           ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tspecial_address_t)  ***  in_RENAME_IN_NUM_REG_RC        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_WRITE_RD          ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RENAME_IN_NUM_REG_RD        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_WRITE_RE          ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tspecial_address_t)  ***  in_RENAME_IN_NUM_REG_RE        ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Texception_t      )  ***  in_RENAME_IN_EXCEPTION_USE     ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Texception_t      )  ***  in_RENAME_IN_EXCEPTION         ;//[nb_front_end][nb_inst_decod]
+
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_VAL                  ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_ACK                  ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_FRONT_END_ID         ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontext_t        )   ** out_INSERT_CONTEXT_ID           ;//[nb_inst_insert]
+  public    : SC_OUT(Tdepth_t          )   ** out_INSERT_DEPTH                ;//[nb_inst_insert]
+  public    : SC_OUT(Ttype_t           )   ** out_INSERT_TYPE                 ;//[nb_inst_insert]
+  public    : SC_OUT(Toperation_t      )   ** out_INSERT_OPERATION            ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_NO_EXECUTE           ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_IS_DELAY_SLOT        ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_INSERT_ADDRESS              ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_HAS_IMMEDIAT         ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_INSERT_IMMEDIAT             ;//[nb_inst_insert]
+  public    : SC_OUT(Tlsq_ptr_t        )   ** out_INSERT_STORE_QUEUE_PTR_WRITE;//[nb_inst_insert]
+  public    : SC_OUT(Tlsq_ptr_t        )   ** out_INSERT_LOAD_QUEUE_PTR_WRITE ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_READ_RA              ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RA_LOG       ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RA_PHY       ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_READ_RB              ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RB_LOG       ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RB_PHY       ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_READ_RC              ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RC_LOG       ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RC_PHY       ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_WRITE_RD             ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RD_LOG       ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RD_PHY_OLD   ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_NUM_REG_RD_PHY_NEW   ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_WRITE_RE             ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_LOG       ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_PHY_OLD   ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_PHY_NEW   ;//[nb_inst_insert]
+  public    : SC_OUT(Texception_t      )   ** out_INSERT_EXCEPTION_USE        ;//[nb_inst_insert]
+  public    : SC_OUT(Texception_t      )   ** out_INSERT_EXCEPTION            ;//[nb_inst_insert]
+
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_VAL                  ;//[nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_ACK                  ;//[nb_inst_retire]
+  public    : SC_IN (Tcontext_t        )   **  in_RETIRE_FRONT_END_ID         ;//[nb_inst_retire]
+  public    : SC_IN (Tcontext_t        )   **  in_RETIRE_CONTEXT_ID           ;//[nb_inst_retire]
+//public    : SC_IN (Ttype_t           )   **  in_RETIRE_TYPE                 ;//[nb_inst_retire]
+//public    : SC_IN (Toperation_t      )   **  in_RETIRE_OPERATION            ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_USE_STORE_QUEUE      ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_USE_LOAD_QUEUE       ;//[nb_inst_retire]
+  public    : SC_IN (Tlsq_ptr_t        )   **  in_RETIRE_STORE_QUEUE_PTR_WRITE;//[nb_inst_retire]
+  public    : SC_IN (Tlsq_ptr_t        )   **  in_RETIRE_LOAD_QUEUE_PTR_WRITE ;//[nb_inst_retire]
+  public    : SC_IN (Tevent_state_t    )   **  in_RETIRE_EVENT_STATE          ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_READ_RA              ;//[nb_inst_retire]
+  public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RA_PHY       ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_READ_RB              ;//[nb_inst_retire]
+  public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RB_PHY       ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_READ_RC              ;//[nb_inst_retire]
+  public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RC_PHY       ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_WRITE_RD             ;//[nb_inst_retire]
+  public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RD_LOG       ;//[nb_inst_retire]
+  public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RD_PHY_OLD   ;//[nb_inst_retire]
+  public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RD_PHY_NEW   ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_WRITE_RE             ;//[nb_inst_retire]
+  public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RE_LOG       ;//[nb_inst_retire]
+  public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RE_PHY_OLD   ;//[nb_inst_retire]
+  public    : SC_IN (Tspecial_address_t)   **  in_RETIRE_NUM_REG_RE_PHY_NEW   ;//[nb_inst_retire]
+
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tspr_t            )  ***  in_SPR_READ_SR                 ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select            ::Rename_select             * _component_rename_select            ;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Register_translation_unit * _component_register_translation_unit;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit  ::Load_Store_pointer_unit   * _component_load_store_pointer_unit  ;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue         ::Rename_unit_Glue          * _component_glue                     ;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Rename_unit);
+#endif
+  public  :          Rename_unit              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Rename_unit             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  public  : void        transition                (void);
+# endif					       
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,184 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::Parameters"
+  Parameters::Parameters (uint32_t             nb_front_end                     ,
+			  uint32_t           * nb_context                       ,
+			  uint32_t           * nb_inst_decod                    ,
+			  uint32_t             nb_inst_insert                   ,
+			  uint32_t             nb_inst_retire                   ,
+			  uint32_t             nb_load_store_queue              ,
+			  uint32_t           * size_store_queue                 ,
+			  uint32_t           * size_load_queue                  ,
+			  uint32_t          ** link_load_store_unit_with_thread ,
+			  Tpriority_t          rename_select_priority           ,
+			  Tload_balancing_t    rename_select_load_balancing     ,
+			  uint32_t             rename_select_nb_front_end_select,
+			  uint32_t             max_branch_speculated            ,
+			  uint32_t             size_general_data                ,
+			  uint32_t             nb_general_register              ,
+			  uint32_t             nb_special_register              ,
+			  uint32_t             nb_reg_free                      ,
+			  uint32_t             nb_bank                          ,
+			  uint32_t             size_read_counter                ,
+                          bool                 is_toplevel)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    _nb_front_end                      = nb_front_end                     ;
+    _nb_context                        = nb_context                       ;
+    _nb_inst_decod                     = nb_inst_decod                    ;
+    _nb_inst_insert                    = nb_inst_insert                   ;
+    _nb_inst_retire                    = nb_inst_retire                   ;
+    _nb_load_store_queue               = nb_load_store_queue              ;
+    _size_store_queue                  = size_store_queue                 ;
+    _size_load_queue                   = size_load_queue                  ;
+    _link_load_store_unit_with_thread  = link_load_store_unit_with_thread ;
+    _rename_select_priority            = rename_select_priority           ;
+    _rename_select_load_balancing      = rename_select_load_balancing     ;
+    _rename_select_nb_front_end_select = rename_select_nb_front_end_select;
+    _max_branch_speculated             = max_branch_speculated            ;
+    _nb_general_register               = nb_general_register              ;
+    _nb_special_register               = nb_special_register              ;
+    _nb_reg_free                       = nb_reg_free                      ;
+    _nb_bank                           = nb_bank                          ;
+    _size_read_counter                 = size_read_counter                ;
+    
+    uint32_t size_special_register     = log2(_nb_special_register);
+
+    test();
+
+    log_printf(TRACE,Rename_unit,FUNCTION,_("Creation : _param_rename_select."));
+    _param_rename_select = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Parameters 
+      (
+       _nb_front_end         ,
+       _nb_context           ,
+       _max_branch_speculated,
+       _size_general_data    ,
+       _nb_inst_insert       ,
+       _nb_inst_decod        ,
+       _rename_select_nb_front_end_select  ,
+       _rename_select_priority             ,
+       _rename_select_load_balancing       
+       );
+
+    log_printf(TRACE,Rename_unit,FUNCTION,_("Creation : _param_register_translation_unit."));
+    _param_register_translation_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Parameters
+      (
+       _nb_front_end          ,
+       _nb_context            ,
+       _nb_general_register   ,
+       _nb_special_register   ,
+       _nb_inst_insert        ,
+       _nb_inst_retire        ,
+       _nb_reg_free           ,
+       _nb_bank               ,
+       _size_read_counter     
+       );
+
+    log_printf(TRACE,Rename_unit,FUNCTION,_("Creation : _param_load_store_pointer_unit."));
+    _param_load_store_pointer_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Parameters
+      (
+       _nb_front_end                    ,
+       _nb_context                      ,
+       _nb_load_store_queue             ,
+       _size_store_queue                ,
+       _size_load_queue                 ,
+       _link_load_store_unit_with_thread,
+       _nb_inst_insert                  ,
+       _nb_inst_retire                  
+       );
+
+    log_printf(TRACE,Rename_unit,FUNCTION,_("Creation : _param_glue."));
+    _param_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Parameters
+      (
+       _nb_front_end         ,
+       _nb_context           ,
+       _nb_inst_insert       ,
+       _nb_inst_retire       ,
+       _size_general_data    ,
+       _size_special_register
+       );
+
+    if (is_toplevel)
+      {
+        _size_front_end_id                 = log2(_nb_front_end);
+        _size_context_id                   = log2(max<uint32_t>(_nb_context,_nb_front_end));
+        _size_store_queue_ptr              = log2(max<uint32_t>(_size_store_queue,nb_load_store_queue));
+        _size_load_queue_ptr               = log2(max<uint32_t>(_size_load_queue ,nb_load_store_queue));
+        _size_general_register             = log2(_nb_general_register);
+        _size_special_register             = size_special_register;
+        _size_depth                        = log2(_max_branch_speculated);
+        _size_general_data                 = size_general_data                ;
+        
+        _have_port_front_end_id            = _size_front_end_id   > 0;
+        _have_port_context_id              = _size_context_id     > 0;
+        _have_port_load_queue_ptr          = _size_load_queue_ptr > 0;
+        _have_port_depth                   = _size_depth          > 0;
+        
+        copy();
+      }
+
+    log_end(Rename_unit,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Rename_unit::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Rename_unit,FUNCTION);
+//     test();
+//     log_end(Rename_unit,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    delete _param_rename_select            ;
+    delete _param_register_translation_unit;
+    delete _param_load_store_pointer_unit  ;
+    delete _param_glue                     ;
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    COPY(_param_rename_select            );
+    COPY(_param_register_translation_unit);
+    COPY(_param_load_store_pointer_unit  );
+    COPY(_param_glue                     );
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,39 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    Parameters_test test ("Rename_unit");
+
+    log_end(Rename_unit,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,107 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    XML xml ("rename_unit");
+
+    xml.balise_open("rename_unit");
+    xml.singleton_begin("nb_front_end                     "); xml.attribut("value",toString(_nb_front_end                     )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_insert                   "); xml.attribut("value",toString(_nb_inst_insert                   )); xml.singleton_end();
+    xml.singleton_begin("nb_inst_retire                   "); xml.attribut("value",toString(_nb_inst_retire                   )); xml.singleton_end();
+    xml.singleton_begin("nb_load_store_queue              "); xml.attribut("value",toString(_nb_load_store_queue              )); xml.singleton_end();
+    xml.singleton_begin("rename_select_priority           "); xml.attribut("value",toString(_rename_select_priority           )); xml.singleton_end();
+    xml.singleton_begin("rename_select_load_balancing     "); xml.attribut("value",toString(_rename_select_load_balancing     )); xml.singleton_end();
+    xml.singleton_begin("rename_select_nb_front_end_select"); xml.attribut("value",toString(_rename_select_nb_front_end_select)); xml.singleton_end();
+    xml.singleton_begin("max_branch_speculated            "); xml.attribut("value",toString(_max_branch_speculated            )); xml.singleton_end();
+    xml.singleton_begin("size_general_data                "); xml.attribut("value",toString(_size_general_data                )); xml.singleton_end();
+    xml.singleton_begin("nb_general_register              "); xml.attribut("value",toString(_nb_general_register              )); xml.singleton_end();
+    xml.singleton_begin("nb_special_register              "); xml.attribut("value",toString(_nb_special_register              )); xml.singleton_end();
+    xml.singleton_begin("nb_reg_free                      "); xml.attribut("value",toString(_nb_reg_free                      )); xml.singleton_end();
+    xml.singleton_begin("nb_bank                          "); xml.attribut("value",toString(_nb_bank                          )); xml.singleton_end();
+    xml.singleton_begin("size_read_counter                "); xml.attribut("value",toString(_size_read_counter                )); xml.singleton_end();
+
+    for (uint32_t i=0;i<_nb_front_end; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","front_end");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        xml.singleton_begin("nb_context                       "); xml.attribut("value",toString(_nb_context                       [i])); xml.singleton_end();
+        xml.singleton_begin("nb_inst_decod                    "); xml.attribut("value",toString(_nb_inst_decod                    [i])); xml.singleton_end();
+        
+        for (uint32_t j=0;j<_nb_context[i]; j++)
+          {
+            xml. balise_open_begin("component");
+            xml.  attribut("type","context");
+            xml.  attribut("id"  ,toString(j));
+            xml. balise_open_end();
+
+            xml.singleton_begin("link_load_store_unit_with_thread "); xml.attribut("value",toString(_link_load_store_unit_with_thread [i][j])); xml.singleton_end();
+            
+            xml. balise_close();
+          }
+
+        xml. balise_close();
+      }
+
+    for (uint32_t i=0;i<_nb_load_store_queue; i++)
+      {
+        xml. balise_open_begin("component");
+        xml.  attribut("type","load_store_queue");
+        xml.  attribut("id"  ,toString(i));
+        xml. balise_open_end();
+        
+        xml.singleton_begin("size_store_queue                 "); xml.attribut("value",toString(_size_store_queue                 [i])); xml.singleton_end();
+        xml.singleton_begin("size_load_queue                  "); xml.attribut("value",toString(_size_load_queue                  [i])); xml.singleton_end();
+
+        xml. balise_close();
+      }
+
+    xml.balise_close();
+
+    log_end(Rename_unit,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters & x)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Rename_unit,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit.cpp	(revision 88)
@@ -0,0 +1,117 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::Rename_unit"
+  Rename_unit::Rename_unit 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_Rename_unit == true
+    log_printf(INFO,Rename_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
+    log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_end(Rename_unit,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::~Rename_unit"
+  Rename_unit::~Rename_unit (void)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 88)
@@ -0,0 +1,805 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::allocation"
+  void Rename_unit::allocation 
+  (
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+   void
+#endif
+   )
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Rename_unit"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+    
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 "Generalist interface"
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      
+      _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL           ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_VALACK_OUT(out_RENAME_IN_ACK           ,ACK, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_FRONT_END_ID  ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID    ,"context_id"   ,Tcontext_t        ,_param->_size_context_id            , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_DEPTH         ,"depth"        ,Tdepth_t          ,_param->_size_depth                 , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_TYPE          ,"type"         ,Ttype_t           ,_param->_size_type                  , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION     ,"operation"    ,Toperation_t      ,_param->_size_operation             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT      ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RA       ,"read_ra"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RA    ,"num_reg_ra"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RB       ,"read_rb"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RB    ,"num_reg_rb"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_READ_RC       ,"read_rc"      ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RC    ,"num_reg_rc"   ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RD      ,"write_rd"     ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RD    ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RE      ,"write_re"     ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE    ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception_use         , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+    }
+
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("insert",OUT,WEST , "Instruction with physical register", _param->_nb_inst_insert);
+      
+      ALLOC1_VALACK_OUT(out_INSERT_VAL                  ,VAL);
+      ALLOC1_VALACK_IN ( in_INSERT_ACK                  ,ACK);
+      ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id          );
+      ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id            );
+      ALLOC1_SIGNAL_OUT(out_INSERT_DEPTH                ,"depth"                ,Tdepth_t          ,_param->_size_depth                 );
+      ALLOC1_SIGNAL_OUT(out_INSERT_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type                  );
+      ALLOC1_SIGNAL_OUT(out_INSERT_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation             );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE           ,"no_execute"           ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_IS_DELAY_SLOT        ,"is_delay_slot"        ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS              ,"address"              ,Tgeneral_data_t   ,_param->_size_general_data          );
+      ALLOC1_SIGNAL_OUT(out_INSERT_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data          );
+      ALLOC1_SIGNAL_OUT(out_INSERT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr       );
+      ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr        );
+      ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION_USE        ,"exception_use"        ,Texception_t      ,_param->_size_exception_use         );
+      ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION            ,"exception"            ,Texception_t      ,_param->_size_exception             );
+      ALLOC1_SIGNAL_OUT(out_INSERT_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_LOG       ,"num_reg_ra_log"       ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_PHY       ,"num_reg_ra_phy"       ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_LOG       ,"num_reg_rb_log"       ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_PHY       ,"num_reg_rb_phy"       ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_LOG       ,"num_reg_rc_log"       ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_PHY       ,"num_reg_rc_phy"       ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_LOG       ,"num_reg_rd_log"       ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_OLD   ,"num_reg_rd_phy_old"   ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_NEW   ,"num_reg_rd_phy_new"   ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_LOG       ,"num_reg_re_log"       ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD   ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW   ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      );
+    }
+
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("retire",IN ,NORTH, "Retire instruction, update renaming structure.", _param->_nb_inst_retire);
+
+      ALLOC1_VALACK_IN ( in_RETIRE_VAL                  ,VAL);
+      ALLOC1_VALACK_OUT(out_RETIRE_ACK                  ,ACK);
+      ALLOC1_SIGNAL_IN ( in_RETIRE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id          );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id            );
+//    ALLOC1_SIGNAL_IN ( in_RETIRE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type                  );
+//    ALLOC1_SIGNAL_IN ( in_RETIRE_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation             );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_USE_STORE_QUEUE      ,"use_store_queue"      ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_USE_LOAD_QUEUE       ,"use_load_queue"       ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr       );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr        );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_EVENT_STATE          ,"event_state"          ,Tevent_state_t    ,_param->_size_event_state           );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY       ,"num_reg_ra_phy"       ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RB_PHY       ,"num_reg_rb_phy"       ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY       ,"num_reg_rc_phy"       ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_LOG       ,"num_reg_rd_log"       ,Tgeneral_address_t,_param->_size_general_register_logic);
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_OLD   ,"num_reg_rd_phy_old"   ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_NEW   ,"num_reg_rd_phy_new"   ,Tgeneral_address_t,_param->_size_general_register      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                                   );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_LOG       ,"num_reg_re_log"       ,Tspecial_address_t,_param->_size_special_register_logic);
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD   ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      );
+      ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW   ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      );
+    }
+
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_read", IN,NORTH, _("Special register"), _param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN (in_SPR_READ_SR                 ,"sr",Tspr_t            ,_param->_size_spr, _param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+    std::string name;
+
+    {
+      name = _name+"_rename_select";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_rename_select = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_select::Rename_select
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_rename_select
+	 ,_usage);
+      
+      _component->set_component (_component_rename_select->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_register_translation_unit";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_register_translation_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::Register_translation_unit
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_register_translation_unit
+	 ,_usage);
+      
+      _component->set_component (_component_register_translation_unit->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_load_store_pointer_unit";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_load_store_pointer_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::load_store_pointer_unit::Load_Store_pointer_unit
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_load_store_pointer_unit
+	 ,_usage);
+      
+      _component->set_component (_component_load_store_pointer_unit->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_glue";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::rename_unit_glue::Rename_unit_Glue
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_glue
+	 ,_usage);
+      
+      _component->set_component (_component_glue->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+    
+    // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    std::string src,dest;
+
+    // ===================================================================
+    // =====[ rename_select ]=============================================
+    // ===================================================================
+    {
+      src = _name+"_rename_select";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++)
+	  {
+	    dest = _name;
+#ifdef POSITION
+	    _component->interface_map (src ,"rename_in_"+toString(i)+"_"+toString(j),
+				       dest,"rename_in_"+toString(i)+"_"+toString(j));
+#endif      
+
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_VAL"          ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_VAL"          );
+	    PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ACK"          ,
+		                dest,"out_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ACK"          );
+	    if (_param->_have_port_front_end_id)
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID" ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID" );
+	    if (_param->_have_port_context_id)
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID"   );
+	    if (_param->_have_port_depth)
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_DEPTH"        ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_DEPTH"        );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_TYPE"         ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_TYPE"         );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_OPERATION"    ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_OPERATION"    );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NO_EXECUTE"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NO_EXECUTE"   );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT",
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT");
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS"      ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS"      );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_HAS_IMMEDIAT" ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_HAS_IMMEDIAT" );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IMMEDIAT"     ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IMMEDIAT"     );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_READ_RA"      ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_READ_RA"      );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA"   );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_READ_RB"      ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_READ_RB"      );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB"   );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_READ_RC"      ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_READ_RC"      );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC"   );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_WRITE_RD"     ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_WRITE_RD"     );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD"   );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_WRITE_RE"     ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_WRITE_RE"     );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE"   ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE"   );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE",
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE");
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_EXCEPTION"    ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_EXCEPTION"    );
+	  }
+
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_out_"+toString(i),
+				     dest,"insert_"    +toString(i));
+#endif
+
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NO_EXECUTE"  ,
+		              dest,"out_INSERT_"    +toString(i)+"_NO_EXECUTE"  );
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_IS_DELAY_SLOT",
+		              dest,"out_INSERT_"    +toString(i)+"_IS_DELAY_SLOT");
+	  if (_param->_have_port_depth)
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_DEPTH"       ,
+		              dest,"out_INSERT_"    +toString(i)+"_DEPTH"       );
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_ADDRESS"     ,
+		              dest,"out_INSERT_"    +toString(i)+"_ADDRESS"     );
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_HAS_IMMEDIAT",
+		              dest,"out_INSERT_"    +toString(i)+"_HAS_IMMEDIAT");
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_EXCEPTION_USE",
+		              dest,"out_INSERT_"    +toString(i)+"_EXCEPTION_USE");
+
+	  dest = _name+"_register_translation_unit";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_out_"+toString(i),
+				     dest,"rename_"    +toString(i));
+#endif
+
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RA"   ,
+		                   dest, "in_RENAME_"    +toString(i)+"_READ_RA"   );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA",
+		                   dest, "in_RENAME_"    +toString(i)+"_NUM_REG_RA_LOG");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RB"   ,
+		                   dest, "in_RENAME_"    +toString(i)+"_READ_RB"   );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RB",
+		                   dest, "in_RENAME_"    +toString(i)+"_NUM_REG_RB_LOG");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RC"   ,
+		                   dest, "in_RENAME_"    +toString(i)+"_READ_RC"   );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RC",
+		                   dest, "in_RENAME_"    +toString(i)+"_NUM_REG_RC_LOG");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RD"  ,
+		                   dest, "in_RENAME_"    +toString(i)+"_WRITE_RD"  );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RD",
+		                   dest, "in_RENAME_"    +toString(i)+"_NUM_REG_RD_LOG");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_WRITE_RE"  ,
+		                   dest, "in_RENAME_"    +toString(i)+"_WRITE_RE"  );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RE",
+			           dest, "in_RENAME_"    +toString(i)+"_NUM_REG_RE_LOG");
+
+	  dest = _name+"_glue";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_out_"+toString(i),
+				     dest,"insert_"    +toString(i));
+#endif
+	  
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_VAL"          ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_VAL"          );
+	  COMPONENT_MAP(_component,src , "in_RENAME_OUT_"+toString(i)+              "_ACK"          ,
+			           dest,"out_INSERT_"    +toString(i)+"_RENAME_SELECT_ACK"          );
+	  if (_param->_have_port_front_end_id)
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_FRONT_END_ID" ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_FRONT_END_ID" );
+	  if (_param->_have_port_context_id)
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_CONTEXT_ID"   ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_CONTEXT_ID"   );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_TYPE"         ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_TYPE"         );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_OPERATION"    ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_OPERATION"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_IMMEDIAT"    ,
+		                   dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_IMMEDIAT"     );
+// 	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_EXCEPTION_USE",
+// 			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_EXCEPTION_USE");
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_EXCEPTION"    ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_EXCEPTION"    );
+	}
+    }
+
+    // ===================================================================
+    // =====[ register_translation_unit ]=================================
+    // ===================================================================
+    {
+      src = _name+"_register_translation_unit";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+ 	  dest = _name+"_rename_select";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_"    +toString(i),
+				     dest,"rename_out_"+toString(i));
+#endif      
+
+ 	  dest = _name+"_glue";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"rename_"+toString(i),
+				     dest,"insert_"+toString(i));
+#endif      
+
+	  COMPONENT_MAP(_component,src , "in_RENAME_"+toString(i)+                     "_VAL"         ,
+			           dest,"out_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_VAL"         );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_"+toString(i)+                     "_ACK"         ,
+			           dest, "in_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_ACK"         );
+	  if (_param->_have_port_front_end_id)
+	  COMPONENT_MAP(_component,src , "in_RENAME_"+toString(i)+                     "_FRONT_END_ID",
+			           dest,"out_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_FRONT_END_ID");
+	  if (_param->_have_port_context_id)
+	  COMPONENT_MAP(_component,src , "in_RENAME_"+toString(i)+                     "_CONTEXT_ID"  ,
+			           dest,"out_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_CONTEXT_ID"  );
+
+	  //  in_RENAME_READ_RA           - rename_select
+	  //  in_RENAME_NUM_REG_RA_LOG    - rename_select
+	  //  in_RENAME_READ_RB           - rename_select
+	  //  in_RENAME_NUM_REG_RB_LOG    - rename_select
+	  //  in_RENAME_READ_RC           - rename_select
+	  //  in_RENAME_NUM_REG_RC_LOG    - rename_select
+	  //  in_RENAME_WRITE_RD          - rename_select
+	  //  in_RENAME_NUM_REG_RD_LOG    - rename_select
+	  //  in_RENAME_WRITE_RE          - rename_select
+	  //  in_RENAME_NUM_REG_RE_LOG    - rename_select
+
+	}
+
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"insert_"+toString(i),
+				     dest,"insert_"+toString(i));
+#endif      
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL"               ,
+		              dest,"out_INSERT_"+toString(i)+"_VAL"               );
+	  PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK"               ,
+		              dest, "in_INSERT_"+toString(i)+"_ACK"               );
+	  if (_param->_have_port_front_end_id)
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FRONT_END_ID"      ,
+		              dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID"      );
+	  if (_param->_have_port_context_id)
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_CONTEXT_ID"        ,
+		              dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID"        );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RA"           ,
+		              dest,"out_INSERT_"+toString(i)+"_READ_RA"           );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RA_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RA_PHY"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RB"           ,
+		              dest,"out_INSERT_"+toString(i)+"_READ_RB"           );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RB_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RB_PHY"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RC"           ,
+		              dest,"out_INSERT_"+toString(i)+"_READ_RC"           );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RC_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RC_PHY"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_WRITE_RD"          ,
+		              dest,"out_INSERT_"+toString(i)+"_WRITE_RD"          );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_WRITE_RE"          ,
+		              dest,"out_INSERT_"+toString(i)+"_WRITE_RE"          );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG"    ,
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_LOG"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
+
+	  // HACK : use the field num_reg_re to pass the SM and SUMRA flag.
+	  // cf : rename_unit_glue and functionnal_unit/Operation
+	  dest = _name+"_glue";
+
+	  COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+                     "_NUM_REG_RE_PHY_NEW",
+			           dest, "in_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW");
+	}
+
+      for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	{
+	  dest = _name;
+	  
+#ifdef POSITION
+	  _component->interface_map (src ,"retire_"+toString(i),
+				     dest,"retire_"+toString(i));
+#endif      
+	  
+	  if (_param->_have_port_front_end_id)
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_FRONT_END_ID"      ,
+		              dest, "in_RETIRE_"+toString(i)+"_FRONT_END_ID"      );
+	  if (_param->_have_port_context_id)
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_CONTEXT_ID"        ,
+		              dest, "in_RETIRE_"+toString(i)+"_CONTEXT_ID"        );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_EVENT_STATE"       ,
+		              dest, "in_RETIRE_"+toString(i)+"_EVENT_STATE"       );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RA"           ,
+		              dest, "in_RETIRE_"+toString(i)+"_READ_RA"           );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RA_PHY"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RA_PHY"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RB"           ,
+		              dest, "in_RETIRE_"+toString(i)+"_READ_RB"           );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RB_PHY"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RB_PHY"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_READ_RC"           ,
+		              dest, "in_RETIRE_"+toString(i)+"_READ_RC"           );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RC_PHY"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RC_PHY"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RD"          ,
+		              dest, "in_RETIRE_"+toString(i)+"_WRITE_RD"          );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_LOG"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD");
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW");
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_WRITE_RE"          ,
+		              dest, "in_RETIRE_"+toString(i)+"_WRITE_RE"          );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG"    ,
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_LOG"    );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD");
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
+		              dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
+
+	  dest = _name+"_glue";
+	  
+#ifdef POSITION
+	  _component->interface_map (src ,"retire_"+toString(i),
+				     dest,"retire_"+toString(i));
+#endif      
+
+	  COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL",dest,"out_RETIRE_"+toString(i)+"_REGISTER_TRANSLATION_VAL");
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK",dest, "in_RETIRE_"+toString(i)+"_REGISTER_TRANSLATION_ACK");
+	}
+    }
+
+    // ===================================================================
+    // =====[ load_store_pointer_unit ]===================================
+    // ===================================================================
+    {
+      src = _name+"_load_store_pointer_unit";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"insert_"+toString(i),
+				     dest,"insert_"+toString(i));
+#endif      
+
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
+		              dest,"out_INSERT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+	  if (_param->_have_port_load_queue_ptr)
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
+		              dest,"out_INSERT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+
+	  dest = _name+"_glue";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"insert_"+toString(i),
+				     dest,"insert_"+toString(i));
+#endif      
+	  
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+                         "_VAL"         ,
+			           dest,"out_INSERT_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_VAL"         );
+	  COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+                         "_ACK"         ,
+			           dest, "in_INSERT_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_ACK"         );
+	  if (_param->_have_port_front_end_id)
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+                         "_FRONT_END_ID",
+			           dest,"out_INSERT_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID");
+	  if (_param->_have_port_context_id)
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+                         "_CONTEXT_ID"  ,
+			           dest,"out_INSERT_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID"  );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+                         "_TYPE"        ,
+			           dest,"out_INSERT_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_TYPE"        );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+                         "_OPERATION"   ,
+			           dest,"out_INSERT_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_OPERATION"   );
+	}
+
+      for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	{
+	  dest = _name;
+	  
+#ifdef POSITION
+	  _component->interface_map (src ,"retire_"+toString(i),
+				     dest,"retire_"+toString(i));
+#endif      
+
+	  if (_param->_have_port_front_end_id)
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_FRONT_END_ID"         ,
+		              dest, "in_RETIRE_"+toString(i)+"_FRONT_END_ID"         );
+	  if (_param->_have_port_context_id)					     
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_CONTEXT_ID"           ,
+		              dest, "in_RETIRE_"+toString(i)+"_CONTEXT_ID"           );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_USE_STORE_QUEUE"      ,      
+		              dest, "in_RETIRE_"+toString(i)+"_USE_STORE_QUEUE"      );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_USE_LOAD_QUEUE"       ,      
+		              dest, "in_RETIRE_"+toString(i)+"_USE_LOAD_QUEUE"       );
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
+		              dest, "in_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+	  if (_param->_have_port_load_queue_ptr)
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
+		              dest, "in_RETIRE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+
+	  dest = _name+"_glue";
+
+#ifdef POSITION
+	  _component->interface_map (src ,"retire_"+toString(i),
+				     dest,"retire_"+toString(i));
+#endif      
+	  
+	  COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+                         "_VAL"         ,
+			           dest,"out_RETIRE_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_VAL"         );
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+                         "_ACK"         ,
+			           dest, "in_RETIRE_"+toString(i)+"_LOAD_STORE_QUEUE_POINTER_ACK"         );
+	  //// in_RETIRE_TYPE         - glue
+	  //// in_RETIRE_OPERATION    - glue
+	}
+    }
+
+    // ===================================================================
+    // =====[ glue ]======================================================
+    // ===================================================================
+    {
+      src = _name+"_glue";
+      log_printf(TRACE,Rename_unit,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"insert_"+toString(i),
+				     dest,"insert_"+toString(i));
+#endif      
+
+	  // //out_INSERT_VAL
+	  // // in_INSERT_ACK
+	  if (_param->_have_port_front_end_id)
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FRONT_END_ID" ,
+		              dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" );
+	  if (_param->_have_port_context_id)
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_CONTEXT_ID"   ,
+		              dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID"   );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_TYPE"         ,
+		              dest,"out_INSERT_"+toString(i)+"_TYPE"         );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_OPERATION"    ,
+		              dest,"out_INSERT_"+toString(i)+"_OPERATION"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_IMMEDIAT"     ,
+		              dest,"out_INSERT_"+toString(i)+"_IMMEDIAT"     );
+// 	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_EXCEPTION_USE",
+// 		              dest,"out_INSERT_"+toString(i)+"_EXCEPTION_USE");
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_EXCEPTION"    ,
+		              dest,"out_INSERT_"+toString(i)+"_EXCEPTION"    );
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
+		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
+	  
+	  
+	  //    in_INSERT_RENAME_SELECT_VAL                       - rename_select
+	  //   out_INSERT_RENAME_SELECT_ACK                       - rename_select
+	  //    in_INSERT_RENAME_SELECT_FRONT_END_ID              - rename_select
+	  //    in_INSERT_RENAME_SELECT_CONTEXT_ID                - rename_select
+	  //    in_INSERT_RENAME_SELECT_TYPE                      - rename_select
+	  //    in_INSERT_RENAME_SELECT_OPERATION                 - rename_select
+	  //    in_INSERT_RENAME_SELECT_IMMEDIAT                  - rename_select
+// 	  //    in_INSERT_RENAME_SELECT_EXCEPTION_USE             - rename_select
+	  //    in_INSERT_RENAME_SELECT_EXCEPTION                 - rename_select
+	  							  
+	  //   out_INSERT_REGISTER_TRANSLATION_VAL                - register_translation_unit
+	  //    in_INSERT_REGISTER_TRANSLATION_ACK                - register_translation_unit
+	  //   out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID       - register_translation_unit
+	  //   out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID         - register_translation_unit
+	  //   out_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW - register_translation_unit
+	  
+	  //   out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL            - load_store_pointer_unit
+	  //    in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK            - load_store_pointer_unit
+	  //   out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID   - load_store_pointer_unit
+	  //   out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID     - load_store_pointer_unit
+	  //   out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE           - load_store_pointer_unit
+	  //   out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION      - load_store_pointer_unit
+	}
+
+      for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	{
+	  dest = _name;
+
+#ifdef POSITION
+	  _component->interface_map (src ,"retire_"+toString(i),
+				     dest,"retire_"+toString(i));
+#endif      
+	  
+	  PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_VAL",
+		              dest, "in_RETIRE_"+toString(i)+"_VAL");
+	  PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_ACK",
+		              dest,"out_RETIRE_"+toString(i)+"_ACK");
+
+	  //   out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL          - load_store_pointer_unit
+	  //    in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK          - load_store_pointer_unit
+	  // //out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE         - load_store_pointer_unit
+	  // //out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION    - load_store_pointer_unit
+	  //   out_RETIRE_REGISTER_TRANSLATION_VAL              - register_translation_unit
+	  //    in_RETIRE_REGISTER_TRANSLATION_ACK              - register_translation_unit
+	}
+
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	  {
+	    dest = _name;
+#ifdef POSITION
+	    _component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
+				       dest,"spr_read_"+toString(i)+"_"+toString(j));
+#endif      
+
+	    PORT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+"_SR",
+		                dest, "in_SPR_READ_"+toString(i)+"_"+toString(j)+"_SR");
+	  }
+    }
+
+    // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
+#if DEBUG_Rename_unit == true
+    _component->test_map();
+#endif
+
+#ifdef POSITION
+     if (usage_is_set(_usage,USE_POSITION))
+       _component->generate_file();
+#endif
+
+     log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp	(revision 88)
@@ -0,0 +1,134 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::deallocation"
+  void Rename_unit::deallocation (void)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+        DELETE2_SIGNAL( in_RENAME_IN_VAL               ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL(out_RENAME_IN_ACK               ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_FRONT_END_ID      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_front_end_id          );
+        DELETE2_SIGNAL( in_RENAME_IN_CONTEXT_ID        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_context_id            );
+        DELETE2_SIGNAL( in_RENAME_IN_DEPTH             ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_depth                 );
+        DELETE2_SIGNAL( in_RENAME_IN_TYPE              ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_type                  );
+        DELETE2_SIGNAL( in_RENAME_IN_OPERATION         ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation             );
+        DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data          );
+        DELETE2_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_IMMEDIAT          ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data          );
+        DELETE2_SIGNAL( in_RENAME_IN_READ_RA           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RA        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_READ_RB           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RB        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_READ_RC           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RC        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_WRITE_RD          ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RD        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_WRITE_RE          ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_EXCEPTION_USE     ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception_use         );
+        DELETE2_SIGNAL( in_RENAME_IN_EXCEPTION         ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception             );
+        
+        DELETE1_SIGNAL(out_INSERT_VAL                  ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_INSERT_ACK                  ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_FRONT_END_ID         ,_param->_nb_inst_insert,_param->_size_front_end_id          );
+        DELETE1_SIGNAL(out_INSERT_CONTEXT_ID           ,_param->_nb_inst_insert,_param->_size_context_id            );
+        DELETE1_SIGNAL(out_INSERT_DEPTH                ,_param->_nb_inst_insert,_param->_size_depth                 );
+        DELETE1_SIGNAL(out_INSERT_TYPE                 ,_param->_nb_inst_insert,_param->_size_type                  );
+        DELETE1_SIGNAL(out_INSERT_OPERATION            ,_param->_nb_inst_insert,_param->_size_operation             );
+        DELETE1_SIGNAL(out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_ADDRESS              ,_param->_nb_inst_insert,_param->_size_general_data          );
+        DELETE1_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_IMMEDIAT             ,_param->_nb_inst_insert,_param->_size_general_data          );
+        DELETE1_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert,_param->_size_store_queue_ptr       );
+        DELETE1_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert,_param->_size_load_queue_ptr        );
+        DELETE1_SIGNAL(out_INSERT_EXCEPTION_USE        ,_param->_nb_inst_insert,_param->_size_exception_use         );
+        DELETE1_SIGNAL(out_INSERT_EXCEPTION            ,_param->_nb_inst_insert,_param->_size_exception             );
+        DELETE1_SIGNAL(out_INSERT_READ_RA              ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_LOG       ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_PHY       ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_READ_RB              ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_LOG       ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_PHY       ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_READ_RC              ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_LOG       ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_PHY       ,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL(out_INSERT_WRITE_RD             ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_LOG       ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD   ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW   ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_WRITE_RE             ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_LOG       ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD   ,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW   ,_param->_nb_inst_insert,_param->_size_special_register      );
+        
+        DELETE1_SIGNAL( in_RETIRE_VAL                  ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL(out_RETIRE_ACK                  ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID         ,_param->_nb_inst_retire,_param->_size_front_end_id          );
+        DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID           ,_param->_nb_inst_retire,_param->_size_context_id            );
+//      DELETE1_SIGNAL( in_RETIRE_TYPE                 ,_param->_nb_inst_retire,_param->_size_type                  );
+//      DELETE1_SIGNAL( in_RETIRE_OPERATION            ,_param->_nb_inst_retire,_param->_size_operation             );
+        DELETE1_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr       );
+        DELETE1_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire,_param->_size_load_queue_ptr        );
+        DELETE1_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_inst_retire,_param->_size_event_state           );
+        DELETE1_SIGNAL( in_RETIRE_READ_RA              ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RA_PHY       ,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_READ_RB              ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RB_PHY       ,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_READ_RC              ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RC_PHY       ,_param->_nb_inst_retire,_param->_size_special_register      );
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RD             ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_LOG       ,_param->_nb_inst_retire,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD   ,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW   ,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RE             ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_LOG       ,_param->_nb_inst_retire,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD   ,_param->_nb_inst_retire,_param->_size_special_register      );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW   ,_param->_nb_inst_retire,_param->_size_special_register      );
+        
+        DELETE2_SIGNAL(in_SPR_READ_SR                  ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr);
+      }
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    delete _component_rename_select            ;
+    delete _component_register_translation_unit;
+    delete _component_load_store_pointer_unit  ;
+    delete _component_glue                     ;
+
+    delete _component;
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_end_cycle.cpp	(revision 88)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::end_cycle"
+void Rename_unit::end_cycle ()
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,44 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::statistics_allocation"
+  void Rename_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Rename_unit",
+		      param_statistics);
+
+    _stat->add_stat(_component_rename_select            ->_stat);
+    _stat->add_stat(_component_register_translation_unit->_stat);
+    _stat->add_stat(_component_load_store_pointer_unit  ->_stat);
+    _stat->add_stat(_component_glue                     ->_stat);
+    
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::statistics_deallocation"
+  void Rename_unit::statistics_deallocation (void)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete _stat;
+    
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_transition.cpp	(revision 88)
@@ -0,0 +1,41 @@
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::transition"
+  void Rename_unit::transition (void)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+# endif
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_vhdl.cpp	(revision 88)
@@ -0,0 +1,45 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Rename_unit::vhdl"
+  void Rename_unit::vhdl (void)
+  {
+    log_begin(Rename_unit,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Rename_unit,FUNCTION);
+  };
+
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(OOO_Engine_LIBRARY)
+
+DIR_LIBRARY			= $(OOO_Engine_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: OOO_Engine_library
+
+library_clean			: OOO_Engine_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 88)
@@ -0,0 +1,55 @@
+OOO_Engine
+1	1	+1	# nb_front_end                                        
+1	1	+1	# nb_context                        [0]               [nb_front_end]
+1	1	+1	# nb_rename_unit                                      
+1	1	+1	# nb_execute_loop                                     
+1	1	+1	# nb_inst_decod                     [0]               [nb_front_end]
+1	1	+1	# nb_inst_insert                    [0]               [nb_rename_unit]
+1	1	+1	# nb_inst_retire                    [0]               [nb_rename_unit]
+1	1	+1	# nb_inst_issue                                       
+1	1	+1	# nb_inst_execute                   [0]               [nb_execute_loop]
+1	1	+1	# nb_inst_reexecute                                   
+1	1	+1	# nb_inst_commit                                      
+1	1	+1	# nb_inst_branch_complete                             
+1	1	+1	# nb_branch_speculated              [0][0]            [nb_front_end][nb_context]
+1	1	+1	# nb_rename_unit_select                    
+1	1	+1	# nb_execute_loop_select                   
+32	32	*2	# size_general_data                        
+2	2	*2	# size_special_data                        
+0	0	+1	# link_rename_unit_with_front_end   [0]               [nb_front_end]
+1	1	+1	# size_re_order_buffer                     
+1	1	+1	# nb_re_order_buffer_bank                  
+1	1	+1	# commit_priority                          
+1	1	+1	# commit_load_balancing                    
+1	1	+1	# size_issue_queue                         
+1	1	+1	# nb_issue_queue_bank                      
+1	1	+1	# issue_priority                           
+1	1	+1	# issue_load_balancing                     
+1	1	+1	# table_routing                     [0][0]            [nb_rename_unit][nb_inst_issue]
+1	1	+1	# table_issue_type                  [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
+1	1	+1	# table_issue_type                  [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
+1	1	+1	# size_reexecute_queue                     
+1	1	+1	# reexecute_priority                       
+1	1	+1	# reexecute_load_balancing                 
+1	1	+1	# rename_select_priority            [0]               [nb_rename_unit]
+1	1	+1	# rename_select_load_balancing      [0]               [nb_rename_unit]
+1	1	+1	# rename_select_nb_front_end_select [0]               [nb_rename_unit]
+64	64	+1	# nb_general_register               [0]               [nb_rename_unit]
+4	4	+1	# nb_special_register               [0]               [nb_rename_unit]
+1	1	+1	# nb_reg_free                       [0]               [nb_rename_unit]
+1	1	+1	# nb_rename_unit_bank               [0]               [nb_rename_unit]
+1	1	+1	# size_read_counter                 [0]               [nb_rename_unit]
+1	1	+1	# nb_load_store_queue               [0]               [nb_rename_unit]
+2	2	+1	# size_store_queue                  [0][0]            [nb_rename_unit][nb_load_store_queue]
+1	1	+1	# size_load_queue                   [0][0]            [nb_rename_unit][nb_load_store_queue]
+0	0	+1	# link_load_store_unit_with_thread  [0][0]            [nb_front_end][nb_context]           
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,33 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  1
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+
+#include <string>
+#include <iostream>
+#include <sys/time.h>
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,387 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h"
+
+#define NB_PARAMS 22
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_front_end                                                            (uint32_t         )\n"));
+  err (_(" * nb_context                        [nb_front_end]                        (uint32_t         )\n"));
+  err (_(" * nb_rename_unit                                                          (uint32_t         )\n"));
+  err (_(" * nb_execute_loop                                                         (uint32_t         )\n"));
+  err (_(" * nb_inst_decod                     [nb_front_end]                        (uint32_t         )\n"));
+  err (_(" * nb_inst_insert                    [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_inst_retire                    [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_inst_issue                                                           (uint32_t         )\n"));
+  err (_(" * nb_inst_execute                   [nb_execute_loop]                     (uint32_t         )\n"));
+  err (_(" * nb_inst_reexecute                                                       (uint32_t         )\n"));
+  err (_(" * nb_inst_commit                                                          (uint32_t         )\n"));
+  err (_(" * nb_inst_branch_complete                                                 (uint32_t         )\n"));
+  err (_(" * nb_branch_speculated              [nb_front_end][nb_context]            (uint32_t         )\n"));
+  err (_(" * nb_rename_unit_select                                                   (uint32_t         )\n"));
+  err (_(" * nb_execute_loop_select                                                  (uint32_t         )\n"));
+  err (_(" * size_general_data                                                       (uint32_t         )\n"));
+  err (_(" * size_special_data                                                       (uint32_t         )\n"));
+  err (_(" * link_rename_unit_with_front_end   [nb_front_end]                        (uint32_t         )\n"));
+  err (_(" * size_re_order_buffer                                                    (uint32_t         )\n"));
+  err (_(" * nb_re_order_buffer_bank                                                 (uint32_t         )\n"));
+  err (_(" * commit_priority                                                         (Tpriority_t      )\n"));
+  err (_(" * commit_load_balancing                                                   (Tload_balancing_t)\n"));
+  err (_(" * size_issue_queue                                                        (uint32_t         )\n"));
+  err (_(" * nb_issue_queue_bank                                                     (uint32_t         )\n"));
+  err (_(" * issue_priority                                                          (Tpriority_t      )\n"));
+  err (_(" * issue_load_balancing                                                    (Tload_balancing_t)\n"));
+  err (_(" * table_routing                     [nb_rename_unit][nb_inst_issue]       (bool             )\n"));
+  err (_(" * table_issue_type                  [nb_inst_issue][nb_type]              (bool             )\n"));
+  err (_("   * TYPE_ALU    \n"));
+  err (_("   * TYPE_SHIFT  \n"));
+  err (_("   * TYPE_MOVE   \n"));
+  err (_("   * TYPE_TEST   \n"));
+  err (_("   * TYPE_MUL    \n"));
+  err (_("   * TYPE_DIV    \n"));
+  err (_("   * TYPE_EXTEND \n"));
+  err (_("   * TYPE_FIND   \n"));
+  err (_("   * TYPE_SPECIAL\n"));
+  err (_("   * TYPE_CUSTOM \n"));
+  err (_("   * TYPE_BRANCH \n"));
+  err (_("   * TYPE_MEMORY \n"));
+  err (_(" * size_reexecute_queue                                                    (uint32_t         )\n"));
+  err (_(" * reexecute_priority                                                      (Tpriority_t      )\n"));
+  err (_(" * reexecute_load_balancing                                                (Tload_balancing_t)\n"));
+  err (_(" * rename_select_priority            [nb_rename_unit]                      (Tpriority_t      )\n"));
+  err (_(" * rename_select_load_balancing      [nb_rename_unit]                      (Tload_balancing_t)\n"));
+  err (_(" * rename_select_nb_front_end_select [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_general_register               [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_special_register               [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_reg_free                       [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_rename_unit_bank               [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * size_read_counter                 [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * nb_load_store_queue               [nb_rename_unit]                      (uint32_t         )\n"));
+  err (_(" * size_store_queue                  [nb_rename_unit][nb_load_store_queue] (uint32_t         )\n"));
+  err (_(" * size_load_queue                   [nb_rename_unit][nb_load_store_queue] (uint32_t         )\n"));
+  err (_(" * link_load_store_unit_with_thread  [nb_front_end][nb_context]            (uint32_t         )\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t _sum_nb_context          = 0;
+  uint32_t _sum_nb_load_store_queue = 0;
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t              _nb_front_end                      = fromString<uint32_t         >(argv[x++]);
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end))
+    usage (argc, argv);
+
+  uint32_t            * _nb_context                        = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _nb_context [i] = fromString<uint32_t>(argv[x++]);
+      _sum_nb_context += _nb_context [i];
+    }
+  uint32_t              _nb_rename_unit                    = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _nb_execute_loop                   = fromString<uint32_t         >(argv[x++]);
+  uint32_t            * _nb_inst_decod                     = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    _nb_inst_decod [i] = fromString<uint32_t>(argv[x++]);
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+12*_nb_rename_unit+_nb_execute_loop))
+    usage (argc, argv);
+
+  uint32_t            * _nb_inst_insert                    = new uint32_t [_nb_rename_unit];
+  uint32_t            * _nb_inst_retire                    = new uint32_t [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_inst_insert [i] = fromString<uint32_t>(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_inst_retire [i] = fromString<uint32_t>(argv[x++]);
+
+  uint32_t              _nb_inst_issue                     = fromString<uint32_t         >(argv[x++]);
+  uint32_t            * _nb_inst_execute                   = new uint32_t [_nb_execute_loop];
+  for (uint32_t i=0; i<_nb_execute_loop; i++)
+    _nb_inst_execute [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t              _nb_inst_reexecute                 = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _nb_inst_commit                    = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _nb_inst_branch_complete           = fromString<uint32_t         >(argv[x++]);
+  uint32_t           ** _nb_branch_speculated              = new uint32_t * [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _nb_branch_speculated [i] = new uint32_t [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+        _nb_branch_speculated [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+  uint32_t              _nb_rename_unit_select             = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _nb_execute_loop_select            = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _size_general_data                 = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _size_special_data                 = fromString<uint32_t         >(argv[x++]);
+  uint32_t            * _link_rename_unit_with_front_end   = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    _link_rename_unit_with_front_end [i] = fromString<uint32_t>(argv[x++]);
+  uint32_t              _size_re_order_buffer              = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _nb_re_order_buffer_bank           = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t           _commit_priority                   = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t     _commit_load_balancing             = fromString<Tload_balancing_t>(argv[x++]);
+  uint32_t              _size_issue_queue                  = fromString<uint32_t         >(argv[x++]);
+  uint32_t              _nb_issue_queue_bank               = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t           _issue_priority                    = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t     _issue_load_balancing              = fromString<Tload_balancing_t>(argv[x++]);
+  bool               ** _table_routing                     = new bool * [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    {
+      _table_routing [i] = new bool [_nb_inst_issue];
+      for (uint32_t j=0; j<_nb_inst_issue; j++)
+        _table_routing [i][j] = fromString<bool>(argv[x++]);
+    }
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+11*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue))
+    usage (argc, argv);
+  
+  bool               ** _table_issue_type                  = new bool * [_nb_inst_issue];
+  for (uint32_t i=0; i<_nb_inst_issue; i++)    
+    {
+      _table_issue_type [i] = new bool [MAX_TYPE];
+      for (uint32_t j=0; j<MAX_TYPE; j++)
+        _table_issue_type [i][j] = false;
+
+      _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+      _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+    }
+  
+  uint32_t              _size_reexecute_queue              = fromString<uint32_t         >(argv[x++]);
+  Tpriority_t           _reexecute_priority                = fromString<Tpriority_t      >(argv[x++]);
+  Tload_balancing_t     _reexecute_load_balancing          = fromString<Tload_balancing_t>(argv[x++]);
+
+  Tpriority_t         * _rename_select_priority            = new Tpriority_t       [_nb_rename_unit];
+  Tload_balancing_t   * _rename_select_load_balancing      = new Tload_balancing_t [_nb_rename_unit];
+  uint32_t            * _rename_select_nb_front_end_select = new uint32_t          [_nb_rename_unit];
+  uint32_t            * _nb_general_register               = new uint32_t          [_nb_rename_unit];
+  uint32_t            * _nb_special_register               = new uint32_t          [_nb_rename_unit];
+  uint32_t            * _nb_reg_free                       = new uint32_t          [_nb_rename_unit];
+  uint32_t            * _nb_rename_unit_bank               = new uint32_t          [_nb_rename_unit];
+  uint32_t            * _size_read_counter                 = new uint32_t          [_nb_rename_unit];
+  uint32_t            * _nb_load_store_queue               = new uint32_t          [_nb_rename_unit];
+
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _rename_select_priority            [i] = fromString<Tpriority_t      >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _rename_select_load_balancing      [i] = fromString<Tload_balancing_t>(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _rename_select_nb_front_end_select [i] = fromString<uint32_t         >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_general_register               [i] = fromString<uint32_t         >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_special_register               [i] = fromString<uint32_t         >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_reg_free                       [i] = fromString<uint32_t         >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _nb_rename_unit_bank               [i] = fromString<uint32_t         >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    _size_read_counter                 [i] = fromString<uint32_t         >(argv[x++]);
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    {
+    _nb_load_store_queue               [i] = fromString<uint32_t         >(argv[x++]);
+    _sum_nb_load_store_queue += _nb_load_store_queue [i];
+    }
+
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+11*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+2*_sum_nb_load_store_queue))
+    usage (argc, argv);
+
+
+  uint32_t           ** _size_store_queue                  = new uint32_t * [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    {
+      _size_store_queue [i] = new uint32_t [_nb_load_store_queue[i]];
+      for (uint32_t j=0; j<_nb_load_store_queue[i]; j++)
+        _size_store_queue [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+
+  uint32_t           ** _size_load_queue                  = new uint32_t * [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    {
+      _size_load_queue [i] = new uint32_t [_nb_load_store_queue[i]];
+      for (uint32_t j=0; j<_nb_load_store_queue[i]; j++)
+        _size_load_queue [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+
+  uint32_t           ** _link_load_store_unit_with_thread  = new uint32_t * [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _link_load_store_unit_with_thread [i] = new uint32_t [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+        _link_load_store_unit_with_thread [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+
+  bool     *** _implement_group       = new bool ** [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _implement_group [i] = new bool * [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+	{
+	  _implement_group [i][j] = new bool [NB_GROUP];
+
+	  for (uint32_t k=0; k<NB_GROUP; k++)
+	    _implement_group [i][j][k] = false;
+
+	  _implement_group [i][j][GROUP_SYSTEM_AND_CONTROL] = true;
+	  _implement_group [i][j][GROUP_DCACHE            ] = true;
+	}
+    }
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters
+        (
+         _nb_front_end                     ,
+         _nb_context                       ,
+         _nb_rename_unit                   ,
+         _nb_execute_loop                  ,
+         _nb_inst_decod                    ,
+         _nb_inst_insert                   ,
+         _nb_inst_retire                   ,
+         _nb_inst_issue                    ,
+         _nb_inst_execute                  ,
+         _nb_inst_reexecute                ,
+         _nb_inst_commit                   ,
+         _nb_inst_branch_complete          ,
+         _nb_branch_speculated             ,
+         _nb_rename_unit_select            ,
+         _nb_execute_loop_select           ,
+         _size_general_data                ,
+         _size_special_data                ,
+         _link_rename_unit_with_front_end  ,
+         _size_re_order_buffer             ,
+         _nb_re_order_buffer_bank          ,
+         _commit_priority                  ,
+         _commit_load_balancing            ,
+         _size_issue_queue                 ,
+         _nb_issue_queue_bank              ,
+         _issue_priority                   ,
+         _issue_load_balancing             ,
+         _table_routing                    ,
+         _table_issue_type                 ,
+         _size_reexecute_queue             ,
+         _reexecute_priority               ,
+         _reexecute_load_balancing         ,
+         _rename_select_priority           ,
+         _rename_select_load_balancing     ,
+         _rename_select_nb_front_end_select,
+         _nb_general_register              ,
+         _nb_special_register              ,
+         _nb_reg_free                      ,
+         _nb_rename_unit_bank              ,
+         _size_read_counter                ,
+         _nb_load_store_queue              ,
+         _size_store_queue                 ,
+         _size_load_queue                  ,
+         _link_load_store_unit_with_thread ,
+         _implement_group                  ,
+         true //is_toplevel
+         );
+      
+      msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+
+      delete param;
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+        TEST_OK("OOO_Engine : no error");
+      else
+        TEST_KO("OOO_Engine : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+        delete [] _implement_group [i][j];
+      delete [] _implement_group [i];
+    }
+  delete [] _implement_group;
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    delete [] _link_load_store_unit_with_thread [i];
+  delete [] _link_load_store_unit_with_thread;
+
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    delete [] _size_load_queue [i];
+  delete [] _size_load_queue;
+
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    delete []_size_store_queue [i];
+  delete []_size_store_queue;
+
+  delete [] _nb_load_store_queue               ;
+  delete [] _size_read_counter                 ;
+  delete [] _nb_rename_unit_bank               ;
+  delete [] _nb_reg_free                       ;
+  delete [] _nb_special_register               ;
+  delete [] _nb_general_register               ;
+  delete [] _rename_select_nb_front_end_select ;
+  delete [] _rename_select_load_balancing      ;
+  delete [] _rename_select_priority            ;
+
+  for (uint32_t i=0; i<_nb_inst_issue; i++)    
+    delete [] _table_issue_type [i];
+  delete [] _table_issue_type;  
+
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    delete [] _table_routing [i];
+  delete [] _table_routing;
+
+  delete [] _link_rename_unit_with_front_end;
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    delete [] _nb_branch_speculated [i];
+  delete [] _nb_branch_speculated;
+  
+  delete [] _nb_inst_execute;
+  delete [] _nb_inst_retire ;
+  delete [] _nb_inst_insert ;
+  delete [] _nb_inst_decod  ;
+  delete [] _nb_context     ;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,493 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+//   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  OOO_Engine * _OOO_Engine = new OOO_Engine 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC2_SC_SIGNAL( in_RENAME_VAL                       ," in_RENAME_VAL                       ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL(out_RENAME_ACK                       ,"out_RENAME_ACK                       ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_FRONT_END_ID              ," in_RENAME_FRONT_END_ID              ",Tcontext_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_CONTEXT_ID                ," in_RENAME_CONTEXT_ID                ",Tcontext_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_DEPTH                     ," in_RENAME_DEPTH                     ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_TYPE                      ," in_RENAME_TYPE                      ",Ttype_t           ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_OPERATION                 ," in_RENAME_OPERATION                 ",Toperation_t      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_NO_EXECUTE                ," in_RENAME_NO_EXECUTE                ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT             ," in_RENAME_IS_DELAY_SLOT             ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS                   ," in_RENAME_ADDRESS                   ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT              ," in_RENAME_HAS_IMMEDIAT              ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IMMEDIAT                  ," in_RENAME_IMMEDIAT                  ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_READ_RA                   ," in_RENAME_READ_RA                   ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_NUM_REG_RA                ," in_RENAME_NUM_REG_RA                ",Tgeneral_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_READ_RB                   ," in_RENAME_READ_RB                   ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_NUM_REG_RB                ," in_RENAME_NUM_REG_RB                ",Tgeneral_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_READ_RC                   ," in_RENAME_READ_RC                   ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_NUM_REG_RC                ," in_RENAME_NUM_REG_RC                ",Tspecial_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_WRITE_RD                  ," in_RENAME_WRITE_RD                  ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_NUM_REG_RD                ," in_RENAME_NUM_REG_RD                ",Tgeneral_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_WRITE_RE                  ," in_RENAME_WRITE_RE                  ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_NUM_REG_RE                ," in_RENAME_NUM_REG_RE                ",Tspecial_address_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_EXCEPTION_USE             ," in_RENAME_EXCEPTION_USE             ",Texception_t      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_EXCEPTION                 ," in_RENAME_EXCEPTION                 ",Texception_t      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+  ALLOC1_SC_SIGNAL(out_ISSUE_VAL                        ,"out_ISSUE_VAL                        ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL( in_ISSUE_ACK                        ," in_ISSUE_ACK                        ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_FRONT_END_ID               ,"out_ISSUE_FRONT_END_ID               ",Tcontext_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_CONTEXT_ID                 ,"out_ISSUE_CONTEXT_ID                 ",Tcontext_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_PACKET_ID                  ,"out_ISSUE_PACKET_ID                  ",Tpacket_t         ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_TYPE                       ,"out_ISSUE_TYPE                       ",Ttype_t           ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_OPERATION                  ,"out_ISSUE_OPERATION                  ",Toperation_t      ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_WRITE      ,"out_ISSUE_STORE_QUEUE_PTR_WRITE      ",Tlsq_ptr_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_LOAD_QUEUE_PTR_WRITE       ,"out_ISSUE_LOAD_QUEUE_PTR_WRITE       ",Tlsq_ptr_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_HAS_IMMEDIAT               ,"out_ISSUE_HAS_IMMEDIAT               ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_IMMEDIAT                   ,"out_ISSUE_IMMEDIAT                   ",Tgeneral_data_t   ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_READ_RA                    ,"out_ISSUE_READ_RA                    ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_NUM_REG_RA                 ,"out_ISSUE_NUM_REG_RA                 ",Tgeneral_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_READ_RB                    ,"out_ISSUE_READ_RB                    ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_NUM_REG_RB                 ,"out_ISSUE_NUM_REG_RB                 ",Tgeneral_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_READ_RC                    ,"out_ISSUE_READ_RC                    ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_NUM_REG_RC                 ,"out_ISSUE_NUM_REG_RC                 ",Tspecial_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_WRITE_RD                   ,"out_ISSUE_WRITE_RD                   ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_NUM_REG_RD                 ,"out_ISSUE_NUM_REG_RD                 ",Tgeneral_address_t,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_WRITE_RE                   ,"out_ISSUE_WRITE_RE                   ",Tcontrol_t        ,_param->_nb_inst_issue);
+  ALLOC1_SC_SIGNAL(out_ISSUE_NUM_REG_RE                 ,"out_ISSUE_NUM_REG_RE                 ",Tspecial_address_t,_param->_nb_inst_issue);
+
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_VAL                 ," in_EXECUTE_LOOP_VAL                 ",Tcontrol_t        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL(out_EXECUTE_LOOP_ACK                 ,"out_EXECUTE_LOOP_ACK                 ",Tcontrol_t        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_FRONT_END_ID        ," in_EXECUTE_LOOP_FRONT_END_ID        ",Tcontext_t        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_CONTEXT_ID          ," in_EXECUTE_LOOP_CONTEXT_ID          ",Tcontext_t        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_PACKET_ID           ," in_EXECUTE_LOOP_PACKET_ID           ",Tpacket_t         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_TYPE                ," in_EXECUTE_LOOP_TYPE                ",Ttype_t           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_OPERATION           ," in_EXECUTE_LOOP_OPERATION           ",Toperation_t      ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_FLAGS               ," in_EXECUTE_LOOP_FLAGS               ",Tspecial_data_t   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_EXCEPTION           ," in_EXECUTE_LOOP_EXCEPTION           ",Texception_t      ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE         ," in_EXECUTE_LOOP_NO_SEQUENCE         ",Tcontrol_t        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_ADDRESS             ," in_EXECUTE_LOOP_ADDRESS             ",Tgeneral_data_t   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_DATA                ," in_EXECUTE_LOOP_DATA                ",Tgeneral_data_t   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+  ALLOC1_SC_SIGNAL(out_INSERT_VAL                       ,"out_INSERT_VAL                       ",Tcontrol_t        ,_param->_sum_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_ACK                       ," in_INSERT_ACK                       ",Tcontrol_t        ,_param->_sum_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RD_USE                    ,"out_INSERT_RD_USE                    ",Tcontrol_t        ,_param->_sum_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RD_NUM_REG                ,"out_INSERT_RD_NUM_REG                ",Tgeneral_address_t,_param->_sum_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RE_USE                    ,"out_INSERT_RE_USE                    ",Tcontrol_t        ,_param->_sum_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_RE_NUM_REG                ,"out_INSERT_RE_NUM_REG                ",Tspecial_address_t,_param->_sum_inst_insert);
+
+//   ALLOC1_SC_SIGNAL(out_RETIRE_VAL                       ,"out_RETIRE_VAL                       ",Tcontrol_t        ,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL( in_RETIRE_ACK                       ," in_RETIRE_ACK                       ",Tcontrol_t        ,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_OLD_USE                ,"out_RETIRE_RD_OLD_USE                ",Tcontrol_t        ,_param->_sum_inst_retire); 
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_OLD_NUM_REG            ,"out_RETIRE_RD_OLD_NUM_REG            ",Tgeneral_address_t,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_NEW_USE                ,"out_RETIRE_RD_NEW_USE                ",Tcontrol_t        ,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RD_NEW_NUM_REG            ,"out_RETIRE_RD_NEW_NUM_REG            ",Tgeneral_address_t,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_OLD_USE                ,"out_RETIRE_RE_OLD_USE                ",Tcontrol_t        ,_param->_sum_inst_retire); 
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_OLD_NUM_REG            ,"out_RETIRE_RE_OLD_NUM_REG            ",Tspecial_address_t,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_NEW_USE                ,"out_RETIRE_RE_NEW_USE                ",Tcontrol_t        ,_param->_sum_inst_retire);
+//   ALLOC1_SC_SIGNAL(out_RETIRE_RE_NEW_NUM_REG            ,"out_RETIRE_RE_NEW_NUM_REG            ",Tspecial_address_t,_param->_sum_inst_retire);
+
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_VAL              ,"out_BRANCH_COMPLETE_VAL              ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ACK              ," in_BRANCH_COMPLETE_ACK              ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_FRONT_END_ID     ,"out_BRANCH_COMPLETE_FRONT_END_ID     ",Tcontext_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID       ,"out_BRANCH_COMPLETE_CONTEXT_ID       ",Tcontext_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_DEPTH            ,"out_BRANCH_COMPLETE_DEPTH            ",Tdepth_t          ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS          ,"out_BRANCH_COMPLETE_ADDRESS          ",Taddress_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_FLAG             ,"out_BRANCH_COMPLETE_FLAG             ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+  ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ," in_BRANCH_COMPLETE_MISS_PREDICTION  ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
+
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_VAL                 ,"out_COMMIT_EVENT_VAL                 ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ACK                 ," in_COMMIT_EVENT_ACK                 ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_FRONT_END_ID        ,"out_COMMIT_EVENT_FRONT_END_ID        ",Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_CONTEXT_ID          ,"out_COMMIT_EVENT_CONTEXT_ID          ",Tcontext_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_DEPTH               ,"out_COMMIT_EVENT_DEPTH               ",Tdepth_t          );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_TYPE                ,"out_COMMIT_EVENT_TYPE                ",Tevent_type_t     );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_IS_DELAY_SLOT       ,"out_COMMIT_EVENT_IS_DELAY_SLOT       ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS             ,"out_COMMIT_EVENT_ADDRESS             ",Taddress_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR        ,"out_COMMIT_EVENT_ADDRESS_EPCR        ",Taddress_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ",Tcontrol_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR        ,"out_COMMIT_EVENT_ADDRESS_EEAR        ",Taddress_t        );
+
+  ALLOC2_SC_SIGNAL( in_EVENT_VAL                        ," in_EVENT_VAL                        ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_EVENT_ACK                        ,"out_EVENT_ACK                        ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_EVENT_ADDRESS                    ," in_EVENT_ADDRESS                    ",Taddress_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT               ," in_EVENT_ADDRESS_NEXT               ",Taddress_t        ,_param->_nb_front_end,_param->_nb_context[it1]); 
+  ALLOC2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL           ," in_EVENT_ADDRESS_NEXT_VAL           ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_EVENT_IS_DS_TAKE                 ," in_EVENT_IS_DS_TAKE                 ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_VAL                    ," in_SPR_EVENT_VAL                    ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_EVENT_ACK                    ,"out_SPR_EVENT_ACK                    ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_EPCR                   ," in_SPR_EVENT_EPCR                   ",Tspr_t            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_EEAR_WEN               ," in_SPR_EVENT_EEAR_WEN               ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_EEAR                   ," in_SPR_EVENT_EEAR                   ",Tspr_t            ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_SR_DSX                 ," in_SPR_EVENT_SR_DSX                 ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_SR_TO_ESR              ," in_SPR_EVENT_SR_TO_ESR              ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_ALL               ,"out_NB_INST_COMMIT_ALL               ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_MEM               ,"out_NB_INST_COMMIT_MEM               ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL( in_DEPTH_MIN                        ," in_DEPTH_MIN                        ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_DEPTH_MAX                        ," in_DEPTH_MAX                        ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL(out_SPR_SR_IEE                       ,"out_SPR_SR_IEE                       ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_SR_EPH                       ,"out_SPR_SR_EPH                       ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _OOO_Engine.\n"),name.c_str());
+
+  (*(_OOO_Engine->in_CLOCK))        (*(in_CLOCK));
+  (*(_OOO_Engine->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_VAL                       ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_RENAME_ACK                       ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_FRONT_END_ID              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_CONTEXT_ID                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  if (_param->_have_port_depth)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_DEPTH                     ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_TYPE                      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_OPERATION                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_IMMEDIAT                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_READ_RA                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NUM_REG_RA                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_READ_RB                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NUM_REG_RB                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_READ_RC                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NUM_REG_RC                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_WRITE_RD                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NUM_REG_RD                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_WRITE_RE                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NUM_REG_RE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_EXCEPTION_USE             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_EXCEPTION                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_VAL                        ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine, in_ISSUE_ACK                        ,_param->_nb_inst_issue);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_FRONT_END_ID               ,_param->_nb_inst_issue);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_CONTEXT_ID                 ,_param->_nb_inst_issue);
+  if (_param->_have_port_rob_ptr)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_PACKET_ID                  ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_TYPE                       ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_OPERATION                  ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_STORE_QUEUE_PTR_WRITE      ,_param->_nb_inst_issue);
+  if (_param->_have_port_load_queue_ptr)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_LOAD_QUEUE_PTR_WRITE       ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_HAS_IMMEDIAT               ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_IMMEDIAT                   ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_READ_RA                    ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_NUM_REG_RA                 ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_READ_RB                    ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_NUM_REG_RB                 ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_READ_RC                    ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_NUM_REG_RC                 ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_WRITE_RD                   ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_NUM_REG_RD                 ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_WRITE_RE                   ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_ISSUE_NUM_REG_RE                 ,_param->_nb_inst_issue);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_VAL                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_EXECUTE_LOOP_ACK                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  if (_param->_have_port_front_end_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_FRONT_END_ID        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  if (_param->_have_port_context_id)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_CONTEXT_ID          ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  if (_param->_have_port_rob_ptr)
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_PACKET_ID           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_TYPE                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_OPERATION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_FLAGS               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_EXCEPTION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_NO_SEQUENCE         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_ADDRESS             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EXECUTE_LOOP_DATA                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_INSERT_VAL                       ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine, in_INSERT_ACK                       ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_INSERT_RD_USE                    ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_INSERT_RD_NUM_REG                ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_INSERT_RE_USE                    ,_param->_sum_inst_insert);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_INSERT_RE_NUM_REG                ,_param->_sum_inst_insert);
+
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_VAL                       ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine, in_RETIRE_ACK                       ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RD_OLD_USE                ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RD_OLD_NUM_REG            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RD_NEW_USE                ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RD_NEW_NUM_REG            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RE_OLD_USE                ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RE_OLD_NUM_REG            ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RE_NEW_USE                ,_param->_sum_inst_retire);
+//   INSTANCE1_SC_SIGNAL(_OOO_Engine,out_RETIRE_RE_NEW_NUM_REG            ,_param->_sum_inst_retire);
+
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_BRANCH_COMPLETE_VAL              ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine, in_BRANCH_COMPLETE_ACK              ,_param->_nb_inst_issue);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_BRANCH_COMPLETE_FRONT_END_ID     ,_param->_nb_inst_issue);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_BRANCH_COMPLETE_CONTEXT_ID       ,_param->_nb_inst_issue);
+  if (_param->_have_port_depth)
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_BRANCH_COMPLETE_DEPTH            ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_BRANCH_COMPLETE_ADDRESS          ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine,out_BRANCH_COMPLETE_FLAG             ,_param->_nb_inst_issue);
+  INSTANCE1_SC_SIGNAL(_OOO_Engine, in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_issue);
+
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_VAL                 );
+  INSTANCE_SC_SIGNAL (_OOO_Engine, in_COMMIT_EVENT_ACK                 );
+  if (_param->_have_port_front_end_id)
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_FRONT_END_ID        );
+  if (_param->_have_port_context_id)
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_CONTEXT_ID          );
+  if (_param->_have_port_depth)
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_DEPTH               );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_TYPE                );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_IS_DELAY_SLOT       );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS             );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR        );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR        );
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_EVENT_ACK                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EVENT_ADDRESS                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EVENT_ADDRESS_NEXT               ,_param->_nb_front_end,_param->_nb_context[it1]); 
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EVENT_ADDRESS_NEXT_VAL           ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EVENT_IS_DS_TAKE                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_SPR_EVENT_VAL                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_SPR_EVENT_ACK                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_SPR_EVENT_EPCR                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_SPR_EVENT_EEAR_WEN               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_SPR_EVENT_EEAR                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_SPR_EVENT_SR_DSX                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_SPR_EVENT_SR_TO_ESR              ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_NB_INST_COMMIT_ALL               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_NB_INST_COMMIT_MEM               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  
+  for (uint32_t i=0; i<_param->_nb_front_end; i++)
+    for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+      if (_param->_have_port_depth)
+        INSTANCE_SC_SIGNAL(_OOO_Engine, in_DEPTH_MIN  [i][j]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_DEPTH_MAX                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_SPR_SR_IEE                       ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine,out_SPR_SR_EPH                       ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      SC_START(1);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE2_SC_SIGNAL( in_RENAME_VAL                       ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL(out_RENAME_ACK                       ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_FRONT_END_ID              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_CONTEXT_ID                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_DEPTH                     ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_TYPE                      ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_OPERATION                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IMMEDIAT                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_READ_RA                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_NUM_REG_RA                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_READ_RB                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_NUM_REG_RB                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_READ_RC                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_NUM_REG_RC                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_WRITE_RD                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_NUM_REG_RD                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_WRITE_RE                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_NUM_REG_RE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_EXCEPTION_USE             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_EXCEPTION                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  
+  DELETE1_SC_SIGNAL(out_ISSUE_VAL                        ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL( in_ISSUE_ACK                        ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_FRONT_END_ID               ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_CONTEXT_ID                 ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_PACKET_ID                  ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_TYPE                       ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_OPERATION                  ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_WRITE      ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_LOAD_QUEUE_PTR_WRITE       ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_HAS_IMMEDIAT               ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_IMMEDIAT                   ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_READ_RA                    ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_NUM_REG_RA                 ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_READ_RB                    ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_NUM_REG_RB                 ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_READ_RC                    ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_NUM_REG_RC                 ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_WRITE_RD                   ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_NUM_REG_RD                 ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_WRITE_RE                   ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_ISSUE_NUM_REG_RE                 ,_param->_nb_inst_issue);
+  
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_VAL                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL(out_EXECUTE_LOOP_ACK                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_FRONT_END_ID        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_CONTEXT_ID          ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_PACKET_ID           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_TYPE                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_OPERATION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_FLAGS               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_EXCEPTION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_ADDRESS             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  DELETE2_SC_SIGNAL( in_EXECUTE_LOOP_DATA                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+  
+  DELETE1_SC_SIGNAL(out_INSERT_VAL                       ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_ACK                       ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RD_USE                    ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RD_NUM_REG                ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RE_USE                    ,_param->_sum_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_RE_NUM_REG                ,_param->_sum_inst_insert);
+  
+//   DELETE1_SC_SIGNAL(out_RETIRE_VAL                       ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL( in_RETIRE_ACK                       ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_OLD_USE                ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_OLD_NUM_REG            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_NEW_USE                ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RD_NEW_NUM_REG            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_OLD_USE                ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_OLD_NUM_REG            ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_NEW_USE                ,_param->_sum_inst_retire);
+//   DELETE1_SC_SIGNAL(out_RETIRE_RE_NEW_NUM_REG            ,_param->_sum_inst_retire);
+  
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_VAL              ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ACK              ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_FRONT_END_ID     ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID       ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_DEPTH            ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS          ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_FLAG             ,_param->_nb_inst_issue);
+  DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_issue);
+  
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_VAL                 );
+  DELETE_SC_SIGNAL  ( in_COMMIT_EVENT_ACK                 );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_FRONT_END_ID        );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_CONTEXT_ID          );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_DEPTH               );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_TYPE                );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_IS_DELAY_SLOT       );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS             );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EPCR        );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EEAR        );
+  
+  DELETE2_SC_SIGNAL( in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_EVENT_ACK                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_EVENT_ADDRESS                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT               ,_param->_nb_front_end,_param->_nb_context[it1]); 
+  DELETE2_SC_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL           ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_EVENT_IS_DS_TAKE                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_VAL                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_EVENT_ACK                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_EPCR                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_EEAR_WEN               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_EEAR                   ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_SR_DSX                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_SR_TO_ESR              ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_ALL               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_MEM               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_DEPTH_MIN                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_DEPTH_MAX                        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_SR_IEE                       ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_SR_EPH                       ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+#endif
+
+  delete _OOO_Engine;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile	(revision 88)
@@ -0,0 +1,24 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ./
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ Library ]------------------------------------------
+LIBRARY				= $(DIR_LIB)/libSpecial_Register_unit.a
+
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_component
+
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Component
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.defs
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.defs	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.defs	(revision 88)
@@ -0,0 +1,11 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT_MORPHEO		= ../../../../..
+DIR_MORPHEO			= $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.deps
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.deps	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/Makefile.deps	(revision 88)
@@ -0,0 +1,38 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+# DIR_MORPHEO must be defined
+
+Special_Register_unit			= yes
+
+ifndef Behavioural
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.deps
+endif
+
+#-----[ Directory ]----------------------------------------
+
+Special_Register_unit_DIR			=	$(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit
+
+#-----[ Library ]------------------------------------------
+
+Special_Register_unit_LIBRARY		= 	-lSpecial_Register_unit	\
+					$(Behavioural_LIBRARY)	
+
+Special_Register_unit_DIR_LIBRARY		=	-L$(Special_Register_unit_DIR)/lib	\
+					$(Behavioural_DIR_LIBRARY)
+
+#-----[ Rules ]--------------------------------------------
+
+Special_Register_unit_library		:
+				@\
+				$(MAKE) Behavioural_library;		\
+				$(MAKE) --directory=$(Special_Register_unit_DIR) --makefile=Makefile;
+
+Special_Register_unit_library_clean	:
+				@\
+				$(MAKE) Behavioural_library_clean;	\
+				$(MAKE) --directory=$(Special_Register_unit_DIR) --makefile=Makefile clean;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/Makefile	(revision 88)
@@ -0,0 +1,32 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+LIBRARY				= $(Special_Register_unit_LIBRARY)
+
+DIR_LIBRARY			= $(Special_Register_unit_DIR_LIBRARY)
+
+#-----[ include ]------------------------------------------
+
+all				:
+				@$(MAKE) all_selftest
+
+library				: Special_Register_unit_library
+
+library_clean			: Special_Register_unit_library_clean
+
+local_clean			:
+
+include                         $(DIR_COMPONENT)/Makefile.deps
+include                         $(DIR_MORPHEO)/Behavioural/Makefile.flags
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Selftest
+include 			$(DIR_MORPHEO)/Behavioural/Makefile.Synthesis
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/config-min.cfg	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/config-min.cfg	(revision 88)
@@ -0,0 +1,4 @@
+Special_Register_unit
+1	1	+1 # nb_front_end         
+1	1	+1 # nb_context        [0] [nb_front_end]
+1	1	+1 # nb_inst_reexecute    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/include/test.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/include/test.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/include/test.h	(revision 88)
@@ -0,0 +1,30 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test "RegisterFile"
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#define NB_ITERATION  1024
+#define CYCLE_MAX     (1024*NB_ITERATION)
+
+#include "Common/include/Test.h"
+#include "Common/include/Time.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+using namespace std;
+using namespace morpheo;
+using namespace morpheo::behavioural;
+using namespace morpheo::behavioural::core;
+using namespace morpheo::behavioural::core::multi_ooo_engine;
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine;
+
+using namespace morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit;
+
+void test    (string name,
+	      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters * param);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 88)
@@ -0,0 +1,109 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/include/test.h"
+
+#define NB_PARAMS 2
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * nb_front_end                     (uint32_t)\n"));
+  err (_(" * nb_context        [nb_front_end] (uint32_t)\n"));
+  err (_(" * nb_inst_reexecute                (uint32_t)\n"));
+  
+  exit (1);
+}
+
+#ifndef SYSTEMC
+int main    (int argc, char * argv[])
+#else
+int sc_main (int argc, char * argv[])
+#endif
+{
+  if (argc <= static_cast<int>(2+NB_PARAMS))
+    usage (argc, argv);
+
+  uint32_t x = 1;
+
+  string name = argv[x++];
+
+  uint32_t     _nb_front_end          = fromString<uint32_t>(argv[x++]);
+
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_front_end))
+    usage (argc, argv);
+
+  uint32_t   * _nb_context            = new uint32_t [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    _nb_context [i] = fromString<uint32_t>(argv[x++]);
+
+  uint32_t     _nb_inst_reexecute     = fromString<uint32_t>(argv[x++]);
+
+  bool     *** _implement_group       = new bool ** [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _implement_group [i] = new bool * [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+	{
+	  _implement_group [i][j] = new bool [NB_GROUP];
+
+	  for (uint32_t k=0; k<NB_GROUP; k++)
+	    _implement_group [i][j][k] = false;
+
+	  _implement_group [i][j][GROUP_SYSTEM_AND_CONTROL] = true;
+	  _implement_group [i][j][GROUP_DCACHE            ] = true;
+	}
+    }
+
+  int _return = EXIT_SUCCESS;
+  try 
+    {
+      morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters * param = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters
+	(
+	 _nb_front_end      ,
+	 _nb_context        ,
+	 _nb_inst_reexecute ,
+	 _implement_group   ,
+         true //is_toplevel
+        );
+      
+      msg(_("%s"),param->print(0).c_str());
+      
+      test (name,param);
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+      msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+  
+  try 
+    {
+      if (_return == EXIT_SUCCESS)
+	TEST_OK("Special_Register_unit : no error");
+      else
+	TEST_KO("Special_Register_unit : a lot of error");
+    }
+  catch (morpheo::ErrorMorpheo & error)
+    {
+//       msg (_("<%s> :\n%s"),name.c_str(), error.what ());
+      _return = EXIT_FAILURE;
+    }
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+	delete [] _implement_group [i][j];
+      delete [] _implement_group [i];
+    }
+  delete [] _implement_group;
+
+  delete [] _nb_context;
+
+  return (_return);
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/test.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/test.cpp	(revision 88)
@@ -0,0 +1,335 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ * Test
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
+
+void test (string name,
+	   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters * _param)
+{
+  msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
+
+#ifdef STATISTICS
+  morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
+#endif
+
+  Tusage_t _usage = USE_ALL;
+
+//   _usage = usage_unset(_usage,USE_SYSTEMC              );
+//   _usage = usage_unset(_usage,USE_VHDL                 );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH       );
+//   _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
+//   _usage = usage_unset(_usage,USE_POSITION             );
+   _usage = usage_unset(_usage,USE_STATISTICS           );
+//   _usage = usage_unset(_usage,USE_INFORMATION          );
+
+  Special_Register_unit * _Special_Register_unit = new Special_Register_unit 
+    (name.c_str(),
+#ifdef STATISTICS
+     _parameters_statistics,
+#endif
+     _param,
+     _usage);
+  
+#ifdef SYSTEMC
+  if (usage_is_set(_usage,USE_SYSTEMC))
+    {
+  /*********************************************************************
+   * Déclarations des signaux
+   *********************************************************************/
+  string rename;
+
+  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
+  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_VAL         ," in_SPR_ACCESS_VAL         ",Tcontrol_t    ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_ACCESS_ACK         ,"out_SPR_ACCESS_ACK         ",Tcontrol_t    ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_FRONT_END_ID," in_SPR_ACCESS_FRONT_END_ID",Tcontext_t    ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_CONTEXT_ID  ," in_SPR_ACCESS_CONTEXT_ID  ",Tcontext_t    ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_WEN         ," in_SPR_ACCESS_WEN         ",Tcontrol_t    ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_NUM_GROUP   ," in_SPR_ACCESS_NUM_GROUP   ",Tspr_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_NUM_REG     ," in_SPR_ACCESS_NUM_REG     ",Tspr_address_t,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL( in_SPR_ACCESS_WDATA       ," in_SPR_ACCESS_WDATA       ",Tspr_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_ACCESS_RDATA       ,"out_SPR_ACCESS_RDATA       ",Tspr_t        ,_param->_nb_inst_reexecute);
+  ALLOC1_SC_SIGNAL(out_SPR_ACCESS_INVALID     ,"out_SPR_ACCESS_INVALID     ",Tcontrol_t    ,_param->_nb_inst_reexecute);
+  ALLOC2_SC_SIGNAL(out_SPR_READ_SR            ,"out_SPR_READ_SR            ",Tspr_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_VAL         ," in_SPR_COMMIT_VAL         ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_COMMIT_ACK         ,"out_SPR_COMMIT_ACK         ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_SR_F_VAL    ," in_SPR_COMMIT_SR_F_VAL    ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_SR_F        ," in_SPR_COMMIT_SR_F        ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_SR_CY_VAL   ," in_SPR_COMMIT_SR_CY_VAL   ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_SR_CY       ," in_SPR_COMMIT_SR_CY       ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_SR_OV_VAL   ," in_SPR_COMMIT_SR_OV_VAL   ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_COMMIT_SR_OV       ," in_SPR_COMMIT_SR_OV       ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_VAL          ," in_SPR_EVENT_VAL          ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL(out_SPR_EVENT_ACK          ,"out_SPR_EVENT_ACK          ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_EPCR         ," in_SPR_EVENT_EPCR         ",Tspr_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_EEAR_WEN     ," in_SPR_EVENT_EEAR_WEN     ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_EEAR         ," in_SPR_EVENT_EEAR         ",Tspr_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_SR_DSX       ," in_SPR_EVENT_SR_DSX       ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_SPR_EVENT_SR_TO_ESR    ," in_SPR_EVENT_SR_TO_ESR    ",Tcontrol_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+  /********************************************************
+   * Instanciation
+   ********************************************************/
+  
+  msg(_("<%s> : Instanciation of _Special_Register_unit.\n"),name.c_str());
+
+  (*(_Special_Register_unit->in_CLOCK))        (*(in_CLOCK));
+  (*(_Special_Register_unit->in_NRESET))       (*(in_NRESET));
+
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_VAL          ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit,out_SPR_ACCESS_ACK          ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_WEN          ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_front_end_id)
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_FRONT_END_ID ,_param->_nb_inst_reexecute);
+  if (_param->_have_port_context_id)
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_CONTEXT_ID   ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_NUM_GROUP    ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_NUM_REG      ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit, in_SPR_ACCESS_WDATA        ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit,out_SPR_ACCESS_RDATA        ,_param->_nb_inst_reexecute);
+  INSTANCE1_SC_SIGNAL(_Special_Register_unit,out_SPR_ACCESS_INVALID      ,_param->_nb_inst_reexecute);
+
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit,out_SPR_READ_SR             ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_VAL          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit,out_SPR_COMMIT_ACK          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_SR_F_VAL     ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_SR_F         ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_SR_CY_VAL    ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_SR_CY        ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_SR_OV_VAL    ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_COMMIT_SR_OV        ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_EVENT_VAL           ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit,out_SPR_EVENT_ACK           ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_EVENT_EPCR          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_EVENT_EEAR_WEN      ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_EVENT_EEAR          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_EVENT_SR_DSX        ,_param->_nb_front_end, _param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Special_Register_unit, in_SPR_EVENT_SR_TO_ESR     ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+  msg(_("<%s> : Start Simulation ............\n"),name.c_str());
+    
+  Time * _time = new Time();
+  
+  /********************************************************
+   * Simulation - Begin
+   ********************************************************/
+
+  // Initialisation
+
+  const uint32_t seed = 0;
+//const uint32_t seed = static_cast<uint32_t>(time(NULL));
+
+  srand(seed);
+
+  const  int32_t percent_transaction_spr_access = 75;
+  const  int32_t percent_transaction_spr_commit = 75;
+  const  int32_t percent_transaction_spr_event  = 75;
+
+  SC_START(0);
+  LABEL("Initialisation");
+
+  LABEL("Reset");
+  in_NRESET->write(0);
+  SC_START(5);
+  in_NRESET->write(1);  
+
+  Tspr_t sr   [_param->_nb_front_end][_param->_max_nb_context];
+  Tspr_t dccr [_param->_nb_front_end][_param->_max_nb_context];
+
+  for (uint32_t i=0; i<_param->_nb_front_end; i++)
+    for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+      {
+	sr    [i][j] = 0x00008001;
+	dccr  [i][j] = 0x0;
+	TEST(Tspr_t, out_SPR_READ_SR [i][j]->read(), sr [i][j]);
+      }
+
+  LABEL("Loop of Test");
+
+  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
+    {
+      LABEL("Iteration %d",iteration);
+
+      Tcontext_t front_end = rand()%_param->_nb_front_end;
+      Tcontext_t context   = rand()%_param->_nb_context[front_end];
+      uint32_t   port      = rand()%_param->_nb_inst_reexecute;
+      uint32_t   config    = rand()%3;
+      Tcontrol_t wen       = rand()%2;
+      Tspr_t     wdata     = rand();
+      {
+	in_SPR_ACCESS_VAL          [port]->write((rand()%100)<percent_transaction_spr_access);
+	in_SPR_ACCESS_FRONT_END_ID [port]->write(front_end);
+	in_SPR_ACCESS_CONTEXT_ID   [port]->write(context);
+
+	switch (config)
+	  {
+	  case 0 :
+	    wen = 0;
+	    in_SPR_ACCESS_NUM_GROUP    [port]->write(0);
+	    in_SPR_ACCESS_NUM_REG      [port]->write(17);
+	    break;
+	  case 1 :
+	    in_SPR_ACCESS_NUM_GROUP    [port]->write(3);
+	    in_SPR_ACCESS_NUM_REG      [port]->write(0);
+	    break;
+	  case 2 :
+	    in_SPR_ACCESS_NUM_GROUP    [port]->write(5);
+	    in_SPR_ACCESS_NUM_REG      [port]->write(1);
+	    break;
+	  }
+	
+	in_SPR_ACCESS_WEN          [port]->write(wen);
+	in_SPR_ACCESS_WDATA        [port]->write(wdata);
+      }
+
+      {
+	in_SPR_COMMIT_VAL       [front_end][context]->write((rand()%100)<percent_transaction_spr_commit);
+	in_SPR_COMMIT_SR_F_VAL  [front_end][context]->write((rand()%100)<percent_transaction_spr_commit);
+	in_SPR_COMMIT_SR_CY_VAL [front_end][context]->write((rand()%100)<percent_transaction_spr_commit);
+	in_SPR_COMMIT_SR_OV_VAL [front_end][context]->write((rand()%100)<percent_transaction_spr_commit);
+	in_SPR_COMMIT_SR_F      [front_end][context]->write(rand()%2);
+	in_SPR_COMMIT_SR_CY     [front_end][context]->write(rand()%2);
+	in_SPR_COMMIT_SR_OV     [front_end][context]->write(rand()%2);
+      }
+
+      {
+        in_SPR_EVENT_VAL        [front_end][context]->write((rand()%100)<percent_transaction_spr_event);
+        in_SPR_EVENT_EPCR       [front_end][context]->write(rand());
+        in_SPR_EVENT_EEAR_WEN   [front_end][context]->write(rand()%2);
+        in_SPR_EVENT_EEAR       [front_end][context]->write(rand());
+        in_SPR_EVENT_SR_DSX     [front_end][context]->write(rand()%2);
+        in_SPR_EVENT_SR_TO_ESR  [front_end][context]->write(rand()%2);
+      }
+
+      SC_START(0);
+
+      if (in_SPR_ACCESS_VAL [port]->read() and out_SPR_ACCESS_ACK [port]->read())
+	{
+	  LABEL("SPR_ACCESS [%d] - Transaction accepted.",port);
+	  LABEL(" * front_end : %d"  ,(unsigned int)front_end);
+	  LABEL(" * context   : %d"  ,(unsigned int)context  );
+	  LABEL(" * config    : %d"  ,(unsigned int)config   );
+	  LABEL(" * wen       : %d"  ,(unsigned int)wen      );
+	  LABEL(" * wdata     : %d"  ,(unsigned int)wdata&0xff );
+	  
+	switch (config)
+	  {
+	  case 0 :
+	    TEST(Tspr_t    ,out_SPR_ACCESS_RDATA   [port]->read(),sr[front_end][context]);
+	    TEST(Tcontrol_t,out_SPR_ACCESS_INVALID [port]->read(),0);
+	    break;
+	  case 1 :
+	    if (sr[front_end][context] & 1)
+	      {
+		TEST(Tspr_t    ,out_SPR_ACCESS_RDATA   [port]->read(),dccr[front_end][context]&0xff);
+		TEST(Tcontrol_t,out_SPR_ACCESS_INVALID [port]->read(),0);
+
+		if (wen)
+		  dccr[front_end][context] = wdata;
+	      }
+	    else
+	      TEST(Tcontrol_t,out_SPR_ACCESS_INVALID [port]->read(),1);
+	    break;
+	  case 2 :
+	    TEST(Tcontrol_t,out_SPR_ACCESS_INVALID [port]->read(),1);
+	    break;
+	  }
+	}
+
+      if (in_SPR_COMMIT_VAL [front_end][context]->read() and out_SPR_COMMIT_ACK [front_end][context]->read())
+	{
+	  LABEL("SPR_COMMIT [%d][%d] - Transaction accepted.",front_end,context);
+	  LABEL(" * cy_val   : %d",in_SPR_COMMIT_SR_CY_VAL [front_end][context]->read());
+	  LABEL(" * cy       : %d",in_SPR_COMMIT_SR_CY     [front_end][context]->read());
+	  LABEL(" * ov_val   : %d",in_SPR_COMMIT_SR_OV_VAL [front_end][context]->read());
+	  LABEL(" * ov       : %d",in_SPR_COMMIT_SR_OV     [front_end][context]->read());
+	  LABEL(" * f_val    : %d",in_SPR_COMMIT_SR_F_VAL  [front_end][context]->read());
+	  LABEL(" * f        : %d",in_SPR_COMMIT_SR_F      [front_end][context]->read());
+	  LABEL(" * sr (old) : 0x%d",sr[front_end][context]);
+	  if (in_SPR_COMMIT_SR_CY_VAL [front_end][context]->read())
+	    CHANGE_FLAG(sr[front_end][context], 10, in_SPR_COMMIT_SR_CY [front_end][context]->read());
+
+	  if (in_SPR_COMMIT_SR_OV_VAL [front_end][context]->read())
+	    CHANGE_FLAG(sr[front_end][context], 11, in_SPR_COMMIT_SR_OV [front_end][context]->read());
+
+	  if (in_SPR_COMMIT_SR_F_VAL [front_end][context]->read())
+	    CHANGE_FLAG(sr[front_end][context], 9, in_SPR_COMMIT_SR_F [front_end][context]->read());
+	  LABEL(" * sr (new) : 0x%d",sr[front_end][context]);
+	}
+
+      if (in_SPR_EVENT_VAL [front_end][context]->read() and out_SPR_EVENT_ACK [front_end][context]->read())
+	{
+	  LABEL("SPR_EVENT  [%d][%d] - Transaction accepted.",front_end,context);
+
+          CHANGE_FLAG(sr[front_end][context], 13, in_SPR_EVENT_SR_DSX [front_end][context]->read());
+        }
+
+      SC_START(1);
+
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	  TEST(Tspr_t, out_SPR_READ_SR [i][j]->read(), sr [i][j]);
+
+      in_SPR_ACCESS_VAL [port]->write(0);
+      in_SPR_COMMIT_VAL  [front_end][context]->write(0);
+    }
+
+  /********************************************************
+   * Simulation - End
+   ********************************************************/
+
+  TEST_OK ("End of Simulation");
+  delete _time;
+
+  msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
+
+  delete in_CLOCK;
+  delete in_NRESET;
+
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_VAL          ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_ACCESS_ACK          ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_WEN          ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_CONTEXT_ID   ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_FRONT_END_ID ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_NUM_GROUP    ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_NUM_REG      ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL( in_SPR_ACCESS_WDATA        ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_ACCESS_RDATA        ,_param->_nb_inst_reexecute);
+  DELETE1_SC_SIGNAL(out_SPR_ACCESS_INVALID      ,_param->_nb_inst_reexecute);
+  
+  DELETE2_SC_SIGNAL(out_SPR_READ_SR             ,_param->_nb_front_end, _param->_nb_context[it1]);
+  
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_VAL          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_COMMIT_ACK          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_SR_F_VAL     ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_SR_F         ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_SR_CY_VAL    ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_SR_CY        ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_SR_OV_VAL    ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_COMMIT_SR_OV        ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_VAL           ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL(out_SPR_EVENT_ACK           ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_EPCR          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_EEAR_WEN      ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_EEAR          ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_SR_DSX        ,_param->_nb_front_end, _param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_SPR_EVENT_SR_TO_ESR     ,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+#endif
+
+  delete _Special_Register_unit;
+#ifdef STATISTICS
+  delete _parameters_statistics;
+#endif
+}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/Special_Register_unit.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/Special_Register_unit.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/Special_Register_unit.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{Special_Register_unit}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h	(revision 88)
@@ -0,0 +1,65 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+  public : uint32_t     _nb_front_end          ;
+  public : uint32_t   * _nb_context            ;//[nb_front_end]
+  public : uint32_t     _nb_inst_reexecute     ;
+  public : bool     *** _implement_group       ;//[nb_front_end][nb_context][NB_GROUP]
+
+  public : uint32_t     _max_nb_context        ;
+//public : uint32_t     _size_front_end_id     ;
+//public : uint32_t     _size_context_id       ;
+//  		      
+//public : bool         _have_port_front_end_id;
+//public : bool         _have_port_context_id  ;
+
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t     nb_front_end          ,
+			uint32_t   * nb_context            ,
+			uint32_t     nb_inst_reexecute     ,
+			bool     *** implement_group       ,
+                        bool         is_toplevel=false
+			);
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        void            copy       (void);
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+					    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters & x);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h	(revision 88)
@@ -0,0 +1,670 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_SPR_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_SPR_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h"
+#include "Behavioural/include/SPR.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+  //----------------------------------------------------------
+  // [x][x] GENERIC
+  //----------------------------------------------------------
+  class GENERIC : public morpheo::behavioural::SPR
+  {
+  public : Tspr_t x : 32;
+    
+  public :        GENERIC(uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) {};
+
+  public : void   reset (void  ) 
+    {
+      x = 0;
+    };
+  public : Tspr_t read  (void  )
+    {
+      return x=0;
+    };
+  public : void   write (Tspr_t x) 
+    {
+      this->x = x;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][0] VR
+  //----------------------------------------------------------
+  class VR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t   ver : 8;
+  public : const Tspr_t  _res :10;
+  public : const Tspr_t   cfg : 8;
+  public : const Tspr_t   rev : 8;
+
+  public :        VR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL):
+    // SPR (),
+    ver (0),
+   _res (0),
+    cfg (0),
+    rev (0){};
+
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((ver << 24) |
+	      (cfg << 16) |
+	      (rev <<  0));
+    }
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][1] UPR
+  //----------------------------------------------------------
+  class UPR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t   cup  : 8;
+  public : const Tspr_t  _res  : 8;
+  public : const Tspr_t   ttp  : 1;
+  public : const Tspr_t   pmp  : 1;
+  public : const Tspr_t   picp : 1;
+  public : const Tspr_t   pcup : 1;
+  public : const Tspr_t   dup  : 1;
+  public : const Tspr_t   mp   : 1;
+  public : const Tspr_t   imp  : 1;
+  public : const Tspr_t   dmp  : 1;
+  public : const Tspr_t   icp  : 1;
+  public : const Tspr_t   dcp  : 1;
+  public : const Tspr_t   up   : 1;
+
+  public :        UPR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL):
+    SPR (),
+    cup  (0),
+   _res  (0),
+    ttp  (0),
+    pmp  (0),
+    picp (0),
+    pcup (0),
+    dup  (0),
+    mp   (0),
+    imp  (0),
+    dmp  (0),
+    icp  (0),
+    dcp  (0),
+    up   (0)
+    {};
+
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((cup  << 24) |
+	      (ttp  << 10) |
+	      (pmp  <<  9) |
+	      (picp <<  8) |
+	      (pcup <<  7) |
+	      (dup  <<  6) |
+	      (mp   <<  5) |
+	      (imp  <<  4) |
+	      (dmp  <<  3) |
+	      (icp  <<  2) |
+	      (dcp  <<  1) |
+	      (up   <<  0));
+    }
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][2] CPUCFGR
+  //----------------------------------------------------------
+  class CPUCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res   : 22;
+  public : const Tspr_t   ov64s :  1; 
+  public : const Tspr_t   of64s :  1;
+  public : const Tspr_t   of32s :  1;
+  public : const Tspr_t   ob64s :  1;
+  public : const Tspr_t   ob32s :  1;
+  public : const Tspr_t   cgf   :  1;
+  public : const Tspr_t   nsdf  :  1;
+
+  public :        CPUCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL):
+   _res   (0), 
+    ov64s (0), 
+    of64s (0),
+    of32s (0),
+    ob64s (0),
+    ob32s (0),
+    cgf   (0),
+    nsdf  (0)
+    {};
+
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((ov64s << 9) | 
+	      (of64s << 8) |
+	      (of32s << 7) |
+	      (ob64s << 6) |
+	      (ob32s << 5) |
+	      (cgf   << 4) |
+	      (nsdf  << 0) );
+    }
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][3] DMMUCFGR
+  //----------------------------------------------------------
+  class DMMUCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res   : 20;
+  public : const Tspr_t   htr   :  1;
+  public : const Tspr_t   teiri :  1;
+  public : const Tspr_t   pri   :  1;
+  public : const Tspr_t   cri   :  1;
+  public : const Tspr_t   nae   :  3;
+  public : const Tspr_t   nts   :  3;
+  public : const Tspr_t   ntw   :  2;
+
+  public :        DMMUCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+   _res   (0),
+    htr   (0),
+    teiri (0),
+    pri   (0),
+    cri   (0),
+    nae   (0),
+    nts   (0),
+    ntw   (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((htr   << 11) |
+	      (teiri << 10) |
+	      (pri   <<  9) |
+	      (cri   <<  8) |
+	      (nae   <<  5) |
+	      (nts   <<  2) |
+	      (ntw   <<  0) );
+    };
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][4] IMMUCFGR
+  //----------------------------------------------------------
+  class IMMUCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res   : 20;
+  public : const Tspr_t   htr   :  1;
+  public : const Tspr_t   teiri :  1;
+  public : const Tspr_t   pri   :  1;
+  public : const Tspr_t   cri   :  1;
+  public : const Tspr_t   nae   :  3;
+  public : const Tspr_t   nts   :  3;
+  public : const Tspr_t   ntw   :  2;
+
+  public :        IMMUCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+   _res   (0),
+    htr   (0),
+    teiri (0),
+    pri   (0),
+    cri   (0),
+    nae   (0),
+    nts   (0),
+    ntw   (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((htr   << 11) |
+	      (teiri << 10) |
+	      (pri   <<  9) |
+	      (cri   <<  8) |
+	      (nae   <<  5) |
+	      (nts   <<  2) |
+	      (ntw   <<  0) );
+    };
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][5] DCCFGR
+  //----------------------------------------------------------
+  class DCCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res    : 17;
+  public : const Tspr_t   cbwbri :  1;
+  public : const Tspr_t   cbfri  :  1;
+  public : const Tspr_t   cblri  :  1;
+  public : const Tspr_t   cbpri  :  1;
+  public : const Tspr_t   cbiri  :  1;
+  public : const Tspr_t   ccri   :  1;
+  public : const Tspr_t   cws    :  1;
+  public : const Tspr_t   cbs    :  1;
+  public : const Tspr_t   ncs    :  4;
+  public : const Tspr_t   ncw    :  3;
+
+  public :        DCCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL):
+   _res    (0),
+    cbwbri (0),
+    cbfri  (0),
+    cblri  (0),
+    cbpri  (0),
+    cbiri  (0),
+    ccri   (0),
+    cws    (0),
+    cbs    (0),
+    ncs    (0),
+    ncw    (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((cbwbri << 14) |
+	      (cbfri  << 13) |
+	      (cblri  << 12) |
+	      (cbpri  << 11) |
+	      (cbiri  << 10) |
+	      (ccri   <<  9) |
+	      (cws    <<  8) |
+	      (cbs    <<  7) |
+	      (ncs    <<  3) |
+	      (ncw    <<  0) );
+    };
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][6] ICCFGR
+  //----------------------------------------------------------
+  class ICCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res1   : 19;
+  public : const Tspr_t   cblri  :  1;
+  public : const Tspr_t   cbpri  :  1;
+  public : const Tspr_t   cbiri  :  1;
+  public : const Tspr_t   ccri   :  1;
+  public : const Tspr_t  _res2   :  1;
+  public : const Tspr_t   cbs    :  1;
+  public : const Tspr_t   ncs    :  4;
+  public : const Tspr_t   ncw    :  3;
+
+  public :        ICCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL):
+   _res1   (0),
+    cblri  (0),
+    cbpri  (0),
+    cbiri  (0),
+    ccri   (0),
+   _res2   (0),
+    cbs    (0),
+    ncs    (0),
+    ncw    (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((cblri  << 12) |
+	      (cbpri  << 11) |
+	      (cbiri  << 10) |
+	      (ccri   <<  9) |
+	      (cbs    <<  7) |
+	      (ncs    <<  3) |
+	      (ncw    <<  0) );
+    };
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][7] DCFGR
+  //----------------------------------------------------------
+  class DCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res  : 28;
+  public : const Tspr_t   wpci :  1;
+  public : const Tspr_t   ndp  :  3;
+
+  public :        DCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+   _res  (0),
+    wpci (0),
+    ndp  (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((wpci << 3) |
+	      (ndp  << 0) );
+    };
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][8] PCCFGR
+  //----------------------------------------------------------
+  class PCCFGR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res : 29;
+  public : const Tspr_t   npc :  3;
+
+  public :        PCCFGR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+   _res (0),
+    npc (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((npc << 0));
+    };
+  public : void   write (Tspr_t x) {}; // All bit field is Read Only
+  };
+
+  //----------------------------------------------------------
+  // [0][16] NPC
+  //----------------------------------------------------------
+  class NPC : public GENERIC 
+  {
+  public : NPC (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [0][17] SR
+  //----------------------------------------------------------
+  class SR : public morpheo::behavioural::SPR
+  {
+  public :       Tspr_t   cid   :  4;
+  public : const Tspr_t  _res   : 11;
+  public :       Tspr_t   sumra :  1;
+  public : const Tspr_t   fo    :  1;
+  public :       Tspr_t   eph   :  1;
+  public :       Tspr_t   dsx   :  1;
+  public :       Tspr_t   ove   :  1;
+  public :       Tspr_t   ov    :  1;
+  public :       Tspr_t   cy    :  1;
+  public :       Tspr_t   f     :  1;
+  public :       Tspr_t   ce    :  1;
+  public :       Tspr_t   lee   :  1;
+  public :       Tspr_t   ime   :  1;
+  public :       Tspr_t   dme   :  1;
+  public :       Tspr_t   ice   :  1;
+  public :       Tspr_t   dce   :  1;
+  public :       Tspr_t   iee   :  1;
+  public :       Tspr_t   tee   :  1;
+  public :       Tspr_t   sm    :  1;
+
+  public :        SR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+   _res   (0),
+    fo    (1)
+    {};
+  public : void   reset (void  ) 
+    {
+      cid   = 0;
+      sumra = 0;
+      eph   = 0;
+      dsx   = 0;
+      ove   = 0;
+      ov    = 0;
+      cy    = 0;
+      f     = 0;
+      ce    = 0;
+      lee   = 0;
+      ime   = 0;
+      dme   = 0;
+      ice   = 0;
+      dce   = 0;
+      iee   = 0;
+      tee   = 0;
+      sm    = 1;
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((cid   << 28) |
+	      (sumra << 16) |
+	      (fo    << 15) |
+	      (eph   << 14) |
+	      (dsx   << 13) |
+	      (ove   << 12) |
+	      (ov    << 11) |
+	      (cy    << 10) |
+	      (f     <<  9) |
+	      (ce    <<  8) |
+	      (lee   <<  7) |
+	      (ime   <<  6) |
+	      (dme   <<  5) |
+	      (ice   <<  4) |
+	      (dce   <<  3) |
+	      (iee   <<  2) |
+	      (tee   <<  1) |
+	      (sm    <<  0) );
+    };
+  public : void   write (Tspr_t x) 
+    {
+      cid   = x >> 28;
+      sumra = x >> 16;
+      eph   = x >> 14;
+      dsx   = x >> 13;
+      ove   = x >> 12;
+      ov    = x >> 11;
+      cy    = x >> 10;
+      f     = x >>  9;
+      ce    = x >>  8;
+      lee   = x >>  7;
+      ime   = x >>  6;
+      dme   = x >>  5;
+      ice   = x >>  4;
+      dce   = x >>  3;
+      iee   = x >>  2;
+      tee   = x >>  1;
+      sm    = x >>  0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][18] PPC
+  //----------------------------------------------------------
+  class PPC : public GENERIC 
+  {
+  public : PPC (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [0][19] CID
+  //----------------------------------------------------------
+  class CID : public GENERIC 
+  {
+  public : CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [0][20] FPCSR
+  //----------------------------------------------------------
+  class FPCSR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res  : 20;
+  public :       Tspr_t   dzf  :  1;
+  public :       Tspr_t   inf  :  1;
+  public :       Tspr_t   ivf  :  1;
+  public :       Tspr_t   ixf  :  1;
+  public :       Tspr_t   zf   :  1;
+  public :       Tspr_t   qnf  :  1;
+  public :       Tspr_t   snf  :  1;
+  public :       Tspr_t   unf  :  1;
+  public :       Tspr_t   ovf  :  1;
+  public :       Tspr_t   rm   :  2;
+  public :       Tspr_t   fpee :  1;
+
+  public :        FPCSR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+    _res (0)
+    {};
+  public : void   reset (void  ) 
+    {
+      dzf  = 0;
+      inf  = 0;
+      ivf  = 0;
+      ixf  = 0;
+      zf   = 0;
+      qnf  = 0;
+      snf  = 0;
+      unf  = 0;
+      ovf  = 0;
+      rm   = 0;
+      fpee = 0;
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((dzf  << 11) |
+	      (inf  << 10) |
+	      (ivf  <<  9) |
+	      (ixf  <<  8) |
+	      (zf   <<  7) |
+	      (qnf  <<  6) |
+	      (snf  <<  5) |
+	      (unf  <<  4) |
+	      (ovf  <<  3) |
+	      (rm   <<  1) |
+	      (fpee <<  0) );
+    };
+  public : void   write (Tspr_t x) 
+    {
+      dzf  = x >> 11;
+      inf  = x >> 10;
+      ivf  = x >>  9;
+      ixf  = x >>  8;
+      zf   = x >>  7;
+      qnf  = x >>  6;
+      snf  = x >>  5;
+      unf  = x >>  4;
+      ovf  = x >>  3;
+      rm   = x >>  1;
+      fpee = x >>  0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][32] EPCR
+  //----------------------------------------------------------
+  class EPCR : public GENERIC 
+  {
+  public : EPCR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [0][48] EEAR
+  //----------------------------------------------------------
+  class EEAR : public GENERIC 
+  {
+  public : EEAR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [0][64] ESR
+  //----------------------------------------------------------
+  class ESR : public GENERIC 
+  {
+  public : ESR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [0][1024] GPR
+  //----------------------------------------------------------
+  class GPR : public GENERIC 
+  {
+  public : GPR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [3][0] DCCR
+  //----------------------------------------------------------
+  class DCCR : public morpheo::behavioural::SPR
+  {
+  public : const Tspr_t  _res : 24;
+  public :       Tspr_t   ew  :  8;
+
+  public :        DCCR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+   _res (0),
+    ew  (0)
+    {};
+  public : void   reset (void  ) {};
+  public : Tspr_t read  (void  )
+    {
+      return ((ew << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      ew = (x >> 0);
+    };
+  };
+
+  //----------------------------------------------------------
+  // [3][1] DCBPR
+  //----------------------------------------------------------
+  class DCBPR : public GENERIC 
+  {
+  public : DCBPR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [3][2] DCBFR
+  //----------------------------------------------------------
+  class DCBFR : public GENERIC 
+  {
+  public : DCBFR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [3][3] DCBIR
+  //----------------------------------------------------------
+  class DCBIR : public GENERIC 
+  {
+  public : DCBIR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [3][4] DCBWR
+  //----------------------------------------------------------
+  class DCBWR : public GENERIC 
+  {
+  public : DCBWR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+  //----------------------------------------------------------
+  // [3][5] DCBLR
+  //----------------------------------------------------------
+  class DCBLR : public GENERIC 
+  {
+  public : DCBLR (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
+  };
+
+//   //----------------------------------------------------------
+//   // [0][1] UPR
+//   //----------------------------------------------------------
+//   class UPR : public morpheo::behavioural::SPR
+//   {
+//   public :        UPR (void): {};
+//   public : void   reset (void  ) {};
+//   public : Tspr_t read  (void  )
+//     {
+//       return ();
+//     };
+//   public : void   write (Tspr_t x) {};
+//   };
+
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h	(revision 88)
@@ -0,0 +1,169 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_Special_Register_unit_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_Special_Register_unit_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Types.h"
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+namespace morpheo {
+namespace behavioural {
+
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+  class Special_Register_unit 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
+
+    // ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         )  **  in_SPR_ACCESS_VAL          ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_ACCESS_ACK          ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontext_t         )  **  in_SPR_ACCESS_FRONT_END_ID ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontext_t         )  **  in_SPR_ACCESS_CONTEXT_ID   ;//[nb_inst_reexecute]
+  public    : SC_IN (Tcontrol_t         )  **  in_SPR_ACCESS_WEN          ;//[nb_inst_reexecute]
+  public    : SC_IN (Tspr_address_t     )  **  in_SPR_ACCESS_NUM_GROUP    ;//[nb_inst_reexecute]
+  public    : SC_IN (Tspr_address_t     )  **  in_SPR_ACCESS_NUM_REG      ;//[nb_inst_reexecute]
+  public    : SC_IN (Tspr_t             )  **  in_SPR_ACCESS_WDATA        ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tspr_t             )  ** out_SPR_ACCESS_RDATA        ;//[nb_inst_reexecute]
+  public    : SC_OUT(Tcontrol_t         )  ** out_SPR_ACCESS_INVALID      ;//[nb_inst_reexecute]
+
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tspr_t             ) *** out_SPR_READ_SR             ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_VAL          ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t         ) *** out_SPR_COMMIT_ACK          ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_SR_F_VAL     ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_SR_F         ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_SR_CY_VAL    ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_SR_CY        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_SR_OV_VAL    ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t         ) ***  in_SPR_COMMIT_SR_OV        ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_VAL           ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t        )  *** out_SPR_EVENT_ACK           ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tspr_t            )  ***  in_SPR_EVENT_EPCR          ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_EEAR_WEN      ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tspr_t            )  ***  in_SPR_EVENT_EEAR          ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_SR_DSX        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_SR_TO_ESR     ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : SPR                       ***** _spr                        ;//[nb_front_end][nb_context][NB_GROUP][NB_REG_GROUP]
+  private   : SPR_access_mode             *** _spr_access_mode            ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  private   : Tcontrol_t                    * internal_SPR_ACCESS_ACK     ;//[nb_inst_reexecute]
+  private   : Tcontrol_t                   ** internal_SPR_COMMIT_ACK     ;//[nb_front_end][nb_context]
+  private   : Tcontrol_t                   ** internal_SPR_EVENT_ACK      ;//[nb_front_end][nb_context]
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (Special_Register_unit);
+#endif
+  public  :          Special_Register_unit              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else					       
+   std::string                                   name,
+#endif					       
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~Special_Register_unit             (void);
+					       
+  private : void        allocation                (
+#ifdef STATISTICS
+						   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+						   void
+#endif
+						   );
+  private : void        deallocation              (void);
+					       
+#ifdef SYSTEMC				       
+  public  : void        transition                (void);
+  public  : void        genMoore                  (void);
+  public  : void        genMealy_spr_access       (void);
+#endif					       
+
+#if VHDL				       
+  public  : void        vhdl                      (void);
+  private : void        vhdl_declaration          (Vhdl * & vhdl);
+  private : void        vhdl_body                 (Vhdl * & vhdl);
+#endif					       
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Types.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Types.h	(revision 88)
@@ -0,0 +1,30 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_Types_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_special_register_unit_Types_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h"
+#include "Behavioural/include/Types.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,90 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::Parameters"
+  Parameters::Parameters (uint32_t     nb_front_end          ,
+			  uint32_t   * nb_context            ,
+			  uint32_t     nb_inst_reexecute     ,
+			  bool     *** implement_group       ,
+                          bool         is_toplevel
+			  )
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+    
+    _nb_front_end           = nb_front_end     ;
+    _nb_context             = nb_context       ;
+    _nb_inst_reexecute      = nb_inst_reexecute;
+    _implement_group        = implement_group  ;
+
+    _max_nb_context         = max<uint32_t>(_nb_context,_nb_front_end);
+//  _size_front_end_id      = log2(_nb_front_end);
+//  _size_context_id        = log2(_max_nb_context  );
+//  
+//  _have_port_front_end_id = _size_front_end_id > 0;
+//  _have_port_context_id   = _size_context_id   > 0;
+	
+    test();
+
+    if (is_toplevel)
+      {
+        _size_front_end_id      = log2(_nb_front_end);
+        _size_context_id        = log2(_max_nb_context  );
+        
+        _have_port_front_end_id = _size_front_end_id > 0;
+        _have_port_context_id   = _size_context_id   > 0;
+
+        copy();
+      }
+
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "Special_Register_unit::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(Special_Register_unit,FUNCTION);
+//     test();
+//     log_end(Special_Register_unit,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,139 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    Parameters_test test ("Special_Register_unit");
+
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+	{
+	  if (_implement_group [i][j][GROUP_SYSTEM_AND_CONTROL ] == false)
+	    test.error(toString(_("Thread [%d][%d] : Group \"SYSTEM_AND_CONTROL\" must be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_DMMU               ] == true )
+	    test.error(toString(_("Thread [%d][%d] : Group \"DMMU\" can't be implemented : not yet supported.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_IMMU               ] == true )
+	    test.error(toString(_("Thread [%d][%d] : Group \"IMMU\" can't be implemented : not yet supported.\n"),i,j));
+
+// 	  if (_implement_group [i][j][GROUP_DCACHE             ] == false)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"DCACHE\" must be implemented.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_ICACHE             ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"ICACHE\" can't be implemented : not yet supported.\n"),i,j));
+
+// 	  if (_implement_group [i][j][GROUP_MAC                ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"MAC\" can't be implemented here. See functionnal_unit.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_DEBUG              ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"DEBUG\" can't be implemented : not yet supported.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_PERFORMANCE_COUNTER] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"PERFORMANCE_COUNTER\" can't be implemented : not yet supported.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_POWER_MANAGEMENT   ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"POWER_MANAGEMENT\" can't be implemented : not yet supported.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_PIC                ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"PIC\" can't be implemented : not yet supported.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_TICK_TIMER         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"TICK_TIMER\" can't be implemented : not yet supported.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_FLOATING_POINT     ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"FLOATIN_POINT\" can't be implemented : not yet supported.\n"),i,j));
+
+	  if (_implement_group [i][j][GROUP_RESERVED_1         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_1\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_2         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_2\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_3         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_3\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_4         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_4\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_5         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_5\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_6         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_6\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_7         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_7\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_8         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_8\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_9         ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_9\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_10        ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_10\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_11        ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_11\" can't be implemented.\n"),i,j));
+	  
+	  if (_implement_group [i][j][GROUP_RESERVED_12        ] == true)
+	    test.error(toString(_("Thread [%d][%d] : Group \"RESERVED_12\" can't be implemented.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_1           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_1\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_2           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_2\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_3           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_3\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_4           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_4\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_5           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_5\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_6           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_6\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_7           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_7\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	  
+// 	  if (_implement_group [i][j][GROUP_CUSTOM_8           ] == true)
+// 	    test.error(toString(_("Thread [%d][%d] : Group \"CUSTOM_8\" can't be implemented here. See functionnal_unit.\n"),i,j));
+	}
+
+    log_end(Special_Register_unit,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,56 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    XML xml ("special_register_unit");
+
+    xml.balise_open("special_register_unit");
+//  xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end();
+    xml.balise_close();
+
+    log_end(Special_Register_unit,FUNCTION);
+    
+    return xml.get_body(depth);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters & x)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(Special_Register_unit,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit.cpp	(revision 88)
@@ -0,0 +1,167 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::Special_Register_unit"
+  Special_Register_unit::Special_Register_unit 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_Core == true
+    log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif    
+
+    log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	// Constant
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  {
+	    internal_SPR_ACCESS_ACK [i] = 1;
+	    PORT_WRITE(out_SPR_ACCESS_ACK [i], internal_SPR_ACCESS_ACK [i]);
+	  }
+
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	    {
+	      internal_SPR_COMMIT_ACK [i][j] = 1;
+	      internal_SPR_EVENT_ACK  [i][j] = 1;
+	      PORT_WRITE(out_SPR_COMMIT_ACK [i][j], internal_SPR_COMMIT_ACK [i][j]);
+	      PORT_WRITE(out_SPR_EVENT_ACK  [i][j], internal_SPR_EVENT_ACK  [i][j]);
+	    }
+
+	log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str());
+
+	SC_METHOD (genMoore);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+
+	log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Method - genMealy_spr_access"),_name.c_str());
+
+	SC_METHOD (genMealy_spr_access);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  {
+	    sensitive << (*(in_SPR_ACCESS_NUM_GROUP    [i]))
+		      << (*(in_SPR_ACCESS_NUM_REG      [i]))
+// 		      << (*(in_SPR_ACCESS_VAL          [i]))
+// 		      << (*(in_SPR_ACCESS_WEN          [i]))
+	      ;
+	    if (_param->_have_port_front_end_id)
+	    sensitive << (*(in_SPR_ACCESS_FRONT_END_ID [i]));
+	    if (_param->_have_port_context_id)
+	    sensitive << (*(in_SPR_ACCESS_CONTEXT_ID   [i]));
+	  }
+
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_end(Special_Register_unit,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::~Special_Register_unit"
+  Special_Register_unit::~Special_Register_unit (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 88)
@@ -0,0 +1,252 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+#include "Behavioural/include/Allocation.h"
+#include "Common/include/Max.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::allocation"
+  void Special_Register_unit::allocation (
+#ifdef STATISTICS
+			       morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+			       void
+#endif
+			       )
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"Special_Register_unit"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 _("Generalist interface")
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("spr_access",IN,WEST, _("Access from reexecute_unit"), _param->_nb_inst_reexecute);
+
+      ALLOC1_VALACK_IN ( in_SPR_ACCESS_VAL           ,VAL);
+      ALLOC1_VALACK_OUT(out_SPR_ACCESS_ACK           ,ACK);
+      ALLOC1_SIGNAL_IN ( in_SPR_ACCESS_WEN           ,"wen"         ,Tcontrol_t         ,1);
+      ALLOC1_SIGNAL_IN ( in_SPR_ACCESS_CONTEXT_ID    ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
+      ALLOC1_SIGNAL_IN ( in_SPR_ACCESS_FRONT_END_ID  ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC1_SIGNAL_IN ( in_SPR_ACCESS_NUM_GROUP     ,"num_group"   ,Tspr_address_t     ,_param->_size_special_address_group   );
+      ALLOC1_SIGNAL_IN ( in_SPR_ACCESS_NUM_REG       ,"num_reg"     ,Tspr_address_t     ,_param->_size_special_address_register);
+      ALLOC1_SIGNAL_IN ( in_SPR_ACCESS_WDATA         ,"wdata"       ,Tspr_t             ,_param->_size_spr);
+      ALLOC1_SIGNAL_OUT(out_SPR_ACCESS_RDATA         ,"rdata"       ,Tspr_t             ,_param->_size_spr);
+      ALLOC1_SIGNAL_OUT(out_SPR_ACCESS_INVALID       ,"invalid"     ,Tcontrol_t         ,1);
+    }
+
+    // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_read",OUT,WEST, _("Output for a spr bit field."), _param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_SPR_READ_SR             ,"sr",Tspr_t,_param->_size_spr, _param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_commit",IN,WEST, _("Commit instruction to change SR's flags."), _param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_VALACK_IN ( in_SPR_COMMIT_VAL           ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_VALACK_OUT(out_SPR_COMMIT_ACK           ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_F_VAL      ,"sr_f_val"     ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_F          ,"sr_f"         ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_CY_VAL     ,"sr_cy_val"    ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_CY         ,"sr_cy"        ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_OV_VAL     ,"sr_ov_val"    ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_OV         ,"sr_ov"        ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_event",IN,WEST, _("Event change a lot of exception."), _param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL            ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_VALACK_OUT(out_SPR_EVENT_ACK            ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EPCR          ,"EPCR"          ,Tspr_t            ,_param->_size_spr,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR_WEN      ,"EEAR_WEN"      ,Tcontrol_t        ,1                ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR          ,"EEAR"          ,Tspr_t            ,_param->_size_spr,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX        ,"SR_DSX"        ,Tcontrol_t        ,1                ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR     ,"SR_TO_ESR"     ,Tcontrol_t        ,1                ,_param->_nb_front_end, _param->_nb_context[it1]);
+    }
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    internal_SPR_ACCESS_ACK = new Tcontrol_t   [_param->_nb_inst_reexecute];
+    internal_SPR_COMMIT_ACK = new Tcontrol_t * [_param->_nb_front_end];
+    internal_SPR_EVENT_ACK  = new Tcontrol_t * [_param->_nb_front_end];
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      {
+        internal_SPR_COMMIT_ACK [i]  = new Tcontrol_t [_param->_nb_context [i]];
+        internal_SPR_EVENT_ACK  [i]  = new Tcontrol_t [_param->_nb_context [i]];
+      }
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    _spr_access_mode = new SPR_access_mode ** [_param->_nb_front_end];
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      {
+	_spr_access_mode [i] = new SPR_access_mode * [_param->_nb_context[i]];
+
+	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	  {
+	    _spr_access_mode [i][j] = new SPR_access_mode;
+
+	    for (uint32_t k=0; k<NB_GROUP; k++)
+	      if (_param->_implement_group [i][j][k])
+		_spr_access_mode [i][j]->implement_group(k);
+	  }
+      }
+
+    _spr = new SPR **** [_param->_nb_front_end];
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      {
+	_spr [i] = new SPR *** [_param->_nb_context[i]];
+
+	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	  {
+	    _spr [i][j] = new SPR ** [NB_GROUP];
+
+	    for (uint32_t k=0; k<NB_GROUP; k++)
+	      if (_param->_implement_group [i][j][k])
+		{
+		  _spr [i][j][k] = new SPR * [NB_REG_GROUP[k]];
+
+		  switch (k)
+		    {
+		    case GROUP_SYSTEM_AND_CONTROL  :
+		      {
+			_spr [i][j][k][SPR_VR          ] = new VR          (i,j,_param);
+			_spr [i][j][k][SPR_UPR         ] = new UPR         (i,j,_param);
+			_spr [i][j][k][SPR_CPUCFGR     ] = new CPUCFGR     (i,j,_param);
+			_spr [i][j][k][SPR_DMMUCFGR    ] = new DMMUCFGR    (i,j,_param);
+			_spr [i][j][k][SPR_IMMUCFGR    ] = new IMMUCFGR    (i,j,_param);
+			_spr [i][j][k][SPR_DCCFGR      ] = new DCCFGR      (i,j,_param);
+			_spr [i][j][k][SPR_ICCFGR      ] = new ICCFGR      (i,j,_param);
+			_spr [i][j][k][SPR_DCFGR       ] = new DCFGR       (i,j,_param);
+			_spr [i][j][k][SPR_PCCFGR      ] = new PCCFGR      (i,j,_param);
+			_spr [i][j][k][SPR_NPC         ] = new NPC         (i,j,_param);
+			_spr [i][j][k][SPR_SR          ] = new SR          (i,j,_param);
+			_spr [i][j][k][SPR_PPC         ] = new PPC         (i,j,_param);
+			_spr [i][j][k][SPR_CID         ] = new CID         (i,j,_param);
+			_spr [i][j][k][SPR_FPCSR       ] = new FPCSR       (i,j,_param);
+			_spr [i][j][k][SPR_EPCR        ] = new EPCR        (i,j,_param);
+			_spr [i][j][k][SPR_EEAR        ] = new EEAR        (i,j,_param);
+			_spr [i][j][k][SPR_ESR         ] = new ESR         (i,j,_param);
+// 			_spr [i][j][k][SPR_GPR         ] = new GPR         (i,j,_param);
+			
+			break;
+		      }
+		    case GROUP_DCACHE              :
+		      {
+			_spr [i][j][k][SPR_DCCR        ] = new DCCR        (i,j,_param);
+			_spr [i][j][k][SPR_DCBPR       ] = new DCBPR       (i,j,_param);
+			_spr [i][j][k][SPR_DCBFR       ] = new DCBFR       (i,j,_param);
+			_spr [i][j][k][SPR_DCBIR       ] = new DCBIR       (i,j,_param);
+			_spr [i][j][k][SPR_DCBWR       ] = new DCBWR       (i,j,_param);
+			_spr [i][j][k][SPR_DCBLR       ] = new DCBLR       (i,j,_param);
+
+			break;
+		      }
+		    case GROUP_DMMU                :
+		    case GROUP_IMMU                :
+		    case GROUP_ICACHE              :
+		    case GROUP_DEBUG               :
+		    case GROUP_PERFORMANCE_COUNTER :
+		    case GROUP_POWER_MANAGEMENT    :
+		    case GROUP_PIC                 :
+		    case GROUP_TICK_TIMER          :
+		    case GROUP_FLOATING_POINT      :
+
+		    case GROUP_MAC                 :
+		    case GROUP_RESERVED_1          :
+		    case GROUP_RESERVED_2          :
+		    case GROUP_RESERVED_3          :
+		    case GROUP_RESERVED_4          :
+		    case GROUP_RESERVED_5          :
+		    case GROUP_RESERVED_6          :
+		    case GROUP_RESERVED_7          :
+		    case GROUP_RESERVED_8          :
+		    case GROUP_RESERVED_9          :
+		    case GROUP_RESERVED_10         :
+		    case GROUP_RESERVED_11         :
+		    case GROUP_RESERVED_12         :
+		    case GROUP_CUSTOM_1            :
+		    case GROUP_CUSTOM_2            :
+		    case GROUP_CUSTOM_3            :
+		    case GROUP_CUSTOM_4            :
+		    case GROUP_CUSTOM_5            :
+		    case GROUP_CUSTOM_6            :
+		    case GROUP_CUSTOM_7            :
+		    case GROUP_CUSTOM_8            :
+		    default :
+		      {
+			for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
+			  _spr [i][j][k][l] = NULL;
+		      }
+		    }
+		}
+	      else
+		_spr [i][j][k] = NULL;
+	  }
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	for (uint32_t k=0; k<NB_GROUP; k++)
+	  if (_param->_implement_group [i][j][k])
+	    for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
+	      if (_spr [i][j][k][l] == NULL)
+		_spr_access_mode [i][j]->invalid_register (k,l);
+
+#ifdef POSITION
+    if (usage_is_set(_usage,USE_POSITION))
+      _component->generate_file();
+#endif
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp	(revision 88)
@@ -0,0 +1,112 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::deallocation"
+  void Special_Register_unit::deallocation (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+	DELETE1_SIGNAL( in_SPR_ACCESS_VAL          ,_param->_nb_inst_reexecute,1);
+	DELETE1_SIGNAL(out_SPR_ACCESS_ACK          ,_param->_nb_inst_reexecute,1);
+	DELETE1_SIGNAL( in_SPR_ACCESS_WEN          ,_param->_nb_inst_reexecute,1);
+	DELETE1_SIGNAL( in_SPR_ACCESS_CONTEXT_ID   ,_param->_nb_inst_reexecute,_param->_size_context_id  );
+	DELETE1_SIGNAL( in_SPR_ACCESS_FRONT_END_ID ,_param->_nb_inst_reexecute,_param->_size_front_end_id);
+	DELETE1_SIGNAL( in_SPR_ACCESS_NUM_GROUP    ,_param->_nb_inst_reexecute,_param->_size_special_address_group   );
+	DELETE1_SIGNAL( in_SPR_ACCESS_NUM_REG      ,_param->_nb_inst_reexecute,_param->_size_special_address_register);
+	DELETE1_SIGNAL( in_SPR_ACCESS_WDATA        ,_param->_nb_inst_reexecute,_param->_size_spr);
+	DELETE1_SIGNAL(out_SPR_ACCESS_RDATA        ,_param->_nb_inst_reexecute,_param->_size_spr);
+	DELETE1_SIGNAL(out_SPR_ACCESS_INVALID      ,_param->_nb_inst_reexecute,1);
+	
+	DELETE2_SIGNAL(out_SPR_READ_SR             ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr);
+	
+	DELETE2_SIGNAL( in_SPR_COMMIT_VAL          ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL(out_SPR_COMMIT_ACK          ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_COMMIT_SR_F_VAL     ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_COMMIT_SR_F         ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_COMMIT_SR_CY_VAL    ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_COMMIT_SR_CY        ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_COMMIT_SR_OV_VAL    ,_param->_nb_front_end, _param->_nb_context[it1],1);
+	DELETE2_SIGNAL( in_SPR_COMMIT_SR_OV        ,_param->_nb_front_end, _param->_nb_context[it1],1);
+
+        DELETE2_SIGNAL( in_SPR_EVENT_VAL           ,_param->_nb_front_end, _param->_nb_context[it1],1);
+        DELETE2_SIGNAL(out_SPR_EVENT_ACK           ,_param->_nb_front_end, _param->_nb_context[it1],1);
+        DELETE2_SIGNAL( in_SPR_EVENT_EPCR          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr);
+        DELETE2_SIGNAL( in_SPR_EVENT_EEAR_WEN      ,_param->_nb_front_end, _param->_nb_context[it1],1);
+        DELETE2_SIGNAL( in_SPR_EVENT_EEAR          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr);
+        DELETE2_SIGNAL( in_SPR_EVENT_SR_DSX        ,_param->_nb_front_end, _param->_nb_context[it1],1);
+        DELETE2_SIGNAL( in_SPR_EVENT_SR_TO_ESR     ,_param->_nb_front_end, _param->_nb_context[it1],1);
+
+        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        delete [] internal_SPR_ACCESS_ACK;
+        for (uint32_t i=0; i<_param->_nb_front_end; i++)
+          {
+            delete [] internal_SPR_COMMIT_ACK [i];
+            delete [] internal_SPR_EVENT_ACK  [i];
+          }
+        delete [] internal_SPR_COMMIT_ACK;
+        delete [] internal_SPR_EVENT_ACK;
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      {
+	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	  {
+	    for (uint32_t k=0; k<NB_GROUP; k++)
+	      {
+		if (_param->_implement_group [i][j][k])
+		  {
+		    for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
+		      if (_spr [i][j][k] != NULL)
+			delete _spr [i][j][k][l];
+		    delete [] _spr [i][j][k];
+		  }
+	      }
+	    delete [] _spr [i][j];
+	  }	
+	delete [] _spr [i];
+      }
+    delete [] _spr;
+
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      {
+	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	  delete _spr_access_mode [i][j];
+	delete [] _spr_access_mode [i];
+      }
+    delete [] _spr_access_mode;
+
+    delete    _component;
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_end_cycle.cpp	(revision 88)
@@ -0,0 +1,47 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::end_cycle"
+void Special_Register_unit::end_cycle ()
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMealy_spr_access.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMealy_spr_access.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMealy_spr_access.cpp	(revision 88)
@@ -0,0 +1,64 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::genMealy_spr_access"
+  void Special_Register_unit::genMealy_spr_access (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+
+    // ===================================================================
+    // =====[ SPR_ACCESS ]================================================
+    // ===================================================================
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+//       if (PORT_READ(in_SPR_ACCESS_VAL [i]) and not PORT_READ(in_SPR_ACCESS_WEN [i]))
+	{
+	  Tcontext_t     front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_SPR_ACCESS_FRONT_END_ID [i]):0;
+	  Tcontext_t     context_id   = (_param->_have_port_context_id  )?PORT_READ(in_SPR_ACCESS_CONTEXT_ID   [i]):0;
+	  Tspr_address_t num_group    = PORT_READ(in_SPR_ACCESS_NUM_GROUP [i]);
+	  Tspr_address_t num_reg      = PORT_READ(in_SPR_ACCESS_NUM_REG   [i]);
+	  
+	  SR * sr = static_cast<SR*>(_spr [front_end_id][context_id][GROUP_SYSTEM_AND_CONTROL][SPR_SR]);
+	  
+	  Tcontrol_t sm    = sr->sm   ;
+	  Tcontrol_t sumra = sr->sumra;
+	  
+	  Tcontrol_t valid = _spr_access_mode [front_end_id][context_id]->read(spr_address_t(num_group,num_reg),
+									       sm,
+									       sumra);
+	  
+	  PORT_WRITE(out_SPR_ACCESS_RDATA   [i], (valid)?_spr[front_end_id][context_id][num_group][num_reg]->read():0);
+	  PORT_WRITE(out_SPR_ACCESS_INVALID [i], not valid);
+	}
+    
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMoore.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMoore.cpp	(revision 88)
@@ -0,0 +1,46 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::genMoore"
+  void Special_Register_unit::genMoore (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    // ===================================================================
+    // =====[ SPR_READ ]==================================================
+    // ===================================================================
+    for (uint32_t i=0; i<_param->_nb_front_end; i++)
+      for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+ 	PORT_WRITE(out_SPR_READ_SR [i][j],_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR]->read());
+// 	{
+// 	  SR * sr = static_cast<SR*>(_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR]);
+// 	  PORT_WRITE(out_SPR_READ_SR [i][j],sr->read());
+// 	}
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::statistics_allocation"
+  void Special_Register_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "Special_Register_unit",
+		      param_statistics);
+    
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,39 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::statistics_deallocation"
+  void Special_Register_unit::statistics_deallocation (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete _stat;
+    
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp	(revision 88)
@@ -0,0 +1,119 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::transition"
+  void Special_Register_unit::transition (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    if (PORT_READ(in_NRESET) == 0)
+      {
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	    for (uint32_t k=0; k<NB_GROUP; k++)
+	      if (_param->_implement_group [i][j][k])
+		for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
+		  if (_spr_access_mode [i][j]->exist(k,l))
+		    {
+#ifdef DEBUG_TEST
+		      if (_spr [i][j][k]    == NULL)
+			throw ERRORMORPHEO(FUNCTION,toString(_("Group [%d] is not implemented.\n"),k));
+		      if (_spr [i][j][k][l] == NULL)
+			throw ERRORMORPHEO(FUNCTION,toString(_("Register [%d][%d] is not implemented.\n"),k,l));
+#endif
+// 		      log_printf(TRACE,Special_Register_unit,FUNCTION,"Reset SPR [%d][%d][%d][%d]",i,j,k,l);
+		      _spr [i][j][k][l]->reset();
+		    }
+
+      }
+    else
+      {
+	// ===================================================================
+	// =====[ SPR_ACCESS ]================================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+	  if (PORT_READ(in_SPR_ACCESS_VAL [i]) and internal_SPR_ACCESS_ACK [i])
+	    if (PORT_READ(in_SPR_ACCESS_WEN [i]))
+	      {
+		Tcontext_t     front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_SPR_ACCESS_FRONT_END_ID [i]):0;
+		Tcontext_t     context_id   = (_param->_have_port_context_id  )?PORT_READ(in_SPR_ACCESS_CONTEXT_ID   [i]):0;
+		Tspr_address_t num_group    = PORT_READ(in_SPR_ACCESS_NUM_GROUP [i]);
+		Tspr_address_t num_reg      = PORT_READ(in_SPR_ACCESS_NUM_REG   [i]);
+
+ 		SR * sr = static_cast<SR*>(_spr [front_end_id][context_id][GROUP_SYSTEM_AND_CONTROL][SPR_SR]);
+
+		Tcontrol_t sm    = sr->sm   ;
+		Tcontrol_t sumra = sr->sumra;
+
+		if (_spr_access_mode [front_end_id][context_id]->write(spr_address_t(num_group,num_reg),
+								       sm,
+								       sumra))
+		  _spr[front_end_id][context_id][num_group][num_reg]->write(PORT_READ(in_SPR_ACCESS_WDATA [i]));
+		
+	      }
+	
+	// ===================================================================
+	// =====[ SPR_COMMIT ]-===============================================
+	// ===================================================================
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+            {
+              if (PORT_READ(in_SPR_COMMIT_VAL [i][j])) // out_SPR_COMMIT_ACK [i][j]
+                {
+                  SR * sr = static_cast<SR*>(_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR]);
+
+                  if (PORT_READ(in_SPR_COMMIT_SR_F_VAL  [i][j]))
+                    sr->f  = PORT_READ(in_SPR_COMMIT_SR_F  [i][j]);
+                  
+                  if (PORT_READ(in_SPR_COMMIT_SR_CY_VAL [i][j]))
+                    sr->cy = PORT_READ(in_SPR_COMMIT_SR_CY [i][j]);
+                  
+                  if (PORT_READ(in_SPR_COMMIT_SR_OV_VAL [i][j]))
+                    sr->ov = PORT_READ(in_SPR_COMMIT_SR_OV [i][j]);
+                }
+
+              if (PORT_READ(in_SPR_EVENT_VAL [i][j])) // out_SPR_EVENT_ACK [i][j]
+                {
+                  SR * sr = static_cast<SR*>(_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR]);
+                  sr->dsx = PORT_READ(in_SPR_EVENT_SR_DSX [i][j]);
+
+                  _spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_EPCR]->write(PORT_READ(in_SPR_EVENT_EPCR [i][j]));
+                  if (PORT_READ(in_SPR_EVENT_EEAR_WEN [i][j]))
+                  _spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_EEAR]->write(PORT_READ(in_SPR_EVENT_EEAR [i][j]));
+                  if (PORT_READ(in_SPR_EVENT_SR_TO_ESR [i][j]))
+                  _spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_ESR ]->write(sr->read());
+                }
+            }
+      }
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl.cpp	(revision 88)
@@ -0,0 +1,48 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::vhdl"
+  void Special_Register_unit::vhdl (void)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl_declaration (vhdl);
+    vhdl_body        (vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl_body.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl_body.cpp	(revision 88)
@@ -0,0 +1,35 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::vhdl_body"
+  void Special_Register_unit::vhdl_body (Vhdl * & vhdl)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+    vhdl->set_body ("");
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl_declaration.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_vhdl_declaration.cpp	(revision 88)
@@ -0,0 +1,34 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace special_register_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Special_Register_unit::vhdl_declaration"
+  void Special_Register_unit::vhdl_declaration (Vhdl * & vhdl)
+  {
+    log_begin(Special_Register_unit,FUNCTION);
+    log_end(Special_Register_unit,FUNCTION);
+  };
+
+}; // end namespace special_register_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/Makefile
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/Makefile	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/Makefile	(revision 88)
@@ -0,0 +1,19 @@
+# 
+# $Id$
+# 
+# [ Description ]
+# 
+# Makefile
+# 
+
+#-----[ Directory ]----------------------------------------
+DIR_COMPONENT			= ../
+include				$(DIR_COMPONENT)/Makefile.defs
+
+#-----[ include ]------------------------------------------
+
+all				:
+				$(MAKE) all_documentation
+
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Common
+include				$(DIR_MORPHEO)/Behavioural/Makefile.Documentation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/OOO_Engine.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/OOO_Engine.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/OOO_Engine.tex	(revision 88)
@@ -0,0 +1,42 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\documentclass[10pt,a4paper,twocolumn]{article}
+
+\def\dirdoc{tex}
+\def\dirschema{eps}
+
+% Package de variables d'environnement : Titre, command etc ...
+\usepackage{../../../../../Behavioural/doc/sty/doc-style}
+\usepackage{sty/header}
+
+
+%------------------------------------------------------------------------------
+% Début document
+%------------------------------------------------------------------------------
+
+\pagestyle{empty}
+
+\begin{document}
+
+% Créez une page de titre
+\maketitle
+\thispagestyle{empty}
+
+%Table des matières et des figures
+%\tableofcontents
+%\newpage
+%\listoffigures
+
+%------------------------------------------------------------------------------
+% Ajout du corps du documents
+%------------------------------------------------------------------------------
+
+\input{tex/root}
+
+%------------------------------------------------------------------------------
+% Fin d'ajout du corps du document
+%------------------------------------------------------------------------------
+
+\end{document}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/sty/header.sty
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/sty/header.sty	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/sty/header.sty	(revision 88)
@@ -0,0 +1,16 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\def\review{YYYY/MM/DD}
+%\def\review{\number\day/\number\month/\number\year\xspace}
+
+\title{OOO_Engine}
+ 
+\author{}
+
+\affiliation{}
+
+\email{}
+
+\date{\review}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/01_introduction.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/01_introduction.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/01_introduction.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Introduction}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/02_features.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/02_features.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/02_features.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Features}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/03_description.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/03_description.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/03_description.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Functional Description}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/04_pinout.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/04_pinout.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/04_pinout.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Pin out}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/05_parameters.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/05_parameters.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/05_parameters.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Parameters}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/06_performance.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/06_performance.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/06_performance.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Performance}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/07_details.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/07_details.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/07_details.tex	(revision 88)
@@ -0,0 +1,5 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Details}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/08_history.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/08_history.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/08_history.tex	(revision 88)
@@ -0,0 +1,14 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\Section{Revision History}
+
+\begin{tabular}{|c|c|c|}
+\hline
+Revision Date & By  & Modifications\\
+\hline
+\hline
+yyyy/mm/dd    & xxx & Initial document \\
+\hline
+\end{tabular}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/root.tex
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/root.tex	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/doc/tex/root.tex	(revision 88)
@@ -0,0 +1,12 @@
+%------------------------------------------------------------------------------
+% $Id$
+%------------------------------------------------------------------------------
+
+\input{\dirdoc/01_introduction}
+\input{\dirdoc/02_features}
+\input{\dirdoc/03_description}
+\input{\dirdoc/04_pinout}
+\input{\dirdoc/05_parameters}
+\input{\dirdoc/06_performance}
+\input{\dirdoc/07_details}
+\input{\dirdoc/08_history}
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h	(revision 88)
@@ -0,0 +1,272 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_OOO_Engine_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_OOO_Engine_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#ifdef SYSTEMC
+#include "systemc.h"
+#endif
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h"
+#include "Behavioural/include/Types.h"
+
+#ifdef STATISTICS
+#include "Behavioural/include/Stat.h"
+#endif
+#include "Behavioural/include/Component.h"
+#ifdef VHDL
+#include "Behavioural/include/Vhdl.h"
+#endif
+#include "Behavioural/include/Usage.h"
+
+#include "Common/include/ToString.h"
+#include "Common/include/Debug.h"
+
+#include <iostream>
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+  class OOO_Engine 
+#if SYSTEMC
+    : public sc_module
+#endif
+  {
+    // -----[ fields ]----------------------------------------------------
+    // Parameters
+  protected : const std::string  _name;
+  protected : const Parameters * _param;
+  private   : const Tusage_t     _usage;
+
+#ifdef STATISTICS
+  public    : Stat                           * _stat;
+#endif
+
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
+
+#ifdef SYSTEMC
+    // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_CLOCK                      *  in_CLOCK ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET;
+
+    // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_VAL                       ;//[nb_front_end][nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t        )  *** out_RENAME_ACK                       ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontext_t        )  ***  in_RENAME_FRONT_END_ID              ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontext_t        )  ***  in_RENAME_CONTEXT_ID                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tdepth_t          )  ***  in_RENAME_DEPTH                     ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Ttype_t           )  ***  in_RENAME_TYPE                      ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Toperation_t      )  ***  in_RENAME_OPERATION                 ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_NO_EXECUTE                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IS_DELAY_SLOT             ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_ADDRESS                   ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_HAS_IMMEDIAT              ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IMMEDIAT                  ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_READ_RA                   ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RENAME_NUM_REG_RA                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_READ_RB                   ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RENAME_NUM_REG_RB                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_READ_RC                   ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tspecial_address_t)  ***  in_RENAME_NUM_REG_RC                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_WRITE_RD                  ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tgeneral_address_t)  ***  in_RENAME_NUM_REG_RD                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_WRITE_RE                  ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Tspecial_address_t)  ***  in_RENAME_NUM_REG_RE                ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Texception_t      )  ***  in_RENAME_EXCEPTION_USE             ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Texception_t      )  ***  in_RENAME_EXCEPTION                 ;//[nb_front_end][nb_inst_decod]
+
+    // ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_VAL                        ;//[nb_inst_issue]
+  public    : SC_IN (Tcontrol_t        )   **  in_ISSUE_ACK                        ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontext_t        )   ** out_ISSUE_FRONT_END_ID               ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontext_t        )   ** out_ISSUE_CONTEXT_ID                 ;//[nb_inst_issue]
+  public    : SC_OUT(Tpacket_t         )   ** out_ISSUE_PACKET_ID                  ;//[nb_inst_issue]
+  public    : SC_OUT(Ttype_t           )   ** out_ISSUE_TYPE                       ;//[nb_inst_issue]
+  public    : SC_OUT(Toperation_t      )   ** out_ISSUE_OPERATION                  ;//[nb_inst_issue]
+  public    : SC_OUT(Tlsq_ptr_t        )   ** out_ISSUE_STORE_QUEUE_PTR_WRITE      ;//[nb_inst_issue]
+  public    : SC_OUT(Tlsq_ptr_t        )   ** out_ISSUE_LOAD_QUEUE_PTR_WRITE       ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_HAS_IMMEDIAT               ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_data_t   )   ** out_ISSUE_IMMEDIAT                   ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_READ_RA                    ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_ISSUE_NUM_REG_RA                 ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_READ_RB                    ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_ISSUE_NUM_REG_RB                 ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_READ_RC                    ;//[nb_inst_issue]
+  public    : SC_OUT(Tspecial_address_t)   ** out_ISSUE_NUM_REG_RC                 ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_WRITE_RD                   ;//[nb_inst_issue]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_ISSUE_NUM_REG_RD                 ;//[nb_inst_issue]
+  public    : SC_OUT(Tcontrol_t        )   ** out_ISSUE_WRITE_RE                   ;//[nb_inst_issue]
+  public    : SC_OUT(Tspecial_address_t)   ** out_ISSUE_NUM_REG_RE                 ;//[nb_inst_issue]
+
+    // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_EXECUTE_LOOP_VAL                 ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_OUT(Tcontrol_t        )  *** out_EXECUTE_LOOP_ACK                 ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tcontext_t        )  ***  in_EXECUTE_LOOP_FRONT_END_ID        ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tcontext_t        )  ***  in_EXECUTE_LOOP_CONTEXT_ID          ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tpacket_t         )  ***  in_EXECUTE_LOOP_PACKET_ID           ;//[nb_execute_loop][nb_inst_execute]
+//public    : SC_IN (Ttype_t           )  ***  in_EXECUTE_LOOP_TYPE                ;//[nb_execute_loop][nb_inst_execute]
+//public    : SC_IN (Toperation_t      )  ***  in_EXECUTE_LOOP_OPERATION           ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tspecial_data_t   )  ***  in_EXECUTE_LOOP_FLAGS               ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Texception_t      )  ***  in_EXECUTE_LOOP_EXCEPTION           ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tcontrol_t        )  ***  in_EXECUTE_LOOP_NO_SEQUENCE         ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_EXECUTE_LOOP_ADDRESS             ;//[nb_execute_loop][nb_inst_execute]
+  public    : SC_IN (Tgeneral_data_t   )  ***  in_EXECUTE_LOOP_DATA                ;//[nb_execute_loop][nb_inst_execute]
+
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_VAL                       ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_ACK                       ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_RD_USE                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_RD_NUM_REG                ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_RE_USE                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_RE_NUM_REG                ;//[nb_inst_insert]
+
+//     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_VAL                       ;//[nb_inst_retire]
+//   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_ACK                       ;//[nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RD_OLD_USE                ;//[nb_inst_retire] 
+//   public    : SC_OUT(Tgeneral_address_t)   ** out_RETIRE_RD_OLD_NUM_REG            ;//[nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RD_NEW_USE                ;//[nb_inst_retire]
+//   public    : SC_OUT(Tgeneral_address_t)   ** out_RETIRE_RD_NEW_NUM_REG            ;//[nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RE_OLD_USE                ;//[nb_inst_retire] 
+//   public    : SC_OUT(Tspecial_address_t)   ** out_RETIRE_RE_OLD_NUM_REG            ;//[nb_inst_retire]
+//   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RE_NEW_USE                ;//[nb_inst_retire]
+//   public    : SC_OUT(Tspecial_address_t)   ** out_RETIRE_RE_NEW_NUM_REG            ;//[nb_inst_retire]
+
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
+  public    : SC_OUT(Tcontrol_t        )   ** out_BRANCH_COMPLETE_VAL              ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontrol_t        )   **  in_BRANCH_COMPLETE_ACK              ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontext_t        )   ** out_BRANCH_COMPLETE_FRONT_END_ID     ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontext_t        )   ** out_BRANCH_COMPLETE_CONTEXT_ID       ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tdepth_t          )   ** out_BRANCH_COMPLETE_DEPTH            ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Taddress_t        )   ** out_BRANCH_COMPLETE_ADDRESS          ;//[nb_inst_branch_complete]
+  public    : SC_OUT(Tcontrol_t        )   ** out_BRANCH_COMPLETE_FLAG             ;//[nb_inst_branch_complete]
+  public    : SC_IN (Tcontrol_t        )   **  in_BRANCH_COMPLETE_MISS_PREDICTION  ;//[nb_inst_branch_complete]
+                                                                                   
+    // ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_OUT(Tcontrol_t        )    * out_COMMIT_EVENT_VAL                 ;
+  public    : SC_IN (Tcontrol_t        )    *  in_COMMIT_EVENT_ACK                 ;
+  public    : SC_OUT(Tcontext_t        )    * out_COMMIT_EVENT_FRONT_END_ID        ;
+  public    : SC_OUT(Tcontext_t        )    * out_COMMIT_EVENT_CONTEXT_ID          ;
+  public    : SC_OUT(Tdepth_t          )    * out_COMMIT_EVENT_DEPTH               ;
+  public    : SC_OUT(Tevent_type_t     )    * out_COMMIT_EVENT_TYPE                ;
+  public    : SC_OUT(Tcontrol_t        )    * out_COMMIT_EVENT_IS_DELAY_SLOT       ;
+  public    : SC_OUT(Taddress_t        )    * out_COMMIT_EVENT_ADDRESS             ;
+  public    : SC_OUT(Taddress_t        )    * out_COMMIT_EVENT_ADDRESS_EPCR        ;
+  public    : SC_OUT(Tcontrol_t        )    * out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ;
+  public    : SC_OUT(Taddress_t        )    * out_COMMIT_EVENT_ADDRESS_EEAR        ;
+
+    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_EVENT_VAL                        ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t        )  *** out_EVENT_ACK                        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Taddress_t        )  ***  in_EVENT_ADDRESS                    ;//[nb_front_end][nb_context]
+  public    : SC_IN (Taddress_t        )  ***  in_EVENT_ADDRESS_NEXT               ;//[nb_front_end][nb_context] 
+  public    : SC_IN (Tcontrol_t        )  ***  in_EVENT_ADDRESS_NEXT_VAL           ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_EVENT_IS_DS_TAKE                 ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_VAL                    ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t        )  *** out_SPR_EVENT_ACK                    ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tspr_t            )  ***  in_SPR_EVENT_EPCR                   ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_EEAR_WEN               ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tspr_t            )  ***  in_SPR_EVENT_EEAR                   ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_SR_DSX                 ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_SPR_EVENT_SR_TO_ESR              ;//[nb_front_end][nb_context]
+                                                                                   
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
+  public    : SC_OUT(Tcounter_t        )  *** out_NB_INST_COMMIT_ALL               ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcounter_t        )  *** out_NB_INST_COMMIT_MEM               ;//[nb_front_end][nb_context]
+                                                                                   
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
+  public    : SC_IN (Tdepth_t          )  ***  in_DEPTH_MIN                        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tdepth_t          )  ***  in_DEPTH_MAX                        ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
+  public    : SC_OUT(Tcontrol_t        )  *** out_SPR_SR_IEE                       ;//[nb_front_end][nb_context] - Interrupt Exception Enabled
+  public    : SC_OUT(Tcontrol_t        )  *** out_SPR_SR_EPH                       ;//[nb_front_end][nb_context] - Exception Prefix High
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit          ::Rename_unit           ** _component_rename_unit          ;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit          ::Commit_unit            * _component_commit_unit          ;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue          ::Issue_queue            * _component_issue_queue          ;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit       ::Reexecute_unit         * _component_reexecute_unit       ;   
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit  * _component_special_register_unit;
+  private   : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue      ::OOO_Engine_Glue        * _component_glue                 ;
+
+    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#endif
+
+    // -----[ Methods ]---------------------------------------------------
+
+#ifdef SYSTEMC
+    SC_HAS_PROCESS (OOO_Engine);
+#endif
+  public  :          OOO_Engine              
+  (
+#ifdef SYSTEMC
+   sc_module_name                                name,
+#else                                          
+   std::string                                   name,
+#endif                                         
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   Parameters                                  * param,
+   morpheo::behavioural::Tusage_t                usage
+   );
+  public  :          ~OOO_Engine             (void);
+                                               
+  private : void        allocation                (
+#ifdef STATISTICS
+                                                   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+                                                   void
+#endif
+                                                   );
+  private : void        deallocation              (void);
+                                               
+#ifdef SYSTEMC                                 
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  public  : void        transition                (void);
+# endif                                        
+#endif                                         
+
+#if VHDL                                       
+  public  : void        vhdl                      (void);
+#endif                                         
+
+#ifdef STATISTICS
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
+#endif
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+  private : void        end_cycle                 (void);
+#endif
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 88)
@@ -0,0 +1,195 @@
+#ifndef morpheo_behavioural_core_multi_ooo_engine_ooo_engine_Parameters_h
+#define morpheo_behavioural_core_multi_ooo_engine_ooo_engine_Parameters_h
+
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Parameters.h"
+#include "Common/include/Debug.h"
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h"
+
+#include <vector>
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+  class Parameters : public morpheo::behavioural::Parameters
+  {
+    //-----[ fields ]------------------------------------------------------------
+
+  public : uint32_t              _nb_front_end                     ;
+  public : uint32_t            * _nb_context                       ;//[nb_front_end]
+  public : uint32_t              _nb_rename_unit                   ;
+  public : uint32_t              _nb_execute_loop                  ;
+  public : uint32_t            * _nb_inst_decod                    ;//[nb_front_end]
+  public : uint32_t            * _nb_inst_insert                   ;//[nb_rename_unit]
+  public : uint32_t            * _nb_inst_retire                   ;//[nb_rename_unit]
+  public : uint32_t              _nb_inst_issue                    ;
+  public : uint32_t            * _nb_inst_execute                  ;//[nb_execute_loop]
+  public : uint32_t              _nb_inst_reexecute                ;
+  public : uint32_t              _nb_inst_commit                   ;
+  public : uint32_t              _nb_inst_branch_complete          ;
+  public : uint32_t           ** _nb_branch_speculated             ;//[nb_front_end][nb_context]
+  public : uint32_t              _nb_rename_unit_select            ;
+  public : uint32_t              _nb_execute_loop_select           ;
+//public : uint32_t              _size_general_data                ;
+//public : uint32_t              _size_special_data                ;
+  public : uint32_t            * _link_rename_unit_with_front_end  ;//[nb_front_end]
+    // Commit
+  public : uint32_t              _size_re_order_buffer             ;
+  public : uint32_t              _nb_re_order_buffer_bank          ;
+  public : Tpriority_t           _commit_priority                  ;
+  public : Tload_balancing_t     _commit_load_balancing            ;
+    // Issue
+  public : uint32_t              _size_issue_queue                 ;
+  public : uint32_t              _nb_issue_queue_bank              ;
+  public : Tpriority_t           _issue_priority                   ;
+  public : Tload_balancing_t     _issue_load_balancing             ;
+  public : bool               ** _table_routing                    ;//[nb_rename_unit][nb_inst_issue]
+  public : bool               ** _table_issue_type                 ;//[nb_inst_issue][nb_type]
+    // Reexecute
+  public : uint32_t              _size_reexecute_queue             ;
+  public : Tpriority_t           _reexecute_priority               ;
+  public : Tload_balancing_t     _reexecute_load_balancing         ;
+    // Rename_unit
+  public : Tpriority_t         * _rename_select_priority           ;//[nb_rename_unit]
+  public : Tload_balancing_t   * _rename_select_load_balancing     ;//[nb_rename_unit]
+  public : uint32_t            * _rename_select_nb_front_end_select;//[nb_rename_unit]
+  public : uint32_t            * _nb_general_register              ;//[nb_rename_unit]
+  public : uint32_t            * _nb_special_register              ;//[nb_rename_unit]
+  public : uint32_t            * _nb_reg_free                      ;//[nb_rename_unit]
+  public : uint32_t            * _nb_rename_unit_bank              ;//[nb_rename_unit]
+  public : uint32_t            * _size_read_counter                ;//[nb_rename_unit]
+  public : uint32_t            * _nb_load_store_queue              ;//[nb_rename_unit]
+  public : uint32_t           ** _size_store_queue                 ;//[nb_rename_unit][nb_load_store_queue]
+  public : uint32_t           ** _size_load_queue                  ;//[nb_rename_unit][nb_load_store_queue]
+  public : uint32_t           ** _link_load_store_unit_with_thread ;//[nb_front_end][nb_context]
+    // SPR
+  public : bool              *** _implement_group                  ;//[nb_front_end][nb_context][NB_GROUP]
+
+
+  public : std::vector<uint32_t>*_link_front_end_with_rename_unit              ;//[nb_rename_unit]
+  public : uint32_t            * _rename_unit_nb_front_end                     ;//[nb_rename_unit]
+  public : uint32_t           ** _rename_unit_nb_context                       ;//[nb_rename_unit][nb_front_end]
+  public : uint32_t           ** _rename_unit_nb_inst_decod                    ;//[nb_rename_unit][nb_front_end]
+  public : uint32_t          *** _rename_unit_link_load_store_unit_with_thread ;//[nb_rename_unit][nb_front_end][nb_context]
+  public : uint32_t            * _rename_unit_size_front_end_id                ;//[nb_rename_unit]
+  public : uint32_t            * _rename_unit_size_context_id                  ;//[nb_rename_unit]
+  public : uint32_t              _max_nb_context                               ;
+  public : uint32_t              _max_branch_speculated                        ;
+//public : uint32_t              _size_front_end_id                            ;
+//public : uint32_t              _size_context_id                              ;
+//public : uint32_t              _size_packet_id                               ;
+  public : uint32_t              _size_rename_id                               ;
+//public : uint32_t              _size_max_depth                               ;
+//public : uint32_t              _size_general_register                        ;
+//public : uint32_t              _size_special_register                        ;
+//public : uint32_t              _size_store_queue_ptr                         ;
+//public : uint32_t              _size_load_queue_ptr                          ;
+//public : uint32_t              _size_nb_inst                                 ;
+//public : uint32_t           ** _size_depth                                   ;//[nb_front_end][nb_context]
+  public : uint32_t              _sum_inst_insert                               ;
+  public : uint32_t              _sum_inst_retire                              ;
+
+//public : bool                  _have_port_front_end_id                       ;
+//public : bool                  _have_port_context_id                         ;
+//public : bool                  _have_port_packet_id                          ;
+  public : bool                  _have_port_rename_id                          ;
+//public : bool                  _have_port_load_queue_ptr                     ;
+//public : bool                  _have_port_max_depth                          ;
+//public : bool               ** _have_port_depth                              ;//[nb_front_end][nb_context]
+
+  public  : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit          ::Parameters ** _param_rename_unit          ;
+  public  : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit          ::Parameters  * _param_commit_unit          ;
+  public  : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue          ::Parameters  * _param_issue_queue          ;
+  public  : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit       ::Parameters  * _param_reexecute_unit       ;   
+  public  : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters  * _param_special_register_unit;
+  public  : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue      ::Parameters  * _param_glue                 ;
+
+    //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t              nb_front_end                     ,
+                        uint32_t            * nb_context                       ,//[nb_front_end]
+                        uint32_t              nb_rename_unit                   ,
+                        uint32_t              nb_execute_loop                  ,
+                        uint32_t            * nb_inst_decod                    ,//[nb_front_end]
+                        uint32_t            * nb_inst_insert                   ,//[nb_rename_unit]
+                        uint32_t            * nb_inst_retire                   ,//[nb_rename_unit]
+                        uint32_t              nb_inst_issue                    ,
+                        uint32_t            * nb_inst_execute                  ,//[nb_execute_loop]
+                        uint32_t              nb_inst_reexecute                ,
+                        uint32_t              nb_inst_commit                   ,
+                        uint32_t              nb_inst_branch_complete          ,
+                        uint32_t           ** nb_branch_speculated             ,//[nb_front_end][nb_context]
+                        uint32_t              nb_rename_unit_select            ,
+                        uint32_t              nb_execute_loop_select           ,
+                        uint32_t              size_general_data                ,
+                        uint32_t              size_special_data                ,
+                        uint32_t            * link_rename_unit_with_front_end  ,//[nb_front_end]
+                        // Commit
+                        uint32_t              size_re_order_buffer             ,
+                        uint32_t              nb_re_order_buffer_bank          ,
+                        Tpriority_t           commit_priority                  ,
+                        Tload_balancing_t     commit_load_balancing            ,
+                        // Issue
+                        uint32_t              size_issue_queue                 ,
+                        uint32_t              nb_issue_queue_bank              ,
+                        Tpriority_t           issue_priority                   ,
+                        Tload_balancing_t     issue_load_balancing             ,
+                        bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
+                        bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
+                        // Reexecute
+                        uint32_t              size_reexecute_queue             ,
+                        Tpriority_t           reexecute_priority               ,
+                        Tload_balancing_t     reexecute_load_balancing         ,
+                        // Rename_unit
+                        Tpriority_t         * rename_select_priority           ,//[nb_rename_unit]
+                        Tload_balancing_t   * rename_select_load_balancing     ,//[nb_rename_unit]
+                        uint32_t            * rename_select_nb_front_end_select,//[nb_rename_unit]
+                        uint32_t            * nb_general_register              ,//[nb_rename_unit]
+                        uint32_t            * nb_special_register              ,//[nb_rename_unit]
+                        uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
+                        uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
+                        uint32_t            * size_read_counter                ,//[nb_rename_unit]
+                        uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
+                        uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
+                        uint32_t           ** size_load_queue                  ,//[nb_rename_unit][nb_load_store_queue]
+                        uint32_t           ** link_load_store_unit_with_thread ,//[nb_front_end][nb_context]
+                        // SPR
+                        bool              *** implement_group                  ,//[nb_front_end][nb_context][NB_GROUP]
+
+                        bool                  is_toplevel=false
+                        );
+//   public : Parameters  (Parameters & param) ;
+  public : ~Parameters () ;
+
+  public :        Parameters_test msg_error  (void);
+
+  public :        void            copy       (void);
+
+  public :        std::string     print      (uint32_t depth);
+  public : friend std::ostream&   operator<< (std::ostream& output_stream,
+                                              morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters & x);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine.cpp	(revision 88)
@@ -0,0 +1,115 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::OOO_Engine"
+  OOO_Engine::OOO_Engine 
+  (
+#ifdef SYSTEMC
+   sc_module_name name,
+#else
+   string name,
+#endif
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics,
+#endif
+   morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters * param,
+   morpheo::behavioural::Tusage_t usage
+   ):
+    _name              (name)
+    ,_param            (param)
+    ,_usage            (usage)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    usage_environment(_usage);
+
+#if DEBUG_OOO_Engine == true
+    log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> Parameters"),_name.c_str());
+
+    std::cout << *param << std::endl;
+#endif
+
+    log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> Allocation"),_name.c_str());
+
+    allocation (
+#ifdef STATISTICS
+		param_statistics
+#endif
+		);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {	
+	log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str());
+
+	statistics_allocation(param_statistics);
+      }
+#endif
+
+#ifdef VHDL
+    if (usage_is_set(_usage,USE_VHDL))
+      {
+	// generate the vhdl
+	log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str());
+	
+	vhdl();
+      }
+#endif
+
+#ifdef SYSTEMC
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> Method - transition"),_name.c_str());
+
+	SC_METHOD (transition);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).pos();
+	
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	
+#endif
+      }
+    log_end(OOO_Engine,FUNCTION);
+  };
+    
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::~OOO_Engine"
+  OOO_Engine::~OOO_Engine (void)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+	statistics_deallocation();
+      }
+#endif
+
+    log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> Deallocation"),_name.c_str());
+    deallocation ();
+
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 88)
@@ -0,0 +1,1674 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::allocation"
+  void OOO_Engine::allocation 
+  (
+#ifdef STATISTICS
+   morpheo::behavioural::Parameters_Statistics * param_statistics
+#else
+   void
+#endif
+   )
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    _component   = new Component (_usage);
+
+    Entity * entity = _component->set_entity (_name       
+					      ,"OOO_Engine"
+#ifdef POSITION
+					      ,COMBINATORY 
+#endif
+					      );
+
+    _interfaces = entity->set_interfaces();
+    
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 ,IN
+							 ,SOUTH,
+							 "Generalist interface"
+#endif
+							 );
+      
+      in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
+      in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("rename",IN,WEST,_("Instruction from front_end."),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+      _ALLOC2_VALACK_IN ( in_RENAME_VAL                       , VAL                                                                                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_VALACK_OUT(out_RENAME_ACK                       , ACK                                                                                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_FRONT_END_ID              ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_CONTEXT_ID                ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_DEPTH                     ,"DEPTH"                     ,Tdepth_t          ,_param->_size_depth                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_TYPE                      ,"TYPE"                      ,Ttype_t           ,_param->_size_type                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_OPERATION                 ,"OPERATION"                 ,Toperation_t      ,_param->_size_operation              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE                ,"NO_EXECUTE"                ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT             ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS                   ,"ADDRESS"                   ,Tgeneral_data_t   ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT              ,"HAS_IMMEDIAT"              ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IMMEDIAT                  ,"IMMEDIAT"                  ,Tgeneral_data_t   ,_param->_size_general_data           ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_READ_RA                   ,"READ_RA"                   ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RA                ,"NUM_REG_RA"                ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_READ_RB                   ,"READ_RB"                   ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RB                ,"NUM_REG_RB"                ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_READ_RC                   ,"READ_RC"                   ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RC                ,"NUM_REG_RC"                ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RD                  ,"WRITE_RD"                  ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RD                ,"NUM_REG_RD"                ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RE                  ,"WRITE_RE"                  ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RE                ,"NUM_REG_RE"                ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION_USE             ,"EXCEPTION_USE"             ,Texception_t      ,_param->_size_exception_use          ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION                 ,"EXCEPTION"                 ,Texception_t      ,_param->_size_exception              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+    }
+
+    // ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("issue",OUT,EAST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
+
+      ALLOC1_VALACK_OUT (out_ISSUE_VAL                        , VAL                                                                                 );
+      ALLOC1_VALACK_IN  ( in_ISSUE_ACK                        , ACK                                                                                 );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_FRONT_END_ID               ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_CONTEXT_ID                 ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_PACKET_ID                  ,"PACKET_ID"                 ,Tpacket_t         ,_param->_size_rob_ptr                );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_TYPE                       ,"TYPE"                      ,Ttype_t           ,_param->_size_type                   );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_OPERATION                  ,"OPERATION"                 ,Toperation_t      ,_param->_size_operation              );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_WRITE      ,"STORE_QUEUE_PTR_WRITE"     ,Tlsq_ptr_t        ,_param->_size_store_queue_ptr        );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_LOAD_QUEUE_PTR_WRITE       ,"LOAD_QUEUE_PTR_WRITE"      ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr         );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_HAS_IMMEDIAT               ,"HAS_IMMEDIAT"              ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_IMMEDIAT                   ,"IMMEDIAT"                  ,Tgeneral_data_t   ,_param->_size_general_data           );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RA                    ,"READ_RA"                   ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RA                 ,"NUM_REG_RA"                ,Tgeneral_address_t,_param->_size_general_register       );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RB                    ,"READ_RB"                   ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RB                 ,"NUM_REG_RB"                ,Tgeneral_address_t,_param->_size_general_register       );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RC                    ,"READ_RC"                   ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RC                 ,"NUM_REG_RC"                ,Tspecial_address_t,_param->_size_special_register       );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RD                   ,"WRITE_RD"                  ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RD                 ,"NUM_REG_RD"                ,Tgeneral_address_t,_param->_size_general_register       );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RE                   ,"WRITE_RE"                  ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RE                 ,"NUM_REG_RE"                ,Tspecial_address_t,_param->_size_special_register       );
+    }
+
+    // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("execute_loop",IN,EAST,_("Instruction executed, from execute_loop."),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+      _ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL                 , VAL                                                                                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_VALACK_OUT(out_EXECUTE_LOOP_ACK                 , ACK                                                                                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FRONT_END_ID        ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CONTEXT_ID          ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_PACKET_ID           ,"PACKET_ID"                 ,Tpacket_t         ,_param->_size_rob_ptr                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//    _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE                ,"TYPE"                      ,Ttype_t           ,_param->_size_type                   ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+//    _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION           ,"OPERATION"                 ,Toperation_t      ,_param->_size_operation              ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS               ,"FLAGS"                     ,Tspecial_data_t   ,_param->_size_special_data           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION           ,"EXCEPTION"                 ,Texception_t      ,_param->_size_exception              ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE         ,"NO_SEQUENCE"               ,Tcontrol_t        ,1                                    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS             ,"ADDRESS"                   ,Tgeneral_data_t   ,_param->_size_general_data           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA                ,"DATA"                      ,Tgeneral_data_t   ,_param->_size_general_data           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+    }
+
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC1_INTERFACE("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);
+
+      ALLOC1_VALACK_OUT (out_INSERT_VAL                       , VAL);
+      ALLOC1_VALACK_IN  ( in_INSERT_ACK                       , ACK);
+      ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE                    ,"RD_USE"                    ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG                ,"RD_NUM_REG"                ,Tgeneral_address_t,_param->_size_general_register       );
+      ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE                    ,"RE_USE"                    ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG                ,"RE_NUM_REG"                ,Tspecial_address_t,_param->_size_special_register       );
+    }
+
+//     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//     {
+//       ALLOC1_INTERFACE("retire",OUT,EAST,_("Interface with RegisterFile's stat-list (retire Re-Order-Buffer)."),_param->_sum_inst_retire);
+
+//       ALLOC1_VALACK_OUT (out_RETIRE_VAL                       , VAL);
+//       ALLOC1_VALACK_IN  ( in_RETIRE_ACK                       , ACK);
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_USE                ,"RD_OLD_USE"                ,Tcontrol_t        ,1                                    );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_NUM_REG            ,"RD_OLD_NUM_REG"            ,Tgeneral_address_t,_param->_size_general_register       );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_USE                ,"RD_NEW_USE"                ,Tcontrol_t        ,1                                    );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_NUM_REG            ,"RD_NEW_NUM_REG"            ,Tgeneral_address_t,_param->_size_general_register       );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_USE                ,"RE_OLD_USE"                ,Tcontrol_t        ,1                                    );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_NUM_REG            ,"RE_OLD_NUM_REG"            ,Tspecial_address_t,_param->_size_special_register       );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE                ,"RE_NEW_USE"                ,Tcontrol_t        ,1                                    );
+//       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG            ,"RE_NEW_NUM_REG"            ,Tspecial_address_t,_param->_size_special_register       );
+//     }
+
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
+    {
+      ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
+
+      ALLOC1_VALACK_OUT (out_BRANCH_COMPLETE_VAL              , VAL);
+      ALLOC1_VALACK_IN  ( in_BRANCH_COMPLETE_ACK              , ACK);
+      ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_FRONT_END_ID     ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           );
+      ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_CONTEXT_ID       ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             );
+      ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_DEPTH            ,"DEPTH"                     ,Tdepth_t          ,_param->_size_depth                  );
+      ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_ADDRESS          ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    );
+      ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_FLAG             ,"FLAG"                      ,Tcontrol_t        ,1                                    );
+      ALLOC1_SIGNAL_IN  ( in_BRANCH_COMPLETE_MISS_PREDICTION  ,"MISS_PREDICTION"           ,Tcontrol_t        ,1                                    );
+    }
+                                                                             
+    // ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC_INTERFACE("commit_event",OUT,WEST,_("Commit an event (exception)."));
+
+      ALLOC_VALACK_OUT  (out_COMMIT_EVENT_VAL                 , VAL);
+      ALLOC_VALACK_IN   ( in_COMMIT_EVENT_ACK                 , ACK);
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_FRONT_END_ID        ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_CONTEXT_ID          ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_DEPTH               ,"DEPTH"                     ,Tdepth_t          ,_param->_size_depth                  );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_TYPE                ,"TYPE"                      ,Tevent_type_t     ,_param->_size_event_type             );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_IS_DELAY_SLOT       ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS             ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EPCR        ,"ADDRESS_EPCR"              ,Taddress_t        ,_param->_size_instruction_address    );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"ADDRESS_EEAR_VAL"          ,Tcontrol_t        ,1                                    );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EEAR        ,"ADDRESS_EEAR"              ,Taddress_t        ,_param->_size_general_data           );
+    }
+
+    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("event",IN,WEST,_("Event from context_state."),_param->_nb_front_end,_param->_nb_context[it1]);
+
+      _ALLOC2_VALACK_IN ( in_EVENT_VAL                        , VAL                                                                                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_VALACK_OUT(out_EVENT_ACK                        , ACK                                                                                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS                    ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT               ,"ADDRESS_NEXT"              ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_context[it1]); 
+      _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL           ,"ADDRESS_NEXT_VAL"          ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE                 ,"IS_DS_TAKE"                ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr_event",IN,WEST,_("Exception : save spr and set a lot of special register."),_param->_nb_front_end,_param->_nb_context[it1]);
+
+      _ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL                    , VAL                                                                                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_VALACK_OUT(out_SPR_EVENT_ACK                    , ACK                                                                                 ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EPCR                   ,"EPCR"                      ,Tspr_t            ,_param->_size_spr                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR_WEN               ,"EEAR_WEN"                  ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR                   ,"EEAR"                      ,Tspr_t            ,_param->_size_spr                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX                 ,"SR_DSX"                    ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR              ,"SR_TO_ESR"                 ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+                                                                                  
+    // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Internal number instruction."),_param->_nb_front_end,_param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL               ,"COMMIT_ALL"                 ,Tcounter_t       ,_param->_size_nb_inst_commit         ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM               ,"COMMIT_MEM"                 ,Tcounter_t       ,_param->_size_nb_inst_commit         ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_MIN                        ,"MIN"                        ,Tdepth_t         ,_param->_size_depth                  ,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_MAX                        ,"MAX"                        ,Tdepth_t         ,_param->_size_depth+1                ,_param->_nb_front_end, _param->_nb_context[it1]); 
+    }
+
+    // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("spr",OUT,WEST,_("SPR"),_param->_nb_front_end,_param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE                       ,"SR_IEE"                     ,Tcontrol_t       ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_OUT(out_SPR_SR_EPH                       ,"SR_EPH"                     ,Tcontrol_t       ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    std::string name;
+
+    _component_rename_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit * [_param->_nb_rename_unit];
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      {
+        name = _name+"_rename_unit_"+toString(i);
+        log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
+        
+        _component_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit
+          (name.c_str()
+#ifdef STATISTICS
+           ,param_statistics
+#endif
+           ,_param->_param_rename_unit [i]
+           ,_usage);
+
+        _component->set_component (_component_rename_unit [i]->_component
+#ifdef POSITION
+                                   , 50, 50, 10, 10
+#endif
+                                   );
+      }
+
+    {
+      name = _name+"_commit_unit";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_commit_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Commit_unit
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_commit_unit
+	 ,_usage);
+      
+      _component->set_component (_component_commit_unit->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_issue_queue";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_issue_queue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_issue_queue
+	 ,_usage);
+      
+      _component->set_component (_component_issue_queue->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_reexecute_unit";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Reexecute_unit
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_reexecute_unit
+	 ,_usage);
+      
+      _component->set_component (_component_reexecute_unit->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_special_register_unit";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_special_register_unit
+	 ,_usage);
+      
+      _component->set_component (_component_special_register_unit->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+
+    {
+      name = _name+"_glue";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
+      
+      _component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::OOO_Engine_Glue
+	(name.c_str()
+#ifdef STATISTICS
+	 ,param_statistics
+#endif
+	 ,_param->_param_glue
+	 ,_usage);
+      
+      _component->set_component (_component_glue->_component
+#ifdef POSITION
+				 , 50, 50, 10, 10
+#endif
+				 );
+    }
+        
+    // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    std::string src,dest;
+
+    // ===================================================================
+    // =====[ rename_unit ]===============================================
+    // ===================================================================
+    for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+      {
+        src = _name+"_rename_unit_"+toString(i);
+        log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
+        
+        {
+          dest = _name;
+#ifdef POSITION
+          _component->interface_map (src ,"",
+                                     dest,"");
+#endif
+          PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+          PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+        }
+
+        // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
+        uint32_t x = 0;
+        for (uint32_t j=0; j<_param->_nb_front_end; j++)
+          {
+            if (i == *it)
+              {
+                // this front end is link with this rename_unit
+                for (uint32_t k=0; k<_param->_nb_inst_decod [j]; k++)
+                  {
+                    dest = _name;
+
+#ifdef POSITION
+                    _component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
+                                               dest,"rename_"   +toString(j)+"_"+toString(k));
+#endif
+
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_VAL"          ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_VAL"          );
+                    PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ACK"          ,
+                                        dest,"out_RENAME_"   +toString(j)+"_"+toString(k)+"_ACK"          );
+                    if (_param->_have_port_context_id)
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_CONTEXT_ID"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_CONTEXT_ID"   );
+                    if (_param->_have_port_depth)
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_DEPTH"        ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_DEPTH"        );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_TYPE"         ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_TYPE"         );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_OPERATION"    ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_OPERATION"    );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NO_EXECUTE"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_NO_EXECUTE"   );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT",
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT");
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS"      ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_ADDRESS"      );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_HAS_IMMEDIAT" ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_HAS_IMMEDIAT" );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IMMEDIAT"     ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_IMMEDIAT"     );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RA"      ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_READ_RA"      );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RA"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_NUM_REG_RA"   );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RB"      ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_READ_RB"      );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RB"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_NUM_REG_RB"   );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RC"      ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_READ_RC"      );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RC"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_NUM_REG_RC"   );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RD"     ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_WRITE_RD"     );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RD"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_NUM_REG_RD"   );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RE"     ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_WRITE_RE"     );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RE"   ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_NUM_REG_RE"   );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION_USE",
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_EXCEPTION_USE");
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION"    ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_EXCEPTION"    );
+
+                    // glue
+                    dest = _name+"_glue";
+
+#ifdef POSITION
+                    _component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
+                                               dest,"rename_"   +toString(j)+"_"+toString(k));
+#endif
+
+                    if (_param->_have_port_front_end_id)
+                    COMPONENT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+            "_FRONT_END_ID" ,
+                                             dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_RENAME_UNIT_FRONT_END_ID" );
+                  }
+
+                x ++; 
+                it++;
+              }
+          }
+
+        // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+          {
+            dest = _name+"_commit_unit";
+            
+#ifdef POSITION
+            _component->interface_map (src ,"insert_"+toString(j),
+                                       dest,"insert_"+toString(i)+"_"+toString(j));
+#endif
+
+            if (_param->_have_port_depth)
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_DEPTH"         ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_DEPTH"         );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_IS_DELAY_SLOT" ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_ADDRESS"       ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS"       );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_EXCEPTION_USE" ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE" );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_EXCEPTION"     ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION"     );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_NUM_REG_RA_LOG",
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_LOG");
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_NUM_REG_RB_LOG",
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_LOG");
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_NUM_REG_RC_LOG",
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_LOG");
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_NUM_REG_RD_LOG",
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG");
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_NUM_REG_RE_LOG",
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG");
+
+            dest = _name+"_glue";
+            
+#ifdef POSITION
+            _component->interface_map (src ,"insert_"+toString(j),
+                                       dest,"insert_"+toString(i)+"_"+toString(j));
+#endif
+            
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_VAL"                  ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_VAL"                  );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(j)+                            "_ACK"                  ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_ACK"                  );
+            if (_param->_have_port_front_end_id)
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_FRONT_END_ID"         ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_FRONT_END_ID"         );
+            if (_param->_have_port_context_id)
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_CONTEXT_ID"           ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_CONTEXT_ID"           );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_TYPE"                 ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_TYPE"                 );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_OPERATION"            ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_OPERATION"            );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NO_EXECUTE"           ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NO_EXECUTE"           );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_HAS_IMMEDIAT"         ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_HAS_IMMEDIAT"         );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_IMMEDIAT"             ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_IMMEDIAT"             );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_STORE_QUEUE_PTR_WRITE",
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_STORE_QUEUE_PTR_WRITE");
+            if (_param->_have_port_load_queue_ptr)
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_LOAD_QUEUE_PTR_WRITE" ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE" );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_READ_RA"              ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RA"              );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RA_PHY"       ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RA_PHY"       );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_READ_RB"              ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RB"              );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RB_PHY"       ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RB_PHY"       );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_READ_RC"              ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RC"              );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RC_PHY"       ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RC_PHY"       );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_WRITE_RD"             ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RD"             );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RD_PHY_OLD"   ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_OLD"   );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RD_PHY_NEW"   ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_NEW"   );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_WRITE_RE"             ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RE"             );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RE_PHY_OLD"   ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_OLD"   );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+                            "_NUM_REG_RE_PHY_NEW"   ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_NEW"   );
+          }
+
+        for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
+          {
+            dest = _name+"_commit_unit";
+            
+#ifdef POSITION
+            _component->interface_map (src ,"retire_"+toString(j),
+                                       dest,"retire_"+toString(i)+"_"+toString(j));
+#endif
+
+
+
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_VAL"               ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_VAL"               );
+            COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(j)+                "_ACK"               ,
+                                     dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_ACK"               );
+            if (_param->_have_port_front_end_id)
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_FRONT_END_ID"      ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID"      );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_WRITE_RD"          ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RD"          );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RD_PHY_OLD",
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_OLD");
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RD_PHY_NEW",
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_NEW");
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_WRITE_RE"          ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RE"          );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RE_PHY_OLD",
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_OLD");
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RE_PHY_NEW",
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_NEW");
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_EVENT_STATE"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_EVENT_STATE"       );
+
+            if (_param->_have_port_context_id)
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_CONTEXT_ID"           ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID"           );
+//          COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_TYPE"                 ,
+//                                   dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_TYPE"                 );
+//          COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_OPERATION"            ,
+//                                   dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_OPERATION"            );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_USE_STORE_QUEUE"      ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_STORE_QUEUE"      );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_USE_LOAD_QUEUE"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_LOAD_QUEUE"       );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_STORE_QUEUE_PTR_WRITE",
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE");
+            if (_param->_have_port_load_queue_ptr)
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_LOAD_QUEUE_PTR_WRITE" ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_LOAD_QUEUE_PTR_WRITE" );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_READ_RA"              ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RA"              );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RA_PHY"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_PHY"       );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_READ_RB"              ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RB"              );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RB_PHY"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_PHY"       );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_READ_RC"              ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RC"              );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RC_PHY"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_PHY"       );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RD_LOG"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG"       );
+            COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                "_NUM_REG_RE_LOG"       ,
+                                     dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG"       );
+
+//             dest = _name+"_glue";
+            
+// #ifdef POSITION
+//             _component->interface_map (src ,"retire_"+toString(j),
+//                                        dest,"retire_"+toString(i)+"_"+toString(j));
+// #endif
+            
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_VAL"               ,
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_VAL"               );
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(j)+                            "_ACK"               ,
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_ACK"               );
+//             if (_param->_have_port_front_end_id)
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_FRONT_END_ID"      ,
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_FRONT_END_ID"      );
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_WRITE_RD"          ,
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RD"          );
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_NUM_REG_RD_PHY_OLD",
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_OLD");
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_NUM_REG_RD_PHY_NEW",
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_NEW");
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_WRITE_RE"          ,
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RE"          );
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_NUM_REG_RE_PHY_OLD",
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_OLD");
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_NUM_REG_RE_PHY_NEW",
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_NEW");
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+                            "_EVENT_STATE"       ,
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_EVENT_STATE"       );
+          }
+
+        // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        for (uint32_t i=0; i<_param->_nb_front_end; i++)
+          for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+            {
+              dest = _name+"_glue";
+            
+#ifdef POSITION
+              _component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
+                                         dest,"spr_"     +toString(i)+"_"+toString(j));
+#endif
+
+              COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+            "_SR",
+                                       dest,"out_SPR_"     +toString(i)+"_"+toString(j)+"_RENAME_UNIT_SR");
+            }
+    }
+
+    // ===================================================================
+    // =====[ commit_unit ]===============================================
+    // ===================================================================
+    {
+      src = _name+"_commit_unit";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+        for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+          {
+            dest = _name+"_glue";
+#ifdef POSITION
+            _component->interface_map (src ,"insert_"+toString(i)+"_"+toString(j),
+                                       dest,"insert_"+toString(i)+"_"+toString(j));
+#endif
+            
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_VAL"                  ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL"                  );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_"+toString(j)+            "_ACK"                  ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK"                  );
+            if (_param->_have_port_front_end_id)
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_FRONT_END_ID"         ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID"         );
+            if (_param->_have_port_context_id)
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_CONTEXT_ID"           ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_CONTEXT_ID"           );
+//          COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_RENAME_UNIT_ID"       ,
+//                                   dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_RENAME_UNIT_ID"       );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_TYPE"                 ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_TYPE"                 );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_OPERATION"            ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_OPERATION"            );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NO_EXECUTE"           ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NO_EXECUTE"           );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_STORE_QUEUE_PTR_WRITE",
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE");
+            if (_param->_have_port_load_queue_ptr)
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_LOAD_QUEUE_PTR_WRITE" ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE" );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_READ_RA"              ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RA"              );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RA_PHY"       ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RA_PHY"       );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_READ_RB"              ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RB"              );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RB_PHY"       ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RB_PHY"       );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_READ_RC"              ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RC"              );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RC_PHY"       ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RC_PHY"       );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_WRITE_RD"             ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD"             );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RD_PHY_OLD"   ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD"   );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RD_PHY_NEW"   ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW"   );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_WRITE_RE"             ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE"             );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RE_PHY_OLD"   ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD"   );
+            COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RE_PHY_NEW"   ,
+                                     dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW"   );
+            
+            dest = _name+"_issue_queue";
+#ifdef POSITION
+            _component->interface_map (src ,"insert_"  +toString(i)+"_"+toString(j),
+                                       dest,"issue_in_"+toString(i)+"_"+toString(j));
+#endif
+            
+            if (_param->_have_port_rob_ptr)
+            COMPONENT_MAP(_component,src ,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_PACKET_ID",
+                                     dest, "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+"_PACKET_ID");
+
+            //    in_INSERT_DEPTH          - component_rename_unit
+            //    in_INSERT_ADDRESS        - component_rename_unit
+            //    in_INSERT_EXCEPTION_USE  - component_rename_unit
+            //    in_INSERT_EXCEPTION      - component_rename_unit
+            //    in_INSERT_NUM_REG_RA_LOG - component_rename_unit
+            //    in_INSERT_NUM_REG_RB_LOG - component_rename_unit
+            //    in_INSERT_NUM_REG_RC_LOG - component_rename_unit
+            //    in_INSERT_NUM_REG_RD_LOG - component_rename_unit
+            //    in_INSERT_NUM_REG_RE_LOG - component_rename_unit
+            //    in_INSERT_IS_DELAY_SLOT  - component_rename_unit
+          }
+										   
+      // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+      for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+        for (uint32_t j=0; j<_param->_nb_inst_retire [i]; j++)
+          {
+//             dest = _name+"_glue";
+            
+// #ifdef POSITION
+//             _component->interface_map (src ,"retire_"+toString(i)+"_"+toString(j),
+//                                        dest,"retire_"+toString(i)+"_"+toString(j));
+// #endif
+
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_VAL"               ,
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL"               );
+//             COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_"+toString(j)+            "_ACK"               ,
+//                                      dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK"               );
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_WRITE_RD"          ,
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD"          );
+//             if (_param->_have_port_front_end_id)
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_FRONT_END_ID"      ,
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID"      );
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RD_PHY_OLD",
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD");
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RD_PHY_NEW",
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW");
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_WRITE_RE"          ,
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE"          );
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RE_PHY_OLD",
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD");
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RE_PHY_NEW",
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW");
+//             COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+            "_EVENT_STATE"       ,
+//                                      dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_EVENT_STATE"       );
+
+
+            //  out_RETIRE_VAL                       - component_rename_unit
+            //   in_RETIRE_ACK                       - component_rename_unit
+            //  out_RETIRE_WRITE_RD                  - component_rename_unit
+            //  out_RETIRE_FRONT_END_ID              - component_rename_unit
+            //  out_RETIRE_NUM_REG_RD_PHY_OLD        - component_rename_unit
+            //  out_RETIRE_NUM_REG_RD_PHY_NEW        - component_rename_unit
+            //  out_RETIRE_WRITE_RE                  - component_rename_unit
+            //  out_RETIRE_NUM_REG_RE_PHY_OLD        - component_rename_unit
+            //  out_RETIRE_NUM_REG_RE_PHY_NEW        - component_rename_unit
+            //  out_RETIRE_EVENT_STATE               - component_rename_unit
+    
+            //  out_RETIRE_CONTEXT_ID                - component_rename_unit
+            ////out_RETIRE_RENAME_UNIT_ID            - component_rename_unit
+            //  out_RETIRE_USE_STORE_QUEUE           - component_rename_unit
+            //  out_RETIRE_USE_LOAD_QUEUE            - component_rename_unit
+            //  out_RETIRE_STORE_QUEUE_PTR_WRITE     - component_rename_unit
+            //  out_RETIRE_LOAD_QUEUE_PTR_WRITE      - component_rename_unit
+            //  out_RETIRE_READ_RA                   - component_rename_unit
+            //  out_RETIRE_NUM_REG_RA_PHY            - component_rename_unit
+            //  out_RETIRE_READ_RB                   - component_rename_unit
+            //  out_RETIRE_NUM_REG_RB_PHY            - component_rename_unit
+            //  out_RETIRE_READ_RC                   - component_rename_unit
+            //  out_RETIRE_NUM_REG_RC_PHY            - component_rename_unit
+            //  out_RETIRE_NUM_REG_RD_LOG            - component_rename_unit
+            //  out_RETIRE_NUM_REG_RE_LOG            - component_rename_unit
+          }
+      
+      // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+      for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
+        {
+          dest = _name+"_reexecute_unit";
+#ifdef POSITION
+          _component->interface_map (src ,"commit_"+toString(i),
+                                     dest,"commit_"+toString(i));
+#endif
+        
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_VAL"        ,
+                                   dest,"out_COMMIT_"+toString(i)+"_VAL"        );
+          COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_ACK"        ,
+                                   dest, "in_COMMIT_"+toString(i)+"_ACK"        );
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN"        ,
+                                   dest,"out_COMMIT_"+toString(i)+"_WEN"        );
+          if (_param->_have_port_rob_ptr)
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID"  ,
+                                   dest,"out_COMMIT_"+toString(i)+"_PACKET_ID"  );
+//        COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_OPERATION"  ,
+//                                 dest,"out_COMMIT_"+toString(i)+"_OPERATION"  );
+//        COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_TYPE"       ,
+//                                 dest,"out_COMMIT_"+toString(i)+"_TYPE"       );
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FLAGS"      ,
+                                   dest,"out_COMMIT_"+toString(i)+"_FLAGS"      );
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_EXCEPTION"  ,
+                                   dest,"out_COMMIT_"+toString(i)+"_EXCEPTION"  );
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_NO_SEQUENCE",
+                                   dest,"out_COMMIT_"+toString(i)+"_NO_SEQUENCE");
+          COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_ADDRESS"    ,
+                                   dest,"out_COMMIT_"+toString(i)+"_ADDRESS"    );
+          COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_NUM_REG_RD" ,
+                                   dest, "in_COMMIT_"+toString(i)+"_NUM_REG_RD" );
+          //@@@@@@@@@@
+	}
+      
+      // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+      for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+        {
+          dest = _name+"_reexecute_unit";
+#ifdef POSITION
+          _component->interface_map (src ,"reexecute_"    +toString(i),
+                                     dest,"reexecute_rob_"+toString(i));
+#endif
+
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_VAL"                  ,
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_VAL"                  );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"    +toString(i)+"_ACK"                  ,
+                                   dest,"out_REEXECUTE_ROB_"+toString(i)+"_ACK"                  );
+          if (_param->_have_port_front_end_id)
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_FRONT_END_ID"         ,
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_FRONT_END_ID"         );
+          if (_param->_have_port_context_id)
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_CONTEXT_ID"           ,
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_CONTEXT_ID"           );
+          if (_param->_have_port_rob_ptr)
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_PACKET_ID"            ,
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_PACKET_ID"            );
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_OPERATION"            ,
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_OPERATION"            );
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_TYPE"                 ,
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_TYPE"                 );
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"    +toString(i)+"_STORE_QUEUE_PTR_WRITE",
+                                   dest, "in_REEXECUTE_ROB_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+    	}
+									   
+      // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+      for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+        {
+          dest = _name;
+#ifdef POSITION
+          _component->interface_map (src ,"branch_complete_"+toString(i),
+                                     dest,"branch_complete_"+toString(i));
+#endif
+
+          PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL"            ,
+                              dest,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL"            );
+          PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_ACK"            ,
+                              dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ACK"            );
+          if (_param->_have_port_front_end_id)
+          PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID"   ,
+                              dest,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID"   );
+          if (_param->_have_port_context_id)
+          PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID"     ,
+                              dest,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID"     );
+          if (_param->_have_port_depth)
+          PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH"          ,
+                              dest,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH"          );
+          PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"        ,
+                              dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"        );
+          PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_FLAG"           ,
+                              dest,"out_BRANCH_COMPLETE_"+toString(i)+"_FLAG"           );
+          PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION",
+                              dest, "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION");
+        }
+										   
+      // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      {
+        dest = _name;
+#ifdef POSITION
+        _component->interface_map (src ,"update",
+                                   dest,"commit_event");
+#endif
+
+        PORT_MAP(_component,src ,"out_UPDATE_VAL"             ,dest,"out_COMMIT_EVENT_VAL"             );
+        PORT_MAP(_component,src , "in_UPDATE_ACK"             ,dest, "in_COMMIT_EVENT_ACK"             );
+        if (_param->_have_port_front_end_id)
+        PORT_MAP(_component,src ,"out_UPDATE_FRONT_END_ID"    ,dest,"out_COMMIT_EVENT_FRONT_END_ID"    );
+        if (_param->_have_port_context_id)
+        PORT_MAP(_component,src ,"out_UPDATE_CONTEXT_ID"      ,dest,"out_COMMIT_EVENT_CONTEXT_ID"      );
+        if (_param->_have_port_depth)
+        PORT_MAP(_component,src ,"out_UPDATE_DEPTH"           ,dest,"out_COMMIT_EVENT_DEPTH"           );
+        PORT_MAP(_component,src ,"out_UPDATE_TYPE"            ,dest,"out_COMMIT_EVENT_TYPE"            );
+        PORT_MAP(_component,src ,"out_UPDATE_IS_DELAY_SLOT"   ,dest,"out_COMMIT_EVENT_IS_DELAY_SLOT"   );
+        PORT_MAP(_component,src ,"out_UPDATE_ADDRESS"         ,dest,"out_COMMIT_EVENT_ADDRESS"         );
+        PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR"    ,dest,"out_COMMIT_EVENT_ADDRESS_EPCR"    );
+        PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL");
+        PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR"    ,dest,"out_COMMIT_EVENT_ADDRESS_EEAR"    );
+      }
+
+      // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"event_"+toString(i)+"_"+toString(j),
+                                       dest,"event_"+toString(i)+"_"+toString(j));
+#endif
+            
+            PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL"             ,
+                                dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL"             );
+            PORT_MAP(_component,src ,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK"             ,
+                                dest,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK"             );
+            PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS"         ,
+                                dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS"         );
+            PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT"    ,
+                                dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT"    ); 
+            PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL",
+                                dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL");
+            PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE"      ,
+                                dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE"      );
+          }
+										   
+      // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"nb_inst_"+toString(i)+"_"+toString(j),
+                                       dest,"nb_inst_"+toString(i)+"_"+toString(j));
+#endif
+
+            PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL",
+                                dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL");
+            PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM",
+                                dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM");
+          }
+
+      // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"depth_"+toString(i)+"_"+toString(j),
+                                       dest,"depth_"+toString(i)+"_"+toString(j));
+#endif
+
+            if (_param->_have_port_depth)
+            PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN",
+                                dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN");
+            PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX",
+                                dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX");
+          }
+
+      // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name+"_glue";
+            
+#ifdef POSITION
+            _component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
+                                       dest,"spr_"     +toString(i)+"_"+toString(j));
+#endif
+
+            COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+            "_SR_OVE",
+                                     dest,"out_SPR_"     +toString(i)+"_"+toString(j)+"_COMMIT_UNIT_SR_OVE");
+          }
+
+      // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name+"_special_register_unit";
+#ifdef POSITION
+            _component->interface_map (src ,"spr_write_" +toString(i)+"_"+toString(j),
+                                       dest,"spr_commit_"+toString(i)+"_"+toString(j));
+#endif
+
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_VAL"      ,
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_VAL"      );
+            COMPONENT_MAP(_component,src , "in_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_ACK"      ,
+                                     dest,"out_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_ACK"      );
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F_VAL" ,
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F_VAL" );
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F"     ,
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F"     );
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY_VAL",
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY_VAL");
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY"    ,
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY"    );
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV_VAL",
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV_VAL");
+            COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV"    ,
+                                     dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV"    );
+          }
+      
+    }
+
+    // ===================================================================
+    // =====[ issue_queue ]===============================================
+    // ===================================================================
+    {
+      src = _name+"_issue_queue";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+        for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+          {
+            dest = _name+"_glue";
+#ifdef POSITION
+            _component->interface_map (src ,"issue_in_"+toString(i)+"_"+toString(j),
+                                       dest,"insert_"  +toString(i)+"_"+toString(j));
+#endif
+
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_VAL"                  ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_VAL"                  );
+            COMPONENT_MAP(_component,src ,"out_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_ACK"                  ,
+                                     dest, "in_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_ACK"                  );
+            if (_param->_have_port_context_id)
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_CONTEXT_ID"           ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_CONTEXT_ID"           );
+            if (_param->_have_port_front_end_id)
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_FRONT_END_ID"         ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_FRONT_END_ID"         );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_OPERATION"            ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_OPERATION"            );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_TYPE"                 ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_TYPE"                 );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_STORE_QUEUE_PTR_WRITE",
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE");
+            if (_param->_have_port_load_queue_ptr)
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_LOAD_QUEUE_PTR_WRITE" ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE" );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_HAS_IMMEDIAT"         ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_HAS_IMMEDIAT"         );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_IMMEDIAT"             ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_IMMEDIAT"             );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_READ_RA"              ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RA"              );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RA"           ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RA"           );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_READ_RB"              ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RB"              );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RB"           ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RB"           );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_READ_RC"              ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RC"              );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RC"           ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RC"           );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_WRITE_RD"             ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RD"             );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RD"           ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RD"           );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_WRITE_RE"             ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RE"             );
+            COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+            "_NUM_REG_RE"           ,
+                                     dest,"out_INSERT_"  +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RE"           );
+
+
+            
+            //   in_ISSUE_IN_PACKET_ID - component_commit_unit
+          }
+
+      // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+        {
+          dest = _name+"_reexecute_unit";
+#ifdef POSITION
+          _component->interface_map (src ,"reexecute_"+toString(i),
+                                     dest,"reexecute_"+toString(i));
+#endif
+       
+          
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_VAL"                  ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_VAL"                  );
+          COMPONENT_MAP(_component,src ,"out_REEXECUTE_"+toString(i)+"_ACK"                  ,
+                                   dest, "in_REEXECUTE_"+toString(i)+"_ACK"                  );
+          if (_param->_have_port_front_end_id)
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_FRONT_END_ID"         ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_FRONT_END_ID"         );
+          if (_param->_have_port_context_id)
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_CONTEXT_ID"           ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_CONTEXT_ID"           );
+          if (_param->_have_port_rob_ptr)
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_PACKET_ID"            ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_PACKET_ID"            );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_TYPE"                 ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_TYPE"                 );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_OPERATION"            ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_OPERATION"            );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
+                                   dest,"out_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
+          if (_param->_have_port_load_queue_ptr)
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT"         ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT"         );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_IMMEDIAT"             ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_IMMEDIAT"             );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RA"              ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_READ_RA"              );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RA"           ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RA"           );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RB"              ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_READ_RB"              );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RB"           ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RB"           );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RC"              ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_READ_RC"              );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RC"           ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RC"           );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RD"             ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RD"             );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RD"           ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RD"           );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RE"             ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RE"             );
+          COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RE"           ,
+                                   dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RE"           );
+        }
+
+      // ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+        {
+          dest = _name;
+          
+#ifdef POSITION
+          _component->interface_map (src ,"issue_out_"+toString(i),
+                                     dest,"issue_"    +toString(i));
+#endif
+
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_VAL"                  ,
+                              dest,"out_ISSUE_"    +toString(i)+"_VAL"                  );
+          PORT_MAP(_component,src , "in_ISSUE_OUT_"+toString(i)+"_ACK"                  ,
+                              dest, "in_ISSUE_"    +toString(i)+"_ACK"                  );
+          if (_param->_have_port_front_end_id)
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_FRONT_END_ID"         ,
+                              dest,"out_ISSUE_"    +toString(i)+"_FRONT_END_ID"         );
+          if (_param->_have_port_context_id)
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_CONTEXT_ID"           ,
+                              dest,"out_ISSUE_"    +toString(i)+"_CONTEXT_ID"           );
+          if (_param->_have_port_rob_ptr)
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_PACKET_ID"            ,
+                              dest,"out_ISSUE_"    +toString(i)+"_PACKET_ID"            );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_TYPE"                 ,
+                              dest,"out_ISSUE_"    +toString(i)+"_TYPE"                 );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_OPERATION"            ,
+                              dest,"out_ISSUE_"    +toString(i)+"_OPERATION"            );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
+                              dest,"out_ISSUE_"    +toString(i)+"_STORE_QUEUE_PTR_WRITE");
+          if (_param->_have_port_load_queue_ptr)
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
+                              dest,"out_ISSUE_"    +toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_HAS_IMMEDIAT"         ,
+                              dest,"out_ISSUE_"    +toString(i)+"_HAS_IMMEDIAT"         );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_IMMEDIAT"             ,
+                              dest,"out_ISSUE_"    +toString(i)+"_IMMEDIAT"             );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RA"              ,
+                              dest,"out_ISSUE_"    +toString(i)+"_READ_RA"              );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RA"           ,
+                              dest,"out_ISSUE_"    +toString(i)+"_NUM_REG_RA"           );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RB"              ,
+                              dest,"out_ISSUE_"    +toString(i)+"_READ_RB"              );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RB"           ,
+                              dest,"out_ISSUE_"    +toString(i)+"_NUM_REG_RB"           );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RC"              ,
+                              dest,"out_ISSUE_"    +toString(i)+"_READ_RC"              );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RC"           ,
+                              dest,"out_ISSUE_"    +toString(i)+"_NUM_REG_RC"           );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RD"             ,
+                              dest,"out_ISSUE_"    +toString(i)+"_WRITE_RD"             );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RD"           ,
+                              dest,"out_ISSUE_"    +toString(i)+"_NUM_REG_RD"           );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RE"             ,
+                              dest,"out_ISSUE_"    +toString(i)+"_WRITE_RE"             );
+          PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RE"           ,
+                              dest,"out_ISSUE_"    +toString(i)+"_NUM_REG_RE"           );
+        }
+    }
+
+    // ===================================================================
+    // =====[ reexecute_unit ]============================================
+    // ===================================================================
+    {
+      src = _name+"_reexecute_unit";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_execute_loop; i++)
+        for (uint32_t j=0; j<_param->_nb_inst_execute[i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"execute_loop_"+toString(i)+"_"+toString(j),
+                                       dest,"execute_loop_"+toString(i)+"_"+toString(j));
+#endif
+
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL"         ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL"         );
+            PORT_MAP(_component,src ,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK"         ,
+                                dest,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK"         );
+            if (_param->_have_port_front_end_id)
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
+            if (_param->_have_port_context_id)
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID"  ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID"  );
+            if (_param->_have_port_rob_ptr)
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID"   ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID"   );
+//          PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE"        ,
+//                              dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE"        );
+//          PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION"   ,
+//                              dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION"   );
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS"       ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS"       );
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION"   ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION"   );
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" );
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS"     ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS"     );
+            PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA"        ,
+                                dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA"        );
+          }
+
+      // ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      //  out_COMMIT_VAL                           - component_commit_unit
+      //   in_COMMIT_ACK                           - component_commit_unit
+      //  out_COMMIT_WEN                           - component_commit_unit
+      //  out_COMMIT_FRONT_END_ID                  - component_commit_unit
+      //  out_COMMIT_CONTEXT_ID                    - component_commit_unit
+      //  out_COMMIT_PACKET_ID                     - component_commit_unit
+      ////out_COMMIT_OPERATION                     - component_commit_unit
+      ////out_COMMIT_TYPE                          - component_commit_unit
+      //  out_COMMIT_FLAGS                         - component_commit_unit
+      //  out_COMMIT_EXCEPTION                     - component_commit_unit
+      //  out_COMMIT_NO_SEQUENCE                   - component_commit_unit
+      //  out_COMMIT_ADDRESS                       - component_commit_unit
+      //   in_COMMIT_NUM_REG_RD                    - component_commit_unit
+      
+      // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
+        {
+          dest = _name+"_special_register_unit";
+#ifdef POSITION
+          _component->interface_map (src ,"spr_"+toString(i),
+                                     dest,"spr_"+toString(i));
+#endif
+      
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_VAL"         ,
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_VAL"         );
+          COMPONENT_MAP(_component,src , "in_SPR_"       +toString(i)+"_ACK"         ,
+                                   dest,"out_SPR_ACCESS_"+toString(i)+"_ACK"         );
+          if (_param->_have_port_front_end_id)
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_FRONT_END_ID",
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_FRONT_END_ID");
+          if (_param->_have_port_context_id)
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_CONTEXT_ID"  ,
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_CONTEXT_ID"  );
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_WEN"         ,
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_WEN"         );
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_NUM_GROUP"   ,
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_GROUP"   );
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_NUM_REG"     ,
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_REG"     );
+          COMPONENT_MAP(_component,src ,"out_SPR_"       +toString(i)+"_WDATA"       ,
+                                   dest, "in_SPR_ACCESS_"+toString(i)+"_WDATA"       );
+          COMPONENT_MAP(_component,src , "in_SPR_"       +toString(i)+"_RDATA"       ,
+                                   dest,"out_SPR_ACCESS_"+toString(i)+"_RDATA"       );
+          COMPONENT_MAP(_component,src , "in_SPR_"       +toString(i)+"_INVALID"     ,
+                                   dest,"out_SPR_ACCESS_"+toString(i)+"_INVALID"     );
+        }
+
+      // ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      //   in_REEXECUTE_ROB_VAL                    - component_commit_unit
+      //  out_REEXECUTE_ROB_ACK                    - component_commit_unit
+      //   in_REEXECUTE_ROB_FRONT_END_ID           - component_commit_unit
+      //   in_REEXECUTE_ROB_CONTEXT_ID             - component_commit_unit
+      //   in_REEXECUTE_ROB_PACKET_ID              - component_commit_unit
+      //   in_REEXECUTE_ROB_OPERATION              - component_commit_unit
+      //   in_REEXECUTE_ROB_TYPE                   - component_commit_unit
+      //   in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  - component_commit_unit
+
+      // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      //  out_REEXECUTE_VAL                        - component_issue_queue
+      //   in_REEXECUTE_ACK                        - component_issue_queue
+      //  out_REEXECUTE_CONTEXT_ID                 - component_issue_queue
+      //  out_REEXECUTE_FRONT_END_ID               - component_issue_queue
+      //  out_REEXECUTE_PACKET_ID                  - component_issue_queue
+      //  out_REEXECUTE_OPERATION                  - component_issue_queue
+      //  out_REEXECUTE_TYPE                       - component_issue_queue
+      //  out_REEXECUTE_STORE_QUEUE_PTR_WRITE      - component_issue_queue
+      //  out_REEXECUTE_LOAD_QUEUE_PTR_WRITE       - component_issue_queue
+      //  out_REEXECUTE_HAS_IMMEDIAT               - component_issue_queue
+      //  out_REEXECUTE_IMMEDIAT                   - component_issue_queue
+      //  out_REEXECUTE_READ_RA                    - component_issue_queue
+      //  out_REEXECUTE_NUM_REG_RA                 - component_issue_queue
+      //  out_REEXECUTE_READ_RB                    - component_issue_queue
+      //  out_REEXECUTE_NUM_REG_RB                 - component_issue_queue
+      //  out_REEXECUTE_READ_RC                    - component_issue_queue
+      //  out_REEXECUTE_NUM_REG_RC                 - component_issue_queue
+      //  out_REEXECUTE_WRITE_RD                   - component_issue_queue
+      //  out_REEXECUTE_NUM_REG_RD                 - component_issue_queue
+      //  out_REEXECUTE_WRITE_RE                   - component_issue_queue
+      //  out_REEXECUTE_NUM_REG_RE                 - component_issue_queue
+    }
+
+    // ===================================================================
+    // =====[ special_register_unit ]=====================================
+    // ===================================================================
+    {
+      src = _name+"_special_register_unit";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      //   in_SPR_ACCESS_VAL          - component_reexecute_unit
+      //  out_SPR_ACCESS_ACK          - component_reexecute_unit
+      //   in_SPR_ACCESS_FRONT_END_ID - component_reexecute_unit
+      //   in_SPR_ACCESS_CONTEXT_ID   - component_reexecute_unit
+      //   in_SPR_ACCESS_WEN          - component_reexecute_unit
+      //   in_SPR_ACCESS_NUM_GROUP    - component_reexecute_unit
+      //   in_SPR_ACCESS_NUM_REG      - component_reexecute_unit
+      //   in_SPR_ACCESS_WDATA        - component_reexecute_unit
+      //  out_SPR_ACCESS_RDATA        - component_reexecute_unit
+      //  out_SPR_ACCESS_INVALID      - component_reexecute_unit
+      
+      // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name+"_glue";
+            
+#ifdef POSITION
+            _component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
+                                       dest,"spr_"     +toString(i)+"_"+toString(j));
+#endif
+
+            COMPONENT_MAP(_component,src ,"out_SPR_READ_"+toString(i)+"_"+toString(j)+                      "_SR",
+                                     dest, "in_SPR_"     +toString(i)+"_"+toString(j)+"_SPECIAL_REGISTER_UNIT_SR");
+          }
+
+      // ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      //   in_SPR_COMMIT_VAL          - component_commit_unit
+      //  out_SPR_COMMIT_ACK          - component_commit_unit
+      //   in_SPR_COMMIT_SR_F_VAL     - component_commit_unit
+      //   in_SPR_COMMIT_SR_F         - component_commit_unit
+      //   in_SPR_COMMIT_SR_CY_VAL    - component_commit_unit
+      //   in_SPR_COMMIT_SR_CY        - component_commit_unit
+      //   in_SPR_COMMIT_SR_OV_VAL    - component_commit_unit
+      //   in_SPR_COMMIT_SR_OV        - component_commit_unit
+
+      // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"spr_event_"+toString(i)+"_"+toString(j),
+                                       dest,"spr_event_"+toString(i)+"_"+toString(j));
+#endif
+
+            PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL"      ,
+                                dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL"      );
+            PORT_MAP(_component,src ,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK"      ,
+                                dest,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK"      );
+            PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR"     ,
+                                dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR"     );
+            PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" ,
+                                dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" );
+            PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR"     ,
+                                dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR"     );
+            PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX"   ,
+                                dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX"   );
+            PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR",
+                                dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR");
+          }
+    }
+
+    // ===================================================================
+    // =====[ glue ]======================================================
+    // ===================================================================
+    {
+      src = _name+"_glue";
+      log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
+	   
+      {
+	dest = _name;
+#ifdef POSITION
+	_component->interface_map (src ,"",
+				   dest,"");
+#endif
+	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
+	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
+      }
+
+      // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"rename_"+toString(i)+"_"+toString(j),
+                                       dest,"rename_"+toString(i)+"_"+toString(j));
+#endif
+            
+            if (_param->_have_port_front_end_id)
+            PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
+                                dest, "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
+
+            //  out_RENAME_RENAME_UNIT_FRONT_END_ID              - component_rename_unit
+          }
+
+      // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_sum_inst_insert; i++)
+        {
+          dest = _name;
+#ifdef POSITION
+          _component->interface_map (src ,"insert_"+toString(i),
+                                     dest,"insert_"+toString(i));
+#endif
+          
+          PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL"       ,
+                              dest,"out_INSERT_"+toString(i)+"_VAL"       );
+          PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK"       ,
+                              dest, "in_INSERT_"+toString(i)+"_ACK"       );
+          PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE"    ,
+                              dest,"out_INSERT_"+toString(i)+"_RD_USE"    );
+          PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG",
+                              dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG");
+          PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE"    ,
+                              dest,"out_INSERT_"+toString(i)+"_RE_USE"    );
+          PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG",
+                              dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG");
+        }
+
+      //   in_INSERT_RENAME_UNIT_VAL                       - component_rename_unit
+      //  out_INSERT_RENAME_UNIT_ACK                       - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_FRONT_END_ID              - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_CONTEXT_ID                - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_TYPE                      - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_OPERATION                 - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NO_EXECUTE                - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_HAS_IMMEDIAT              - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_IMMEDIAT                  - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE     - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE      - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_READ_RA                   - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY            - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_READ_RB                   - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY            - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_READ_RC                   - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY            - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_WRITE_RD                  - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD        - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW        - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_WRITE_RE                  - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD        - component_rename_unit
+      //   in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW        - component_rename_unit
+      //  
+      //  out_INSERT_COMMIT_UNIT_VAL                       - component_commit_unit
+      //   in_INSERT_COMMIT_UNIT_ACK                       - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_FRONT_END_ID              - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_CONTEXT_ID                - component_commit_unit
+      ////out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID            - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_TYPE                      - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_OPERATION                 - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NO_EXECUTE                - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE     - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE      - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_READ_RA                   - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY            - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_READ_RB                   - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY            - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_READ_RC                   - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY            - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_WRITE_RD                  - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_WRITE_RE                  - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        - component_commit_unit
+      //  out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        - component_commit_unit
+      //  
+      //  out_INSERT_ISSUE_QUEUE_VAL                       - component_issue_queue
+      //   in_INSERT_ISSUE_QUEUE_ACK                       - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_CONTEXT_ID                - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_FRONT_END_ID              - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_OPERATION                 - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_TYPE                      - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_IMMEDIAT                  - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_READ_RA                   - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_NUM_REG_RA                - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_READ_RB                   - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_NUM_REG_RB                - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_READ_RC                   - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_NUM_REG_RC                - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_WRITE_RD                  - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_NUM_REG_RD                - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_WRITE_RE                  - component_issue_queue
+      //  out_INSERT_ISSUE_QUEUE_NUM_REG_RE                - component_issue_queue
+
+//       // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+//       for (uint32_t i=0; i<_param->_sum_inst_retire; i++)
+//         {
+//           dest = _name;
+// #ifdef POSITION
+//           _component->interface_map (src ,"retire_"+toString(i),
+//                                      dest,"retire_"+toString(i));
+// #endif
+
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_VAL"           ,
+//                               dest,"out_RETIRE_"+toString(i)+"_VAL"           );
+//           PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_ACK"           ,
+//                               dest, "in_RETIRE_"+toString(i)+"_ACK"           );
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_USE"    ,
+//                               dest,"out_RETIRE_"+toString(i)+"_RD_OLD_USE"    ); 
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG",
+//                               dest,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG");
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_USE"    ,
+//                               dest,"out_RETIRE_"+toString(i)+"_RD_NEW_USE"    );
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG",
+//                               dest,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG");
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_USE"    ,
+//                               dest,"out_RETIRE_"+toString(i)+"_RE_OLD_USE"    ); 
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG",
+//                               dest,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG");
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_USE"    ,
+//                               dest,"out_RETIRE_"+toString(i)+"_RE_NEW_USE"    );
+//           PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG",
+//                               dest,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG");
+//         }
+
+      //  out_RETIRE_RENAME_UNIT_VAL                       - component_rename_unit
+      //   in_RETIRE_RENAME_UNIT_ACK                       - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_FRONT_END_ID              - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_WRITE_RD                  - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD        - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW        - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_WRITE_RE                  - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD        - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW        - component_rename_unit
+      //  out_RETIRE_RENAME_UNIT_EVENT_STATE               - component_rename_unit
+
+      //   in_RETIRE_COMMIT_UNIT_VAL                       - component_commit_unit
+      //  out_RETIRE_COMMIT_UNIT_ACK                       - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_FRONT_END_ID              - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_WRITE_RD                  - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD        - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW        - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_WRITE_RE                  - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD        - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        - component_commit_unit
+      //   in_RETIRE_COMMIT_UNIT_EVENT_STATE               - component_commit_unit
+
+      // ~~~~~[ Interface : "spr_sr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+          {
+            dest = _name;
+#ifdef POSITION
+            _component->interface_map (src ,"spr_"+toString(i)+"_"+toString(j),
+                                       dest,"spr_"+toString(i)+"_"+toString(j));
+#endif
+
+            PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE",
+                                dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE");
+            PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH",
+                                dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH");
+
+            //  out_SPR_RENAME_UNIT_SR                           - component_rename_unit
+            //  out_SPR_COMMIT_UNIT_SR_OVE                       - component_commit_unit
+            //   in_SPR_SPECIAL_REGISTER_UNIT_SR                 - component_special_register_unit
+          }
+
+
+    }
+
+    // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
+#if DEBUG_OOO_Engine == true
+       _component->test_map();
+#endif
+
+#ifdef POSITION
+     if (usage_is_set(_usage,USE_POSITION))
+       _component->generate_file();
+#endif
+
+     log_end(OOO_Engine,FUNCTION);
+    };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 88)
@@ -0,0 +1,167 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+#include "Behavioural/include/Allocation.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::deallocation"
+  void OOO_Engine::deallocation (void)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+	delete    in_CLOCK ;
+	delete    in_NRESET;
+
+        DELETE2_SIGNAL( in_RENAME_VAL                       ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL(out_RENAME_ACK                       ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_FRONT_END_ID              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_front_end_id           );
+        DELETE2_SIGNAL( in_RENAME_CONTEXT_ID                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_context_id             );
+        DELETE2_SIGNAL( in_RENAME_DEPTH                     ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_depth                  );
+        DELETE2_SIGNAL( in_RENAME_TYPE                      ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_type                   );
+        DELETE2_SIGNAL( in_RENAME_OPERATION                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_operation              );
+        DELETE2_SIGNAL( in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_data           );
+        DELETE2_SIGNAL( in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_IMMEDIAT                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_data           );
+        DELETE2_SIGNAL( in_RENAME_READ_RA                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_NUM_REG_RA                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_register_logic );
+        DELETE2_SIGNAL( in_RENAME_READ_RB                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_NUM_REG_RB                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_register_logic );
+        DELETE2_SIGNAL( in_RENAME_READ_RC                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_NUM_REG_RC                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_special_register_logic );
+        DELETE2_SIGNAL( in_RENAME_WRITE_RD                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_NUM_REG_RD                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_register_logic );
+        DELETE2_SIGNAL( in_RENAME_WRITE_RE                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+        DELETE2_SIGNAL( in_RENAME_NUM_REG_RE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_special_register_logic );
+        DELETE2_SIGNAL( in_RENAME_EXCEPTION_USE             ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_exception_use          );
+        DELETE2_SIGNAL( in_RENAME_EXCEPTION                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_exception              );
+        
+        DELETE1_SIGNAL(out_ISSUE_VAL                        ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL( in_ISSUE_ACK                        ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_FRONT_END_ID               ,_param->_nb_inst_issue,_param->_size_front_end_id           );
+        DELETE1_SIGNAL(out_ISSUE_CONTEXT_ID                 ,_param->_nb_inst_issue,_param->_size_context_id             );
+        DELETE1_SIGNAL(out_ISSUE_PACKET_ID                  ,_param->_nb_inst_issue,_param->_size_rob_ptr                );
+        DELETE1_SIGNAL(out_ISSUE_TYPE                       ,_param->_nb_inst_issue,_param->_size_type                   );
+        DELETE1_SIGNAL(out_ISSUE_OPERATION                  ,_param->_nb_inst_issue,_param->_size_operation              );
+        DELETE1_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_WRITE      ,_param->_nb_inst_issue,_param->_size_store_queue_ptr        );
+        DELETE1_SIGNAL(out_ISSUE_LOAD_QUEUE_PTR_WRITE       ,_param->_nb_inst_issue,_param->_size_load_queue_ptr         );
+        DELETE1_SIGNAL(out_ISSUE_HAS_IMMEDIAT               ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_IMMEDIAT                   ,_param->_nb_inst_issue,_param->_size_general_data           );
+        DELETE1_SIGNAL(out_ISSUE_READ_RA                    ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_NUM_REG_RA                 ,_param->_nb_inst_issue,_param->_size_general_register       );
+        DELETE1_SIGNAL(out_ISSUE_READ_RB                    ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_NUM_REG_RB                 ,_param->_nb_inst_issue,_param->_size_general_register       );
+        DELETE1_SIGNAL(out_ISSUE_READ_RC                    ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_NUM_REG_RC                 ,_param->_nb_inst_issue,_param->_size_special_register       );
+        DELETE1_SIGNAL(out_ISSUE_WRITE_RD                   ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_NUM_REG_RD                 ,_param->_nb_inst_issue,_param->_size_general_register       );
+        DELETE1_SIGNAL(out_ISSUE_WRITE_RE                   ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_ISSUE_NUM_REG_RE                 ,_param->_nb_inst_issue,_param->_size_special_register       );
+        
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_VAL                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1                                    );
+        DELETE2_SIGNAL(out_EXECUTE_LOOP_ACK                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1                                    );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_FRONT_END_ID        ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_front_end_id           );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_CONTEXT_ID          ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_context_id             );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_PACKET_ID           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_rob_ptr                );
+//      DELETE2_SIGNAL( in_EXECUTE_LOOP_TYPE                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_type                   );
+//      DELETE2_SIGNAL( in_EXECUTE_LOOP_OPERATION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_operation              );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_FLAGS               ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_special_data           );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception              );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1                                    );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_ADDRESS             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data           );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_DATA                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data           );
+        
+        DELETE1_SIGNAL(out_INSERT_VAL                       ,_param->_sum_inst_insert,1                                    );
+        DELETE1_SIGNAL( in_INSERT_ACK                       ,_param->_sum_inst_insert,1                                    );
+        DELETE1_SIGNAL(out_INSERT_RD_USE                    ,_param->_sum_inst_insert,1                                    );
+        DELETE1_SIGNAL(out_INSERT_RD_NUM_REG                ,_param->_sum_inst_insert,_param->_size_general_register       );
+        DELETE1_SIGNAL(out_INSERT_RE_USE                    ,_param->_sum_inst_insert,1                                    );
+        DELETE1_SIGNAL(out_INSERT_RE_NUM_REG                ,_param->_sum_inst_insert,_param->_size_special_register       );
+        
+//         DELETE1_SIGNAL(out_RETIRE_VAL                       ,_param->_sum_inst_retire,1                                    );
+//         DELETE1_SIGNAL( in_RETIRE_ACK                       ,_param->_sum_inst_retire,1                                    );
+//         DELETE1_SIGNAL(out_RETIRE_RD_OLD_USE                ,_param->_sum_inst_retire,1                                    );
+//         DELETE1_SIGNAL(out_RETIRE_RD_OLD_NUM_REG            ,_param->_sum_inst_retire,_param->_size_general_register       );
+//         DELETE1_SIGNAL(out_RETIRE_RD_NEW_USE                ,_param->_sum_inst_retire,1                                    );
+//         DELETE1_SIGNAL(out_RETIRE_RD_NEW_NUM_REG            ,_param->_sum_inst_retire,_param->_size_general_register       );
+//         DELETE1_SIGNAL(out_RETIRE_RE_OLD_USE                ,_param->_sum_inst_retire,1                                    );
+//         DELETE1_SIGNAL(out_RETIRE_RE_OLD_NUM_REG            ,_param->_sum_inst_retire,_param->_size_special_register       );
+//         DELETE1_SIGNAL(out_RETIRE_RE_NEW_USE                ,_param->_sum_inst_retire,1                                    );
+//         DELETE1_SIGNAL(out_RETIRE_RE_NEW_NUM_REG            ,_param->_sum_inst_retire,_param->_size_special_register       );
+        
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_VAL              ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL( in_BRANCH_COMPLETE_ACK              ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_FRONT_END_ID     ,_param->_nb_inst_issue,_param->_size_front_end_id           );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID       ,_param->_nb_inst_issue,_param->_size_context_id             );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_DEPTH            ,_param->_nb_inst_issue,_param->_size_depth                  );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS          ,_param->_nb_inst_issue,_param->_size_general_data           );
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_FLAG             ,_param->_nb_inst_issue,1                                    );
+        DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_issue,1                                    );
+        
+        DELETE_SIGNAL (out_COMMIT_EVENT_VAL                 , 1);
+        DELETE_SIGNAL ( in_COMMIT_EVENT_ACK                 , 1);
+        DELETE_SIGNAL (out_COMMIT_EVENT_FRONT_END_ID        ,_param->_size_front_end_id           );
+        DELETE_SIGNAL (out_COMMIT_EVENT_CONTEXT_ID          ,_param->_size_context_id             );
+        DELETE_SIGNAL (out_COMMIT_EVENT_DEPTH               ,_param->_size_depth                  );
+        DELETE_SIGNAL (out_COMMIT_EVENT_TYPE                ,_param->_size_event_type             );
+        DELETE_SIGNAL (out_COMMIT_EVENT_IS_DELAY_SLOT       ,1                                    );
+        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS             ,_param->_size_general_data           );
+        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR        ,_param->_size_general_data           );
+        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,1                                    );
+        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR        ,_param->_size_general_data           );
+        
+        DELETE2_SIGNAL( in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL(out_EVENT_ACK                        ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL( in_EVENT_ADDRESS                    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_general_data           );
+        DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_general_data           ); 
+        DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL           ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL( in_EVENT_IS_DS_TAKE                 ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL( in_SPR_EVENT_VAL                    ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL(out_SPR_EVENT_ACK                    ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL( in_SPR_EVENT_EPCR                   ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr                    );
+        DELETE2_SIGNAL( in_SPR_EVENT_EEAR_WEN               ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL( in_SPR_EVENT_EEAR                   ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr                    );
+        DELETE2_SIGNAL( in_SPR_EVENT_SR_DSX                 ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL( in_SPR_EVENT_SR_TO_ESR              ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL(out_NB_INST_COMMIT_ALL               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_nb_inst_commit         );
+        DELETE2_SIGNAL(out_NB_INST_COMMIT_MEM               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_nb_inst_commit         );
+        DELETE2_SIGNAL( in_DEPTH_MIN                        ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth                  );
+        DELETE2_SIGNAL( in_DEPTH_MAX                        ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth+1                );
+        DELETE2_SIGNAL(out_SPR_SR_IEE                       ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+        DELETE2_SIGNAL(out_SPR_SR_EPH                       ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
+      }
+
+    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+    delete [] _component_rename_unit           ;
+    delete    _component_commit_unit           ;
+    delete    _component_issue_queue           ;
+    delete    _component_reexecute_unit        ;   
+    delete    _component_special_register_unit ;
+    delete    _component_glue                  ;
+
+    delete    _component;
+
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_end_cycle.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_end_cycle.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_end_cycle.cpp	(revision 88)
@@ -0,0 +1,45 @@
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::end_cycle"
+void OOO_Engine::end_cycle ()
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      _stat->end_cycle();
+#endif    
+
+#ifdef VHDL_TESTBENCH
+    // Evaluation before read the ouput signal
+//  sc_start(0);
+    if (usage_is_set(_usage,USE_VHDL_TESTBENCH))
+      _interfaces->testbench();
+#endif
+
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_statistics_allocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_statistics_allocation.cpp	(revision 88)
@@ -0,0 +1,45 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::statistics_allocation"
+  void OOO_Engine::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    _stat = new Stat (static_cast<std::string>(_name),
+		      "OOO_Engine",
+		      param_statistics);
+
+    for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+      _stat->add_stat(_component_rename_unit [i]->_stat);
+    _stat->add_stat(_component_commit_unit          ->_stat);
+    _stat->add_stat(_component_issue_queue          ->_stat);
+    _stat->add_stat(_component_reexecute_unit       ->_stat);   
+    _stat->add_stat(_component_special_register_unit->_stat);
+    _stat->add_stat(_component_glue                 ->_stat);
+    
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_statistics_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_statistics_deallocation.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_statistics_deallocation.cpp	(revision 88)
@@ -0,0 +1,37 @@
+#ifdef STATISTICS
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::statistics_deallocation"
+  void OOO_Engine::statistics_deallocation (void)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> : Generate Statistics file"),_name.c_str());
+    
+    delete _stat;
+    
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_transition.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_transition.cpp	(revision 88)
@@ -0,0 +1,39 @@
+# if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::transition"
+  void OOO_Engine::transition (void)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    end_cycle ();
+#endif
+
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+# endif
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_vhdl.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_vhdl.cpp	(revision 88)
@@ -0,0 +1,43 @@
+#ifdef VHDL
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
+#include "Behavioural/include/Vhdl.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::vhdl"
+  void OOO_Engine::vhdl (void)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    Vhdl * vhdl = new Vhdl (_name);
+
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
+
+    vhdl->generate_file();
+
+    delete vhdl;
+
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 88)
@@ -0,0 +1,417 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h"
+#include "Common/include/Max.h"
+
+namespace morpheo {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::Parameters"
+  Parameters::Parameters (uint32_t              nb_front_end                     ,
+                          uint32_t            * nb_context                       ,//[nb_front_end]
+                          uint32_t              nb_rename_unit                   ,
+                          uint32_t              nb_execute_loop                  ,
+                          uint32_t            * nb_inst_decod                    ,//[nb_front_end]
+                          uint32_t            * nb_inst_insert                   ,//[nb_rename_unit]
+                          uint32_t            * nb_inst_retire                   ,//[nb_rename_unit]
+                          uint32_t              nb_inst_issue                    ,
+                          uint32_t            * nb_inst_execute                  ,//[nb_execute_loop]
+                          uint32_t              nb_inst_reexecute                ,
+                          uint32_t              nb_inst_commit                   ,
+                          uint32_t              nb_inst_branch_complete          ,
+                          uint32_t           ** nb_branch_speculated             ,//[nb_front_end][nb_context]
+                          uint32_t              nb_rename_unit_select            ,
+                          uint32_t              nb_execute_loop_select           ,
+                          uint32_t              size_general_data                ,
+                          uint32_t              size_special_data                ,
+                          uint32_t            * link_rename_unit_with_front_end  ,//[nb_front_end]
+                          // Commit
+                          uint32_t              size_re_order_buffer             ,
+                          uint32_t              nb_re_order_buffer_bank          ,
+                          Tpriority_t           commit_priority                  ,
+                          Tload_balancing_t     commit_load_balancing            ,
+                          // Issue
+                          uint32_t              size_issue_queue                 ,
+                          uint32_t              nb_issue_queue_bank              ,
+                          Tpriority_t           issue_priority                   ,
+                          Tload_balancing_t     issue_load_balancing             ,
+                          bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
+                          bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
+                          // Reexecute
+                          uint32_t              size_reexecute_queue             ,
+                          Tpriority_t           reexecute_priority               ,
+                          Tload_balancing_t     reexecute_load_balancing         ,
+                          // Rename_unit
+                          Tpriority_t         * rename_select_priority           ,//[nb_rename_unit]
+                          Tload_balancing_t   * rename_select_load_balancing     ,//[nb_rename_unit]
+                          uint32_t            * rename_select_nb_front_end_select,//[nb_rename_unit]
+                          uint32_t            * nb_general_register              ,//[nb_rename_unit]
+                          uint32_t            * nb_special_register              ,//[nb_rename_unit]
+                          uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
+                          uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
+                          uint32_t            * size_read_counter                ,//[nb_rename_unit]
+                          uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
+                          uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
+                          uint32_t           ** size_load_queue                  ,//[nb_rename_unit][nb_load_store_queue]
+                          uint32_t           ** link_load_store_unit_with_thread ,//[nb_front_end][nb_context]
+                          // SPR
+                          bool              *** implement_group                  ,//[nb_front_end][nb_context][NB_GROUP]
+
+                          bool                  is_toplevel
+                          )
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    _nb_front_end                      = nb_front_end                     ;
+    _nb_context                        = nb_context                       ;
+    _nb_rename_unit                    = nb_rename_unit                   ;
+    _nb_execute_loop                   = nb_execute_loop                  ;
+    _nb_inst_decod                     = nb_inst_decod                    ;
+    _nb_inst_insert                    = nb_inst_insert                   ;
+    _nb_inst_retire                    = nb_inst_retire                   ;
+    _nb_inst_issue                     = nb_inst_issue                    ;
+    _nb_inst_execute                   = nb_inst_execute                  ;
+    _nb_inst_reexecute                 = nb_inst_reexecute                ;
+    _nb_inst_commit                    = nb_inst_commit                   ;
+    _nb_inst_branch_complete           = nb_inst_branch_complete          ;
+    _nb_branch_speculated              = nb_branch_speculated             ;
+    _nb_rename_unit_select             = nb_rename_unit_select            ;
+    _nb_execute_loop_select            = nb_execute_loop_select           ;
+//  _size_general_data                 = size_general_data                ;
+//  _size_special_data                 = size_special_data                ;
+    _link_rename_unit_with_front_end   = link_rename_unit_with_front_end  ;
+    _size_re_order_buffer              = size_re_order_buffer             ;
+    _nb_re_order_buffer_bank           = nb_re_order_buffer_bank          ;
+    _commit_priority                   = commit_priority                  ;
+    _commit_load_balancing             = commit_load_balancing            ;
+    _size_issue_queue                  = size_issue_queue                 ;
+    _nb_issue_queue_bank               = nb_issue_queue_bank              ;
+    _issue_priority                    = issue_priority                   ;
+    _issue_load_balancing              = issue_load_balancing             ;
+    _table_routing                     = table_routing                    ;
+    _table_issue_type                  = table_issue_type                 ;
+    _size_reexecute_queue              = size_reexecute_queue             ;
+    _reexecute_priority                = reexecute_priority               ;
+    _reexecute_load_balancing          = reexecute_load_balancing         ;
+    _rename_select_priority            = rename_select_priority           ;
+    _rename_select_load_balancing      = rename_select_load_balancing     ;
+    _rename_select_nb_front_end_select = rename_select_nb_front_end_select;
+    _nb_general_register               = nb_general_register              ;
+    _nb_special_register               = nb_special_register              ;
+    _nb_reg_free                       = nb_reg_free                      ;
+    _nb_rename_unit_bank               = nb_rename_unit_bank              ;
+    _size_read_counter                 = size_read_counter                ;
+    _nb_load_store_queue               = nb_load_store_queue              ;
+    _size_store_queue                  = size_store_queue                 ;
+    _size_load_queue                   = size_load_queue                  ;
+    _link_load_store_unit_with_thread  = link_load_store_unit_with_thread ;
+    _implement_group                   = implement_group                  ;
+
+    test();
+
+    _link_front_end_with_rename_unit = new std::vector<uint32_t> [_nb_rename_unit];
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      _link_front_end_with_rename_unit[_link_rename_unit_with_front_end[i]].push_back(i);
+
+    _rename_unit_size_front_end_id                = new uint32_t    [_nb_rename_unit];
+    _rename_unit_size_context_id                  = new uint32_t    [_nb_rename_unit];
+    _rename_unit_nb_front_end                     = new uint32_t    [_nb_rename_unit];
+    _rename_unit_nb_context                       = new uint32_t *  [_nb_rename_unit];
+    _rename_unit_nb_inst_decod                    = new uint32_t *  [_nb_rename_unit];
+    _rename_unit_link_load_store_unit_with_thread = new uint32_t ** [_nb_rename_unit];
+    
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      {
+        uint32_t x = _link_front_end_with_rename_unit[i].size(); // number of linked front_end
+
+        _rename_unit_nb_front_end                     [i] = x;
+        _rename_unit_nb_context                       [i] = new uint32_t   [x];
+        _rename_unit_nb_inst_decod                    [i] = new uint32_t   [x];
+        _rename_unit_link_load_store_unit_with_thread [i] = new uint32_t * [x];
+
+        // Scan front_end list
+        std::vector<uint32_t>::iterator it=_link_front_end_with_rename_unit[i].begin();
+        for (uint32_t j=0; j<x; j++)
+          {
+            _rename_unit_nb_context    [i][j] = _nb_context    [*it];
+            _rename_unit_nb_inst_decod [i][j] = _nb_inst_decod [*it];
+            _rename_unit_link_load_store_unit_with_thread [i][j] = new uint32_t [_nb_context [*it]];
+            
+            for (uint32_t k=0; k<_nb_context [*it]; k++)
+              _rename_unit_link_load_store_unit_with_thread [i][j][k] = _link_load_store_unit_with_thread [*it][k];
+
+            ++it;            
+          }
+
+        _rename_unit_size_front_end_id                [i] = log2(_rename_unit_nb_front_end [i]);
+        _rename_unit_size_context_id                  [i] = log2(max<uint32_t>(_rename_unit_nb_context [i], _rename_unit_nb_front_end [i]));
+      }
+
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      {
+        log_printf(TRACE,OOO_Engine,FUNCTION,"Rename_unit [%d]",i);
+        log_printf(TRACE,OOO_Engine,FUNCTION," * front_end : %d",_rename_unit_nb_front_end[i]);
+        
+        for (uint32_t j=0; j<_rename_unit_nb_front_end[i]; j++)
+          {
+            log_printf(TRACE,OOO_Engine,FUNCTION,"   * [%d] nb_context : %d, nb_inst_decod : %d",j,_rename_unit_nb_context[i][j],_rename_unit_nb_inst_decod[i][j]);
+
+            for (uint32_t k=0; k<_rename_unit_nb_context[i][j]; ++k)
+              log_printf(TRACE,OOO_Engine,FUNCTION,"     * [%d][%d] link_lsq : %d",j,k,_rename_unit_link_load_store_unit_with_thread[i][j][k]);
+          }
+      }
+
+    _max_nb_context                = max<uint32_t>(_nb_context,_nb_front_end);
+    _max_branch_speculated         = max<uint32_t>(_nb_branch_speculated,_nb_front_end,_nb_context);
+    _size_rename_id                = log2(_nb_rename_unit);
+//  _size_max_depth                = log2(_max_branch_speculated);
+    uint32_t size_front_end_id     = log2(_nb_front_end);
+    uint32_t size_context_id       = log2(_max_nb_context);
+    uint32_t size_packet_id        = log2(nb_re_order_buffer_bank)+log2(size_re_order_buffer/nb_re_order_buffer_bank);
+    uint32_t size_general_register = log2(max<uint32_t>(_nb_general_register,_nb_rename_unit));
+    uint32_t size_special_register = log2(max<uint32_t>(_nb_special_register,_nb_rename_unit));
+    uint32_t size_store_queue_ptr  = log2(max<uint32_t>(_size_store_queue,_nb_rename_unit,_nb_load_store_queue));
+    uint32_t size_load_queue_ptr   = log2(max<uint32_t>(_size_load_queue ,_nb_rename_unit,_nb_load_store_queue));
+
+    _sum_inst_insert = 0;
+    _sum_inst_retire = 0;
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      {
+        _sum_inst_insert += _nb_inst_insert [i];
+        _sum_inst_retire += _nb_inst_retire [i];
+
+        log_printf(TRACE,OOO_Engine,FUNCTION,"rename_unit [%d] - nb_inst_insert %d, nb_inst_retire %d", i,_nb_inst_insert [i],_nb_inst_retire [i]);
+      }
+    
+    log_printf(TRACE,OOO_Engine,FUNCTION,"sum_inst_insert %d, sum_inst_retire %d",_sum_inst_insert,_sum_inst_retire);
+
+//  _have_port_front_end_id            = _size_front_end_id   > 0;
+//  _have_port_context_id              = _size_context_id     > 0;
+//  _have_port_packet_id               = _size_packet_id      > 0;
+    _have_port_rename_id               = _size_rename_id      > 0;
+//  _have_port_load_queue_ptr          = _size_load_queue_ptr > 0;
+//  _have_port_max_depth               = _size_max_depth      > 0;
+//  _have_port_depth                   = _param_commit_unit->_have_port_depth;
+
+    _param_rename_unit           = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters * [_nb_rename_unit];
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      _param_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Parameters
+      (
+       _rename_unit_nb_front_end                      [i],
+       _rename_unit_nb_context                        [i],
+       _rename_unit_nb_inst_decod                     [i],
+       _nb_inst_insert                                [i],
+       _nb_inst_retire                                [i],
+       _nb_load_store_queue                           [i],
+       _size_store_queue                              [i],
+       _size_load_queue                               [i],
+       _rename_unit_link_load_store_unit_with_thread  [i],
+       _rename_select_priority                        [i],
+       _rename_select_load_balancing                  [i],
+       _rename_select_nb_front_end_select             [i],
+       _max_branch_speculated                            ,
+        size_general_data                                ,
+       _nb_general_register                           [i],
+       _nb_special_register                           [i],
+       _nb_reg_free                                   [i],
+       _nb_rename_unit_bank                           [i],
+       _size_read_counter                             [i] 
+       );
+
+    _param_commit_unit           = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Parameters  
+      (
+       _nb_front_end            ,
+       _nb_context              ,
+       _nb_rename_unit          ,
+       _size_re_order_buffer    ,
+       _nb_re_order_buffer_bank ,
+       _nb_inst_insert          ,
+       _nb_inst_retire          ,
+       _nb_inst_commit          ,
+       _nb_inst_reexecute       ,
+       _nb_inst_branch_complete ,
+       _nb_branch_speculated    ,
+        size_general_data       ,
+        size_store_queue_ptr    ,
+        size_load_queue_ptr     ,
+        size_general_register   ,
+        size_special_register   ,
+       _commit_priority         ,
+       _commit_load_balancing   ,
+       _nb_rename_unit_select   
+       );
+
+
+    _param_issue_queue           = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Parameters  
+      (_max_nb_context          ,
+       _nb_front_end            ,
+       _nb_rename_unit          ,
+       _size_issue_queue        ,
+       _nb_issue_queue_bank     ,
+        size_packet_id          ,
+        size_general_data       ,
+        size_special_data       ,
+        size_general_register   ,//+_size_rename_id
+        size_special_register   ,//+_size_rename_id
+        size_store_queue_ptr    ,
+        size_load_queue_ptr     ,
+       _nb_inst_issue           ,
+       _nb_inst_insert          ,
+       _nb_inst_reexecute       ,
+       _nb_rename_unit_select   ,
+       _issue_priority          ,
+       _issue_load_balancing    ,
+       _table_routing           ,
+       _table_issue_type        
+       );
+
+    _param_reexecute_unit        = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters  
+      ( size_context_id         ,
+        size_front_end_id       ,
+        size_packet_id          ,
+       _size_reexecute_queue    ,
+       _nb_execute_loop         ,
+       _nb_inst_execute         ,
+       _nb_inst_commit          ,
+       _nb_inst_reexecute       ,
+       _nb_execute_loop_select  ,
+       _reexecute_priority      ,
+       _reexecute_load_balancing,
+        size_general_register   ,//+_size_rename_id
+        size_special_register   ,//+_size_rename_id
+        size_general_data       ,
+        size_special_data       ,
+        size_store_queue_ptr    ,
+        size_load_queue_ptr     
+       );   
+
+    _param_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Parameters  
+      (
+       _nb_front_end          ,
+       _nb_context            ,
+       _nb_inst_reexecute     ,
+       _implement_group       
+       );
+
+    _param_glue                  = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::Parameters  
+      (_nb_front_end                     ,
+       _nb_context                       ,
+       _nb_rename_unit                   ,
+       _nb_inst_decod                    ,
+       _nb_inst_insert                   ,
+       _nb_inst_retire                   ,
+        size_general_data                ,
+        size_special_data                ,
+       _link_rename_unit_with_front_end  ,
+       _link_front_end_with_rename_unit  ,
+        size_packet_id                   ,
+        size_general_register            ,
+        size_special_register            ,
+        size_store_queue_ptr             ,
+        size_load_queue_ptr              
+       );
+
+    if (is_toplevel)
+      {
+        _size_front_end_id                 = size_front_end_id;
+        _size_context_id                   = size_context_id  ;
+        _size_depth                        = log2(_max_branch_speculated);
+        _size_instruction_address          = size_general_data-2;
+        _size_general_data                 = size_general_data;
+        _size_special_data                 = size_special_data;
+        _size_general_register             = size_general_register;
+        _size_special_register             = size_special_register;
+        _size_store_queue_ptr              = size_store_queue_ptr ;
+        _size_load_queue_ptr               = size_load_queue_ptr  ;
+        _size_rob_ptr                      = size_packet_id;
+        _size_nb_inst_commit               = log2(size_re_order_buffer)+1;
+
+        _have_port_front_end_id            = _size_front_end_id   > 0;
+        _have_port_context_id              = _size_context_id     > 0;
+        _have_port_rob_ptr                 = _size_rob_ptr        > 0;
+        _have_port_load_queue_ptr          = _size_load_queue_ptr > 0;
+        _have_port_depth                   = _size_depth          > 0;
+        
+        copy();
+      }
+
+
+    log_end(OOO_Engine,FUNCTION);
+  };
+  
+// #undef  FUNCTION
+// #define FUNCTION "OOO_Engine::Parameters (copy)"
+//   Parameters::Parameters (Parameters & param)
+//   {
+//     log_begin(OOO_Engine,FUNCTION);
+//     test();
+//     log_end(OOO_Engine,FUNCTION);
+//   };
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::~Parameters"
+  Parameters::~Parameters (void) 
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      {
+        for (uint32_t j=0; j<_nb_front_end; j++)
+          delete [] _rename_unit_link_load_store_unit_with_thread [i][j];
+        
+        delete [] _rename_unit_link_load_store_unit_with_thread [i];
+        delete [] _rename_unit_nb_inst_decod                    [i];
+        delete [] _rename_unit_nb_context                       [i];
+      }
+    
+    delete [] _rename_unit_link_load_store_unit_with_thread;
+    delete [] _rename_unit_nb_inst_decod                   ;
+    delete [] _rename_unit_nb_context                      ;
+    delete [] _rename_unit_nb_front_end                    ;
+    delete [] _rename_unit_size_front_end_id               ;
+    delete [] _rename_unit_size_context_id                 ;
+    delete [] _link_front_end_with_rename_unit             ;
+
+    delete [] _param_rename_unit          ;
+    delete    _param_commit_unit          ;
+    delete    _param_issue_queue          ;
+    delete    _param_reexecute_unit       ;   
+    delete    _param_special_register_unit;
+    delete    _param_glue                 ;
+    
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::copy"
+  void Parameters::copy (void) 
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+    COPY(_param_rename_unit       [i]);
+    COPY(_param_commit_unit          );
+    COPY(_param_issue_queue          );
+    COPY(_param_reexecute_unit       );   
+    COPY(_param_special_register_unit);
+    COPY(_param_glue                 );
+    
+    log_end(OOO_Engine,FUNCTION);
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_msg_error.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_msg_error.cpp	(revision 88)
@@ -0,0 +1,55 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/include/Types.h"
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h"
+#include <sstream>
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::msg_error"
+  Parameters_test Parameters::msg_error(void)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    Parameters_test test ("OOO_Engine");
+
+    bool _is_link [_nb_rename_unit];
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      _is_link[i] = false;
+
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      {
+        uint32_t x = _link_rename_unit_with_front_end [i];
+
+        if (x >= _nb_rename_unit)
+          test.error(toString(_("Front_end [%d] is linked with invalid rename_unit.\n"),i));
+        else
+          _is_link [x] = true;
+      }
+
+    for (uint32_t i=0; i<_nb_rename_unit; i++)
+      if (_is_link[i] == false)
+        test.error(toString(_("Rename_unit [%d] is not linked with front_end.\n"),i));
+
+    log_end(OOO_Engine,FUNCTION);
+
+    return test;
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 88)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 88)
@@ -0,0 +1,132 @@
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h"
+#include "Behavioural/include/XML.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::print"
+  std::string Parameters::print (uint32_t depth)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    std::string str = "";
+    
+    str+= toString(MSG_INFORMATION)+"   * nb_front_end                     : "+toString<uint32_t         >(_nb_front_end                     )+"\n";
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_context                         ["+toString(i)+"] : "+toString<uint32_t         >(_nb_context [i]                   )+"\n";//[nb_front_end]
+    str+= toString(MSG_INFORMATION)+"   * nb_rename_unit                   : "+toString<uint32_t         >(_nb_rename_unit                   )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * nb_execute_loop                  : "+toString<uint32_t         >(_nb_execute_loop                  )+"\n";
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_decod                      ["+toString(i)+"] : "+toString<uint32_t         >(_nb_inst_decod [i]                )+"\n";//[nb_front_end]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_insert                     ["+toString(i)+"] : "+toString<uint32_t         >(_nb_inst_insert [i]               )+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_retire                     ["+toString(i)+"] : "+toString<uint32_t         >(_nb_inst_retire [i]               )+"\n";//[nb_rename_unit]
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_issue                    : "+toString<uint32_t         >(_nb_inst_issue                    )+"\n";
+    for (uint32_t i=0; i<_nb_execute_loop; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_execute                    ["+toString(i)+"] : "+toString<uint32_t         >(_nb_inst_execute [i]              )+"\n";//[nb_execute_loop]
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_reexecute                : "+toString<uint32_t         >(_nb_inst_reexecute                )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_commit                   : "+toString<uint32_t         >(_nb_inst_commit                   )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * nb_inst_branch_complete          : "+toString<uint32_t         >(_nb_inst_branch_complete          )+"\n";
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    for (uint32_t j=0; j<_nb_context[i]; ++j)
+    str+= toString(MSG_INFORMATION)+"   * nb_branch_speculated               ["+toString(i)+"]["+toString(j)+"] : "+toString<uint32_t         >(_nb_branch_speculated [i][j]      )+"\n";//[nb_front_end][nb_context]
+    str+= toString(MSG_INFORMATION)+"   * nb_rename_unit_select            : "+toString<uint32_t         >(_nb_rename_unit_select            )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * nb_execute_loop_select           : "+toString<uint32_t         >(_nb_execute_loop_select           )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * size_general_data                : "+toString<uint32_t         >(_size_general_data                )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * size_special_data                : "+toString<uint32_t         >(_size_special_data                )+"\n";
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    str+= toString(MSG_INFORMATION)+"   * link_rename_unit_with_front_end    ["+toString(i)+"] : "+toString<uint32_t         >(_link_rename_unit_with_front_end[i])+"\n";//[nb_front_end]
+    str+= toString(MSG_INFORMATION)+"   * size_re_order_buffer             : "+toString<uint32_t         >(_size_re_order_buffer             )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * nb_re_order_buffer_bank          : "+toString<uint32_t         >(_nb_re_order_buffer_bank          )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * commit_priority                  : "+toString<Tpriority_t      >(_commit_priority                  )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * commit_load_balancing            : "+toString<Tload_balancing_t>(_commit_load_balancing            )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * size_issue_queue                 : "+toString<uint32_t         >(_size_issue_queue                 )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * nb_issue_queue_bank              : "+toString<uint32_t         >(_nb_issue_queue_bank              )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * issue_priority                   : "+toString<Tpriority_t      >(_issue_priority                   )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * issue_load_balancing             : "+toString<Tload_balancing_t>(_issue_load_balancing             )+"\n";
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    for (uint32_t j=0; j<_nb_inst_issue ; ++j)
+    str+= toString(MSG_INFORMATION)+"   * table_routing                      ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_routing [i][j]             )+"\n";//[nb_rename_unit][nb_inst_issue]
+    for (uint32_t i=0; i<_nb_inst_issue ; ++i)
+    for (uint32_t j=0; j<_nb_type; ++j)
+    str+= toString(MSG_INFORMATION)+"   * table_issue_type                   ["+toString(i)+"]["+toString_type(j)+"] : "+toString<bool             >(_table_issue_type [i][j]          )+"\n";//[nb_inst_issue][nb_type]
+    str+= toString(MSG_INFORMATION)+"   * size_reexecute_queue             : "+toString<uint32_t         >(_size_reexecute_queue             )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * reexecute_priority               : "+toString<Tpriority_t      >(_reexecute_priority               )+"\n";
+    str+= toString(MSG_INFORMATION)+"   * reexecute_load_balancing         : "+toString<Tload_balancing_t>(_reexecute_load_balancing         )+"\n";
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * rename_select_priority             ["+toString(i)+"] : "+toString<Tpriority_t      >(_rename_select_priority           [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * rename_select_load_balancing       ["+toString(i)+"] : "+toString<Tload_balancing_t>(_rename_select_load_balancing     [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * rename_select_nb_front_end_select  ["+toString(i)+"] : "+toString<uint32_t         >(_rename_select_nb_front_end_select[i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_general_register                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_general_register              [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_special_register                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_special_register              [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_reg_free                        ["+toString(i)+"] : "+toString<uint32_t         >(_nb_reg_free                      [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_rename_unit_bank                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_rename_unit_bank              [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * size_read_counter                  ["+toString(i)+"] : "+toString<uint32_t         >(_size_read_counter                [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    str+= toString(MSG_INFORMATION)+"   * nb_load_store_queue                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_load_store_queue              [i])+"\n";//[nb_rename_unit]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    for (uint32_t j=0; j<_nb_load_store_queue[i]; ++j)
+    str+= toString(MSG_INFORMATION)+"   * size_store_queue                   ["+toString(i)+"]["+toString(j)+"] : "+toString<uint32_t         >(_size_store_queue                 [i][j])+"\n";//[nb_rename_unit][nb_load_store_queue]
+    for (uint32_t i=0; i<_nb_rename_unit; ++i)
+    for (uint32_t j=0; j<_nb_load_store_queue[i]; ++j)
+    str+= toString(MSG_INFORMATION)+"   * size_load_queue                    ["+toString(i)+"]["+toString(j)+"] : "+toString<uint32_t         >(_size_load_queue                  [i][j])+"\n";//[nb_rename_unit][nb_load_store_queue]
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    for (uint32_t j=0; j<_nb_context[i]; ++j)
+    str+= toString(MSG_INFORMATION)+"   * link_load_store_unit_with_thread   ["+toString(i)+"]["+toString(j)+"] : "+toString<uint32_t         >(_link_load_store_unit_with_thread [i][j])+"\n";//[nb_front_end][nb_context]
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+    for (uint32_t j=0; j<_nb_context[i]; ++j)
+    for (uint32_t k=0; k<NB_GROUP; ++k)
+    str+= toString(MSG_INFORMATION)+"   * implement_group                    ["+toString(i)+"]["+toString(j)+"]["+toString(k)+"] : "+toString<bool             >(_implement_group                  [i][j][k])+"\n";//[nb_front_end][nb_context][NB_GROUP]
+
+//     XML xml ("ooo_engine");
+
+//     xml.balise_open("ooo_engine");
+// //  xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end();
+//     xml.balise_close();
+
+    log_end(OOO_Engine,FUNCTION);
+    
+//     return xml.get_body(depth);
+    return str;
+  };
+
+#undef  FUNCTION
+#define FUNCTION "OOO_Engine::operator<<"
+  std::ostream& operator<< (std::ostream& output_stream ,
+			    morpheo::behavioural::core::multi_ooo_engine::ooo_engine::Parameters & x)
+  {
+    log_begin(OOO_Engine,FUNCTION);
+
+    output_stream << x.print(0);
+    
+    log_end(OOO_Engine,FUNCTION);
+
+    return output_stream;
+  };
+
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
