Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest/src/test.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest/src/test.cpp	(revision 96)
@@ -7,5 +7,5 @@
  */
 
-#define NB_ITERATION  16
+#define NB_ITERATION  1
 #define CYCLE_MAX     (128*NB_ITERATION)
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/doc/fig/Execute_queue.fig
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/doc/fig/Execute_queue.fig	(revision 96)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/doc/fig/Execute_queue.fig	(revision 96)
@@ -0,0 +1,164 @@
+#FIG 3.2
+Landscape
+Center
+Inches
+Letter  
+100.00
+Single
+-2
+1200 2
+6 7350 4950 8100 5550
+6 7350 4950 7650 5550
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 7350 4950 7650 4950 7650 5550 7350 5550 7350 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 7350 4950 7650 5250 7350 5550
+-6
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 7650 4950 8100 4950 8100 5550 7650 5550 7650 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 7800 5550 7875 5475 7950 5550
+4 2 0 50 -1 0 8 0.0000 0 75 60 7575 5100 0\001
+4 2 0 50 -1 0 8 0.0000 0 75 60 7575 5475 1\001
+-6
+6 8550 4950 9300 5550
+6 8550 4950 8850 5550
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 8550 4950 8850 4950 8850 5550 8550 5550 8550 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 8550 4950 8850 5250 8550 5550
+-6
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 8850 4950 9300 4950 9300 5550 8850 5550 8850 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 9000 5550 9075 5475 9150 5550
+4 2 0 50 -1 0 8 0.0000 0 75 60 8775 5100 0\001
+4 2 0 50 -1 0 8 0.0000 0 75 60 8775 5475 1\001
+-6
+6 6150 4950 6900 5550
+6 6150 4950 6450 5550
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 6150 4950 6450 4950 6450 5550 6150 5550 6150 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 6150 4950 6450 5250 6150 5550
+-6
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 6450 4950 6900 4950 6900 5550 6450 5550 6450 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 6600 5550 6675 5475 6750 5550
+4 2 0 50 -1 0 8 0.0000 0 75 60 6375 5100 0\001
+4 2 0 50 -1 0 8 0.0000 0 75 60 6375 5475 1\001
+-6
+6 5250 4950 5700 5550
+6 5250 4950 5700 5550
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+	 5250 4950 5700 4950 5700 5550 5250 5550 5250 4950
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3
+	 5400 5550 5475 5475 5550 5550
+-6
+-6
+6 6900 3675 7425 4200
+1 3 0 1 0 7 50 -1 -1 0.000 1 0.5236 6964 3860 64 64 6964 3860 7019 3829
+1 3 0 1 0 7 50 -1 -1 0.000 1 0.5236 7315 3770 64 64 7315 3770 7372 3740
+1 3 0 1 0 7 50 -1 -1 0.000 1 0.5236 7174 4097 64 64 7174 4097 7229 4065
+3 0 0 1 0 7 50 -1 -1 0.000 0 0 0 3
+	 7019 3829 7150 3786 7255 3794
+	 0.000 1.000 0.000
+3 0 0 1 0 7 50 -1 -1 0.000 0 0 0 3
+	 7202 4039 7289 3935 7299 3836
+	 0.000 1.000 0.000
+3 0 0 1 0 7 50 -1 -1 0.000 0 0 0 3
+	 7119 4060 7021 3996 6996 3917
+	 0.000 1.000 0.000
+-6
+6 2550 5175 4650 6450
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+	 3450 5175 3450 6375
+4 2 0 50 -1 0 10 0.0000 0 150 690 3300 5850 IN_DATA\001
+4 0 0 50 -1 0 8 0.0000 0 75 705 3600 5625 EXCEPTION\001
+4 0 0 50 -1 0 8 0.0000 0 105 900 3600 5775 NO_SEQUENCE\001
+4 0 0 50 -1 0 8 0.0000 0 75 585 3600 5925 ADDRESS\001
+4 0 0 50 -1 0 8 0.0000 0 90 780 3600 6075 CONTEXT_ID\001
+4 0 0 50 -1 0 8 0.0000 0 90 930 3600 6225 FRONT_END_ID\001
+4 0 0 50 -1 0 8 0.0000 0 90 690 3600 5325 PACKET_ID\001
+4 0 0 50 -1 0 8 0.0000 0 90 990 3600 6375 OOO_ENGINE_ID\001
+4 0 0 50 -1 0 8 0.0000 0 75 405 3600 5475 FLAGS\001
+-6
+6 10050 4650 12225 5925
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+	 11025 4650 11025 5850
+4 2 0 50 -1 0 10 0.0000 0 150 825 10875 5325 OUT_DATA\001
+4 0 0 50 -1 0 8 0.0000 0 75 705 11175 5100 EXCEPTION\001
+4 0 0 50 -1 0 8 0.0000 0 105 900 11175 5250 NO_SEQUENCE\001
+4 0 0 50 -1 0 8 0.0000 0 75 585 11175 5400 ADDRESS\001
+4 0 0 50 -1 0 8 0.0000 0 90 780 11175 5550 CONTEXT_ID\001
+4 0 0 50 -1 0 8 0.0000 0 90 930 11175 5700 FRONT_END_ID\001
+4 0 0 50 -1 0 8 0.0000 0 90 690 11175 4800 PACKET_ID\001
+4 0 0 50 -1 0 8 0.0000 0 90 990 11175 5850 OOO_ENGINE_ID\001
+4 0 0 50 -1 0 8 0.0000 0 75 405 11175 4950 FLAGS\001
+-6
+2 4 0 1 0 7 50 -1 -1 0.000 0 0 7 0 0 5
+	 9300 3525 9300 4350 5250 4350 5250 3525 9300 3525
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 4
+	3 0 1.00 60.00 120.00
+	 5700 5250 5850 5250 5850 5100 6150 5100
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 5475 4950 5475 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 6300 4950 6300 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 6675 4950 6675 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 7500 4950 7500 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 7875 4950 7875 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 8700 4950 8700 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
+	3 0 1.00 60.00 120.00
+	 9075 4950 9075 4350
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 4
+	3 0 1.00 60.00 120.00
+	 6900 5250 7050 5250 7050 5100 7350 5100
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 4
+	3 0 1.00 60.00 120.00
+	 8100 5250 8250 5250 8250 5100 8550 5100
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 3
+	3 0 1.00 60.00 120.00
+	 6150 5400 6000 5400 6000 5850
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 3
+	3 0 1.00 60.00 120.00
+	 5250 5400 5100 5400 5100 5850
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 3
+	3 0 1.00 60.00 120.00
+	 7350 5400 7200 5400 7200 5850
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 3
+	3 0 1.00 60.00 120.00
+	 8550 5400 8400 5400 8400 5850
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+	 4650 5850 8400 5850
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
+	3 0 1.00 60.00 120.00
+	 4650 3750 5250 3750
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
+	3 0 1.00 60.00 120.00
+	 9300 3750 9900 3750
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
+	3 0 1.00 60.00 120.00
+	 9900 4125 9300 4125
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
+	3 0 1.00 60.00 120.00
+	 9300 5250 9900 5250
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
+	3 0 1.00 60.00 120.00
+	 5250 4125 4650 4125
+4 2 0 50 -1 0 10 0.0000 0 150 615 4650 3750 IN_VAL \001
+4 2 0 50 -1 0 10 0.0000 0 150 615 4650 4125 IN_ACK \001
+4 0 0 50 -1 0 10 0.0000 0 150 750 9900 3750  OUT_VAL\001
+4 0 0 50 -1 0 10 0.0000 0 150 750 9900 4200  OUT_ACK\001
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp	(revision 96)
@@ -3,5 +3,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  */
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp	(revision 96)
@@ -3,5 +3,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  */
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp	(revision 96)
@@ -3,5 +3,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  */
@@ -24,5 +24,357 @@
   {
     log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
-    vhdl->set_body ("");
+    vhdl->set_body (0,"");
+    vhdl->set_body (0,"process (in_CLOCK)");
+    vhdl->set_body (0,"begin");
+    vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
+//     vhdl->set_body (2,"if in_NRESET = '0' then");
+//     vhdl->set_body (3,"reg_CURRENT_STATE <= STATE_0;");
+//     vhdl->set_body (2,"else");
+    vhdl->set_body (3,"reg_CURRENT_STATE <= sig_NEXT_STATE;");
+//     vhdl->set_body (2,"end if;");
+
+    for (uint32_t i = 0; i <_param->_size_queue - 1; i++)
+      {
+	vhdl->set_body (2,"if sig_WEN_"+toString(i)+" = '1' then");
+	vhdl->set_body (3,"if sig_SEL_"+toString(i)+" = '0' then");
+	if (_param->_have_port_context_id)
+	vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
+	if (_param->_have_port_front_end_id)
+	vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
+	if (_param->_have_port_ooo_engine_id)
+	vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
+	if (_param->_have_port_rob_ptr)
+        vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
+	vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
+	vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
+	vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
+	vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
+	vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
+
+	vhdl->set_body (3, "else");
+	if (_param->_have_port_context_id)
+	vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= reg_CONTEXT_ID_"+toString(i+1)+";");
+	if (_param->_have_port_front_end_id)
+	vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= reg_FRONT_END_ID_"+toString(i+1)+";");
+	if (_param->_have_port_ooo_engine_id)
+	vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= reg_OOO_ENGINE_ID_"+toString(i+1)+";");
+	if (_param->_have_port_rob_ptr)
+        vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= reg_PACKET_ID_"+toString(i+1)+";");
+	vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= reg_FLAGS_"+toString(i+1)+";");
+	vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= reg_EXCEPTION_"+toString(i+1)+";");
+	vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= reg_NO_SEQUENCE_"+toString(i+1)+";");
+	vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= reg_ADDRESS_"+toString(i+1)+";");
+	vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= reg_DATA_"+toString(i+1)+";");
+	
+	vhdl->set_body (3,"end if;");
+
+	vhdl->set_body (2,"end if;");
+      }
+
+    vhdl->set_body (2,"if sig_WEN_"+toString(_param->_size_queue-1)+" = '1' then");
+    if (_param->_have_port_context_id)
+      vhdl->set_body (3,"reg_CONTEXT_ID_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
+    if (_param->_have_port_front_end_id)
+      vhdl->set_body (3,"reg_FRONT_END_ID_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
+    if (_param->_have_port_ooo_engine_id)
+      vhdl->set_body (3,"reg_OOO_ENGINE_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
+    if (_param->_have_port_rob_ptr)
+      vhdl->set_body (3,"reg_PACKET_ID_"+toString(_param->_size_queue-1)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
+    vhdl->set_body (3, "reg_FLAGS_"+toString(_param->_size_queue-1)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
+    vhdl->set_body (3, "reg_EXCEPTION_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
+    vhdl->set_body (3, "reg_NO_SEQUENCE_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
+    vhdl->set_body (3, "reg_ADDRESS_"+toString(_param->_size_queue-1)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
+    vhdl->set_body (3, "reg_DATA_"+toString(_param->_size_queue-1)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
+    vhdl->set_body (2,"end if;");
+
+
+    vhdl->set_body (1,"end if;");
+    vhdl->set_body (0,"end process;");
+
+
+    vhdl->set_body (0,"");
+    vhdl->set_body (0,"");
+    vhdl->set_body (0,"");
+
+    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_VAL <= sig_OUT_VAL;");
+    vhdl->set_body (0,"out_EXECUTE_QUEUE_IN_ACK <= sig_IN_ACK;");
+    if (_param->_have_port_context_id)
+    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID <= reg_CONTEXT_ID_0;");
+    if (_param->_have_port_front_end_id)
+    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID <= reg_FRONT_END_ID_0;");
+    if (_param->_have_port_ooo_engine_id)
+    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID_0;");
+    if (_param->_have_port_rob_ptr)
+    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_PACKET_ID <= reg_PACKET_ID_0;");
+    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_FLAGS <= reg_FLAGS_0;");
+    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_EXCEPTION <= reg_EXCEPTION_0;");
+    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_NO_SEQUENCE <= reg_NO_SEQUENCE_0;");
+    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_ADDRESS <= reg_ADDRESS_0;");
+    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_DATA <= reg_DATA_0;");
+
+
+    vhdl->set_body (0,"");
+
+    vhdl->set_body (0,"process (reg_CURRENT_STATE, in_EXECUTE_QUEUE_OUT_ACK, in_EXECUTE_QUEUE_IN_VAL, in_NRESET)");
+    vhdl->set_body (0,"begin");
+    vhdl->set_body (1,"if in_NRESET = '0' then");
+    vhdl->set_body (2,"sig_NEXT_STATE <= STATE_0;");
+    vhdl->set_body (1,"else");
+    vhdl->set_body (2,"case reg_CURRENT_STATE is");
+    for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
+      {
+	vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
+	if (i == 0)
+	  {
+	    vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' then");
+	    vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
+	    vhdl->set_body (4,"else");
+	    vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
+	    vhdl->set_body (4,"end if;");
+	    continue;
+	  }
+	if (i == (_param->_size_queue))
+	  {
+	    vhdl->set_body (4,"if in_EXECUTE_QUEUE_OUT_ACK = '1' then");
+	    vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
+	    vhdl->set_body (4,"else");
+	    vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
+	    vhdl->set_body (4,"end if;");
+	    continue;
+	  }
+	vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' and in_EXECUTE_QUEUE_OUT_ACK = '0' then");
+	vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
+	vhdl->set_body (4,"elsif in_EXECUTE_QUEUE_IN_VAL = '0' and in_EXECUTE_QUEUE_OUT_ACK = '1' then");
+	vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
+	vhdl->set_body (4,"else");
+	vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
+	vhdl->set_body (4,"end if;");
+      }
+    vhdl->set_body (3,"when others => assert false report \"wrong state\" severity failure;");
+    vhdl->set_body (2,"end case;");
+    vhdl->set_body (1,"end if;");
+
+    vhdl->set_body (2,"case reg_CURRENT_STATE is");
+    for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
+      {
+	vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
+	if (i == 0)
+	  {
+	    vhdl->set_body (4,"sig_OUT_VAL <= '0';");
+	    vhdl->set_body (4,"sig_IN_ACK <= '1';");
+	    for (uint32_t j = 0; j <_param->_size_queue; j++)
+	      {
+		if (i == j)
+		  {
+		    vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
+		    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL;");
+		  }
+		else
+		  {
+		    if (j < (_param->_size_queue - 1))
+		      vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
+		    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
+		  }
+	      }
+	    continue;
+	  }
+	if (i == (_param->_size_queue))
+	  {
+	    vhdl->set_body (4,"sig_OUT_VAL <= '1';");
+	    vhdl->set_body (4,"sig_IN_ACK <= '0';");
+	    for (uint32_t j = 0; j <_param->_size_queue; j++)
+	      {
+		if (j == (i - 1))
+		  {
+		    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
+		  }
+		else
+		  {
+		    vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
+		    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
+		  }
+	      }
+	    continue;
+	  }
+	vhdl->set_body (4,"sig_OUT_VAL <= '1';");
+	vhdl->set_body (4,"sig_IN_ACK <= '1';");
+	for (uint32_t j = 0; j <_param->_size_queue; j++)
+	  {
+	    if (j < (i - 1))
+	      {
+		vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
+		vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
+	      }
+	    if (j == (i - 1))
+	      {
+		vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
+		vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL;");
+	      }
+	    if (j == i)
+	      {
+		if (j < (_param->_size_queue - 1))
+		  vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
+		vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK;");
+	      }
+	    if (j > i)
+	      {
+		if (j < (_param->_size_queue - 1))
+		  vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
+		vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
+	      }
+	  }
+      }
+    vhdl->set_body (3,"when others =>");
+    vhdl->set_body (2,"end case;");
+
+    vhdl->set_body (0,"end process;");
+
+ 
+
+//     vhdl->set_body (2,"end case;");
+//     for (uint32_t i = 0; i <_param->_size_queue; i++)
+//       {
+// 	if (i == 0)
+// 	  vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_VAL;");
+// 	else
+// 	  vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= '0';");
+// 	if (i < _param->_size_queue - 1)
+// 	  vhdl->set_body (4,"sig_SEL_"+toString(i)+" <= '0';");
+//       }
+//     vhdl->set_body (2,"end process;");
+	
+//     vhdl->set_body (0,"sig_TRANS_OUT <=");
+//     vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_0 else");
+//     vhdl->set_body (1,"'1';");
+
+//     vhdl->set_body (0,"sig_TRANS_IN <=");
+//     vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+" else");
+//     vhdl->set_body (1,"'1';");
+
+
+
+//     vhdl->set_body (0,"sig_NEXT_STATE <=");
+//     vhdl->set_body (1,"reg_CURRENT_STATE("+toString(_param->_size_queue-1)+" downto 0) & '0' when in_EXECUTE_QUEUE_IN_VAL = '1' and ((reg_CURRENT_STATE = STATE_0) xor (in_EXECUTE_QUEUE_OUT_ACK = '0')) and sig_TRANS_IN = '1' else");
+//     vhdl->set_body (1,"'0' & reg_CURRENT_STATE("+toString(_param->_size_queue)+" downto 1) when in_EXECUTE_QUEUE_OUT_ACK = '1' and ((in_EXECUTE_QUEUE_IN_VAL = '0') xor (reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+")) and sig_TRANS_OUT = '1' else");
+//     vhdl->set_body (1,"reg_CURRENT_STATE;");
+
+//     vhdl->set_body (0,"sig_WEN_0 <=");
+//     vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_0 else");
+//     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_1 else");
+//     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
+//      for (uint32_t i = 1; i <_param->_size_queue-1; i++)
+//       {
+// 	vhdl->set_body (0,"sig_WEN_"+toString(i)+" <=");
+// 	vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i)+" else");
+// 	vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i+1)+" else");
+// 	vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
+//       }
+//     vhdl->set_body (0,"sig_WEN_"+toString(_param->_size_queue-1)+" <=");
+//     vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue-1)+" else");
+//     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
+
+//     vhdl->set_body (0,"");
+//     for (uint32_t i = 0; i <_param->_size_queue-1; i++)
+//       {
+// 	vhdl->set_body (0,"sig_SEL_"+toString(i)+" <=");
+// 	vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(i+1)+" or reg_CURRENT_STATE = STATE_"+toString(i)+" else");
+// 	vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
+//       }
+
+//   process (reg_CURRENT_STATE, in_PUSH_0_VAL, in_POP_0_ACK)
+//   begin
+//     case reg_CURRENT_STATE is
+    
+// with reg_CURRENT_STATE select
+//   sig_WEN0 <=
+//   0 when 1,
+//   4 when 6;
+//       when "00001" => out_POP_0_VAL <= '0';
+//                      out_PUSH_0_ACK <= '1';
+//                      sig_SEL0 <= '0';
+//                      sig_WEN0 <= in_PUSH_0_VAL;
+//                      sig_SEL1 <= '0';
+//                      sig_WEN1 <= '0';
+//                      sig_SEL2 <= '0';
+//                      sig_WEN2 <= '0';
+//                      sig_WEN3 <= '0';
+//                      if in_PUSH_0_VAL = '1' then
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
+//                      else
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
+//                      end if;
+
+//       when "00010" => out_POP_0_VAL <= '1';
+//                      out_PUSH_0_ACK <= '1';
+//                      sig_SEL0 <= '0';
+//                      sig_WEN0 <= in_POP_0_ACK and in_PUSH_0_VAL;
+//                      sig_SEL1 <= '0';
+//                      sig_WEN1 <= in_PUSH_0_VAL and not in_POP_0_ACK;
+//                      sig_SEL2 <= '0';
+//                      sig_WEN2 <= '0';
+//                      sig_WEN3 <= '0';
+//                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
+//                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
+//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
+//                      else
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
+//                      end if;
+
+//       when "00100" => out_POP_0_VAL <= '1';
+//                      out_PUSH_0_ACK <= '1';
+//                      sig_SEL0 <= in_POP_0_ACK;
+//                      sig_WEN0 <= in_POP_0_ACK;
+//                      sig_SEL1 <= '0';
+//                      sig_WEN1 <= in_POP_0_ACK and in_PUSH_0_VAL;
+//                      sig_SEL2 <= '0';
+//                      sig_WEN2 <= in_PUSH_0_VAL and not in_POP_0_ACK;
+//                      sig_WEN3 <= '0';
+//                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
+//                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
+//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
+//                      else
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
+//                      end if;
+
+//       when "01000" => out_POP_0_VAL <= '1';
+//                      out_PUSH_0_ACK <= '1';
+//                      sig_SEL0 <= in_POP_0_ACK;
+//                      sig_WEN0 <= in_POP_0_ACK;
+//                      sig_SEL1 <= in_POP_0_ACK;
+//                      sig_WEN1 <= in_POP_0_ACK;
+//                      sig_SEL2 <= '0';
+//                      sig_WEN2 <= in_POP_0_ACK and in_PUSH_0_VAL;
+//                      sig_WEN3 <= in_PUSH_0_VAL and not in_POP_0_ACK;
+//                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
+//                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
+//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
+//                      else
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
+//                      end if;
+
+//       when "10000" => out_POP_0_VAL <= '1';
+//                      out_PUSH_0_ACK <= '0';
+//                      sig_SEL0 <= in_POP_0_ACK;
+//                      sig_WEN0 <= in_POP_0_ACK;
+//                      sig_SEL1 <= in_POP_0_ACK;
+//                      sig_WEN1 <= in_POP_0_ACK;
+//                      sig_SEL2 <= in_POP_0_ACK;
+//                      sig_WEN2 <= in_POP_0_ACK;
+//                      sig_WEN3 <= '0';
+//                      if (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
+//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
+//                      else
+//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
+//                      end if;
+
+// 	    when others =>
+// 			sig_next_state <= "00001";
+
+// 	end case;
+//   end process;
+
     log_printf(FUNC,Execute_queue,FUNCTION,"End");
   };
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_declaration.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_declaration.cpp	(revision 96)
@@ -3,5 +3,5 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  */
@@ -24,4 +24,39 @@
   {
     log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
+
+    for (uint32_t i=0; i<_param->_size_queue; ++i)
+      {
+	if (_param->_have_port_context_id)
+	  vhdl->set_signal("reg_CONTEXT_ID_"+toString(i),_param->_size_context_id);
+	if (_param->_have_port_front_end_id)
+	  vhdl->set_signal("reg_FRONT_END_ID_"+toString(i),_param->_size_front_end_id);
+	if (_param->_have_port_ooo_engine_id)
+	  vhdl->set_signal("reg_OOO_ENGINE_ID_"+toString(i),_param->_size_ooo_engine_id);
+	if (_param->_have_port_rob_ptr)
+	  vhdl->set_signal("reg_PACKET_ID_"+toString(i),_param->_size_rob_ptr);
+	vhdl->set_signal("reg_FLAGS_"+toString(i),_param->_size_special_data);
+	vhdl->set_signal("reg_EXCEPTION_"+toString(i),_param->_size_exception);
+	vhdl->set_signal("reg_NO_SEQUENCE_"+toString(i),1);
+	vhdl->set_signal("reg_ADDRESS_"+toString(i),_param->_size_instruction_address);
+	vhdl->set_signal("reg_DATA_"+toString(i),_param->_size_general_data);
+      }
+
+    vhdl->set_signal("reg_CURRENT_STATE",_param->_size_queue+1);
+
+    vhdl->set_signal("sig_NEXT_STATE",_param->_size_queue+1);
+
+    for (uint32_t i=0; i<_param->_size_queue-1; ++i)
+      {
+	vhdl->set_signal("sig_WEN_"+toString(i),1);
+	vhdl->set_signal("sig_SEL_"+toString(i),1);
+      }
+    vhdl->set_signal("sig_WEN_"+toString(_param->_size_queue - 1),1);
+
+    vhdl->set_signal("sig_IN_ACK",1);
+    vhdl->set_signal("sig_OUT_VAL",1);
+
+   for (uint32_t i=0; i<_param->_size_queue+1; ++i)
+      vhdl->set_constant("STATE_"+toString(i),_param->_size_queue+1,1<<i);
+
     log_printf(FUNC,Execute_queue,FUNCTION,"End");
   };
@@ -37,2 +72,16 @@
 }; // end namespace morpheo              
 #endif
+//   signal reg_0             : std_logic_vector (15 downto 0);
+//   signal reg_1             : std_logic_vector (15 downto 0);
+//   signal reg_2             : std_logic_vector (15 downto 0);
+//   signal reg_3             : std_logic_vector (15 downto 0);
+//   signal reg_CURRENT_STATE : std_logic_vector (4 downto 0);
+
+//   signal sig_NEXT_STATE    : std_logic_vector (4 downto 0);
+//   signal sig_WEN0          : std_logic;
+//   signal sig_SEL0          : std_logic;
+//   signal sig_WEN1          : std_logic;
+//   signal sig_SEL1          : std_logic;
+//   signal sig_WEN2          : std_logic;
+//   signal sig_SEL2          : std_logic;
+//   signal sig_WEN3          : std_logic;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp	(revision 96)
@@ -47,5 +47,6 @@
         _size_general_data       = size_general_data;
         _size_special_data       = size_special_data;
-        
+	_size_instruction_address= size_general_data;
+
         _have_port_context_id    = _size_context_id    > 0;
         _have_port_front_end_id  = _size_front_end_id  > 0;
