- Timestamp:
- Dec 19, 2008, 4:34:00 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine
- Files:
-
- 24 edited
-
Commit_unit/SelfTest/src/test.cpp (modified) (3 diffs)
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Commit_unit/include/Commit_unit.h (modified) (3 diffs)
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Commit_unit/src/Commit_unit_allocation.cpp (modified) (3 diffs)
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Commit_unit/src/Commit_unit_transition.cpp (modified) (2 diffs)
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Issue_queue/src/Parameters_msg_error.cpp (modified) (1 diff)
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OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp (modified) (1 diff)
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Reexecute_unit/include/Reexecute_unit.h (modified) (2 diffs)
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Reexecute_unit/src/Parameters.cpp (modified) (1 diff)
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Reexecute_unit/src/Reexecute_unit_allocation.cpp (modified) (2 diffs)
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Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp (modified) (1 diff)
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Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp (modified) (1 diff)
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Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp (modified) (1 diff)
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Rename_unit/Rename_select/SelfTest/src/test.cpp (modified) (2 diffs)
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Rename_unit/Rename_select/include/Rename_select.h (modified) (2 diffs)
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Rename_unit/Rename_select/src/Parameters.cpp (modified) (1 diff)
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Rename_unit/Rename_select/src/Rename_select_allocation.cpp (modified) (4 diffs)
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Rename_unit/include/Rename_unit.h (modified) (2 diffs)
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Rename_unit/src/Parameters.cpp (modified) (1 diff)
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Rename_unit/src/Rename_unit_allocation.cpp (modified) (2 diffs)
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SelfTest/src/test.cpp (modified) (3 diffs)
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Special_Register_unit/src/Special_Register_unit_transition.cpp (modified) (1 diff)
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include/OOO_Engine.h (modified) (3 diffs)
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src/OOO_Engine_allocation.cpp (modified) (3 diffs)
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src/Parameters_print.cpp (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp
r88 r97 68 68 ALLOC2_SC_SIGNAL( in_INSERT_NO_EXECUTE ," in_INSERT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 69 69 ALLOC2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT ," in_INSERT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 70 ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS ," in_INSERT_ADDRESS ",T general_data_t,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);70 ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS ," in_INSERT_ADDRESS ",Taddress_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 71 71 ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION ," in_INSERT_EXCEPTION ",Texception_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 72 72 ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION_USE ," in_INSERT_EXCEPTION_USE ",Texception_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 123 123 ALLOC1_SC_SIGNAL( in_COMMIT_EXCEPTION ," in_COMMIT_EXCEPTION ",Texception_t ,_param->_nb_inst_commit); 124 124 ALLOC1_SC_SIGNAL( in_COMMIT_NO_SEQUENCE ," in_COMMIT_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_inst_commit); 125 ALLOC1_SC_SIGNAL( in_COMMIT_ADDRESS ," in_COMMIT_ADDRESS ",T general_data_t,_param->_nb_inst_commit);125 ALLOC1_SC_SIGNAL( in_COMMIT_ADDRESS ," in_COMMIT_ADDRESS ",Taddress_t ,_param->_nb_inst_commit); 126 126 ALLOC1_SC_SIGNAL(out_COMMIT_NUM_REG_RD ,"out_COMMIT_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_inst_commit); 127 127 ALLOC1_SC_SIGNAL(out_REEXECUTE_VAL ,"out_REEXECUTE_VAL ",Tcontrol_t ,_param->_nb_inst_reexecute); … … 151 151 ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR ,"out_UPDATE_ADDRESS_EPCR ",Taddress_t ); 152 152 ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL ,"out_UPDATE_ADDRESS_EEAR_VAL ",Tcontrol_t ); 153 ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR ,"out_UPDATE_ADDRESS_EEAR ",T address_t);153 ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR ,"out_UPDATE_ADDRESS_EEAR ",Tgeneral_data_t ); 154 154 155 155 ALLOC2_SC_SIGNAL( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
r88 r97 82 82 public : SC_IN (Tcontrol_t ) *** in_INSERT_NO_EXECUTE ;//[nb_rename_unit][nb_inst_insert] 83 83 public : SC_IN (Tcontrol_t ) *** in_INSERT_IS_DELAY_SLOT ;//[nb_rename_unit][nb_inst_insert] 84 public : SC_IN (T general_data_t) *** in_INSERT_ADDRESS ;//[nb_rename_unit][nb_inst_insert]84 public : SC_IN (Taddress_t ) *** in_INSERT_ADDRESS ;//[nb_rename_unit][nb_inst_insert] 85 85 public : SC_IN (Texception_t ) *** in_INSERT_EXCEPTION ;//[nb_rename_unit][nb_inst_insert] 86 86 public : SC_IN (Texception_t ) *** in_INSERT_EXCEPTION_USE ;//[nb_rename_unit][nb_inst_insert] … … 141 141 public : SC_IN (Texception_t ) ** in_COMMIT_EXCEPTION ;//[nb_inst_commit] 142 142 public : SC_IN (Tcontrol_t ) ** in_COMMIT_NO_SEQUENCE ;//[nb_inst_commit] 143 public : SC_IN (T general_data_t) ** in_COMMIT_ADDRESS ;//[nb_inst_commit]143 public : SC_IN (Taddress_t ) ** in_COMMIT_ADDRESS ;//[nb_inst_commit] 144 144 public : SC_OUT(Tgeneral_address_t ) ** out_COMMIT_NUM_REG_RD ;//[nb_inst_commit] 145 145 … … 175 175 public : SC_OUT(Taddress_t ) * out_UPDATE_ADDRESS_EPCR ; 176 176 public : SC_OUT(Tcontrol_t ) * out_UPDATE_ADDRESS_EEAR_VAL ; 177 public : SC_OUT(T address_t) * out_UPDATE_ADDRESS_EEAR ;177 public : SC_OUT(Tgeneral_data_t ) * out_UPDATE_ADDRESS_EEAR ; 178 178 179 179 // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r88 r97 71 71 _ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 72 72 _ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 73 _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS ,"address" ,T general_data_t,_param->_size_instruction_address ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);73 _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 74 74 _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 75 75 _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE ,"exception_use" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 138 138 ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); 139 139 ALLOC1_SIGNAL_IN ( in_COMMIT_NO_SEQUENCE ,"no_sequence",Tcontrol_t ,1 ); 140 ALLOC1_SIGNAL_IN ( in_COMMIT_ADDRESS ,"address" ,T general_data_t,_param->_size_instruction_address);140 ALLOC1_SIGNAL_IN ( in_COMMIT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); 141 141 // ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register+_param->_size_rename_unit_id); 142 142 ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); … … 185 185 ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR ,"address_epcr" ,Taddress_t ,_param->_size_instruction_address); 186 186 ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL ,"address_eear_val",Tcontrol_t ,1); 187 ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR ,"address_eear" ,T address_t ,_param->_size_instruction_address);187 ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR ,"address_eear" ,Tgeneral_data_t ,_param->_size_general_data); 188 188 } 189 189 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r88 r97 75 75 log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id); 76 76 log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id); 77 log_printf(TRACE,Commit_unit,FUNCTION," * type : %s",toString _type(type).c_str());77 log_printf(TRACE,Commit_unit,FUNCTION," * type : %s",toString(type).c_str()); 78 78 log_printf(TRACE,Commit_unit,FUNCTION," * operation : %d",operation ); 79 79 log_printf(TRACE,Commit_unit,FUNCTION," * exception : %d",exception ); … … 478 478 it++) 479 479 { 480 log_printf(TRACE,Commit_unit,FUNCTION," [% d] %.8x (%.8x) %s - ptr :%d",480 log_printf(TRACE,Commit_unit,FUNCTION," [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.8x %.1d, %.1d %.4d, %.1d %.4d, %s - %d", 481 481 x, 482 (*it)->address, 483 (*it)->address<<2, 484 toString((*it)->state).c_str(), 485 (*it)->ptr); 482 (*it)->front_end_id , 483 (*it)->context_id , 484 (*it)->rename_unit_id , 485 (*it)->depth , 486 (*it)->type , 487 (*it)->operation , 488 (*it)->address , 489 (*it)->is_delay_slot , 490 (*it)->use_store_queue , 491 (*it)->store_queue_ptr_write , 492 (*it)->use_load_queue , 493 (*it)->load_queue_ptr_write , 494 toString((*it)->state).c_str() , 495 (*it)->ptr ); 496 log_printf(TRACE,Commit_unit,FUNCTION," %.1d %.5d %.6d, %.1d %.5d %.6d, %.1d %.5d %.6d, %.1d %.1d %.6d %.6d, %.1d %.1d %.6d %.6d ", 497 (*it)->read_ra , 498 (*it)->num_reg_ra_log , 499 (*it)->num_reg_ra_phy , 500 (*it)->read_rb , 501 (*it)->num_reg_rb_log , 502 (*it)->num_reg_rb_phy , 503 (*it)->read_rc , 504 (*it)->num_reg_rc_log , 505 (*it)->num_reg_rc_phy , 506 (*it)->write_rd , 507 (*it)->num_reg_rd_log , 508 (*it)->num_reg_rd_phy_old , 509 (*it)->num_reg_rd_phy_new , 510 (*it)->write_re , 511 (*it)->num_reg_re_log , 512 (*it)->num_reg_re_phy_old , 513 (*it)->num_reg_re_phy_new ); 514 515 log_printf(TRACE,Commit_unit,FUNCTION," %.2d %.2d %.1d %.1d %.8x %s", 516 (*it)->exception , 517 (*it)->exception_use , 518 (*it)->flags , 519 (*it)->no_sequence , 520 (*it)->data_commit , 521 toString((*it)->event_state).c_str() 522 ); 523 486 524 x++; 487 525 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
r88 r97 78 78 for (uint32_t j=0; j<_nb_type; j++) 79 79 if (not type_present [j]) 80 test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString _type(j).c_str()));80 test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str())); 81 81 } 82 82 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp
r88 r97 73 73 ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t ,_param->_size_general_register); 74 74 ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); 75 ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t ,_param->_size_ general_register);75 ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t ,_param->_size_special_register); 76 76 } 77 77 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h
r88 r97 80 80 public : SC_IN (Texception_t ) *** in_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_inst_execute] 81 81 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_LOOP_NO_SEQUENCE ;//[nb_execute_loop][nb_inst_execute] 82 public : SC_IN (T general_data_t) *** in_EXECUTE_LOOP_ADDRESS ;//[nb_execute_loop][nb_inst_execute]82 public : SC_IN (Taddress_t ) *** in_EXECUTE_LOOP_ADDRESS ;//[nb_execute_loop][nb_inst_execute] 83 83 public : SC_IN (Tgeneral_data_t ) *** in_EXECUTE_LOOP_DATA ;//[nb_execute_loop][nb_inst_execute] 84 84 … … 95 95 public : SC_OUT(Texception_t ) ** out_COMMIT_EXCEPTION ;//[nb_inst_commit] 96 96 public : SC_OUT(Tcontrol_t ) ** out_COMMIT_NO_SEQUENCE ;//[nb_inst_commit] 97 public : SC_OUT(T general_data_t) ** out_COMMIT_ADDRESS ;//[nb_inst_commit]97 public : SC_OUT(Taddress_t ) ** out_COMMIT_ADDRESS ;//[nb_inst_commit] 98 98 public : SC_IN (Tgeneral_address_t ) ** in_COMMIT_NUM_REG_RD ;//[nb_inst_commit] 99 99 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Parameters.cpp
r88 r97 71 71 if (is_toplevel) 72 72 { 73 _size_instruction_address = size_general_data-2 ; 73 74 _size_context_id = size_context_id ; 74 75 _size_front_end_id = size_front_end_id ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
r88 r97 70 70 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 71 71 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 72 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"address" ,T general_data_t ,_param->_size_general_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);72 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 73 73 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 74 74 } … … 89 89 ALLOC1_SIGNAL_OUT(out_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); 90 90 ALLOC1_SIGNAL_OUT(out_COMMIT_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1 ); 91 ALLOC1_SIGNAL_OUT(out_COMMIT_ADDRESS ,"address" ,T general_data_t ,_param->_size_general_data);91 ALLOC1_SIGNAL_OUT(out_COMMIT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); 92 92 ALLOC1_SIGNAL_IN ( in_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t ,_param->_size_general_register); 93 93 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
r88 r97 58 58 // Need spr_acces / reexecute ? 59 59 Texception_t exception = PORT_READ(in_EXECUTE_LOOP_EXCEPTION [x][y]); 60 T general_data_taddress = PORT_READ(in_EXECUTE_LOOP_ADDRESS [x][y]);60 Taddress_t address = PORT_READ(in_EXECUTE_LOOP_ADDRESS [x][y]); 61 61 Tcontrol_t spr_access = ((exception == EXCEPTION_ALU_SPR_ACCESS_MUST_READ ) or 62 62 (exception == EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE)); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp
r88 r97 80 80 // ALLOC1_SIGNAL_IN ( in_RETIRE_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 81 81 // ALLOC1_SIGNAL_IN ( in_RETIRE_OPERATION ,"operation" ,Toperation_t,_param->_size_operation ); 82 ALLOC1_SIGNAL_IN ( in_RETIRE_USE_STORE_QUEUE ,"use_store_queue" ,Tcontrol_t , _param->_size_operation);83 ALLOC1_SIGNAL_IN ( in_RETIRE_USE_LOAD_QUEUE ,"use_load_queue" ,Tcontrol_t , _param->_size_operation);82 ALLOC1_SIGNAL_IN ( in_RETIRE_USE_STORE_QUEUE ,"use_store_queue" ,Tcontrol_t ,1); 83 ALLOC1_SIGNAL_IN ( in_RETIRE_USE_LOAD_QUEUE ,"use_load_queue" ,Tcontrol_t ,1); 84 84 ALLOC1_SIGNAL_IN ( in_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 85 85 ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp
r88 r97 27 27 28 28 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 29 if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access 29 30 { 30 31 Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; 31 32 Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; 32 33 33 PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RA_LOG [i])]); 34 PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RB_LOG [i])]); 35 PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RC_LOG [i])]); 36 PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], rat_gpr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RD_LOG [i])]); 37 PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], rat_spr[front_end_id][context_id][PORT_READ(in_RENAME_NUM_REG_RE_LOG [i])]); 34 Tgeneral_address_t num_reg_ra_log = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register; 35 Tgeneral_address_t num_reg_rb_log = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register; 36 Tspecial_address_t num_reg_rc_log = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register; 37 Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register; 38 Tspecial_address_t num_reg_re_log = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register; 39 40 PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], rat_gpr[front_end_id][context_id][num_reg_ra_log]); 41 PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], rat_gpr[front_end_id][context_id][num_reg_rb_log]); 42 PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], rat_spr[front_end_id][context_id][num_reg_rc_log]); 43 PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], rat_gpr[front_end_id][context_id][num_reg_rd_log]); 44 PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], rat_spr[front_end_id][context_id][num_reg_re_log]); 45 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"yo6"); 38 46 } 39 47 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp
r88 r97 59 59 ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE ," in_RENAME_IN_NO_EXECUTE ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 60 60 ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ," in_RENAME_IN_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 61 ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS ," in_RENAME_IN_ADDRESS ",T general_data_t,_param->_nb_front_end, _param->_nb_inst_decod[it1]);61 ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS ," in_RENAME_IN_ADDRESS ",Taddress_t ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 62 62 ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT ," in_RENAME_IN_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 63 63 ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT ," in_RENAME_IN_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); … … 84 84 ALLOC1_SC_SIGNAL(out_RENAME_OUT_NO_EXECUTE ,"out_RENAME_OUT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_inst_rename); 85 85 ALLOC1_SC_SIGNAL(out_RENAME_OUT_IS_DELAY_SLOT,"out_RENAME_OUT_IS_DELAY_SLOT",Tcontrol_t ,_param->_nb_inst_rename); 86 ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS ,"out_RENAME_OUT_ADDRESS ",T general_data_t,_param->_nb_inst_rename);86 ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS ,"out_RENAME_OUT_ADDRESS ",Taddress_t ,_param->_nb_inst_rename); 87 87 ALLOC1_SC_SIGNAL(out_RENAME_OUT_HAS_IMMEDIAT ,"out_RENAME_OUT_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_rename); 88 88 ALLOC1_SC_SIGNAL(out_RENAME_OUT_IMMEDIAT ,"out_RENAME_OUT_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_rename); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h
r88 r97 76 76 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_NO_EXECUTE ;//[nb_front_end][nb_inst_decod] 77 77 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] 78 public : SC_IN (T general_data_t) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod]78 public : SC_IN (Taddress_t ) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod] 79 79 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_HAS_IMMEDIAT ;//[nb_front_end][nb_inst_decod] 80 80 public : SC_IN (Tgeneral_data_t ) *** in_RENAME_IN_IMMEDIAT ;//[nb_front_end][nb_inst_decod] … … 102 102 public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_NO_EXECUTE ;//[nb_inst_rename] 103 103 public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_IS_DELAY_SLOT;//[nb_inst_rename] 104 public : SC_OUT(T general_data_t) ** out_RENAME_OUT_ADDRESS ;//[nb_inst_rename]104 public : SC_OUT(Taddress_t ) ** out_RENAME_OUT_ADDRESS ;//[nb_inst_rename] 105 105 public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_HAS_IMMEDIAT ;//[nb_inst_rename] 106 106 public : SC_OUT(Tgeneral_data_t ) ** out_RENAME_OUT_IMMEDIAT ;//[nb_inst_rename] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Parameters.cpp
r88 r97 50 50 if (is_toplevel) 51 51 { 52 _size_general_data = size_general_data ; 53 _size_depth = log2(max_branch_speculated); 54 _size_front_end_id = log2(_nb_front_end); 55 _size_context_id = log2(max<uint32_t>(_nb_context,_nb_front_end)); 56 57 _have_port_front_end_id= _size_front_end_id > 0; 58 _have_port_context_id = _size_context_id > 0; 59 _have_port_depth = _size_depth > 0; 52 _size_instruction_address = size_general_data-2; 53 _size_general_data = size_general_data ; 54 _size_depth = log2(max_branch_speculated); 55 _size_front_end_id = log2(_nb_front_end); 56 _size_context_id = log2(max<uint32_t>(_nb_context,_nb_front_end)); 57 58 _have_port_front_end_id = _size_front_end_id > 0; 59 _have_port_context_id = _size_context_id > 0; 60 _have_port_depth = _size_depth > 0; 60 61 61 62 copy(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp
r88 r97 69 69 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 70 70 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 71 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,T general_data_t ,_param->_size_general_data, _param->_nb_front_end, _param->_nb_inst_decod[it1]);71 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 72 72 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 73 73 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data , _param->_nb_front_end, _param->_nb_inst_decod[it1]); … … 82 82 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 83 83 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic, _param->_nb_front_end, _param->_nb_inst_decod[it1]); 84 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t ,_param->_size_exception 84 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t ,_param->_size_exception_use , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 85 85 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 86 86 } … … 99 99 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); 100 100 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); 101 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS ,"address" ,T general_data_t ,_param->_size_general_data);101 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address ); 102 102 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); 103 103 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data ); … … 112 112 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); 113 113 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic); 114 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION_USE ,"exception_use",Texception_t ,_param->_size_exception 114 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION_USE ,"exception_use",Texception_t ,_param->_size_exception_use ); 115 115 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); 116 116 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h
r88 r97 78 78 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_NO_EXECUTE ;//[nb_front_end][nb_inst_decod] 79 79 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] 80 public : SC_IN (T general_data_t) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod]80 public : SC_IN (Taddress_t ) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod] 81 81 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_HAS_IMMEDIAT ;//[nb_front_end][nb_inst_decod] 82 82 public : SC_IN (Tgeneral_data_t ) *** in_RENAME_IN_IMMEDIAT ;//[nb_front_end][nb_inst_decod] … … 104 104 public : SC_OUT(Tcontrol_t ) ** out_INSERT_NO_EXECUTE ;//[nb_inst_insert] 105 105 public : SC_OUT(Tcontrol_t ) ** out_INSERT_IS_DELAY_SLOT ;//[nb_inst_insert] 106 public : SC_OUT(T general_data_t) ** out_INSERT_ADDRESS ;//[nb_inst_insert]106 public : SC_OUT(Taddress_t ) ** out_INSERT_ADDRESS ;//[nb_inst_insert] 107 107 public : SC_OUT(Tcontrol_t ) ** out_INSERT_HAS_IMMEDIAT ;//[nb_inst_insert] 108 108 public : SC_OUT(Tgeneral_data_t ) ** out_INSERT_IMMEDIAT ;//[nb_inst_insert] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp
r88 r97 119 119 if (is_toplevel) 120 120 { 121 _size_instruction_address = size_general_data-2; 121 122 _size_front_end_id = log2(_nb_front_end); 122 123 _size_context_id = log2(max<uint32_t>(_nb_context,_nb_front_end)); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
r88 r97 69 69 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 70 70 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 71 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,T general_data_t ,_param->_size_general_data, _param->_nb_front_end, _param->_nb_inst_decod[it1]);71 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 72 72 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 73 73 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data , _param->_nb_front_end, _param->_nb_inst_decod[it1]); … … 99 99 ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); 100 100 ALLOC1_SIGNAL_OUT(out_INSERT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1 ); 101 ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS ,"address" ,T general_data_t ,_param->_size_general_data);101 ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address ); 102 102 ALLOC1_SIGNAL_OUT(out_INSERT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); 103 103 ALLOC1_SIGNAL_OUT(out_INSERT_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
r88 r97 57 57 ALLOC2_SC_SIGNAL( in_RENAME_NO_EXECUTE ," in_RENAME_NO_EXECUTE ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 58 58 ALLOC2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT ," in_RENAME_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 59 ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS ," in_RENAME_ADDRESS ",T general_data_t,_param->_nb_front_end,_param->_nb_inst_decod[it1]);59 ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS ," in_RENAME_ADDRESS ",Taddress_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 60 60 ALLOC2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT ," in_RENAME_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 61 61 ALLOC2_SC_SIGNAL( in_RENAME_IMMEDIAT ," in_RENAME_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); … … 105 105 ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_EXCEPTION ," in_EXECUTE_LOOP_EXCEPTION ",Texception_t ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 106 106 ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE ," in_EXECUTE_LOOP_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 107 ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_ADDRESS ," in_EXECUTE_LOOP_ADDRESS ",T general_data_t,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);107 ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_ADDRESS ," in_EXECUTE_LOOP_ADDRESS ",Taddress_t ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 108 108 ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_DATA ," in_EXECUTE_LOOP_DATA ",Tgeneral_data_t ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 109 109 … … 145 145 ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR ,"out_COMMIT_EVENT_ADDRESS_EPCR ",Taddress_t ); 146 146 ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL ,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL ",Tcontrol_t ); 147 ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR ,"out_COMMIT_EVENT_ADDRESS_EEAR ",T address_t);147 ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR ,"out_COMMIT_EVENT_ADDRESS_EEAR ",Tgeneral_data_t ); 148 148 149 149 ALLOC2_SC_SIGNAL( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_context[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp
r88 r97 38 38 throw ERRORMORPHEO(FUNCTION,toString(_("Register [%d][%d] is not implemented.\n"),k,l)); 39 39 #endif 40 //log_printf(TRACE,Special_Register_unit,FUNCTION,"Reset SPR [%d][%d][%d][%d]",i,j,k,l);40 log_printf(TRACE,Special_Register_unit,FUNCTION,"Reset SPR [%d][%d][%d][%d]",i,j,k,l); 41 41 _spr [i][j][k][l]->reset(); 42 42 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h
r88 r97 77 77 public : SC_IN (Tcontrol_t ) *** in_RENAME_NO_EXECUTE ;//[nb_front_end][nb_inst_decod] 78 78 public : SC_IN (Tcontrol_t ) *** in_RENAME_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] 79 public : SC_IN (T general_data_t) *** in_RENAME_ADDRESS ;//[nb_front_end][nb_inst_decod]79 public : SC_IN (Taddress_t ) *** in_RENAME_ADDRESS ;//[nb_front_end][nb_inst_decod] 80 80 public : SC_IN (Tcontrol_t ) *** in_RENAME_HAS_IMMEDIAT ;//[nb_front_end][nb_inst_decod] 81 81 public : SC_IN (Tgeneral_data_t ) *** in_RENAME_IMMEDIAT ;//[nb_front_end][nb_inst_decod] … … 127 127 public : SC_IN (Texception_t ) *** in_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_inst_execute] 128 128 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_LOOP_NO_SEQUENCE ;//[nb_execute_loop][nb_inst_execute] 129 public : SC_IN (T general_data_t) *** in_EXECUTE_LOOP_ADDRESS ;//[nb_execute_loop][nb_inst_execute]129 public : SC_IN (Taddress_t ) *** in_EXECUTE_LOOP_ADDRESS ;//[nb_execute_loop][nb_inst_execute] 130 130 public : SC_IN (Tgeneral_data_t ) *** in_EXECUTE_LOOP_DATA ;//[nb_execute_loop][nb_inst_execute] 131 131 … … 171 171 public : SC_OUT(Taddress_t ) * out_COMMIT_EVENT_ADDRESS_EPCR ; 172 172 public : SC_OUT(Tcontrol_t ) * out_COMMIT_EVENT_ADDRESS_EEAR_VAL ; 173 public : SC_OUT(T address_t) * out_COMMIT_EVENT_ADDRESS_EEAR ;173 public : SC_OUT(Tgeneral_data_t ) * out_COMMIT_EVENT_ADDRESS_EEAR ; 174 174 175 175 // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
r88 r97 66 66 _ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 67 67 _ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 68 _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS ,"ADDRESS" ,T general_data_t,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);68 _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 69 69 _ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 70 70 _ALLOC2_SIGNAL_IN ( in_RENAME_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); … … 124 124 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 125 125 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 126 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"ADDRESS" ,T general_data_t ,_param->_size_general_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);126 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 127 127 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA ,"DATA" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 128 128 } … … 184 184 ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EPCR ,"ADDRESS_EPCR" ,Taddress_t ,_param->_size_instruction_address ); 185 185 ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR_VAL ,"ADDRESS_EEAR_VAL" ,Tcontrol_t ,1 ); 186 ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR ,"ADDRESS_EEAR" ,T address_t,_param->_size_general_data );186 ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR ,"ADDRESS_EEAR" ,Tgeneral_data_t ,_param->_size_general_data ); 187 187 } 188 188 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp
r88 r97 63 63 for (uint32_t i=0; i<_nb_inst_issue ; ++i) 64 64 for (uint32_t j=0; j<_nb_type; ++j) 65 str+= toString(MSG_INFORMATION)+" * table_issue_type ["+toString(i)+"]["+toString _type(j)+"] : "+toString<bool >(_table_issue_type [i][j] )+"\n";//[nb_inst_issue][nb_type]65 str+= toString(MSG_INFORMATION)+" * table_issue_type ["+toString(i)+"]["+toString(j)+"] : "+toString<bool >(_table_issue_type [i][j] )+"\n";//[nb_inst_issue][nb_type] 66 66 str+= toString(MSG_INFORMATION)+" * size_reexecute_queue : "+toString<uint32_t >(_size_reexecute_queue )+"\n"; 67 67 str+= toString(MSG_INFORMATION)+" * reexecute_priority : "+toString<Tpriority_t >(_reexecute_priority )+"\n";
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