Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 95)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 98)
@@ -40,10 +40,11 @@
           if (PORT_READ(in_BRANCH_EVENT_VAL [i]) and internal_BRANCH_EVENT_ACK [i])
             {
+              log_printf(TRACE,Context_State,FUNCTION,"  * BRANCH_EVENT [%d]",i);
+
 //               throw ERRORMORPHEO(FUNCTION,_("Not yet implemented (Comming Soon).\n"));
 
               context_state_t state = reg_STATE [i];
 
-              Tdepth_t   depth      = // (_param->_have_port_depth)?PORT_READ(in_BRANCH_EVENT_DEPTH [i]):
-                0;
+              Tdepth_t   depth      = (_param->_have_port_depth)?PORT_READ(in_BRANCH_EVENT_DEPTH [i]):0;
               Tdepth_t   depth_cur  = reg_EVENT_DEPTH [i];
               Tdepth_t   depth_min  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [i]):0;
@@ -61,9 +62,9 @@
               // is_valid = can modify local information
               //   if context_state_ok : yes
-              //   if context_state_ko : test the depth, and the priority of envent
+              //   if context_state_ko : test the depth, and the priority of event
 
               bool       is_valid   = ((state == CONTEXT_STATE_OK) or
                                        (depth1< depth0) or
-                                       ((depth1==depth0) and (priority1>priority0)));
+                                       ((depth1==depth0) and (priority1>=priority0))); // >= because another branch can be a miss prediction with same depth
 
               if (is_valid)
@@ -76,5 +77,5 @@
                 //reg_EVENT_ADDRESS_EEAR     [i] =  0; 
                   reg_EVENT_ADDRESS_EEAR_VAL [i] =  0;
-                  reg_EVENT_IS_DELAY_SLOT    [i] =  dest_val;
+                  reg_EVENT_IS_DELAY_SLOT    [i] =  1;
                   reg_EVENT_IS_DS_TAKE       [i] =  dest_val;
                   reg_EVENT_DEPTH            [i] =  depth;
@@ -89,4 +90,6 @@
           if (PORT_READ(in_DECOD_EVENT_VAL [i]) and internal_DECOD_EVENT_ACK [i])
             {
+              log_printf(TRACE,Context_State,FUNCTION,"  * DECOD_EVENT [%d]",i);
+
               Tcontext_t context    = (_param->_have_port_context_id )?PORT_READ(in_DECOD_EVENT_CONTEXT_ID [i]):0;
               Tdepth_t   depth      = (_param->_have_port_depth      )?PORT_READ(in_DECOD_EVENT_DEPTH      [i]):0;
@@ -190,4 +193,6 @@
         if (PORT_READ(in_COMMIT_EVENT_VAL ) and internal_COMMIT_EVENT_ACK )
           {
+            log_printf(TRACE,Context_State,FUNCTION,"  * COMMIT_EVENT");
+
             Tcontext_t context    = (_param->_have_port_context_id)?PORT_READ(in_COMMIT_EVENT_CONTEXT_ID ):0;
             Tdepth_t   depth      = (_param->_have_port_depth     )?PORT_READ(in_COMMIT_EVENT_DEPTH      ):0;
@@ -252,50 +257,51 @@
         // -------------------------------------------------------------------
 
-        for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
-          if (PORT_READ(in_BRANCH_COMPLETE_VAL [i]) and internal_BRANCH_COMPLETE_ACK [i])
-            {
-              if (PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]))
-                {
-                  Tcontext_t context    = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
-                  Tdepth_t   depth      = (_param->_have_port_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
-                  Tdepth_t   depth_cur  = reg_EVENT_DEPTH [context];
-                  Tdepth_t   depth_min = (_param->_have_port_depth     )?PORT_READ(in_DEPTH_MIN [context]):0;
-                  Tdepth_t   depth_max  = _param->_array_size_depth [context];
+//         for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+//           if (PORT_READ(in_BRANCH_COMPLETE_VAL [i]) and internal_BRANCH_COMPLETE_ACK [i])
+//             {
+//               log_printf(TRACE,Context_State,FUNCTION,"  * BRANCH_COMPLETE [%d]",i);
+//               if (PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]))
+//                 {
+//                   Tcontext_t context    = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
+//                   Tdepth_t   depth      = (_param->_have_port_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
+//                   Tdepth_t   depth_cur  = reg_EVENT_DEPTH [context];
+//                   Tdepth_t   depth_min = (_param->_have_port_depth     )?PORT_READ(in_DEPTH_MIN [context]):0;
+//                   Tdepth_t   depth_max  = _param->_array_size_depth [context];
                   
-//                   Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));
-//                   Tdepth_t   depth1     = (depth    >=depth_min)?(depth    -depth_min):((depth    +depth_max-depth_min));
-                  Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));
-                  Tdepth_t   depth1     = (depth    >=depth_min)?(depth    ):((depth    +depth_max));
+// //                   Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));
+// //                   Tdepth_t   depth1     = (depth    >=depth_min)?(depth    -depth_min):((depth    +depth_max-depth_min));
+//                   Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));
+//                   Tdepth_t   depth1     = (depth    >=depth_min)?(depth    ):((depth    +depth_max));
                   
-                  context_state_t state = reg_STATE [context];
+//                   context_state_t state = reg_STATE [context];
                   
-                  // miss > excep > spr/sync
-                  uint8_t    priority0  = (state == CONTEXT_STATE_KO_MISS)?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0);
-                  uint8_t    priority1  = 2; // miss
+//                   // miss > excep > spr/sync
+//                   uint8_t    priority0  = (state == CONTEXT_STATE_KO_MISS)?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0);
+//                   uint8_t    priority1  = 2; // miss
                   
-                  // is_valid = can modify local information
-                  //  if context_state_ok : yes
-                  //  if context_state_ko : test the depth, and the priority of envent
+//                   // is_valid = can modify local information
+//                   //  if context_state_ok : yes
+//                   //  if context_state_ko : test the depth, and the priority of envent
                   
-                  bool       is_valid   = ((state == CONTEXT_STATE_OK) or
-                                           (depth1< depth0) or
-                                           ((depth1==depth0) and (priority1>priority0)));
+//                   bool       is_valid   = ((state == CONTEXT_STATE_OK) or
+//                                            (depth1< depth0) or
+//                                            ((depth1==depth0) and (priority1>priority0)));
                   
-                  if (is_valid)
-                    {
-                      // commit
-                      Tcontrol_t take = PORT_READ(in_BRANCH_COMPLETE_TAKE [i]);
-                      reg_STATE                  [context] = CONTEXT_STATE_KO_MISS;
-                      reg_EVENT_ADDRESS          [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_SRC  [i])+1; //DELAY_SLOT
-                      reg_EVENT_ADDRESS_EPCR     [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_DEST [i]); 
-                      reg_EVENT_ADDRESS_EPCR_VAL [context] = take; // if not take : in sequence
-                    //reg_EVENT_ADDRESS_EEAR     [context]; 
-                      reg_EVENT_ADDRESS_EEAR_VAL [context] = 0;
-                      reg_EVENT_IS_DELAY_SLOT    [context] = take;
-                      reg_EVENT_IS_DS_TAKE       [context] = take;
-                      reg_EVENT_DEPTH            [context] = depth;
-                    }
-                }
-            }
+//                   if (is_valid)
+//                     {
+//                       // commit
+//                       Tcontrol_t take = PORT_READ(in_BRANCH_COMPLETE_TAKE [i]);
+//                       reg_STATE                  [context] = CONTEXT_STATE_KO_MISS;
+//                       reg_EVENT_ADDRESS          [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_SRC  [i])+1; //DELAY_SLOT
+//                       reg_EVENT_ADDRESS_EPCR     [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_DEST [i]); 
+//                       reg_EVENT_ADDRESS_EPCR_VAL [context] = take; // if not take : in sequence
+//                     //reg_EVENT_ADDRESS_EEAR     [context]; 
+//                       reg_EVENT_ADDRESS_EEAR_VAL [context] = 0;
+//                       reg_EVENT_IS_DELAY_SLOT    [context] = take;
+//                       reg_EVENT_IS_DS_TAKE       [context] = take;
+//                       reg_EVENT_DEPTH            [context] = depth;
+//                     }
+//                 }
+//             }
 
         // -------------------------------------------------------------------
@@ -305,4 +311,5 @@
           if (internal_EVENT_VAL [i] and PORT_READ(in_EVENT_ACK [i]))
             {
+              log_printf(TRACE,Context_State,FUNCTION,"  * EVENT [%d]",i);
               // Write pc
               context_state_t state = reg_STATE [i];
@@ -338,4 +345,6 @@
           if (internal_SPR_EVENT_VAL [i] and PORT_READ(in_SPR_EVENT_ACK [i]))
             {
+              log_printf(TRACE,Context_State,FUNCTION,"  * SPR_EVENT [%d]",i);
+
               // Write spr
 #ifdef DEBUG_TEST
