#FIG 3.2 Landscape Center Inches Letter 100.00 Single -2 1200 2 6 900 -2400 2100 -2100 2 4 0 1 0 30 51 -1 20 0.000 0 0 7 0 0 5 2100 -2100 900 -2100 900 -2400 2100 -2400 2100 -2100 4 1 0 50 -1 2 8 0.0000 0 105 315 1500 -2250 D\351but\001 -6 6 825 -1125 2175 -450 1 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1500 -825 600 225 1500 -825 2100 -825 4 0 0 51 -1 0 8 0.0000 0 75 120 1575 -450 ok\001 4 1 0 50 -1 2 8 0.0000 0 75 240 1500 -825 Test\001 4 0 0 51 -1 0 8 0.0000 0 75 120 2025 -975 ko\001 -6 6 1650 450 2850 900 2 4 0 1 0 11 51 -1 20 0.000 0 0 7 0 0 5 2850 900 1650 900 1650 450 2850 450 2850 900 4 1 0 50 -1 2 8 0.0000 0 75 375 2250 825 VHDL\001 4 1 0 50 -1 2 8 0.0000 0 90 615 2250 600 TestBench \001 -6 1 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1500 -75 600 225 1500 -75 2100 -300 1 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1501 1423 600 225 1501 1423 2101 1198 1 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1500 2175 600 225 1500 2175 2100 1950 1 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 1425 600 225 1575 1425 2175 1200 1 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 2175 600 225 1575 2175 2175 1950 1 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 -75 600 225 1575 -75 2175 -300 1 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 -825 600 225 1575 -825 2175 -1050 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 1500 150 2250 450 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 750 900 1350 1200 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 2250 900 1650 1200 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 5 3 0 1.00 60.00 120.00 900 2175 -150 2175 -150 -1950 1200 -1950 1200 -1800 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 5 3 0 1.00 60.00 120.00 2100 -825 2400 -825 2400 -1950 1800 -1950 1800 -1800 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 1500 -2100 1500 -1800 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 1500 -1350 1500 -1050 2 4 0 1 0 11 51 -1 20 0.000 0 0 7 0 0 5 2100 -1350 900 -1350 900 -1800 2100 -1800 2100 -1350 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 1500 -600 1500 -300 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 900 -75 -150 -75 2 1 0 1 0 7 50 -1 20 0.000 0 0 7 1 0 2 3 0 1.00 60.00 120.00 1500 150 750 450 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 5 3 0 1.00 60.00 120.00 900 1425 0 1425 0 300 450 300 450 450 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 1500 1650 1500 1950 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 3 0 1.00 60.00 120.00 1500 2400 1500 2700 2 4 0 1 0 30 51 -1 20 0.000 0 0 7 0 0 5 2100 3000 900 3000 900 2700 2100 2700 2100 3000 2 4 0 1 0 11 51 -1 20 0.000 0 0 7 0 0 5 1350 900 150 900 150 450 1350 450 1350 900 2 4 0 1 0 30 60 -1 10 0.000 0 0 7 0 0 5 2175 -2025 2175 -2325 975 -2325 975 -2025 2175 -2025 2 4 0 1 0 30 60 -1 10 0.000 0 0 7 0 0 5 2175 3075 2175 2775 975 2775 975 3075 2175 3075 2 4 0 1 0 11 60 -1 10 0.000 0 0 7 0 0 5 2925 975 2925 525 1725 525 1725 975 2925 975 2 4 0 1 0 11 60 -1 10 0.000 0 0 7 0 0 5 1425 975 1425 525 225 525 225 975 1425 975 2 4 0 1 0 11 60 -1 10 0.000 0 0 7 0 0 5 2175 -1275 2175 -1725 975 -1725 975 -1275 2175 -1275 4 1 0 50 -1 2 8 0.0000 0 105 465 1500 -1425 SystemC\001 4 1 0 50 -1 2 8 0.0000 0 105 450 1500 -1650 Mod\350le \001 4 1 0 50 -1 2 8 0.0000 0 90 600 1500 -150 Contrainte\001 4 1 0 50 -1 2 8 0.0000 0 90 675 1500 75 Performance\001 4 2 0 51 -1 0 8 0.0000 0 75 120 900 -225 ko\001 4 1 0 50 -1 2 8 0.0000 0 75 240 1500 1425 Test\001 4 2 0 51 -1 0 8 0.0000 0 75 120 900 1350 ko\001 4 0 0 51 -1 0 8 0.0000 0 75 120 1575 1800 ok\001 4 0 0 51 -1 0 8 0.0000 0 75 120 1575 2550 ok\001 4 2 0 51 -1 0 8 0.0000 0 75 120 900 2100 ko\001 4 1 0 50 -1 2 8 0.0000 0 90 390 1500 2325 Surface\001 4 1 0 50 -1 2 8 0.0000 0 90 600 1500 2100 Contrainte\001 4 1 0 50 -1 2 8 0.0000 0 90 195 1500 2850 Fin\001 4 1 0 50 -1 2 8 0.0000 0 75 375 750 825 VHDL\001 4 1 0 50 -1 2 8 0.0000 0 105 450 750 600 Mod\350le \001 4 1 0 51 -1 0 8 0.0000 0 75 120 1500 300 ok\001