Changes between Initial Version and Version 1 of Arch/Soclib/Xicu


Ignore:
Timestamp:
Feb 16, 2010, 10:57:30 AM (14 years ago)
Author:
Nicolas Pouillon
Comment:

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  • Arch/Soclib/Xicu

    v1 v1  
     1= Xicu component in Flattened device trees =
     2
     3[soclib:wiki:Component/VciXicu Xicu] is a m->n irq router.
     4
     5It concentrates 3 types of interrupt sources:
     6 * IPIs (WTI)
     7 * Timers (PTI)
     8 * External IRQ lines (HWI)
     9
     10These inputs can be filtered independently for each output signal.
     11
     12= MutekH context =
     13
     14In MutekH, we preferably use the Xicu with:
     15 * N IPIs: 1 per processor
     16 * 1 timer
     17 * M Input IRQ lines (as needed)
     18 * N output lines: 1 per processor
     19
     20== MutekH device tree representation ==
     21
     22In MutekH device tree, Xicu is quite tricky to reprensent; we can enumerate the following logical devices:
     23 * a (multi) timer
     24 * 1 ICU (with input selection, masking and callbacks) per CPU.
     25
     26Thus we use the following device tree:
     27
     28 * Xicu root (a timer)
     29   * Xicu filter for output 0
     30   * Xicu filter for output 1
     31   * …
     32
     33= Flattened device tree representation =
     34
     35In FlattenedDeviceTree, the representation follows this logic.
     36 * There is a timer device which is the root
     37 * There is one filter per output line.
     38
     39{{{
     40xicu@0xd2200000 {
     41    device_type = "soclib:xicu:root";
     42    input_lines = <2>;
     43    ipis = <4>;
     44    timers = <1>;
     45    reg = <0xd2200000 0x1000>;
     46
     47    out@0 {
     48        device_type = "soclib:xicu:filter";
     49        parent = &{/xicu@0xd2200000};
     50        output_line = <0>;
     51        irq = <&{/cpus/Mips,32@0} 0>;
     52    };
     53
     54    out@1 {
     55        device_type = "soclib:xicu:filter";
     56        parent = &{/xicu@0xd2200000};
     57        output_line = <1>;
     58        irq = <&{/cpus/Mips,32@1} 0>;
     59    };
     60
     61    …
     62};
     63}}}
     64
     65== Timer designation ==
     66
     67Timer may be designated by a couple
     68{{{<&{device_path} timer_id>}}}, maximum timer id is defined by
     69the xicu root {{{"timers"}}} property.
     70
     71Timer may be used in {{{/chosen}}}, like:
     72
     73{{{
     74chosen {
     75    console = &{/tty@0xd0200000};
     76    timer = <&{/xicu@0xd2200000} 0>;
     77};
     78}}}
     79
     80== Hardware IRQ input routing ==
     81
     82As usual, other components route their IRQs to targets; but as the
     83''root'' is a timer device, IRQs must be routed to one of the output
     84filters. Couple is:
     85{{{<&{device_path} input_id>}}}, maximum hardware line id is defined by
     86the xicu root {{{"input_lines"}}} property.
     87
     88{{{
     89tty@0xd0200000 {
     90    device_type = "soclib:tty";
     91    tty_count = <1>;
     92    reg = <0xd0200000 0x10>;
     93    irq = <&{/xicu@0xd2200000/out@0} 0>;
     94};
     95}}}
     96
     97== IPI routing ==
     98
     99Likewise, in MutekH, IPIs are handled by the ICU device class.
     100Processors must use xicu filters as IPI controllers. Couple is:
     101{{{<&{device_path} ipi_id>}}}, maximum IPI id is defined by
     102the xicu root {{{"ipis"}}} property.
     103
     104{{{
     105Mips,32@0 {
     106    name = "Mips,32";
     107    device_type = "cpu";
     108    reg = <0>;
     109    icudev_type = "cpu:mips";
     110    ipi = <&{/xicu@0/out@0} 0>;
     111};
     112}}}