Changeset 100

progress toward a TSAR SMP-safe pmap:

• wrap tlb inval in private inline, which can be defined as nop on TSAR CPUs. only pmap_map_ptes() should need explicit flushes, because changes to PD entries are not tracked by hardware
• on each CPUs remember the last pmap which was mapped, and do a TLB flush if it changed

Also, fix a pp_attrs useage; affects performances but should not affect
the value returned.