Timeline
Jun 1, 2010:
- 8:09 PM Changeset [92] by
- Fix BRANCHTARGET macro; use the pc to compute the new pc, not the …
May 31, 2010:
- 5:47 PM Changeset [91] by
- Don't mask last bit of user address.
May 28, 2010:
- 1:49 PM Changeset [90] by
- Add vcibd
- 1:49 PM Changeset [89] by
- More cache flush/inval operations
- 1:35 PM Changeset [88] by
- - pm_obj shall be at the start of struct pmap. - Fix artithmetic in …
May 27, 2010:
- 6:22 PM Changeset [87] by
- tsarmips-specific bus_dma methods (forgotten in a previous commit).
- 6:18 PM Changeset [86] by
- More sync/inval cache ops
- 6:18 PM Changeset [85] by
- Fix debug printf formats
- 5:54 PM Changeset [84] by
- Fix pmap_extract(): don't forget to add the offset within the page.
- 4:26 PM Changeset [83] by
- Add a driver for the block device
- 4:25 PM Changeset [82] by
- Implement bus_dma(9) for tsarmips.
- 4:03 PM Changeset [81] by
- Make stand/ build again
- 4:02 PM Changeset [80] by
- Make standalone/module build.
- 4:01 PM Changeset [79] by
- Bug fix for contigous memory allocation (reported and fixed upstream)
- 3:35 PM Changeset [78] by
- Make it build for mips32
May 25, 2010:
- 5:05 PM Changeset [77] by
- add simhelper driver
- 1:47 PM Changeset [76] by
- Fix typo
May 21, 2010:
- 6:18 PM Changeset [75] by
- Add a driver for vci_simhelper, which shut down the simulator on …
- 6:17 PM Changeset [74] by
- Properly probe devices without IRQ
May 20, 2010:
- 6:16 PM Changeset [73] by
- 2 structure members with the same semantic is one too much. Keep only …
- 6:13 PM Changeset [72] by
- Initialize ci_fpcurlwp (not used yet). Add some KASSERT and improve …
- 6:13 PM Changeset [71] by
- Initialize MIPS_COP_0_TCCONTEXT
- 6:12 PM Changeset [70] by
- Declare MIPS_COP_0_TCCONTEXT, and use it to keep curlwp from userland.
- 4:41 PM Changeset [69] by
- disable preemtion until we got infos from the vcache. restore ra …
- 4:32 PM Changeset [68] by
- Grab kernel_lock for hardware interrupts.
May 19, 2010:
- 8:06 PM Changeset [67] by
- Explicitely disable interrupts on secondary processors.
May 18, 2010:
- 10:27 PM Changeset [66] by
- Ack WTI
- 10:10 PM Changeset [65] by
- Give IPL_HIGH its own interrupt line. Drop lines for soft interrupts, …
- 9:42 PM Changeset [64] by
- Destroy pmap->pm_obj in pmap_ctor() on failure.
- 6:53 PM Changeset [63] by
- Properly compute interrupt lines.
- 1:07 PM Changeset [62] by
- Add IPL_DDB
- 12:50 PM Changeset [61] by
- merge matt-nb5-mips64-20100518
- 12:15 PM Changeset [60] by
- Tagging today's matt-nb5-mips64 import.
- 12:14 PM Changeset [59] by
- Import the NetBSD matt-nb5-mips64 branch as of now
May 7, 2010:
- 6:47 PM Changeset [58] by
- Allow to bind interrupts to a specific CPU.
- 5:56 PM Changeset [57] by
- Compare vaddr > VM_MAXUSER_ADDRESS, not < 0
- 5:55 PM Changeset [56] by
- t8 is now the CURLWP register, don't use it. Save and use S8 instead.
- 4:24 PM Changeset [55] by
- Merge trap.c from CVS 1.217.12.26
- 4:22 PM Changeset [54] by
- Merge trap.c CVS 1.217.12.26
- 4:21 PM Changeset [53] by
- Make SMP kernels build again.
- 3:13 PM Changeset [52] by
- SOFTFLOAT is now FPEMUL
- 12:13 PM Changeset [51] by
- Make *_DEBUG build call ddb at splhigh()
- 12:11 PM Changeset [50] by
- Compare address against VM_MAXUSER_ADDRESS to decide if it's a kernel …
May 5, 2010:
- 8:06 PM Changeset [49] by
- Properly initialize status reg in PCB.
- 8:05 PM Changeset [48] by
- splsched() is the same as splhigh() these days.
- 8:04 PM Changeset [47] by
- Resolve merge conflicts (forgotten after last import)
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