Timeline



Dec 7, 2012:

1:30 PM Changeset [189] by bouyer
The FPGA tty gets only a \r as end-of-line, so ignore \n and convert …
10:25 AM Changeset [188] by bouyer
soclib's STATUS is a boolean so we can mask it with 0x1, for the …
Note: See TracTimeline for information about the timeline view.