Timeline



Apr 20, 2010:

10:58 PM Changeset [33] by bouyer
Make non-CC, non-MLTIPROCESSOR kernel build and work again Pass FDT …
10:57 PM Changeset [32] by bouyer
Switch boot CPU to 0 again Disable cache again, for non-CC platforms
8:20 PM Changeset [31] by bouyer
Also pass xicu to cpu when there's no CPU info.

Apr 13, 2010:

12:27 AM Changeset [30] by bouyer
More generic interrupt routing: - attach xicu before CPUs and pass …

Apr 9, 2010:

11:53 PM Changeset [29] by bouyer
Add a cluster device, attach cpu and xicu to cluster. Only one cluster …

Apr 3, 2010:

5:17 PM Changeset [28] by bouyer
Gracefully deal with the boot CPU not being cpu 0.
2:30 PM Changeset [27] by bouyer
Enable caches early, and on all CPUs.

Apr 2, 2010:

11:44 PM Changeset [26] by bouyer
SMP support: handle and attach multiple CPUs. Interrupts do be done.
11:24 PM Changeset [25] by bouyer
Bump version for SMP support.
4:13 PM Changeset [24] by bouyer
Properly handle multiple CPUs in the early stage of the boot: - …

Mar 26, 2010:

4:37 PM Changeset [23] by bouyer
Split vcache.h so registers defines are useable from asm files.
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