| 1 | #!/usr/bin/env python
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| 2 |
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| 3 | from stratus import *
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| 4 |
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| 5 | # definition du bloc mux
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| 6 | class mux ( Model ) :
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| 7 |
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| 8 | # declaration des connecteurs
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| 9 | def Interface ( self ) :
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| 10 | # recuperation du parametre
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| 11 | self.n = self._param['nbit']
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| 12 |
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| 13 | # connecteurs
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| 14 | self.i0 = SignalIn ( "i0", self.n )
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| 15 | self.i1 = SignalIn ( "i1", self.n )
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| 16 | self.cmd = SignalIn ( "cmd", 1 )
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| 17 | self.s = SignalOut ( "s", self.n )
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| 18 | self.vdd = VddIn ( "vdd" )
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| 19 | self.vss = VssIn ( "vss" )
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| 20 |
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| 21 | # instanciation des cellules
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| 22 | def Netlist ( self ) :
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| 23 | for i in range ( self.n ) :
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| 24 | Inst ( "mx2_x2"
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| 25 | , map = { 'i0' : self.i0[i]
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| 26 | , 'i1' : self.i1[i]
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| 27 | , 'cmd' : self.cmd
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| 28 | , 'q' : self.s[i]
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| 29 | , 'vdd' : self.vdd
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| 30 | , 'vss' : self.vss
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| 31 | }
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| 32 | )
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