ToolsCourseTp3: am2901_core.py

File am2901_core.py, 5.9 KB (added by cobell, 17 years ago)
Line 
1#!/usr/bin/env python
2
3from stratus import *
4
5class am2901_core ( Model ) :
6
7 def Interface ( self ) :
8 # ***************** Terminal Declarations ******************
9 # Pin terminals associated with ALU.
10 self.cin = SignalIn ( "cin", 1 )
11 self.cout = SignalOut ( "cout", 1 )
12 self.np = SignalOut ( "np", 1 )
13 self.ng = SignalOut ( "ng", 1 )
14 self.over = SignalOut ( "over", 1 )
15 self.zero = SignalOut ( "zero", 1 )
16
17 # Pin terminals associated with the RAM and ACCU shifter.
18 # RAM and ACCU I/O plots controls.
19 self.sh_right = SignalOut ( "sh_right", 1 )
20 self.sh_left = SignalOut ( "sh_left", 1 )
21
22 # RAM shifter I/O.
23 self.ram_o_down = SignalOut ( "ram_o_down", 1 ) # alu_f[0]
24 self.ram_o_up = SignalOut ( "ram_o_up", 1 ) # alu_f[3]
25 self.ram_i_down = SignalIn ( "ram_i_down", 1 )
26 self.ram_i_up = SignalIn ( "ram_i_up", 1 )
27
28 # ACC shifter I/O.
29 self.acc_o_down = SignalOut ( "acc_o_down", 1 )
30 self.acc_o_up = SignalOut ( "acc_o_up", 1 )
31 self.acc_i_down = SignalIn ( "acc_i_down", 1 )
32 self.acc_i_up = SignalIn ( "acc_i_up", 1 )
33
34 # ACCU controls terminals.
35 self.ck = SignalIn ( "ck", 1 )
36
37 # Data bus terminals.
38 self.a = SignalIn ( "a", 4 )
39 self.b = SignalIn ( "b", 4 )
40 self.d = SignalIn ( "d", 4 )
41 self.i = SignalIn ( "i", 9 )
42 self.y = SignalOut ( "y", 4 )
43 self.noe = SignalIn ( "noe", 1 )
44 self.oe = SignalOut ( "oe", 1 )
45
46 # Power suplies terminals.
47 self.vdd = VddIn ( "vdd" )
48 self.vss = VssIn ( "vss" )
49
50 def Netlist ( self ) :
51 ops_mx = Signal ( "ops_mx", 3 )
52 opr_mx = Signal ( "opr_mx", 2 )
53 alu_k = Signal ( "alu_k", 5 )
54 alu_over = Signal ( "alu_over", 1 )
55 ram_sh = Signal ( "ram_sh", 2 )
56 out_mx = Signal ( "out_mx", 1 )
57 acc_wen = Signal ( "acc_wen", 1 )
58 deca = Signal ( "deca", 16 )
59 decb = Signal ( "decb", 16 )
60 decwb = Signal ( "decwb", 16 )
61 alu_np = Signal ( "alu_np", 4 )
62 alu_ng = Signal ( "alu_ng", 4 )
63 alu_f = Signal ( "alu_f", 2 )
64
65 Generate ( "am2901_dpt.am2901_dpt", "am2901_dpt" )
66
67 # **************** Data-Path Instanciation *****************
68 self.Dpt = Inst ( "am2901_dpt", "dpt"
69 , map = { 'ram_ck' : Cat ( self.ck, self.ck, self.ck, self.ck, self.ck, self.ck, self.ck, self.ck
70 , self.ck, self.ck, self.ck, self.ck, self.ck, self.ck, self.ck, self.ck )
71 , 'ops_mx' : ops_mx
72 , 'opr_mx' : opr_mx
73 , 'alu_k' : alu_k
74 , 'alu_cin' : self.cin
75 , 'alu_cout' : self.cout
76 , 'alu_over' : alu_over
77 , 'ram_sh' : ram_sh
78 , 'acc_sh' : ram_sh
79 , 'ram_i_up' : self.ram_i_up
80 , 'ram_i_down' : self.ram_i_down
81 , 'acc_i_up' : self.acc_i_up
82 , 'acc_i_down' : self.acc_i_down
83 , 'acc_q_down' : self.acc_o_down
84 , 'acc_q_up' : self.acc_o_up
85 , 'out_mx' : out_mx
86 , 'acc_ck' : self.ck
87 , 'acc_wen' : acc_wen
88 , 'a' : deca
89 , 'b' : decb
90 , 'b_w' : decwb
91 , 'opr_d' : self.d
92 , 'alu_f' : Cat ( self.ram_o_up, alu_f, self.ram_o_down )
93 , 'alu_np' : alu_np
94 , 'alu_ng' : alu_ng
95 , 'out_x' : self.y
96 , 'vdd' : self.vdd
97 , 'vss' : self.vss
98 }
99 )
100
101 # ***************** Control Instanciation ******************
102 self.Ctl = Inst ( "am2901_ctl", "ctl"
103 , map = { 'ops_mx' : ops_mx
104 , 'opr_mx' : opr_mx
105 , 'alu_k' : alu_k
106 , 'alu_cout' : self.cout
107 , 'alu_over' : alu_over
108 , 'deca' : deca
109 , 'decb' : decb
110 , 'decwb' : decwb
111 , 'a' : self.a
112 , 'b' : self.b # bw == b
113 , 'ram_sh' : ram_sh
114 , 'out_mx' : out_mx
115 , 'acc_wen' : acc_wen
116 , 'alu_f' : Cat ( self.ram_o_up, alu_f, self.ram_o_down )
117 , 'alu_np' : alu_np
118 , 'alu_ng' : alu_ng
119 , 'core_np' : self.np
120 , 'core_ng' : self.ng
121 , 'core_over' : self.over
122 , 'core_zero' : self.zero
123 , 'core_sh_right' : self.sh_right
124 , 'core_sh_left' : self.sh_left
125 , 'i' : self.i
126 , 'noe' : self.noe
127 , 'oe' : self.oe
128 , 'vdd' : self.vdd
129 , 'vss' : self.vss
130 }
131 )