[1] | 1 | #include <pic18fregs.h> |
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| 2 | #include <stdio.h> |
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| 3 | #include <math.h> |
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| 4 | #include <my_serial.h> |
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[11] | 5 | #include <my_serial2.h> |
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[1] | 6 | |
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| 7 | extern char stack; |
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| 8 | extern char stack_end; |
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| 9 | |
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| 10 | #pragma stack 0x100 256 |
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| 11 | |
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| 12 | void _reset (void) __naked __interrupt 0; |
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| 13 | void _startup (void) __naked; |
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| 14 | |
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[13] | 15 | static char counter_2hz; |
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[1] | 16 | static volatile short counter_10hz; |
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[11] | 17 | static volatile unsigned char softintrs; |
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| 18 | #define INT_10HZ (unsigned char)0x01 |
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| 19 | #define INT_AD (unsigned char)0x02 |
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| 20 | #define INT_RX1 (unsigned char)0x08 |
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| 21 | #define INT_RX1OF (unsigned char)0x10 |
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[1] | 22 | |
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[11] | 23 | static volatile unsigned char status; |
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| 24 | #define STAT_WAIT (unsigned char)0x00 |
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| 25 | #define STAT_MEASURE (unsigned char)0x01 |
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| 26 | #define STAT_EXIT (unsigned char)0x02 |
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| 27 | #define STAT_CONSOLE (unsigned char)0x04 |
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| 28 | |
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| 29 | static volatile unsigned char adstatus; |
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| 30 | #define ADSTAT_MEASURE (unsigned char)0x01 |
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| 31 | static unsigned char ad_resh; |
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| 32 | static unsigned char ad_resl; |
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| 33 | static unsigned char ad_channel; |
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| 34 | |
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| 35 | |
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[1] | 36 | #define TIMER0_5MS 192 /* 48 without PLL */ |
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| 37 | |
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| 38 | #define TIMER2_10HZ 1000 |
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| 39 | |
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[11] | 40 | #define LEDR LATAbits.LATA7 |
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| 41 | #define LEDG LATAbits.LATA6 |
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| 42 | #define PWRON LATCbits.LATC2 |
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| 43 | #define RL1 LATCbits.LATC4 |
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| 44 | #define RL2 LATCbits.LATC5 |
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| 45 | #define SENSE PORTAbits.RA5 |
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| 46 | |
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[1] | 47 | #define CLRWDT __asm__("clrwdt") |
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| 48 | #define SLEEP __asm__("sleep") |
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| 49 | |
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[11] | 50 | static void do_measure(void); |
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| 51 | static void do_console(void); |
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| 52 | static void do_cal_data(void); |
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| 53 | static void parse_rx(void); |
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[1] | 54 | |
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[11] | 55 | static char buf[84]; |
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| 56 | |
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| 57 | /* address of calibration data in RAM */ |
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| 58 | #define cal_data 0x01F000 |
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| 59 | |
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| 60 | |
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| 61 | #if 1 |
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[1] | 62 | #define PRINTHEX(v) \ |
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| 63 | { \ |
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| 64 | unsigned char c = (v); \ |
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| 65 | if (c < 10) { \ |
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[11] | 66 | uart_putchar_hard('0' + c); \ |
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[1] | 67 | } else { \ |
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[11] | 68 | uart_putchar_hard(('a' - 10) + c ); \ |
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[1] | 69 | } \ |
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| 70 | } |
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[11] | 71 | #else |
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| 72 | #define PRINTHEX(v) {} |
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| 73 | #endif |
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[1] | 74 | |
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| 75 | void |
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| 76 | main(void) __naked |
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| 77 | { |
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| 78 | softintrs = 0; |
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| 79 | |
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| 80 | ANCON0 = 0xf0; /* an0-an3 analog, an4-an7 digital */ |
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| 81 | ANCON1 = 0x3f; /* an8-12 digital */ |
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| 82 | |
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[11] | 83 | RL1 = 0; |
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| 84 | TRISCbits.TRISC4 = 0; |
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| 85 | RL2 = 0; |
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| 86 | TRISCbits.TRISC5 = 0; |
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| 87 | PWRON = 0; |
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[1] | 88 | TRISCbits.TRISC2 = 0; |
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[11] | 89 | LEDR = 1; |
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| 90 | TRISAbits.TRISA7 = 0; |
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| 91 | LEDG = 0; |
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| 92 | TRISAbits.TRISA6 = 0; |
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[1] | 93 | |
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| 94 | /* switch PLL on */ |
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| 95 | OSCTUNEbits.PLLEN = 1; |
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| 96 | |
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| 97 | /* configure sleep mode: PRI_IDLE */ |
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| 98 | OSCCONbits.SCS = 0; |
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| 99 | OSCCONbits.IDLEN = 1; |
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| 100 | /* everything is low priority by default */ |
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| 101 | IPR1 = 0; |
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| 102 | IPR2 = 0; |
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| 103 | IPR3 = 0; |
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| 104 | IPR4 = 0; |
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| 105 | IPR5 = 0; |
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| 106 | INTCON = 0; |
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| 107 | INTCON2 = 0; |
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| 108 | INTCON3 = 0; |
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| 109 | INTCON2bits.RBPU = 1; |
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| 110 | |
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| 111 | RCONbits.IPEN=1; /* enable interrupt priority */ |
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| 112 | |
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| 113 | /* configure timer0 as free-running counter at 46.875Khz */ |
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| 114 | T0CON = 0x07; /* b00000111: internal clock, 1/256 prescaler */ |
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| 115 | INTCONbits.TMR0IF = 0; |
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| 116 | INTCONbits.TMR0IE = 0; /* no interrupt */ |
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| 117 | T0CONbits.TMR0ON = 1; |
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| 118 | |
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| 119 | #if 0 |
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| 120 | /* configure UART for 57600Bps at 48Mhz */ |
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| 121 | SPBRG1 = 12; |
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| 122 | #endif |
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| 123 | /* configure UART for 921600Bps at 48Mhz */ |
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| 124 | TXSTA1bits.BRGH = 1; |
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| 125 | BAUDCON1bits.BRG16 = 1; |
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| 126 | SPBRGH1 = 0; |
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| 127 | SPBRG1 = 12; |
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| 128 | |
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[11] | 129 | /* pre-configure UART2 */ |
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| 130 | /* turn off PPS write protect */ |
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| 131 | __asm |
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| 132 | banksel _PPSCON |
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| 133 | movlw 0x55 |
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| 134 | movwf _EECON2, a |
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| 135 | movlw 0xAA |
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| 136 | movwf _EECON2, a |
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| 137 | BCF _PPSCON, _IOLOCK, b |
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| 138 | __endasm; |
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| 139 | |
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| 140 | TRISCbits.TRISC0 = 1; |
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| 141 | LATCbits.LATC1 = 1; |
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| 142 | TRISCbits.TRISC1 = 0; |
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| 143 | RPINR16 = 11; /* RC0 = RX */ |
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| 144 | RPOR12 = 6; /* RC1 = TX */ |
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| 145 | TXSTA2 = 0x24; /* TXEN, BRGH set, others clear */ |
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| 146 | RCSTA2 = 0x90; /* UART enable, receiver disabled */ |
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| 147 | BAUDCON2 = 0x08; /* BRG16 */ |
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| 148 | |
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[1] | 149 | USART_INIT(0); |
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[11] | 150 | USART2_INIT(0); |
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| 151 | |
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[1] | 152 | stdout = STREAM_USER; /* Use the macro PUTCHAR with printf */ |
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| 153 | |
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| 154 | #if TIMER2_10HZ == 100 |
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| 155 | /* configure timer2 for 1Khz interrupt */ |
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| 156 | T2CON = 0x22; /* b00100010: postscaller 1/5, prescaler 1/16 */ |
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| 157 | PR2 = 150; /* 1khz output */ |
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| 158 | #elif TIMER2_10HZ == 1000 |
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| 159 | /* configure timer2 for 10Khz interrupt */ |
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| 160 | T2CON = 0x22; /* b00100010: postscaller 1/5, prescaler 1/16 */ |
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| 161 | PR2 = 15; /* 10khz output */ |
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| 162 | #elif TIMER2_10HZ == 2000 |
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| 163 | /* configure timer2 for 20Khz interrupt */ |
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| 164 | T2CON = 0x21; /* b00100001: postscaller 1/5, prescaler 1/4 */ |
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| 165 | PR2 = 29; /* 20khz output */ |
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| 166 | #else |
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| 167 | #error "unknown TIMER2_10HZ" |
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| 168 | #endif |
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| 169 | counter_10hz = TIMER2_10HZ; |
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| 170 | T2CONbits.TMR2ON = 1; |
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| 171 | PIR1bits.TMR2IF = 0; |
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| 172 | IPR1bits.TMR2IP = 1; /* high priority interrupt */ |
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| 173 | PIE1bits.TMR2IE = 1; |
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| 174 | |
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[11] | 175 | status = STAT_WAIT; |
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| 176 | adstatus = 0; |
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[1] | 177 | |
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| 178 | INTCONbits.GIE_GIEH=1; /* enable high-priority interrupts */ |
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| 179 | INTCONbits.PEIE_GIEL=1; /* enable low-priority interrrupts */ |
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| 180 | |
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| 181 | /* |
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| 182 | * configure ADC: |
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| 183 | * AN3: vref+ |
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| 184 | * AN2: I |
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| 185 | * AN1: vout |
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| 186 | */ |
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| 187 | |
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| 188 | ADCON0 = 0xc1; /* b11000001 */ |
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| 189 | /* clk = fosc/64, tacq = 4tad (5.33us) */ |
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| 190 | ADCON1 = 0x96; /* b10010110 */ |
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| 191 | /* ANCON already set up */ |
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| 192 | |
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| 193 | /* start calibration */ |
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| 194 | ADCON1bits.ADCAL = 1; |
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| 195 | ADCON0bits.GO_NOT_DONE =1; |
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| 196 | while (ADCON0bits.GO_NOT_DONE) |
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| 197 | ; /* wait */ |
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| 198 | ADCON1bits.ADCAL = 0; |
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| 199 | PIR1bits.ADIF = 0; |
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| 200 | PIE1bits.ADIE = 1; |
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| 201 | |
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| 202 | printf("hello world\n"); |
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| 203 | /* enable watch dog timer */ |
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| 204 | WDTCON = 0x01; |
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[13] | 205 | LEDR = 1; |
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| 206 | LEDG = 1; |
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| 207 | counter_2hz = 5; |
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| 208 | while (counter_2hz > 0) { |
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| 209 | if (softintrs & INT_10HZ) { |
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| 210 | softintrs &= ~INT_10HZ; |
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| 211 | counter_2hz--; |
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| 212 | } |
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| 213 | } |
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| 214 | counter_2hz = 5; |
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[11] | 215 | LEDR = 0; |
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[13] | 216 | LEDG = 0; |
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[1] | 217 | |
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| 218 | printf("\nready\n"); |
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| 219 | ad_channel = 0; |
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| 220 | ADCON0bits.CHS = 0; |
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[11] | 221 | PWRON = 0; |
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[1] | 222 | |
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[11] | 223 | while ((status & STAT_EXIT) == 0) { |
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[1] | 224 | CLRWDT; |
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[11] | 225 | if (softintrs & INT_10HZ) { |
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| 226 | softintrs &= ~INT_10HZ; |
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[13] | 227 | counter_2hz--; |
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| 228 | if (counter_2hz == 0) { |
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| 229 | counter_2hz = 5; |
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| 230 | LEDG ^= 1; |
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| 231 | } |
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[11] | 232 | } |
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| 233 | if (softintrs & INT_RX1) { |
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| 234 | parse_rx(); |
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| 235 | } else { |
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| 236 | SLEEP; |
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| 237 | continue; |
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| 238 | } |
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| 239 | if (status & STAT_MEASURE) |
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| 240 | do_measure(); |
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| 241 | else if (status & STAT_CONSOLE) |
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| 242 | do_console(); |
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| 243 | } |
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| 244 | printf("returning\n"); |
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| 245 | while (PIE1bits.TX1IE) |
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| 246 | ; /* wait for transmit to complete */ |
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| 247 | INTCONbits.PEIE=0; /* disable peripheral interrupts */ |
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| 248 | INTCONbits.GIE=0; /* disable interrrupts */ |
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| 249 | } |
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[1] | 250 | |
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[11] | 251 | static void |
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| 252 | parse_rx() |
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| 253 | { |
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| 254 | char c; |
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| 255 | char c2; |
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| 256 | char ok = 1; |
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| 257 | char err = 0; |
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| 258 | long br; |
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| 259 | short brgreg = 0; |
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| 260 | |
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| 261 | softintrs &= ~INT_RX1; |
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| 262 | c = uart_getchar(); |
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| 263 | switch(c) { |
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| 264 | case 'B': |
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| 265 | c = uart_getchar(); |
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| 266 | br = 0; |
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| 267 | while(c != '\n') { |
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| 268 | if (c < '0' || c > '9') { |
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| 269 | err = 1; |
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| 270 | break; |
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| 271 | } |
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| 272 | br = br * 10 + c - '0'; |
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| 273 | c = uart_getchar(); |
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| 274 | } |
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| 275 | if (br > 0) { |
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| 276 | /* |
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| 277 | * brg = F / 16 / (n + 1) |
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| 278 | * brg * (n + 1) = F / 16 |
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| 279 | * n + 1 = F / 16 / brg |
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| 280 | * n = F / 16 / brg - 1 |
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| 281 | * with F = 48Mhz |
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| 282 | * n = 3000000 / brg - 1 |
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| 283 | */ |
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| 284 | brgreg = (12000000L + br / 2) / br - 1; |
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| 285 | printf("brgreg %d\n", brgreg); |
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| 286 | } |
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| 287 | if (err == 0) { |
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| 288 | if (br > 0) { |
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| 289 | SPBRGH2 = (brgreg >> 8); |
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| 290 | SPBRG2 = (brgreg & 0xff); |
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| 291 | } |
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| 292 | status = STAT_CONSOLE; |
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| 293 | } |
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| 294 | break; |
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| 295 | case 'C': |
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| 296 | do_cal_data(); |
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| 297 | c = '\n'; |
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| 298 | break; |
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| 299 | case 'E': |
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| 300 | status = STAT_EXIT; |
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| 301 | break; |
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| 302 | case 'M': |
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| 303 | c = uart_getchar(); |
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| 304 | if (c == '0') { |
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| 305 | if (status == STAT_MEASURE) |
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| 306 | ok = 0; |
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| 307 | status = STAT_WAIT; |
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| 308 | } else if (c == '1') { |
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| 309 | status = STAT_MEASURE; |
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| 310 | } else { |
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| 311 | err = 1; |
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| 312 | } |
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| 313 | break; |
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| 314 | case 'P': |
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| 315 | c = uart_getchar(); |
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| 316 | if (c == '0') |
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| 317 | PWRON = 0; |
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| 318 | else if (c == '1') |
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| 319 | PWRON = 1; |
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| 320 | else |
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| 321 | err = 1; |
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| 322 | break; |
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| 323 | case 'R': |
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| 324 | c = uart_getchar(); |
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| 325 | if (c != '\n') { |
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| 326 | c2 = uart_getchar(); |
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| 327 | if (c == '1') { |
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| 328 | if (c2 == '0') |
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| 329 | RL1 = 0; |
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| 330 | else if (c2 == '1') |
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| 331 | RL1 = 1; |
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| 332 | else |
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| 333 | err = 1; |
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| 334 | } else if (c == '2') { |
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| 335 | if (c2 == '0') |
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| 336 | RL2 = 0; |
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| 337 | else if (c2 == '1') |
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| 338 | RL2 = 1; |
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| 339 | else |
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| 340 | err = 1; |
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[1] | 341 | } else { |
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[11] | 342 | err = 1; |
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[1] | 343 | } |
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[11] | 344 | c = c2; |
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[1] | 345 | } |
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[11] | 346 | break; |
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| 347 | case 'S': |
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| 348 | printf("power %s RL %s %s SENSE %s GPIO 0x%x\n", |
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| 349 | PWRON ? "on" : "off", |
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| 350 | RL1 ? "on" : "off", |
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| 351 | RL2 ? "on" : "off", |
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| 352 | SENSE ? "off" : "on", |
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| 353 | PORTB); |
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| 354 | break; |
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| 355 | default: |
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| 356 | err = 1; |
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| 357 | break; |
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| 358 | } |
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| 359 | while (c != '\n') |
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| 360 | c = uart_getchar(); |
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| 361 | if (err) |
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| 362 | printf("\nERROR\n"); |
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| 363 | else if (ok) |
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| 364 | printf("\nOK\n"); |
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[1] | 365 | |
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[11] | 366 | if (softintrs & INT_RX1OF) { |
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| 367 | PIE1bits.RC1IE = 0; |
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| 368 | softintrs &= ~INT_RX1OF; |
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| 369 | softintrs &= ~INT_RX1; |
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| 370 | uart_rxbuf_prod = uart_rxbuf_cons = 0; |
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| 371 | PIE1bits.RC1IE = 1; |
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| 372 | } |
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| 373 | } |
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| 374 | |
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| 375 | static void |
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| 376 | printhex(unsigned char c) __wparam __naked |
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| 377 | { |
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| 378 | (void)c; |
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| 379 | __asm |
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| 380 | andlw 0x0f; |
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| 381 | sublw 9; |
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| 382 | bc decimal; |
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| 383 | sublw '@'; |
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| 384 | goto _uart_putchar_hard; |
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| 385 | decimal: |
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| 386 | sublw '9'; |
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| 387 | goto _uart_putchar_hard; |
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| 388 | __endasm; |
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| 389 | } |
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| 390 | |
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| 391 | static void |
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| 392 | do_measure() |
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| 393 | { |
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| 394 | softintrs &= ~INT_AD; |
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| 395 | adstatus = ADSTAT_MEASURE; |
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| 396 | ADCON0bits.CHS = 0; |
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| 397 | |
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| 398 | LEDR = 0; |
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| 399 | LEDG = 1; |
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| 400 | UART_FLUSH(); |
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| 401 | uart_putchar_hard('X'); |
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| 402 | while (status & STAT_MEASURE) { |
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| 403 | CLRWDT; |
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| 404 | if (softintrs & INT_AD) { |
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| 405 | if (ad_channel == 0) { |
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| 406 | printhex(PORTB >> 4); |
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| 407 | printhex(PORTB); |
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| 408 | printhex(ad_resh); |
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| 409 | printhex(ad_resl >> 4); |
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| 410 | printhex(ad_resl); |
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| 411 | } else { |
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| 412 | printhex(ad_resh); |
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| 413 | printhex(ad_resl >> 4); |
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| 414 | printhex(ad_resl); |
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| 415 | uart_putchar_hard('X'); |
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| 416 | } |
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| 417 | softintrs &= ~INT_AD; |
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[1] | 418 | } |
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[11] | 419 | if (softintrs & INT_RX1) { |
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| 420 | parse_rx(); |
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| 421 | } else { |
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| 422 | SLEEP; |
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| 423 | } |
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| 424 | } |
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| 425 | adstatus = 0; |
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| 426 | printf("\nOK\n"); |
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| 427 | } |
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[1] | 428 | |
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[11] | 429 | static void |
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| 430 | do_console() |
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| 431 | { |
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| 432 | char previous_rx1 = 0; |
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| 433 | char c; |
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| 434 | char more_work = 0; |
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[1] | 435 | |
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[11] | 436 | printf("connecting to console - exit with #.\n"); |
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| 437 | /* clear buffer */ |
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| 438 | PIE3bits.RC2IE = 0; |
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| 439 | uart2_rxbuf_prod = uart2_rxbuf_cons = 0; |
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| 440 | PIE3bits.RC2IE = 1; |
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| 441 | RCSTA2bits.SPEN = 1; |
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| 442 | while ((status & STAT_CONSOLE) || more_work) { |
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| 443 | CLRWDT; |
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| 444 | more_work = 0; |
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| 445 | if (softintrs & INT_10HZ) { |
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| 446 | softintrs &= ~INT_10HZ; |
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| 447 | LEDG ^= 1; |
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| 448 | } |
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| 449 | if (uart_rxbuf_cons != uart_rxbuf_prod) { |
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| 450 | c = uart_getchar(); |
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| 451 | /* |
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| 452 | * #. exits console mode |
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| 453 | * ## sends # |
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| 454 | * anything else send both char unmodified |
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| 455 | */ |
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| 456 | if (previous_rx1 == '#') { |
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| 457 | if (c == '.') { |
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| 458 | status = STAT_WAIT; |
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| 459 | } else if (c == '#') { |
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| 460 | uart2_putchar_raw(c); |
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| 461 | } else { |
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| 462 | uart2_putchar_raw(previous_rx1); |
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| 463 | uart2_putchar_raw(c); |
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| 464 | } |
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| 465 | } else { |
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| 466 | uart2_putchar_raw(c); |
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| 467 | } |
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| 468 | previous_rx1 = c; |
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| 469 | more_work = 1; |
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| 470 | } |
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| 471 | if (uart2_rxbuf_cons != uart2_rxbuf_prod) { |
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| 472 | c = uart2_getchar(); |
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| 473 | uart_putchar_raw(c); |
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| 474 | more_work = 1; |
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| 475 | } |
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| 476 | if (more_work == 0 && (status & STAT_CONSOLE)) |
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| 477 | SLEEP; |
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[1] | 478 | } |
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[11] | 479 | RCSTA2bits.SPEN = 0; |
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| 480 | printf("exit from console\n"); |
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| 481 | } |
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[1] | 482 | |
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[11] | 483 | static void |
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| 484 | do_write(void) |
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| 485 | { |
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| 486 | EECON2 = 0x55; |
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| 487 | EECON2 = 0xaa; |
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| 488 | EECON1bits.WR = 1; |
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| 489 | while (EECON1bits.WR) |
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| 490 | ; /* wait */ |
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| 491 | } |
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[1] | 492 | |
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[11] | 493 | static void |
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| 494 | do_cal_data() |
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| 495 | { |
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| 496 | char i = 0; |
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| 497 | char err = 0; |
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| 498 | char c; |
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| 499 | |
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| 500 | c = uart_getchar(); |
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| 501 | while (c != '\n') { |
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| 502 | if ((c < '0' || c > '9') && c != ' ' && c != '.') { |
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| 503 | printf("cal error at %c (%d)\n", c, i); |
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| 504 | err = 1; |
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| 505 | } |
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| 506 | if (i > 82) { |
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| 507 | printf("cal error at %c (%d)\n", c, i); |
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| 508 | err = 1; |
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| 509 | } else { |
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| 510 | buf[i] = c; |
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| 511 | i++; |
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| 512 | } |
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| 513 | c = uart_getchar(); |
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[1] | 514 | } |
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[11] | 515 | if (err == 0 && i != 0 && i != 83) { |
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| 516 | printf("cal error: %d\n", i); |
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| 517 | } else if (err == 0 && i != 0) { |
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| 518 | /* erase 1k block */ |
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| 519 | INTCONbits.GIE_GIEH=0; /* disable interrupts */ |
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| 520 | INTCONbits.PEIE_GIEL=0; |
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| 521 | TBLPTRU = ((long)cal_data >> 16) & 0xff; |
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| 522 | TBLPTRH = ((long)cal_data >> 8) & 0xff; |
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| 523 | TBLPTRL = (long)cal_data & 0xff; |
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| 524 | EECON1 = 0x14; /* enable write+erase */ |
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| 525 | do_write(); |
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| 526 | EECON1 = 0x00; /* disable write */ |
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| 527 | for (i = 0; i < 83; i++) { |
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| 528 | TABLAT = buf[i]; |
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| 529 | __asm__("tblwt*+"); |
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| 530 | if (i == 63) { |
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| 531 | __asm__("tblrd*-"); |
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| 532 | EECON1 = 0x04; /* enable write */ |
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| 533 | do_write(); |
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| 534 | EECON1 = 0x00; /* disable write */ |
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| 535 | __asm__("tblrd*+"); |
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| 536 | } |
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| 537 | } |
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| 538 | __asm__("tblrd*-"); |
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| 539 | EECON1 = 0x04; /* enable write */ |
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| 540 | do_write(); |
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| 541 | EECON1 = 0x00; /* disable write */ |
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| 542 | INTCONbits.PEIE_GIEL=1; |
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| 543 | INTCONbits.GIE_GIEH=1; /* enable interrupts */ |
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| 544 | } |
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| 545 | printf("cal_data "); |
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| 546 | TBLPTRU = ((long)cal_data >> 16) & 0xff; |
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| 547 | TBLPTRH = ((long)cal_data >> 8) & 0xff; |
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| 548 | TBLPTRL = (long)cal_data & 0xff; |
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| 549 | EECON1 = 0x00; /* disable writes */ |
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| 550 | for (i = 0; i < 83; i++) { |
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| 551 | __asm__("tblrd*+"); |
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| 552 | putchar(TABLAT); |
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| 553 | } |
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| 554 | printf("\n"); |
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[1] | 555 | } |
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| 556 | |
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[11] | 557 | unsigned short |
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[1] | 558 | timer0_read() __naked |
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| 559 | { |
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| 560 | /* return TMR0L | (TMR0H << 8), reading TMR0L first */ |
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| 561 | __asm |
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| 562 | movf _TMR0L, w |
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| 563 | movff _TMR0H, _PRODL |
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| 564 | return |
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| 565 | __endasm; |
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| 566 | } |
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| 567 | |
---|
| 568 | /* Vectors */ |
---|
| 569 | void _reset (void) __naked __interrupt 0 |
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| 570 | { |
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| 571 | __asm__("goto __startup"); |
---|
| 572 | } |
---|
| 573 | |
---|
| 574 | |
---|
| 575 | void _startup (void) __naked |
---|
| 576 | { |
---|
| 577 | |
---|
| 578 | __asm |
---|
| 579 | // Initialize the stack pointer |
---|
| 580 | lfsr 1, _stack_end |
---|
| 581 | lfsr 2, _stack_end |
---|
| 582 | clrf _TBLPTRU, 0 // 1st silicon doesn't do this on POR |
---|
| 583 | |
---|
| 584 | // initialize the flash memory access configuration. this is harmless |
---|
| 585 | // for non-flash devices, so we do it on all parts. |
---|
| 586 | bsf _EECON1, 7, 0 |
---|
| 587 | bcf _EECON1, 6, 0 |
---|
| 588 | __endasm ; |
---|
| 589 | |
---|
| 590 | /* Call the user's main routine */ |
---|
| 591 | main(); |
---|
| 592 | __asm__("reset"); |
---|
| 593 | } |
---|
| 594 | |
---|
| 595 | /* |
---|
| 596 | * high priority interrupt. Split in 2 parts; one for the entry point |
---|
| 597 | * where we'll deal with timer0, then jump to another address |
---|
| 598 | * as we don't have enough space before the low priority vector |
---|
| 599 | */ |
---|
| 600 | void _irqh (void) __naked __shadowregs __interrupt 1 |
---|
| 601 | { |
---|
| 602 | __asm |
---|
| 603 | bcf _PIR1, 1 |
---|
| 604 | goto _irqh_timer2 |
---|
| 605 | __endasm ; |
---|
| 606 | |
---|
| 607 | } |
---|
| 608 | |
---|
| 609 | void irqh_timer2(void) __naked |
---|
| 610 | { |
---|
| 611 | /* |
---|
| 612 | * no sdcc registers are automatically saved, |
---|
| 613 | * so we have to be carefull with C code ! |
---|
| 614 | */ |
---|
| 615 | counter_10hz--; |
---|
| 616 | if (counter_10hz == 0) { |
---|
| 617 | counter_10hz = TIMER2_10HZ; |
---|
| 618 | softintrs |= INT_10HZ; |
---|
| 619 | } |
---|
[11] | 620 | if (adstatus & ADSTAT_MEASURE) { |
---|
| 621 | if (PIR1bits.ADIF) { |
---|
| 622 | LEDR = 1; |
---|
| 623 | } |
---|
| 624 | ADCON0bits.GO_NOT_DONE = 1; |
---|
[1] | 625 | } |
---|
| 626 | __asm |
---|
| 627 | retfie 1 |
---|
| 628 | nop |
---|
| 629 | __endasm; |
---|
| 630 | } |
---|
| 631 | |
---|
| 632 | void _irq (void) __interrupt 2 /* low priority */ |
---|
| 633 | { |
---|
| 634 | USART_INTR; |
---|
[11] | 635 | USART2_INTR; |
---|
[1] | 636 | if (PIE1bits.ADIE && PIR1bits.ADIF) { |
---|
[11] | 637 | if (softintrs & INT_AD) { |
---|
| 638 | LEDR = 1; |
---|
| 639 | } |
---|
| 640 | ad_channel = ADCON0bits.CHS; |
---|
| 641 | ad_resl = ADRESL; |
---|
| 642 | ad_resh = ADRESH; |
---|
| 643 | /* |
---|
| 644 | * needs 2Tac, or 32 instrutions |
---|
| 645 | * before next sample. assume we'll |
---|
| 646 | * have them at timer2 interrupt |
---|
| 647 | */ |
---|
| 648 | if (ad_channel == 0) |
---|
| 649 | ADCON0bits.CHS = 1; |
---|
| 650 | else |
---|
| 651 | ADCON0bits.CHS = 0; |
---|
[1] | 652 | PIR1bits.ADIF = 0; |
---|
| 653 | softintrs |= INT_AD; |
---|
| 654 | } |
---|
| 655 | } |
---|