1 | #include "processor.h" |
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2 | #include "l1cache.h" |
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3 | #include "address.h" |
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4 | #include "raw_address.h" |
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5 | #include "monitor.h" |
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6 | #include "cache_store.h" |
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7 | #define TAILLE_LIGNE 8 |
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8 | |
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9 | int sc_main(int argc, char **argv) |
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10 | { |
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11 | if (argc != 2) { |
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12 | cout << "usage : " << argv[0] << " filename" << endl; |
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13 | exit(0); |
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14 | } |
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15 | |
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16 | sc_clock clock("Clock", 1,SC_NS); |
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17 | |
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18 | sc_signal<RawAddress> request; |
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19 | sc_signal<RawAddress> answer; |
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20 | |
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21 | sc_signal<bool> l1_activate; |
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22 | sc_signal<bool> proc_activate; |
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23 | |
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24 | sc_signal<bool> l1miss_info; |
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25 | sc_signal<bool> l1hit_info; |
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26 | |
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27 | sc_signal<bool> make_report; |
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28 | |
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29 | Processor processor("Processor", argv[1]); |
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30 | L1Cache l1cache("L1Cache", 256, TAILLE_LIGNE, FULLY_ASSOCIATIVE, 2); |
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31 | Monitor monitor("Monitor"); |
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32 | |
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33 | processor.clock(clock); |
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34 | l1cache.clock(clock); |
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35 | monitor.clock(clock); |
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36 | |
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37 | l1cache.in_activate(l1_activate); |
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38 | processor.out_activate(l1_activate); |
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39 | |
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40 | l1cache.out_activate(proc_activate); |
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41 | processor.in_activate(proc_activate); |
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42 | |
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43 | processor.out_data(request); |
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44 | l1cache.in_data(request); |
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45 | |
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46 | processor.in_data(answer); |
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47 | l1cache.out_data(answer); |
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48 | |
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49 | |
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50 | processor.simulation_terminate(make_report); |
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51 | monitor.activate(make_report); |
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52 | |
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53 | l1cache.hit_info(l1hit_info); |
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54 | monitor.l1hit_signal(l1hit_info); |
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55 | |
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56 | l1cache.miss_info(l1miss_info); |
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57 | monitor.l1miss_signal(l1miss_info); |
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58 | |
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59 | |
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60 | |
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61 | sc_start(1000, SC_NS); |
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62 | return 0; |
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63 | } |
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