source: PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v0.01/MPI_CORE_COMPONENTS.gise @ 39

Last change on this file since 39 was 39, checked in by rolagamo, 12 years ago
File size: 15.1 KB
Line 
1<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
2<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
3
4  <!--                                                          -->
5
6  <!--             For tool use only. Do not edit.              -->
7
8  <!--                                                          -->
9
10  <!-- ProjectNavigator created generated project file.         -->
11
12  <!-- For use in tracking generated file and other information -->
13
14  <!-- allowing preservation of process status.                 -->
15
16  <!--                                                          -->
17
18  <!-- Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved. -->
19
20  <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
21
22  <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="MPI_CORE_COMPONENTS.xise"/>
23
24  <files xmlns="http://www.xilinx.com/XMLSchema">
25    <file xil_pn:fileType="FILE_NCD" xil_pn:name="CORE_MPI_guide.ncd" xil_pn:origination="imported"/>
26    <file xil_pn:fileType="FILE_NCD" xil_pn:name="DMA_ARBITER_guide.ncd" xil_pn:origination="imported"/>
27    <file xil_pn:fileType="FILE_NCD" xil_pn:name="EX4_FSM_guide.ncd" xil_pn:origination="imported"/>
28    <file xil_pn:fileType="FILE_NCD" xil_pn:name="MPICORETEST_guide.ncd" xil_pn:origination="imported"/>
29    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="MPI_NOC.sym" xil_pn:origination="imported"/>
30    <file xil_pn:fileType="FILE_NCD" xil_pn:name="MPI_NOC_guide.ncd" xil_pn:origination="imported"/>
31    <file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="MultiMPITest.cmd_log"/>
32    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="MultiMPITest.lso"/>
33    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="MultiMPITest.prj"/>
34    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="MultiMPITest.syr"/>
35    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="MultiMPITest.xst"/>
36    <file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="MultiMPITest_beh.prj"/>
37    <file xil_pn:fileType="FILE_NCD" xil_pn:name="MultiMPITest_guide.ncd" xil_pn:origination="imported"/>
38    <file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="MultiMPITest_isim_beh.exe"/>
39    <file xil_pn:fileType="FILE_ISIM_MISC" xil_pn:name="MultiMPITest_isim_beh.wdb"/>
40    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="MultiMPITest_stx_beh.prj"/>
41    <file xil_pn:fileType="FILE_HTML" xil_pn:name="MultiMPITest_summary.html"/>
42    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="MultiMPITest_xst.xrpt"/>
43    <file xil_pn:fileType="FILE_NCD" xil_pn:name="SWITCH_GEN_guide.ncd" xil_pn:origination="imported"/>
44    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
45    <file xil_pn:fileType="FILE_LOG" xil_pn:name="fuse.log"/>
46    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="isim"/>
47    <file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_CMD" xil_pn:name="isim.cmd"/>
48    <file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_LOG" xil_pn:name="isim.log"/>
49    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
50    <file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_INI" xil_pn:name="xilinxsim.ini"/>
51    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
52  </files>
53
54  <transforms xmlns="http://www.xilinx.com/XMLSchema">
55    <transform xil_pn:end_ts="1354677003" xil_pn:name="TRAN_copyInitialToAbstractSimulation" xil_pn:start_ts="1354677003">
56      <status xil_pn:value="SuccessfullyRun"/>
57      <status xil_pn:value="ReadyToRun"/>
58    </transform>
59    <transform xil_pn:end_ts="1354875772" xil_pn:in_ck="-6104420166436042342" xil_pn:name="TRAN_copyAbstractToPostAbstractSimulation" xil_pn:start_ts="1354875772">
60      <status xil_pn:value="SuccessfullyRun"/>
61      <status xil_pn:value="ReadyToRun"/>
62      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Arbiter.vhd"/>
63      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/CoreTypes.vhd"/>
64      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Crossbar.vhd"/>
65      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Crossbit.vhd"/>
66      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/FIFO_256_FWFT.vhd"/>
67      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/INPUT_PORT_MODULE.vhd"/>
68      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/OUTPUT_PORT_MODULE.vhd"/>
69      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Proto_receiv.vhd"/>
70      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/RAM_256.vhd"/>
71      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER12_12.VHD"/>
72      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER13_13.VHD"/>
73      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER14_14.VHD"/>
74      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER15_15.VHD"/>
75      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER16_16.VHD"/>
76      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER2_2.VHD"/>
77      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER3_3.VHD"/>
78      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER4_4.VHD"/>
79      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER5_5.VHD"/>
80      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER6_6.VHD"/>
81      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER7_7.VHD"/>
82      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER8_8.VHD"/>
83      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SWITCH_GEN.vhd"/>
84      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Scheduler.vhd"/>
85      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/proto_send.vhd"/>
86      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/stimuli1.vhd"/>
87      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/test_xbar_8x8.vhd"/>
88      <outfile xil_pn:name="CORE_MPI.vhd"/>
89      <outfile xil_pn:name="DEMUX1.vhd"/>
90      <outfile xil_pn:name="DMA_ARBITER.vhd"/>
91      <outfile xil_pn:name="EX1_FSM.vhd"/>
92      <outfile xil_pn:name="EX2_FSM.vhd"/>
93      <outfile xil_pn:name="EX3_FSM.vhd"/>
94      <outfile xil_pn:name="EX4_FSM.vhd"/>
95      <outfile xil_pn:name="Ex0_Fsm.vhd"/>
96      <outfile xil_pn:name="FIFO_64_FWFT.vhd"/>
97      <outfile xil_pn:name="FIfo_mem.vhd"/>
98      <outfile xil_pn:name="FIfo_proc.vhd"/>
99      <outfile xil_pn:name="MPICORETEST.vhd"/>
100      <outfile xil_pn:name="MPI_CORE_SCHEDULER.vhd"/>
101      <outfile xil_pn:name="MPI_NOC.vhd"/>
102      <outfile xil_pn:name="MPI_PKG.vhd"/>
103      <outfile xil_pn:name="MPI_RMA.vhd"/>
104      <outfile xil_pn:name="MUX1.vhd"/>
105      <outfile xil_pn:name="MUX8.vhd"/>
106      <outfile xil_pn:name="MultiMPITest.vhd"/>
107      <outfile xil_pn:name="PE.vhd"/>
108      <outfile xil_pn:name="Packet_type.vhd"/>
109      <outfile xil_pn:name="RAM_32_32.vhd"/>
110      <outfile xil_pn:name="RAM_64.vhd"/>
111      <outfile xil_pn:name="image_pkg.vhd"/>
112      <outfile xil_pn:name="load_instr.vhd"/>
113      <outfile xil_pn:name="round_robbin_machine.vhd"/>
114      <outfile xil_pn:name="sim_fifo.vhd"/>
115    </transform>
116    <transform xil_pn:end_ts="1354793902" xil_pn:name="TRAN_xawsToSimhdl" xil_pn:prop_ck="-8804766714685316537" xil_pn:start_ts="1354793902">
117      <status xil_pn:value="SuccessfullyRun"/>
118      <status xil_pn:value="ReadyToRun"/>
119    </transform>
120    <transform xil_pn:end_ts="1354793902" xil_pn:name="TRAN_schematicsToHdlSim" xil_pn:prop_ck="225563001328936133" xil_pn:start_ts="1354793902">
121      <status xil_pn:value="SuccessfullyRun"/>
122      <status xil_pn:value="ReadyToRun"/>
123    </transform>
124    <transform xil_pn:end_ts="1354677003" xil_pn:name="TRAN_regenerateCoresSim" xil_pn:prop_ck="8414388184515446556" xil_pn:start_ts="1354677003">
125      <status xil_pn:value="SuccessfullyRun"/>
126      <status xil_pn:value="ReadyToRun"/>
127    </transform>
128    <transform xil_pn:end_ts="1354875772" xil_pn:in_ck="-6104420166436042342" xil_pn:name="TRAN_copyPostAbstractToPreSimulation" xil_pn:start_ts="1354875772">
129      <status xil_pn:value="SuccessfullyRun"/>
130      <status xil_pn:value="ReadyToRun"/>
131      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Arbiter.vhd"/>
132      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/CoreTypes.vhd"/>
133      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Crossbar.vhd"/>
134      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Crossbit.vhd"/>
135      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/FIFO_256_FWFT.vhd"/>
136      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/INPUT_PORT_MODULE.vhd"/>
137      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/OUTPUT_PORT_MODULE.vhd"/>
138      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Proto_receiv.vhd"/>
139      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/RAM_256.vhd"/>
140      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER12_12.VHD"/>
141      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER13_13.VHD"/>
142      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER14_14.VHD"/>
143      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER15_15.VHD"/>
144      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER16_16.VHD"/>
145      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER2_2.VHD"/>
146      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER3_3.VHD"/>
147      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER4_4.VHD"/>
148      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER5_5.VHD"/>
149      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER6_6.VHD"/>
150      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER7_7.VHD"/>
151      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SCHEDULER8_8.VHD"/>
152      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/SWITCH_GEN.vhd"/>
153      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/Scheduler.vhd"/>
154      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/proto_send.vhd"/>
155      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/stimuli1.vhd"/>
156      <outfile xil_pn:name="../SWITCH_GENERIC_16_16/test_xbar_8x8.vhd"/>
157      <outfile xil_pn:name="CORE_MPI.vhd"/>
158      <outfile xil_pn:name="DEMUX1.vhd"/>
159      <outfile xil_pn:name="DMA_ARBITER.vhd"/>
160      <outfile xil_pn:name="EX1_FSM.vhd"/>
161      <outfile xil_pn:name="EX2_FSM.vhd"/>
162      <outfile xil_pn:name="EX3_FSM.vhd"/>
163      <outfile xil_pn:name="EX4_FSM.vhd"/>
164      <outfile xil_pn:name="Ex0_Fsm.vhd"/>
165      <outfile xil_pn:name="FIFO_64_FWFT.vhd"/>
166      <outfile xil_pn:name="FIfo_mem.vhd"/>
167      <outfile xil_pn:name="FIfo_proc.vhd"/>
168      <outfile xil_pn:name="MPICORETEST.vhd"/>
169      <outfile xil_pn:name="MPI_CORE_SCHEDULER.vhd"/>
170      <outfile xil_pn:name="MPI_NOC.vhd"/>
171      <outfile xil_pn:name="MPI_PKG.vhd"/>
172      <outfile xil_pn:name="MPI_RMA.vhd"/>
173      <outfile xil_pn:name="MUX1.vhd"/>
174      <outfile xil_pn:name="MUX8.vhd"/>
175      <outfile xil_pn:name="MultiMPITest.vhd"/>
176      <outfile xil_pn:name="PE.vhd"/>
177      <outfile xil_pn:name="Packet_type.vhd"/>
178      <outfile xil_pn:name="RAM_32_32.vhd"/>
179      <outfile xil_pn:name="RAM_64.vhd"/>
180      <outfile xil_pn:name="image_pkg.vhd"/>
181      <outfile xil_pn:name="load_instr.vhd"/>
182      <outfile xil_pn:name="round_robbin_machine.vhd"/>
183      <outfile xil_pn:name="sim_fifo.vhd"/>
184    </transform>
185    <transform xil_pn:end_ts="1354875803" xil_pn:in_ck="-6104420166436042342" xil_pn:name="TRAN_ISimulateBehavioralModelRunFuse" xil_pn:prop_ck="-69836859381131890" xil_pn:start_ts="1354875772">
186      <status xil_pn:value="SuccessfullyRun"/>
187      <status xil_pn:value="ReadyToRun"/>
188      <outfile xil_pn:name="MultiMPITest_beh.prj"/>
189      <outfile xil_pn:name="MultiMPITest_isim_beh.exe"/>
190      <outfile xil_pn:name="fuse.log"/>
191      <outfile xil_pn:name="isim"/>
192      <outfile xil_pn:name="isim.log"/>
193      <outfile xil_pn:name="xilinxsim.ini"/>
194    </transform>
195    <transform xil_pn:end_ts="1354875805" xil_pn:in_ck="2770422429889795360" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="4736240422826914561" xil_pn:start_ts="1354875803">
196      <status xil_pn:value="SuccessfullyRun"/>
197      <status xil_pn:value="ReadyToRun"/>
198      <outfile xil_pn:name="MultiMPITest_isim_beh.wdb"/>
199      <outfile xil_pn:name="isim.cmd"/>
200      <outfile xil_pn:name="isim.log"/>
201    </transform>
202    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1354714616">
203      <status xil_pn:value="SuccessfullyRun"/>
204      <status xil_pn:value="ReadyToRun"/>
205    </transform>
206    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-1582102620978348987" xil_pn:start_ts="1354714616">
207      <status xil_pn:value="SuccessfullyRun"/>
208      <status xil_pn:value="ReadyToRun"/>
209    </transform>
210    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="8414388184515446556" xil_pn:start_ts="1354714616">
211      <status xil_pn:value="SuccessfullyRun"/>
212      <status xil_pn:value="ReadyToRun"/>
213    </transform>
214    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1354714616">
215      <status xil_pn:value="SuccessfullyRun"/>
216      <status xil_pn:value="ReadyToRun"/>
217    </transform>
218    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-8804766714685316537" xil_pn:start_ts="1354714616">
219      <status xil_pn:value="SuccessfullyRun"/>
220      <status xil_pn:value="ReadyToRun"/>
221    </transform>
222    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="7424531393529279708" xil_pn:start_ts="1354714616">
223      <status xil_pn:value="SuccessfullyRun"/>
224      <status xil_pn:value="ReadyToRun"/>
225    </transform>
226    <transform xil_pn:end_ts="1354714616" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="2970117682751773030" xil_pn:start_ts="1354714616">
227      <status xil_pn:value="SuccessfullyRun"/>
228      <status xil_pn:value="ReadyToRun"/>
229    </transform>
230    <transform xil_pn:end_ts="1354714645" xil_pn:in_ck="8953937964106919530" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="5642850437041008532" xil_pn:start_ts="1354714616">
231      <status xil_pn:value="FailedRun"/>
232      <status xil_pn:value="ReadyToRun"/>
233      <status xil_pn:value="OutOfDateForInputs"/>
234      <status xil_pn:value="OutOfDateForOutputs"/>
235      <status xil_pn:value="InputChanged"/>
236      <status xil_pn:value="OutputChanged"/>
237      <status xil_pn:value="OutputRemoved"/>
238      <outfile xil_pn:name="MultiMPITest.lso"/>
239      <outfile xil_pn:name="MultiMPITest.prj"/>
240      <outfile xil_pn:name="MultiMPITest.syr"/>
241      <outfile xil_pn:name="MultiMPITest.xst"/>
242      <outfile xil_pn:name="MultiMPITest_stx_beh.prj"/>
243      <outfile xil_pn:name="MultiMPITest_xst.xrpt"/>
244      <outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
245      <outfile xil_pn:name="webtalk_pn.xml"/>
246      <outfile xil_pn:name="xst"/>
247    </transform>
248    <transform xil_pn:end_ts="1354714645" xil_pn:in_ck="5944890944412384878" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-4542759591300251492" xil_pn:start_ts="1354714645">
249      <status xil_pn:value="SuccessfullyRun"/>
250      <status xil_pn:value="ReadyToRun"/>
251    </transform>
252  </transforms>
253
254</generated_project>
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