source: PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v0.02/round_robbin_machine.vhi @ 37

-- VHDL Instantiation Created from source file round_robbin_machine.vhd -- 12:29:24 06/13/2011
--
-- Notes: 
-- 1) This instantiation template has been automatically generated using types
-- std_logic and std_logic_vector for the ports of the instantiated module
-- 2) To use this template to instantiate this entity, cut-and-paste and then edit

        COMPONENT round_robbin_machine
        PORT(
                get_request_fifo_empty : IN std_logic;
                instruction_fifo_empty : IN std_logic;
                priority_rotation : IN std_logic;
                clk : IN std_logic;
                reset : IN std_logic;          
                fifo_selected : OUT std_logic;
                instruction_available : OUT std_logic;
                mux_sel : OUT std_logic
                );
        END COMPONENT;

        Inst_round_robbin_machine: round_robbin_machine PORT MAP(
                get_request_fifo_empty => ,
                instruction_fifo_empty => ,
                priority_rotation => ,
                clk => ,
                fifo_selected => ,
                instruction_available => ,
                reset => ,
                mux_sel => 
        );