source: PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/EX3_FSM.vhd

Last change on this file was 74, checked in by rolagamo, 11 years ago
File size: 2.1 KB
Line 
1----------------------------------------------------------------------------------
2-- Company:
3-- Engineer: GAMOM / KIEGAING
4--
5-- Create Date:    09:22:58 05/20/2011
6-- Design Name:
7-- Module Name:    EX3_FSM - Behavioral
8-- Project Name:
9-- Target Devices:
10-- Tool versions:
11-- Description:
12-- module du core mpi chargé d'exécuter les fonctions mpi_get_size et mpi_get_rank
13-- Dependencies:
14--
15-- Revision: 23/02/2012
16-- Revision 0.02 - File Created
17-- Additional Comments:
18--
19----------------------------------------------------------------------------------
20library IEEE;
21--package Packet_type
22use IEEE.STD_LOGIC_1164.ALL;
23use IEEE.STD_LOGIC_ARITH.ALL;
24use IEEE.STD_LOGIC_UNSIGNED.ALL;
25use Work.Packet_type.ALL;
26Library NocLib;
27use NocLib.CoreTypes.all;
28---- Uncomment the following library declaration if instantiating
29---- any Xilinx primitives in this code.
30--library UNISIM;
31--use UNISIM.VComponents.all;
32
33entity EX3_FSM is
34 generic (
35                                pid : unsigned(Word-1 downto 0) :=  "00000001"; -- id du processeur
36                                nprocs : unsigned(Word-1 downto 0):="00000011"-- nombre de processeur du MPSOC
37                        );
38    Port ( instruction : in  STD_LOGIC_VECTOR (Word-1 downto 0);
39           ResOut : out  STD_LOGIC_VECTOR (Word-1 downto 0);
40                          pid_nprocs: out  STD_LOGIC_VECTOR (Word-1 downto 0);
41           clk : in  STD_LOGIC;
42                          IsMain: in STD_LOGIC;
43           reset : in  STD_LOGIC);
44end EX3_FSM;
45
46
47architecture Behavioral of EX3_FSM is
48
49signal instruction_signal : std_logic_vector(3 downto 0);
50signal rank : unsigned(Word-1 downto 0) := pid;
51signal size : unsigned(Word-1 downto 0) := nprocs;
52begin
53instruction_signal <= instruction(7 downto 4);
54ex3_fsm_process : process(clk)
55begin
56
57
58if rising_edge(clk) then
59 if reset ='1' then
60   ResOut <= (others=>'0');
61 else
62  if instruction_signal = MPI_GET_RANK then
63   ResOut <=  std_logic_vector(rank);
64  elsif instruction_signal = MPI_GET_SIZE then
65   ResOut <=  std_logic_vector(size);
66        elsif instruction_signal=MPI_INIT then
67        if IsMain='1' then  --master est associé à la bibliothèque de rang 0
68        rank<=rank+1;    -- elle est responsable d'affecter de nouveaux rangs
69        end if;
70 end if;
71 end if; 
72end if;
73end process;
74end Behavioral;
75
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