Context Navigation

HT_5.vhd

Last change on this file was 76, checked in by rolagamo, 12 years ago

File size: 15.5 KB

Line
1	----------------------------------------------------------------------------------
2	-- Company:
3	-- Engineer:
4	--
5	-- Create Date: 12:04:21 04/22/2013
6	-- Design Name:
7	-- Module Name: HT_process - Behavioral
8	-- Project Name:
9	-- Target Devices:
10	-- Tool versions:
11	-- Description:
12	--
13	-- Dependencies:
14	--
15	-- Revision:
16	-- Revision 0.01 - File Created
17	-- Additional Comments:
18	--
19	----------------------------------------------------------------------------------
20	library IEEE;
21	use IEEE.STD_LOGIC_1164.ALL;
22	USE ieee.numeric_std.ALL;
23	library NocLib ;
24	use std.textio.all;
25	use NocLib.CoreTypes.all;
26	use work.Packet_type.all;
27	use work.MPI_RMA.all;
28	-- Uncomment the following library declaration if using
29	-- arithmetic functions with Signed or Unsigned values
30	--use IEEE.NUMERIC_STD.ALL;
31
32
33
34	architecture A_Count of HT_process is
35
36	type typ_mae is (start,Fillmem,NextFill,InitApp,GetRank,WInCreate,WinPost,WinStart,
37	putdata,getdata,WinWait,WinCompleted,MpiSpawn,finalize,st_timeout);
38	signal sram : typ_dpram;
39	signal MyGroup:mpi_group;
40	signal MyWin : mpi_win;
41	signal MyRank :std_logic_vector(3 downto 0);
42	signal intercomm,array_of_errcodes : natural;
43	signal ct_state:natural:=0;
44	signal Libr : Core_io; --regroupe tous les signaux IO de la bibliothèque
45	signal RunState : typ_mae;
46	component count_32 is
47	port (clk,reset,upDn,load,start:in std_logic;
48	loadval :in std_logic_vector(31 downto 0);
49	outval : out std_logic_vector(31 downto 0));
50	end component count_32;
51	signal rescount,updn,load,start :std_logic:='0';
52	signal loadval,outval :std_logic_vector(31 downto 0):=(others=>'0');
53
54	begin
55
56	--MAE du PE
57	--=======================================================================
58	-- Interf<=Libr;
59
60
61	pPutGet:process(clk,reset,en)
62
63	constant DATAPTR : natural :=256;
64	variable nb_rma:natural range 0 to 15:=0;
65	variable bfill,destrank,pid,mport : natural range 0 to 15;
66	variable fsrc,ret : natural range 0 to 15:=0;
67	variable timeout,ct,dlen,dcount : natural range 0 to 255;
68	variable adrToset,SrcAdr,DestAdr : std_logic_vector(ADRLEN-1 downto 0);
69	variable mywin : Mpi_win;
70	variable command , argv , maxprocs , info , root : natural:=0; --variable pour le spawn
71	variable comm : natural :=0;
72	variable Spawn_on: std_logic:='0';
73	variable adresse,adresse_rd :natural range 0 to 65536;
74	variable status_reg,config_reg :std_logic_vector(Word-1 downto 0):=(others=>'0');
75
76	--=======================================================
77	--variables pour la création du fichier de résultats
78	-- synthesis translate_off
79	type char_file is file of character;
80	file f: text;
81	variable status :file_open_status ;
82	variable char_count: integer range 0 to 65536 := 0;
83	variable str: string (1 to 79) ;
84	variable L: line;
85	variable fopened: std_logic:='0';
86
87	constant simres : time :=1 ps; --simulation resolution
88	constant realres : real :=1.0e-3; --ramener le temps en ns
89	-- returns real value of time parameter using pure VHDL
90	function rt(t : time) return real is
91	begin
92	return real(t/simres) * realres;
93	end;
94	-- synthesis translate_on
95	--======================================================
96	begin
97	--=== Partie combinatoire du process ===================================
98
99	--=== Fin de la partie combinatoire du process ==========================
100
101
102
103	--end loop;
104
105	if (clk'event and clk='1') and en='1' then
106
107
108	if reset='1' then
109	RunState<=start;
110
111	else
112	--==========================================================
113	--affectation des entrées sorties mémoires
114	sram.i.data_out<=mem_I.data_out;
115	mem_o.addr_wr<=sram.O.addr_wr;
116	mem_o.addr_rd<=sram.O.addr_rd ;
117	mem_o.we<=sram.O.we;
118	mem_o.ena<=sram.O.ena;
119	mem_o.enb<=sram.O.enb;
120	mem_o.data_in<=sram.O.data_in;
121	--affectation des entrées sorties MPI_HCL
122	Interf_o.Instr_EN<=Libr.O.instr_en;
123	Interf_o.Membusy<=Libr.O.MemBusy;
124	Interf_o.Instruction<=Libr.O.Instruction;
125	Libr.i.Instr_ack<=Interf_i.Instr_ack;
126	Libr.i.InitOk<=Interf_i.InitOk;
127	Libr.i.Hold_Req<=Interf_i.Hold_req;
128	Libr.I.Spawned<=Interf_i.Spawned;
129	--Libr.i.Hold_Ack<=Interf_i.Hold_Ack;
130	Libr.i.RamSel<=Interf_i.RamSel;
131	--ct_state<=ct; --pour débogage
132	--============================================================
133
134	case RunState is
135	when start =>
136	--Dcount<=0;
137	if bfill=0 then -- si le nombre de bloc de mémoire remplis est vide
138	RunState<=InitApp;
139	end if;
140	--Ram_busy<='0';
141	Libr.O.MemBusy<='0';
142	Libr.O.Instr_En<='0';
143
144	adresse:=10;--DATAPTR;
145
146	adresse_rd:=0;
147	timeout:=0;
148	--dcount<=0;
149	sram.O.we<='0';
150	sram.O.ena<='0';
151	sram.O.enb<='0';
152	-- synthesis translate_off
153	if fopened='0' then
154	file_open(status,f, integer'image(Task_Id) & "test_file0.txt", APPEND_MODE);
155	--while not endfile(c_file_handle) loop
156	--end if;
157
158	--write (l,string'("Ce fichier contient des resultats de la simulation ; ;" & " started at time ; " & time'image(now)));
159	--report l.all;
160	-- writeline (f, l) ;
161	fopened:='1';
162	end if;
163	-- synthesis translate_on
164	when ReadData1 =>
165	readmem(ct,libr,sram,x"0010",V);
166	if ct=0 then
167	reset_count<=v(0);
168	UpDn<=v(1);
169	Load<=v(2);
170	RunState<=ReadData2
171	end if;
172	when readData2 =>
173	readmem(ct,libr,sram,x"0011",loadval);
174	if ct=0 then
175	RunState<=WinCreate;
176
177	end if;
178
179	when InitApp =>
180	--code pour Init
181	dlen:=1;
182	if ct=0 then
183	-- synthesis translate_off
184	write (l,string'("Dlen;"& integer'image(dlen) & " ;INIT1 " & integer'image(Dlen)& "; " & image(MyRank) & "; started at ; " & real'image(rt(now))));
185
186	report l.all;
187	writeline (f, l) ;
188	-- synthesis translate_on
189	end if;
190	pMPI_Init(ct,Libr,Clk,SRam);
191
192	adresse:=to_integer(unsigned(sram.O.addr_wr));
193	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
194
195	--if Libr.InitOk='1' then
196	if ct=0 then
197	RunState<=GetRank;
198	-- synthesis translate_off
199	write (l,string'("Dlen;" & integer'image(Dlen) & ";INIT2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
200	report l.all;
201	writeline (f, l) ;
202	-- synthesis translate_on
203	end if;
204
205
206
207	when GetRank =>
208	if ct=0 then
209	-- synthesis translate_off
210	write (l,string'("Dlen;" & integer'image(Dlen)& ";Rank1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now))));
211	report l.all;
212	writeline (f, l) ;
213	-- synthesis translate_on
214	end if;
215	pMPI_Comm_rank(ct,Libr,sram,MPI_COMM_WORLD,MyRank);
216	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
217
218
219	if ct=0 then
220	RunState<=FillMem;
221	-- synthesis translate_off
222	write (l,string'("Dlen;" & integer'image(dlen) & ";Rank2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
223	report l.all;
224	writeline (f, l) ;
225	-- synthesis translate_on
226	end if;
227
228
229	when Wincreate => --par défaut la fenêtre 0 est utilisée !
230	case MyRank is
231	when x"0"=>
232	Mygroup.grp<=x"0002";-- rank 1
233	MyGroup.nb<=2;
234	destRank:=1;
235	DestAdr:=X"043F";
236	nb_rma:=1;
237	when x"1" =>
238	Mygroup.grp<=x"0000";-- rank 0
239	destRank:=0;
240	DestAdr:=X"043F";
241	when x"2" =>
242	Mygroup.grp<=x"0000";-- rank
243	destRank:=0;
244	DestAdr:=X"044F";
245	when x"3" =>
246	Mygroup.grp<=x"0000";-- rank
247	destRank:=0;
248	DestAdr:=X"045F";
249	when others => --cas des processus spawn
250	Mygroup.grp<=x"0000";-- rank 0
251	destRank:=0;
252	end case;
253	RunState<=WinPost;
254	when WinPost =>
255	if ct=0 then
256	-- synthesis translate_off
257	write (l,string'("Dlen;"& integer'image(dlen) & ";WPost1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now))));
258	report l.all;
259	writeline (f, l) ;
260	-- synthesis translate_on
261	end if;
262
263	pMPI_Win_Post(ct,Libr,sram,MyGroup,0,MyWin);
264
265	if ct=0 then
266	if spawn_on='1' then
267	RunState<=WinWait;
268	else
269	RunState<=WinStart;
270	end if;
271	-- synthesis translate_off
272	write (l,string'("Dlen;"& integer'image(dlen) & ";WPost2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
273	report l.all;
274	writeline (f, l) ;
275	-- synthesis translate_on
276	end if;
277
278	when WinStart =>
279	if ct=0 then
280	-- synthesis translate_off
281	write (l,string'("Dlen;" & integer'image(dlen) & ";WStart1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now))));
282	report l.all;
283	writeline (f, l) ;
284	-- synthesis translate_on
285	end if;
286	pMPI_Win_start(ct,Libr,sram,MyGroup,0,MyWin);
287	adresse:=to_integer(unsigned(sram.O.addr_wr));
288	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
289
290	dcount:=ct;
291
292	if ct=0 then
293	RunState<=PutData;
294	-- synthesis translate_off
295	write (l,string'("Dlen;" & integer'image(dlen) & ";WStart2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
296	report l.all;
297	writeline (f, l) ;
298	-- synthesis translate_on
299	end if;
300
301
302	when putdata => --construire le packet pour le Put
303
304	--dlen:=251; ---
305	if ct=0 then
306	-- synthesis translate_off
307	write (l,string'("Dlen;" & integer'image(dlen) & ";PUT1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now))));
308	report l.all;
309	writeline (f, l) ;
310	-- synthesis translate_on
311	end if;
312
313	SrcAdr:=X"000A";--std_logic_vector(to_unsigned(DATAPTR,ADRLEN));
314	--DestAdr:=X"033F";
315	pMPI_put(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win);
316
317	adresse:=to_integer(unsigned(sram.O.addr_wr));
318	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
319
320	dcount:=ct;
321
322	if ct=0 then
323	RunState<=GetData;
324	-- synthesis translate_off
325	report "Put of Process n°; " & image(MyRank) & "; ended at ; " & real'image(rt(now));
326	write (l,string'("Dlen;" & integer'image(dlen) & ";PUT2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at time ; " & real'image(rt(now))));
327	report l.all;
328	writeline (f, l) ;
329	-- synthesis translate_on
330	end if;
331
332
333	when getdata => --positionnement du mot de longueur des données
334	--dlen:=251; ---
335	if ct=0 then
336	-- synthesis translate_off
337	write (l,string'("Dlen;" & integer'image(dlen) & ";GET1; " & image(MyRank) & "; started at ; " & real'image(rt(now))));
338	report l.all;
339	writeline (f, l) ;
340	-- synthesis translate_on
341	end if;
342
343	SrcAdr:=X"006D";
344	DestAdr:=X"1400";
345	if unsigned(MyRank) = 0 then
346	pMPI_GET(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win);
347	else
348
349	--pMPI_GET(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,nb_rma,DestAdr,Dlen,Mpi_int,Default_win);
350	end if;
351	adresse:=to_integer(unsigned(sram.O.addr_wr));
352	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
353
354	dcount:=ct;
355
356	if ct=0 then
357	if unsigned(MyRank)/=0 then
358	RunState<=wincompleted;
359	else
360	nb_rma:=nb_rma+1;
361	if nb_rma=2 then
362	RunState<=wincompleted;
363	nb_rma:=0;
364	end if;
365	end if;
366	-- synthesis translate_off
367	assert ct/=0 report "GET_END " & integer'image(destrank)
368	severity Warning ;
369	write (l,string'("Dlen ;" & integer'image(dlen) & ";GET2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
370	report l.all;
371
372	writeline (f, l) ;
373	-- synthesis translate_on
374	end if;
375
376	when WinCompleted =>
377	if ct=0 then
378	-- synthesis translate_off
379	write (l,string'("Dlen ;" & integer'image(dlen) & ";Compl1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now))));
380	report l.all;
381	writeline (f, l) ;
382	-- synthesis translate_on
383	end if;
384	pMPI_Win_Complete(ct,Libr,sram,MyWin );
385	adresse:=to_integer(unsigned(sram.O.addr_wr));
386	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
387
388	if ct=0 then
389	RunState<=WinWait;
390	-- synthesis translate_off
391	write (l,string'("Dlen ;" & integer'image(dlen) & ";Compl2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
392	report l.all;
393	writeline (f, l) ;
394	-- synthesis translate_on
395
396	end if;
397	when WinWait =>
398	if ct=0 then
399	-- synthesis translate_off
400	write (l,string'("Dlen ;" & integer'image(dlen) & ";WAIT1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now))));
401	report l.all;
402	writeline (f, l) ;
403	-- synthesis translate_on
404	end if;
405	pMPI_Win_wait(ct,Libr,sram,MyWin );
406	adresse:=to_integer(unsigned(sram.O.addr_wr));
407	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
408
409	if ct=0 then
410	if Libr.I.Spawned='1' then
411	RunState<=Finalize;
412	elsif spawn_on='1' then
413	RunState<=Finalize;
414	else
415	RunState<=MpiSpawn;
416	end if;
417	-- synthesis translate_off
418	write (l,string'("Dlen ;" & integer'image(dlen) & ";WAIT2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
419	report l.all;
420	writeline (f, l) ;
421	-- synthesis translate_on
422
423	end if;
424
425	when MpiSpawn =>
426	if ct=0 then
427	-- synthesis translate_off
428	write (l,string'("Dlen ;" & integer'image(dlen) & ";Spawn1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now))));
429	report l.all;
430	writeline (f, l) ;
431	-- synthesis translate_on
432	end if;
433	--(NextCtx : inout natural;signal Interf:inout Core_io;signal SysRam :inout typ_dpram;
434
435	maxprocs:=2;
436	pMPI_Comm_Spawn(ct,Libr,sram,command,argv,maxprocs,info,root,comm,intercomm,array_of_errcodes);
437	adresse:=to_integer(unsigned(sram.O.addr_wr));
438	adresse_rd:=to_integer(unsigned(sram.O.addr_rd));
439
440	if ct=0 then
441	if unsigned(MyRank)=0 then
442	Spawn_on:='1';
443	Mygroup.grp<=x"000C";-- rank 3,4
444	destRank:=0;
445	runstate<=WinPost;
446	else
447	RunState<=Finalize;
448	end if;
449
450	-- synthesis translate_off
451	write (l,string'("Dlen ;" & integer'image(dlen) & ";Spawn2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
452	report l.all;
453	writeline (f, l) ;
454	-- synthesis translate_on
455
456	end if;
457	when finalize =>
458	if ct=0 then
459	-- synthesis translate_off
460	write (l,string'("Dlen ;" & integer'image(dlen) & ";FINALIZE1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now))));
461	report l.all;
462	writeline (f, l) ;
463	-- synthesis translate_on
464	end if;
465	sram.O.we<='0';
466	sram.O.ena<='0';
467	sram.O.enb<='0';
468	if ct=0 then
469	RunState<=start;
470	-- synthesis translate_off
471	write (l,string'("Dlen ;" & integer'image(dlen) & ";FINALIZE2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now))));
472	report l.all;
473	writeline (f, l) ;
474	file_close(f);
475	-- synthesis translate_on
476	end if;
477
478	when st_timeout =>
479
480	sram.O.we<='0';
481	sram.O.ena<='0';
482	sram.O.enb<='0';
483
484	RunState<=start;
485	end case;
486	ct_state<=ct; --pour débogage
487	end if;
488	end if;
489
490	end process pPutGet;
491
492	end a_count;
493

Note: See TracBrowser for help on using the repository browser.

Context Navigation

source: PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/HT_5.vhd

Download in other formats: