source: PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/MultiMPITest.ucf @ 76

#Created by Constraints Editor (xc6slx45-csg324-3) - 2012/12/19
NET "clkm" TNM_NET = clkm;
TIMESPEC TS_clkm = PERIOD "clkm" 18 ns HIGH 50%;
PIN "reset_IBUF_BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE;
NET "reset" LOC = "T15"; # Bank = 2, Pin name = IO_L1N_M0_CMPMISO_2, Sch name = M0/RESET
NET "clk"   LOC = "L15"; # Bank = 1, Pin name = IO_L42P_GCLK7_M1UDM, Type = GCLK, Sch name = GCLK
# onBoard Leds
 NET "result<0>" LOC = "U18"; # Bank = 1, Pin name = IO_L52N_M1DQ15,       Sch name = LD0
 NET "result<1>" LOC = "M14"; # Bank = 1, Pin name = IO_L53P,                      Sch name = LD1
 NET "result<2>" LOC = "N14"; # Bank = 1, Pin name = IO_L53N_VREF,         Sch name = LD2
 NET "result<3>" LOC = "L14"; # Bank = 1, Pin name = IO_L61P,                      Sch name = LD3
 NET "result<4>" LOC = "M13"; # Bank = 1, Pin name = IO_L61N,                      Sch name = LD4
 NET "result<5>" LOC = "D4";  # Bank = 0, Pin name = IO_L1P_HSWAPEN_0,     Sch name = HSWAP/LD5
 NET "result<6>" LOC = "P16"; # Bank = 1, Pin name = IO_L74N_DOUT_BUSY_1, Sch name = LD6
 NET "result<7>" LOC = "N12"; # Bank = 2, Pin name = IO_L13P_M1_2,                 Sch name = M1/LD7
#