| Device Utilization Summary | [-] |
| Slice Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Registers |
5,736 |
93,296 |
6% |
|
| Number used as Flip Flops |
4,343 |
|
|
|
| Number used as Latches |
1,393 |
|
|
|
| Number used as Latch-thrus |
0 |
|
|
|
| Number used as AND/OR logics |
0 |
|
|
|
| Number of Slice LUTs |
24,021 |
46,648 |
51% |
|
| Number used as logic |
13,765 |
46,648 |
29% |
|
| Number using O6 output only |
10,469 |
|
|
|
| Number using O5 output only |
570 |
|
|
|
| Number using O5 and O6 |
2,726 |
|
|
|
| Number used as ROM |
0 |
|
|
|
| Number used as Memory |
10,176 |
11,072 |
91% |
|
| Number used as Dual Port RAM |
10,144 |
|
|
|
| Number using O6 output only |
10,144 |
|
|
|
| Number using O5 output only |
0 |
|
|
|
| Number using O5 and O6 |
0 |
|
|
|
| Number used as Single Port RAM |
32 |
|
|
|
| Number using O6 output only |
32 |
|
|
|
| Number using O5 output only |
0 |
|
|
|
| Number using O5 and O6 |
0 |
|
|
|
| Number used as Shift Register |
0 |
|
|
|
| Number used exclusively as route-thrus |
80 |
|
|
|
| Number with same-slice register load |
6 |
|
|
|
| Number with same-slice carry load |
66 |
|
|
|
| Number with other load |
8 |
|
|
|
| Number of occupied Slices |
7,515 |
11,662 |
64% |
|
| Number of LUT Flip Flop pairs used |
24,661 |
|
|
|
| Number with an unused Flip Flop |
19,198 |
24,661 |
77% |
|
| Number with an unused LUT |
640 |
24,661 |
2% |
|
| Number of fully used LUT-FF pairs |
4,823 |
24,661 |
19% |
|
| Number of unique control sets |
1,854 |
|
|
|
Number of slice register sites lost
to control set restrictions |
7,688 |
93,296 |
8% |
|
| Number of bonded IOBs |
10 |
328 |
3% |
|
| Number of RAMB16BWERs |
0 |
172 |
0% |
|
| Number of RAMB8BWERs |
4 |
344 |
1% |
|
| Number of BUFIO2/BUFIO2_2CLKs |
0 |
32 |
0% |
|
| Number of BUFIO2FB/BUFIO2FB_2CLKs |
0 |
32 |
0% |
|
| Number of BUFG/BUFGMUXs |
1 |
16 |
6% |
|
| Number used as BUFGs |
1 |
|
|
|
| Number used as BUFGMUX |
0 |
|
|
|
| Number of DCM/DCM_CLKGENs |
0 |
12 |
0% |
|
| Number of ILOGIC2/ISERDES2s |
0 |
442 |
0% |
|
| Number of IODELAY2/IODRP2/IODRP2_MCBs |
0 |
442 |
0% |
|
| Number of OLOGIC2/OSERDES2s |
0 |
442 |
0% |
|
| Number of BSCANs |
0 |
4 |
0% |
|
| Number of BUFHs |
0 |
384 |
0% |
|
| Number of BUFPLLs |
0 |
8 |
0% |
|
| Number of BUFPLL_MCBs |
0 |
4 |
0% |
|
| Number of DSP48A1s |
0 |
132 |
0% |
|
| Number of ICAPs |
0 |
1 |
0% |
|
| Number of MCBs |
0 |
4 |
0% |
|
| Number of PCILOGICSEs |
0 |
2 |
0% |
|
| Number of PLL_ADVs |
0 |
6 |
0% |
|
| Number of PMVs |
0 |
1 |
0% |
|
| Number of STARTUPs |
0 |
1 |
0% |
|
| Number of SUSPEND_SYNCs |
0 |
1 |
0% |
|
| Average Fanout of Non-Clock Nets |
5.62 |
|
|
|