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MPI_NOC.par @ 15

Last change on this file since 15 was 15, checked in by rolagamo, 12 years ago

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1	Release 12.3 par M.70d (nt64)
2	Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
3
4	GAMOM-PC:: Fri Aug 03 10:16:03 2012
5
6	par -w -intstyle ise -ol high -t 1 MPI_NOC_map.ncd MPI_NOC.ncd MPI_NOC.pcf
7
8
9	Constraints file: MPI_NOC.pcf.
10	Loading device for application Rf_Device from file '3s1200e.nph' in environment d:\Xilinx\12.3\ISE_DS\ISE\.
11	"MPI_NOC" is an NCD, version 3.2, device xc3s1200e, package ft256, speed -5
12	vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
13	INFO:Security:54 - 'xc3s1200e' is a WebPack part.
14	WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue
15	to function, but you no longer qualify for Xilinx software updates or new releases.
16
17	----------------------------------------------------------------------
18
19	Initializing temperature to 85.000 Celsius. (default - Range: -40.000 to 100.000 Celsius)
20	Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.320 Volts)
21
22	INFO:Par:282 - No user timing constraints were detected or you have set the option to ignore timing constraints ("par
23	-x"). Place and Route will run in "Performance Evaluation Mode" to automatically improve the performance of all
24	internal clocks in this design. Because there are not defined timing requirements, a timing score will not be
25	reported in the PAR report in this mode. The PAR timing summary will list the performance achieved for each clock.
26	Note: For the fastest runtime, set the effort level to "std". For best performance, set the effort level to "high".
27
28	Device speed data version: "PRODUCTION 1.27 2010-09-15".
29
30
31	Design Summary Report:
32
33	Number of External IOBs 146 out of 190 76%
34
35	Number of External Input IOBs 38
36
37	Number of External Input IBUFs 38
38
39	Number of External Output IOBs 108
40
41	Number of External Output IOBs 108
42
43	Number of External Bidir IOBs 0
44
45
46	Number of BUFGMUXs 5 out of 24 20%
47	Number of RAMB16s 4 out of 28 14%
48	Number of Slices 1832 out of 8672 21%
49	Number of SLICEMs 80 out of 4336 1%
50
51
52
53	Overall effort level (-ol): High
54	Placer effort level (-pl): High
55	Placer cost table entry (-t): 1
56	Router effort level (-rl): High
57
58	Starting initial Timing Analysis. REAL time: 5 secs
59	Finished initial Timing Analysis. REAL time: 5 secs
60
61
62	Starting Placer
63	Total REAL time at the beginning of Placer: 5 secs
64	Total CPU time at the beginning of Placer: 2 secs
65
66	Phase 1.1 Initial Placement Analysis
67	Phase 1.1 Initial Placement Analysis (Checksum:1e1b68) REAL time: 6 secs
68
69	Phase 2.7 Design Feasibility Check
70	Phase 2.7 Design Feasibility Check (Checksum:1e1b68) REAL time: 6 secs
71
72	Phase 3.31 Local Placement Optimization
73	Phase 3.31 Local Placement Optimization (Checksum:1e1b68) REAL time: 6 secs
74
75	Phase 4.2 Initial Clock and IO Placement
76	....
77	Phase 4.2 Initial Clock and IO Placement (Checksum:e9127565) REAL time: 7 secs
78
79	Phase 5.30 Global Clock Region Assignment
80	Phase 5.30 Global Clock Region Assignment (Checksum:e9127565) REAL time: 7 secs
81
82	Phase 6.36 Local Placement Optimization
83	Phase 6.36 Local Placement Optimization (Checksum:e9127565) REAL time: 7 secs
84
85	Phase 7.3 Local Placement Optimization
86	....
87	Phase 7.3 Local Placement Optimization (Checksum:6a0e9467) REAL time: 8 secs
88
89	Phase 8.5 Local Placement Optimization
90	Phase 8.5 Local Placement Optimization (Checksum:6a0e9467) REAL time: 8 secs
91
92	Phase 9.8 Global Placement
93	..............................
94	.................................
95	...........
96	..........................................................
97	......................
98	.......................
99	Phase 9.8 Global Placement (Checksum:76b4a125) REAL time: 18 secs
100
101	Phase 10.5 Local Placement Optimization
102	Phase 10.5 Local Placement Optimization (Checksum:76b4a125) REAL time: 18 secs
103
104	Phase 11.18 Placement Optimization
105	Phase 11.18 Placement Optimization (Checksum:d5bcee0d) REAL time: 22 secs
106
107	Phase 12.5 Local Placement Optimization
108	Phase 12.5 Local Placement Optimization (Checksum:d5bcee0d) REAL time: 22 secs
109
110	Total REAL time to Placer completion: 22 secs
111	Total CPU time to Placer completion: 19 secs
112	Writing design to file MPI_NOC.ncd
113
114
115
116	Starting Router
117
118
119	Phase 1 : 13667 unrouted; REAL time: 30 secs
120
121	Phase 2 : 12538 unrouted; REAL time: 31 secs
122
123	Phase 3 : 2990 unrouted; REAL time: 32 secs
124
125	Phase 4 : 3191 unrouted; (Par is working to improve performance) REAL time: 33 secs
126
127	Phase 5 : 0 unrouted; (Par is working to improve performance) REAL time: 36 secs
128
129	Updating file: MPI_NOC.ncd with current fully routed design.
130
131	Phase 6 : 0 unrouted; (Par is working to improve performance) REAL time: 37 secs
132
133	Phase 7 : 0 unrouted; (Par is working to improve performance) REAL time: 53 secs
134
135	Phase 8 : 0 unrouted; (Par is working to improve performance) REAL time: 56 secs
136
137	Phase 9 : 0 unrouted; (Par is working to improve performance) REAL time: 56 secs
138
139	Phase 10 : 0 unrouted; (Par is working to improve performance) REAL time: 56 secs
140
141	Phase 11 : 0 unrouted; (Par is working to improve performance) REAL time: 57 secs
142	WARNING:Route:455 - CLK Net:Socsyst.switch_gen1/switch2x2.PORT1_INPUT_PORT_MODULE/pop_state_cmp_eq0003 may have
143	excessive skew because
144	2 CLK pins and 0 NON_CLK pins failed to route using a CLK template.
145	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/LD_instr/etloadinst_cmp_eq0019 may have excessive skew because
146	2 CLK pins and 5 NON_CLK pins failed to route using a CLK template.
147	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/LD_instr/etloadinst_cmp_eq0019 may have excessive skew because
148	4 CLK pins and 5 NON_CLK pins failed to route using a CLK template.
149	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/CM_RDY may have excessive skew because
150	1 CLK pins and 3 NON_CLK pins failed to route using a CLK template.
151	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/CM_RDY may have excessive skew because
152	1 CLK pins and 3 NON_CLK pins failed to route using a CLK template.
153	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/timeout_i_not0001 may have excessive skew because
154	4 CLK pins and 0 NON_CLK pins failed to route using a CLK template.
155	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/timeout_i_not0001 may have excessive skew because
156	1 CLK pins and 0 NON_CLK pins failed to route using a CLK template.
157	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX1_FSM/ram_rd_or0000 may have excessive skew because
158	1 CLK pins and 1 NON_CLK pins failed to route using a CLK template.
159	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX1_FSM/ram_rd_or0000 may have excessive skew because
160	1 CLK pins and 1 NON_CLK pins failed to route using a CLK template.
161	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX2_FSM/ex2_state_mach_FSM_FFd18 may have excessive skew
162	because
163	1 CLK pins and 5 NON_CLK pins failed to route using a CLK template.
164	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/IAck may have excessive skew because
165	1 CLK pins and 1 NON_CLK pins failed to route using a CLK template.
166	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd11 may have excessive skew because
167	0 CLK pins and 15 NON_CLK pins failed to route using a CLK template.
168	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX2_FSM/ex2_state_mach_FSM_FFd18 may have excessive skew
169	because
170	1 CLK pins and 5 NON_CLK pins failed to route using a CLK template.
171	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd12 may have excessive skew because
172	1 CLK pins and 13 NON_CLK pins failed to route using a CLK template.
173	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd5 may have excessive skew because
174	0 CLK pins and 11 NON_CLK pins failed to route using a CLK template.
175	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd12 may have excessive skew because
176	1 CLK pins and 13 NON_CLK pins failed to route using a CLK template.
177	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd5 may have excessive skew because
178	0 CLK pins and 11 NON_CLK pins failed to route using a CLK template.
179	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd11 may have excessive skew because
180	0 CLK pins and 15 NON_CLK pins failed to route using a CLK template.
181	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_DMA_ARBITER/dma_rd_grant_3_cmp_eq0000 may have excessive
182	skew because
183	1 CLK pins and 4 NON_CLK pins failed to route using a CLK template.
184	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_DMA_ARBITER/dma_rd_grant_3_cmp_eq0000 may have excessive
185	skew because
186	1 CLK pins and 4 NON_CLK pins failed to route using a CLK template.
187	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd10 may have excessive skew because
188	1 CLK pins and 12 NON_CLK pins failed to route using a CLK template.
189	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/IAck may have excessive skew because
190	1 CLK pins and 1 NON_CLK pins failed to route using a CLK template.
191	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd10 may have excessive skew because
192	1 CLK pins and 12 NON_CLK pins failed to route using a CLK template.
193	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/DS_RDY may have excessive skew because
194	1 CLK pins and 18 NON_CLK pins failed to route using a CLK template.
195	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/DS_RDY may have excessive skew because
196	4 CLK pins and 18 NON_CLK pins failed to route using a CLK template.
197	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/etcmd_FSM_FFd9 may have excessive skew because
198	0 CLK pins and 6 NON_CLK pins failed to route using a CLK template.
199	WARNING:Route:455 - CLK Net:Socsyst.switch_gen1/switch2x2.PORT2_INPUT_PORT_MODULE/pop_state_cmp_eq0003 may have
200	excessive skew because
201	2 CLK pins and 1 NON_CLK pins failed to route using a CLK template.
202	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX1_FSM/ex1_state_mach_FSM_FFd7 may have excessive skew
203	because
204	1 CLK pins and 11 NON_CLK pins failed to route using a CLK template.
205	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX1_FSM/ex1_state_mach_FSM_FFd7 may have excessive skew
206	because
207	1 CLK pins and 11 NON_CLK pins failed to route using a CLK template.
208	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/etcmd_FSM_FFd9 may have excessive skew because
209	0 CLK pins and 6 NON_CLK pins failed to route using a CLK template.
210	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/dma_rd_grant<3> may have excessive skew because
211	8 CLK pins and 85 NON_CLK pins failed to route using a CLK template.
212	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/dma_rd_grant<3> may have excessive skew because
213	0 CLK pins and 85 NON_CLK pins failed to route using a CLK template.
214	WARNING:Route:455 - CLK Net:connect_core[2].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd9 may have excessive skew because
215	1 CLK pins and 23 NON_CLK pins failed to route using a CLK template.
216	WARNING:Route:455 - CLK Net:connect_core[1].hardmpi/MPI_CORE_EX4_FSM/stInit2_FSM_FFd9 may have excessive skew because
217	1 CLK pins and 23 NON_CLK pins failed to route using a CLK template.
218
219	Total REAL time to Router completion: 57 secs
220	Total CPU time to Router completion: 53 secs
221
222	Partition Implementation Status
223	-------------------------------
224
225	No Partitions were found in this design.
226
227	-------------------------------
228
229	Generating "PAR" statistics.
230
231	**************************
232	Generating Clock Report
233	**************************
234
235	+---------------------+--------------+------+------+------------+-------------+
236	\| Clock Net \| Resource \|Locked\|Fanout\|Net Skew(ns)\|Max Delay(ns)\|
237	+---------------------+--------------+------+------+------------+-------------+
238	\|MPI_Node_in_1__clk_B \| \| \| \| \| \|
239	\| UFGP \| BUFGMUX_X2Y10\| No \| 718 \| 0.177 \| 0.330 \|
240	+---------------------+--------------+------+------+------------+-------------+
241	\|connect_core[1].hard \| \| \| \| \| \|
242	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
243	\| /stInit2_FSM_FFd2 \| BUFGMUX_X2Y11\| No \| 26 \| 0.047 \| 0.277 \|
244	+---------------------+--------------+------+------+------------+-------------+
245	\|connect_core[2].hard \| \| \| \| \| \|
246	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
247	\| /stInit2_FSM_FFd2 \| BUFGMUX_X2Y1\| No \| 26 \| 0.123 \| 0.276 \|
248	+---------------------+--------------+------+------+------------+-------------+
249	\|connect_core[2].hard \| \| \| \| \| \|
250	\|mpi/LD_instr/etloadi \| \| \| \| \| \|
251	\| nst_cmp_eq0020 \| BUFGMUX_X1Y0\| No \| 17 \| 0.035 \| 0.190 \|
252	+---------------------+--------------+------+------+------------+-------------+
253	\|connect_core[1].hard \| \| \| \| \| \|
254	\|mpi/LD_instr/etloadi \| \| \| \| \| \|
255	\| nst_cmp_eq0020 \| BUFGMUX_X1Y10\| No \| 17 \| 0.030 \| 0.191 \|
256	+---------------------+--------------+------+------+------------+-------------+
257	\|connect_core[1].hard \| \| \| \| \| \|
258	\| mpi/dma_rd_grant<3> \| Local\| \| 93 \| 0.130 \| 1.819 \|
259	+---------------------+--------------+------+------+------------+-------------+
260	\|connect_core[2].hard \| \| \| \| \| \|
261	\| mpi/dma_rd_grant<3> \| Local\| \| 93 \| 1.379 \| 2.332 \|
262	+---------------------+--------------+------+------+------------+-------------+
263	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
264	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
265	\|T_PORT_MODULE/pop_st \| \| \| \| \| \|
266	\| ate_cmp_eq0003 \| Local\| \| 2 \| 0.452 \| 1.208 \|
267	+---------------------+--------------+------+------+------------+-------------+
268	\|connect_core[1].hard \| \| \| \| \| \|
269	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
270	\| /DS_RDY \| Local\| \| 24 \| 1.597 \| 3.245 \|
271	+---------------------+--------------+------+------+------------+-------------+
272	\|connect_core[2].hard \| \| \| \| \| \|
273	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
274	\| /DS_RDY \| Local\| \| 24 \| 0.773 \| 2.350 \|
275	+---------------------+--------------+------+------+------------+-------------+
276	\|connect_core[1].hard \| \| \| \| \| \|
277	\|mpi/LD_instr/Mtrien_ \| \| \| \| \| \|
278	\|Ram_address_i_not000 \| \| \| \| \| \|
279	\| 1 \| Local\| \| 1 \| 0.000 \| 0.992 \|
280	+---------------------+--------------+------+------+------------+-------------+
281	\|connect_core[2].hard \| \| \| \| \| \|
282	\|mpi/LD_instr/Mtrien_ \| \| \| \| \| \|
283	\|Ram_address_i_not000 \| \| \| \| \| \|
284	\| 1 \| Local\| \| 1 \| 0.000 \| 0.246 \|
285	+---------------------+--------------+------+------+------------+-------------+
286	\|connect_core[1].hard \| \| \| \| \| \|
287	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
288	\| /stInit2_FSM_FFd9 \| Local\| \| 24 \| 0.000 \| 1.221 \|
289	+---------------------+--------------+------+------+------------+-------------+
290	\|connect_core[2].hard \| \| \| \| \| \|
291	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
292	\| /stInit2_FSM_FFd9 \| Local\| \| 24 \| 0.000 \| 2.697 \|
293	+---------------------+--------------+------+------+------------+-------------+
294	\|connect_core[1].hard \| \| \| \| \| \|
295	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
296	\| /CTR_or0000 \| Local\| \| 1 \| 0.000 \| 0.469 \|
297	+---------------------+--------------+------+------+------------+-------------+
298	\|connect_core[2].hard \| \| \| \| \| \|
299	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
300	\| /CTR_or0000 \| Local\| \| 1 \| 0.000 \| 0.742 \|
301	+---------------------+--------------+------+------+------------+-------------+
302	\|connect_core[1].hard \| \| \| \| \| \|
303	\|mpi/LD_instr/Mtridat \| \| \| \| \| \|
304	\|a_Ram_address_i_not0 \| \| \| \| \| \|
305	\| 001 \| Local\| \| 14 \| 0.055 \| 1.613 \|
306	+---------------------+--------------+------+------+------------+-------------+
307	\|connect_core[2].hard \| \| \| \| \| \|
308	\|mpi/LD_instr/Mtridat \| \| \| \| \| \|
309	\|a_Ram_address_i_not0 \| \| \| \| \| \|
310	\| 001 \| Local\| \| 15 \| 0.068 \| 1.541 \|
311	+---------------------+--------------+------+------+------------+-------------+
312	\|connect_core[1].hard \| \| \| \| \| \|
313	\|mpi/LD_instr/etloadi \| \| \| \| \| \|
314	\| nst_cmp_eq0019 \| Local\| \| 9 \| 0.947 \| 2.381 \|
315	+---------------------+--------------+------+------+------------+-------------+
316	\|connect_core[2].hard \| \| \| \| \| \|
317	\|mpi/LD_instr/etloadi \| \| \| \| \| \|
318	\| nst_cmp_eq0019 \| Local\| \| 9 \| 0.486 \| 2.525 \|
319	+---------------------+--------------+------+------+------------+-------------+
320	\|connect_core[1].hard \| \| \| \| \| \|
321	\|mpi/LD_instr/count_i \| \| \| \| \| \|
322	\| _not0001 \| Local\| \| 10 \| 0.056 \| 1.536 \|
323	+---------------------+--------------+------+------+------------+-------------+
324	\|connect_core[2].hard \| \| \| \| \| \|
325	\|mpi/LD_instr/count_i \| \| \| \| \| \|
326	\| _not0001 \| Local\| \| 10 \| 0.105 \| 1.666 \|
327	+---------------------+--------------+------+------+------------+-------------+
328	\|connect_core[1].hard \| \| \| \| \| \|
329	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
330	\|/ex1_state_mach_FSM_ \| \| \| \| \| \|
331	\| FFd7 \| Local\| \| 12 \| 0.000 \| 2.159 \|
332	+---------------------+--------------+------+------+------------+-------------+
333	\|connect_core[2].hard \| \| \| \| \| \|
334	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
335	\|/ex1_state_mach_FSM_ \| \| \| \| \| \|
336	\| FFd7 \| Local\| \| 12 \| 0.000 \| 1.247 \|
337	+---------------------+--------------+------+------+------------+-------------+
338	\|connect_core[1].hard \| \| \| \| \| \|
339	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
340	\|ITER/dma_rd_grant_1_ \| \| \| \| \| \|
341	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.245 \|
342	+---------------------+--------------+------+------+------------+-------------+
343	\|connect_core[1].hard \| \| \| \| \| \|
344	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
345	\|ITER/dma_rd_grant_0_ \| \| \| \| \| \|
346	\| not0001 \| Local\| \| 1 \| 0.000 \| 0.980 \|
347	+---------------------+--------------+------+------+------------+-------------+
348	\|connect_core[2].hard \| \| \| \| \| \|
349	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
350	\|ITER/dma_rd_grant_1_ \| \| \| \| \| \|
351	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.979 \|
352	+---------------------+--------------+------+------+------------+-------------+
353	\|connect_core[2].hard \| \| \| \| \| \|
354	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
355	\|ITER/dma_rd_grant_0_ \| \| \| \| \| \|
356	\| not0001 \| Local\| \| 1 \| 0.000 \| 0.743 \|
357	+---------------------+--------------+------+------+------------+-------------+
358	\|connect_core[1].hard \| \| \| \| \| \|
359	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
360	\| /etcmd_FSM_FFd9 \| Local\| \| 9 \| 0.057 \| 1.718 \|
361	+---------------------+--------------+------+------+------------+-------------+
362	\|connect_core[2].hard \| \| \| \| \| \|
363	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
364	\| /etcmd_FSM_FFd9 \| Local\| \| 9 \| 0.345 \| 1.887 \|
365	+---------------------+--------------+------+------+------------+-------------+
366	\|connect_core[1].hard \| \| \| \| \| \|
367	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
368	\|ITER/dma_rd_grant_2_ \| \| \| \| \| \|
369	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.942 \|
370	+---------------------+--------------+------+------+------------+-------------+
371	\|connect_core[2].hard \| \| \| \| \| \|
372	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
373	\|ITER/dma_rd_grant_2_ \| \| \| \| \| \|
374	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.245 \|
375	+---------------------+--------------+------+------+------------+-------------+
376	\|connect_core[2].hard \| \| \| \| \| \|
377	\| mpi/IAck \| Local\| \| 2 \| 0.000 \| 1.409 \|
378	+---------------------+--------------+------+------+------------+-------------+
379	\|connect_core[1].hard \| \| \| \| \| \|
380	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
381	\|ITER/dma_rd_grant_3_ \| \| \| \| \| \|
382	\| cmp_eq0000 \| Local\| \| 5 \| 0.000 \| 0.960 \|
383	+---------------------+--------------+------+------+------------+-------------+
384	\|connect_core[2].hard \| \| \| \| \| \|
385	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
386	\|ITER/dma_rd_grant_3_ \| \| \| \| \| \|
387	\| cmp_eq0000 \| Local\| \| 5 \| 0.000 \| 0.252 \|
388	+---------------------+--------------+------+------+------------+-------------+
389	\|connect_core[1].hard \| \| \| \| \| \|
390	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
391	\| /DataRam_or0000 \| Local\| \| 4 \| 0.006 \| 1.628 \|
392	+---------------------+--------------+------+------+------------+-------------+
393	\|connect_core[2].hard \| \| \| \| \| \|
394	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
395	\| /DataRam_or0000 \| Local\| \| 4 \| 0.046 \| 1.768 \|
396	+---------------------+--------------+------+------+------------+-------------+
397	\|connect_core[1].hard \| \| \| \| \| \|
398	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
399	\| /stInit2_FSM_FFd11 \| Local\| \| 17 \| 0.084 \| 1.960 \|
400	+---------------------+--------------+------+------+------------+-------------+
401	\|connect_core[1].hard \| \| \| \| \| \|
402	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
403	\| /CM_RDY \| Local\| \| 4 \| 0.000 \| 1.302 \|
404	+---------------------+--------------+------+------+------------+-------------+
405	\|connect_core[2].hard \| \| \| \| \| \|
406	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
407	\| /stInit2_FSM_FFd11 \| Local\| \| 17 \| 0.000 \| 1.850 \|
408	+---------------------+--------------+------+------+------------+-------------+
409	\|connect_core[2].hard \| \| \| \| \| \|
410	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
411	\| /CM_RDY \| Local\| \| 4 \| 0.000 \| 0.816 \|
412	+---------------------+--------------+------+------+------------+-------------+
413	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
414	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
415	\|T_PORT_MODULE/dat_ex \| \| \| \| \| \|
416	\| ec_or0000 \| Local\| \| 1 \| 0.000 \| 0.979 \|
417	+---------------------+--------------+------+------+------------+-------------+
418	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
419	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
420	\|T_PORT_MODULE/pop_st \| \| \| \| \| \|
421	\| ate_cmp_eq0003 \| Local\| \| 3 \| 0.000 \| 0.267 \|
422	+---------------------+--------------+------+------+------------+-------------+
423	\|connect_core[1].hard \| \| \| \| \| \|
424	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
425	\| /DS_Ack_or0000 \| Local\| \| 1 \| 0.000 \| 0.979 \|
426	+---------------------+--------------+------+------+------------+-------------+
427	\|connect_core[1].hard \| \| \| \| \| \|
428	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
429	\| /stInit2_FSM_FFd5 \| Local\| \| 14 \| 0.109 \| 1.835 \|
430	+---------------------+--------------+------+------+------------+-------------+
431	\|connect_core[2].hard \| \| \| \| \| \|
432	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
433	\| /DS_Ack_or0000 \| Local\| \| 1 \| 0.000 \| 0.247 \|
434	+---------------------+--------------+------+------+------------+-------------+
435	\|connect_core[2].hard \| \| \| \| \| \|
436	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
437	\| /stInit2_FSM_FFd5 \| Local\| \| 14 \| 0.114 \| 1.857 \|
438	+---------------------+--------------+------+------+------------+-------------+
439	\|connect_core[1].hard \| \| \| \| \| \|
440	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
441	\| /Datalen_or0000 \| Local\| \| 3 \| 0.002 \| 1.019 \|
442	+---------------------+--------------+------+------+------------+-------------+
443	\|connect_core[2].hard \| \| \| \| \| \|
444	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
445	\| /Datalen_or0000 \| Local\| \| 3 \| 0.048 \| 1.702 \|
446	+---------------------+--------------+------+------+------------+-------------+
447	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
448	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
449	\|T_PORT_MODULE/cmd_ex \| \| \| \| \| \|
450	\| ec_or0000 \| Local\| \| 1 \| 0.000 \| 1.212 \|
451	+---------------------+--------------+------+------+------------+-------------+
452	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
453	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
454	\|T_PORT_MODULE/cmd_da \| \| \| \| \| \|
455	\| ta_signal_or0000 \| Local\| \| 2 \| 0.006 \| 0.308 \|
456	+---------------------+--------------+------+------+------------+-------------+
457	\|connect_core[1].hard \| \| \| \| \| \|
458	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
459	\| /AppInitReq_or0000 \| Local\| \| 1 \| 0.000 \| 0.979 \|
460	+---------------------+--------------+------+------+------------+-------------+
461	\|connect_core[2].hard \| \| \| \| \| \|
462	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
463	\| /AppInitReq_or0000 \| Local\| \| 1 \| 0.000 \| 0.514 \|
464	+---------------------+--------------+------+------+------------+-------------+
465	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
466	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
467	\|T_PORT_MODULE/cmdsta \| \| \| \| \| \|
468	\| te_cmp_eq0001 \| Local\| \| 1 \| 0.000 \| 0.754 \|
469	+---------------------+--------------+------+------+------------+-------------+
470	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
471	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
472	\|T_PORT_MODULE/cmdsta \| \| \| \| \| \|
473	\| te_cmp_eq0001 \| Local\| \| 2 \| 0.243 \| 1.525 \|
474	+---------------------+--------------+------+------+------------+-------------+
475	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
476	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
477	\|T_PORT_MODULE/cmd_da \| \| \| \| \| \|
478	\| ta_signal_or0000 \| Local\| \| 1 \| 0.000 \| 0.718 \|
479	+---------------------+--------------+------+------+------------+-------------+
480	\|connect_core[1].hard \| \| \| \| \| \|
481	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
482	\|ITER/dma_wr_grant_0_ \| \| \| \| \| \|
483	\| not0001 \| Local\| \| 1 \| 0.000 \| 0.979 \|
484	+---------------------+--------------+------+------+------------+-------------+
485	\|connect_core[2].hard \| \| \| \| \| \|
486	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
487	\|ITER/dma_wr_grant_0_ \| \| \| \| \| \|
488	\| not0001 \| Local\| \| 1 \| 0.000 \| 1.208 \|
489	+---------------------+--------------+------+------+------------+-------------+
490	\|connect_core[1].hard \| \| \| \| \| \|
491	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
492	\|ITER/dma_wr_grant_1_ \| \| \| \| \| \|
493	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.245 \|
494	+---------------------+--------------+------+------+------------+-------------+
495	\|connect_core[2].hard \| \| \| \| \| \|
496	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
497	\|ITER/dma_wr_grant_1_ \| \| \| \| \| \|
498	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.245 \|
499	+---------------------+--------------+------+------+------------+-------------+
500	\|connect_core[1].hard \| \| \| \| \| \|
501	\|mpi/LD_instr/timeout \| \| \| \| \| \|
502	\| _not0001 \| Local\| \| 6 \| 0.178 \| 1.786 \|
503	+---------------------+--------------+------+------+------------+-------------+
504	\|connect_core[1].hard \| \| \| \| \| \|
505	\|mpi/dma_data_in_not0 \| \| \| \| \| \|
506	\| 001 \| Local\| \| 5 \| 0.069 \| 1.633 \|
507	+---------------------+--------------+------+------+------------+-------------+
508	\|connect_core[1].hard \| \| \| \| \| \|
509	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
510	\|ITER/dma_wr_grant_2_ \| \| \| \| \| \|
511	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.246 \|
512	+---------------------+--------------+------+------+------------+-------------+
513	\|connect_core[2].hard \| \| \| \| \| \|
514	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
515	\|ITER/dma_wr_grant_2_ \| \| \| \| \| \|
516	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 1.229 \|
517	+---------------------+--------------+------+------+------------+-------------+
518	\|connect_core[1].hard \| \| \| \| \| \|
519	\| mpi/IAck \| Local\| \| 2 \| 0.000 \| 1.561 \|
520	+---------------------+--------------+------+------+------------+-------------+
521	\|connect_core[1].hard \| \| \| \| \| \|
522	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
523	\|ITER/dma_wr_grant_3_ \| \| \| \| \| \|
524	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.980 \|
525	+---------------------+--------------+------+------+------------+-------------+
526	\|connect_core[2].hard \| \| \| \| \| \|
527	\|mpi/MPI_CORE_DMA_ARB \| \| \| \| \| \|
528	\|ITER/dma_wr_grant_3_ \| \| \| \| \| \|
529	\| cmp_eq0000 \| Local\| \| 1 \| 0.000 \| 0.980 \|
530	+---------------------+--------------+------+------+------------+-------------+
531	\|connect_core[1].hard \| \| \| \| \| \|
532	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
533	\| /WeRam_or0000 \| Local\| \| 1 \| 0.000 \| 0.511 \|
534	+---------------------+--------------+------+------+------------+-------------+
535	\|connect_core[2].hard \| \| \| \| \| \|
536	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
537	\| /WeRam_or0000 \| Local\| \| 1 \| 0.000 \| 0.513 \|
538	+---------------------+--------------+------+------+------------+-------------+
539	\|connect_core[1].hard \| \| \| \| \| \|
540	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
541	\| /NextRank_or0000 \| Local\| \| 5 \| 0.006 \| 1.253 \|
542	+---------------------+--------------+------+------+------------+-------------+
543	\|connect_core[1].hard \| \| \| \| \| \|
544	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
545	\| /stInit2_FSM_FFd10 \| Local\| \| 13 \| 0.000 \| 1.051 \|
546	+---------------------+--------------+------+------+------------+-------------+
547	\|connect_core[2].hard \| \| \| \| \| \|
548	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
549	\| /NextRank_or0000 \| Local\| \| 5 \| 0.004 \| 1.243 \|
550	+---------------------+--------------+------+------+------------+-------------+
551	\|connect_core[2].hard \| \| \| \| \| \|
552	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
553	\| /stInit2_FSM_FFd10 \| Local\| \| 13 \| 0.000 \| 2.293 \|
554	+---------------------+--------------+------+------+------------+-------------+
555	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
556	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
557	\|T_PORT_MODULE/cmd_da \| \| \| \| \| \|
558	\| ta_out_pulse_or0000 \| Local\| \| 1 \| 0.000 \| 0.944 \|
559	+---------------------+--------------+------+------+------------+-------------+
560	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
561	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
562	\|T_PORT_MODULE/cmd_da \| \| \| \| \| \|
563	\| ta_out_pulse_or0000 \| Local\| \| 1 \| 0.000 \| 0.979 \|
564	+---------------------+--------------+------+------+------------+-------------+
565	\|connect_core[2].hard \| \| \| \| \| \|
566	\|mpi/dma_data_in_not0 \| \| \| \| \| \|
567	\| 001 \| Local\| \| 5 \| 0.130 \| 1.794 \|
568	+---------------------+--------------+------+------+------------+-------------+
569	\|connect_core[1].hard \| \| \| \| \| \|
570	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
571	\|/DataToSend_0_or0000 \| \| \| \| \| \|
572	\| \| Local\| \| 3 \| 0.012 \| 1.270 \|
573	+---------------------+--------------+------+------+------------+-------------+
574	\|connect_core[1].hard \| \| \| \| \| \|
575	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
576	\| /stInit2_FSM_FFd12 \| Local\| \| 14 \| 0.000 \| 1.469 \|
577	+---------------------+--------------+------+------+------------+-------------+
578	\|connect_core[2].hard \| \| \| \| \| \|
579	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
580	\|/DataToSend_0_or0000 \| \| \| \| \| \|
581	\| \| Local\| \| 3 \| 0.117 \| 1.572 \|
582	+---------------------+--------------+------+------+------------+-------------+
583	\|connect_core[2].hard \| \| \| \| \| \|
584	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
585	\| /stInit2_FSM_FFd12 \| Local\| \| 14 \| 0.000 \| 2.401 \|
586	+---------------------+--------------+------+------+------------+-------------+
587	\|connect_core[1].hard \| \| \| \| \| \|
588	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
589	\| /PortNum_i_or0000 \| Local\| \| 2 \| 0.000 \| 1.287 \|
590	+---------------------+--------------+------+------+------------+-------------+
591	\|connect_core[2].hard \| \| \| \| \| \|
592	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
593	\| /PortNum_i_or0000 \| Local\| \| 2 \| 0.000 \| 1.057 \|
594	+---------------------+--------------+------+------+------------+-------------+
595	\|connect_core[2].hard \| \| \| \| \| \|
596	\|mpi/LD_instr/fifo_wr \| \| \| \| \| \|
597	\| _i_not0001 \| Local\| \| 1 \| 0.000 \| 0.301 \|
598	+---------------------+--------------+------+------+------------+-------------+
599	\|connect_core[1].hard \| \| \| \| \| \|
600	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
601	\| /timeout_i_not0001 \| Local\| \| 5 \| 1.446 \| 2.939 \|
602	+---------------------+--------------+------+------+------------+-------------+
603	\|connect_core[2].hard \| \| \| \| \| \|
604	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
605	\| /timeout_i_not0001 \| Local\| \| 5 \| 0.246 \| 1.937 \|
606	+---------------------+--------------+------+------+------------+-------------+
607	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
608	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
609	\|T_PORT_MODULE/dat_ex \| \| \| \| \| \|
610	\| ec_or0000 \| Local\| \| 1 \| 0.000 \| 1.225 \|
611	+---------------------+--------------+------+------+------------+-------------+
612	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
613	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
614	\|T_PORT_MODULE/cmd_ex \| \| \| \| \| \|
615	\| ec_or0000 \| Local\| \| 1 \| 0.000 \| 0.987 \|
616	+---------------------+--------------+------+------+------------+-------------+
617	\|connect_core[1].hard \| \| \| \| \| \|
618	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
619	\| /RankAsked_i_or0000 \| Local\| \| 1 \| 0.000 \| 0.977 \|
620	+---------------------+--------------+------+------+------------+-------------+
621	\|connect_core[2].hard \| \| \| \| \| \|
622	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
623	\| /RankAsked_i_or0000 \| Local\| \| 1 \| 0.000 \| 0.774 \|
624	+---------------------+--------------+------+------+------------+-------------+
625	\|connect_core[1].hard \| \| \| \| \| \|
626	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
627	\| /Result_1_or0000 \| Local\| \| 1 \| 0.000 \| 1.079 \|
628	+---------------------+--------------+------+------+------------+-------------+
629	\|connect_core[2].hard \| \| \| \| \| \|
630	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
631	\| /Result_1_or0000 \| Local\| \| 1 \| 0.000 \| 0.537 \|
632	+---------------------+--------------+------+------+------------+-------------+
633	\|connect_core[1].hard \| \| \| \| \| \|
634	\|mpi/LD_instr/fifo_wr \| \| \| \| \| \|
635	\| _i_not0001 \| Local\| \| 1 \| 0.000 \| 0.747 \|
636	+---------------------+--------------+------+------+------------+-------------+
637	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
638	\|switch2x2.PORT2_INPU \| \| \| \| \| \|
639	\|T_PORT_MODULE/cmd_fi \| \| \| \| \| \|
640	\|fo_read_signal_or000 \| \| \| \| \| \|
641	\| 0 \| Local\| \| 1 \| 0.000 \| 0.979 \|
642	+---------------------+--------------+------+------+------------+-------------+
643	\|Socsyst.switch_gen1/ \| \| \| \| \| \|
644	\|switch2x2.PORT1_INPU \| \| \| \| \| \|
645	\|T_PORT_MODULE/cmd_fi \| \| \| \| \| \|
646	\|fo_read_signal_or000 \| \| \| \| \| \|
647	\| 0 \| Local\| \| 1 \| 0.000 \| 0.979 \|
648	+---------------------+--------------+------+------+------------+-------------+
649	\|connect_core[1].hard \| \| \| \| \| \|
650	\|mpi/MPI_CORE_EX2_FSM \| \| \| \| \| \|
651	\|/ex2_state_mach_FSM_ \| \| \| \| \| \|
652	\| FFd18 \| Local\| \| 6 \| 0.000 \| 2.745 \|
653	+---------------------+--------------+------+------+------------+-------------+
654	\|connect_core[1].hard \| \| \| \| \| \|
655	\|mpi/MPI_CORE_EX2_FSM \| \| \| \| \| \|
656	\| /fifo_wr_en_or0000 \| Local\| \| 1 \| 0.000 \| 0.980 \|
657	+---------------------+--------------+------+------+------------+-------------+
658	\|connect_core[2].hard \| \| \| \| \| \|
659	\|mpi/MPI_CORE_EX2_FSM \| \| \| \| \| \|
660	\|/ex2_state_mach_FSM_ \| \| \| \| \| \|
661	\| FFd18 \| Local\| \| 6 \| 0.000 \| 1.385 \|
662	+---------------------+--------------+------+------+------------+-------------+
663	\|connect_core[2].hard \| \| \| \| \| \|
664	\|mpi/MPI_CORE_EX2_FSM \| \| \| \| \| \|
665	\| /fifo_wr_en_or0000 \| Local\| \| 1 \| 0.000 \| 0.980 \|
666	+---------------------+--------------+------+------+------------+-------------+
667	\|connect_core[1].hard \| \| \| \| \| \|
668	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
669	\|/CmdReceived_2_cmp_e \| \| \| \| \| \|
670	\| q0000 \| Local\| \| 5 \| 0.133 \| 1.705 \|
671	+---------------------+--------------+------+------+------------+-------------+
672	\|connect_core[2].hard \| \| \| \| \| \|
673	\|mpi/MPI_CORE_EX4_FSM \| \| \| \| \| \|
674	\|/CmdReceived_2_cmp_e \| \| \| \| \| \|
675	\| q0000 \| Local\| \| 5 \| 0.026 \| 1.506 \|
676	+---------------------+--------------+------+------+------------+-------------+
677	\|connect_core[2].hard \| \| \| \| \| \|
678	\|mpi/LD_instr/timeout \| \| \| \| \| \|
679	\| _not0001 \| Local\| \| 6 \| 0.007 \| 1.256 \|
680	+---------------------+--------------+------+------+------------+-------------+
681	\|connect_core[1].hard \| \| \| \| \| \|
682	\|mpi/LD_instr/etloadi \| \| \| \| \| \|
683	\| nst_cmp_eq0022 \| Local\| \| 5 \| 0.022 \| 1.260 \|
684	+---------------------+--------------+------+------+------------+-------------+
685	\|connect_core[2].hard \| \| \| \| \| \|
686	\|mpi/LD_instr/etloadi \| \| \| \| \| \|
687	\| nst_cmp_eq0022 \| Local\| \| 5 \| 0.064 \| 1.583 \|
688	+---------------------+--------------+------+------+------------+-------------+
689	\|connect_core[1].hard \| \| \| \| \| \|
690	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
691	\| /ram_rd_or0000 \| Local\| \| 2 \| 0.000 \| 0.850 \|
692	+---------------------+--------------+------+------+------------+-------------+
693	\|connect_core[1].hard \| \| \| \| \| \|
694	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
695	\| /ram_wr_or0000 \| Local\| \| 1 \| 0.000 \| 1.031 \|
696	+---------------------+--------------+------+------+------------+-------------+
697	\|connect_core[2].hard \| \| \| \| \| \|
698	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
699	\| /ram_rd_or0000 \| Local\| \| 2 \| 0.000 \| 0.834 \|
700	+---------------------+--------------+------+------+------------+-------------+
701	\|connect_core[2].hard \| \| \| \| \| \|
702	\|mpi/MPI_CORE_EX1_FSM \| \| \| \| \| \|
703	\| /ram_wr_or0000 \| Local\| \| 1 \| 0.000 \| 1.185 \|
704	+---------------------+--------------+------+------+------------+-------------+
705
706	* Net Skew is the difference between the minimum and maximum routing
707	only delays for the net. Note this is different from Clock Skew which
708	is reported in TRCE timing report. Clock Skew is the difference between
709	the minimum and maximum path delays which includes logic delays.
710
711	Timing Score: 0 (Setup: 0, Hold: 0)
712
713	Asterisk (*) preceding a constraint indicates it was not met.
714	This may be due to a setup or hold violation.
715
716	----------------------------------------------------------------------------------------------------------
717	Constraint \| Check \| Worst Case \| Best Case \| Timing \| Timing
718	\| \| Slack \| Achievable \| Errors \| Score
719	----------------------------------------------------------------------------------------------------------
720	Autotimespec constraint for clock net MPI \| SETUP \| N/A\| 10.668ns\| N/A\| 0
721	_Node_in_1__clk_BUFGP \| HOLD \| 0.660ns\| \| 0\| 0
722	----------------------------------------------------------------------------------------------------------
723	Autotimespec constraint for clock net con \| SETUP \| N/A\| 3.453ns\| N/A\| 0
724	nect_core[1].hardmpi/MPI_CORE_EX4_FSM/stI \| HOLD \| 1.451ns\| \| 0\| 0
725	nit2_FSM_FFd2 \| \| \| \| \|
726	----------------------------------------------------------------------------------------------------------
727	Autotimespec constraint for clock net con \| SETUP \| N/A\| 3.464ns\| N/A\| 0
728	nect_core[2].hardmpi/MPI_CORE_EX4_FSM/stI \| HOLD \| 1.457ns\| \| 0\| 0
729	nit2_FSM_FFd2 \| \| \| \| \|
730	----------------------------------------------------------------------------------------------------------
731	Autotimespec constraint for clock net con \| SETUP \| N/A\| 5.953ns\| N/A\| 0
732	nect_core[2].hardmpi/LD_instr/etloadinst_ \| HOLD \| 1.206ns\| \| 0\| 0
733	cmp_eq0020 \| \| \| \| \|
734	----------------------------------------------------------------------------------------------------------
735	Autotimespec constraint for clock net con \| SETUP \| N/A\| 6.085ns\| N/A\| 0
736	nect_core[1].hardmpi/LD_instr/etloadinst_ \| HOLD \| 1.206ns\| \| 0\| 0
737	cmp_eq0020 \| \| \| \| \|
738	----------------------------------------------------------------------------------------------------------
739	Autotimespec constraint for clock net con \| SETUP \| N/A\| 1.875ns\| N/A\| 0
740	nect_core[1].hardmpi/dma_rd_grant<3> \| HOLD \| 1.200ns\| \| 0\| 0
741	----------------------------------------------------------------------------------------------------------
742	Autotimespec constraint for clock net con \| SETUP \| N/A\| 1.864ns\| N/A\| 0
743	nect_core[2].hardmpi/dma_rd_grant<3> \| HOLD \| 1.200ns\| \| 0\| 0
744	----------------------------------------------------------------------------------------------------------
745	Autotimespec constraint for clock net con \| SETUP \| N/A\| 9.157ns\| N/A\| 0
746	nect_core[1].hardmpi/LD_instr/Mtridata_Ra \| HOLD \| 1.656ns\| \| 0\| 0
747	m_address_i_not0001 \| \| \| \| \|
748	----------------------------------------------------------------------------------------------------------
749	Autotimespec constraint for clock net con \| SETUP \| N/A\| 8.972ns\| N/A\| 0
750	nect_core[2].hardmpi/LD_instr/Mtridata_Ra \| HOLD \| 1.337ns\| \| 0\| 0
751	m_address_i_not0001 \| \| \| \| \|
752	----------------------------------------------------------------------------------------------------------
753	Autotimespec constraint for clock net con \| SETUP \| N/A\| 4.300ns\| N/A\| 0
754	nect_core[1].hardmpi/LD_instr/timeout_not \| HOLD \| 1.265ns\| \| 0\| 0
755	0001 \| \| \| \| \|
756	----------------------------------------------------------------------------------------------------------
757	Autotimespec constraint for clock net con \| SETUP \| N/A\| 3.644ns\| N/A\| 0
758	nect_core[1].hardmpi/MPI_CORE_EX4_FSM/Nex \| HOLD \| 1.185ns\| \| 0\| 0
759	tRank_or0000 \| \| \| \| \|
760	----------------------------------------------------------------------------------------------------------
761	Autotimespec constraint for clock net con \| SETUP \| N/A\| 3.924ns\| N/A\| 0
762	nect_core[2].hardmpi/MPI_CORE_EX4_FSM/Nex \| HOLD \| 1.170ns\| \| 0\| 0
763	tRank_or0000 \| \| \| \| \|
764	----------------------------------------------------------------------------------------------------------
765	Autotimespec constraint for clock net con \| SETUP \| N/A\| 1.929ns\| N/A\| 0
766	nect_core[1].hardmpi/MPI_CORE_EX4_FSM/Cmd \| HOLD \| 1.208ns\| \| 0\| 0
767	Received_2_cmp_eq0000 \| \| \| \| \|
768	----------------------------------------------------------------------------------------------------------
769	Autotimespec constraint for clock net con \| SETUP \| N/A\| 1.850ns\| N/A\| 0
770	nect_core[2].hardmpi/MPI_CORE_EX4_FSM/Cmd \| HOLD \| 1.208ns\| \| 0\| 0
771	Received_2_cmp_eq0000 \| \| \| \| \|
772	----------------------------------------------------------------------------------------------------------
773	Autotimespec constraint for clock net con \| SETUP \| N/A\| 3.819ns\| N/A\| 0
774	nect_core[2].hardmpi/LD_instr/timeout_not \| HOLD \| 1.280ns\| \| 0\| 0
775	0001 \| \| \| \| \|
776	----------------------------------------------------------------------------------------------------------
777
778
779	All constraints were met.
780	INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the
781	constraint is not analyzed due to the following: No paths covered by this
782	constraint; Other constraints intersect with this constraint; or This
783	constraint was disabled by a Path Tracing Control. Please run the Timespec
784	Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.
785
786
787	Generating Pad Report.
788
789	All signals are completely routed.
790
791	Total REAL time to PAR completion: 58 secs
792	Total CPU time to PAR completion: 54 secs
793
794	Peak Memory Usage: 350 MB
795
796	Placement: Completed - No errors found.
797	Routing: Completed - No errors found.
798
799	Number of error messages: 0
800	Number of warning messages: 34
801	Number of info messages: 1
802
803	Writing design to file MPI_NOC.ncd
804
805
806
807	PAR done!

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